[ gas/ChangeLog ]
2006-04-30 Thiemo Seufer <ths@mips.com> David Ung <davidu@mips.com> * config/tc-mips.c (validate_mips_insn): Handling of udi cases. (mips_immed): New table that records various handling of udi instruction patterns. (mips_ip): Adds udi handling. [ include/opcode/ChangeLog ] 2006-04-30 Thiemo Seufer <ths@mips.com> David Ung <davidu@mips.com> * mips.h: Defines udi bits and masks. Add description of characters which may appear in the args field of udi instructions. [ opcodes/ChangeLog ] 2006-04-30 Thiemo Seufer <ths@mips.com> David Ung <davidu@mips.com> * mips-opc.c (mips_builtin_opcodes): Add udi instructions "udi0" to "udi15". * mips-dis.c (print_insn_args): Adds udi argument handling.
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2006-04-30 Thiemo Seufer <ths@mips.com>
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David Ung <davidu@mips.com>
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* mips.h: Defines udi bits and masks. Add description of
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characters which may appear in the args field of udi
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instructions.
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2006-04-26 Thiemo Seufer <ths@networkno.de>
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* mips.h: Improve comments describing the bitfield instruction
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@ -203,6 +203,16 @@ Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, US
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#define MDMX_FMTSEL_VEC_QH 0x15
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#define MDMX_FMTSEL_VEC_OB 0x16
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/* UDI */
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#define OP_SH_UDI1 6
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#define OP_MASK_UDI1 0x1f
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#define OP_SH_UDI2 6
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#define OP_MASK_UDI2 0x3ff
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#define OP_SH_UDI3 6
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#define OP_MASK_UDI3 0x7fff
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#define OP_SH_UDI4 6
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#define OP_MASK_UDI4 0xfffff
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/* This structure holds information for a particular instruction. */
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struct mips_opcode
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@ -351,6 +361,12 @@ struct mips_opcode
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"+t" 5 bit coprocessor 0 destination register (OP_*_RT)
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"+T" 5 bit coprocessor 0 destination register (OP_*_RT) - disassembly only
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UDI immediates:
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"+1" UDI immediate bits 6-10
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"+2" UDI immediate bits 6-15
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"+3" UDI immediate bits 6-20
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"+4" UDI immediate bits 6-25
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Other:
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"()" parens surrounding optional value
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"," separates operands
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@ -365,6 +381,7 @@ struct mips_opcode
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Extension character sequences used so far ("+" followed by the
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following), for quick reference when adding more:
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"1234"
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"ABCDEFGHIT"
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"t"
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*/
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