newlib-cygwin/include/elf/mips.h

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1999-05-03 15:29:06 +08:00
/* MIPS ELF support for BFD.
2005-03-03 19:58:10 +08:00
Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
2003, 2004, 2005
Free Software Foundation, Inc.
1999-05-03 15:29:06 +08:00
By Ian Lance Taylor, Cygnus Support, <ian@cygnus.com>, from
information in the System V Application Binary Interface, MIPS
Processor Supplement.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
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/* This file holds definitions specific to the MIPS ELF ABI. Note
that most of this is not actually implemented by BFD. */
#ifndef _ELF_MIPS_H
#define _ELF_MIPS_H
#include "elf/reloc-macros.h"
/* Relocation types. */
START_RELOC_NUMBERS (elf_mips_reloc_type)
RELOC_NUMBER (R_MIPS_NONE, 0)
RELOC_NUMBER (R_MIPS_16, 1)
RELOC_NUMBER (R_MIPS_32, 2) /* In Elf 64: alias R_MIPS_ADD */
RELOC_NUMBER (R_MIPS_REL32, 3) /* In Elf 64: alias R_MIPS_REL */
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RELOC_NUMBER (R_MIPS_26, 4)
RELOC_NUMBER (R_MIPS_HI16, 5)
RELOC_NUMBER (R_MIPS_LO16, 6)
RELOC_NUMBER (R_MIPS_GPREL16, 7) /* In Elf 64: alias R_MIPS_GPREL */
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RELOC_NUMBER (R_MIPS_LITERAL, 8)
RELOC_NUMBER (R_MIPS_GOT16, 9) /* In Elf 64: alias R_MIPS_GOT */
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RELOC_NUMBER (R_MIPS_PC16, 10)
RELOC_NUMBER (R_MIPS_CALL16, 11) /* In Elf 64: alias R_MIPS_CALL */
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RELOC_NUMBER (R_MIPS_GPREL32, 12)
/* The remaining relocs are defined on Irix, although they are not
in the MIPS ELF ABI. */
RELOC_NUMBER (R_MIPS_UNUSED1, 13)
RELOC_NUMBER (R_MIPS_UNUSED2, 14)
RELOC_NUMBER (R_MIPS_UNUSED3, 15)
RELOC_NUMBER (R_MIPS_SHIFT5, 16)
RELOC_NUMBER (R_MIPS_SHIFT6, 17)
RELOC_NUMBER (R_MIPS_64, 18)
RELOC_NUMBER (R_MIPS_GOT_DISP, 19)
RELOC_NUMBER (R_MIPS_GOT_PAGE, 20)
RELOC_NUMBER (R_MIPS_GOT_OFST, 21)
RELOC_NUMBER (R_MIPS_GOT_HI16, 22)
RELOC_NUMBER (R_MIPS_GOT_LO16, 23)
RELOC_NUMBER (R_MIPS_SUB, 24)
RELOC_NUMBER (R_MIPS_INSERT_A, 25)
RELOC_NUMBER (R_MIPS_INSERT_B, 26)
RELOC_NUMBER (R_MIPS_DELETE, 27)
RELOC_NUMBER (R_MIPS_HIGHER, 28)
RELOC_NUMBER (R_MIPS_HIGHEST, 29)
RELOC_NUMBER (R_MIPS_CALL_HI16, 30)
RELOC_NUMBER (R_MIPS_CALL_LO16, 31)
RELOC_NUMBER (R_MIPS_SCN_DISP, 32)
RELOC_NUMBER (R_MIPS_REL16, 33)
RELOC_NUMBER (R_MIPS_ADD_IMMEDIATE, 34)
RELOC_NUMBER (R_MIPS_PJUMP, 35)
RELOC_NUMBER (R_MIPS_RELGOT, 36)
RELOC_NUMBER (R_MIPS_JALR, 37)
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/* TLS relocations. */
RELOC_NUMBER (R_MIPS_TLS_DTPMOD32, 38)
RELOC_NUMBER (R_MIPS_TLS_DTPREL32, 39)
RELOC_NUMBER (R_MIPS_TLS_DTPMOD64, 40)
RELOC_NUMBER (R_MIPS_TLS_DTPREL64, 41)
RELOC_NUMBER (R_MIPS_TLS_GD, 42)
RELOC_NUMBER (R_MIPS_TLS_LDM, 43)
RELOC_NUMBER (R_MIPS_TLS_DTPREL_HI16, 44)
RELOC_NUMBER (R_MIPS_TLS_DTPREL_LO16, 45)
RELOC_NUMBER (R_MIPS_TLS_GOTTPREL, 46)
RELOC_NUMBER (R_MIPS_TLS_TPREL32, 47)
RELOC_NUMBER (R_MIPS_TLS_TPREL64, 48)
RELOC_NUMBER (R_MIPS_TLS_TPREL_HI16, 49)
RELOC_NUMBER (R_MIPS_TLS_TPREL_LO16, 50)
RELOC_NUMBER (R_MIPS_GLOB_DAT, 51)
FAKE_RELOC (R_MIPS_max, 52)
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/* These relocs are used for the mips16. */
bfd/: 2005-02-15 Nigel Stephens <nigel@mips.com> Maciej W. Rozycki <macro@mips.com> * elf32-mips.c (elf_mips16_howto_table_rel): New array for MIPS16 reloc howtos. Add R_MIPS16_HI16 and R_MIPS16_LO16 relocs and R_MIPS16_GOT16 and R_MIPS16_CALL16 placeholders. (elf_mips16_jump_howto): Move into elf_mips16_howto_table_rel. (elf_mips16_gprel_howto): Likewise. Redefine src_mask and dst_mask. (mips16_gprel_reloc): Remove bit shuffling; call _bfd_mips16_elf_reloc_unshuffle(), _bfd_mips_elf_gprel16_with_gp() and _bfd_mips16_elf_reloc_shuffle() instead. (mips16_reloc_map): New reloc map for MIPS16 relocs. (bfd_elf32_bfd_reloc_type_lookup): Use mips16_reloc_map for MIPS16 relocs. (mips_elf32_rtype_to_howto): Fetch MIPS16 howtos from elf_mips16_howto_table_rel. * elf64-mips.c (mips16_elf64_howto_table_rel): New array for MIPS16 REL reloc howtos. Add R_MIPS16_HI16 and R_MIPS16_LO16 relocs and R_MIPS16_GOT16 and R_MIPS16_CALL16 placeholders. (elf_mips16_jump_howto): Move into mips16_elf64_howto_table_rel. (elf_mips16_gprel_howto): Likewise. Redefine src_mask and dst_mask. (mips16_elf64_howto_table_rela): New array for MIPS16 RELA reloc howtos. Add R_MIPS16_26, R_MIPS16_GPREL, R_MIPS16_HI16 and R_MIPS16_LO16 relocs and R_MIPS16_GOT16 and R_MIPS16_CALL16 placeholders. (mips16_gprel_reloc): Remove bit shuffling; call _bfd_mips16_elf_reloc_unshuffle(), _bfd_mips_elf_gprel16_with_gp() and _bfd_mips16_elf_reloc_shuffle() instead. (mips16_reloc_map): New reloc map for MIPS16 relocs. (bfd_elf64_bfd_reloc_type_lookup): Use mips16_reloc_map for MIPS16 relocs. (mips_elf64_rtype_to_howto): Fetch MIPS16 howtos from mips16_elf64_howto_table_rela or mips16_elf64_howto_table_rel. * elfn32-mips.c (elf_mips16_howto_table_rel): New array for MIPS16 REL reloc howtos. Add R_MIPS16_HI16 and R_MIPS16_LO16 relocs and R_MIPS16_GOT16 and R_MIPS16_CALL16 placeholders. (elf_mips16_jump_howto): Move into elf_mips16_howto_table_rel. (elf_mips16_gprel_howto): Likewise. Redefine src_mask and dst_mask. (mips16_gprel_reloc): Remove bit shuffling; call _bfd_mips16_elf_reloc_unshuffle(), _bfd_mips_elf_gprel16_with_gp() and _bfd_mips16_elf_reloc_shuffle() instead. (mips16_reloc_map): New reloc map for MIPS16 relocs. (bfd_elf32_bfd_reloc_type_lookup): Use mips16_reloc_map for MIPS16 relocs. (mips_elf_n32_rtype_to_howto): Fetch MIPS16 howtos from elf_mips16_howto_table_rela or elf_mips16_howto_table_rel. * elfxx-mips.c (_bfd_mips16_elf_reloc_unshuffle): New function to handle bit shuffling for MIPS16 relocs. (_bfd_mips16_elf_reloc_shuffle): Likewise. (_bfd_mips_elf_lo16_reloc): Use _bfd_mips16_elf_reloc_unshuffle() and _bfd_mips16_elf_reloc_shuffle(). (_bfd_mips_elf_generic_reloc): Likewise. (mips_elf_calculate_relocation): Likewise. Handle R_MIPS16_HI16 and R_MIPS16_LO16. (mips_elf_obtain_contents): Remove bit shuffling. (mips_elf_perform_relocation): Likewise; call _bfd_mips16_elf_reloc_unshuffle() and _bfd_mips16_elf_reloc_shuffle() instead. (_bfd_mips_elf_relocate_section): Likewise. Handle R_MIPS16_HI16 and R_MIPS16_LO16. * elfxx-mips.h (_bfd_mips16_elf_reloc_unshuffle): Declare. (_bfd_mips16_elf_reloc_shuffle): Likewise. * reloc.c (BFD_RELOC_MIPS16_HI16): New reloc. (BFD_RELOC_MIPS16_HI16_S): Likewise. (BFD_RELOC_MIPS16_LO16): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/: 2005-02-15 Nigel Stephens <nigel@mips.com> Maciej W. Rozycki <macro@mips.com> * config/tc-mips.c (reloc_needs_lo_p): Handle BFD_RELOC_MIPS16_HI16_S. (fixup_has_matching_lo_p): Handle BFD_RELOC_MIPS16_LO16. (append_insn): Add BFD_RELOC_MIPS16_GPREL, BFD_RELOC_MIPS16_HI16_S and BFD_RELOC_MIPS16_LO16 to relocs to suppress overflow complaints on. (mips16_ip): Resolve BFD_RELOC_MIPS16_HI16_S, BFD_RELOC_MIPS16_HI16 and BFD_RELOC_MIPS16_LO16 for constants. Call my_getSmallExpression() to parse percent operators. (percent_op_match, mips_percent_op): Separate definitions. (mips16_percent_op): Define percent operators for the MIPS16 mode. (parse_relocation): Handle the MIPS16 mode using mips16_percent_op. (md_apply_fix3): Handle BFD_RELOC_MIPS16_HI16, BFD_RELOC_MIPS16_HI16_S and BFD_RELOC_MIPS16_LO16. gas/testsuite/: 2005-02-15 Nigel Stephens <nigel@mips.com> Maciej W. Rozycki <macro@mips.com> * gas/mips/mips16-hilo.d: New test for the R_MIPS16_HI16 and R_MIPS16_LO16 relocs. * gas/mips/mips16-hilo-n32.d: Likewise, for the n32 ABI. * gas/mips/mips16-hilo.s: Source for the new tests. * gas/mips/mips.exp: Run the new tests. include/: 2005-02-15 Nigel Stephens <nigel@mips.com> Maciej W. Rozycki <macro@mips.com> * elf/mips.h (R_MIPS16_GOT16): New reloc code. (R_MIPS16_CALL16): Likewise. (R_MIPS16_HI16): Likewise. (R_MIPS16_LO16): Likewise. (R_MIPS16_min): New fake reloc code. (R_MIPS16_max): Likewise. ld/testsuite/: 2005-02-15 Nigel Stephens <nigel@mips.com> Maciej W. Rozycki <macro@mips.com> * ld-mips-elf/mips16-hilo.d: New test for the R_MIPS16_HI16 and R_MIPS16_LO16 relocs. * ld-mips-elf/mips16-hilo-n32.d: Likewise, for the n32 ABI. * ld-mips-elf/mips16-hilo.s: Auxiliary source for the new tests. * ld-mips-elf/mips-elf.exp: Run the new tests.
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FAKE_RELOC (R_MIPS16_min, 100)
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RELOC_NUMBER (R_MIPS16_26, 100)
RELOC_NUMBER (R_MIPS16_GPREL, 101)
bfd/: 2005-02-15 Nigel Stephens <nigel@mips.com> Maciej W. Rozycki <macro@mips.com> * elf32-mips.c (elf_mips16_howto_table_rel): New array for MIPS16 reloc howtos. Add R_MIPS16_HI16 and R_MIPS16_LO16 relocs and R_MIPS16_GOT16 and R_MIPS16_CALL16 placeholders. (elf_mips16_jump_howto): Move into elf_mips16_howto_table_rel. (elf_mips16_gprel_howto): Likewise. Redefine src_mask and dst_mask. (mips16_gprel_reloc): Remove bit shuffling; call _bfd_mips16_elf_reloc_unshuffle(), _bfd_mips_elf_gprel16_with_gp() and _bfd_mips16_elf_reloc_shuffle() instead. (mips16_reloc_map): New reloc map for MIPS16 relocs. (bfd_elf32_bfd_reloc_type_lookup): Use mips16_reloc_map for MIPS16 relocs. (mips_elf32_rtype_to_howto): Fetch MIPS16 howtos from elf_mips16_howto_table_rel. * elf64-mips.c (mips16_elf64_howto_table_rel): New array for MIPS16 REL reloc howtos. Add R_MIPS16_HI16 and R_MIPS16_LO16 relocs and R_MIPS16_GOT16 and R_MIPS16_CALL16 placeholders. (elf_mips16_jump_howto): Move into mips16_elf64_howto_table_rel. (elf_mips16_gprel_howto): Likewise. Redefine src_mask and dst_mask. (mips16_elf64_howto_table_rela): New array for MIPS16 RELA reloc howtos. Add R_MIPS16_26, R_MIPS16_GPREL, R_MIPS16_HI16 and R_MIPS16_LO16 relocs and R_MIPS16_GOT16 and R_MIPS16_CALL16 placeholders. (mips16_gprel_reloc): Remove bit shuffling; call _bfd_mips16_elf_reloc_unshuffle(), _bfd_mips_elf_gprel16_with_gp() and _bfd_mips16_elf_reloc_shuffle() instead. (mips16_reloc_map): New reloc map for MIPS16 relocs. (bfd_elf64_bfd_reloc_type_lookup): Use mips16_reloc_map for MIPS16 relocs. (mips_elf64_rtype_to_howto): Fetch MIPS16 howtos from mips16_elf64_howto_table_rela or mips16_elf64_howto_table_rel. * elfn32-mips.c (elf_mips16_howto_table_rel): New array for MIPS16 REL reloc howtos. Add R_MIPS16_HI16 and R_MIPS16_LO16 relocs and R_MIPS16_GOT16 and R_MIPS16_CALL16 placeholders. (elf_mips16_jump_howto): Move into elf_mips16_howto_table_rel. (elf_mips16_gprel_howto): Likewise. Redefine src_mask and dst_mask. (mips16_gprel_reloc): Remove bit shuffling; call _bfd_mips16_elf_reloc_unshuffle(), _bfd_mips_elf_gprel16_with_gp() and _bfd_mips16_elf_reloc_shuffle() instead. (mips16_reloc_map): New reloc map for MIPS16 relocs. (bfd_elf32_bfd_reloc_type_lookup): Use mips16_reloc_map for MIPS16 relocs. (mips_elf_n32_rtype_to_howto): Fetch MIPS16 howtos from elf_mips16_howto_table_rela or elf_mips16_howto_table_rel. * elfxx-mips.c (_bfd_mips16_elf_reloc_unshuffle): New function to handle bit shuffling for MIPS16 relocs. (_bfd_mips16_elf_reloc_shuffle): Likewise. (_bfd_mips_elf_lo16_reloc): Use _bfd_mips16_elf_reloc_unshuffle() and _bfd_mips16_elf_reloc_shuffle(). (_bfd_mips_elf_generic_reloc): Likewise. (mips_elf_calculate_relocation): Likewise. Handle R_MIPS16_HI16 and R_MIPS16_LO16. (mips_elf_obtain_contents): Remove bit shuffling. (mips_elf_perform_relocation): Likewise; call _bfd_mips16_elf_reloc_unshuffle() and _bfd_mips16_elf_reloc_shuffle() instead. (_bfd_mips_elf_relocate_section): Likewise. Handle R_MIPS16_HI16 and R_MIPS16_LO16. * elfxx-mips.h (_bfd_mips16_elf_reloc_unshuffle): Declare. (_bfd_mips16_elf_reloc_shuffle): Likewise. * reloc.c (BFD_RELOC_MIPS16_HI16): New reloc. (BFD_RELOC_MIPS16_HI16_S): Likewise. (BFD_RELOC_MIPS16_LO16): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/: 2005-02-15 Nigel Stephens <nigel@mips.com> Maciej W. Rozycki <macro@mips.com> * config/tc-mips.c (reloc_needs_lo_p): Handle BFD_RELOC_MIPS16_HI16_S. (fixup_has_matching_lo_p): Handle BFD_RELOC_MIPS16_LO16. (append_insn): Add BFD_RELOC_MIPS16_GPREL, BFD_RELOC_MIPS16_HI16_S and BFD_RELOC_MIPS16_LO16 to relocs to suppress overflow complaints on. (mips16_ip): Resolve BFD_RELOC_MIPS16_HI16_S, BFD_RELOC_MIPS16_HI16 and BFD_RELOC_MIPS16_LO16 for constants. Call my_getSmallExpression() to parse percent operators. (percent_op_match, mips_percent_op): Separate definitions. (mips16_percent_op): Define percent operators for the MIPS16 mode. (parse_relocation): Handle the MIPS16 mode using mips16_percent_op. (md_apply_fix3): Handle BFD_RELOC_MIPS16_HI16, BFD_RELOC_MIPS16_HI16_S and BFD_RELOC_MIPS16_LO16. gas/testsuite/: 2005-02-15 Nigel Stephens <nigel@mips.com> Maciej W. Rozycki <macro@mips.com> * gas/mips/mips16-hilo.d: New test for the R_MIPS16_HI16 and R_MIPS16_LO16 relocs. * gas/mips/mips16-hilo-n32.d: Likewise, for the n32 ABI. * gas/mips/mips16-hilo.s: Source for the new tests. * gas/mips/mips.exp: Run the new tests. include/: 2005-02-15 Nigel Stephens <nigel@mips.com> Maciej W. Rozycki <macro@mips.com> * elf/mips.h (R_MIPS16_GOT16): New reloc code. (R_MIPS16_CALL16): Likewise. (R_MIPS16_HI16): Likewise. (R_MIPS16_LO16): Likewise. (R_MIPS16_min): New fake reloc code. (R_MIPS16_max): Likewise. ld/testsuite/: 2005-02-15 Nigel Stephens <nigel@mips.com> Maciej W. Rozycki <macro@mips.com> * ld-mips-elf/mips16-hilo.d: New test for the R_MIPS16_HI16 and R_MIPS16_LO16 relocs. * ld-mips-elf/mips16-hilo-n32.d: Likewise, for the n32 ABI. * ld-mips-elf/mips16-hilo.s: Auxiliary source for the new tests. * ld-mips-elf/mips-elf.exp: Run the new tests.
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RELOC_NUMBER (R_MIPS16_GOT16, 102)
RELOC_NUMBER (R_MIPS16_CALL16, 103)
RELOC_NUMBER (R_MIPS16_HI16, 104)
RELOC_NUMBER (R_MIPS16_LO16, 105)
FAKE_RELOC (R_MIPS16_max, 106)
Richard Sandiford <richard@codesourcery.com> Daniel Jacobowitz <dan@codesourcery.com> Phil Edwards <phil@codesourcery.com> Zack Weinberg <zack@codesourcery.com> Mark Mitchell <mark@codesourcery.com> Nathan Sidwell <nathan@codesourcery.com> bfd/ * bfd-in2.h: Regenerate. * config.bfd (mips*-*-vxworks*, mips*el-*-vxworks*): New stanzas. * configure.in (bfd_elf32_bigmips_vxworks_vec): New stanza. (bfd_elf32_littlemips_vxworks_vec): Likewise. (bfd_elf32_bigmips_vec): Add elf-vxworks.lo. (bfd_elf32_littlemips_vec): Likewise. (bfd_elf32_nbigmips_vec): Likewise. (bfd_elf32_nlittlemips_vec): Likewise. (bfd_elf32_ntradbigmips_vec): Likewise. (bfd_elf32_ntradlittlemips_vec): Likewise. (bfd_elf32_tradbigmips_vec): Likewise. (bfd_elf32_tradlittlemips_vec): Likewise. (bfd_elf64_bigmips_vec): Likewise. (bfd_elf64_littlemips_vec): Likewise. (bfd_elf64_tradbigmips_vec): Likewise. (bfd_elf64_tradlittlemips_vec): Likewise. * elf32-mips.c: Include elf-vxworks.h. (mips_info_to_howto_rel): Use elf_backend_mips_rtype_to_howto instead of calling mips_elf32_rtype_to_howto directly. (mips_vxworks_copy_howto_rela): New reloc howto. (mips_vxworks_jump_slot_howto_rela): Likewise. (mips_vxworks_bfd_reloc_type_lookup): New function. (mips_vxworks_rtype_to_howto): Likewise. (mips_vxworks_final_write_processing): Likewise. (TARGET_LITTLE_SYM, TARGET_LITTLE_NAME): Override for VxWorks. (TARGET_BIG_SYM, TARGET_BIG_NAME, elf_bed, ELF_MAXPAGESIZE): Likewise. (elf_backend_want_got_plt): Likewise. (elf_backend_want_plt_sym): Likewise. (elf_backend_got_symbol_offset): Likewise. (elf_backend_want_dynbss): Likewise. (elf_backend_may_use_rel_p): Likewise. (elf_backend_may_use_rela_p): Likewise. (elf_backend_default_use_rela_p): Likewise. (elf_backend_got_header_size: Likewise. (elf_backend_plt_readonly): Likewise. (bfd_elf32_bfd_reloc_type_lookup): Likewise. (elf_backend_mips_rtype_to_howto): Likewise. (elf_backend_adjust_dynamic_symbol): Likewise. (elf_backend_finish_dynamic_symbol): Likewise. (bfd_elf32_bfd_link_hash_table_create): Likewise. (elf_backend_add_symbol_hook): Likewise. (elf_backend_link_output_symbol_hook): Likewise. (elf_backend_emit_relocs): Likewise. (elf_backend_final_write_processing: Likewise. (elf_backend_additional_program_headers): Likewise. (elf_backend_modify_segment_map): Likewise. (elf_backend_symbol_processing): Likewise. * elfxx-mips.c: Include elf-vxworks.h. (mips_elf_link_hash_entry): Add is_relocation_target and is_branch_target fields. (mips_elf_link_hash_table): Add is_vxworks, srelbss, sdynbss, srelplt, srelplt2, sgotplt, splt, plt_header_size and plt_entry_size fields. (MIPS_ELF_RELA_SIZE, MIPS_ELF_REL_DYN_NAME): New macros. (MIPS_RESERVED_GOTNO): Take a mips_elf_link_hash_table argument. Return 3 for VxWorks. (ELF_MIPS_GP_OFFSET): Change the argument from a bfd to a mips_elf_link_hash_table. Return 0 for VxWorks. (MIPS_ELF_GOT_MAX_SIZE): Change the argument from a bfd to a mips_elf_link_hash_table. Update the call to ELF_MIPS_GP_OFFSET. (mips_vxworks_exec_plt0_entry): New variable. (mips_vxworks_exec_plt_entry): Likewise. (mips_vxworks_shared_plt0_entry): Likewise. (mips_vxworks_shared_plt_entry): Likewise. (mips_elf_link_hash_newfunc): Initialize the new hash_entry fields. (mips_elf_rel_dyn_section): Change the bfd argument to a mips_elf_link_hash_table. Use MIPS_ELF_REL_DYN_NAME to get the name of the section. (mips_elf_initialize_tls_slots): Update the call to mips_elf_rel_dyn_section. (mips_elf_gotplt_index): New function. (mips_elf_local_got_index): Add an input_section argument. Update the call to mips_elf_create_local_got_entry. (mips_elf_got_page): Likewise. (mips_elf_got16_entry): Likewise. (mips_elf_create_local_got_entry): Add bfd_link_info and input_section arguments. Create dynamic relocations for each entry on VxWorks. (mips_elf_merge_gots): Update the use of MIPS_ELF_GOT_MAX_SIZE. (mips_elf_multi_got): Update the uses of MIPS_ELF_GOT_MAX_SIZE and MIPS_RESERVED_GOTNO. (mips_elf_create_got_section): Update the uses of MIPS_ELF_GOT_MAX_SIZE. Create .got.plt on VxWorks. (is_gott_symbol): New function. (mips_elf_calculate_relocation): Use a dynobj local variable. Update the calls to mips_elf_local_got_index, mips_elf_got16_entry and mips_elf_got_page_entry. Set G to the .got.plt entry when calculating VxWorks R_MIPS_CALL* relocations. Calculate and use G for all GOT relocations on VxWorks. Add dynamic relocations for references to the VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols. Don't create dynamic relocations for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 in VxWorks executables. (mips_elf_allocate_dynamic_relocations): Add a bfd_link_info argument. Use MIPS_ELF_RELA_SIZE to calculate the size of a VxWorks entry. Don't allocate a null entry on VxWorks. (mips_elf_create_dynamic_relocation): Update the call to mips_elf_rel_dyn_section. Use absolute rather than relative relocations for VxWorks, and make them RELA rather than REL. (_bfd_mips_elf_create_dynamic_sections): Don't make .dynamic read-only on VxWorks. Update the call to mips_elf_rel_dyn_section. Create the .plt, .rela.plt, .dynbss and .rela.bss sections on VxWorks. Likewise create the _PROCEDURE_LINKAGE_TABLE symbol. Call elf_vxworks_create_dynamic_sections for VxWorks and initialize the plt_header_size and plt_entry_size fields. (_bfd_mips_elf_check_relocs): Don't allow GOT relocations to be used in VxWorks executables. Don't allocate dynamic relocations for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 in VxWorks executables. Set is_relocation_target for each symbol referenced by a relocation. Allocate .rela.dyn entries for relocations against the special VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols. Create GOT entries for all VxWorks R_MIPS_GOT16 relocations. Don't allocate a global GOT entry for symbols mentioned in VxWorks R_MIPS_CALL*, R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 relocations. Update the calls to mips_elf_rel_dyn_section and mips_elf_allocate_dynamic_relocations. Set is_branch_target for symbols mentioned in R_MIPS_PC16 or R_MIPS_26 relocations. Don't set no_fn_stub on VxWorks. (_bfd_mips_elf_adjust_dynamic_symbol): Update the call to mips_elf_allocate_dynamic_relocations. (_bfd_mips_vxworks_adjust_dynamic_symbol): New function. (_bfd_mips_elf_always_size_sections): Do not allocate GOT page entries for VxWorks, and do not create multiple GOTs. (_bfd_mips_elf_size_dynamic_sections): Use MIPS_ELF_REL_DYN_NAME. Handle .got specially for VxWorks. Update the uses of MIPS_RESERVED_GOTNO and mips_elf_allocate_dynamic_relocations. Check for sgotplt and splt. Allocate the .rel(a).dyn contents last, once its final size is known. Set DF_TEXTREL for VxWorks. Add DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL, DT_PLTRELSZ and DT_JMPREL tags on VxWorks. Do not add the MIPS-specific tags for VxWorks. (_bfd_mips_vxworks_finish_dynamic_symbol): New function. (mips_vxworks_finish_exec_plt): Likewise. (mips_vxworks_finish_shared_plt): Likewise. (_bfd_mips_elf_finish_dynamic_sections): Remove an unncessary call to mips_elf_rel_dyn_section. Use a VxWorks-specific value of DT_PLTGOT. Handle DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL, DT_PLTRELSZ and DT_JMPREL. Update the uses of MIPS_RESERVED_GOTNO and mips_elf_rel_dyn_section. Use a different GOT header for VxWorks. Don't sort .rela.dyn on VxWorks. Finish the PLT on VxWorks. (_bfd_mips_elf_link_hash_table_create): Initialize the new mips_elf_link_hash_table fields. (_bfd_mips_vxworks_link_hash_table_create): New function. (_bfd_mips_elf_final_link): Set the GP value to _GLOBAL_OFFSET_TABLE_ on VxWorks. Update the call to ELF_MIPS_GP_OFFSET. * elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Declare. (_bfd_mips_vxworks_finish_dynamic_symbol): Likewise. (_bfd_mips_vxworks_link_hash_table_create): Likewise. * libbfd.h: Regenerate. * Makefile.am (elfxx-mips.lo): Depend on elf-vxworks.h. (elf32-mips.lo): Likewise. * Makefile.in: Regenerate. * reloc.c (BFD_RELOC_MIPS_COPY, BFD_RELOC_MIPS_JUMP_SLOT): Declare. * targets.c (bfd_elf32_bigmips_vxworks_vec): Declare. (bfd_elf32_littlemips_vxworks_vec): Likewise. (_bfd_target_vector): Add entries for them. gas/ * config/tc-mips.c (mips_target_format): Handle vxworks targets. (md_begin): Complain about -G being used for PIC. Don't change the text, data and bss alignments on VxWorks. (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when generating VxWorks PIC. (load_address): Extend SVR4_PIC handling to VXWORKS_PIC. (macro): Likewise, but do not treat la $25 specially for VxWorks PIC, and do not handle jal. (OPTION_MVXWORKS_PIC): New macro. (md_longopts): Add -mvxworks-pic. (md_parse_option): Don't complain about using PIC and -G together here. Handle OPTION_MVXWORKS_PIC. (md_estimate_size_before_relax): Always use the first relaxation sequence on VxWorks. * config/tc-mips.h (VXWORKS_PIC): New. gas/testsuite/ * gas/mips/vxworks1.s, gas/mips/vxworks1.d, * gas/mips/vxworks1-xgot.d: New tests. * gas/mips/mips.exp: Run them. Do not run other tests on VxWorks. include/elf/ * mips.h (R_MIPS_COPY, R_MIPS_JUMP_SLOT): New relocs. ld/ * configure.tgt (mips*el-*-vxworks*, mips*-*-vxworks*): Use separate VxWorks emulations. * emulparams/elf32ebmipvxworks.sh: New file. * emulparams/elf32elmipvxworks.sh: New file. * Makefile.am (ALL_EMULATIONS): Add eelf32ebmipvxworks.o and eelf32elmipvxworks.o. (eelf32ebmipvxworks.c, eelf32elmipvxworks.c): New rules. * Makefile.in: Regenerate. ld/testsuite/ * ld-mips/vxworks1.dd, ld-mips/vxworks1.ld, ld-mips/vxworks1-lib.dd, * ld-mips/vxworks1-lib.nd, ld-mips/vxworks1-lib.rd, * ld-mips/vxworks1-lib.s, ld-mips/vxworks1.rd, ld-mips/vxworks1.s, * ld-mips/vxworks1-static.d, ld-mips/vxworks2.s, ld-mips/vxworks2.sd, * ld-mips/vxworks2-static.sd: New tests. * ld-mips/mips-elf.exp: Run them.
2006-03-22 17:28:13 +08:00
/* These relocations are specific to VxWorks. */
RELOC_NUMBER (R_MIPS_COPY, 126)
RELOC_NUMBER (R_MIPS_JUMP_SLOT, 127)
/* This was a GNU extension used by embedded-PIC. It was co-opted by
mips-linux for exception-handling data. It is no longer used, but
should continue to be supported by the linker for backward
compatibility. (GCC stopped using it in May, 2004.) */
RELOC_NUMBER (R_MIPS_PC32, 248)
/* FIXME: this relocation is used internally by gas. */
In bfd/: * elf32-mips.c (mips_elf_next_relocation): Rename from mips_elf_next_lo16_relocation, and generalize to look for any relocation type. (elf_mips_howto_table): Make R_MIPS_PC16 pcrel_offset. (elf_mips_gnu_rel_hi16): Howto for R_MIPS_GNU_REL_HI16. (elf_mips_gnu_rel_lo16): Howto for R_MIPS_GNU_REL_LO16. (elf_mips_gnu_rel16_s2): Howto for R_MIPS_GNU_REL16_S2. (elf_mips_gnu_pcrel64): Howto for R_MIPS_PC64. (elf_mips_gnu_pcrel32): Howto for R_MIPS_PC32. (bfd_elf32_bfd_reloc_type_lookup): Add new relocs. (mips_rtype_to_howto): Likewise. (mips_elf_calculate_relocation): Handle new relocs. (_bfd_mips_elf_relocate_section): REL_HI16/REL_LO16 relocs are paired. The addend for R_MIPS_GNU_REL16_S2 is shifted right two bits. In gas/: * config/tc-mips.c (mips_ip): Don't put stuff in .rodata when embedded-pic. * config/tc-mips.c (SWITCH_TABLE): The ELF embedded-pic implementation doesn't have special handling for switch statements. (macro_build): Allow for code in sections other than .text. (macro): Likewise. (mips_ip): Likewise. (md_apply_fix): Do pc-relative relocation madness for MIPS ELF. Don't perform relocs if we will be outputting them. (tc_gen_reloc): For ELF, just use fx_addnumber for pc-relative relocations. Allow BFD_RELOC_16_PCREL_S2 relocs when embedded-pic. In gas/testsuite/: * gas/mips/empic.d: New file. * gas/mips/empic.s: New file. * gas/mips/mips16-e.d: New file. * gas/mips/mips16-e.s: New file. * gas/mips/mips16-f.d: New file. * gas/mips/mips16-f.s: New file. * gas/mips/mips.exp: Add empic, mips16-e. Add mips16-f as an expected failure. In include/elf: * mips.h: Add R_MIPS_GNU_REL_HI16, R_MIPS_GNU_REL_LO16, R_MIPS_GNU_REL16_S2, R_MIPS_PC64 and R_MIPS_PC32 relocation numbers.
2000-03-11 10:16:25 +08:00
RELOC_NUMBER (R_MIPS_GNU_REL16_S2, 250)
1999-05-03 15:29:06 +08:00
/* These are GNU extensions to enable C++ vtable garbage collection. */
RELOC_NUMBER (R_MIPS_GNU_VTINHERIT, 253)
RELOC_NUMBER (R_MIPS_GNU_VTENTRY, 254)
END_RELOC_NUMBERS (R_MIPS_maxext)
1999-05-03 15:29:06 +08:00
/* Processor specific flags for the ELF header e_flags field. */
/* At least one .noreorder directive appears in the source. */
#define EF_MIPS_NOREORDER 0x00000001
/* File contains position independent code. */
#define EF_MIPS_PIC 0x00000002
/* Code in file uses the standard calling sequence for calling
position independent code. */
#define EF_MIPS_CPIC 0x00000004
2003-01-28 08:01:08 +08:00
/* ??? Unknown flag, set in IRIX 6's BSDdup2.o in libbsd.a. */
#define EF_MIPS_XGOT 0x00000008
/* Code in file uses UCODE (obsolete) */
#define EF_MIPS_UCODE 0x00000010
1999-05-03 15:29:06 +08:00
/* Code in file uses new ABI (-n32 on Irix 6). */
#define EF_MIPS_ABI2 0x00000020
/* Process the .MIPS.options section first by ld */
#define EF_MIPS_OPTIONS_FIRST 0x00000080
/* Architectural Extensions used by this file */
#define EF_MIPS_ARCH_ASE 0x0f000000
/* Use MDMX multimedia extensions */
#define EF_MIPS_ARCH_ASE_MDMX 0x08000000
/* Use MIPS-16 ISA extensions */
#define EF_MIPS_ARCH_ASE_M16 0x04000000
2001-03-24 08:46:00 +08:00
/* Indicates code compiled for a 64-bit machine in 32-bit mode.
1999-05-03 15:29:06 +08:00
(regs are 32-bits wide.) */
#define EF_MIPS_32BITMODE 0x00000100
/* Four bit MIPS architecture field. */
#define EF_MIPS_ARCH 0xf0000000
/* -mips1 code. */
#define E_MIPS_ARCH_1 0x00000000
/* -mips2 code. */
#define E_MIPS_ARCH_2 0x10000000
/* -mips3 code. */
#define E_MIPS_ARCH_3 0x20000000
/* -mips4 code. */
#define E_MIPS_ARCH_4 0x30000000
2000-12-02 08:55:22 +08:00
/* -mips5 code. */
2000-12-13 03:25:07 +08:00
#define E_MIPS_ARCH_5 0x40000000
2000-12-02 08:55:22 +08:00
/* -mips32 code. */
2000-12-13 03:25:07 +08:00
#define E_MIPS_ARCH_32 0x50000000
2000-12-02 08:55:22 +08:00
/* -mips64 code. */
2000-12-13 03:25:07 +08:00
#define E_MIPS_ARCH_64 0x60000000
2000-12-02 08:55:22 +08:00
[ bfd/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case. * archures.c (bfd_mach_mipsisa32r2): New define. * bfd-in2.h: Regenerate. * cpu-mips.c (I_mipsisa32r2): New enum value. (arch_info_struct): Add entry for I_mipsisa32r2. * elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2. (_bfd_mips_elf_final_write_processing): Add bfd_mach_mipsisa32r2 case. (_bfd_mips_elf_merge_private_bfd_data): Handle merging of binaries marked as using MIPS32 Release 2. [ binutils/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register) changes in MIPS -M options. [ gas/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * configure.in: Recognize mipsisa32r2, mipsisa32r2el, and CPU variants. * configure: Regenerate. * config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines. (macro_build): Handle "K" operand. (macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where CPU_HAS_DROR and CPU_HAS_ROR are currently used. (mips_ip): New variable "lastpos", and implement "+A", "+B", and "+C" operands for MIPS32 Release 2 ins/ext instructions. Implement "K" operand for MIPS32 Release 2 rdhwr instruction. (validate_mips_insn): Implement "+" as a way to extend the allowed operands, and implement "K", "+A", "+B", and "+C" operands. (OPTION_MIPS32R2): New define. (md_longopts): Add entry for OPTION_MIPS32R2. (OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2. (md_parse_option): Handle OPTION_MIPS32R2. (s_mipsset): Reimplement handling of ".set mipsN" options and add support for ".set mips32r2". (mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2). (md_show_usage): Document "-mips32r2" option. * doc/as.texinfo: Document "-mips32r2" option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips32r2.d: New test. * gas/mips/hwr-names-mips32r2.d: New test. * gas/mips/hwr-names-numeric.d: New test. * gas/mips/hwr-names.s: New test source file. * gas/mips/mips32r2.d: New test. * gas/mips/mips32r2.s: New test source file. * gas/mips/mips32r2-ill.l: New test. * gas/mips/mips32r2-ill.s: New test source file. * gas/mips/mips.exp: Add mips32r2 architecture data array entry. Run new tests mentioned above. [ include/elf/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_32R2): New define. [ include/opcode/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document "+" as the start of two-character operand type names, and add new "K", "+A", "+B", and "+C" operand types. (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB) (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New defines. [ opcodes/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric) (mips_hwr_names_mips3264r2): New arrays. (mips_arch_choice): New "hwr_names" member. (mips_arch_choices): Adjust for structure change, and add a new entry for "mips32r2" ISA. (mips_hwr_names): New variable. (set_default_mips_dis_options): Set mips_hwr_names. (parse_mips_dis_option): New "hwr-names" option which sets mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names. (print_insn_arg): Change return type to "int" and use that to indicate number of characters consumed. Add support for "+" operand extension character, "+A", "+B", "+C", and "K" operands. (print_insn_mips): Adjust for changes to print_insn_arg. (print_mips_disassembler_options): Adjust for "hwr-names" addition and "reg-names" change. * mips-opc (I33): New define (shorthand for INSN_ISA32R2). (mips_builtin_opcodes): Note that "nop" and "ssnop" are special forms of "sll". Add new MIPS32 Release 2 instructions: ehb, di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2, rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh. Note that hardware rotate instructions (ror, rorv) can be used on MIPS32 Release 2, and add the official mnemonics for them (rotr, rotrv) and the similar "rotl" mnemonic for left-rotate.
2002-12-31 15:29:29 +08:00
/* -mips32r2 code. */
#define E_MIPS_ARCH_32R2 0x70000000
[ bfd/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * archures.c (bfd_mach_mipsisa64r2): New define. * bfd-in2.h: Regenerate. * aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mipsisa64r2. * cpu-mips.c (I_mipsisa64r2): New enum value. (arch_info_struct): Add entry for I_mipsisa64r2. * elfxx-mips.c (_bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_64R2. (mips_set_isa_flags): Add bfd_mach_mipsisa64r2 case. (mips_mach_extensions): Add entry for bfd_mach_mipsisa64r2. [ binutils/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * readelf.c (get_machine_flags): Handle E_MIPS_ARCH_64R2. [ gas/Changelog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * configure.in (mipsisa64r2, mipsisa64r2el, mipsisa64r2*): New CPUs. * configure: Regenerate. * config/tc-mips.c (imm2_expr): New variable. (md_assemble, mips16_ip): Initialize imm2_expr. (ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Add ISA_MIPS64R2. (macro_build): Handle +A, +B, +C, +E, +F, +G, and +H format operands. (macro): Handle M_DEXT and M_DINS. (validate_mips_insn): Handle +E, +F, +G, +H, and +I format operands. (mips_ip): Likewise. (OPTION_MIPS64R2): New define. (md_longopts): New entry for -mips64r2 (OPTION_MIPS64R2). OPTION_ASE_BASE): Increase to compensate for OPTION_MIPS64R2. (md_parse_option): Handle OPTION_MIPS64R2. (s_mipsset): Handle setting "mips64r2" ISA. (mips_cpu_info_table): Add mips64r2. (md_show_usage): Document -mips64r2 option. * doc/as.texinfo: Docuemnt -mips64r2 option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips64r2.d: New file. * gas/mips/cp0sel-names-mips64r2.d: New file. * gas/mips/elf_arch_mips64r2.d: New file. * gas/mips/hwr-names-mips64r2.d: New file. * gas/mips/mips32r2-ill-fp64.l: New file. * gas/mips/mips32r2-ill-fp64.s: New file. * gas/mips/mips64r2-ill.l: New file. * gas/mips/mips64r2-ill.s: New file. * gas/mips/mips64r2.d: New file. * gas/mips/mips64r2.s: New file. * gas/mips/mips.exp: Define "mips64r2" arch, and run new tests. [ include/elf/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_64R2): New define. [ include/opcode/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document +E, +F, +G, +H, and +I operand types. Update documentation of I, +B and +C operand types. (INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines. (M_DEXT, M_DINS): New enum values. [ ld/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ldmain.c (get_emulation): Ignore "-mips64r2". [ ld/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ld-mips-elf/mips-elf-flags.exp: Add tests for combinations with MIPS64r2. [ opcodes/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_arch_choices): Add entry for "mips64r2" (print_insn_args): Add handing for +E, +F, +G, and +H. * mips-opc.c (I65): New define for MIPS64r2. (mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins", "dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh", and "dshd" for MIPS64r2. Adjust "dror", "dror32", and "drorv" to be supported on MIPS64r2.
2003-10-01 00:17:14 +08:00
/* -mips64r2 code. */
#define E_MIPS_ARCH_64R2 0x80000000
1999-05-03 15:29:06 +08:00
/* The ABI of the file. Also see EF_MIPS_ABI2 above. */
#define EF_MIPS_ABI 0x0000F000
/* The original o32 abi. */
#define E_MIPS_ABI_O32 0x00001000
/* O32 extended to work on 64 bit architectures */
#define E_MIPS_ABI_O64 0x00002000
/* EABI in 32 bit mode */
#define E_MIPS_ABI_EABI32 0x00003000
/* EABI in 64 bit mode */
#define E_MIPS_ABI_EABI64 0x00004000
/* Machine variant if we know it. This field was invented at Cygnus,
but it is hoped that other vendors will adopt it. If some standard
is developed, this code should be changed to follow it. */
#define EF_MIPS_MACH 0x00FF0000
/* Cygnus is choosing values between 80 and 9F;
00 - 7F should be left for a future standard;
the rest are open. */
#define E_MIPS_MACH_3900 0x00810000
#define E_MIPS_MACH_4010 0x00820000
#define E_MIPS_MACH_4100 0x00830000
#define E_MIPS_MACH_4650 0x00850000
#define E_MIPS_MACH_4120 0x00870000
1999-05-03 15:29:06 +08:00
#define E_MIPS_MACH_4111 0x00880000
2000-12-02 09:10:33 +08:00
#define E_MIPS_MACH_SB1 0x008a0000
#define E_MIPS_MACH_5400 0x00910000
#define E_MIPS_MACH_5500 0x00980000
2004-12-09 14:02:45 +08:00
#define E_MIPS_MACH_9000 0x00990000
1999-05-03 15:29:06 +08:00
/* Processor specific section indices. These sections do not actually
exist. Symbols with a st_shndx field corresponding to one of these
values have a special meaning. */
/* Defined and allocated common symbol. Value is virtual address. If
relocated, alignment must be preserved. */
#define SHN_MIPS_ACOMMON 0xff00
/* Defined and allocated text symbol. Value is virtual address.
Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables. */
#define SHN_MIPS_TEXT 0xff01
/* Defined and allocated data symbol. Value is virtual address.
Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables. */
#define SHN_MIPS_DATA 0xff02
/* Small common symbol. */
#define SHN_MIPS_SCOMMON 0xff03
/* Small undefined symbol. */
#define SHN_MIPS_SUNDEFINED 0xff04
/* Processor specific section types. */
/* Section contains the set of dynamic shared objects used when
statically linking. */
#define SHT_MIPS_LIBLIST 0x70000000
/* I'm not sure what this is, but it's used on Irix 5. */
#define SHT_MIPS_MSYM 0x70000001
/* Section contains list of symbols whose definitions conflict with
symbols defined in shared objects. */
#define SHT_MIPS_CONFLICT 0x70000002
/* Section contains the global pointer table. */
#define SHT_MIPS_GPTAB 0x70000003
/* Section contains microcode information. The exact format is
unspecified. */
#define SHT_MIPS_UCODE 0x70000004
/* Section contains some sort of debugging information. The exact
format is unspecified. It's probably ECOFF symbols. */
#define SHT_MIPS_DEBUG 0x70000005
/* Section contains register usage information. */
#define SHT_MIPS_REGINFO 0x70000006
/* ??? */
#define SHT_MIPS_PACKAGE 0x70000007
/* ??? */
#define SHT_MIPS_PACKSYM 0x70000008
/* ??? */
#define SHT_MIPS_RELD 0x70000009
/* Section contains interface information. */
#define SHT_MIPS_IFACE 0x7000000b
/* Section contains description of contents of another section. */
#define SHT_MIPS_CONTENT 0x7000000c
/* Section contains miscellaneous options. */
#define SHT_MIPS_OPTIONS 0x7000000d
/* ??? */
#define SHT_MIPS_SHDR 0x70000010
/* ??? */
#define SHT_MIPS_FDESC 0x70000011
/* ??? */
#define SHT_MIPS_EXTSYM 0x70000012
/* ??? */
#define SHT_MIPS_DENSE 0x70000013
/* ??? */
#define SHT_MIPS_PDESC 0x70000014
/* ??? */
#define SHT_MIPS_LOCSYM 0x70000015
/* ??? */
#define SHT_MIPS_AUXSYM 0x70000016
/* ??? */
#define SHT_MIPS_OPTSYM 0x70000017
/* ??? */
#define SHT_MIPS_LOCSTR 0x70000018
/* ??? */
#define SHT_MIPS_LINE 0x70000019
/* ??? */
#define SHT_MIPS_RFDESC 0x7000001a
/* Delta C++: symbol table */
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#define SHT_MIPS_DELTASYM 0x7000001b
/* Delta C++: instance table */
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#define SHT_MIPS_DELTAINST 0x7000001c
/* Delta C++: class table */
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#define SHT_MIPS_DELTACLASS 0x7000001d
/* DWARF debugging section. */
#define SHT_MIPS_DWARF 0x7000001e
/* Delta C++: declarations */
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#define SHT_MIPS_DELTADECL 0x7000001f
/* List of libraries the binary depends on. Includes a time stamp, version
number. */
#define SHT_MIPS_SYMBOL_LIB 0x70000020
/* Events section. */
#define SHT_MIPS_EVENTS 0x70000021
/* ??? */
#define SHT_MIPS_TRANSLATE 0x70000022
/* Special pixie sections */
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#define SHT_MIPS_PIXIE 0x70000023
/* Address translation table (for debug info) */
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#define SHT_MIPS_XLATE 0x70000024
/* SGI internal address translation table (for debug info) */
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#define SHT_MIPS_XLATE_DEBUG 0x70000025
/* Intermediate code */
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#define SHT_MIPS_WHIRL 0x70000026
/* C++ exception handling region info */
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#define SHT_MIPS_EH_REGION 0x70000027
/* Obsolete address translation table (for debug info) */
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#define SHT_MIPS_XLATE_OLD 0x70000028
/* Runtime procedure descriptor table exception information (ucode) ??? */
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#define SHT_MIPS_PDR_EXCEPTION 0x70000029
/* A section of type SHT_MIPS_LIBLIST contains an array of the
following structure. The sh_link field is the section index of the
string table. The sh_info field is the number of entries in the
section. */
typedef struct
{
/* String table index for name of shared object. */
unsigned long l_name;
/* Time stamp. */
unsigned long l_time_stamp;
/* Checksum of symbol names and common sizes. */
unsigned long l_checksum;
/* String table index for version. */
unsigned long l_version;
/* Flags. */
unsigned long l_flags;
} Elf32_Lib;
/* The external version of Elf32_Lib. */
typedef struct
{
unsigned char l_name[4];
unsigned char l_time_stamp[4];
unsigned char l_checksum[4];
unsigned char l_version[4];
unsigned char l_flags[4];
} Elf32_External_Lib;
/* The l_flags field of an Elf32_Lib structure may contain the
following flags. */
/* Require an exact match at runtime. */
#define LL_EXACT_MATCH 0x00000001
/* Ignore version incompatibilities at runtime. */
#define LL_IGNORE_INT_VER 0x00000002
/* Require matching minor version number. */
#define LL_REQUIRE_MINOR 0x00000004
/* ??? */
#define LL_EXPORTS 0x00000008
/* Delay loading of this library until really needed. */
#define LL_DELAY_LOAD 0x00000010
/* ??? Delta C++ stuff ??? */
#define LL_DELTA 0x00000020
/* A section of type SHT_MIPS_CONFLICT is an array of indices into the
.dynsym section. Each element has the following type. */
typedef unsigned long Elf32_Conflict;
typedef unsigned char Elf32_External_Conflict[4];
typedef unsigned long Elf64_Conflict;
typedef unsigned char Elf64_External_Conflict[8];
/* A section of type SHT_MIPS_GPTAB contains information about how
much GP space would be required for different -G arguments. This
information is only used so that the linker can provide informative
suggestions as to the best -G value to use. The sh_info field is
the index of the section for which this information applies. The
contents of the section are an array of the following union. The
first element uses the gt_header field. The remaining elements use
the gt_entry field. */
typedef union
{
struct
{
/* -G value actually used for this object file. */
unsigned long gt_current_g_value;
/* Unused. */
unsigned long gt_unused;
} gt_header;
struct
{
/* If this -G argument has been used... */
unsigned long gt_g_value;
/* ...this many GP section bytes would be required. */
unsigned long gt_bytes;
} gt_entry;
} Elf32_gptab;
/* The external version of Elf32_gptab. */
typedef union
{
struct
{
unsigned char gt_current_g_value[4];
unsigned char gt_unused[4];
} gt_header;
struct
{
unsigned char gt_g_value[4];
unsigned char gt_bytes[4];
} gt_entry;
} Elf32_External_gptab;
/* A section of type SHT_MIPS_REGINFO contains the following
structure. */
typedef struct
{
/* Mask of general purpose registers used. */
unsigned long ri_gprmask;
/* Mask of co-processor registers used. */
unsigned long ri_cprmask[4];
/* GP register value for this object file. */
long ri_gp_value;
} Elf32_RegInfo;
/* The external version of the Elf_RegInfo structure. */
typedef struct
{
unsigned char ri_gprmask[4];
unsigned char ri_cprmask[4][4];
unsigned char ri_gp_value[4];
} Elf32_External_RegInfo;
/* MIPS ELF .reginfo swapping routines. */
extern void bfd_mips_elf32_swap_reginfo_in
(bfd *, const Elf32_External_RegInfo *, Elf32_RegInfo *);
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extern void bfd_mips_elf32_swap_reginfo_out
(bfd *, const Elf32_RegInfo *, Elf32_External_RegInfo *);
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/* Processor specific section flags. */
/* This section must be in the global data area. */
#define SHF_MIPS_GPREL 0x10000000
/* This section should be merged. */
#define SHF_MIPS_MERGE 0x20000000
/* This section contains address data of size implied by section
element size. */
#define SHF_MIPS_ADDR 0x40000000
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/* This section contains string data. */
#define SHF_MIPS_STRING 0x80000000
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/* This section may not be stripped. */
#define SHF_MIPS_NOSTRIP 0x08000000
/* This section is local to threads. */
#define SHF_MIPS_LOCAL 0x04000000
/* Linker should generate implicit weak names for this section. */
#define SHF_MIPS_NAMES 0x02000000
/* Section contais text/data which may be replicated in other sections.
Linker should retain only one copy. */
#define SHF_MIPS_NODUPES 0x01000000
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/* Processor specific program header types. */
/* Register usage information. Identifies one .reginfo section. */
#define PT_MIPS_REGINFO 0x70000000
/* Runtime procedure table. */
#define PT_MIPS_RTPROC 0x70000001
/* .MIPS.options section. */
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#define PT_MIPS_OPTIONS 0x70000002
/* Processor specific dynamic array tags. */
/* 32 bit version number for runtime linker interface. */
#define DT_MIPS_RLD_VERSION 0x70000001
/* Time stamp. */
#define DT_MIPS_TIME_STAMP 0x70000002
/* Checksum of external strings and common sizes. */
#define DT_MIPS_ICHECKSUM 0x70000003
/* Index of version string in string table. */
#define DT_MIPS_IVERSION 0x70000004
/* 32 bits of flags. */
#define DT_MIPS_FLAGS 0x70000005
/* Base address of the segment. */
#define DT_MIPS_BASE_ADDRESS 0x70000006
/* ??? */
#define DT_MIPS_MSYM 0x70000007
/* Address of .conflict section. */
#define DT_MIPS_CONFLICT 0x70000008
/* Address of .liblist section. */
#define DT_MIPS_LIBLIST 0x70000009
/* Number of local global offset table entries. */
#define DT_MIPS_LOCAL_GOTNO 0x7000000a
/* Number of entries in the .conflict section. */
#define DT_MIPS_CONFLICTNO 0x7000000b
/* Number of entries in the .liblist section. */
#define DT_MIPS_LIBLISTNO 0x70000010
/* Number of entries in the .dynsym section. */
#define DT_MIPS_SYMTABNO 0x70000011
/* Index of first external dynamic symbol not referenced locally. */
#define DT_MIPS_UNREFEXTNO 0x70000012
/* Index of first dynamic symbol in global offset table. */
#define DT_MIPS_GOTSYM 0x70000013
/* Number of page table entries in global offset table. */
#define DT_MIPS_HIPAGENO 0x70000014
/* Address of run time loader map, used for debugging. */
#define DT_MIPS_RLD_MAP 0x70000016
/* Delta C++ class definition. */
#define DT_MIPS_DELTA_CLASS 0x70000017
/* Number of entries in DT_MIPS_DELTA_CLASS. */
#define DT_MIPS_DELTA_CLASS_NO 0x70000018
/* Delta C++ class instances. */
#define DT_MIPS_DELTA_INSTANCE 0x70000019
/* Number of entries in DT_MIPS_DELTA_INSTANCE. */
#define DT_MIPS_DELTA_INSTANCE_NO 0x7000001a
/* Delta relocations. */
#define DT_MIPS_DELTA_RELOC 0x7000001b
/* Number of entries in DT_MIPS_DELTA_RELOC. */
#define DT_MIPS_DELTA_RELOC_NO 0x7000001c
/* Delta symbols that Delta relocations refer to. */
#define DT_MIPS_DELTA_SYM 0x7000001d
/* Number of entries in DT_MIPS_DELTA_SYM. */
#define DT_MIPS_DELTA_SYM_NO 0x7000001e
/* Delta symbols that hold class declarations. */
#define DT_MIPS_DELTA_CLASSSYM 0x70000020
/* Number of entries in DT_MIPS_DELTA_CLASSSYM. */
#define DT_MIPS_DELTA_CLASSSYM_NO 0x70000021
/* Flags indicating information about C++ flavor. */
#define DT_MIPS_CXX_FLAGS 0x70000022
/* Pixie information (???). */
#define DT_MIPS_PIXIE_INIT 0x70000023
/* Address of .MIPS.symlib */
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#define DT_MIPS_SYMBOL_LIB 0x70000024
/* The GOT index of the first PTE for a segment */
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#define DT_MIPS_LOCALPAGE_GOTIDX 0x70000025
/* The GOT index of the first PTE for a local symbol */
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#define DT_MIPS_LOCAL_GOTIDX 0x70000026
/* The GOT index of the first PTE for a hidden symbol */
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#define DT_MIPS_HIDDEN_GOTIDX 0x70000027
/* The GOT index of the first PTE for a protected symbol */
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#define DT_MIPS_PROTECTED_GOTIDX 0x70000028
/* Address of `.MIPS.options'. */
#define DT_MIPS_OPTIONS 0x70000029
/* Address of `.interface'. */
#define DT_MIPS_INTERFACE 0x7000002a
/* ??? */
#define DT_MIPS_DYNSTR_ALIGN 0x7000002b
/* Size of the .interface section. */
#define DT_MIPS_INTERFACE_SIZE 0x7000002c
/* Size of rld_text_resolve function stored in the GOT. */
#define DT_MIPS_RLD_TEXT_RESOLVE_ADDR 0x7000002d
/* Default suffix of DSO to be added by rld on dlopen() calls. */
#define DT_MIPS_PERF_SUFFIX 0x7000002e
/* Size of compact relocation section (O32). */
#define DT_MIPS_COMPACT_SIZE 0x7000002f
/* GP value for auxiliary GOTs. */
#define DT_MIPS_GP_VALUE 0x70000030
/* Address of auxiliary .dynamic. */
#define DT_MIPS_AUX_DYNAMIC 0x70000031
/* Flags which may appear in a DT_MIPS_FLAGS entry. */
/* No flags. */
#define RHF_NONE 0x00000000
/* Uses shortcut pointers. */
#define RHF_QUICKSTART 0x00000001
/* Hash size is not a power of two. */
#define RHF_NOTPOT 0x00000002
/* Ignore LD_LIBRARY_PATH. */
#define RHS_NO_LIBRARY_REPLACEMENT 0x00000004
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/* DSO address may not be relocated. */
#define RHF_NO_MOVE 0x00000008
/* SGI specific features. */
#define RHF_SGI_ONLY 0x00000010
/* Guarantee that .init will finish executing before any non-init
code in DSO is called. */
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#define RHF_GUARANTEE_INIT 0x00000020
/* Contains Delta C++ code. */
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#define RHF_DELTA_C_PLUS_PLUS 0x00000040
/* Guarantee that .init will start executing before any non-init
code in DSO is called. */
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#define RHF_GUARANTEE_START_INIT 0x00000080
/* Generated by pixie. */
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#define RHF_PIXIE 0x00000100
/* Delay-load DSO by default. */
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#define RHF_DEFAULT_DELAY_LOAD 0x00000200
/* Object may be requickstarted */
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#define RHF_REQUICKSTART 0x00000400
/* Object has been requickstarted */
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#define RHF_REQUICKSTARTED 0x00000800
/* Generated by cord. */
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#define RHF_CORD 0x00001000
/* Object contains no unresolved undef symbols. */
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#define RHF_NO_UNRES_UNDEF 0x00002000
/* Symbol table is in a safe order. */
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#define RHF_RLD_ORDER_SAFE 0x00004000
/* Special values for the st_other field in the symbol table. These
are used in an Irix 5 dynamic symbol table. */
#define STO_DEFAULT STV_DEFAULT
#define STO_INTERNAL STV_INTERNAL
#define STO_HIDDEN STV_HIDDEN
#define STO_PROTECTED STV_PROTECTED
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/* This value is used for a mips16 .text symbol. */
#define STO_MIPS16 0xf0
/* This bit is used on Irix to indicate a symbol whose definition
is optional - if, at final link time, it cannot be found, no
error message should be produced. */
#define STO_OPTIONAL (1 << 2)
/* A macro to examine the STO_OPTIONAL bit. */
#define ELF_MIPS_IS_OPTIONAL(other) ((other) & STO_OPTIONAL)
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/* The 64-bit MIPS ELF ABI uses an unusual reloc format. Each
relocation entry specifies up to three actual relocations, all at
the same address. The first relocation which required a symbol
uses the symbol in the r_sym field. The second relocation which
requires a symbol uses the symbol in the r_ssym field. If all
three relocations require a symbol, the third one uses a zero
value. */
/* An entry in a 64 bit SHT_REL section. */
typedef struct
{
/* Address of relocation. */
unsigned char r_offset[8];
/* Symbol index. */
unsigned char r_sym[4];
/* Special symbol. */
unsigned char r_ssym[1];
/* Third relocation. */
unsigned char r_type3[1];
/* Second relocation. */
unsigned char r_type2[1];
/* First relocation. */
unsigned char r_type[1];
} Elf64_Mips_External_Rel;
typedef struct
{
/* Address of relocation. */
bfd_vma r_offset;
/* Symbol index. */
unsigned long r_sym;
/* Special symbol. */
unsigned char r_ssym;
/* Third relocation. */
unsigned char r_type3;
/* Second relocation. */
unsigned char r_type2;
/* First relocation. */
unsigned char r_type;
} Elf64_Mips_Internal_Rel;
/* An entry in a 64 bit SHT_RELA section. */
typedef struct
{
/* Address of relocation. */
unsigned char r_offset[8];
/* Symbol index. */
unsigned char r_sym[4];
/* Special symbol. */
unsigned char r_ssym[1];
/* Third relocation. */
unsigned char r_type3[1];
/* Second relocation. */
unsigned char r_type2[1];
/* First relocation. */
unsigned char r_type[1];
/* Addend. */
unsigned char r_addend[8];
} Elf64_Mips_External_Rela;
typedef struct
{
/* Address of relocation. */
bfd_vma r_offset;
/* Symbol index. */
unsigned long r_sym;
/* Special symbol. */
unsigned char r_ssym;
/* Third relocation. */
unsigned char r_type3;
/* Second relocation. */
unsigned char r_type2;
/* First relocation. */
unsigned char r_type;
/* Addend. */
bfd_signed_vma r_addend;
} Elf64_Mips_Internal_Rela;
/* MIPS ELF 64 relocation info access macros. */
#define ELF64_MIPS_R_SSYM(i) (((i) >> 24) & 0xff)
#define ELF64_MIPS_R_TYPE3(i) (((i) >> 16) & 0xff)
#define ELF64_MIPS_R_TYPE2(i) (((i) >> 8) & 0xff)
#define ELF64_MIPS_R_TYPE(i) ((i) & 0xff)
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/* Values found in the r_ssym field of a relocation entry. */
/* No relocation. */
#define RSS_UNDEF 0
/* Value of GP. */
#define RSS_GP 1
/* Value of GP in object being relocated. */
#define RSS_GP0 2
/* Address of location being relocated. */
#define RSS_LOC 3
/* A SHT_MIPS_OPTIONS section contains a series of options, each of
which starts with this header. */
typedef struct
{
/* Type of option. */
unsigned char kind[1];
/* Size of option descriptor, including header. */
unsigned char size[1];
/* Section index of affected section, or 0 for global option. */
unsigned char section[2];
/* Information specific to this kind of option. */
unsigned char info[4];
} Elf_External_Options;
typedef struct
{
/* Type of option. */
unsigned char kind;
/* Size of option descriptor, including header. */
unsigned char size;
/* Section index of affected section, or 0 for global option. */
unsigned short section;
/* Information specific to this kind of option. */
unsigned long info;
} Elf_Internal_Options;
/* MIPS ELF option header swapping routines. */
extern void bfd_mips_elf_swap_options_in
(bfd *, const Elf_External_Options *, Elf_Internal_Options *);
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extern void bfd_mips_elf_swap_options_out
(bfd *, const Elf_Internal_Options *, Elf_External_Options *);
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/* Values which may appear in the kind field of an Elf_Options
structure. */
/* Undefined. */
#define ODK_NULL 0
/* Register usage and GP value. */
#define ODK_REGINFO 1
/* Exception processing information. */
#define ODK_EXCEPTIONS 2
/* Section padding information. */
#define ODK_PAD 3
/* Hardware workarounds performed. */
#define ODK_HWPATCH 4
/* Fill value used by the linker. */
#define ODK_FILL 5
/* Reserved space for desktop tools. */
#define ODK_TAGS 6
/* Hardware workarounds, AND bits when merging. */
#define ODK_HWAND 7
/* Hardware workarounds, OR bits when merging. */
#define ODK_HWOR 8
/* GP group to use for text/data sections. */
#define ODK_GP_GROUP 9
/* ID information. */
#define ODK_IDENT 10
/* In the 32 bit ABI, an ODK_REGINFO option is just a Elf32_RegInfo
structure. In the 64 bit ABI, it is the following structure. The
info field of the options header is not used. */
typedef struct
{
/* Mask of general purpose registers used. */
unsigned char ri_gprmask[4];
/* Padding. */
unsigned char ri_pad[4];
/* Mask of co-processor registers used. */
unsigned char ri_cprmask[4][4];
/* GP register value for this object file. */
unsigned char ri_gp_value[8];
} Elf64_External_RegInfo;
typedef struct
{
/* Mask of general purpose registers used. */
unsigned long ri_gprmask;
/* Padding. */
unsigned long ri_pad;
/* Mask of co-processor registers used. */
unsigned long ri_cprmask[4];
/* GP register value for this object file. */
bfd_vma ri_gp_value;
} Elf64_Internal_RegInfo;
typedef struct
{
/* The hash value computed from the name of the corresponding
dynamic symbol. */
unsigned char ms_hash_value[4];
/* Contains both the dynamic relocation index and the symbol flags
field. The macros ELF32_MS_REL_INDEX and ELF32_MS_FLAGS are used
to access the individual values. The dynamic relocation index
identifies the first entry in the .rel.dyn section that
references the dynamic symbol corresponding to this msym entry.
If the index is 0, no dynamic relocations are associated with the
symbol. The symbol flags field is reserved for future use. */
unsigned char ms_info[4];
} Elf32_External_Msym;
typedef struct
{
/* The hash value computed from the name of the corresponding
dynamic symbol. */
unsigned long ms_hash_value;
/* Contains both the dynamic relocation index and the symbol flags
field. The macros ELF32_MS_REL_INDEX and ELF32_MS_FLAGS are used
to access the individual values. The dynamic relocation index
identifies the first entry in the .rel.dyn section that
references the dynamic symbol corresponding to this msym entry.
If the index is 0, no dynamic relocations are associated with the
symbol. The symbol flags field is reserved for future use. */
unsigned long ms_info;
} Elf32_Internal_Msym;
#define ELF32_MS_REL_INDEX(i) ((i) >> 8)
#define ELF32_MS_FLAGS(i) (i) & 0xff)
#define ELF32_MS_INFO(r, f) (((r) << 8) + ((f) & 0xff))
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/* MIPS ELF reginfo swapping routines. */
extern void bfd_mips_elf64_swap_reginfo_in
(bfd *, const Elf64_External_RegInfo *, Elf64_Internal_RegInfo *);
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extern void bfd_mips_elf64_swap_reginfo_out
(bfd *, const Elf64_Internal_RegInfo *, Elf64_External_RegInfo *);
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/* Masks for the info work of an ODK_EXCEPTIONS descriptor. */
#define OEX_FPU_MIN 0x1f /* FPEs which must be enabled. */
#define OEX_FPU_MAX 0x1f00 /* FPEs which may be enabled. */
#define OEX_PAGE0 0x10000 /* Page zero must be mapped. */
#define OEX_SMM 0x20000 /* Force sequential memory mode. */
#define OEX_FPDBUG 0x40000 /* Force precise floating-point
exceptions (debug mode). */
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#define OEX_DISMISS 0x80000 /* Dismiss invalid address faults. */
/* Masks of the FP exceptions for OEX_FPU_MIN and OEX_FPU_MAX. */
#define OEX_FPU_INVAL 0x10 /* Invalid operation exception. */
#define OEX_FPU_DIV0 0x08 /* Division by zero exception. */
#define OEX_FPU_OFLO 0x04 /* Overflow exception. */
#define OEX_FPU_UFLO 0x02 /* Underflow exception. */
#define OEX_FPU_INEX 0x01 /* Inexact exception. */
/* Masks for the info word of an ODK_PAD descriptor. */
#define OPAD_PREFIX 0x01
#define OPAD_POSTFIX 0x02
#define OPAD_SYMBOL 0x04
/* Masks for the info word of an ODK_HWPATCH descriptor. */
#define OHW_R4KEOP 0x00000001 /* R4000 end-of-page patch. */
#define OHW_R8KPFETCH 0x00000002 /* May need R8000 prefetch patch. */
#define OHW_R5KEOP 0x00000004 /* R5000 end-of-page patch. */
#define OHW_R5KCVTL 0x00000008 /* R5000 cvt.[ds].l bug
(clean == 1). */
#define OHW_R10KLDL 0x00000010 /* Needs R10K misaligned
load patch. */
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/* Masks for the info word of an ODK_IDENT/ODK_GP_GROUP descriptor. */
#define OGP_GROUP 0x0000ffff /* GP group number. */
#define OGP_SELF 0xffff0000 /* Self-contained GP groups. */
/* Masks for the info word of an ODK_HWAND/ODK_HWOR descriptor. */
#define OHWA0_R4KEOP_CHECKED 0x00000001
#define OHWA0_R4KEOP_CLEAN 0x00000002
#endif /* _ELF_MIPS_H */