301 lines
8.3 KiB
C
301 lines
8.3 KiB
C
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/*
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* cma101.c -- lo-level support for Cogent CMA101 development board.
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*
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* Copyright (c) 1996 Cygnus Support
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*
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* The authors hereby grant permission to use, copy, modify, distribute,
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* and license this software and its documentation for any purpose, provided
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* that existing copyright notices are retained in all copies and that this
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* notice is included verbatim in any distributions. No written agreement,
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* license, or royalty fee is required for any of the authorized uses.
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* Modifications to this software may be copyrighted by their authors
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* and need not follow the licensing terms described here, provided that
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* the new terms are clearly indicated on the first page of each file where
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* they apply.
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*/
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#ifdef __mips16
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/* The assembler portions of this file need to be re-written to
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support mips16, if and when that seems useful.
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*/
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#error cma101.c can not be compiled -mips16
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#endif
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#include <time.h> /* standard ANSI time routines */
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/* Normally these would appear in a header file for external
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use. However, we are only building a simple example world at the
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moment: */
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#include "regs.S"
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#if defined(MIPSEB)
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#define BYTEREG(b,o) ((volatile unsigned char *)(PHYS_TO_K1((b) + (o) + 7)))
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#endif /* MIPSEB */
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#if defined(MIPSEL)
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#define BYTEREG(b,o) ((volatile unsigned char *)(PHYS_TO_K1((b) + (o))))
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#endif /* MIPSEL */
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/* I/O addresses: */
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#define RTCLOCK_BASE (0x0E800000) /* Mk48T02 NVRAM/RTC */
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#define UART_BASE (0x0E900000) /* NS16C552 DUART */
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#define LCD_BASE (0x0EB00000) /* Alphanumeric display */
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/* LCD panel manifests: */
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#define LCD_DATA BYTEREG(LCD_BASE,0)
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#define LCD_CMD BYTEREG(LCD_BASE,8)
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#define LCD_STAT_BUSY (0x80)
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#define LCD_SET_DDADDR (0x80)
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/* RTC manifests */
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/* The lo-offsets are the NVRAM locations (0x7F8 bytes) */
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#define RTC_CONTROL BYTEREG(RTCLOCK_BASE,0x3FC0)
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#define RTC_SECS BYTEREG(RTCLOCK_BASE,0x3FC8)
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#define RTC_MINS BYTEREG(RTCLOCK_BASE,0x3FD0)
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#define RTC_HOURS BYTEREG(RTCLOCK_BASE,0x3FD8)
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#define RTC_DAY BYTEREG(RTCLOCK_BASE,0x3FE0)
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#define RTC_DATE BYTEREG(RTCLOCK_BASE,0x3FE8)
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#define RTC_MONTH BYTEREG(RTCLOCK_BASE,0x3FF0)
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#define RTC_YEAR BYTEREG(RTCLOCK_BASE,0x3FF8)
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#define RTC_CTL_LOCK_READ (0x40) /* lock RTC whilst reading */
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#define RTC_CTL_LOCK_WRITE (0x80) /* lock RTC whilst writing */
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/* Macro to force out-standing memory transfers to complete before
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next sequence. For the moment we assume that the processor in the
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CMA101 board supports at least ISA II. */
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#define DOSYNC() asm(" .set mips2 ; sync ; .set mips0")
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/* We disable interrupts by writing zero to all of the masks, and the
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global interrupt enable bit: */
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#define INTDISABLE(sr,tmp) asm("\
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.set mips2 ; \
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mfc0 %0,$12 ; \
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lui %1,0xffff ; \
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ori %1,%1,0xfffe ; \
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and %1, %0, %1 ; \
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mtc0 %1,$12 ; \
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.set mips0" : "=d" (sr), "=d" (tmp))
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#define INTRESTORE(sr) asm("\
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.set mips2 ; \
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mtc0 %0,$12 ; \
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.set mips0" : : "d" (sr))
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/* TODO:FIXME: The CPU card support should be in separate source file
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from the standard CMA101 support provided in this file. */
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/* The CMA101 board being used contains a CMA257 Vr4300 CPU:
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MasterClock is at 33MHz. PClock is derived from MasterClock by
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multiplying by the ratio defined by the DivMode pins:
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DivMode(1:0) MasterClock PClock Ratio
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00 100MHz 100MHz 1:1
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01 100MHz 150MHz 1.5:1
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10 100MHz 200MHz 2:1
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11 100Mhz 300MHz 3:1
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Are these pins reflected in the EC bits in the CONFIG register? or
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is that talking about a different clock multiplier?
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110 = 1
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111 = 1.5
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000 = 2
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001 = 3
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(all other values are undefined)
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*/
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#define MASTERCLOCK (33) /* ticks per uS */
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unsigned int pclock; /* number of PClock ticks per uS */
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void
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set_pclock (void)
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{
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unsigned int config;
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asm volatile ("mfc0 %0,$16 ; nop ; nop" : "=r" (config)); /* nasty CP0 register constant */
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switch ((config >> 28) & 0x7) {
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case 0x7 : /* 1.5:1 */
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pclock = (MASTERCLOCK + (MASTERCLOCK / 2));
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break;
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case 0x0 : /* 2:1 */
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pclock = (2 * MASTERCLOCK);
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break;
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case 0x1 : /* 3:1 */
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pclock = (3 * MASTERCLOCK);
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break;
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case 0x6 : /* 1:1 */
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default : /* invalid configuration, so assume the lowest */
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pclock = MASTERCLOCK;
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break;
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}
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return;
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}
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#define PCLOCK_WAIT(x) __cpu_timer_poll((x) * pclock)
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/* NOTE: On the Cogent CMA101 board the LCD controller will sometimes
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return not-busy, even though it is. The work-around is to perform a
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~50uS delay before checking the busy signal. */
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static int
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lcd_busy (void)
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{
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PCLOCK_WAIT(50); /* 50uS delay */
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return(*LCD_CMD & LCD_STAT_BUSY);
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}
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/* Note: This code *ASSUMES* that the LCD has already been initialised
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by the monitor. It only provides code to write to the LCD, and is
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not a complete device driver. */
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void
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lcd_display (int line, const char *msg)
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{
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int n;
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if (lcd_busy ())
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return;
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*LCD_CMD = (LCD_SET_DDADDR | (line == 1 ? 0x40 : 0x00));
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for (n = 0; n < 16; n++) {
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if (lcd_busy ())
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return;
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if (*msg)
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*LCD_DATA = *msg++;
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else
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*LCD_DATA = ' ';
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}
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return;
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}
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#define SM_PATTERN (0x55AA55AA)
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#define SM_INCR ((256 << 10) / sizeof(unsigned int)) /* 64K words */
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extern unsigned int __buserr_count(void);
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extern void __default_buserr_handler(void);
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extern void __restore_buserr_handler(void);
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unsigned int
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__sizemem ()
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{
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volatile unsigned int *base;
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volatile unsigned int *probe;
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unsigned int baseorig;
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unsigned int sr;
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extern void *end;
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int extra;
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INTDISABLE(sr,baseorig); /* disable all interrupt masks */
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__default_buserr_handler();
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__cpu_flush();
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DOSYNC();
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/* _end is the end of the user program. _end may not be properly aligned
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for an int pointer, so we adjust the address to make sure it is safe.
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We use void * arithmetic to avoid accidentally truncating the pointer. */
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extra = ((int) &end & (sizeof (int) - 1));
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base = ((void *) &end + sizeof (int) - extra);
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baseorig = *base;
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*base = SM_PATTERN;
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/* This assumes that the instructions fetched between the store, and
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the following read will have changed the data bus contents: */
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if (*base == SM_PATTERN) {
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probe = base;
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for (;;) {
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unsigned int probeorig;
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probe += SM_INCR;
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probeorig = *probe;
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/* Check if a bus error occurred: */
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if (!__buserr_count()) {
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*probe = SM_PATTERN;
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DOSYNC();
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if (*probe == SM_PATTERN) {
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*probe = ~SM_PATTERN;
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DOSYNC();
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if (*probe == ~SM_PATTERN) {
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if (*base == SM_PATTERN) {
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*probe = probeorig;
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continue;
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}
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}
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}
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*probe = probeorig;
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}
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break;
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}
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}
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*base = baseorig;
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__restore_buserr_handler();
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__cpu_flush();
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DOSYNC();
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INTRESTORE(sr); /* restore interrupt mask to entry state */
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return((probe - base) * sizeof(unsigned int));
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}
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/* Provided as a function, so as to avoid reading the I/O location
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multiple times: */
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static int
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convertbcd(byte)
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unsigned char byte;
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{
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return ((((byte >> 4) & 0xF) * 10) + (byte & 0xF));
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}
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time_t
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time (_timer)
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time_t *_timer;
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{
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time_t result = 0;
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struct tm tm;
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*RTC_CONTROL |= RTC_CTL_LOCK_READ;
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DOSYNC();
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tm.tm_sec = convertbcd(*RTC_SECS);
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tm.tm_min = convertbcd(*RTC_MINS);
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tm.tm_hour = convertbcd(*RTC_HOURS);
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tm.tm_mday = convertbcd(*RTC_DATE);
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tm.tm_mon = convertbcd(*RTC_MONTH);
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tm.tm_year = convertbcd(*RTC_YEAR);
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DOSYNC();
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*RTC_CONTROL &= ~(RTC_CTL_LOCK_READ | RTC_CTL_LOCK_WRITE);
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tm.tm_isdst = 0;
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/* Check for invalid time information */
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if ((tm.tm_sec < 60) && (tm.tm_min < 60) && (tm.tm_hour < 24)
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&& (tm.tm_mday < 32) && (tm.tm_mon < 13)) {
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/* Get the correct year number, but keep it in YEAR-1900 form: */
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if (tm.tm_year < 70)
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tm.tm_year += 100;
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#if 0 /* NOTE: mon_printf() can only accept 4 arguments (format string + 3 fields) */
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mon_printf("[DBG: s=%d m=%d h=%d]", tm.tm_sec, tm.tm_min, tm.tm_hour);
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mon_printf("[DBG: d=%d m=%d y=%d]", tm.tm_mday, tm.tm_mon, tm.tm_year);
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#endif
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/* Convert the time-structure into a second count */
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result = mktime (&tm);
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}
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if (_timer != NULL)
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*_timer = result;
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return (result);
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}
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/*> EOF cma101.c <*/
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