newlib-cygwin/include/elf/sh.h

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1999-05-03 15:29:06 +08:00
/* SH ELF support for BFD.
include/elf/ChangeLog * sh.h: Split out various bits to bfd/elf32-sh64.h. include/opcode/ChangeLog * m68hc11.h (cpu6812s): Define. bfd/ChangeLog * elf-bfd.h (struct bfd_elf_section_data): Remove tdata. Change dynindx to an int. Rearrange for better packing. * elf.c (_bfd_elf_new_section_hook): Don't alloc if already done. * elf32-mips.c (bfd_elf32_new_section_hook): Define. * elf32-sh64.h: New. Split out from include/elf/sh.h. (struct _sh64_elf_section_data): New struct. (sh64_elf_section_data): Don't dereference sh64_info (was tdata). * elf32-sh64-com.c: Include elf32-sh64.h. * elf32-sh64.c: Likewise. (sh64_elf_new_section_hook): New function. (bfd_elf32_new_section_hook): Define. (sh64_elf_fake_sections): Adjust for sh64_elf_section_data change. (sh64_bfd_elf_copy_private_section_data): Likewise. (sh64_elf_final_write_processing): Likewise. * elf32-sparc.c (struct elf32_sparc_section_data): New. (elf32_sparc_new_section_hook): New function. (SET_SEC_DO_RELAX, SEC_DO_RELAX): Delete. (sec_do_relax): Define. (elf32_sparc_relax_section): Adjust to use sec_do_relax. (elf32_sparc_relocate_section): Likewise. * elf64-mips.c (bfd_elf64_new_section_hook): Define. * elf64-mmix.c (struct _mmix_elf_section_data): New. (mmix_elf_section_data): Define. Use throughout file. (mmix_elf_new_section_hook): New function. (bfd_elf64_new_section_hook): Define. * elf64-ppc.c (struct _ppc64_elf_section_data): New. (ppc64_elf_section_data): Define. Use throughout. (ppc64_elf_new_section_hook): New function. (bfd_elf64_new_section_hook): Define. * elf64-sparc.c (struct sparc64_elf_section_data): New. (sparc64_elf_new_section_hook): New function. (SET_SEC_DO_RELAX, SEC_DO_RELAX): Delete. (sec_do_relax): Define. (sparc64_elf_relax_section): Adjust to use sec_do_relax. (sparc64_elf_relocate_section): Likewise. (bfd_elf64_new_section_hook): Define. * elfn32-mips.c (bfd_elf32_new_section_hook): Define. * elfxx-mips.c (struct _mips_elf_section_data): New. (mips_elf_section_data): Define. Use throughout. (_bfd_mips_elf_new_section_hook): New function. (mips_elf_create_got_section): Don't alloc used_by_bfd. * elfxx-mips.h (_bfd_mips_elf_new_section_hook): Declare. * elfxx-target.h (bfd_elfNN_new_section_hook): Add #ifndef. * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. opcodes/ChangeLog * sh64-dis.c: Include elf32-sh64.h. * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. gas/ChangeLog * config/tc-sh64.c (shmedia_frob_section_type): Adjust for changed sh64_elf_section_data. * config/tc-sh64.h: Include elf32-sh64.h. * config/tc-m68hc11.c: Don't include stdio.h. (md_show_usage): Fix missing continuation. * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. ld/ChangeLog * emultempl/sh64elf.em: Include elf32-sh64.h. (sh64_elf_${EMULATION_NAME}_before_allocation): Adjust for changed sh64_elf_section_data. (sh64_elf_${EMULATION_NAME}_after_allocation): Likewise.
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Copyright 1998, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
1999-05-03 15:29:06 +08:00
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software Foundation,
Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#ifndef _ELF_SH_H
#define _ELF_SH_H
bfd: Reinstate bits of sh4 support that got accidentally deleted. Add sh-dsp support. bfd: * archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros. (bfd_mach_sh3_dsp): Likewise. (bfd_mach_sh4): Reinstate. (bfd_default_scan): Recognize 7410, 7708, 7729 and 7750. * bfd-in2.h: Regenerate. * coff-sh.c (struct sh_opcode): flags is no longer short. (USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros. (sh_opcode41, sh_opcode42): Integrate as sh_opcode41. (sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes. (sh_opcode41, sh_opcode4, sh_opcode80): Likewise. (sh_opcodes): No longer const. (sh_dsp_opcodef0, sh_dsp_opcodef): New arrays. (sh_insn_uses_reg): Check for USESAS and USESR8. (sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS. (_bfd_sh_align_load_span): Return early for SH4. Modify sh_opcodes lookup table for sh-dsp / sh3-dsp. Take into account that field b of a parallel processing insn could be mistaken for a separate insn. * cpu-sh.c (arch_info_struct): New array elements for sh2, sh-dsp and sh3-dsp. Reinstate element for sh4. (SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros. (SH4_NEXT): Reinstate. (SH3_NEXT, SH3E_NEXT): Adjust. * elf-bfd.h (_sh_elf_set_mach_from_flags): Declare. * elf32-sh.c (sh_elf_set_private_flags): New function. (sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise. (sh_elf_merge_private_data): New function. (elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define. (bfd_elf32_bfd_copy_private_bfd_data): Define. (bfd_elf32_bfd_merge_private_bfd_data): Change to sh_elf_merge_private_data. gas: * config/tc-sh.c ("elf/sh.h"): Include. (sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables. (md.begin): Initialize target_arch. Only include opcodes in has table that match selected architecture. (parse_reg): Recognize register names for sh-dsp. (parse_at): Recognize post-modify addressing. (get_operands): The leading space is now optional. (get_specific): Remove FDREG_N support. Add support for sh-dsp arguments. Update valid_arch. (build_Mytes): Add support for SDT_REG_N. (find_cooked_opcode): New function, broken out of md_assemble. (assemble_ppi, sh_elf_final_processing): New functions. (md_assemble): Use find_cooked_opcode and assemble_ppi. (md_longopts, md_parse_option): New option: -dsp. * config/tc-sh.h (elf_tc_final_processing): Define. (sh_elf_final_processing): Declare. include/elf: * sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros. (EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise. (EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise. opcodes: * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions. (print_insn_ppi): Likewise. (print_insn_shx): Use info->mach to select appropriate insn set. Add support for sh-dsp. Remove FD_REG_N support. * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support. (sh_arg_type): Likewise. Remove FD_REG_N. (sh_dsp_reg_nums): New enum. (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros. (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise. (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise. (arch_sh3_dsp_up): Likewise. (sh_opcode_info): New field: arch. (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and D_REG_N. Fill in arch field. Add sh-dsp insns.
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/* Processor specific flags for the ELF header e_flags field. */
#define EF_SH_MACH_MASK 0x1f
#define EF_SH_UNKNOWN 0 /* For backwards compatibility. */
#define EF_SH1 1
#define EF_SH2 2
#define EF_SH3 3
#define EF_SH_HAS_DSP(flags) (((flags) & EF_SH_MACH_MASK & ~3) == 4)
bfd: Reinstate bits of sh4 support that got accidentally deleted. Add sh-dsp support. bfd: * archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros. (bfd_mach_sh3_dsp): Likewise. (bfd_mach_sh4): Reinstate. (bfd_default_scan): Recognize 7410, 7708, 7729 and 7750. * bfd-in2.h: Regenerate. * coff-sh.c (struct sh_opcode): flags is no longer short. (USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros. (sh_opcode41, sh_opcode42): Integrate as sh_opcode41. (sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes. (sh_opcode41, sh_opcode4, sh_opcode80): Likewise. (sh_opcodes): No longer const. (sh_dsp_opcodef0, sh_dsp_opcodef): New arrays. (sh_insn_uses_reg): Check for USESAS and USESR8. (sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS. (_bfd_sh_align_load_span): Return early for SH4. Modify sh_opcodes lookup table for sh-dsp / sh3-dsp. Take into account that field b of a parallel processing insn could be mistaken for a separate insn. * cpu-sh.c (arch_info_struct): New array elements for sh2, sh-dsp and sh3-dsp. Reinstate element for sh4. (SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros. (SH4_NEXT): Reinstate. (SH3_NEXT, SH3E_NEXT): Adjust. * elf-bfd.h (_sh_elf_set_mach_from_flags): Declare. * elf32-sh.c (sh_elf_set_private_flags): New function. (sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise. (sh_elf_merge_private_data): New function. (elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define. (bfd_elf32_bfd_copy_private_bfd_data): Define. (bfd_elf32_bfd_merge_private_bfd_data): Change to sh_elf_merge_private_data. gas: * config/tc-sh.c ("elf/sh.h"): Include. (sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables. (md.begin): Initialize target_arch. Only include opcodes in has table that match selected architecture. (parse_reg): Recognize register names for sh-dsp. (parse_at): Recognize post-modify addressing. (get_operands): The leading space is now optional. (get_specific): Remove FDREG_N support. Add support for sh-dsp arguments. Update valid_arch. (build_Mytes): Add support for SDT_REG_N. (find_cooked_opcode): New function, broken out of md_assemble. (assemble_ppi, sh_elf_final_processing): New functions. (md_assemble): Use find_cooked_opcode and assemble_ppi. (md_longopts, md_parse_option): New option: -dsp. * config/tc-sh.h (elf_tc_final_processing): Define. (sh_elf_final_processing): Declare. include/elf: * sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros. (EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise. (EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise. opcodes: * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions. (print_insn_ppi): Likewise. (print_insn_shx): Use info->mach to select appropriate insn set. Add support for sh-dsp. Remove FD_REG_N support. * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support. (sh_arg_type): Likewise. Remove FD_REG_N. (sh_dsp_reg_nums): New enum. (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros. (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise. (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise. (arch_sh3_dsp_up): Likewise. (sh_opcode_info): New field: arch. (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and D_REG_N. Fill in arch field. Add sh-dsp insns.
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#define EF_SH_DSP 4
#define EF_SH3_DSP 5
#define EF_SH4AL_DSP 6
bfd: Reinstate bits of sh4 support that got accidentally deleted. Add sh-dsp support. bfd: * archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros. (bfd_mach_sh3_dsp): Likewise. (bfd_mach_sh4): Reinstate. (bfd_default_scan): Recognize 7410, 7708, 7729 and 7750. * bfd-in2.h: Regenerate. * coff-sh.c (struct sh_opcode): flags is no longer short. (USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros. (sh_opcode41, sh_opcode42): Integrate as sh_opcode41. (sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes. (sh_opcode41, sh_opcode4, sh_opcode80): Likewise. (sh_opcodes): No longer const. (sh_dsp_opcodef0, sh_dsp_opcodef): New arrays. (sh_insn_uses_reg): Check for USESAS and USESR8. (sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS. (_bfd_sh_align_load_span): Return early for SH4. Modify sh_opcodes lookup table for sh-dsp / sh3-dsp. Take into account that field b of a parallel processing insn could be mistaken for a separate insn. * cpu-sh.c (arch_info_struct): New array elements for sh2, sh-dsp and sh3-dsp. Reinstate element for sh4. (SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros. (SH4_NEXT): Reinstate. (SH3_NEXT, SH3E_NEXT): Adjust. * elf-bfd.h (_sh_elf_set_mach_from_flags): Declare. * elf32-sh.c (sh_elf_set_private_flags): New function. (sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise. (sh_elf_merge_private_data): New function. (elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define. (bfd_elf32_bfd_copy_private_bfd_data): Define. (bfd_elf32_bfd_merge_private_bfd_data): Change to sh_elf_merge_private_data. gas: * config/tc-sh.c ("elf/sh.h"): Include. (sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables. (md.begin): Initialize target_arch. Only include opcodes in has table that match selected architecture. (parse_reg): Recognize register names for sh-dsp. (parse_at): Recognize post-modify addressing. (get_operands): The leading space is now optional. (get_specific): Remove FDREG_N support. Add support for sh-dsp arguments. Update valid_arch. (build_Mytes): Add support for SDT_REG_N. (find_cooked_opcode): New function, broken out of md_assemble. (assemble_ppi, sh_elf_final_processing): New functions. (md_assemble): Use find_cooked_opcode and assemble_ppi. (md_longopts, md_parse_option): New option: -dsp. * config/tc-sh.h (elf_tc_final_processing): Define. (sh_elf_final_processing): Declare. include/elf: * sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros. (EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise. (EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise. opcodes: * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions. (print_insn_ppi): Likewise. (print_insn_shx): Use info->mach to select appropriate insn set. Add support for sh-dsp. Remove FD_REG_N support. * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support. (sh_arg_type): Likewise. Remove FD_REG_N. (sh_dsp_reg_nums): New enum. (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros. (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise. (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise. (arch_sh3_dsp_up): Likewise. (sh_opcode_info): New field: arch. (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and D_REG_N. Fill in arch field. Add sh-dsp insns.
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#define EF_SH_HAS_FP(flags) ((flags) & 8)
#define EF_SH3E 8
#define EF_SH4 9
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#define EF_SH2E 11
#define EF_SH4A 12
#define EF_SH4_NOFPU 0x10
#define EF_SH4A_NOFPU 0x11
bfd: Reinstate bits of sh4 support that got accidentally deleted. Add sh-dsp support. bfd: * archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros. (bfd_mach_sh3_dsp): Likewise. (bfd_mach_sh4): Reinstate. (bfd_default_scan): Recognize 7410, 7708, 7729 and 7750. * bfd-in2.h: Regenerate. * coff-sh.c (struct sh_opcode): flags is no longer short. (USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros. (sh_opcode41, sh_opcode42): Integrate as sh_opcode41. (sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes. (sh_opcode41, sh_opcode4, sh_opcode80): Likewise. (sh_opcodes): No longer const. (sh_dsp_opcodef0, sh_dsp_opcodef): New arrays. (sh_insn_uses_reg): Check for USESAS and USESR8. (sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS. (_bfd_sh_align_load_span): Return early for SH4. Modify sh_opcodes lookup table for sh-dsp / sh3-dsp. Take into account that field b of a parallel processing insn could be mistaken for a separate insn. * cpu-sh.c (arch_info_struct): New array elements for sh2, sh-dsp and sh3-dsp. Reinstate element for sh4. (SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros. (SH4_NEXT): Reinstate. (SH3_NEXT, SH3E_NEXT): Adjust. * elf-bfd.h (_sh_elf_set_mach_from_flags): Declare. * elf32-sh.c (sh_elf_set_private_flags): New function. (sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise. (sh_elf_merge_private_data): New function. (elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define. (bfd_elf32_bfd_copy_private_bfd_data): Define. (bfd_elf32_bfd_merge_private_bfd_data): Change to sh_elf_merge_private_data. gas: * config/tc-sh.c ("elf/sh.h"): Include. (sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables. (md.begin): Initialize target_arch. Only include opcodes in has table that match selected architecture. (parse_reg): Recognize register names for sh-dsp. (parse_at): Recognize post-modify addressing. (get_operands): The leading space is now optional. (get_specific): Remove FDREG_N support. Add support for sh-dsp arguments. Update valid_arch. (build_Mytes): Add support for SDT_REG_N. (find_cooked_opcode): New function, broken out of md_assemble. (assemble_ppi, sh_elf_final_processing): New functions. (md_assemble): Use find_cooked_opcode and assemble_ppi. (md_longopts, md_parse_option): New option: -dsp. * config/tc-sh.h (elf_tc_final_processing): Define. (sh_elf_final_processing): Declare. include/elf: * sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros. (EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise. (EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise. opcodes: * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions. (print_insn_ppi): Likewise. (print_insn_shx): Use info->mach to select appropriate insn set. Add support for sh-dsp. Remove FD_REG_N support. * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support. (sh_arg_type): Likewise. Remove FD_REG_N. (sh_dsp_reg_nums): New enum. (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros. (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise. (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise. (arch_sh3_dsp_up): Likewise. (sh_opcode_info): New field: arch. (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and D_REG_N. Fill in arch field. Add sh-dsp insns.
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Contribute sh64-elf. 2002-01-23 Alexandre Oliva <aoliva@redhat.com> * sh.h (R_SH_GOTPLT32, R_SH_GOT_LOW16, R_SH_GOT_MEDLOW16, R_SH_GOT_MEDHI16, R_SH_GOT_HI16, R_SH_GOTPLT_LOW16, R_SH_GOTPLT_MEDLOW16, R_SH_GOTPLT_MEDHI16, R_SH_GOTPLT_HI16, R_SH_PLT_LOW16, R_SH_PLT_MEDLOW16, R_SH_PLT_MEDHI16, R_SH_PLT_HI16, R_SH_GOTOFF_LOW16, R_SH_GOTOFF_MEDLOW16, R_SH_GOTOFF_MEDHI16, R_SH_GOTOFF_HI16, R_SH_GOTPC_LOW16, R_SH_GOTPC_MEDLOW16, R_SH_GOTPC_MEDHI16, R_SH_GOTPC_HI16, R_SH_GOT10BY4, R_SH_GOTPLT10BY4, R_SH_GOT10BY8, R_SH_GOTPLT10BY8, R_SH_COPY64, R_SH_GLOB_DAT64, R_SH_JMP_SLOT64, R_SH_RELATIVE64): New relocs. (R_SH_FIRST_INVALID_RELOC_4): Adjust. 2001-05-16 Alexandre Oliva <aoliva@redhat.com> * sh.h: Renumbered and renamed some SH5 relocations to match official numbers and names; moved unmaching ones to the range 0xf2-0xff. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (sh64_get_contents_type): Declare. (sh64_address_is_shmedia): Likewise. 2000-12-30 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (sh64_elf_crange): New type. (struct sh64_section_data): New. (sh64_elf_section_data): New macro. (EF_SH5): Rename back from EF_SH64. 2000-12-18 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (SHF_SH5_ISA32_MIXED, SHT_SH5_CR_SORTED, SH64_CRANGES_SECTION_NAME, SH64_CRANGE_SIZE, SH64_CRANGE_CR_ADDR_OFFSET, SH64_CRANGE_CR_SIZE_OFFSET, SH64_CRANGE_CR_TYPE_OFFSET): New macros. 2000-12-12 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (EF_SH64): Don't define EF_SH64_ABI64. 2000-11-27 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (EF_SH64_32BIT_ABI, EF_SH64_64BIT_ABI): Delete. (EF_SH64_ABI64): New. 2000-11-23 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (EF_SH64): Rename from EF_SH5. (EF_SH64_32BIT_ABI): New. (EF_SH64_64BIT_ABI): New. (R_SH_PT_16, R_SH_SHMEDIA_CODE R_SH_IMMU5, R_SH_IMMS6, R_SH_IMMU6, R_SH_IMMS10, R_SH_IMMS10BY2, R_SH_IMMS10BY4, R_SH_IMMS10BY8, R_SH_IMMS16, R_SH_IMMU16, R_SH_IMM_LOW16, R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16, R_SH_IMM_HI16_PCREL, R_SH_64, R_SH_64_PCREL): New relocs. 2000-09-01 Ben Elliston <bje@redhat.com> * sh.h (EF_SH5): Define.
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/* This one can only mix in objects from other EF_SH5 objects. */
#define EF_SH5 10
bfd: Reinstate bits of sh4 support that got accidentally deleted. Add sh-dsp support. bfd: * archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros. (bfd_mach_sh3_dsp): Likewise. (bfd_mach_sh4): Reinstate. (bfd_default_scan): Recognize 7410, 7708, 7729 and 7750. * bfd-in2.h: Regenerate. * coff-sh.c (struct sh_opcode): flags is no longer short. (USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros. (sh_opcode41, sh_opcode42): Integrate as sh_opcode41. (sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes. (sh_opcode41, sh_opcode4, sh_opcode80): Likewise. (sh_opcodes): No longer const. (sh_dsp_opcodef0, sh_dsp_opcodef): New arrays. (sh_insn_uses_reg): Check for USESAS and USESR8. (sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS. (_bfd_sh_align_load_span): Return early for SH4. Modify sh_opcodes lookup table for sh-dsp / sh3-dsp. Take into account that field b of a parallel processing insn could be mistaken for a separate insn. * cpu-sh.c (arch_info_struct): New array elements for sh2, sh-dsp and sh3-dsp. Reinstate element for sh4. (SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros. (SH4_NEXT): Reinstate. (SH3_NEXT, SH3E_NEXT): Adjust. * elf-bfd.h (_sh_elf_set_mach_from_flags): Declare. * elf32-sh.c (sh_elf_set_private_flags): New function. (sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise. (sh_elf_merge_private_data): New function. (elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define. (bfd_elf32_bfd_copy_private_bfd_data): Define. (bfd_elf32_bfd_merge_private_bfd_data): Change to sh_elf_merge_private_data. gas: * config/tc-sh.c ("elf/sh.h"): Include. (sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables. (md.begin): Initialize target_arch. Only include opcodes in has table that match selected architecture. (parse_reg): Recognize register names for sh-dsp. (parse_at): Recognize post-modify addressing. (get_operands): The leading space is now optional. (get_specific): Remove FDREG_N support. Add support for sh-dsp arguments. Update valid_arch. (build_Mytes): Add support for SDT_REG_N. (find_cooked_opcode): New function, broken out of md_assemble. (assemble_ppi, sh_elf_final_processing): New functions. (md_assemble): Use find_cooked_opcode and assemble_ppi. (md_longopts, md_parse_option): New option: -dsp. * config/tc-sh.h (elf_tc_final_processing): Define. (sh_elf_final_processing): Declare. include/elf: * sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros. (EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise. (EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise. opcodes: * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions. (print_insn_ppi): Likewise. (print_insn_shx): Use info->mach to select appropriate insn set. Add support for sh-dsp. Remove FD_REG_N support. * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support. (sh_arg_type): Likewise. Remove FD_REG_N. (sh_dsp_reg_nums): New enum. (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros. (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise. (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise. (arch_sh3_dsp_up): Likewise. (sh_opcode_info): New field: arch. (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and D_REG_N. Fill in arch field. Add sh-dsp insns.
2000-02-17 08:33:35 +08:00
#define EF_SH_MERGE_MACH(mach1, mach2) \
(((((mach1) == EF_SH3 || (mach1) == EF_SH_UNKNOWN) && (mach2) == EF_SH_DSP) \
|| ((mach1) == EF_SH_DSP \
&& ((mach2) == EF_SH3 || (mach2) == EF_SH_UNKNOWN))) \
? EF_SH3_DSP \
: (((mach1) < EF_SH3 && (mach2) == EF_SH_UNKNOWN) \
|| ((mach2) < EF_SH3 && (mach1) == EF_SH_UNKNOWN)) \
? EF_SH3 \
2003-01-24 02:50:57 +08:00
: ((mach1) == EF_SH2E && EF_SH_HAS_FP (mach2)) \
? (mach2) \
: ((mach2) == EF_SH2E && EF_SH_HAS_FP (mach1)) \
? (mach1) \
: (((mach1) == EF_SH2E && (mach2) == EF_SH_UNKNOWN) \
|| ((mach2) == EF_SH2E && (mach1) == EF_SH_UNKNOWN)) \
? EF_SH2E \
bfd: Reinstate bits of sh4 support that got accidentally deleted. Add sh-dsp support. bfd: * archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros. (bfd_mach_sh3_dsp): Likewise. (bfd_mach_sh4): Reinstate. (bfd_default_scan): Recognize 7410, 7708, 7729 and 7750. * bfd-in2.h: Regenerate. * coff-sh.c (struct sh_opcode): flags is no longer short. (USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros. (sh_opcode41, sh_opcode42): Integrate as sh_opcode41. (sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes. (sh_opcode41, sh_opcode4, sh_opcode80): Likewise. (sh_opcodes): No longer const. (sh_dsp_opcodef0, sh_dsp_opcodef): New arrays. (sh_insn_uses_reg): Check for USESAS and USESR8. (sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS. (_bfd_sh_align_load_span): Return early for SH4. Modify sh_opcodes lookup table for sh-dsp / sh3-dsp. Take into account that field b of a parallel processing insn could be mistaken for a separate insn. * cpu-sh.c (arch_info_struct): New array elements for sh2, sh-dsp and sh3-dsp. Reinstate element for sh4. (SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros. (SH4_NEXT): Reinstate. (SH3_NEXT, SH3E_NEXT): Adjust. * elf-bfd.h (_sh_elf_set_mach_from_flags): Declare. * elf32-sh.c (sh_elf_set_private_flags): New function. (sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise. (sh_elf_merge_private_data): New function. (elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define. (bfd_elf32_bfd_copy_private_bfd_data): Define. (bfd_elf32_bfd_merge_private_bfd_data): Change to sh_elf_merge_private_data. gas: * config/tc-sh.c ("elf/sh.h"): Include. (sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables. (md.begin): Initialize target_arch. Only include opcodes in has table that match selected architecture. (parse_reg): Recognize register names for sh-dsp. (parse_at): Recognize post-modify addressing. (get_operands): The leading space is now optional. (get_specific): Remove FDREG_N support. Add support for sh-dsp arguments. Update valid_arch. (build_Mytes): Add support for SDT_REG_N. (find_cooked_opcode): New function, broken out of md_assemble. (assemble_ppi, sh_elf_final_processing): New functions. (md_assemble): Use find_cooked_opcode and assemble_ppi. (md_longopts, md_parse_option): New option: -dsp. * config/tc-sh.h (elf_tc_final_processing): Define. (sh_elf_final_processing): Declare. include/elf: * sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros. (EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise. (EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise. opcodes: * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions. (print_insn_ppi): Likewise. (print_insn_shx): Use info->mach to select appropriate insn set. Add support for sh-dsp. Remove FD_REG_N support. * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support. (sh_arg_type): Likewise. Remove FD_REG_N. (sh_dsp_reg_nums): New enum. (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros. (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise. (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise. (arch_sh3_dsp_up): Likewise. (sh_opcode_info): New field: arch. (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and D_REG_N. Fill in arch field. Add sh-dsp insns.
2000-02-17 08:33:35 +08:00
: (((mach1) == EF_SH3E && (mach2) == EF_SH_UNKNOWN) \
|| ((mach2) == EF_SH3E && (mach1) == EF_SH_UNKNOWN)) \
? EF_SH4 \
/* ??? SH4? Why not SH3E? */ \
: ((((mach1) == EF_SH4_NOFPU || (mach1) == EF_SH4A_NOFPU) \
&& EF_SH_HAS_DSP (mach2)) \
|| (((mach2) == EF_SH4_NOFPU || (mach2) == EF_SH4A_NOFPU) \
&& EF_SH_HAS_DSP (mach1))) \
? EF_SH4AL_DSP \
: ((mach1) == EF_SH4_NOFPU && EF_SH_HAS_FP (mach2)) \
? ((mach2) < EF_SH4A) ? EF_SH4 : (mach2) \
: ((mach2) == EF_SH4_NOFPU && EF_SH_HAS_FP (mach1)) \
? ((mach1) < EF_SH4A) ? EF_SH4 : (mach1) \
: ((mach1) == EF_SH4A_NOFPU && EF_SH_HAS_FP (mach2)) \
? ((mach2) <= EF_SH4A) ? EF_SH4A : (mach2) \
: ((mach2) == EF_SH4A_NOFPU && EF_SH_HAS_FP (mach1)) \
? ((mach1) <= EF_SH4A) ? EF_SH4A : (mach1) \
Fix sh-elf linker relaxation: gcc: * config/sh/sh.h (EXTRA_SPECS): Add subtarget_asm_relax_spec and subtarget_asm_isa_spec. (SUBTARGET_ASM_RELAX_SPEC, SUBTARGET_ASM_ISA_SPEC): Define. (ASM_SPEC): Define as SH_ASM_SPEC. (SH_ASM_SPEC): New; take the role of ASM_SPEC, but safe from svr4.h. Use subtarget_asm_relax_spec and subtarget_asm_isa_spec. * config/sh/elf.h (ASM_SPEC): Use SH_ASM_SPEC. (SUBTARGET_ASM_ISA_SPEC): Undef / define. gcc/testsuite: gcc.dg/sh-relax.c: New test. include/elf: * sh.h (EF_SH_MERGE_MACH): Make sure SH2E & SH3/SH3E merge to SH3E, and SH2E & SH4 merge to SH4, not SH2E. gas: * config/tc-sh.c (sh_dsp): Replace with preset_target_arch. (md_begin): Use preset_target_arch. (md_longopts): Make isa option unconditional. (md_parse_option): Make OPTION_DSP and OPTION_ISA sh4 / any set preset_target_arch. (md_apply_fix3): If BFD_ASSEMBLER, adjust SWITCH_TABLE fixups by -S_GET_VALUE (fixP->fx_subsy). (tc_gen_reloc): For SWITCH_TABLE fixups, the symbol is fixp->fx_subsy, and the addend is 0. Adjust addend of R_SH_IND12W relocations by fixp->fx_offset - 4. * config/tc-sh.h (TC_FORCE_RELOCATION_SUB_LOCAL): Define. bfd: elf32-sh.c (sh_elf_howto_tab): Make R_SH_IND12W into an ordinary relocation (no special function), and make it non-partial_inplace. (sh_elf_relax_section): When creating a bsr, use a consistent value no matter if the symbol is extern or not; set addend to -4. Don't swap load / non-load instructions for SH4. (sh_elf_relax_delete_bytes): In R_SH_IND12W case, check the offset rather than if the symbol is external to determine if adjusting the offset makes sense. Adjust the addend too if appropriate. (sh_elf_relocate_section): In R_SH_IND12W, don't fiddle with the relocation.
2003-03-04 05:03:58 +08:00
: (((mach1) == EF_SH2E ? 7 : (mach1)) > ((mach2) == EF_SH2E ? 7 : (mach2)) \
? (mach1) : (mach2)))
bfd: Reinstate bits of sh4 support that got accidentally deleted. Add sh-dsp support. bfd: * archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros. (bfd_mach_sh3_dsp): Likewise. (bfd_mach_sh4): Reinstate. (bfd_default_scan): Recognize 7410, 7708, 7729 and 7750. * bfd-in2.h: Regenerate. * coff-sh.c (struct sh_opcode): flags is no longer short. (USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros. (sh_opcode41, sh_opcode42): Integrate as sh_opcode41. (sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes. (sh_opcode41, sh_opcode4, sh_opcode80): Likewise. (sh_opcodes): No longer const. (sh_dsp_opcodef0, sh_dsp_opcodef): New arrays. (sh_insn_uses_reg): Check for USESAS and USESR8. (sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS. (_bfd_sh_align_load_span): Return early for SH4. Modify sh_opcodes lookup table for sh-dsp / sh3-dsp. Take into account that field b of a parallel processing insn could be mistaken for a separate insn. * cpu-sh.c (arch_info_struct): New array elements for sh2, sh-dsp and sh3-dsp. Reinstate element for sh4. (SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros. (SH4_NEXT): Reinstate. (SH3_NEXT, SH3E_NEXT): Adjust. * elf-bfd.h (_sh_elf_set_mach_from_flags): Declare. * elf32-sh.c (sh_elf_set_private_flags): New function. (sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise. (sh_elf_merge_private_data): New function. (elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define. (bfd_elf32_bfd_copy_private_bfd_data): Define. (bfd_elf32_bfd_merge_private_bfd_data): Change to sh_elf_merge_private_data. gas: * config/tc-sh.c ("elf/sh.h"): Include. (sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables. (md.begin): Initialize target_arch. Only include opcodes in has table that match selected architecture. (parse_reg): Recognize register names for sh-dsp. (parse_at): Recognize post-modify addressing. (get_operands): The leading space is now optional. (get_specific): Remove FDREG_N support. Add support for sh-dsp arguments. Update valid_arch. (build_Mytes): Add support for SDT_REG_N. (find_cooked_opcode): New function, broken out of md_assemble. (assemble_ppi, sh_elf_final_processing): New functions. (md_assemble): Use find_cooked_opcode and assemble_ppi. (md_longopts, md_parse_option): New option: -dsp. * config/tc-sh.h (elf_tc_final_processing): Define. (sh_elf_final_processing): Declare. include/elf: * sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros. (EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise. (EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise. opcodes: * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions. (print_insn_ppi): Likewise. (print_insn_shx): Use info->mach to select appropriate insn set. Add support for sh-dsp. Remove FD_REG_N support. * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support. (sh_arg_type): Likewise. Remove FD_REG_N. (sh_dsp_reg_nums): New enum. (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros. (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise. (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise. (arch_sh3_dsp_up): Likewise. (sh_opcode_info): New field: arch. (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and D_REG_N. Fill in arch field. Add sh-dsp insns.
2000-02-17 08:33:35 +08:00
Contribute sh64-elf. 2002-01-23 Alexandre Oliva <aoliva@redhat.com> * sh.h (R_SH_GOTPLT32, R_SH_GOT_LOW16, R_SH_GOT_MEDLOW16, R_SH_GOT_MEDHI16, R_SH_GOT_HI16, R_SH_GOTPLT_LOW16, R_SH_GOTPLT_MEDLOW16, R_SH_GOTPLT_MEDHI16, R_SH_GOTPLT_HI16, R_SH_PLT_LOW16, R_SH_PLT_MEDLOW16, R_SH_PLT_MEDHI16, R_SH_PLT_HI16, R_SH_GOTOFF_LOW16, R_SH_GOTOFF_MEDLOW16, R_SH_GOTOFF_MEDHI16, R_SH_GOTOFF_HI16, R_SH_GOTPC_LOW16, R_SH_GOTPC_MEDLOW16, R_SH_GOTPC_MEDHI16, R_SH_GOTPC_HI16, R_SH_GOT10BY4, R_SH_GOTPLT10BY4, R_SH_GOT10BY8, R_SH_GOTPLT10BY8, R_SH_COPY64, R_SH_GLOB_DAT64, R_SH_JMP_SLOT64, R_SH_RELATIVE64): New relocs. (R_SH_FIRST_INVALID_RELOC_4): Adjust. 2001-05-16 Alexandre Oliva <aoliva@redhat.com> * sh.h: Renumbered and renamed some SH5 relocations to match official numbers and names; moved unmaching ones to the range 0xf2-0xff. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (sh64_get_contents_type): Declare. (sh64_address_is_shmedia): Likewise. 2000-12-30 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (sh64_elf_crange): New type. (struct sh64_section_data): New. (sh64_elf_section_data): New macro. (EF_SH5): Rename back from EF_SH64. 2000-12-18 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (SHF_SH5_ISA32_MIXED, SHT_SH5_CR_SORTED, SH64_CRANGES_SECTION_NAME, SH64_CRANGE_SIZE, SH64_CRANGE_CR_ADDR_OFFSET, SH64_CRANGE_CR_SIZE_OFFSET, SH64_CRANGE_CR_TYPE_OFFSET): New macros. 2000-12-12 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (EF_SH64): Don't define EF_SH64_ABI64. 2000-11-27 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (EF_SH64_32BIT_ABI, EF_SH64_64BIT_ABI): Delete. (EF_SH64_ABI64): New. 2000-11-23 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (EF_SH64): Rename from EF_SH5. (EF_SH64_32BIT_ABI): New. (EF_SH64_64BIT_ABI): New. (R_SH_PT_16, R_SH_SHMEDIA_CODE R_SH_IMMU5, R_SH_IMMS6, R_SH_IMMU6, R_SH_IMMS10, R_SH_IMMS10BY2, R_SH_IMMS10BY4, R_SH_IMMS10BY8, R_SH_IMMS16, R_SH_IMMU16, R_SH_IMM_LOW16, R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16, R_SH_IMM_HI16_PCREL, R_SH_64, R_SH_64_PCREL): New relocs. 2000-09-01 Ben Elliston <bje@redhat.com> * sh.h (EF_SH5): Define.
2002-02-08 13:05:58 +08:00
/* Flags for the st_other symbol field.
Keep away from the STV_ visibility flags (bit 0..1). */
/* A reference to this symbol should by default add 1. */
#define STO_SH5_ISA32 (1 << 2)
/* Section contains only SHmedia code (no SHcompact code). */
#define SHF_SH5_ISA32 0x40000000
/* Section contains both SHmedia and SHcompact code, and possibly also
constants. */
#define SHF_SH5_ISA32_MIXED 0x20000000
/* If applied to a .cranges section, marks that the section is sorted by
increasing cr_addr values. */
#define SHT_SH5_CR_SORTED 0x80000001
/* Symbol should be handled as DataLabel (attached to global SHN_UNDEF
symbols). */
#define STT_DATALABEL STT_LOPROC
1999-05-03 15:29:06 +08:00
#include "elf/reloc-macros.h"
/* Relocations. */
/* Relocations 10-32 and 128-255 are GNU extensions.
25..32 and 10 are used for relaxation. */
1999-05-03 15:29:06 +08:00
START_RELOC_NUMBERS (elf_sh_reloc_type)
RELOC_NUMBER (R_SH_NONE, 0)
RELOC_NUMBER (R_SH_DIR32, 1)
RELOC_NUMBER (R_SH_REL32, 2)
RELOC_NUMBER (R_SH_DIR8WPN, 3)
RELOC_NUMBER (R_SH_IND12W, 4)
RELOC_NUMBER (R_SH_DIR8WPL, 5)
RELOC_NUMBER (R_SH_DIR8WPZ, 6)
RELOC_NUMBER (R_SH_DIR8BP, 7)
RELOC_NUMBER (R_SH_DIR8W, 8)
RELOC_NUMBER (R_SH_DIR8L, 9)
RELOC_NUMBER (R_SH_LOOP_START, 10)
RELOC_NUMBER (R_SH_LOOP_END, 11)
FAKE_RELOC (R_SH_FIRST_INVALID_RELOC, 12)
FAKE_RELOC (R_SH_LAST_INVALID_RELOC, 21)
RELOC_NUMBER (R_SH_GNU_VTINHERIT, 22)
RELOC_NUMBER (R_SH_GNU_VTENTRY, 23)
RELOC_NUMBER (R_SH_SWITCH8, 24)
1999-05-03 15:29:06 +08:00
RELOC_NUMBER (R_SH_SWITCH16, 25)
RELOC_NUMBER (R_SH_SWITCH32, 26)
RELOC_NUMBER (R_SH_USES, 27)
RELOC_NUMBER (R_SH_COUNT, 28)
RELOC_NUMBER (R_SH_ALIGN, 29)
RELOC_NUMBER (R_SH_CODE, 30)
RELOC_NUMBER (R_SH_DATA, 31)
RELOC_NUMBER (R_SH_LABEL, 32)
RELOC_NUMBER (R_SH_DIR16, 33)
RELOC_NUMBER (R_SH_DIR8, 34)
RELOC_NUMBER (R_SH_DIR8UL, 35)
RELOC_NUMBER (R_SH_DIR8UW, 36)
RELOC_NUMBER (R_SH_DIR8U, 37)
RELOC_NUMBER (R_SH_DIR8SW, 38)
RELOC_NUMBER (R_SH_DIR8S, 39)
RELOC_NUMBER (R_SH_DIR4UL, 40)
RELOC_NUMBER (R_SH_DIR4UW, 41)
RELOC_NUMBER (R_SH_DIR4U, 42)
RELOC_NUMBER (R_SH_PSHA, 43)
RELOC_NUMBER (R_SH_PSHL, 44)
Contribute sh64-elf. 2002-01-23 Alexandre Oliva <aoliva@redhat.com> * sh.h (R_SH_GOTPLT32, R_SH_GOT_LOW16, R_SH_GOT_MEDLOW16, R_SH_GOT_MEDHI16, R_SH_GOT_HI16, R_SH_GOTPLT_LOW16, R_SH_GOTPLT_MEDLOW16, R_SH_GOTPLT_MEDHI16, R_SH_GOTPLT_HI16, R_SH_PLT_LOW16, R_SH_PLT_MEDLOW16, R_SH_PLT_MEDHI16, R_SH_PLT_HI16, R_SH_GOTOFF_LOW16, R_SH_GOTOFF_MEDLOW16, R_SH_GOTOFF_MEDHI16, R_SH_GOTOFF_HI16, R_SH_GOTPC_LOW16, R_SH_GOTPC_MEDLOW16, R_SH_GOTPC_MEDHI16, R_SH_GOTPC_HI16, R_SH_GOT10BY4, R_SH_GOTPLT10BY4, R_SH_GOT10BY8, R_SH_GOTPLT10BY8, R_SH_COPY64, R_SH_GLOB_DAT64, R_SH_JMP_SLOT64, R_SH_RELATIVE64): New relocs. (R_SH_FIRST_INVALID_RELOC_4): Adjust. 2001-05-16 Alexandre Oliva <aoliva@redhat.com> * sh.h: Renumbered and renamed some SH5 relocations to match official numbers and names; moved unmaching ones to the range 0xf2-0xff. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (sh64_get_contents_type): Declare. (sh64_address_is_shmedia): Likewise. 2000-12-30 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (sh64_elf_crange): New type. (struct sh64_section_data): New. (sh64_elf_section_data): New macro. (EF_SH5): Rename back from EF_SH64. 2000-12-18 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (SHF_SH5_ISA32_MIXED, SHT_SH5_CR_SORTED, SH64_CRANGES_SECTION_NAME, SH64_CRANGE_SIZE, SH64_CRANGE_CR_ADDR_OFFSET, SH64_CRANGE_CR_SIZE_OFFSET, SH64_CRANGE_CR_TYPE_OFFSET): New macros. 2000-12-12 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (EF_SH64): Don't define EF_SH64_ABI64. 2000-11-27 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (EF_SH64_32BIT_ABI, EF_SH64_64BIT_ABI): Delete. (EF_SH64_ABI64): New. 2000-11-23 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (EF_SH64): Rename from EF_SH5. (EF_SH64_32BIT_ABI): New. (EF_SH64_64BIT_ABI): New. (R_SH_PT_16, R_SH_SHMEDIA_CODE R_SH_IMMU5, R_SH_IMMS6, R_SH_IMMU6, R_SH_IMMS10, R_SH_IMMS10BY2, R_SH_IMMS10BY4, R_SH_IMMS10BY8, R_SH_IMMS16, R_SH_IMMU16, R_SH_IMM_LOW16, R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16, R_SH_IMM_HI16_PCREL, R_SH_64, R_SH_64_PCREL): New relocs. 2000-09-01 Ben Elliston <bje@redhat.com> * sh.h (EF_SH5): Define.
2002-02-08 13:05:58 +08:00
RELOC_NUMBER (R_SH_DIR5U, 45)
RELOC_NUMBER (R_SH_DIR6U, 46)
RELOC_NUMBER (R_SH_DIR6S, 47)
RELOC_NUMBER (R_SH_DIR10S, 48)
RELOC_NUMBER (R_SH_DIR10SW, 49)
RELOC_NUMBER (R_SH_DIR10SL, 50)
RELOC_NUMBER (R_SH_DIR10SQ, 51)
FAKE_RELOC (R_SH_FIRST_INVALID_RELOC_2, 52)
FAKE_RELOC (R_SH_LAST_INVALID_RELOC_2, 52)
RELOC_NUMBER (R_SH_DIR16S, 53)
FAKE_RELOC (R_SH_FIRST_INVALID_RELOC_3, 54)
2002-10-11 22:36:03 +08:00
FAKE_RELOC (R_SH_LAST_INVALID_RELOC_3, 143)
RELOC_NUMBER (R_SH_TLS_GD_32, 144)
RELOC_NUMBER (R_SH_TLS_LD_32, 145)
RELOC_NUMBER (R_SH_TLS_LDO_32, 146)
RELOC_NUMBER (R_SH_TLS_IE_32, 147)
RELOC_NUMBER (R_SH_TLS_LE_32, 148)
RELOC_NUMBER (R_SH_TLS_DTPMOD32, 149)
RELOC_NUMBER (R_SH_TLS_DTPOFF32, 150)
RELOC_NUMBER (R_SH_TLS_TPOFF32, 151)
FAKE_RELOC (R_SH_FIRST_INVALID_RELOC_4, 152)
FAKE_RELOC (R_SH_LAST_INVALID_RELOC_4, 159)
RELOC_NUMBER (R_SH_GOT32, 160)
RELOC_NUMBER (R_SH_PLT32, 161)
RELOC_NUMBER (R_SH_COPY, 162)
RELOC_NUMBER (R_SH_GLOB_DAT, 163)
RELOC_NUMBER (R_SH_JMP_SLOT, 164)
RELOC_NUMBER (R_SH_RELATIVE, 165)
RELOC_NUMBER (R_SH_GOTOFF, 166)
RELOC_NUMBER (R_SH_GOTPC, 167)
Contribute sh64-elf. 2002-01-23 Alexandre Oliva <aoliva@redhat.com> * sh.h (R_SH_GOTPLT32, R_SH_GOT_LOW16, R_SH_GOT_MEDLOW16, R_SH_GOT_MEDHI16, R_SH_GOT_HI16, R_SH_GOTPLT_LOW16, R_SH_GOTPLT_MEDLOW16, R_SH_GOTPLT_MEDHI16, R_SH_GOTPLT_HI16, R_SH_PLT_LOW16, R_SH_PLT_MEDLOW16, R_SH_PLT_MEDHI16, R_SH_PLT_HI16, R_SH_GOTOFF_LOW16, R_SH_GOTOFF_MEDLOW16, R_SH_GOTOFF_MEDHI16, R_SH_GOTOFF_HI16, R_SH_GOTPC_LOW16, R_SH_GOTPC_MEDLOW16, R_SH_GOTPC_MEDHI16, R_SH_GOTPC_HI16, R_SH_GOT10BY4, R_SH_GOTPLT10BY4, R_SH_GOT10BY8, R_SH_GOTPLT10BY8, R_SH_COPY64, R_SH_GLOB_DAT64, R_SH_JMP_SLOT64, R_SH_RELATIVE64): New relocs. (R_SH_FIRST_INVALID_RELOC_4): Adjust. 2001-05-16 Alexandre Oliva <aoliva@redhat.com> * sh.h: Renumbered and renamed some SH5 relocations to match official numbers and names; moved unmaching ones to the range 0xf2-0xff. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (sh64_get_contents_type): Declare. (sh64_address_is_shmedia): Likewise. 2000-12-30 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (sh64_elf_crange): New type. (struct sh64_section_data): New. (sh64_elf_section_data): New macro. (EF_SH5): Rename back from EF_SH64. 2000-12-18 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (SHF_SH5_ISA32_MIXED, SHT_SH5_CR_SORTED, SH64_CRANGES_SECTION_NAME, SH64_CRANGE_SIZE, SH64_CRANGE_CR_ADDR_OFFSET, SH64_CRANGE_CR_SIZE_OFFSET, SH64_CRANGE_CR_TYPE_OFFSET): New macros. 2000-12-12 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (EF_SH64): Don't define EF_SH64_ABI64. 2000-11-27 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (EF_SH64_32BIT_ABI, EF_SH64_64BIT_ABI): Delete. (EF_SH64_ABI64): New. 2000-11-23 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (EF_SH64): Rename from EF_SH5. (EF_SH64_32BIT_ABI): New. (EF_SH64_64BIT_ABI): New. (R_SH_PT_16, R_SH_SHMEDIA_CODE R_SH_IMMU5, R_SH_IMMS6, R_SH_IMMU6, R_SH_IMMS10, R_SH_IMMS10BY2, R_SH_IMMS10BY4, R_SH_IMMS10BY8, R_SH_IMMS16, R_SH_IMMU16, R_SH_IMM_LOW16, R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16, R_SH_IMM_HI16_PCREL, R_SH_64, R_SH_64_PCREL): New relocs. 2000-09-01 Ben Elliston <bje@redhat.com> * sh.h (EF_SH5): Define.
2002-02-08 13:05:58 +08:00
RELOC_NUMBER (R_SH_GOTPLT32, 168)
RELOC_NUMBER (R_SH_GOT_LOW16, 169)
RELOC_NUMBER (R_SH_GOT_MEDLOW16, 170)
RELOC_NUMBER (R_SH_GOT_MEDHI16, 171)
RELOC_NUMBER (R_SH_GOT_HI16, 172)
RELOC_NUMBER (R_SH_GOTPLT_LOW16, 173)
RELOC_NUMBER (R_SH_GOTPLT_MEDLOW16, 174)
RELOC_NUMBER (R_SH_GOTPLT_MEDHI16, 175)
RELOC_NUMBER (R_SH_GOTPLT_HI16, 176)
RELOC_NUMBER (R_SH_PLT_LOW16, 177)
RELOC_NUMBER (R_SH_PLT_MEDLOW16, 178)
RELOC_NUMBER (R_SH_PLT_MEDHI16, 179)
RELOC_NUMBER (R_SH_PLT_HI16, 180)
RELOC_NUMBER (R_SH_GOTOFF_LOW16, 181)
RELOC_NUMBER (R_SH_GOTOFF_MEDLOW16, 182)
RELOC_NUMBER (R_SH_GOTOFF_MEDHI16, 183)
RELOC_NUMBER (R_SH_GOTOFF_HI16, 184)
RELOC_NUMBER (R_SH_GOTPC_LOW16, 185)
RELOC_NUMBER (R_SH_GOTPC_MEDLOW16, 186)
RELOC_NUMBER (R_SH_GOTPC_MEDHI16, 187)
RELOC_NUMBER (R_SH_GOTPC_HI16, 188)
RELOC_NUMBER (R_SH_GOT10BY4, 189)
RELOC_NUMBER (R_SH_GOTPLT10BY4, 190)
RELOC_NUMBER (R_SH_GOT10BY8, 191)
RELOC_NUMBER (R_SH_GOTPLT10BY8, 192)
RELOC_NUMBER (R_SH_COPY64, 193)
RELOC_NUMBER (R_SH_GLOB_DAT64, 194)
RELOC_NUMBER (R_SH_JMP_SLOT64, 195)
RELOC_NUMBER (R_SH_RELATIVE64, 196)
2002-10-11 22:36:03 +08:00
FAKE_RELOC (R_SH_FIRST_INVALID_RELOC_5, 197)
FAKE_RELOC (R_SH_LAST_INVALID_RELOC_5, 241)
Contribute sh64-elf. 2002-01-23 Alexandre Oliva <aoliva@redhat.com> * sh.h (R_SH_GOTPLT32, R_SH_GOT_LOW16, R_SH_GOT_MEDLOW16, R_SH_GOT_MEDHI16, R_SH_GOT_HI16, R_SH_GOTPLT_LOW16, R_SH_GOTPLT_MEDLOW16, R_SH_GOTPLT_MEDHI16, R_SH_GOTPLT_HI16, R_SH_PLT_LOW16, R_SH_PLT_MEDLOW16, R_SH_PLT_MEDHI16, R_SH_PLT_HI16, R_SH_GOTOFF_LOW16, R_SH_GOTOFF_MEDLOW16, R_SH_GOTOFF_MEDHI16, R_SH_GOTOFF_HI16, R_SH_GOTPC_LOW16, R_SH_GOTPC_MEDLOW16, R_SH_GOTPC_MEDHI16, R_SH_GOTPC_HI16, R_SH_GOT10BY4, R_SH_GOTPLT10BY4, R_SH_GOT10BY8, R_SH_GOTPLT10BY8, R_SH_COPY64, R_SH_GLOB_DAT64, R_SH_JMP_SLOT64, R_SH_RELATIVE64): New relocs. (R_SH_FIRST_INVALID_RELOC_4): Adjust. 2001-05-16 Alexandre Oliva <aoliva@redhat.com> * sh.h: Renumbered and renamed some SH5 relocations to match official numbers and names; moved unmaching ones to the range 0xf2-0xff. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (sh64_get_contents_type): Declare. (sh64_address_is_shmedia): Likewise. 2000-12-30 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (sh64_elf_crange): New type. (struct sh64_section_data): New. (sh64_elf_section_data): New macro. (EF_SH5): Rename back from EF_SH64. 2000-12-18 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (SHF_SH5_ISA32_MIXED, SHT_SH5_CR_SORTED, SH64_CRANGES_SECTION_NAME, SH64_CRANGE_SIZE, SH64_CRANGE_CR_ADDR_OFFSET, SH64_CRANGE_CR_SIZE_OFFSET, SH64_CRANGE_CR_TYPE_OFFSET): New macros. 2000-12-12 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (EF_SH64): Don't define EF_SH64_ABI64. 2000-11-27 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (EF_SH64_32BIT_ABI, EF_SH64_64BIT_ABI): Delete. (EF_SH64_ABI64): New. 2000-11-23 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (EF_SH64): Rename from EF_SH5. (EF_SH64_32BIT_ABI): New. (EF_SH64_64BIT_ABI): New. (R_SH_PT_16, R_SH_SHMEDIA_CODE R_SH_IMMU5, R_SH_IMMS6, R_SH_IMMU6, R_SH_IMMS10, R_SH_IMMS10BY2, R_SH_IMMS10BY4, R_SH_IMMS10BY8, R_SH_IMMS16, R_SH_IMMU16, R_SH_IMM_LOW16, R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16, R_SH_IMM_HI16_PCREL, R_SH_64, R_SH_64_PCREL): New relocs. 2000-09-01 Ben Elliston <bje@redhat.com> * sh.h (EF_SH5): Define.
2002-02-08 13:05:58 +08:00
RELOC_NUMBER (R_SH_SHMEDIA_CODE, 242)
RELOC_NUMBER (R_SH_PT_16, 243)
RELOC_NUMBER (R_SH_IMMS16, 244)
RELOC_NUMBER (R_SH_IMMU16, 245)
RELOC_NUMBER (R_SH_IMM_LOW16, 246)
RELOC_NUMBER (R_SH_IMM_LOW16_PCREL, 247)
RELOC_NUMBER (R_SH_IMM_MEDLOW16, 248)
RELOC_NUMBER (R_SH_IMM_MEDLOW16_PCREL, 249)
RELOC_NUMBER (R_SH_IMM_MEDHI16, 250)
RELOC_NUMBER (R_SH_IMM_MEDHI16_PCREL, 251)
RELOC_NUMBER (R_SH_IMM_HI16, 252)
RELOC_NUMBER (R_SH_IMM_HI16_PCREL, 253)
RELOC_NUMBER (R_SH_64, 254)
RELOC_NUMBER (R_SH_64_PCREL, 255)
END_RELOC_NUMBERS (R_SH_max)
1999-05-03 15:29:06 +08:00
#endif