210 lines
4.8 KiB
ArmAsm
210 lines
4.8 KiB
ArmAsm
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/* Copyright 2003 SuperH Ltd. */
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#include "asm.h"
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#ifdef __SH5__
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#if __SHMEDIA__
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#ifdef __LITTLE_ENDIAN__
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#define ZPAD_MASK(src, dst) addi src, -1, dst
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#else
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#define ZPAD_MASK(src, dst) \
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byterev src, dst; addi dst, -1, dst; byterev dst, dst
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#endif
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/* We assume that the destination is not in the first 16 bytes of memory.
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A typical linker script will put the text section first, and as
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this code is longer that 16 bytes, you have to get out of your way
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to put data there. */
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ENTRY(strncpy)
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pt L_small, tr2
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ldlo.q r3, 0, r0
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shlli r3, 3, r19
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mcmpeq.b r0, r63, r1
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SHHI r1, r19, r7
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add r2, r4, r20
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addi r20, -8, r5
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/* If the size is greater than 8, we know we can read beyond the first
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(possibly partial) quadword, and write out a full first and last
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(possibly unaligned and/or overlapping) quadword. */
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bge/u r2, r5, tr2 // L_small
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pt L_found0, tr0
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addi r2, 8, r22
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bnei/u r7, 0, tr0 // L_found0
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ori r3, -8, r38
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pt L_end_early, tr1
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sub r2, r38, r22
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stlo.q r2, 0, r0
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sthi.q r2, 7, r0
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sub r3, r2, r6
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ldx.q r22, r6, r0
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/* Before each iteration, check that we can store in full the next quad we
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are about to fetch. */
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addi r5, -8, r36
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bgtu/u r22, r36, tr1 // L_end_early
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pt L_scan0, tr1
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L_scan0:
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addi r22, 8, r22
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mcmpeq.b r0, r63, r1
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stlo.q r22, -8, r0
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bnei/u r1, 0, tr0 // L_found0
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sthi.q r22, -1, r0
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ldx.q r22, r6, r0
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bgeu/l r36, r22, tr1 // L_scan0
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L_end:
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// At end; we might re-read a few bytes when we fetch the last quad.
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// branch mispredict, so load is ready now.
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mcmpeq.b r0, r63, r1
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addi r22, 8, r22
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bnei/u r1, 0, tr0 // L_found0
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add r3, r4, r7
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ldlo.q r7, -8, r1
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ldhi.q r7, -1, r7
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ptabs r18, tr0
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stlo.q r22, -8, r0
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or r1, r7, r1
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mcmpeq.b r1, r63, r7
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sthi.q r22, -1, r0
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ZPAD_MASK (r7, r7)
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and r1, r7, r1 // mask out non-zero bytes after first zero byte
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stlo.q r20, -8, r1
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sthi.q r20, -1, r1
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blink tr0, r63
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L_end_early:
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/* Check if we can store the current quad in full. */
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pt L_end, tr1
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add r3, r4, r7
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bgtu/u r5, r22, tr1 // L_end // Not really unlikely, but gap is short.
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/* If not, that means we can just proceed to process the last quad.
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Two pipeline stalls are unavoidable, as we don't have enough ILP. */
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ldlo.q r7, -8, r1
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ldhi.q r7, -1, r7
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ptabs r18, tr0
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or r1, r7, r1
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mcmpeq.b r1, r63, r7
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ZPAD_MASK (r7, r7)
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and r1, r7, r1 // mask out non-zero bytes after first zero byte
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stlo.q r20, -8, r1
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sthi.q r20, -1, r1
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blink tr0, r63
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L_found0:
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// r0: string to store, not yet zero-padding normalized.
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// r1: result of mcmpeq.b r0, r63, r1.
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// r22: store address plus 8. I.e. address where zero padding beyond the
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// string in r0 goes.
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// r20: store end address.
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// r5: store end address minus 8.
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pt L_write0_multiquad, tr0
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ZPAD_MASK (r1, r1)
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and r0, r1, r0 // mask out non-zero bytes after first zero byte
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stlo.q r22, -8, r0
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sthi.q r22, -1, r0
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andi r22, -8, r1 // Check if zeros to write fit in one quad word.
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bgtu/l r5, r1, tr0 // L_write0_multiquad
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ptabs r18, tr1
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sub r20, r22, r1
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shlli r1, 2, r1 // Do shift in two steps so that 64 bit case is
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SHLO r0, r1, r0 // handled correctly.
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SHLO r0, r1, r0
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sthi.q r20, -1, r0
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blink tr1, r63
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L_write0_multiquad:
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pt L_write0_loop, tr0
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ptabs r18, tr1
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stlo.q r22, 0, r63
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sthi.q r20, -1, r63
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addi r1, 8, r1
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bgeu/l r5, r1, tr0 // L_write0_loop
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blink tr1, r63
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L_write0_loop:
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st.q r1, 0 ,r63
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addi r1, 8, r1
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bgeu/l r5, r1, tr0 // L_write0_loop
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blink tr1, r63
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L_small:
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// r0: string to store, not yet zero-padding normalized.
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// r1: result of mcmpeq.b r0, r63, r1.
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// r7: nonzero indicates relevant zero found r0.
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// r2: store address.
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// r3: read address.
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// r4: size, max 8
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// r20: store end address.
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// r5: store end address minus 8.
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pt L_nohi, tr0
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pt L_small_storelong, tr1
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ptabs r18, tr2
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sub r63, r4, r23
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bnei/u r7, 0, tr0 // L_nohi
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ori r3, -8, r7
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bge/l r23, r7, tr0 // L_nohi
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ldhi.q r3, 7, r1
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or r0, r1, r0
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mcmpeq.b r0, r63, r1
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L_nohi:
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ZPAD_MASK (r1, r1)
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and r0, r1, r0
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movi 4, r19
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bge/u r4, r19, tr1 // L_small_storelong
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pt L_small_end, tr0
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#ifndef __LITTLE_ENDIAN__
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byterev r0, r0
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#endif
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beqi/u r4, 0, tr0 // L_small_end
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st.b r2, 0, r0
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beqi/u r4, 1, tr0 // L_small_end
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shlri r0, 8, r0
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st.b r2, 1, r0
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beqi/u r4, 2, tr0 // L_small_end
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shlri r0, 8, r0
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st.b r2, 2, r0
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L_small_end:
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blink tr2, r63
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L_small_storelong:
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shlli r23, 3, r7
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SHHI r0, r7, r1
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#ifdef __LITTLE_ENDIAN__
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shlri r1, 32, r1
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#else
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shlri r0, 32, r0
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#endif
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stlo.l r2, 0, r0
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sthi.l r2, 3, r0
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stlo.l r20, -4, r1
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sthi.l r20, -1, r1
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blink tr2, r63
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#else /* SHcompact */
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/* This code is optimized for size. Instruction selection is SH5 specific.
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SH4 should use a different version. */
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ENTRY(strncpy)
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mov #0, r6
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cmp/eq r4, r6
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bt return
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mov r2, r5
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add #-1, r5
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add r5, r4
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loop:
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bt/s found0
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add #1, r5
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mov.b @r3+, r1
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found0:
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cmp/eq r5,r4
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mov.b r1, @r5
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bf/s loop
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cmp/eq r1, r6
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return:
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rts
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nop
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#endif /* SHcompact */
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#endif /* __SH5__ */
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