2008-08-15 06:00:47 +08:00
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/*
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* The authors hereby grant permission to use, copy, modify, distribute,
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* and license this software and its documentation for any purpose, provided
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* that existing copyright notices are retained in all copies and that this
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* notice is included verbatim in any distributions. No written agreement,
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* license, or royalty fee is required for any of the authorized uses.
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* Modifications to this software may be copyrighted by their authors
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* and need not follow the licensing terms described here, provided that
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* the new terms are clearly indicated on the first page of each file where
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* they apply.
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*/
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/************************************************************************
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*
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* cdefBF535.h
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*
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2009-09-16 Mike Frysinger <michael.frysinger@analog.com>
* bfin/include/cdefBF512.h, bfin/include/cdefBF514.h,
bfin/include/cdefBF516.h, bfin/include/cdefBF518.h,
bfin/include/cdefBF51x_base.h, bfin/include/cdefBF523.h,
bfin/include/cdefBF524.h, bfin/include/cdefBF526.h,
bfin/include/cdefBF542M.h, bfin/include/cdefBF544M.h,
bfin/include/cdefBF547M.h, bfin/include/cdefBF548M.h,
bfin/include/cdefBF549M.h, bfin/include/defBF512.h,
bfin/include/defBF514.h, bfin/include/defBF516.h,
bfin/include/defBF518.h, bfin/include/defBF51x_base.h,
bfin/include/defBF523.h, bfin/include/defBF524.h,
bfin/include/defBF526.h, bfin/include/defBF542M.h,
bfin/include/defBF544M.h, bfin/include/defBF547M.h,
bfin/include/defBF548M.h, bfin/include/defBF549M.h:
New file.
* bfin/include/ccblkfn.h, bfin/include/cdefBF525.h,
bfin/include/cdefBF527.h, bfin/include/cdefBF52x_base.h,
bfin/include/cdefBF532.h, bfin/include/cdefBF534.h,
bfin/include/cdefBF535.h, bfin/include/cdefBF538.h,
bfin/include/cdefBF539.h, bfin/include/cdefBF542.h,
bfin/include/cdefBF544.h, bfin/include/cdefBF547.h,
bfin/include/cdefBF548.h, bfin/include/cdefBF549.h,
bfin/include/cdefBF54x_base.h, bfin/include/cdefBF561.h,
bfin/include/cdefblackfin.h, bfin/include/cdef_LPBlackfin.h,
bfin/include/cplb.h, bfin/include/defBF527.h,
bfin/include/defBF52x_base.h, bfin/include/defBF532.h,
bfin/include/defBF534.h, bfin/include/defBF535.h,
bfin/include/defBF537.h, bfin/include/defBF538.h,
bfin/include/defBF539.h, bfin/include/defBF542.h,
bfin/include/defBF544.h, bfin/include/defBF547.h,
bfin/include/defBF548.h, bfin/include/defBF549.h,
bfin/include/defBF54x_base.h, bfin/include/defBF561.h,
bfin/include/defblackfin.h, bfin/include/def_LPBlackfin.h,
bfin/include/sys/_adi_platform.h,
bfin/include/sys/anomaly_macros_rtl.h,
bfin/include/sys/exception.h, bfin/include/sysreg.h:
Update to Visual DSP 5.0 Update 6.
2009-09-17 00:08:27 +08:00
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* Copyright (C) 2008, 2009 Analog Devices, Inc.
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2008-08-15 06:00:47 +08:00
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*
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************************************************************************/
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#ifndef _CDEF_BF535_H
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#define _CDEF_BF535_H
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/* include all Core registers and bit definitions */
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#if defined(__ADSPLPBLACKFIN__)
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#warning cdefBF535.h should only be included for 535 compatible chips.
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#endif
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#include <defBF535.h>
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/* include core specific register pointer definitions */
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#include <cdefblackfin.h>
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2009-09-16 Mike Frysinger <michael.frysinger@analog.com>
* bfin/include/cdefBF512.h, bfin/include/cdefBF514.h,
bfin/include/cdefBF516.h, bfin/include/cdefBF518.h,
bfin/include/cdefBF51x_base.h, bfin/include/cdefBF523.h,
bfin/include/cdefBF524.h, bfin/include/cdefBF526.h,
bfin/include/cdefBF542M.h, bfin/include/cdefBF544M.h,
bfin/include/cdefBF547M.h, bfin/include/cdefBF548M.h,
bfin/include/cdefBF549M.h, bfin/include/defBF512.h,
bfin/include/defBF514.h, bfin/include/defBF516.h,
bfin/include/defBF518.h, bfin/include/defBF51x_base.h,
bfin/include/defBF523.h, bfin/include/defBF524.h,
bfin/include/defBF526.h, bfin/include/defBF542M.h,
bfin/include/defBF544M.h, bfin/include/defBF547M.h,
bfin/include/defBF548M.h, bfin/include/defBF549M.h:
New file.
* bfin/include/ccblkfn.h, bfin/include/cdefBF525.h,
bfin/include/cdefBF527.h, bfin/include/cdefBF52x_base.h,
bfin/include/cdefBF532.h, bfin/include/cdefBF534.h,
bfin/include/cdefBF535.h, bfin/include/cdefBF538.h,
bfin/include/cdefBF539.h, bfin/include/cdefBF542.h,
bfin/include/cdefBF544.h, bfin/include/cdefBF547.h,
bfin/include/cdefBF548.h, bfin/include/cdefBF549.h,
bfin/include/cdefBF54x_base.h, bfin/include/cdefBF561.h,
bfin/include/cdefblackfin.h, bfin/include/cdef_LPBlackfin.h,
bfin/include/cplb.h, bfin/include/defBF527.h,
bfin/include/defBF52x_base.h, bfin/include/defBF532.h,
bfin/include/defBF534.h, bfin/include/defBF535.h,
bfin/include/defBF537.h, bfin/include/defBF538.h,
bfin/include/defBF539.h, bfin/include/defBF542.h,
bfin/include/defBF544.h, bfin/include/defBF547.h,
bfin/include/defBF548.h, bfin/include/defBF549.h,
bfin/include/defBF54x_base.h, bfin/include/defBF561.h,
bfin/include/defblackfin.h, bfin/include/def_LPBlackfin.h,
bfin/include/sys/_adi_platform.h,
bfin/include/sys/anomaly_macros_rtl.h,
bfin/include/sys/exception.h, bfin/include/sysreg.h:
Update to Visual DSP 5.0 Update 6.
2009-09-17 00:08:27 +08:00
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#ifdef _MISRA_RULES
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#pragma diag(push)
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#pragma diag(suppress:misra_rule_19_4:"some macro definitions not MISRA compliant")
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#endif /* _MISRA_RULES */
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2008-08-15 06:00:47 +08:00
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#ifndef _PTR_TO_VOL_VOID_PTR
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#ifndef _USE_LEGACY_CDEF_BEHAVIOUR
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#define _PTR_TO_VOL_VOID_PTR (void * volatile *)
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#else
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#define _PTR_TO_VOL_VOID_PTR (volatile void **)
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#endif
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#endif
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/* Clock and System Control (0xFFC0 0400-0xFFC0 07FF) */
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#define pPLL_CTL ((volatile unsigned long *)PLL_CTL)
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#define pPLL_STAT ((volatile unsigned short *)PLL_STAT)
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#define pPLL_LOCKCNT ((volatile unsigned short *)PLL_LOCKCNT)
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#define pSWRST ((volatile unsigned short *)SWRST)
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#define pSYSCR ((volatile unsigned short *)SYSCR)
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#define pPLL_IOCKR ((volatile unsigned short *)PLL_IOCKR)
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#define pPLL_IOCK ((volatile unsigned short *)PLL_IOCK)
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/* JTAG/Debug Communication Channel (0xFFC0 0800-0xFFC0 0BFF) */
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#define pCHIPID ((volatile unsigned long *)CHIPID)
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/* System Interrupt Controller (0xFFC0 0C00-0xFFC0 0FFF) */
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#define pSIC_IAR0 ((volatile unsigned long *)SIC_IAR0)
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#define pSIC_IAR1 ((volatile unsigned long *)SIC_IAR1)
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#define pSIC_IAR2 ((volatile unsigned long *)SIC_IAR2)
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#define pSIC_IMASK ((volatile unsigned long *)SIC_IMASK)
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#define pSIC_ISR ((volatile unsigned long *)SIC_ISR)
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#define pSIC_IWR ((volatile unsigned long *)SIC_IWR)
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/* Watchdog Timer (0xFFC0 1000-0xFFC0 13FF) */
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#define pWDOG_CTL ((volatile unsigned short *)WDOG_CTL)
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#define pWDOG_CNT ((volatile unsigned long *)WDOG_CNT)
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#define pWDOG_STAT ((volatile unsigned long *)WDOG_STAT)
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/* Real Time Clock (0xFFC0 1400-0xFFC0 17FF) */
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#define pRTC_STAT ((volatile unsigned long *)RTC_STAT)
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#define pRTC_ICTL ((volatile unsigned short *)RTC_ICTL)
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#define pRTC_ISTAT ((volatile unsigned short *)RTC_ISTAT)
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#define pRTC_SWCNT ((volatile unsigned short *)RTC_SWCNT)
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#define pRTC_ALARM ((volatile unsigned long *)RTC_ALARM)
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#define pRTC_FAST ((volatile unsigned short *)RTC_FAST)
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/* General Purpose IO (0xFFC0 2400-0xFFC0 27FF) */
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#define pFIO_DIR ((volatile unsigned short *)FIO_DIR)
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#define pFIO_FLAG_C ((volatile unsigned short *)FIO_FLAG_C)
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#define pFIO_FLAG_S ((volatile unsigned short *)FIO_FLAG_S)
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#define pFIO_MASKA_C ((volatile unsigned short *)FIO_MASKA_C)
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#define pFIO_MASKA_S ((volatile unsigned short *)FIO_MASKA_S)
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#define pFIO_MASKB_C ((volatile unsigned short *)FIO_MASKB_C)
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#define pFIO_MASKB_S ((volatile unsigned short *)FIO_MASKB_S)
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#define pFIO_POLAR ((volatile unsigned short *)FIO_POLAR)
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#define pFIO_EDGE ((volatile unsigned short *)FIO_EDGE)
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#define pFIO_BOTH ((volatile unsigned short *)FIO_BOTH)
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/* Aysnchronous Memory Controller - External Bus Interface Unit (0xFFC0 3C00-0xFFC0 3FFF) */
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#define pEBIU_AMGCTL ((volatile unsigned short *)EBIU_AMGCTL)
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#define pEBIU_AMBCTL0 ((volatile unsigned long *)EBIU_AMBCTL0)
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#define pEBIU_AMBCTL1 ((volatile unsigned long *)EBIU_AMBCTL1)
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/* USB Registers (0xFFC0 4400 - 0xFFC0 47FF) */
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#define pUSBD_ID ((volatile unsigned short *)USBD_ID)
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#define pUSBD_FRM ((volatile unsigned short *)USBD_FRM)
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#define pUSBD_FRMAT ((volatile unsigned short *)USBD_FRMAT)
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#define pUSBD_EPBUF ((volatile unsigned short *)USBD_EPBUF)
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#define pUSBD_STAT ((volatile unsigned short *)USBD_STAT)
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#define pUSBD_CTRL ((volatile unsigned short *)USBD_CTRL)
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#define pUSBD_GINTR ((volatile unsigned short *)USBD_GINTR)
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#define pUSBD_GMASK ((volatile unsigned short *)USBD_GMASK)
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#define pUSBD_DMACFG ((volatile unsigned short *)USBD_DMACFG)
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#define pUSBD_DMABL ((volatile unsigned short *)USBD_DMABL)
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#define pUSBD_DMABH ((volatile unsigned short *)USBD_DMABH)
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#define pUSBD_DMACT ((volatile unsigned short *)USBD_DMACT)
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#define pUSBD_DMAIRQ ((volatile unsigned short *)USBD_DMAIRQ)
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#define pUSBD_INTR0 ((volatile unsigned short *)USBD_INTR0)
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#define pUSBD_MASK0 ((volatile unsigned short *)USBD_MASK0)
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#define pUSBD_EPCFG0 ((volatile unsigned short *)USBD_EPCFG0)
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#define pUSBD_EPADR0 ((volatile unsigned short *)USBD_EPADR0)
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#define pUSBD_EPLEN0 ((volatile unsigned short *)USBD_EPLEN0)
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#define pUSBD_INTR1 ((volatile unsigned short *)USBD_INTR1)
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#define pUSBD_MASK1 ((volatile unsigned short *)USBD_MASK1)
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#define pUSBD_EPCFG1 ((volatile unsigned short *)USBD_EPCFG1)
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#define pUSBD_EPADR1 ((volatile unsigned short *)USBD_EPADR1)
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#define pUSBD_EPLEN1 ((volatile unsigned short *)USBD_EPLEN1)
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#define pUSBD_INTR2 ((volatile unsigned short *)USBD_INTR2)
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#define pUSBD_MASK2 ((volatile unsigned short *)USBD_MASK2)
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#define pUSBD_EPCFG2 ((volatile unsigned short *)USBD_EPCFG2)
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#define pUSBD_EPADR2 ((volatile unsigned short *)USBD_EPADR2)
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#define pUSBD_EPLEN2 ((volatile unsigned short *)USBD_EPLEN2)
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#define pUSBD_INTR3 ((volatile unsigned short *)USBD_INTR3)
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#define pUSBD_MASK3 ((volatile unsigned short *)USBD_MASK3)
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#define pUSBD_EPCFG3 ((volatile unsigned short *)USBD_EPCFG3)
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#define pUSBD_EPADR3 ((volatile unsigned short *)USBD_EPADR3)
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#define pUSBD_EPLEN3 ((volatile unsigned short *)USBD_EPLEN3)
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#define pUSBD_INTR4 ((volatile unsigned short *)USBD_INTR4)
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#define pUSBD_MASK4 ((volatile unsigned short *)USBD_MASK4)
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#define pUSBD_EPCFG4 ((volatile unsigned short *)USBD_EPCFG4)
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#define pUSBD_EPADR4 ((volatile unsigned short *)USBD_EPADR4)
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#define pUSBD_EPLEN4 ((volatile unsigned short *)USBD_EPLEN4)
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#define pUSBD_INTR5 ((volatile unsigned short *)USBD_INTR5)
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#define pUSBD_MASK5 ((volatile unsigned short *)USBD_MASK5)
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#define pUSBD_EPCFG5 ((volatile unsigned short *)USBD_EPCFG5)
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#define pUSBD_EPADR5 ((volatile unsigned short *)USBD_EPADR5)
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#define pUSBD_EPLEN5 ((volatile unsigned short *)USBD_EPLEN5)
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#define pUSBD_INTR6 ((volatile unsigned short *)USBD_INTR6)
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#define pUSBD_MASK6 ((volatile unsigned short *)USBD_MASK6)
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#define pUSBD_EPCFG6 ((volatile unsigned short *)USBD_EPCFG6)
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#define pUSBD_EPADR6 ((volatile unsigned short *)USBD_EPADR6)
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#define pUSBD_EPLEN6 ((volatile unsigned short *)USBD_EPLEN6)
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#define pUSBD_INTR7 ((volatile unsigned short *)USBD_INTR7)
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#define pUSBD_MASK7 ((volatile unsigned short *)USBD_MASK7)
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#define pUSBD_EPCFG7 ((volatile unsigned short *)USBD_EPCFG7)
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#define pUSBD_EPADR7 ((volatile unsigned short *)USBD_EPADR7)
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#define pUSBD_EPLEN7 ((volatile unsigned short *)USBD_EPLEN7)
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/* SDRAM Controller External Bus Interface Unit (0xFFC0 4C00-0xFFC0 4FFF) */
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#define pEBIU_SDGCTL ((volatile unsigned long *)EBIU_SDGCTL)
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#define pEBIU_SDRRC ((volatile unsigned short *)EBIU_SDRRC)
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#define pEBIU_SDSTAT ((volatile unsigned short *)EBIU_SDSTAT)
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#define pEBIU_SDBCTL ((volatile unsigned long *)EBIU_SDBCTL)
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/* Memory Map */
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/* Core MMRs */
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#define pCOREMMR_BASE ((volatile void *)COREMMR_BASE)
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/* System MMRs */
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#define pSYSMMR_BASE ((volatile void *)SYSMMR_BASE)
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/* L1 cache/SRAM internal memory */
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#define pL1_DATA_A ((void *)L1_DATA_A)
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#define pL1_DATA_B ((void *)L1_DATA_B)
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#define pL1_CODE ((void *)L1_CODE)
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#define pL1_SCRATCH ((void *)L1_SCRATCH)
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/* L2 SRAM external memory */
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#define pL2_BASE ((void *)L2_BASE)
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/* PCI Spaces */
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#define pPCI_CONFIG_SPACE_PORT ((volatile void *)PCI_CONFIG_SPACE_PORT)
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#define pPCI_CONFIG_BASE ((volatile void *)PCI_CONFIG_BASE)
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#define pPCI_IO_BASE ((volatile void *)PCI_IO_BASE)
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#define pPCI_MEM_BASE ((volatile void *)PCI_MEM_BASE)
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/* Async Memory Banks */
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#define pASYNC_BANK3_BASE ((void *)ASYNC_BANK3_BASE)
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#define pASYNC_BANK2_BASE ((void *)ASYNC_BANK2_BASE)
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#define pASYNC_BANK1_BASE ((void *)ASYNC_BANK1_BASE)
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#define pASYNC_BANK0_BASE ((void *)ASYNC_BANK0_BASE)
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/* Sync DRAM Banks */
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#define pSDRAM_BANK3_BASE ((void *)SDRAM_BANK3_BASE)
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#define pSDRAM_BANK2_BASE ((void *)SDRAM_BANK2_BASE)
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#define pSDRAM_BANK1_BASE ((void *)SDRAM_BANK1_BASE)
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#define pSDRAM_BANK0_BASE ((void *)SDRAM_BANK0_BASE)
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/* UART 0 Controller (0xFFC0 1800-0xFFC0 1BFF) */
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#define pUART0_THR ((volatile unsigned short *)UART0_THR)
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#define pUART0_RBR ((volatile unsigned short *)UART0_RBR)
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#define pUART0_DLL ((volatile unsigned short *)UART0_DLL)
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#define pUART0_IER ((volatile unsigned short *)UART0_IER)
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#define pUART0_DLH ((volatile unsigned short *)UART0_DLH)
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#define pUART0_IIR ((volatile unsigned short *)UART0_IIR)
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#define pUART0_LCR ((volatile unsigned short *)UART0_LCR)
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#define pUART0_MCR ((volatile unsigned short *)UART0_MCR)
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#define pUART0_LSR ((volatile unsigned short *)UART0_LSR)
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#define pUART0_MSR ((volatile unsigned short *)UART0_MSR)
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#define pUART0_SCR ((volatile unsigned short *)UART0_SCR)
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#define pUART0_IRCR ((volatile unsigned short *)UART0_IRCR)
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#define pUART0_CURR_PTR_RX ((volatile unsigned short *)UART0_CURR_PTR_RX)
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#define pUART0_CONFIG_RX ((volatile unsigned short *)UART0_CONFIG_RX)
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#define pUART0_START_ADDR_HI_RX ((volatile unsigned short *)UART0_START_ADDR_HI_RX)
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#define pUART0_START_ADDR_LO_RX ((volatile unsigned short *)UART0_START_ADDR_LO_RX)
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#define pUART0_COUNT_RX ((volatile unsigned short *)UART0_COUNT_RX)
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#define pUART0_NEXT_DESCR_RX ((volatile unsigned short *)UART0_NEXT_DESCR_RX)
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#define pUART0_DESCR_RDY_RX ((volatile unsigned short *)UART0_DESCR_RDY_RX)
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#define pUART0_IRQSTAT_RX ((volatile unsigned short *)UART0_IRQSTAT_RX)
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#define pUART0_CURR_PTR_TX ((volatile unsigned short *)UART0_CURR_PTR_TX)
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#define pUART0_CONFIG_TX ((volatile unsigned short *)UART0_CONFIG_TX)
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#define pUART0_START_ADDR_HI_TX ((volatile unsigned short *)UART0_START_ADDR_HI_TX)
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#define pUART0_START_ADDR_LO_TX ((volatile unsigned short *)UART0_START_ADDR_LO_TX)
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#define pUART0_COUNT_TX ((volatile unsigned short *)UART0_COUNT_TX)
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#define pUART0_NEXT_DESCR_TX ((volatile unsigned short *)UART0_NEXT_DESCR_TX)
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#define pUART0_DESCR_RDY_TX ((volatile unsigned short *)UART0_DESCR_RDY_TX)
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#define pUART0_IRQSTAT_TX ((volatile unsigned short *)UART0_IRQSTAT_TX)
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/* UART 1 Controller (0xFFC0 1C00-0xFFC0 1FFF) */
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#define pUART1_THR ((volatile unsigned short *)UART1_THR)
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#define pUART1_RBR ((volatile unsigned short *)UART1_RBR)
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#define pUART1_DLL ((volatile unsigned short *)UART1_DLL)
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#define pUART1_IER ((volatile unsigned short *)UART1_IER)
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#define pUART1_DLH ((volatile unsigned short *)UART1_DLH)
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#define pUART1_IIR ((volatile unsigned short *)UART1_IIR)
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#define pUART1_LCR ((volatile unsigned short *)UART1_LCR)
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#define pUART1_MCR ((volatile unsigned short *)UART1_MCR)
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#define pUART1_LSR ((volatile unsigned short *)UART1_LSR)
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#define pUART1_MSR ((volatile unsigned short *)UART1_MSR)
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#define pUART1_SCR ((volatile unsigned short *)UART1_SCR)
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#define pUART1_CURR_PTR_RX ((volatile unsigned short *)UART1_CURR_PTR_RX)
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#define pUART1_CONFIG_RX ((volatile unsigned short *)UART1_CONFIG_RX)
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#define pUART1_START_ADDR_HI_RX ((volatile unsigned short *)UART1_START_ADDR_HI_RX)
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#define pUART1_START_ADDR_LO_RX ((volatile unsigned short *)UART1_START_ADDR_LO_RX)
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#define pUART1_COUNT_RX ((volatile unsigned short *)UART1_COUNT_RX)
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#define pUART1_NEXT_DESCR_RX ((volatile unsigned short *)UART1_NEXT_DESCR_RX)
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#define pUART1_DESCR_RDY_RX ((volatile unsigned short *)UART1_DESCR_RDY_RX)
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#define pUART1_IRQSTAT_RX ((volatile unsigned short *)UART1_IRQSTAT_RX)
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#define pUART1_CURR_PTR_TX ((volatile unsigned short *)UART1_CURR_PTR_TX)
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#define pUART1_CONFIG_TX ((volatile unsigned short *)UART1_CONFIG_TX)
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#define pUART1_START_ADDR_HI_TX ((volatile unsigned short *)UART1_START_ADDR_HI_TX)
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#define pUART1_START_ADDR_LO_TX ((volatile unsigned short *)UART1_START_ADDR_LO_TX)
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#define pUART1_COUNT_TX ((volatile unsigned short *)UART1_COUNT_TX)
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#define pUART1_NEXT_DESCR_TX ((volatile unsigned short *)UART1_NEXT_DESCR_TX)
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#define pUART1_DESCR_RDY_TX ((volatile unsigned short *)UART1_DESCR_RDY_TX)
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#define pUART1_IRQSTAT_TX ((volatile unsigned short *)UART1_IRQSTAT_TX)
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/* TIMER 0, 1, 2 Registers (0xFFC0 2000-0xFFC0 23FF) */
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#define pTIMER0_STATUS ((volatile unsigned short *)TIMER0_STATUS)
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#define pTIMER0_CONFIG ((volatile unsigned short *)TIMER0_CONFIG)
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#define pTIMER0_COUNTER_LO ((volatile unsigned short *)TIMER0_COUNTER_LO)
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#define pTIMER0_COUNTER_HI ((volatile unsigned short *)TIMER0_COUNTER_HI)
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#define pTIMER0_PERIOD_LO ((volatile unsigned short *)TIMER0_PERIOD_LO)
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#define pTIMER0_PERIOD_HI ((volatile unsigned short *)TIMER0_PERIOD_HI)
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#define pTIMER0_WIDTH_LO ((volatile unsigned short *)TIMER0_WIDTH_LO)
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#define pTIMER0_WIDTH_HI ((volatile unsigned short *)TIMER0_WIDTH_HI)
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#define pTIMER1_STATUS ((volatile unsigned short *)TIMER1_STATUS)
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#define pTIMER1_CONFIG ((volatile unsigned short *)TIMER1_CONFIG)
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#define pTIMER1_COUNTER_LO ((volatile unsigned short *)TIMER1_COUNTER_LO)
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#define pTIMER1_COUNTER_HI ((volatile unsigned short *)TIMER1_COUNTER_HI)
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#define pTIMER1_PERIOD_LO ((volatile unsigned short *)TIMER1_PERIOD_LO)
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#define pTIMER1_PERIOD_HI ((volatile unsigned short *)TIMER1_PERIOD_HI)
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#define pTIMER1_WIDTH_LO ((volatile unsigned short *)TIMER1_WIDTH_LO)
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#define pTIMER1_WIDTH_HI ((volatile unsigned short *)TIMER1_WIDTH_HI)
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#define pTIMER2_STATUS ((volatile unsigned short *)TIMER2_STATUS)
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#define pTIMER2_CONFIG ((volatile unsigned short *)TIMER2_CONFIG)
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#define pTIMER2_COUNTER_LO ((volatile unsigned short *)TIMER2_COUNTER_LO)
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#define pTIMER2_COUNTER_HI ((volatile unsigned short *)TIMER2_COUNTER_HI)
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#define pTIMER2_PERIOD_LO ((volatile unsigned short *)TIMER2_PERIOD_LO)
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#define pTIMER2_PERIOD_HI ((volatile unsigned short *)TIMER2_PERIOD_HI)
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#define pTIMER2_WIDTH_LO ((volatile unsigned short *)TIMER2_WIDTH_LO)
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#define pTIMER2_WIDTH_HI ((volatile unsigned short *)TIMER2_WIDTH_HI)
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/* SPORT0 Controller (0xFFC0 2800-0xFFC0 2BFF) */
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#define pSPORT0_TX_CONFIG ((volatile unsigned short *)SPORT0_TX_CONFIG)
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#define pSPORT0_RX_CONFIG ((volatile unsigned short *)SPORT0_RX_CONFIG)
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#define pSPORT0_TX ((volatile short *)SPORT0_TX)
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#define pSPORT0_RX ((volatile short *)SPORT0_RX)
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#define pSPORT0_TSCLKDIV ((volatile unsigned short *)SPORT0_TSCLKDIV)
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#define pSPORT0_RSCLKDIV ((volatile unsigned short *)SPORT0_RSCLKDIV)
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#define pSPORT0_TFSDIV ((volatile unsigned short *)SPORT0_TFSDIV)
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#define pSPORT0_RFSDIV ((volatile unsigned short *)SPORT0_RFSDIV)
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#define pSPORT0_STAT ((volatile unsigned short *)SPORT0_STAT)
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#define pSPORT0_MTCS0 ((volatile unsigned short *)SPORT0_MTCS0)
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#define pSPORT0_MTCS1 ((volatile unsigned short *)SPORT0_MTCS1)
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#define pSPORT0_MTCS2 ((volatile unsigned short *)SPORT0_MTCS2)
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#define pSPORT0_MTCS3 ((volatile unsigned short *)SPORT0_MTCS3)
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#define pSPORT0_MTCS4 ((volatile unsigned short *)SPORT0_MTCS4)
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#define pSPORT0_MTCS5 ((volatile unsigned short *)SPORT0_MTCS5)
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#define pSPORT0_MTCS6 ((volatile unsigned short *)SPORT0_MTCS6)
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#define pSPORT0_MTCS7 ((volatile unsigned short *)SPORT0_MTCS7)
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#define pSPORT0_MRCS0 ((volatile unsigned short *)SPORT0_MRCS0)
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#define pSPORT0_MRCS1 ((volatile unsigned short *)SPORT0_MRCS1)
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#define pSPORT0_MRCS2 ((volatile unsigned short *)SPORT0_MRCS2)
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#define pSPORT0_MRCS3 ((volatile unsigned short *)SPORT0_MRCS3)
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#define pSPORT0_MRCS4 ((volatile unsigned short *)SPORT0_MRCS4)
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#define pSPORT0_MRCS5 ((volatile unsigned short *)SPORT0_MRCS5)
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#define pSPORT0_MRCS6 ((volatile unsigned short *)SPORT0_MRCS6)
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#define pSPORT0_MRCS7 ((volatile unsigned short *)SPORT0_MRCS7)
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#define pSPORT0_MCMC1 ((volatile unsigned short *)SPORT0_MCMC1)
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#define pSPORT0_MCMC2 ((volatile unsigned short *)SPORT0_MCMC2)
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#define pSPORT0_CURR_PTR_RX ((volatile unsigned short *)SPORT0_CURR_PTR_RX)
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#define pSPORT0_CONFIG_DMA_RX ((volatile unsigned short *)SPORT0_CONFIG_DMA_RX)
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#define pSPORT0_START_ADDR_HI_RX ((volatile unsigned short *)SPORT0_START_ADDR_HI_RX)
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#define pSPORT0_START_ADDR_LO_RX ((volatile unsigned short *)SPORT0_START_ADDR_LO_RX)
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#define pSPORT0_COUNT_RX ((volatile unsigned short *)SPORT0_COUNT_RX)
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#define pSPORT0_NEXT_DESCR_RX ((volatile unsigned short *)SPORT0_NEXT_DESCR_RX)
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#define pSPORT0_DESCR_RDY_RX ((volatile unsigned short *)SPORT0_DESCR_RDY_RX)
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#define pSPORT0_IRQSTAT_RX ((volatile unsigned short *)SPORT0_IRQSTAT_RX)
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#define pSPORT0_CURR_PTR_TX ((volatile unsigned short *)SPORT0_CURR_PTR_TX)
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#define pSPORT0_CONFIG_DMA_TX ((volatile unsigned short *)SPORT0_CONFIG_DMA_TX)
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#define pSPORT0_START_ADDR_HI_TX ((volatile unsigned short *)SPORT0_START_ADDR_HI_TX)
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#define pSPORT0_START_ADDR_LO_TX ((volatile unsigned short *)SPORT0_START_ADDR_LO_TX)
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|
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#define pSPORT0_COUNT_TX ((volatile unsigned short *)SPORT0_COUNT_TX)
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#define pSPORT0_NEXT_DESCR_TX ((volatile unsigned short *)SPORT0_NEXT_DESCR_TX)
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#define pSPORT0_DESCR_RDY_TX ((volatile unsigned short *)SPORT0_DESCR_RDY_TX)
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#define pSPORT0_IRQSTAT_TX ((volatile unsigned short *)SPORT0_IRQSTAT_TX)
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|
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/* SPORT1 Controller (0xFFC0 2C00-0xFFC0 2FFF) */
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|
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#define pSPORT1_TX_CONFIG ((volatile unsigned short *)SPORT1_TX_CONFIG)
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|
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#define pSPORT1_RX_CONFIG ((volatile unsigned short *)SPORT1_RX_CONFIG)
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|
|
#define pSPORT1_TX ((volatile short *)SPORT1_TX)
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#define pSPORT1_RX ((volatile short *)SPORT1_RX)
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#define pSPORT1_TSCLKDIV ((volatile unsigned short *)SPORT1_TSCLKDIV)
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|
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#define pSPORT1_RSCLKDIV ((volatile unsigned short *)SPORT1_RSCLKDIV)
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|
#define pSPORT1_TFSDIV ((volatile unsigned short *)SPORT1_TFSDIV)
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#define pSPORT1_RFSDIV ((volatile unsigned short *)SPORT1_RFSDIV)
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|
#define pSPORT1_STAT ((volatile unsigned short *)SPORT1_STAT)
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#define pSPORT1_MTCS0 ((volatile unsigned short *)SPORT1_MTCS0)
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#define pSPORT1_MTCS1 ((volatile unsigned short *)SPORT1_MTCS1)
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#define pSPORT1_MTCS2 ((volatile unsigned short *)SPORT1_MTCS2)
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#define pSPORT1_MTCS3 ((volatile unsigned short *)SPORT1_MTCS3)
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#define pSPORT1_MTCS4 ((volatile unsigned short *)SPORT1_MTCS4)
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#define pSPORT1_MTCS5 ((volatile unsigned short *)SPORT1_MTCS5)
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#define pSPORT1_MTCS6 ((volatile unsigned short *)SPORT1_MTCS6)
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|
#define pSPORT1_MTCS7 ((volatile unsigned short *)SPORT1_MTCS7)
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#define pSPORT1_MRCS0 ((volatile unsigned short *)SPORT1_MRCS0)
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|
#define pSPORT1_MRCS1 ((volatile unsigned short *)SPORT1_MRCS1)
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#define pSPORT1_MRCS2 ((volatile unsigned short *)SPORT1_MRCS2)
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|
#define pSPORT1_MRCS3 ((volatile unsigned short *)SPORT1_MRCS3)
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|
#define pSPORT1_MRCS4 ((volatile unsigned short *)SPORT1_MRCS4)
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|
#define pSPORT1_MRCS5 ((volatile unsigned short *)SPORT1_MRCS5)
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|
#define pSPORT1_MRCS6 ((volatile unsigned short *)SPORT1_MRCS6)
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|
#define pSPORT1_MRCS7 ((volatile unsigned short *)SPORT1_MRCS7)
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|
#define pSPORT1_MCMC1 ((volatile unsigned short *)SPORT1_MCMC1)
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#define pSPORT1_MCMC2 ((volatile unsigned short *)SPORT1_MCMC2)
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|
|
#define pSPORT1_CURR_PTR_RX ((volatile unsigned short *)SPORT1_CURR_PTR_RX)
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|
|
#define pSPORT1_CONFIG_DMA_RX ((volatile unsigned short *)SPORT1_CONFIG_DMA_RX)
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|
|
#define pSPORT1_START_ADDR_HI_RX ((volatile unsigned short *)SPORT1_START_ADDR_HI_RX)
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|
#define pSPORT1_START_ADDR_LO_RX ((volatile unsigned short *)SPORT1_START_ADDR_LO_RX)
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|
|
#define pSPORT1_COUNT_RX ((volatile unsigned short *)SPORT1_COUNT_RX)
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|
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#define pSPORT1_NEXT_DESCR_RX ((volatile unsigned short *)SPORT1_NEXT_DESCR_RX)
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|
|
#define pSPORT1_DESCR_RDY_RX ((volatile unsigned short *)SPORT1_DESCR_RDY_RX)
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|
|
#define pSPORT1_IRQSTAT_RX ((volatile unsigned short *)SPORT1_IRQSTAT_RX)
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|
#define pSPORT1_CURR_PTR_TX ((volatile unsigned short *)SPORT1_CURR_PTR_TX)
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|
#define pSPORT1_CONFIG_DMA_TX ((volatile unsigned short *)SPORT1_CONFIG_DMA_TX)
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|
|
#define pSPORT1_START_ADDR_HI_TX ((volatile unsigned short *)SPORT1_START_ADDR_HI_TX)
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|
#define pSPORT1_START_ADDR_LO_TX ((volatile unsigned short *)SPORT1_START_ADDR_LO_TX)
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|
|
#define pSPORT1_COUNT_TX ((volatile unsigned short *)SPORT1_COUNT_TX)
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|
#define pSPORT1_NEXT_DESCR_TX ((volatile unsigned short *)SPORT1_NEXT_DESCR_TX)
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|
|
#define pSPORT1_DESCR_RDY_TX ((volatile unsigned short *)SPORT1_DESCR_RDY_TX)
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|
|
#define pSPORT1_IRQSTAT_TX ((volatile unsigned short *)SPORT1_IRQSTAT_TX)
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|
|
/* SPI 0 Controller (0xFFC0 3000-0xFFC0 33FF) */
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|
|
#define pSPI0_CTL ((volatile unsigned short *)SPI0_CTL)
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|
|
#define pSPI0_FLG ((volatile unsigned short *)SPI0_FLG)
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|
|
#define pSPI0_ST ((volatile unsigned short *)SPI0_ST)
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|
|
#define pSPI0_TDBR ((volatile unsigned short *)SPI0_TDBR)
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|
|
#define pSPI0_RDBR ((volatile unsigned short *)SPI0_RDBR)
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|
|
#define pSPI0_BAUD ((volatile unsigned short *)SPI0_BAUD)
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|
|
#define pSPI0_SHADOW ((volatile unsigned short *)SPI0_SHADOW)
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|
|
#define pSPI0_CURR_PTR ((volatile unsigned short *)SPI0_CURR_PTR)
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|
|
#define pSPI0_CONFIG ((volatile unsigned short *)SPI0_CONFIG)
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|
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|
|
#define pSPI0_START_ADDR_HI ((volatile unsigned short *)SPI0_START_ADDR_HI)
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|
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|
|
#define pSPI0_START_ADDR_LO ((volatile unsigned short *)SPI0_START_ADDR_LO)
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|
|
#define pSPI0_COUNT ((volatile unsigned short *)SPI0_COUNT)
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|
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|
|
#define pSPI0_NEXT_DESCR ((volatile unsigned short *)SPI0_NEXT_DESCR)
|
|
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|
|
#define pSPI0_DESCR_RDY ((volatile unsigned short *)SPI0_DESCR_RDY)
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|
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|
|
#define pSPI0_DMA_INT ((volatile unsigned short *)SPI0_DMA_INT)
|
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|
|
|
|
|
|
/* SPI 1 Controller (0xFFC0 3400-0xFFC0 37FF) */
|
|
|
|
|
#define pSPI1_CTL ((volatile unsigned short *)SPI1_CTL)
|
|
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|
|
#define pSPI1_FLG ((volatile unsigned short *)SPI1_FLG)
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|
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|
|
#define pSPI1_ST ((volatile unsigned short *)SPI1_ST)
|
|
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|
|
#define pSPI1_TDBR ((volatile unsigned short *)SPI1_TDBR)
|
|
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|
|
#define pSPI1_RDBR ((volatile unsigned short *)SPI1_RDBR)
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|
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|
|
#define pSPI1_BAUD ((volatile unsigned short *)SPI1_BAUD)
|
|
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|
|
#define pSPI1_SHADOW ((volatile unsigned short *)SPI1_SHADOW)
|
|
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|
|
#define pSPI1_CURR_PTR ((volatile unsigned short *)SPI1_CURR_PTR)
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|
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|
|
#define pSPI1_CONFIG ((volatile unsigned short *)SPI1_CONFIG)
|
|
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|
|
#define pSPI1_START_ADDR_HI ((volatile unsigned short *)SPI1_START_ADDR_HI)
|
|
|
|
|
#define pSPI1_START_ADDR_LO ((volatile unsigned short *)SPI1_START_ADDR_LO)
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|
|
|
|
#define pSPI1_COUNT ((volatile unsigned short *)SPI1_COUNT)
|
|
|
|
|
#define pSPI1_NEXT_DESCR ((volatile unsigned short *)SPI1_NEXT_DESCR)
|
|
|
|
|
#define pSPI1_DESCR_RDY ((volatile unsigned short *)SPI1_DESCR_RDY)
|
|
|
|
|
#define pSPI1_DMA_INT ((volatile unsigned short *)SPI1_DMA_INT)
|
|
|
|
|
|
|
|
|
|
/* Memory DMA Controller (0xFFC0 3800-0xFFC0 3BFF) */
|
|
|
|
|
#define pMDD_DCP ((volatile unsigned short *)MDD_DCP)
|
|
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|
|
#define pMDD_DCFG ((volatile unsigned short *)MDD_DCFG)
|
|
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|
|
#define pMDD_DSAH ((volatile unsigned short *)MDD_DSAH)
|
|
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#define pMDD_DSAL ((volatile unsigned short *)MDD_DSAL)
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#define pMDD_DCT ((volatile unsigned short *)MDD_DCT)
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#define pMDD_DND ((volatile unsigned short *)MDD_DND)
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#define pMDD_DDR ((volatile unsigned short *)MDD_DDR)
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#define pMDD_DI ((volatile unsigned short *)MDD_DI)
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#define pMDS_DCP ((volatile unsigned short *)MDS_DCP)
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#define pMDS_DCFG ((volatile unsigned short *)MDS_DCFG)
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#define pMDS_DSAH ((volatile unsigned short *)MDS_DSAH)
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#define pMDS_DSAL ((volatile unsigned short *)MDS_DSAL)
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#define pMDS_DCT ((volatile unsigned short *)MDS_DCT)
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#define pMDS_DND ((volatile unsigned short *)MDS_DND)
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#define pMDS_DDR ((volatile unsigned short *)MDS_DDR)
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#define pMDS_DI ((volatile unsigned short *)MDS_DI)
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/* PCI Bridge PAB Registers (0xFFC0 4000-0xFFC0 43FF) */
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#define pPCI_CTL ((volatile unsigned short *)PCI_CTL)
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#define pPCI_STAT ((volatile unsigned long *)PCI_STAT)
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#define pPCI_ICTL ((volatile unsigned long *)PCI_ICTL)
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#define pPCI_MBAP (_PTR_TO_VOL_VOID_PTR PCI_MBAP)
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#define pPCI_IBAP (_PTR_TO_VOL_VOID_PTR PCI_IBAP)
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#define pPCI_CBAP (_PTR_TO_VOL_VOID_PTR PCI_CBAP)
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#define pPCI_TMBAP (_PTR_TO_VOL_VOID_PTR PCI_TMBAP)
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#define pPCI_TIBAP (_PTR_TO_VOL_VOID_PTR PCI_TIBAP)
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/* PCI Bridge External Access Bus Registers (0xEEFF FF00-0xEEFF FFFF) */
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#define pPCI_DMBARM ((volatile unsigned long *)PCI_DMBARM)
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#define pPCI_DIBARM ((volatile unsigned long *)PCI_DIBARM)
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#define pPCI_CFG_DIC ((volatile unsigned long *)PCI_CFG_DIC)
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#define pPCI_CFG_VIC ((volatile unsigned long *)PCI_CFG_VIC)
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#define pPCI_CFG_STAT ((volatile unsigned long *)PCI_CFG_STAT)
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#define pPCI_CFG_CMD ((volatile unsigned long *)PCI_CFG_CMD)
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#define pPCI_CFG_CC ((volatile unsigned long *)PCI_CFG_CC)
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#define pPCI_CFG_RID ((volatile unsigned long *)PCI_CFG_RID)
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#define pPCI_CFG_BIST ((volatile unsigned long *)PCI_CFG_BIST)
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#define pPCI_CFG_HT ((volatile unsigned long *)PCI_CFG_HT)
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#define pPCI_CFG_MLT ((volatile unsigned long *)PCI_CFG_MLT)
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#define pPCI_CFG_CLS ((volatile unsigned long *)PCI_CFG_CLS)
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#define pPCI_CFG_MBAR ((volatile unsigned long *)PCI_CFG_MBAR)
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#define pPCI_CFG_IBAR ((volatile unsigned long *)PCI_CFG_IBAR)
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#define pPCI_CFG_SID ((volatile unsigned long *)PCI_CFG_SID)
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#define pPCI_CFG_SVID ((volatile unsigned long *)PCI_CFG_SVID)
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#define pPCI_CFG_MAXL ((volatile unsigned long *)PCI_CFG_MAXL)
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#define pPCI_CFG_MING ((volatile unsigned long *)PCI_CFG_MING)
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#define pPCI_CFG_IP ((volatile unsigned long *)PCI_CFG_IP)
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#define pPCI_CFG_IL ((volatile unsigned long *)PCI_CFG_IL)
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#define pPCI_HMCTL ((volatile unsigned long *)PCI_HMCTL)
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/* System Bus Interface Unit (0xFFC0 4800-0xFFC0 4FFF) */
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#define pDMA_DBP ((volatile unsigned short *)DMA_DBP)
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#define pDB_ACOMP (_PTR_TO_VOL_VOID_PTR DB_ACOMP)
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#define pDB_CCOMP ((volatile unsigned long *)DB_CCOMP)
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2009-09-16 Mike Frysinger <michael.frysinger@analog.com>
* bfin/include/cdefBF512.h, bfin/include/cdefBF514.h,
bfin/include/cdefBF516.h, bfin/include/cdefBF518.h,
bfin/include/cdefBF51x_base.h, bfin/include/cdefBF523.h,
bfin/include/cdefBF524.h, bfin/include/cdefBF526.h,
bfin/include/cdefBF542M.h, bfin/include/cdefBF544M.h,
bfin/include/cdefBF547M.h, bfin/include/cdefBF548M.h,
bfin/include/cdefBF549M.h, bfin/include/defBF512.h,
bfin/include/defBF514.h, bfin/include/defBF516.h,
bfin/include/defBF518.h, bfin/include/defBF51x_base.h,
bfin/include/defBF523.h, bfin/include/defBF524.h,
bfin/include/defBF526.h, bfin/include/defBF542M.h,
bfin/include/defBF544M.h, bfin/include/defBF547M.h,
bfin/include/defBF548M.h, bfin/include/defBF549M.h:
New file.
* bfin/include/ccblkfn.h, bfin/include/cdefBF525.h,
bfin/include/cdefBF527.h, bfin/include/cdefBF52x_base.h,
bfin/include/cdefBF532.h, bfin/include/cdefBF534.h,
bfin/include/cdefBF535.h, bfin/include/cdefBF538.h,
bfin/include/cdefBF539.h, bfin/include/cdefBF542.h,
bfin/include/cdefBF544.h, bfin/include/cdefBF547.h,
bfin/include/cdefBF548.h, bfin/include/cdefBF549.h,
bfin/include/cdefBF54x_base.h, bfin/include/cdefBF561.h,
bfin/include/cdefblackfin.h, bfin/include/cdef_LPBlackfin.h,
bfin/include/cplb.h, bfin/include/defBF527.h,
bfin/include/defBF52x_base.h, bfin/include/defBF532.h,
bfin/include/defBF534.h, bfin/include/defBF535.h,
bfin/include/defBF537.h, bfin/include/defBF538.h,
bfin/include/defBF539.h, bfin/include/defBF542.h,
bfin/include/defBF544.h, bfin/include/defBF547.h,
bfin/include/defBF548.h, bfin/include/defBF549.h,
bfin/include/defBF54x_base.h, bfin/include/defBF561.h,
bfin/include/defblackfin.h, bfin/include/def_LPBlackfin.h,
bfin/include/sys/_adi_platform.h,
bfin/include/sys/anomaly_macros_rtl.h,
bfin/include/sys/exception.h, bfin/include/sysreg.h:
Update to Visual DSP 5.0 Update 6.
2009-09-17 00:08:27 +08:00
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#ifdef _MISRA_RULES
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#pragma diag(pop)
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#endif /* _MISRA_RULES */
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2008-08-15 06:00:47 +08:00
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#endif /* _CDEF_BF535_H */
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