2000-02-18 03:39:52 +08:00
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;
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; (c) Copyright 1986 HEWLETT-PACKARD COMPANY
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;
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; To anyone who acknowledges that this file is provided "AS IS"
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; without any express or implied warranty:
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; permission to use, copy, modify, and distribute this file
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; for any purpose is hereby granted without fee, provided that
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; the above copyright notice and this notice appears in all
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; copies, and that the name of Hewlett-Packard Company not be
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; used in advertising or publicity pertaining to distribution
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; of the software without specific, written prior permission.
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; Hewlett-Packard Company makes no representations about the
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; suitability of this software for any purpose.
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;
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; Standard Hardware Register Definitions for Use with Assembler
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; version A.08.06
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; - fr16-31 added at Utah
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;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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; Hardware General Registers
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r0: .equ 0
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r1: .equ 1
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r2: .equ 2
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r3: .equ 3
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r4: .equ 4
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r5: .equ 5
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r6: .equ 6
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r7: .equ 7
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r8: .equ 8
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r9: .equ 9
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r10: .equ 10
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r11: .equ 11
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r12: .equ 12
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r13: .equ 13
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r14: .equ 14
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r15: .equ 15
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r16: .equ 16
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r17: .equ 17
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r18: .equ 18
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r19: .equ 19
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r20: .equ 20
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r21: .equ 21
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r22: .equ 22
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r23: .equ 23
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r24: .equ 24
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r25: .equ 25
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r26: .equ 26
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r27: .equ 27
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r28: .equ 28
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r29: .equ 29
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r30: .equ 30
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r31: .equ 31
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; Hardware Space Registers
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sr0: .equ 0
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sr1: .equ 1
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sr2: .equ 2
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sr3: .equ 3
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sr4: .equ 4
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sr5: .equ 5
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sr6: .equ 6
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sr7: .equ 7
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; Hardware Floating Point Registers
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fr0: .equ 0
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fr1: .equ 1
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fr2: .equ 2
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fr3: .equ 3
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fr4: .equ 4
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fr5: .equ 5
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fr6: .equ 6
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fr7: .equ 7
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fr8: .equ 8
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fr9: .equ 9
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fr10: .equ 10
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fr11: .equ 11
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fr12: .equ 12
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fr13: .equ 13
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fr14: .equ 14
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fr15: .equ 15
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fr16: .equ 16
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fr17: .equ 17
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fr18: .equ 18
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fr19: .equ 19
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fr20: .equ 20
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fr21: .equ 21
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fr22: .equ 22
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fr23: .equ 23
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fr24: .equ 24
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fr25: .equ 25
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fr26: .equ 26
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fr27: .equ 27
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fr28: .equ 28
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fr29: .equ 29
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fr30: .equ 30
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fr31: .equ 31
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; Hardware Control Registers
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cr0: .equ 0
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rctr: .equ 0 ; Recovery Counter Register
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cr8: .equ 8 ; Protection ID 1
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pidr1: .equ 8
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cr9: .equ 9 ; Protection ID 2
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pidr2: .equ 9
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cr10: .equ 10
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ccr: .equ 10 ; Coprocessor Confiquration Register
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cr11: .equ 11
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sar: .equ 11 ; Shift Amount Register
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cr12: .equ 12
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pidr3: .equ 12 ; Protection ID 3
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cr13: .equ 13
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pidr4: .equ 13 ; Protection ID 4
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cr14: .equ 14
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iva: .equ 14 ; Interrupt Vector Address
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cr15: .equ 15
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eiem: .equ 15 ; External Interrupt Enable Mask
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cr16: .equ 16
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itmr: .equ 16 ; Interval Timer
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cr17: .equ 17
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pcsq: .equ 17 ; Program Counter Space queue
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cr18: .equ 18
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pcoq: .equ 18 ; Program Counter Offset queue
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cr19: .equ 19
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iir: .equ 19 ; Interruption Instruction Register
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cr20: .equ 20
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isr: .equ 20 ; Interruption Space Register
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cr21: .equ 21
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ior: .equ 21 ; Interruption Offset Register
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cr22: .equ 22
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ipsw: .equ 22 ; Interrpution Processor Status Word
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cr23: .equ 23
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eirr: .equ 23 ; External Interrupt Request
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cr24: .equ 24
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ppda: .equ 24 ; Physcial Page Directory Address
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tr0: .equ 24 ; Temporary register 0
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cr25: .equ 25
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hta: .equ 25 ; Hash Table Address
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tr1: .equ 25 ; Temporary register 1
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cr26: .equ 26
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tr2: .equ 26 ; Temporary register 2
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cr27: .equ 27
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tr3: .equ 27 ; Temporary register 3
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cr28: .equ 28
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tr4: .equ 28 ; Temporary register 4
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cr29: .equ 29
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tr5: .equ 29 ; Temporary register 5
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cr30: .equ 30
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tr6: .equ 30 ; Temporary register 6
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cr31: .equ 31
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tr7: .equ 31 ; Temporary register 7
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;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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; Procedure Call Convention ~
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; Register Definitions for Use with Assembler ~
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; version A.08.06
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;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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; Software Architecture General Registers
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rp: .equ r2 ; return pointer
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mrp: .equ r31 ; millicode return pointer
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ret0: .equ r28 ; return value
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ret1: .equ r29 ; return value (high part of double)
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sl: .equ r29 ; static link
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sp: .equ r30 ; stack pointer
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dp: .equ r27 ; data pointer
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arg0: .equ r26 ; argument
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arg1: .equ r25 ; argument or high part of double argument
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arg2: .equ r24 ; argument
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arg3: .equ r23 ; argument or high part of double argument
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;_____________________________________________________________________________
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; Software Architecture Space Registers
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; sr0 ; return link form BLE
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sret: .equ sr1 ; return value
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sarg: .equ sr1 ; argument
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; sr4 ; PC SPACE tracker
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; sr5 ; process private data
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;_____________________________________________________________________________
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; Software Architecture Pseudo Registers
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previous_sp: .equ 64 ; old stack pointer (locates previous frame)
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2002-10-08 21:01:02 +08:00
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#if 0
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2000-02-18 03:39:52 +08:00
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;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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; Standard space and subspace definitions. version A.08.06
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; These are generally suitable for programs on HP_UX and HPE.
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; Statements commented out are used when building such things as operating
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; system kernels.
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;;;;;;;;;;;;;;;;
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.SPACE $TEXT$, SPNUM=0,SORT=8
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; .subspa $FIRST$, QUAD=0,ALIGN=2048,ACCESS=0x2c,SORT=4,FIRST
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; .subspa $REAL$, QUAD=0,ALIGN=8,ACCESS=0x2c,SORT=4,FIRST,LOCK
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.subspa $MILLICODE$, QUAD=0,ALIGN=8,ACCESS=0x2c,SORT=8
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.subspa $LIT$, QUAD=0,ALIGN=8,ACCESS=0x2c,SORT=16
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.subspa $CODE$, QUAD=0,ALIGN=8,ACCESS=0x2c,SORT=24
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; .subspa $UNWIND$, QUAD=0,ALIGN=4,ACCESS=0x2c,SORT=64
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; .subspa $RECOVER$, QUAD=0,ALIGN=4,ACCESS=0x2c,SORT=80
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; .subspa $RESERVED$, QUAD=0,ALIGN=8,ACCESS=0x73,SORT=82
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; .subspa $GATE$, QUAD=0,ALIGN=8,ACCESS=0x4c,SORT=84,CODE_ONLY
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; Additional code subspaces should have ALIGN=8 for an interspace BV
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; and should have SORT=24.
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;
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; For an incomplete executable (program bound to shared libraries),
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; sort keys $GLOBAL$ -1 and $GLOBAL$ -2 are reserved for the $DLT$
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; and $PLT$ subspaces respectively.
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;;;;;;;;;;;;;;;
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.SPACE $PRIVATE$, SPNUM=1,PRIVATE,SORT=16
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.subspa $GLOBAL$, QUAD=1,ALIGN=8,ACCESS=0x1f,SORT=40
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.import $global$
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.subspa $SHORTDATA$, QUAD=1,ALIGN=8,ACCESS=0x1f,SORT=24
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.subspa $DATA$, QUAD=1,ALIGN=8,ACCESS=0x1f,SORT=16
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.subspa $PFA_COUNTER$, QUAD=1,ALIGN=4,ACCESS=0x1f,SORT=8
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.subspa $SHORTBSS$, QUAD=1,ALIGN=8,ACCESS=0x1f,SORT=80,ZERO
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.subspa $BSS$, QUAD=1,ALIGN=8,ACCESS=0x1f,SORT=82,ZERO
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; .subspa $PCB$, QUAD=1,ALIGN=8,ACCESS=0x10,SORT=82
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; .subspa $STACK$, QUAD=1,ALIGN=8,ACCESS=0x1f,SORT=82
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; .subspa $HEAP$, QUAD=1,ALIGN=8,ACCESS=0x1f,SORT=82
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;;;;;;;;;;;;;;;;
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; .SPACE $PFA$, SPNUM=0,PRIVATE,UNLOADABLE,SORT=64
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; .subspa $PFA_ADDRESS$, ALIGN=4,ACCESS=0x2c,UNLOADABLE
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|
|
|
|
;;;;;;;;;;;;;;;;
|
|
|
|
|
; .SPACE $DEBUG$, SPNUM=2,PRIVATE,UNLOADABLE,SORT=80
|
|
|
|
|
; .subspa $HEADER$, ALIGN=4,ACCESS=0,UNLOADABLE,FIRST
|
|
|
|
|
; .subspa $GNTT$, ALIGN=4,ACCESS=0,UNLOADABLE
|
|
|
|
|
; .subspa $LNTT$, ALIGN=4,ACCESS=0,UNLOADABLE
|
|
|
|
|
; .subspa $SLT$, ALIGN=4,ACCESS=0,UNLOADABLE
|
|
|
|
|
; .subspa $VT$, ALIGN=4,ACCESS=0,UNLOADABLE
|
|
|
|
|
|
|
|
|
|
; To satisfy the copyright terms each .o will have a reference
|
|
|
|
|
; the the actual copyright. This will force the actual copyright
|
|
|
|
|
; message to be brought in from libgloss/hp-milli.s
|
|
|
|
|
.space $PRIVATE$
|
|
|
|
|
.subspa $DATA$
|
2002-10-08 21:01:02 +08:00
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|
|
#else
|
|
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|
|
.data
|
|
|
|
|
#endif
|
2000-02-18 03:39:52 +08:00
|
|
|
.import ___hp_free_copyright,data
|
|
|
|
|
L$copyright .word ___hp_free_copyright
|
