2015-10-24 02:24:50 +08:00
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/*
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Copyright (c) 2015, Synopsys, Inc. All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1) Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2) Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3) Neither the name of the Synopsys, Inc., nor the names of its contributors
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may be used to endorse or promote products derived from this software
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without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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*/
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/* This implementation is optimized for performance. For code size a generic
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implementation of this function from newlib/libc/string/strcmp.c will be
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used. */
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#if !defined (__OPTIMIZE_SIZE__) && !defined (PREFER_SIZE_OVER_SPEED)
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#include "asm.h"
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/* This is optimized primarily for the ARC700.
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It would be possible to speed up the loops by one cycle / word
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respective one cycle / byte by forcing double source 1 alignment, unrolling
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by a factor of two, and speculatively loading the second word / byte of
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source 1; however, that would increase the overhead for loop setup / finish,
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and strcmp might often terminate early. */
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2015-12-16 01:54:58 +08:00
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#ifndef __ARCHS__
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2015-10-24 02:24:50 +08:00
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ENTRY (strcmp)
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or r2,r0,r1
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bmsk_s r2,r2,1
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brne_l r2,0,.Lcharloop
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mov_s r12,0x01010101
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ror r5,r12
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.Lwordloop:
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ld.ab r2,[r0,4]
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ld.ab r3,[r1,4]
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nop_s
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sub r4,r2,r12
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bic r4,r4,r2
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and r4,r4,r5
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brne_l r4,0,.Lfound0
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breq r2,r3,.Lwordloop
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#ifdef __LITTLE_ENDIAN__
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xor r0,r2,r3 ; mask for difference
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sub_s r1,r0,1
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bic_s r0,r0,r1 ; mask for least significant difference bit
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sub r1,r5,r0
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xor r0,r5,r1 ; mask for least significant difference byte
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and_s r2,r2,r0
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and_s r3,r3,r0
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#endif /* LITTLE ENDIAN */
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cmp_s r2,r3
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mov_s r0,1
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j_s.d [blink]
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bset.lo r0,r0,31
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.balign 4
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#ifdef __LITTLE_ENDIAN__
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.Lfound0:
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xor r0,r2,r3 ; mask for difference
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or r0,r0,r4 ; or in zero indicator
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sub_s r1,r0,1
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bic_s r0,r0,r1 ; mask for least significant difference bit
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sub r1,r5,r0
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xor r0,r5,r1 ; mask for least significant difference byte
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and_s r2,r2,r0
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and_s r3,r3,r0
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sub.f r0,r2,r3
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mov.hi r0,1
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j_s.d [blink]
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bset.lo r0,r0,31
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#else /* BIG ENDIAN */
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/* The zero-detection above can mis-detect 0x01 bytes as zeroes
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because of carry-propagateion from a lower significant zero byte.
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We can compensate for this by checking that bit0 is zero.
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This compensation is not necessary in the step where we
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get a low estimate for r2, because in any affected bytes
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we already have 0x00 or 0x01, which will remain unchanged
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when bit 7 is cleared. */
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.balign 4
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.Lfound0:
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2016-07-21 18:19:34 +08:00
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#ifdef __ARC_BARREL_SHIFTER__
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2015-10-24 02:24:50 +08:00
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lsr r0,r4,8
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lsr_s r1,r2
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bic_s r2,r2,r0 ; get low estimate for r2 and get ...
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bic_s r0,r0,r1 ; <this is the adjusted mask for zeros>
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or_s r3,r3,r0 ; ... high estimate r3 so that r2 > r3 will ...
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cmp_s r3,r2 ; ... be independent of trailing garbage
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or_s r2,r2,r0 ; likewise for r3 > r2
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bic_s r3,r3,r0
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rlc r0,0 ; r0 := r2 > r3 ? 1 : 0
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cmp_s r2,r3
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j_s.d [blink]
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bset.lo r0,r0,31
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2016-07-21 18:19:34 +08:00
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#else /* __ARC_BARREL_SHIFTER__ */
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2015-10-24 02:24:50 +08:00
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/* Fall through to .Lcharloop. */
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sub_s r0,r0,4
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sub_s r1,r1,4
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2016-07-21 18:19:34 +08:00
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#endif /* __ARC_BARREL_SHIFTER__ */
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2015-10-24 02:24:50 +08:00
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#endif /* ENDIAN */
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.balign 4
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.Lcharloop:
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ldb.ab r2,[r0,1]
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ldb.ab r3,[r1,1]
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nop_s
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breq_l r2,0,.Lcmpend
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breq r2,r3,.Lcharloop
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.Lcmpend:
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j_s.d [blink]
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sub r0,r2,r3
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ENDFUNC (strcmp)
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2015-12-16 01:54:58 +08:00
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#endif /* !__ARCHS__ */
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2015-10-24 02:24:50 +08:00
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#endif /* !__OPTIMIZE_SIZE__ && !PREFER_SIZE_OVER_SPEED */
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