2008-08-15 06:00:47 +08:00
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/*
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* The authors hereby grant permission to use, copy, modify, distribute,
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* and license this software and its documentation for any purpose, provided
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* that existing copyright notices are retained in all copies and that this
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* notice is included verbatim in any distributions. No written agreement,
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* license, or royalty fee is required for any of the authorized uses.
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* Modifications to this software may be copyrighted by their authors
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* and need not follow the licensing terms described here, provided that
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* the new terms are clearly indicated on the first page of each file where
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* they apply.
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*/
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/************************************************************************
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*
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* cdef_LPBlackfin.h
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*
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2010-10-18 07:52:49 +08:00
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* (c) Copyright 2002-2005 Analog Devices, Inc. All rights reserved.
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2008-08-15 06:00:47 +08:00
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*
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************************************************************************/
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#ifndef _CDEF_LPBLACKFIN_H
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#define _CDEF_LPBLACKFIN_H
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#if !defined(__ADSPLPBLACKFIN__)
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#warning cdef_LPBlackfin.h should only be included for 532 compatible chips.
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#endif
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#include <def_LPBlackfin.h>
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2009-09-16 Mike Frysinger <michael.frysinger@analog.com>
* bfin/include/cdefBF512.h, bfin/include/cdefBF514.h,
bfin/include/cdefBF516.h, bfin/include/cdefBF518.h,
bfin/include/cdefBF51x_base.h, bfin/include/cdefBF523.h,
bfin/include/cdefBF524.h, bfin/include/cdefBF526.h,
bfin/include/cdefBF542M.h, bfin/include/cdefBF544M.h,
bfin/include/cdefBF547M.h, bfin/include/cdefBF548M.h,
bfin/include/cdefBF549M.h, bfin/include/defBF512.h,
bfin/include/defBF514.h, bfin/include/defBF516.h,
bfin/include/defBF518.h, bfin/include/defBF51x_base.h,
bfin/include/defBF523.h, bfin/include/defBF524.h,
bfin/include/defBF526.h, bfin/include/defBF542M.h,
bfin/include/defBF544M.h, bfin/include/defBF547M.h,
bfin/include/defBF548M.h, bfin/include/defBF549M.h:
New file.
* bfin/include/ccblkfn.h, bfin/include/cdefBF525.h,
bfin/include/cdefBF527.h, bfin/include/cdefBF52x_base.h,
bfin/include/cdefBF532.h, bfin/include/cdefBF534.h,
bfin/include/cdefBF535.h, bfin/include/cdefBF538.h,
bfin/include/cdefBF539.h, bfin/include/cdefBF542.h,
bfin/include/cdefBF544.h, bfin/include/cdefBF547.h,
bfin/include/cdefBF548.h, bfin/include/cdefBF549.h,
bfin/include/cdefBF54x_base.h, bfin/include/cdefBF561.h,
bfin/include/cdefblackfin.h, bfin/include/cdef_LPBlackfin.h,
bfin/include/cplb.h, bfin/include/defBF527.h,
bfin/include/defBF52x_base.h, bfin/include/defBF532.h,
bfin/include/defBF534.h, bfin/include/defBF535.h,
bfin/include/defBF537.h, bfin/include/defBF538.h,
bfin/include/defBF539.h, bfin/include/defBF542.h,
bfin/include/defBF544.h, bfin/include/defBF547.h,
bfin/include/defBF548.h, bfin/include/defBF549.h,
bfin/include/defBF54x_base.h, bfin/include/defBF561.h,
bfin/include/defblackfin.h, bfin/include/def_LPBlackfin.h,
bfin/include/sys/_adi_platform.h,
bfin/include/sys/anomaly_macros_rtl.h,
bfin/include/sys/exception.h, bfin/include/sysreg.h:
Update to Visual DSP 5.0 Update 6.
2009-09-17 00:08:27 +08:00
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#ifdef _MISRA_RULES
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#pragma diag(push)
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#pragma diag(suppress:misra_rule_19_4:"some macro definitions not MISRA compliant")
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#endif /* _MISRA_RULES */
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2008-08-15 06:00:47 +08:00
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#ifndef _PTR_TO_VOL_VOID_PTR
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#ifndef _USE_LEGACY_CDEF_BEHAVIOUR
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#define _PTR_TO_VOL_VOID_PTR (void * volatile *)
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#else
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#define _PTR_TO_VOL_VOID_PTR (volatile void **)
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#endif
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#endif
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/* Cache & SRAM Memory */
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#define pSRAM_BASE_ADDRESS (_PTR_TO_VOL_VOID_PTR SRAM_BASE_ADDRESS)
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#define pDMEM_CONTROL ((volatile unsigned long *)DMEM_CONTROL)
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#define pDCPLB_STATUS ((volatile unsigned long *)DCPLB_STATUS)
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#define pDCPLB_FAULT_ADDR (_PTR_TO_VOL_VOID_PTR DCPLB_FAULT_ADDR)
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#define pDCPLB_ADDR0 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR0)
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#define pDCPLB_ADDR1 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR1)
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#define pDCPLB_ADDR2 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR2)
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#define pDCPLB_ADDR3 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR3)
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#define pDCPLB_ADDR4 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR4)
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#define pDCPLB_ADDR5 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR5)
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#define pDCPLB_ADDR6 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR6)
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#define pDCPLB_ADDR7 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR7)
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#define pDCPLB_ADDR8 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR8)
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#define pDCPLB_ADDR9 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR9)
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#define pDCPLB_ADDR10 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR10)
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#define pDCPLB_ADDR11 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR11)
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#define pDCPLB_ADDR12 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR12)
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#define pDCPLB_ADDR13 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR13)
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#define pDCPLB_ADDR14 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR14)
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#define pDCPLB_ADDR15 (_PTR_TO_VOL_VOID_PTR DCPLB_ADDR15)
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#define pDCPLB_DATA0 ((volatile unsigned long *)DCPLB_DATA0)
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#define pDCPLB_DATA1 ((volatile unsigned long *)DCPLB_DATA1)
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#define pDCPLB_DATA2 ((volatile unsigned long *)DCPLB_DATA2)
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#define pDCPLB_DATA3 ((volatile unsigned long *)DCPLB_DATA3)
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#define pDCPLB_DATA4 ((volatile unsigned long *)DCPLB_DATA4)
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#define pDCPLB_DATA5 ((volatile unsigned long *)DCPLB_DATA5)
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#define pDCPLB_DATA6 ((volatile unsigned long *)DCPLB_DATA6)
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#define pDCPLB_DATA7 ((volatile unsigned long *)DCPLB_DATA7)
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#define pDCPLB_DATA8 ((volatile unsigned long *)DCPLB_DATA8)
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#define pDCPLB_DATA9 ((volatile unsigned long *)DCPLB_DATA9)
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#define pDCPLB_DATA10 ((volatile unsigned long *)DCPLB_DATA10)
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#define pDCPLB_DATA11 ((volatile unsigned long *)DCPLB_DATA11)
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#define pDCPLB_DATA12 ((volatile unsigned long *)DCPLB_DATA12)
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#define pDCPLB_DATA13 ((volatile unsigned long *)DCPLB_DATA13)
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#define pDCPLB_DATA14 ((volatile unsigned long *)DCPLB_DATA14)
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#define pDCPLB_DATA15 ((volatile unsigned long *)DCPLB_DATA15)
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#define pDTEST_COMMAND ((volatile unsigned long *)DTEST_COMMAND)
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#define pDTEST_DATA0 ((volatile unsigned long *)DTEST_DATA0)
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#define pDTEST_DATA1 ((volatile unsigned long *)DTEST_DATA1)
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#define pIMEM_CONTROL ((volatile unsigned long *)IMEM_CONTROL)
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#define pICPLB_STATUS ((volatile unsigned long *)ICPLB_STATUS)
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#define pICPLB_FAULT_ADDR (_PTR_TO_VOL_VOID_PTR ICPLB_FAULT_ADDR)
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#define pICPLB_ADDR0 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR0)
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#define pICPLB_ADDR1 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR1)
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#define pICPLB_ADDR2 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR2)
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#define pICPLB_ADDR3 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR3)
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#define pICPLB_ADDR4 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR4)
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#define pICPLB_ADDR5 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR5)
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#define pICPLB_ADDR6 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR6)
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#define pICPLB_ADDR7 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR7)
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#define pICPLB_ADDR8 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR8)
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#define pICPLB_ADDR9 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR9)
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#define pICPLB_ADDR10 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR10)
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#define pICPLB_ADDR11 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR11)
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#define pICPLB_ADDR12 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR12)
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#define pICPLB_ADDR13 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR13)
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#define pICPLB_ADDR14 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR14)
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#define pICPLB_ADDR15 (_PTR_TO_VOL_VOID_PTR ICPLB_ADDR15)
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#define pICPLB_DATA0 ((volatile unsigned long *)ICPLB_DATA0)
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#define pICPLB_DATA1 ((volatile unsigned long *)ICPLB_DATA1)
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#define pICPLB_DATA2 ((volatile unsigned long *)ICPLB_DATA2)
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#define pICPLB_DATA3 ((volatile unsigned long *)ICPLB_DATA3)
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#define pICPLB_DATA4 ((volatile unsigned long *)ICPLB_DATA4)
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#define pICPLB_DATA5 ((volatile unsigned long *)ICPLB_DATA5)
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#define pICPLB_DATA6 ((volatile unsigned long *)ICPLB_DATA6)
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#define pICPLB_DATA7 ((volatile unsigned long *)ICPLB_DATA7)
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#define pICPLB_DATA8 ((volatile unsigned long *)ICPLB_DATA8)
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#define pICPLB_DATA9 ((volatile unsigned long *)ICPLB_DATA9)
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#define pICPLB_DATA10 ((volatile unsigned long *)ICPLB_DATA10)
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#define pICPLB_DATA11 ((volatile unsigned long *)ICPLB_DATA11)
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#define pICPLB_DATA12 ((volatile unsigned long *)ICPLB_DATA12)
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#define pICPLB_DATA13 ((volatile unsigned long *)ICPLB_DATA13)
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#define pICPLB_DATA14 ((volatile unsigned long *)ICPLB_DATA14)
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#define pICPLB_DATA15 ((volatile unsigned long *)ICPLB_DATA15)
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#define pITEST_COMMAND ((volatile unsigned long *)ITEST_COMMAND)
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#define pITEST_DATA0 ((volatile unsigned long *)ITEST_DATA0)
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#define pITEST_DATA1 ((volatile unsigned long *)ITEST_DATA1)
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/* Event/Interrupt Registers */
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#define pEVT0 (_PTR_TO_VOL_VOID_PTR EVT0)
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#define pEVT1 (_PTR_TO_VOL_VOID_PTR EVT1)
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#define pEVT2 (_PTR_TO_VOL_VOID_PTR EVT2)
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#define pEVT3 (_PTR_TO_VOL_VOID_PTR EVT3)
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#define pEVT4 (_PTR_TO_VOL_VOID_PTR EVT4)
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#define pEVT5 (_PTR_TO_VOL_VOID_PTR EVT5)
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#define pEVT6 (_PTR_TO_VOL_VOID_PTR EVT6)
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#define pEVT7 (_PTR_TO_VOL_VOID_PTR EVT7)
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#define pEVT8 (_PTR_TO_VOL_VOID_PTR EVT8)
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#define pEVT9 (_PTR_TO_VOL_VOID_PTR EVT9)
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#define pEVT10 (_PTR_TO_VOL_VOID_PTR EVT10)
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#define pEVT11 (_PTR_TO_VOL_VOID_PTR EVT11)
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#define pEVT12 (_PTR_TO_VOL_VOID_PTR EVT12)
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#define pEVT13 (_PTR_TO_VOL_VOID_PTR EVT13)
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#define pEVT14 (_PTR_TO_VOL_VOID_PTR EVT14)
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#define pEVT15 (_PTR_TO_VOL_VOID_PTR EVT15)
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#define pIMASK ((volatile unsigned long *)IMASK)
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#define pIPEND ((volatile unsigned long *)IPEND)
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#define pILAT ((volatile unsigned long *)ILAT)
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/* Core Timer Registers */
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#define pTCNTL ((volatile unsigned long *)TCNTL)
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#define pTPERIOD ((volatile unsigned long *)TPERIOD)
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#define pTSCALE ((volatile unsigned long *)TSCALE)
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#define pTCOUNT ((volatile unsigned long *)TCOUNT)
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/* Debug/MP/Emulation Registers */
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#define pDSPID ((volatile unsigned long *)DSPID)
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#define pDBGCTL ((volatile unsigned long *)DBGCTL)
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#define pDBGSTAT ((volatile unsigned long *)DBGSTAT)
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#define pEMUDAT ((volatile unsigned long *)EMUDAT)
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/* Trace Buffer Registers */
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#define pTBUFCTL ((volatile unsigned long *)TBUFCTL)
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#define pTBUFSTAT ((volatile unsigned long *)TBUFSTAT)
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#define pTBUF (_PTR_TO_VOL_VOID_PTR TBUF)
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/* Watch Point Control Registers */
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#define pWPIACTL ((volatile unsigned long *)WPIACTL)
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#define pWPIA0 (_PTR_TO_VOL_VOID_PTR WPIA0)
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#define pWPIA1 (_PTR_TO_VOL_VOID_PTR WPIA1)
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#define pWPIA2 (_PTR_TO_VOL_VOID_PTR WPIA2)
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#define pWPIA3 (_PTR_TO_VOL_VOID_PTR WPIA3)
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#define pWPIA4 (_PTR_TO_VOL_VOID_PTR WPIA4)
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#define pWPIA5 (_PTR_TO_VOL_VOID_PTR WPIA5)
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#define pWPIACNT0 ((volatile unsigned long *)WPIACNT0)
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#define pWPIACNT1 ((volatile unsigned long *)WPIACNT1)
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#define pWPIACNT2 ((volatile unsigned long *)WPIACNT2)
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#define pWPIACNT3 ((volatile unsigned long *)WPIACNT3)
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#define pWPIACNT4 ((volatile unsigned long *)WPIACNT4)
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#define pWPIACNT5 ((volatile unsigned long *)WPIACNT5)
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#define pWPDACTL ((volatile unsigned long *)WPDACTL)
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#define pWPDA0 (_PTR_TO_VOL_VOID_PTR WPDA0)
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#define pWPDA1 (_PTR_TO_VOL_VOID_PTR WPDA1)
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#define pWPDACNT0 ((volatile unsigned long *)WPDACNT0)
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#define pWPDACNT1 ((volatile unsigned long *)WPDACNT1)
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#define pWPSTAT ((volatile unsigned long *)WPSTAT)
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/* Performance Monitor Registers */
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#define pPFCTL ((volatile unsigned long *)PFCTL)
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#define pPFCNTR0 ((volatile unsigned long *)PFCNTR0)
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#define pPFCNTR1 ((volatile unsigned long *)PFCNTR1)
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2009-09-16 Mike Frysinger <michael.frysinger@analog.com>
* bfin/include/cdefBF512.h, bfin/include/cdefBF514.h,
bfin/include/cdefBF516.h, bfin/include/cdefBF518.h,
bfin/include/cdefBF51x_base.h, bfin/include/cdefBF523.h,
bfin/include/cdefBF524.h, bfin/include/cdefBF526.h,
bfin/include/cdefBF542M.h, bfin/include/cdefBF544M.h,
bfin/include/cdefBF547M.h, bfin/include/cdefBF548M.h,
bfin/include/cdefBF549M.h, bfin/include/defBF512.h,
bfin/include/defBF514.h, bfin/include/defBF516.h,
bfin/include/defBF518.h, bfin/include/defBF51x_base.h,
bfin/include/defBF523.h, bfin/include/defBF524.h,
bfin/include/defBF526.h, bfin/include/defBF542M.h,
bfin/include/defBF544M.h, bfin/include/defBF547M.h,
bfin/include/defBF548M.h, bfin/include/defBF549M.h:
New file.
* bfin/include/ccblkfn.h, bfin/include/cdefBF525.h,
bfin/include/cdefBF527.h, bfin/include/cdefBF52x_base.h,
bfin/include/cdefBF532.h, bfin/include/cdefBF534.h,
bfin/include/cdefBF535.h, bfin/include/cdefBF538.h,
bfin/include/cdefBF539.h, bfin/include/cdefBF542.h,
bfin/include/cdefBF544.h, bfin/include/cdefBF547.h,
bfin/include/cdefBF548.h, bfin/include/cdefBF549.h,
bfin/include/cdefBF54x_base.h, bfin/include/cdefBF561.h,
bfin/include/cdefblackfin.h, bfin/include/cdef_LPBlackfin.h,
bfin/include/cplb.h, bfin/include/defBF527.h,
bfin/include/defBF52x_base.h, bfin/include/defBF532.h,
bfin/include/defBF534.h, bfin/include/defBF535.h,
bfin/include/defBF537.h, bfin/include/defBF538.h,
bfin/include/defBF539.h, bfin/include/defBF542.h,
bfin/include/defBF544.h, bfin/include/defBF547.h,
bfin/include/defBF548.h, bfin/include/defBF549.h,
bfin/include/defBF54x_base.h, bfin/include/defBF561.h,
bfin/include/defblackfin.h, bfin/include/def_LPBlackfin.h,
bfin/include/sys/_adi_platform.h,
bfin/include/sys/anomaly_macros_rtl.h,
bfin/include/sys/exception.h, bfin/include/sysreg.h:
Update to Visual DSP 5.0 Update 6.
2009-09-17 00:08:27 +08:00
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#ifdef _MISRA_RULES
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#pragma diag(pop)
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#endif /* _MISRA_RULES */
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2008-08-15 06:00:47 +08:00
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#endif /* _CDEF_LPBLACKFIN_H */
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