2000-06-08 01:48:35 +08:00
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/* Opcode table for the Atmel AVR micro controllers.
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2012-06-08 00:43:36 +08:00
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Copyright 2000, 2001, 2004, 2006, 2008, 2010, 2012 Free Software Foundation, Inc.
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2000-06-08 01:48:35 +08:00
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Contributed by Denis Chertykov <denisc@overta.ru>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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2010-04-15 18:26:09 +08:00
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the Free Software Foundation; either version 3, or (at your option)
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2000-06-08 01:48:35 +08:00
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any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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2010-04-15 18:26:09 +08:00
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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2000-06-08 01:48:35 +08:00
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Add support for attiny261, attiny461, attiny861, attiny25, attiny45,
attiny85, attiny24, attiny44, attiny84, at90pwm2, at90pwm3, atmega164,
atmega324, atmega644, atmega329, atmega3290, atmega649, atmega6490,
atmega406, atmega640, atmega1280, atmega1281, at90can32, at90can64,
at90usb646, at90usb647, at90usb1286 and at90usb1287.
Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
2006-04-07 23:18:08 +08:00
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#define AVR_ISA_1200 0x0001 /* In the beginning there was ... */
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2000-06-08 01:48:35 +08:00
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#define AVR_ISA_LPM 0x0002 /* device has LPM */
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#define AVR_ISA_LPMX 0x0004 /* device has LPM Rd,Z[+] */
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#define AVR_ISA_SRAM 0x0008 /* device has SRAM (LD, ST, PUSH, POP, ...) */
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2000-06-27 09:45:30 +08:00
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#define AVR_ISA_MEGA 0x0020 /* device has >8K program memory (JMP and CALL
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supported, no 8K wrap on RJMP and RCALL) */
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* gas/config/tc-avr.c: Add support for
atmega48, atmega88, atmega168, attiny13, attiny2313, at90can128.
* include/opcode/avr.h: Add support for
atmega48, atmega88, atmega168, attiny13, attiny2313, at90can128.
2004-09-11 21:15:05 +08:00
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#define AVR_ISA_MUL 0x0040 /* device has new core (MUL, FMUL, ...) */
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2000-06-08 01:48:35 +08:00
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#define AVR_ISA_ELPM 0x0080 /* device has >64K program memory (ELPM) */
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2001-11-10 17:40:53 +08:00
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#define AVR_ISA_ELPMX 0x0100 /* device has ELPM Rd,Z[+] */
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2000-06-27 09:45:30 +08:00
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#define AVR_ISA_SPM 0x0200 /* device can program itself */
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2001-11-10 17:40:53 +08:00
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#define AVR_ISA_BRK 0x0400 /* device has BREAK (on-chip debug) */
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2000-06-08 01:48:35 +08:00
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#define AVR_ISA_EIND 0x0800 /* device has >128K program memory (none yet) */
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* gas/config/tc-avr.c: Add support for
atmega48, atmega88, atmega168, attiny13, attiny2313, at90can128.
* include/opcode/avr.h: Add support for
atmega48, atmega88, atmega168, attiny13, attiny2313, at90can128.
2004-09-11 21:15:05 +08:00
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#define AVR_ISA_MOVW 0x1000 /* device has MOVW */
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2011-03-23 02:10:45 +08:00
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#define AVR_ISA_SPMX 0x2000 /* device has SPM Z[+] */
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#define AVR_ISA_DES 0x4000 /* device has DES */
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2013-06-01 15:14:44 +08:00
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#define AVR_ISA_RMW 0x8000 /* device has RMW instructions XCH,LAC,LAS,LAT */
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2000-06-08 01:48:35 +08:00
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#define AVR_ISA_TINY1 (AVR_ISA_1200 | AVR_ISA_LPM)
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Add support for attiny261, attiny461, attiny861, attiny25, attiny45,
attiny85, attiny24, attiny44, attiny84, at90pwm2, at90pwm3, atmega164,
atmega324, atmega644, atmega329, atmega3290, atmega649, atmega6490,
atmega406, atmega640, atmega1280, atmega1281, at90can32, at90can64,
at90usb646, at90usb647, at90usb1286 and at90usb1287.
Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
2006-04-07 23:18:08 +08:00
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#define AVR_ISA_2xxx (AVR_ISA_TINY1 | AVR_ISA_SRAM)
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2008-02-14 21:04:29 +08:00
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/* For the attiny26 which is missing LPM Rd,Z+. */
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#define AVR_ISA_2xxe (AVR_ISA_2xxx | AVR_ISA_LPMX)
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2008-01-24 01:36:23 +08:00
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#define AVR_ISA_RF401 (AVR_ISA_2xxx | AVR_ISA_MOVW | AVR_ISA_LPMX)
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* gas/config/tc-avr.c: Add support for
atmega48, atmega88, atmega168, attiny13, attiny2313, at90can128.
* include/opcode/avr.h: Add support for
atmega48, atmega88, atmega168, attiny13, attiny2313, at90can128.
2004-09-11 21:15:05 +08:00
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#define AVR_ISA_TINY2 (AVR_ISA_2xxx | AVR_ISA_MOVW | AVR_ISA_LPMX | \
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Add support for attiny261, attiny461, attiny861, attiny25, attiny45,
attiny85, attiny24, attiny44, attiny84, at90pwm2, at90pwm3, atmega164,
atmega324, atmega644, atmega329, atmega3290, atmega649, atmega6490,
atmega406, atmega640, atmega1280, atmega1281, at90can32, at90can64,
at90usb646, at90usb647, at90usb1286 and at90usb1287.
Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
2006-04-07 23:18:08 +08:00
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AVR_ISA_SPM | AVR_ISA_BRK)
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#define AVR_ISA_M603 (AVR_ISA_2xxx | AVR_ISA_MEGA)
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#define AVR_ISA_M103 (AVR_ISA_M603 | AVR_ISA_ELPM)
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Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC.
bfd/
* archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35,
bfd_mach_avr51): New.
* bfd-in2.h: Regenerate.
* cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51
architectures. Change comments to match architecture comments in GCC.
(compatible): Add test for new AVR architectures.
* elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize
bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51.
(elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51.
gas/
* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
architectures. Reorganize list to put mcu types in correct architectures
and to order list same as in GCC. Use new ISA definitions in
include/opcode/avr.h.
* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
descriptions. Reorganize descriptions to put mcu types in correct
architectures and to order lists same as in GCC.
include/
* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
(EF_AVR_MACH): Redefine to 0x7F.
* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
(AVR_ISA_AVR3): Redefine.
(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
AVR_ISA_AVR6): Define.
ld/
* Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o,
and eavr51.o.
Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c.
* Makefile.in: Regenerate.
* configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35
and avr51.
* emulparams/avr25.sh: New file.
* emulparams/avr31.sh: New file.
* emulparams/avr35.sh: New file.
* emulparams/avr51.sh: New file.
2008-08-09 13:35:13 +08:00
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#define AVR_ISA_M8 (AVR_ISA_2xxx | AVR_ISA_MUL | AVR_ISA_MOVW | \
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2008-01-17 01:59:07 +08:00
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AVR_ISA_LPMX | AVR_ISA_SPM)
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Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC.
bfd/
* archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35,
bfd_mach_avr51): New.
* bfd-in2.h: Regenerate.
* cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51
architectures. Change comments to match architecture comments in GCC.
(compatible): Add test for new AVR architectures.
* elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize
bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51.
(elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51.
gas/
* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
architectures. Reorganize list to put mcu types in correct architectures
and to order list same as in GCC. Use new ISA definitions in
include/opcode/avr.h.
* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
descriptions. Reorganize descriptions to put mcu types in correct
architectures and to order lists same as in GCC.
include/
* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
(EF_AVR_MACH): Redefine to 0x7F.
* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
(AVR_ISA_AVR3): Redefine.
(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
AVR_ISA_AVR6): Define.
ld/
* Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o,
and eavr51.o.
Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c.
* Makefile.in: Regenerate.
* configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35
and avr51.
* emulparams/avr25.sh: New file.
* emulparams/avr31.sh: New file.
* emulparams/avr35.sh: New file.
* emulparams/avr51.sh: New file.
2008-08-09 13:35:13 +08:00
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#define AVR_ISA_PWMx (AVR_ISA_M8 | AVR_ISA_BRK)
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Add support for attiny261, attiny461, attiny861, attiny25, attiny45,
attiny85, attiny24, attiny44, attiny84, at90pwm2, at90pwm3, atmega164,
atmega324, atmega644, atmega329, atmega3290, atmega649, atmega6490,
atmega406, atmega640, atmega1280, atmega1281, at90can32, at90can64,
at90usb646, at90usb647, at90usb1286 and at90usb1287.
Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
2006-04-07 23:18:08 +08:00
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#define AVR_ISA_M161 (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_MOVW | \
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AVR_ISA_LPMX | AVR_ISA_SPM)
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#define AVR_ISA_94K (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_MOVW | AVR_ISA_LPMX)
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#define AVR_ISA_M323 (AVR_ISA_M161 | AVR_ISA_BRK)
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#define AVR_ISA_M128 (AVR_ISA_M323 | AVR_ISA_ELPM | AVR_ISA_ELPMX)
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2011-03-23 02:10:45 +08:00
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#define AVR_ISA_M256 (AVR_ISA_M128 | AVR_ISA_EIND)
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2013-06-01 15:14:44 +08:00
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#define AVR_ISA_XMEGA (AVR_ISA_M256 | AVR_ISA_SPMX | AVR_ISA_DES)
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#define AVR_ISA_XMEGAU (AVR_ISA_XMEGA | AVR_ISA_RMW)
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2000-06-08 01:48:35 +08:00
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Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC.
bfd/
* archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35,
bfd_mach_avr51): New.
* bfd-in2.h: Regenerate.
* cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51
architectures. Change comments to match architecture comments in GCC.
(compatible): Add test for new AVR architectures.
* elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize
bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51.
(elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51.
gas/
* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
architectures. Reorganize list to put mcu types in correct architectures
and to order list same as in GCC. Use new ISA definitions in
include/opcode/avr.h.
* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
descriptions. Reorganize descriptions to put mcu types in correct
architectures and to order lists same as in GCC.
include/
* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
(EF_AVR_MACH): Redefine to 0x7F.
* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
(AVR_ISA_AVR3): Redefine.
(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
AVR_ISA_AVR6): Define.
ld/
* Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o,
and eavr51.o.
Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c.
* Makefile.in: Regenerate.
* configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35
and avr51.
* emulparams/avr25.sh: New file.
* emulparams/avr31.sh: New file.
* emulparams/avr35.sh: New file.
* emulparams/avr51.sh: New file.
2008-08-09 13:35:13 +08:00
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#define AVR_ISA_AVR1 AVR_ISA_TINY1
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#define AVR_ISA_AVR2 AVR_ISA_2xxx
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#define AVR_ISA_AVR25 AVR_ISA_TINY2
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#define AVR_ISA_AVR3 AVR_ISA_M603
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#define AVR_ISA_AVR31 AVR_ISA_M103
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#define AVR_ISA_AVR35 (AVR_ISA_AVR3 | AVR_ISA_MOVW | \
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AVR_ISA_LPMX | AVR_ISA_SPM | AVR_ISA_BRK)
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#define AVR_ISA_AVR3_ALL (AVR_ISA_AVR3 | AVR_ISA_AVR31 | AVR_ISA_AVR35)
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#define AVR_ISA_AVR4 AVR_ISA_PWMx
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#define AVR_ISA_AVR5 AVR_ISA_M323
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#define AVR_ISA_AVR51 AVR_ISA_M128
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#define AVR_ISA_AVR6 (AVR_ISA_1200 | AVR_ISA_LPM | AVR_ISA_LPMX | \
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AVR_ISA_SRAM | AVR_ISA_MEGA | AVR_ISA_MUL | \
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AVR_ISA_ELPM | AVR_ISA_ELPMX | AVR_ISA_SPM | \
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2011-07-02 01:14:03 +08:00
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AVR_ISA_BRK | AVR_ISA_EIND | AVR_ISA_MOVW)
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2000-06-08 01:48:35 +08:00
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#define REGISTER_P(x) ((x) == 'r' \
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|| (x) == 'd' \
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|| (x) == 'w' \
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|| (x) == 'a' \
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|| (x) == 'v')
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2000-08-06 22:09:14 +08:00
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/* Undefined combination of operands - does the register
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operand overlap with pre-decremented or post-incremented
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pointer register (like ld r31,Z+)? */
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#define AVR_UNDEF_P(x) (((x) & 0xFFED) == 0x91E5 || \
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((x) & 0xFDEF) == 0x91AD || ((x) & 0xFDEF) == 0x91AE || \
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((x) & 0xFDEF) == 0x91C9 || ((x) & 0xFDEF) == 0x91CA || \
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((x) & 0xFDEF) == 0x91E1 || ((x) & 0xFDEF) == 0x91E2)
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/* Is this a skip instruction {cpse,sbic,sbis,sbrc,sbrs}? */
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#define AVR_SKIP_P(x) (((x) & 0xFC00) == 0x1000 || \
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((x) & 0xFD00) == 0x9900 || ((x) & 0xFC08) == 0xFC00)
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/* Is this `ldd r,b+0' or `std b+0,r' (b={Y,Z}, disassembled as
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`ld r,b' or `st b,r' respectively - next opcode entry)? */
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#define AVR_DISP0_P(x) (((x) & 0xFC07) == 0x8000)
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2000-06-08 01:48:35 +08:00
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/* constraint letters
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r - any register
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d - `ldi' register (r16-r31)
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v - `movw' even register (r0, r2, ..., r28, r30)
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a - `fmul' register (r16-r23)
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w - `adiw' register (r24,r26,r28,r30)
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e - pointer registers (X,Y,Z)
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b - base pointer register and displacement ([YZ]+disp)
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z - Z pointer register (for [e]lpm Rd,Z[+])
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M - immediate value from 0 to 255
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n - immediate value from 0 to 255 ( n = ~M ). Relocation impossible
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s - immediate value from 0 to 7
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2000-08-06 22:09:14 +08:00
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P - Port address value from 0 to 63. (in, out)
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p - Port address value from 0 to 31. (cbi, sbi, sbic, sbis)
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K - immediate value from 0 to 63 (used in `adiw', `sbiw')
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2000-06-08 01:48:35 +08:00
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i - immediate value
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l - signed pc relative offset from -64 to 63
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L - signed pc relative offset from -2048 to 2047
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2000-08-06 22:09:14 +08:00
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h - absolute code address (call, jmp)
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2000-06-08 01:48:35 +08:00
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S - immediate value from 0 to 7 (S = s << 4)
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2011-03-23 02:10:45 +08:00
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E - immediate value from 0 to 15, shifted left by 4 (des)
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2000-06-08 01:48:35 +08:00
|
|
|
? - use this opcode entry if no parameters, else use next opcode entry
|
2000-08-06 22:09:14 +08:00
|
|
|
|
|
|
|
|
Order is important - some binary opcodes have more than one name,
|
|
|
|
|
the disassembler will only see the first match.
|
|
|
|
|
|
2001-11-10 17:40:53 +08:00
|
|
|
Remaining undefined opcodes (1699 total - some of them might work
|
2000-08-06 22:09:14 +08:00
|
|
|
as normal instructions if not all of the bits are decoded):
|
|
|
|
|
|
|
|
|
|
0x0001...0x00ff (255) (known to be decoded as `nop' by the old core)
|
|
|
|
|
"100100xxxxxxx011" (128) 0x9[0-3][0-9a-f][3b]
|
|
|
|
|
"100100xxxxxx1000" (64) 0x9[0-3][0-9a-f]8
|
|
|
|
|
"1001010xxxxx0100" (32) 0x9[45][0-9a-f]4
|
|
|
|
|
"1001010x001x1001" (4) 0x9[45][23]9
|
|
|
|
|
"1001010x01xx1001" (8) 0x9[45][4-7]9
|
|
|
|
|
"1001010x1xxx1001" (16) 0x9[45][8-9a-f]9
|
|
|
|
|
"1001010xxxxx1011" (32) 0x9[45][0-9a-f]b
|
|
|
|
|
"10010101001x1000" (2) 0x95[23]8
|
|
|
|
|
"1001010101xx1000" (4) 0x95[4-7]8
|
2001-11-10 17:40:53 +08:00
|
|
|
"1001010110111000" (1) 0x95b8
|
2000-08-06 22:09:14 +08:00
|
|
|
"1001010111111000" (1) 0x95f8 (`espm' removed in databook update)
|
|
|
|
|
"11111xxxxxxx1xxx" (1024) 0xf[8-9a-f][0-9a-f][8-9a-f]
|
|
|
|
|
*/
|
2000-06-08 01:48:35 +08:00
|
|
|
|
|
|
|
|
AVR_INSN (clc, "", "1001010010001000", 1, AVR_ISA_1200, 0x9488)
|
|
|
|
|
AVR_INSN (clh, "", "1001010011011000", 1, AVR_ISA_1200, 0x94d8)
|
|
|
|
|
AVR_INSN (cli, "", "1001010011111000", 1, AVR_ISA_1200, 0x94f8)
|
|
|
|
|
AVR_INSN (cln, "", "1001010010101000", 1, AVR_ISA_1200, 0x94a8)
|
|
|
|
|
AVR_INSN (cls, "", "1001010011001000", 1, AVR_ISA_1200, 0x94c8)
|
|
|
|
|
AVR_INSN (clt, "", "1001010011101000", 1, AVR_ISA_1200, 0x94e8)
|
|
|
|
|
AVR_INSN (clv, "", "1001010010111000", 1, AVR_ISA_1200, 0x94b8)
|
|
|
|
|
AVR_INSN (clz, "", "1001010010011000", 1, AVR_ISA_1200, 0x9498)
|
2000-08-06 22:09:14 +08:00
|
|
|
|
|
|
|
|
AVR_INSN (sec, "", "1001010000001000", 1, AVR_ISA_1200, 0x9408)
|
|
|
|
|
AVR_INSN (seh, "", "1001010001011000", 1, AVR_ISA_1200, 0x9458)
|
|
|
|
|
AVR_INSN (sei, "", "1001010001111000", 1, AVR_ISA_1200, 0x9478)
|
|
|
|
|
AVR_INSN (sen, "", "1001010000101000", 1, AVR_ISA_1200, 0x9428)
|
|
|
|
|
AVR_INSN (ses, "", "1001010001001000", 1, AVR_ISA_1200, 0x9448)
|
|
|
|
|
AVR_INSN (set, "", "1001010001101000", 1, AVR_ISA_1200, 0x9468)
|
|
|
|
|
AVR_INSN (sev, "", "1001010000111000", 1, AVR_ISA_1200, 0x9438)
|
|
|
|
|
AVR_INSN (sez, "", "1001010000011000", 1, AVR_ISA_1200, 0x9418)
|
|
|
|
|
|
|
|
|
|
/* Same as {cl,se}[chinstvz] above. */
|
|
|
|
|
AVR_INSN (bclr, "S", "100101001SSS1000", 1, AVR_ISA_1200, 0x9488)
|
|
|
|
|
AVR_INSN (bset, "S", "100101000SSS1000", 1, AVR_ISA_1200, 0x9408)
|
|
|
|
|
|
2000-06-08 01:48:35 +08:00
|
|
|
AVR_INSN (icall,"", "1001010100001001", 1, AVR_ISA_2xxx, 0x9509)
|
|
|
|
|
AVR_INSN (ijmp, "", "1001010000001001", 1, AVR_ISA_2xxx, 0x9409)
|
2000-08-06 22:09:14 +08:00
|
|
|
|
2000-06-08 01:48:35 +08:00
|
|
|
AVR_INSN (lpm, "?", "1001010111001000", 1, AVR_ISA_TINY1,0x95c8)
|
|
|
|
|
AVR_INSN (lpm, "r,z", "1001000ddddd010+", 1, AVR_ISA_LPMX, 0x9004)
|
|
|
|
|
AVR_INSN (elpm, "?", "1001010111011000", 1, AVR_ISA_ELPM, 0x95d8)
|
|
|
|
|
AVR_INSN (elpm, "r,z", "1001000ddddd011+", 1, AVR_ISA_ELPMX,0x9006)
|
2000-08-06 22:09:14 +08:00
|
|
|
|
2000-06-08 01:48:35 +08:00
|
|
|
AVR_INSN (nop, "", "0000000000000000", 1, AVR_ISA_1200, 0x0000)
|
|
|
|
|
AVR_INSN (ret, "", "1001010100001000", 1, AVR_ISA_1200, 0x9508)
|
|
|
|
|
AVR_INSN (reti, "", "1001010100011000", 1, AVR_ISA_1200, 0x9518)
|
|
|
|
|
AVR_INSN (sleep,"", "1001010110001000", 1, AVR_ISA_1200, 0x9588)
|
2001-11-10 17:40:53 +08:00
|
|
|
AVR_INSN (break,"", "1001010110011000", 1, AVR_ISA_BRK, 0x9598)
|
2000-06-08 01:48:35 +08:00
|
|
|
AVR_INSN (wdr, "", "1001010110101000", 1, AVR_ISA_1200, 0x95a8)
|
2011-03-23 02:10:45 +08:00
|
|
|
AVR_INSN (spm, "?", "1001010111101000", 1, AVR_ISA_SPM, 0x95e8)
|
|
|
|
|
AVR_INSN (spm, "z", "10010101111+1000", 1, AVR_ISA_SPMX, 0x95e8)
|
2000-06-08 01:48:35 +08:00
|
|
|
|
|
|
|
|
AVR_INSN (adc, "r,r", "000111rdddddrrrr", 1, AVR_ISA_1200, 0x1c00)
|
|
|
|
|
AVR_INSN (add, "r,r", "000011rdddddrrrr", 1, AVR_ISA_1200, 0x0c00)
|
|
|
|
|
AVR_INSN (and, "r,r", "001000rdddddrrrr", 1, AVR_ISA_1200, 0x2000)
|
|
|
|
|
AVR_INSN (cp, "r,r", "000101rdddddrrrr", 1, AVR_ISA_1200, 0x1400)
|
|
|
|
|
AVR_INSN (cpc, "r,r", "000001rdddddrrrr", 1, AVR_ISA_1200, 0x0400)
|
|
|
|
|
AVR_INSN (cpse, "r,r", "000100rdddddrrrr", 1, AVR_ISA_1200, 0x1000)
|
|
|
|
|
AVR_INSN (eor, "r,r", "001001rdddddrrrr", 1, AVR_ISA_1200, 0x2400)
|
|
|
|
|
AVR_INSN (mov, "r,r", "001011rdddddrrrr", 1, AVR_ISA_1200, 0x2c00)
|
|
|
|
|
AVR_INSN (mul, "r,r", "100111rdddddrrrr", 1, AVR_ISA_MUL, 0x9c00)
|
|
|
|
|
AVR_INSN (or, "r,r", "001010rdddddrrrr", 1, AVR_ISA_1200, 0x2800)
|
|
|
|
|
AVR_INSN (sbc, "r,r", "000010rdddddrrrr", 1, AVR_ISA_1200, 0x0800)
|
|
|
|
|
AVR_INSN (sub, "r,r", "000110rdddddrrrr", 1, AVR_ISA_1200, 0x1800)
|
|
|
|
|
|
2000-08-06 22:09:14 +08:00
|
|
|
/* Shorthand for {eor,add,adc,and} r,r above. */
|
2000-06-10 02:02:05 +08:00
|
|
|
AVR_INSN (clr, "r=r", "001001rdddddrrrr", 1, AVR_ISA_1200, 0x2400)
|
|
|
|
|
AVR_INSN (lsl, "r=r", "000011rdddddrrrr", 1, AVR_ISA_1200, 0x0c00)
|
|
|
|
|
AVR_INSN (rol, "r=r", "000111rdddddrrrr", 1, AVR_ISA_1200, 0x1c00)
|
|
|
|
|
AVR_INSN (tst, "r=r", "001000rdddddrrrr", 1, AVR_ISA_1200, 0x2000)
|
|
|
|
|
|
2000-06-08 01:48:35 +08:00
|
|
|
AVR_INSN (andi, "d,M", "0111KKKKddddKKKK", 1, AVR_ISA_1200, 0x7000)
|
|
|
|
|
/*XXX special case*/
|
|
|
|
|
AVR_INSN (cbr, "d,n", "0111KKKKddddKKKK", 1, AVR_ISA_1200, 0x7000)
|
2000-08-06 22:09:14 +08:00
|
|
|
|
2000-06-08 01:48:35 +08:00
|
|
|
AVR_INSN (ldi, "d,M", "1110KKKKddddKKKK", 1, AVR_ISA_1200, 0xe000)
|
2000-08-06 22:09:14 +08:00
|
|
|
AVR_INSN (ser, "d", "11101111dddd1111", 1, AVR_ISA_1200, 0xef0f)
|
|
|
|
|
|
2000-06-08 01:48:35 +08:00
|
|
|
AVR_INSN (ori, "d,M", "0110KKKKddddKKKK", 1, AVR_ISA_1200, 0x6000)
|
|
|
|
|
AVR_INSN (sbr, "d,M", "0110KKKKddddKKKK", 1, AVR_ISA_1200, 0x6000)
|
2000-08-06 22:09:14 +08:00
|
|
|
|
|
|
|
|
AVR_INSN (cpi, "d,M", "0011KKKKddddKKKK", 1, AVR_ISA_1200, 0x3000)
|
|
|
|
|
AVR_INSN (sbci, "d,M", "0100KKKKddddKKKK", 1, AVR_ISA_1200, 0x4000)
|
2000-06-08 01:48:35 +08:00
|
|
|
AVR_INSN (subi, "d,M", "0101KKKKddddKKKK", 1, AVR_ISA_1200, 0x5000)
|
|
|
|
|
|
|
|
|
|
AVR_INSN (sbrc, "r,s", "1111110rrrrr0sss", 1, AVR_ISA_1200, 0xfc00)
|
|
|
|
|
AVR_INSN (sbrs, "r,s", "1111111rrrrr0sss", 1, AVR_ISA_1200, 0xfe00)
|
|
|
|
|
AVR_INSN (bld, "r,s", "1111100ddddd0sss", 1, AVR_ISA_1200, 0xf800)
|
|
|
|
|
AVR_INSN (bst, "r,s", "1111101ddddd0sss", 1, AVR_ISA_1200, 0xfa00)
|
|
|
|
|
|
|
|
|
|
AVR_INSN (in, "r,P", "10110PPdddddPPPP", 1, AVR_ISA_1200, 0xb000)
|
|
|
|
|
AVR_INSN (out, "P,r", "10111PPrrrrrPPPP", 1, AVR_ISA_1200, 0xb800)
|
|
|
|
|
|
|
|
|
|
AVR_INSN (adiw, "w,K", "10010110KKddKKKK", 1, AVR_ISA_2xxx, 0x9600)
|
|
|
|
|
AVR_INSN (sbiw, "w,K", "10010111KKddKKKK", 1, AVR_ISA_2xxx, 0x9700)
|
|
|
|
|
|
|
|
|
|
AVR_INSN (cbi, "p,s", "10011000pppppsss", 1, AVR_ISA_1200, 0x9800)
|
|
|
|
|
AVR_INSN (sbi, "p,s", "10011010pppppsss", 1, AVR_ISA_1200, 0x9a00)
|
|
|
|
|
AVR_INSN (sbic, "p,s", "10011001pppppsss", 1, AVR_ISA_1200, 0x9900)
|
|
|
|
|
AVR_INSN (sbis, "p,s", "10011011pppppsss", 1, AVR_ISA_1200, 0x9b00)
|
|
|
|
|
|
|
|
|
|
AVR_INSN (brcc, "l", "111101lllllll000", 1, AVR_ISA_1200, 0xf400)
|
|
|
|
|
AVR_INSN (brcs, "l", "111100lllllll000", 1, AVR_ISA_1200, 0xf000)
|
|
|
|
|
AVR_INSN (breq, "l", "111100lllllll001", 1, AVR_ISA_1200, 0xf001)
|
|
|
|
|
AVR_INSN (brge, "l", "111101lllllll100", 1, AVR_ISA_1200, 0xf404)
|
|
|
|
|
AVR_INSN (brhc, "l", "111101lllllll101", 1, AVR_ISA_1200, 0xf405)
|
|
|
|
|
AVR_INSN (brhs, "l", "111100lllllll101", 1, AVR_ISA_1200, 0xf005)
|
|
|
|
|
AVR_INSN (brid, "l", "111101lllllll111", 1, AVR_ISA_1200, 0xf407)
|
|
|
|
|
AVR_INSN (brie, "l", "111100lllllll111", 1, AVR_ISA_1200, 0xf007)
|
|
|
|
|
AVR_INSN (brlo, "l", "111100lllllll000", 1, AVR_ISA_1200, 0xf000)
|
|
|
|
|
AVR_INSN (brlt, "l", "111100lllllll100", 1, AVR_ISA_1200, 0xf004)
|
|
|
|
|
AVR_INSN (brmi, "l", "111100lllllll010", 1, AVR_ISA_1200, 0xf002)
|
|
|
|
|
AVR_INSN (brne, "l", "111101lllllll001", 1, AVR_ISA_1200, 0xf401)
|
|
|
|
|
AVR_INSN (brpl, "l", "111101lllllll010", 1, AVR_ISA_1200, 0xf402)
|
|
|
|
|
AVR_INSN (brsh, "l", "111101lllllll000", 1, AVR_ISA_1200, 0xf400)
|
|
|
|
|
AVR_INSN (brtc, "l", "111101lllllll110", 1, AVR_ISA_1200, 0xf406)
|
|
|
|
|
AVR_INSN (brts, "l", "111100lllllll110", 1, AVR_ISA_1200, 0xf006)
|
|
|
|
|
AVR_INSN (brvc, "l", "111101lllllll011", 1, AVR_ISA_1200, 0xf403)
|
|
|
|
|
AVR_INSN (brvs, "l", "111100lllllll011", 1, AVR_ISA_1200, 0xf003)
|
|
|
|
|
|
2000-08-06 22:09:14 +08:00
|
|
|
/* Same as br?? above. */
|
2000-06-08 01:48:35 +08:00
|
|
|
AVR_INSN (brbc, "s,l", "111101lllllllsss", 1, AVR_ISA_1200, 0xf400)
|
|
|
|
|
AVR_INSN (brbs, "s,l", "111100lllllllsss", 1, AVR_ISA_1200, 0xf000)
|
|
|
|
|
|
|
|
|
|
AVR_INSN (rcall, "L", "1101LLLLLLLLLLLL", 1, AVR_ISA_1200, 0xd000)
|
|
|
|
|
AVR_INSN (rjmp, "L", "1100LLLLLLLLLLLL", 1, AVR_ISA_1200, 0xc000)
|
|
|
|
|
|
|
|
|
|
AVR_INSN (call, "h", "1001010hhhhh111h", 2, AVR_ISA_MEGA, 0x940e)
|
|
|
|
|
AVR_INSN (jmp, "h", "1001010hhhhh110h", 2, AVR_ISA_MEGA, 0x940c)
|
|
|
|
|
|
|
|
|
|
AVR_INSN (asr, "r", "1001010rrrrr0101", 1, AVR_ISA_1200, 0x9405)
|
|
|
|
|
AVR_INSN (com, "r", "1001010rrrrr0000", 1, AVR_ISA_1200, 0x9400)
|
|
|
|
|
AVR_INSN (dec, "r", "1001010rrrrr1010", 1, AVR_ISA_1200, 0x940a)
|
|
|
|
|
AVR_INSN (inc, "r", "1001010rrrrr0011", 1, AVR_ISA_1200, 0x9403)
|
|
|
|
|
AVR_INSN (lsr, "r", "1001010rrrrr0110", 1, AVR_ISA_1200, 0x9406)
|
|
|
|
|
AVR_INSN (neg, "r", "1001010rrrrr0001", 1, AVR_ISA_1200, 0x9401)
|
|
|
|
|
AVR_INSN (pop, "r", "1001000rrrrr1111", 1, AVR_ISA_2xxx, 0x900f)
|
|
|
|
|
AVR_INSN (push, "r", "1001001rrrrr1111", 1, AVR_ISA_2xxx, 0x920f)
|
|
|
|
|
AVR_INSN (ror, "r", "1001010rrrrr0111", 1, AVR_ISA_1200, 0x9407)
|
|
|
|
|
AVR_INSN (swap, "r", "1001010rrrrr0010", 1, AVR_ISA_1200, 0x9402)
|
|
|
|
|
|
2012-06-08 00:43:36 +08:00
|
|
|
/* Atomic memory operations for XMEGA. List before `sts'. */
|
2013-06-01 15:14:44 +08:00
|
|
|
AVR_INSN (xch, "z,r", "1001001rrrrr0100", 1, AVR_ISA_RMW, 0x9204)
|
|
|
|
|
AVR_INSN (las, "z,r", "1001001rrrrr0101", 1, AVR_ISA_RMW, 0x9205)
|
|
|
|
|
AVR_INSN (lac, "z,r", "1001001rrrrr0110", 1, AVR_ISA_RMW, 0x9206)
|
|
|
|
|
AVR_INSN (lat, "z,r", "1001001rrrrr0111", 1, AVR_ISA_RMW, 0x9207)
|
2012-06-08 00:43:36 +08:00
|
|
|
|
2000-08-06 22:09:14 +08:00
|
|
|
/* Known to be decoded as `nop' by the old core. */
|
* gas/config/tc-avr.c: Add support for
atmega48, atmega88, atmega168, attiny13, attiny2313, at90can128.
* include/opcode/avr.h: Add support for
atmega48, atmega88, atmega168, attiny13, attiny2313, at90can128.
2004-09-11 21:15:05 +08:00
|
|
|
AVR_INSN (movw, "v,v", "00000001ddddrrrr", 1, AVR_ISA_MOVW, 0x0100)
|
2000-06-08 01:48:35 +08:00
|
|
|
AVR_INSN (muls, "d,d", "00000010ddddrrrr", 1, AVR_ISA_MUL, 0x0200)
|
|
|
|
|
AVR_INSN (mulsu,"a,a", "000000110ddd0rrr", 1, AVR_ISA_MUL, 0x0300)
|
|
|
|
|
AVR_INSN (fmul, "a,a", "000000110ddd1rrr", 1, AVR_ISA_MUL, 0x0308)
|
|
|
|
|
AVR_INSN (fmuls,"a,a", "000000111ddd0rrr", 1, AVR_ISA_MUL, 0x0380)
|
|
|
|
|
AVR_INSN (fmulsu,"a,a","000000111ddd1rrr", 1, AVR_ISA_MUL, 0x0388)
|
2000-06-27 09:45:30 +08:00
|
|
|
|
2000-06-08 01:48:35 +08:00
|
|
|
AVR_INSN (sts, "i,r", "1001001ddddd0000", 2, AVR_ISA_2xxx, 0x9200)
|
|
|
|
|
AVR_INSN (lds, "r,i", "1001000ddddd0000", 2, AVR_ISA_2xxx, 0x9000)
|
2000-08-06 22:09:14 +08:00
|
|
|
|
|
|
|
|
/* Special case for b+0, `e' must be next entry after `b',
|
|
|
|
|
b={Y=1,Z=0}, ee={X=11,Y=10,Z=00}, !=1 if -e or e+ or X. */
|
2000-06-08 01:48:35 +08:00
|
|
|
AVR_INSN (ldd, "r,b", "10o0oo0dddddbooo", 1, AVR_ISA_2xxx, 0x8000)
|
|
|
|
|
AVR_INSN (ld, "r,e", "100!000dddddee-+", 1, AVR_ISA_1200, 0x8000)
|
2000-08-06 22:09:14 +08:00
|
|
|
AVR_INSN (std, "b,r", "10o0oo1rrrrrbooo", 1, AVR_ISA_2xxx, 0x8200)
|
2000-06-08 01:48:35 +08:00
|
|
|
AVR_INSN (st, "e,r", "100!001rrrrree-+", 1, AVR_ISA_1200, 0x8200)
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2000-08-06 22:09:14 +08:00
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/* These are for devices that don't exist yet
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(>128K program memory, PC = EIND:Z). */
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2000-06-27 09:45:30 +08:00
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AVR_INSN (eicall, "", "1001010100011001", 1, AVR_ISA_EIND, 0x9519)
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AVR_INSN (eijmp, "", "1001010000011001", 1, AVR_ISA_EIND, 0x9419)
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2011-03-23 02:10:45 +08:00
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/* DES instruction for encryption and decryption */
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AVR_INSN (des, "E", "10010100EEEE1011", 1, AVR_ISA_DES, 0x940B)
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