libs/FreeModbus_Slave-Master-RTT-STM32
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FreeModbus_Slave-Master-RTT-STM32
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Merge branch 'master' of ssh://git@github.com/armink/FreeModbus_Slaver-Master-RTT-STM32.git

This commit is contained in:
armink 2014-01-07 23:40:06 +08:00
parent 01a1f809cf ae25bf68c2
commit f88aa70856
4 changed files with 22 additions and 7 deletions
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12
FreeModbus/port/port.c
View File

@ -1,6 +1,6 @@
/* /*
* FreeModbus Libary: LPC214X Port * FreeModbus Libary: STM32 Port
* Copyright (C) 2007 Tiago Prado Lone <tiago@maxwellbohr.com.br> * Copyright (C) 2013 Armink <armink.ztl@gmail.com>
* *
* This library is free software; you can redistribute it and/or * This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public * modify it under the terms of the GNU Lesser General Public
@ -16,7 +16,7 @@
* License along with this library; if not, write to the Free Software * License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
* *
* File: $Id: port.c,v 1.1 2007/04/24 23:15:18 wolti Exp $ * File: $Id: portevent.c,v 1.60 2013/12/28 9:18:05 Armink $
*/ */
/* ----------------------- System includes --------------------------------*/ /* ----------------------- System includes --------------------------------*/
@ -37,3 +37,9 @@ void ExitCriticalSection(void)
//开启全局中断 //开启全局中断
__enable_irq(); __enable_irq();
} }
void vMBDelay(ULONG nCount)
{
for(; nCount > 0;nCount--);
}

9
FreeModbus/port/port.h
View File

@ -1,6 +1,6 @@
/* /*
* FreeModbus Libary: BARE Port * FreeModbus Libary: BARE Port
* Copyright (C) 2006 Christian Walter <wolti@sil.at> * Copyright (C) 2013 Armink <armink.ztl@gmail.com>
* *
* This library is free software; you can redistribute it and/or * This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public * modify it under the terms of the GNU Lesser General Public
@ -43,9 +43,6 @@
#define ENTER_CRITICAL_SECTION() EnterCriticalSection() #define ENTER_CRITICAL_SECTION() EnterCriticalSection()
#define EXIT_CRITICAL_SECTION() ExitCriticalSection() #define EXIT_CRITICAL_SECTION() ExitCriticalSection()
void EnterCriticalSection(void);
void ExitCriticalSection(void);
typedef uint8_t BOOL; typedef uint8_t BOOL;
typedef unsigned char UCHAR; typedef unsigned char UCHAR;
@ -65,4 +62,8 @@ typedef int32_t LONG;
#define FALSE 0 #define FALSE 0
#endif #endif
void EnterCriticalSection(void);
void ExitCriticalSection(void);
void vMBDelay(ULONG nCount);
#endif #endif

4
FreeModbus/port/portserial.c
View File

@ -33,6 +33,10 @@ void vMBPortSerialEnable(BOOL xRxEnable, BOOL xTxEnable)
{ {
if (xRxEnable) if (xRxEnable)
{ {
/* 485通信时，等待串口移位寄存器中的数据发送完成后，再去使能485的接收、失能485的发送
* 该延时时间可以结合CPU主频及串口波特率做适当调整
* */
vMBDelay(1000);
SLAVE_RS485_RECEIVE_MODE; SLAVE_RS485_RECEIVE_MODE;
USART_ITConfig(USART1, USART_IT_RXNE, ENABLE); USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
} }

4
FreeModbus/port/portserial_m.c
View File

@ -35,6 +35,10 @@ void vMBMasterPortSerialEnable(BOOL xRxEnable, BOOL xTxEnable)
{ {
if (xRxEnable) if (xRxEnable)
{ {
/* 485通信时，等待串口移位寄存器中的数据发送完成后，再去使能485的接收、失能485的发送
* 该延时时间可以结合CPU主频及串口波特率做适当调整
* */
vMBDelay(1000);
MASTER_RS485_RECEIVE_MODE; MASTER_RS485_RECEIVE_MODE;
USART_ITConfig(USART2, USART_IT_RXNE, ENABLE); USART_ITConfig(USART2, USART_IT_RXNE, ENABLE);
} }