降低串口丢帧率
This commit is contained in:
parent
8d8b5f8c45
commit
6d60af7c21
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@ -22,7 +22,7 @@
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"USE_HAL_DRIVER",
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"USE_HAL_DRIVER",
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"STM32F407xx"
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"STM32F407xx"
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],
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],
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"compilerPath": "D:\\mingw64\\bin\\gcc.exe",
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"compilerPath": "D:\\gcc-arm-none-eabi\\10 2020-q4-major\\bin\\arm-none-eabi-gcc.exe",
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"cStandard": "gnu17",
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"cStandard": "gnu17",
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"cppStandard": "gnu++14"
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"cppStandard": "gnu++14"
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}
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}
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@ -11,6 +11,8 @@ void Mb_m_Task(void *argument)
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mbMasterStack.hardware.max485.dirPin = USART2_DIR_Pin;
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mbMasterStack.hardware.max485.dirPin = USART2_DIR_Pin;
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mbMasterStack.hardware.max485.dirPort = USART2_DIR_GPIO_Port;
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mbMasterStack.hardware.max485.dirPort = USART2_DIR_GPIO_Port;
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mbMasterStack.hardware.phtim = &htim3;
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mbMasterStack.hardware.phtim = &htim3;
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mbMasterStack.hardware.uartIRQn = USART2_IRQn;
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mbMasterStack.hardware.timIRQn = TIM3_IRQn;
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eMBMasterInit(&mbMasterStack, MB_RTU, 2, 115200, MB_PAR_NONE);
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eMBMasterInit(&mbMasterStack, MB_RTU, 2, 115200, MB_PAR_NONE);
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eMBMasterEnable(&mbMasterStack);
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eMBMasterEnable(&mbMasterStack);
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while (1)
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while (1)
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@ -10,6 +10,8 @@ void Mb_Task(void *argument)
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mbStack.hardware.max485.dirPin = USART1_DIR_Pin;
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mbStack.hardware.max485.dirPin = USART1_DIR_Pin;
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mbStack.hardware.max485.dirPort = USART1_DIR_GPIO_Port;
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mbStack.hardware.max485.dirPort = USART1_DIR_GPIO_Port;
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mbStack.hardware.phtim = &htim4;
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mbStack.hardware.phtim = &htim4;
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mbStack.hardware.uartIRQn = USART1_IRQn;
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mbStack.hardware.timIRQn = TIM4_IRQn;
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eMBInit(&mbStack, MB_RTU, 0x01, 1, 115200, MB_PAR_NONE);
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eMBInit(&mbStack, MB_RTU, 0x01, 1, 115200, MB_PAR_NONE);
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eMBEnable(&mbStack);
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eMBEnable(&mbStack);
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while (1)
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while (1)
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@ -204,6 +204,10 @@ void USART1_IRQHandler(void)
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uint32_t isrflags = READ_REG(huart1.Instance->SR);
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uint32_t isrflags = READ_REG(huart1.Instance->SR);
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uint32_t cr1its = READ_REG(huart1.Instance->CR1);
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uint32_t cr1its = READ_REG(huart1.Instance->CR1);
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uint32_t errorflags = 0x00U;
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/* If no error occurs */
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errorflags = (isrflags & (uint32_t)(USART_SR_PE | USART_SR_FE | USART_SR_ORE | USART_SR_NE));
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/* UART in mode Receiver -------------------------------------------------*/
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/* UART in mode Receiver -------------------------------------------------*/
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if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
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if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
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{
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{
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@ -213,8 +217,11 @@ void USART1_IRQHandler(void)
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{
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{
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mbStack.peMBFrameCBTransmitterEmptyCur((void *)&mbStack);
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mbStack.peMBFrameCBTransmitterEmptyCur((void *)&mbStack);
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}
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}
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/* USER CODE END USART1_IRQn 0 */
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HAL_UART_IRQHandler(&huart1);
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if (errorflags == SET)
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{
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__HAL_UART_CLEAR_PEFLAG(&huart1);
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}
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/* USER CODE BEGIN USART1_IRQn 1 */
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/* USER CODE BEGIN USART1_IRQn 1 */
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/* USER CODE END USART1_IRQn 1 */
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/* USER CODE END USART1_IRQn 1 */
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@ -230,6 +237,10 @@ void USART2_IRQHandler(void)
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uint32_t isrflags = READ_REG(huart2.Instance->SR);
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uint32_t isrflags = READ_REG(huart2.Instance->SR);
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uint32_t cr1its = READ_REG(huart2.Instance->CR1);
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uint32_t cr1its = READ_REG(huart2.Instance->CR1);
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uint32_t errorflags = 0x00U;
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/* If no error occurs */
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errorflags = (isrflags & (uint32_t)(USART_SR_PE | USART_SR_FE | USART_SR_ORE | USART_SR_NE));
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/* UART in mode Receiver -------------------------------------------------*/
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/* UART in mode Receiver -------------------------------------------------*/
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if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
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if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
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{
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{
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@ -240,8 +251,10 @@ void USART2_IRQHandler(void)
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mbMasterStack.peMBMasterFrameCBTransmitterEmptyCur((void *)&mbMasterStack);
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mbMasterStack.peMBMasterFrameCBTransmitterEmptyCur((void *)&mbMasterStack);
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}
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}
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/* USER CODE END USART2_IRQn 0 */
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if (errorflags == SET)
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HAL_UART_IRQHandler(&huart2);
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{
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__HAL_UART_CLEAR_PEFLAG(&huart1);
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}
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/* USER CODE BEGIN USART2_IRQn 1 */
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/* USER CODE BEGIN USART2_IRQn 1 */
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/* USER CODE END USART2_IRQn 1 */
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/* USER CODE END USART2_IRQn 1 */
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@ -242,29 +242,6 @@ eMBErrorCode eMBSetSlaveID( UCHAR ucSlaveID, BOOL xIsRunning,
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UCHAR const *pucAdditional,
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UCHAR const *pucAdditional,
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USHORT usAdditionalLen );
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USHORT usAdditionalLen );
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/*! \ingroup modbus
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* \brief Registers a callback handler for a given function code.
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*
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* This function registers a new callback handler for a given function code.
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* The callback handler supplied is responsible for interpreting the Modbus PDU and
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* the creation of an appropriate response. In case of an error it should return
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* one of the possible Modbus exceptions which results in a Modbus exception frame
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* sent by the protocol stack.
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*
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* \param ucFunctionCode The Modbus function code for which this handler should
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* be registers. Valid function codes are in the range 1 to 127.
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* \param pxHandler The function handler which should be called in case
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* such a frame is received. If \c NULL a previously registered function handler
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* for this function code is removed.
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*
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* \return eMBErrorCode::MB_ENOERR if the handler has been installed. If no
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* more resources are available it returns eMBErrorCode::MB_ENORES. In this
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* case the values in mbconfig.h should be adjusted. If the argument was not
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* valid it returns eMBErrorCode::MB_EINVAL.
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*/
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eMBErrorCode eMBRegisterCB( UCHAR ucFunctionCode,
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pxMBFunctionHandler pxHandler );
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/* ----------------------- Callback -----------------------------------------*/
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/* ----------------------- Callback -----------------------------------------*/
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/*! \defgroup modbus_registers Modbus Registers
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/*! \defgroup modbus_registers Modbus Registers
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@ -194,53 +194,6 @@ eMBTCPInit( USHORT ucTCPPort )
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}
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}
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#endif
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#endif
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eMBErrorCode
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eMBRegisterCB( UCHAR ucFunctionCode, pxMBFunctionHandler pxHandler )
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{
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int i;
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eMBErrorCode eStatus;
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if( ( 0 < ucFunctionCode ) && ( ucFunctionCode <= 127 ) )
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{
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ENTER_CRITICAL_SECTION( );
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if( pxHandler != NULL )
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{
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for( i = 0; i < MB_FUNC_HANDLERS_MAX; i++ )
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{
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if( ( xFuncHandlers[i].pxHandler == NULL ) ||
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( xFuncHandlers[i].pxHandler == pxHandler ) )
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{
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xFuncHandlers[i].ucFunctionCode = ucFunctionCode;
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xFuncHandlers[i].pxHandler = pxHandler;
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break;
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}
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}
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eStatus = ( i != MB_FUNC_HANDLERS_MAX ) ? MB_ENOERR : MB_ENORES;
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}
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else
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{
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for( i = 0; i < MB_FUNC_HANDLERS_MAX; i++ )
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{
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if( xFuncHandlers[i].ucFunctionCode == ucFunctionCode )
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{
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xFuncHandlers[i].ucFunctionCode = 0;
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xFuncHandlers[i].pxHandler = NULL;
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break;
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}
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}
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/* Remove can't fail. */
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eStatus = MB_ENOERR;
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}
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EXIT_CRITICAL_SECTION( );
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}
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else
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{
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eStatus = MB_EINVAL;
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}
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return eStatus;
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}
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eMBErrorCode
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eMBErrorCode
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eMBClose( void * this )
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eMBClose( void * this )
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{
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{
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@ -64,7 +64,7 @@ eMBRTUInit( void * this, UCHAR ucSlaveAddress, UCHAR ucPort, ULONG ulBaudRate, e
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pMB_StackTypeDef p = (pMB_StackTypeDef)this;
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pMB_StackTypeDef p = (pMB_StackTypeDef)this;
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( void )ucSlaveAddress;
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( void )ucSlaveAddress;
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ENTER_CRITICAL_SECTION( );
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ENTER_CRITICAL_SECTION( p );
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/* Modbus RTU uses 8 Databits. */
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/* Modbus RTU uses 8 Databits. */
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if( xMBPortSerialInit( (void *)&(p->hardware.max485), ucPort, ulBaudRate, 8, eParity ) != TRUE )
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if( xMBPortSerialInit( (void *)&(p->hardware.max485), ucPort, ulBaudRate, 8, eParity ) != TRUE )
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@ -97,7 +97,7 @@ eMBRTUInit( void * this, UCHAR ucSlaveAddress, UCHAR ucPort, ULONG ulBaudRate, e
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eStatus = MB_EPORTERR;
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eStatus = MB_EPORTERR;
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}
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}
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}
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}
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EXIT_CRITICAL_SECTION( );
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EXIT_CRITICAL_SECTION( p );
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return eStatus;
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return eStatus;
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}
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}
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eMBRTUStart( void * this )
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eMBRTUStart( void * this )
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{
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{
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pMB_StackTypeDef p = (pMB_StackTypeDef)this;
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pMB_StackTypeDef p = (pMB_StackTypeDef)this;
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ENTER_CRITICAL_SECTION( );
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ENTER_CRITICAL_SECTION( p );
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/* Initially the receiver is in the state STATE_RX_INIT. we start
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/* Initially the receiver is in the state STATE_RX_INIT. we start
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* the timer and if no character is received within t3.5 we change
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* the timer and if no character is received within t3.5 we change
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* to STATE_RX_IDLE. This makes sure that we delay startup of the
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* to STATE_RX_IDLE. This makes sure that we delay startup of the
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@ -116,17 +116,17 @@ eMBRTUStart( void * this )
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vMBPortSerialEnable( (void *)&(p->hardware.max485), TRUE, FALSE );
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vMBPortSerialEnable( (void *)&(p->hardware.max485), TRUE, FALSE );
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vMBPortTimersEnable( p->hardware.phtim );
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vMBPortTimersEnable( p->hardware.phtim );
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EXIT_CRITICAL_SECTION( );
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EXIT_CRITICAL_SECTION( p );
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}
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}
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void
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void
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eMBRTUStop( void * this )
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eMBRTUStop( void * this )
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{
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{
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pMB_StackTypeDef p = (pMB_StackTypeDef)this;
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pMB_StackTypeDef p = (pMB_StackTypeDef)this;
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ENTER_CRITICAL_SECTION( );
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ENTER_CRITICAL_SECTION( p );
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vMBPortSerialEnable( (void *)&(p->hardware.max485), FALSE, FALSE );
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vMBPortSerialEnable( (void *)&(p->hardware.max485), FALSE, FALSE );
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vMBPortTimersDisable( p->hardware.phtim );
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vMBPortTimersDisable( p->hardware.phtim );
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EXIT_CRITICAL_SECTION( );
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EXIT_CRITICAL_SECTION( p );
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}
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}
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eMBErrorCode
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eMBErrorCode
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@ -135,7 +135,7 @@ eMBRTUReceive( void * this, UCHAR * pucRcvAddress, UCHAR ** pucFrame, USHORT * p
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eMBErrorCode eStatus = MB_ENOERR;
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eMBErrorCode eStatus = MB_ENOERR;
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pMB_StackTypeDef p = (pMB_StackTypeDef)this;
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pMB_StackTypeDef p = (pMB_StackTypeDef)this;
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ENTER_CRITICAL_SECTION( );
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ENTER_CRITICAL_SECTION( p );
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assert_param( p->usRcvBufferPos < MB_SER_PDU_SIZE_MAX );
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assert_param( p->usRcvBufferPos < MB_SER_PDU_SIZE_MAX );
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/* Length and CRC check */
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/* Length and CRC check */
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@ -160,7 +160,7 @@ eMBRTUReceive( void * this, UCHAR * pucRcvAddress, UCHAR ** pucFrame, USHORT * p
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eStatus = MB_EIO;
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eStatus = MB_EIO;
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}
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}
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EXIT_CRITICAL_SECTION( );
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EXIT_CRITICAL_SECTION( p );
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return eStatus;
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return eStatus;
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}
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}
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@ -171,7 +171,7 @@ eMBRTUSend( void * this, UCHAR ucSlaveAddress, const UCHAR * pucFrame, USHORT us
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USHORT usCRC16;
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USHORT usCRC16;
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pMB_StackTypeDef p = (pMB_StackTypeDef)this;
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pMB_StackTypeDef p = (pMB_StackTypeDef)this;
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ENTER_CRITICAL_SECTION( );
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ENTER_CRITICAL_SECTION( p );
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/* Check if the receiver is still in idle state. If not we where to
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/* Check if the receiver is still in idle state. If not we where to
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* slow with processing the received frame and the master sent another
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* slow with processing the received frame and the master sent another
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@ -200,7 +200,7 @@ eMBRTUSend( void * this, UCHAR ucSlaveAddress, const UCHAR * pucFrame, USHORT us
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{
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{
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eStatus = MB_EIO;
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eStatus = MB_EIO;
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}
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}
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EXIT_CRITICAL_SECTION( );
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EXIT_CRITICAL_SECTION( p );
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return eStatus;
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return eStatus;
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}
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}
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@ -61,7 +61,7 @@ eMBMasterRTUInit(void * this, UCHAR ucPort, ULONG ulBaudRate, eMBParity eParity
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ULONG usTimerT35_50us;
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ULONG usTimerT35_50us;
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pMB_M_StackTypeDef p = (pMB_M_StackTypeDef)this;
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pMB_M_StackTypeDef p = (pMB_M_StackTypeDef)this;
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ENTER_CRITICAL_SECTION( );
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ENTER_CRITICAL_SECTION( p );
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/* Modbus RTU uses 8 Databits. */
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/* Modbus RTU uses 8 Databits. */
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if( xMBMasterPortSerialInit( (void *)&(p->hardware.max485), ucPort, ulBaudRate, 8, eParity ) != TRUE )
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if( xMBMasterPortSerialInit( (void *)&(p->hardware.max485), ucPort, ulBaudRate, 8, eParity ) != TRUE )
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@ -94,7 +94,7 @@ eMBMasterRTUInit(void * this, UCHAR ucPort, ULONG ulBaudRate, eMBParity eParity
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eStatus = MB_EPORTERR;
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eStatus = MB_EPORTERR;
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}
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}
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}
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}
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EXIT_CRITICAL_SECTION( );
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EXIT_CRITICAL_SECTION( p );
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return eStatus;
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return eStatus;
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}
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}
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eMBMasterRTUStart( void * this )
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eMBMasterRTUStart( void * this )
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{
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{
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pMB_M_StackTypeDef p = (pMB_M_StackTypeDef)this;
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pMB_M_StackTypeDef p = (pMB_M_StackTypeDef)this;
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ENTER_CRITICAL_SECTION( );
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ENTER_CRITICAL_SECTION( p );
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/* Initially the receiver is in the state STATE_M_RX_INIT. we start
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/* Initially the receiver is in the state STATE_M_RX_INIT. we start
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* the timer and if no character is received within t3.5 we change
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* the timer and if no character is received within t3.5 we change
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* to STATE_M_RX_IDLE. This makes sure that we delay startup of the
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* to STATE_M_RX_IDLE. This makes sure that we delay startup of the
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@ -113,17 +113,17 @@ eMBMasterRTUStart( void * this )
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vMBMasterPortSerialEnable( (void *)&(p->hardware.max485), TRUE, FALSE );
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vMBMasterPortSerialEnable( (void *)&(p->hardware.max485), TRUE, FALSE );
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vMBMasterPortTimersT35Enable( this );
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vMBMasterPortTimersT35Enable( this );
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EXIT_CRITICAL_SECTION( );
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EXIT_CRITICAL_SECTION( p );
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}
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}
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void
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void
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eMBMasterRTUStop( void * this )
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eMBMasterRTUStop( void * this )
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{
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{
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pMB_M_StackTypeDef p = (pMB_M_StackTypeDef)this;
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pMB_M_StackTypeDef p = (pMB_M_StackTypeDef)this;
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ENTER_CRITICAL_SECTION( );
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ENTER_CRITICAL_SECTION( p );
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vMBMasterPortSerialEnable( (void*)&(p->hardware.max485), FALSE, FALSE );
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vMBMasterPortSerialEnable( (void*)&(p->hardware.max485), FALSE, FALSE );
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vMBMasterPortTimersDisable( (void *)(p->hardware.phtim) );
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vMBMasterPortTimersDisable( (void *)(p->hardware.phtim) );
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EXIT_CRITICAL_SECTION( );
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EXIT_CRITICAL_SECTION( p );
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}
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}
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||||||
eMBErrorCode
|
eMBErrorCode
|
||||||
|
@ -132,7 +132,7 @@ eMBMasterRTUReceive( void * this, UCHAR * pucRcvAddress, UCHAR ** pucFrame, USHO
|
||||||
eMBErrorCode eStatus = MB_ENOERR;
|
eMBErrorCode eStatus = MB_ENOERR;
|
||||||
pMB_M_StackTypeDef p = (pMB_M_StackTypeDef)this;
|
pMB_M_StackTypeDef p = (pMB_M_StackTypeDef)this;
|
||||||
|
|
||||||
ENTER_CRITICAL_SECTION( );
|
ENTER_CRITICAL_SECTION( p );
|
||||||
assert_param( p->usMasterRcvBufferPos < MB_SER_PDU_SIZE_MAX );
|
assert_param( p->usMasterRcvBufferPos < MB_SER_PDU_SIZE_MAX );
|
||||||
|
|
||||||
/* Length and CRC check */
|
/* Length and CRC check */
|
||||||
|
@ -157,7 +157,7 @@ eMBMasterRTUReceive( void * this, UCHAR * pucRcvAddress, UCHAR ** pucFrame, USHO
|
||||||
eStatus = MB_EIO;
|
eStatus = MB_EIO;
|
||||||
}
|
}
|
||||||
|
|
||||||
EXIT_CRITICAL_SECTION( );
|
EXIT_CRITICAL_SECTION( p );
|
||||||
return eStatus;
|
return eStatus;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -170,7 +170,7 @@ eMBMasterRTUSend( void * this, UCHAR ucSlaveAddress, const UCHAR * pucFrame, USH
|
||||||
|
|
||||||
if ( ucSlaveAddress > MB_MASTER_TOTAL_SLAVE_NUM ) return MB_EINVAL;
|
if ( ucSlaveAddress > MB_MASTER_TOTAL_SLAVE_NUM ) return MB_EINVAL;
|
||||||
|
|
||||||
ENTER_CRITICAL_SECTION( );
|
ENTER_CRITICAL_SECTION( p );
|
||||||
|
|
||||||
/* Check if the receiver is still in idle state. If not we where to
|
/* Check if the receiver is still in idle state. If not we where to
|
||||||
* slow with processing the received frame and the master sent another
|
* slow with processing the received frame and the master sent another
|
||||||
|
@ -199,7 +199,7 @@ eMBMasterRTUSend( void * this, UCHAR ucSlaveAddress, const UCHAR * pucFrame, USH
|
||||||
{
|
{
|
||||||
eStatus = MB_EIO;
|
eStatus = MB_EIO;
|
||||||
}
|
}
|
||||||
EXIT_CRITICAL_SECTION( );
|
EXIT_CRITICAL_SECTION( p );
|
||||||
return eStatus;
|
return eStatus;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -31,8 +31,19 @@
|
||||||
|
|
||||||
#define INLINE inline
|
#define INLINE inline
|
||||||
|
|
||||||
#define ENTER_CRITICAL_SECTION() vPortEnterCritical()
|
#define ENTER_CRITICAL_SECTION(x) \
|
||||||
#define EXIT_CRITICAL_SECTION() vPortExitCritical()
|
do \
|
||||||
|
{ \
|
||||||
|
HAL_NVIC_DisableIRQ((x)->hardware.uartIRQn); \
|
||||||
|
HAL_NVIC_DisableIRQ((x)->hardware.timIRQn); \
|
||||||
|
} while (0)
|
||||||
|
|
||||||
|
#define EXIT_CRITICAL_SECTION(x) \
|
||||||
|
do \
|
||||||
|
{ \
|
||||||
|
HAL_NVIC_EnableIRQ((x)->hardware.uartIRQn); \
|
||||||
|
HAL_NVIC_EnableIRQ((x)->hardware.timIRQn); \
|
||||||
|
} while (0)
|
||||||
|
|
||||||
typedef uint8_t BOOL;
|
typedef uint8_t BOOL;
|
||||||
|
|
||||||
|
@ -64,9 +75,8 @@ typedef struct
|
||||||
{
|
{
|
||||||
Max485TypeDef max485;
|
Max485TypeDef max485;
|
||||||
TIM_HandleTypeDef *phtim;
|
TIM_HandleTypeDef *phtim;
|
||||||
|
IRQn_Type uartIRQn;
|
||||||
|
IRQn_Type timIRQn;
|
||||||
} MB_RTU_Hardware, *pMB_RTU_Hardware;
|
} MB_RTU_Hardware, *pMB_RTU_Hardware;
|
||||||
|
|
||||||
void vPortEnterCritical(void);
|
|
||||||
void vPortExitCritical(void);
|
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
Loading…
Reference in New Issue