65 lines
3.8 KiB
Plaintext
65 lines
3.8 KiB
Plaintext
X VBAT 1 2300 100 150 L 50 50 1 1 B
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X PC13/RTC_TAMP1/RTC_OUT/RTC_TS 2 2300 200 150 L 50 50 1 1 B
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X PC14/OSC32_IN 3 2300 300 150 L 50 50 1 1 B
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X PC15/OSC32_OUT 4 2300 400 150 L 50 50 1 1 B
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X PH0/OSC_IN 5 2300 500 150 L 50 50 1 1 B
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X PH1/OSC_OUT 6 2300 600 150 L 50 50 1 1 B
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X NRST 7 2300 700 150 L 50 50 1 1 B
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X PC0/ADC1_IN10 8 2300 800 150 L 50 50 1 1 B
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X PC1/ADC1_IN11 9 2300 900 150 L 50 50 1 1 B
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X PC2/SPI2_MISO/I2S2ext_SD/ADC1_IN12 10 2300 1000 150 L 50 50 1 1 B
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X PC3/SPI2_MOSI/I2S2_SD/ADC1_IN13 11 2300 1100 150 L 50 50 1 1 B
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X VSSA/VREF- 12 2300 1200 150 L 50 50 1 1 B
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X VDDA/VREF+ 13 2300 1300 150 L 50 50 1 1 B
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X PA0/USART2_CTS/TIM2_CH1/TIM2_ETR/TIM5_CH1/ADC1_IN0/WKUP 14 2300 1400 150 L 50 50 1 1 B
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X PA1/USART2_RTS/TIM2_CH2/TIM5_CH2/ADC1_IN1 15 2300 1500 150 L 50 50 1 1 B
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X PA2/USART2_TX/TIM2_CH3/TIM5_CH3/TIM9_CH1/ADC1_IN2 16 2300 1600 150 L 50 50 1 1 B
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X PA3/USART2_RX/TIM2_CH4/TIM5_CH4/TIM9_CH2/ADC1_IN3 17 2300 1700 150 L 50 50 1 1 B
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X VSS 18 2300 1800 150 L 50 50 1 1 B
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X VDD 19 2300 1900 150 L 50 50 1 1 B
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X PA4/SPI1_NSS/SPI3_NSS/I2S3_WS/USART2_CK/ADC1_IN4 20 2300 2000 150 L 50 50 1 1 B
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X PA5/SPI1_SCK/TIM2_CH1/TIM2_ETR/ADC1_IN5 21 2300 2100 150 L 50 50 1 1 B
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X PA6/SPI1_MISO/TIM1_BKIN/TIM3_CH1/ADC1_IN6 22 2300 2200 150 L 50 50 1 1 B
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X PA7/SPI1_MOSI/TIM1_CH1N/TIM3_CH2/ADC1_IN7 23 2300 2300 150 L 50 50 1 1 B
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X PC4/ADC1_IN14 24 2300 2400 150 L 50 50 1 1 B
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X PC5/ADC1_IN15 25 2300 2500 150 L 50 50 1 1 B
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X PB0/TIM1_CH2N/TIM3_CH3/ADC1_IN8 26 2300 2600 150 L 50 50 1 1 B
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X PB1/TIM1_CH3N/TIM3_CH4/ADC1_IN9 27 2300 2700 150 L 50 50 1 1 B
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X PB2/BOOT1 28 2300 2800 150 L 50 50 1 1 B
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X PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/TIM2_CH3 29 2300 2900 150 L 50 50 1 1 B
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X VCAP_1 30 2300 3000 150 L 50 50 1 1 B
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X VSS 31 2300 3100 150 L 50 50 1 1 B
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X VDD 32 2300 3200 150 L 50 50 1 1 B
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X PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/TIM1_BKIN 33 2300 3300 150 L 50 50 1 1 B
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X PB13/SPI2_SCK/I2S2_CK/TIM1_CH1N 34 2300 3400 150 L 50 50 1 1 B
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X PB14/SPI2_MISO/I2S2ext_SD/TIM1_CH2N 35 2300 3500 150 L 50 50 1 1 B
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X PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/RTC_REFIN 36 2300 3600 150 L 50 50 1 1 B
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X PC6/I2S2_MCK/USART6_TX/TIM3_CH1/SDIO_D6 37 2300 3700 150 L 50 50 1 1 B
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X PC7/I2S3_MCK/USART6_RX/TIM3_CH2/SDIO_D7 38 2300 3800 150 L 50 50 1 1 B
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X PC8/USART6_CK/TIM3_CH3/SDIO_D0 39 2300 3900 150 L 50 50 1 1 B
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X PC9/I2S_CKIN/I2C3_SDA/TIM3_CH4/SDIO_D1/MCO_2 40 2300 4000 150 L 50 50 1 1 B
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X PA8/I2C3_SCL/USART1_CK/TIM1_CH1/OTG_FS_SOF/MCO_1 41 2300 4100 150 L 50 50 1 1 B
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X PA9/I2C3_SMBA/USART1_TX/TIM1_CH2/OTG_FS_VBUS 42 2300 4200 150 L 50 50 1 1 B
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X PA10/USART1_RX/TIM1_CH3/OTG_FS_ID 43 2300 4300 150 L 50 50 1 1 B
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X PA11/USART1_CTS/USART6_TX/TIM1_CH4/OTG_FS_DM 44 2300 4400 150 L 50 50 1 1 B
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X PA12/USART1_RTS/USART6_RX/TIM1_ETR/OTG_FS_DP 45 2300 4500 150 L 50 50 1 1 B
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X PA13/JTMS-SWDIO 46 2300 4600 150 L 50 50 1 1 B
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X VSS 47 2300 4700 150 L 50 50 1 1 B
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X VDD 48 2300 4800 150 L 50 50 1 1 B
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X PA14/JTCK-SWCLK 49 2300 4900 150 L 50 50 1 1 B
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X PA15/JTDI/SPI1_NSS/SPI3_NSS/I2S3_WS/TIM2_CH1/TIM2_ETR/JTDI 50 2300 5000 150 L 50 50 1 1 B
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X PC10/SPI3_SCK/I2S3_CK/SDIO_D2 51 2300 5100 150 L 50 50 1 1 B
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X PC11/I2S3ext_SD/SPI3_MISO/SDIO_D3 52 2300 5200 150 L 50 50 1 1 B
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X PC12/SPI3_MOSI/I2S3_SD/SDIO_CK 53 2300 5300 150 L 50 50 1 1 B
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X PD2/TIM3_ETR/SDIO_CMD 54 2300 5400 150 L 50 50 1 1 B
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X PB3/JTDO-SWO/SPI1_SCK/SPI3_SCK/I2S3_CK/I2C2_SDA/TIM2_CH2 55 2300 5500 150 L 50 50 1 1 B
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X PB4/NJTRST/SPI1_MISO/SPI3_MISO/I2S3ext_SD/I2C3_SDA/TIM3_CH1 56 2300 5600 150 L 50 50 1 1 B
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X PB5/SPI1_MOSI/SPI3_MOSI/I2S3_SD/I2C1_SMBA/TIM3_CH2 57 2300 5700 150 L 50 50 1 1 B
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X PB6/I2C1_SCL/USART1_TX/TIM4_CH1 58 2300 5800 150 L 50 50 1 1 B
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X PB7/I2C1_SDA/USART1_RX/TIM4_CH2 59 2300 5900 150 L 50 50 1 1 B
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X BOOT0/VPP 60 2300 6000 150 L 50 50 1 1 B
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X PB8/I2C1_SCL/TIM4_CH3/TIM10_CH1/SDIO_D4 61 2300 6100 150 L 50 50 1 1 B
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X PB9/SPI2_NSS/I2S2_WS/I2C1_SDA/TIM4_CH4/TIM11_CH1/SDIO_D5 62 2300 6200 150 L 50 50 1 1 B
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X VSS 63 2300 6300 150 L 50 50 1 1 B
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X VDD 64 2300 6400 150 L 50 50 1 1 B
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