From 031f55846e08eacaf3e49a6bbad599f7c7dd04fe Mon Sep 17 00:00:00 2001 From: chinky Date: Sat, 3 Aug 2019 10:24:10 +0800 Subject: [PATCH] =?UTF-8?q?=E6=9B=B4=E6=96=B0STM32?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .vscode/settings.json | 3 + tj-IC.bck | 4 + tj-IC.dcm | 4 + tj-IC.lib | 465 +++++++++++++++---------------- tools/gl.py | 8 + tools/stm32f401_64pin.txt | 64 +++++ tools/stm32管脚定义正则表达式.md | 48 ++++ 7 files changed, 363 insertions(+), 233 deletions(-) create mode 100644 .vscode/settings.json create mode 100644 tools/gl.py create mode 100644 tools/stm32f401_64pin.txt create mode 100644 tools/stm32管脚定义正则表达式.md diff --git a/.vscode/settings.json b/.vscode/settings.json new file mode 100644 index 0000000..410fe0c --- /dev/null +++ b/.vscode/settings.json @@ -0,0 +1,3 @@ +{ + "python.pythonPath": "e:\\Anaconda3\\python.exe" +} \ No newline at end of file diff --git a/tj-IC.bck b/tj-IC.bck index 2748f9b..03aa0ab 100644 --- a/tj-IC.bck +++ b/tj-IC.bck @@ -12,6 +12,10 @@ K Half-Duplex RS-485-/RS-422-Compatible Transceiver with AutoDirection Control, F https://datasheets.maximintegrated.com/en/ds/MAX13487E-MAX13488E.pdf $ENDCMP # +$CMP STM32F091RCT6 +F https://www.st.com/resource/en/datasheet/stm32f091rc.pdf +$ENDCMP +# $CMP VNS3NV04DPTR-E D OMNIFET II fully autoprotected Power MOSFET K fully autoprotected Power MOSFET diff --git a/tj-IC.dcm b/tj-IC.dcm index 2748f9b..03aa0ab 100644 --- a/tj-IC.dcm +++ b/tj-IC.dcm @@ -12,6 +12,10 @@ K Half-Duplex RS-485-/RS-422-Compatible Transceiver with AutoDirection Control, F https://datasheets.maximintegrated.com/en/ds/MAX13487E-MAX13488E.pdf $ENDCMP # +$CMP STM32F091RCT6 +F https://www.st.com/resource/en/datasheet/stm32f091rc.pdf +$ENDCMP +# $CMP VNS3NV04DPTR-E D OMNIFET II fully autoprotected Power MOSFET K fully autoprotected Power MOSFET diff --git a/tj-IC.lib b/tj-IC.lib index 19cea66..4f2e6f8 100644 --- a/tj-IC.lib +++ b/tj-IC.lib @@ -1339,79 +1339,78 @@ ENDDEF # DEF STM32F091RCT6 U 0 10 Y Y 1 F N F0 "U" -1900 1850 60 H V C CNN -F1 "STM32F091RCT6" 50 0 60 H V C CNN +F1 "STM32F091RCT6" -1250 2000 60 H V C CNN F2 "" 0 0 50 H I C CNN F3 "" 0 0 50 H I C CNN -ALIAS STM32F103RDT6_copy STM32F103RET6_copy $FPLIST LQFP64 $ENDFPLIST DRAW -S 1950 -1800 -1950 1800 1 1 0 f -X VBAT 1 -2100 -700 150 R 39 39 0 1 W -X VSSA 12 -2100 -1300 150 R 39 39 0 1 W -X VDDA 13 -2100 -800 150 R 39 39 0 1 W -X VSS_4 18 -2100 -1700 150 R 39 39 0 1 W -X VDD_4 19 -2100 -1200 150 R 39 39 0 1 W -X VSS_1 31 -2100 -1400 150 R 39 39 0 1 W -X VDD_1 32 -2100 -900 150 R 39 39 0 1 W -X VSS_2 47 -2100 -1500 150 R 39 39 0 1 W -X VDD_2 48 -2100 -1000 150 R 39 39 0 1 W -X VSS_3 63 -2100 -1600 150 R 39 39 0 1 W -X VDD_3 64 -2100 -1100 150 R 39 39 0 1 W -X PC2/SPI2_MISO/I2S2_MCK/EVENTOUT/USART8_TX/ADC_IN12 10 2100 -300 150 L 39 39 1 1 B -X PC3/SPI2_MOSI/I2S2_SD/EVENTOUT/USART8_RX/ADC_IN13 11 2100 -400 150 L 39 39 1 1 B +S 3050 -1850 -1950 1900 1 1 0 f +X VBAT 1 3200 -1100 150 L 39 39 0 1 W +X VSSA 12 3200 -1600 150 L 39 39 0 1 W +X VDDA 13 3200 -1400 150 L 39 39 0 1 W +X VSS_4 18 -100 -2000 150 U 39 39 0 1 W +X VDD_4 19 200 2050 150 D 39 39 0 1 W +X VSS_1 31 200 -2000 150 U 39 39 0 1 W +X VDD_1 32 -100 2050 150 D 39 39 0 1 W +X VSS_2 47 100 -2000 150 U 39 39 0 1 W +X VDDIO2 48 0 2050 150 D 39 39 0 1 W +X VSS_3 63 0 -2000 150 U 39 39 0 1 W +X VDD_3 64 100 2050 150 D 39 39 0 1 W +X PC2/SPI2_MISO/I2S2_MCK/USART8_TX/ADC_IN12 10 3200 1400 150 L 39 39 1 1 B +X PC3/SPI2_MOSI/I2S2_SD/USART8_RX/ADC_IN13 11 3200 1300 150 L 39 39 1 1 B X PA0/USART2_CTS/TIM2_CH1_ETR/TSC_G1_IO1/USART4_TX_COMP1_OUT/RTC__TAMP2/WKUP1/ADC_IN0/COMP1_INM6 14 -2100 1600 150 R 39 39 1 1 B -X PA1/USART2_RTS/ADC123_IN1/TIM2_CH2/TIM5_CH2 15 -2100 1500 150 R 39 39 1 1 B -X PA2/USART2_TX/ADC123_IN2/TIM2_CH3/TIM5_CH3 16 -2100 1400 150 R 39 39 1 1 B -X PA3/USART2_RX/ADC123_IN3/TIM2_CH4/TIM5_CH4 17 -2100 1300 150 R 39 39 1 1 B -X PC13/WKUP2/RTC_TAMP1/RTC_TS/RTC_OUT 2 2100 -1400 150 L 39 39 1 1 B -X PA4/SPI1_NSS/USART2_CK/ADC12_IN4/DAC_OUT1 20 -2100 1200 150 R 39 39 1 1 B -X PA5/SPI1_SCK/ADC12_IN5/DAC_OUT2 21 -2100 1100 150 R 39 39 1 1 B -X PA6/SPI1_MISO/ADC12_IN6/TIM3_CH1/TIM1_BKIN/TIM8_BKIN 22 -2100 1000 150 R 39 39 1 1 B -X PA7/SPI1_MOSI/ADC12_IN7/TIM3_CH2/TIM8_CH1N/TIM1_CH1N 23 -2100 900 150 R 39 39 1 1 B -X PC4/ADC12_IN14 24 2100 -500 150 L 39 39 1 1 B -X PC5/ADC12_IN15 25 2100 -600 150 L 39 39 1 1 B -X PB0/ADC12_IN8/TIM3_CH3/TIM8_CH2N/TIM1_CH2N 26 2100 1600 150 L 39 39 1 1 B -X PB1/ADC12_IN9/TIM3_CH4/TIM8_CH3N/TIM1_CH3N 27 2100 1500 150 L 39 39 1 1 B -X PB2/BOOT1 28 2100 1400 150 L 39 39 1 1 B -X PB10/I2C2_SCL/USART3_TX/TIM2_CH3 29 2100 600 150 L 39 39 1 1 B -X PC14/OSC32_IN 3 2100 -1500 150 L 39 39 1 1 B -X PB11/I2C2_SDA/USART3_RX/TIM2_CH4 30 2100 500 150 L 39 39 1 1 B -X PB12/SPI2_NSS/I2C2_SMBA/USART3_CK/TIM1_BKIN/I2S2_WS 33 2100 400 150 L 39 39 1 1 B -X PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N 34 2100 300 150 L 39 39 1 1 B -X PB14/SPI2_MISO/USART3_RTS/TIM1_CH2N 35 2100 200 150 L 39 39 1 1 B -X PB15/SPI2_MOSI/TIM1_CH3N/I2S2_SD 36 2100 100 150 L 39 39 1 1 B -X PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/TIM3_CH1 37 2100 -700 150 L 39 39 1 1 B -X PC7/I2S3_MCK/TIM8_CH2/SDIO_D7/TIM3_CH2 38 2100 -800 150 L 39 39 1 1 B -X PC8/TIM8_CH3/SDIO_D0/TIM3_CH3 39 2100 -900 150 L 39 39 1 1 B -X PC15/OSC32_OUT 4 2100 -1600 150 L 39 39 1 1 B -X PC9/TIM8_CH4/SDIO_D1/TIM3_CH4 40 2100 -1000 150 L 39 39 1 1 B -X PA8/USART1_CK/TIM1_CH1/MCO 41 -2100 800 150 R 39 39 1 1 B -X PA9/USART1_TX/TIM1_CH2 42 -2100 700 150 R 39 39 1 1 B -X PA10/USART1_RX/TIM1_CH3 43 -2100 600 150 R 39 39 1 1 B -X PA11/USART1_CTS/CANRX/USBDM/TIM1_CH4 44 -2100 500 150 R 39 39 1 1 B -X PA12/USART1_RTS/CANTX/USBDP/TIM1_ETR 45 -2100 400 150 R 39 39 1 1 B -X JTMS/SWDIO/PA13 46 -2100 300 150 R 39 39 1 1 B -X JTCK/SWCLK/PA14 49 -2100 200 150 R 39 39 1 1 B -X OSC_IN/PF0/CRS__SYNC/I2C1_SDA 5 -2100 -100 150 R 39 39 1 1 I -X JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/PA15/SPI1_NSS 50 -2100 100 150 R 39 39 1 1 B -X PC10/UART4_TX/SDIO_D2/USART3_TX 51 2100 -1100 150 L 39 39 1 1 B -X PC11/UART4_RX/SDIO_D3/USART3_RX 52 2100 -1200 150 L 39 39 1 1 B -X PC12/UART5_TX/SDIO_CK/USART3_CK 53 2100 -1300 150 L 39 39 1 1 B -X PD2/TIM3_ETR/UART5_RX/SDIO_CMD 54 -2100 -300 150 R 39 39 1 1 B -X JTDO/SPI3_SCK/I2S3_CK/TIM2_CH2/PB3/TRACESWO/SPI1_SCK 55 2100 1300 150 L 39 39 1 1 B -X JNTRST/SPI3_MISO/TIM3_CH1/PB4/SPI1_MISO 56 2100 1200 150 L 39 39 1 1 B -X PB5/I2C1_SMBA/SPI3_MOSI/I2S3_SD/TIM3_CH2/SPI1_MOSI 57 2100 1100 150 L 39 39 1 1 B -X PB6/I2C1_SCL/TIM4_CH1/USART1_TX 58 2100 1000 150 L 39 39 1 1 B -X PB7/I2C1_SDA/TIM4_CH2/USART1_RX 59 2100 900 150 L 39 39 1 1 B -X OSC_OUT/PF1/I2C1_SCL 6 -2100 -200 150 R 39 39 1 1 O -X BOOT0 60 -2100 -500 150 R 39 39 1 1 B -X PB8/TIM4_CH3/SDIO_D4/I2C1_SCL/CANRX 61 2100 800 150 L 39 39 1 1 B -X PB9/TIM4_CH4/SDIO_D5//I2C1_SDA/CANTX 62 2100 700 150 L 39 39 1 1 B -X NRST 7 -2100 -600 150 R 39 39 1 1 B -X PC0/EVENTOUT/USART6_TX/USART7_TX/ADC_IN10 8 2100 -100 150 L 39 39 1 1 B -X PC1/EVENTOUT/USART6_RX/USART7_RX/ADC_IN11 9 2100 -200 150 L 39 39 1 1 B +X PA1/USART2_RTS/TIM2_CH2/TIM15_CH1N/TSC_G1_IO2/USART4_RX/ADC_IN1/COMP1_INP 15 -2100 1500 150 R 39 39 1 1 B +X PA2/USART2_TX/TIM2_CH3/TIM15_CH1/TSC_G1_IO3/COMP2_OUT/ADC_IN2/WKUP4/COMP2_INM6 16 -2100 1400 150 R 39 39 1 1 B +X PA3/USART2_RX/TIM2_CH4/TIM15_CH2/TSC_G1_IO4/ADC_IN3/COMP2_INP 17 -2100 1300 150 R 39 39 1 1 B +X PC13/WKUP2/RTC_TAMP1/RTC_TS/RTC_OUT 2 3200 300 150 L 39 39 1 1 B +X PA4/SPI1_NSS/I2S1_WS/TIM14_CH1/TSC_G2_IO1/USART2_CK/USART6_TX/COMP1_INM4/COMP2_INM4/ADC_IN4/DAC_OUT1 20 -2100 1200 150 R 39 39 1 1 B +X PA5/SPI1_SCK/I2S1_CK/CEC/TIM2_CH1_ETR/TSC_G2_IO2/USART6_RX/COMP1_INM5/COMP2_INM5/ADC_IN5/DAC_OUT2 21 -2100 1100 150 R 39 39 1 1 B +X PA6/SPI1_MISO/I2S1_MCK/TIM3_CH1/TIM1_BKIN/TIM16_CH1/COMP1_OUT/TSC_G2_IO3/USART3_CTS/ADC_IN6 22 -2100 1000 150 R 39 39 1 1 B +X PA7/SPI1_MOSI/I2S1_SD/TIM3_CH2/TIM14_CH1/TIM1_CH1N/TIM17_CH1/COMP2_OUT/TSC_G2_IO4/ADC_IN7 23 -2100 900 150 R 39 39 1 1 B +X PC4/USART3_TX/ADC_IN14 24 3200 1200 150 L 39 39 1 1 B +X PC5/TSC_G3_IO1/USART3_RX/ADC_IN15/WKUP5 25 3200 1100 150 L 39 39 1 1 B +X PB0/TIM3_CH3/TIM1_CH2N/TSC_G3_IO2/USART3_CK/ADC_IN8 26 -2100 -100 150 R 39 39 1 1 B +X PB1/TIM3_CH4/USART3_RTS/TIM14_CH1/TIM1_CH3N/TSC_G3_IO3/ADC_IN9 27 -2100 -200 150 R 39 39 1 1 B +X PB2/TSC_G3_IO4 28 -2100 -300 150 R 39 39 1 1 B +X PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/CEC/TSC_SYNC/TIM2_CH3 29 -2100 -1100 150 R 39 39 1 1 B +X PC14/OSC32_IN 3 3200 200 150 L 39 39 1 1 B +X PB11/USART3_RX/TIM2_CH4/TSC_G6_IO1/I2C2_SDA 30 -2100 -1200 150 R 39 39 1 1 B +X PB12/TIM1_BKIN/TIM15_BKIN/SPI2_NSS/I2S2_WS/USART3_CK/TSC_G6_IO2 33 -2100 -1300 150 R 39 39 1 1 B +X PB13/SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_CTS/TIM1_CH1N/TSC_G6_IO3 34 -2100 -1400 150 R 39 39 1 1 B +X PB14/SPI2_MISO/I2S2_MCK/I2C2_SDA/USART3_RTS/TIM1_CH2N/TIM15_CH1/TSC_G6_IO4 35 -2100 -1500 150 R 39 39 1 1 B +X PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM15_CH1N/TIM15_CH2/WKUP7/RTC_REFIN 36 -2100 -1600 150 R 39 39 1 1 B +X PC6/TIM3_CH1/USART7_TX 37 3200 1000 150 L 39 39 1 1 B +X PC7/TIM3_CH2/USART7_RX 38 3200 900 150 L 39 39 1 1 B +X PC8/TIM3_CH3/USART8_TX 39 3200 800 150 L 39 39 1 1 B +X PC15/OSC32_OUT 4 3200 100 150 L 39 39 1 1 B +X PC9/TIM3_CH4/USART8_RX 40 3200 700 150 L 39 39 1 1 B +X PA8/USART1_CK/TIM1_CH1/MCO/CRS_SYNC 41 -2100 800 150 R 39 39 1 1 B +X PA9/USART1_TX/TIM1_CH2/TIM15_BKIN/MCO/TSC_G4_IO1/I2C1_SCL 42 -2100 700 150 R 39 39 1 1 B +X PA10/USART1_RX/TIM1_CH3/TIM17_BKIN/TSC_G4_IO2/I2C1_SDA 43 -2100 600 150 R 39 39 1 1 B +X PA11/CAN_RX/USART1_CTS/TIM1_CH4/COMP1_OUT/TSC_G4_IO3/I2C2_SCL 44 -2100 500 150 R 39 39 1 1 B +X PA12/CAN_TX/USART1_RTS/TIM1_ETR/COMP2_OUT/TSC_G4_IO4/I2C2_SDA 45 -2100 400 150 R 39 39 1 1 B +X PA13/IR_OUT/SWDIO 46 -2100 300 150 R 39 39 1 1 B +X PA14/USART2_TX/SWCLK 49 -2100 200 150 R 39 39 1 1 B +X OSC_IN/PF0/CRS__SYNC/I2C1_SDA 5 3200 -300 150 L 39 39 1 1 I +X PA15/SPI1_NSS/I2S1_WS/USART2_RX/USART4_RTS/TIM2_CH1_ETR 50 -2100 100 150 R 39 39 1 1 B +X PC10/USART3_TX/USART4_TX 51 3200 600 150 L 39 39 1 1 B +X PC11/USART3_RX/USART4_RX 52 3200 500 150 L 39 39 1 1 B +X PC12/USART3_CK/USART4_CK/USART5_TX 53 3200 400 150 L 39 39 1 1 B +X PD2/USART3_RTS/TIM3_ETR/USART5_RX 54 3200 -100 150 L 39 39 1 1 B +X PB3/SPI1_SCK/I2S1_CK/TIM2_CH2/TSC_G5_IO1/USART5_TX 55 -2100 -400 150 R 39 39 1 1 B +X PB4/SPI1_MISO/I2S1_MCK/TIM17_BKIN/TIM3_CH1/TSC_G5_IO2/USART5_RX 56 -2100 -500 150 R 39 39 1 1 B +X PB5/SPI1_MOSI/I2S1_SD/I2C1_SMBA/TIM16_BKIN/TIM3_CH2/USART5_CK_RTS/WKUP6 57 -2100 -600 150 R 39 39 1 1 B +X PB6/I2C1_SCL/USART1_TX/TIM16_CH1N/TSC_G5_I03 58 -2100 -700 150 R 39 39 1 1 B +X PB7/I2C1_SDA/USART1_RX/USART4_CTS/TIM17_CH1N/TSC_G5_IO4 59 -2100 -800 150 R 39 39 1 1 B +X OSC_OUT/PF1/I2C1_SCL 6 3200 -400 150 L 39 39 1 1 O +X PF11-BOOT0 60 3200 -700 150 L 39 39 1 1 B +X PB8/I2C1_SCL/CEC/TIM16_CH1/TSC_SYNC/CAN_RX 61 -2100 -900 150 R 39 39 1 1 B +X PB9/SPI2_NSS/I2S2_WS/I2C1_SDA/IR_OUT/TIM17_CH1/CAN_TX 62 -2100 -1000 150 R 39 39 1 1 B +X NRST 7 3200 -900 150 L 39 39 1 1 B +X PC0/USART6_TX/USART7_TX/ADC_IN10 8 3200 1600 150 L 39 39 1 1 B +X PC1/USART6_RX/USART7_RX/ADC_IN11 9 3200 1500 150 L 39 39 1 1 B ENDDRAW ENDDEF # @@ -1507,46 +1506,46 @@ $FPLIST LQFP64 $ENDFPLIST DRAW -S 1950 -1800 -1950 1800 1 1 0 N -X VBAT 1 -2100 -700 150 R 39 39 0 1 W -X VSSA 12 -2100 -1300 150 R 39 39 0 1 W -X VDDA 13 -2100 -800 150 R 39 39 0 1 W -X VSS_4 18 -2100 -1700 150 R 39 39 0 1 W -X VDD_4 19 -2100 -1200 150 R 39 39 0 1 W -X VSS_1 31 -2100 -1400 150 R 39 39 0 1 W -X VDD_1 32 -2100 -900 150 R 39 39 0 1 W -X VSS_2 47 -2100 -1500 150 R 39 39 0 1 W -X VDD_2 48 -2100 -1000 150 R 39 39 0 1 W -X VSS_3 63 -2100 -1600 150 R 39 39 0 1 W -X VDD_3 64 -2100 -1100 150 R 39 39 0 1 W -X PC2/ADC12_IN12 10 2100 -300 150 L 39 39 1 1 B -X PC3/ADC12_IN13 11 2100 -400 150 L 39 39 1 1 B +S 1950 -1850 -1950 1900 1 1 0 f +X VBAT 1 2100 -1150 150 L 39 39 0 1 W +X VSSA 12 2100 -1600 150 L 39 39 0 1 W +X VDDA 13 2100 -1450 150 L 39 39 0 1 W +X VSS_4 18 -100 -2000 150 U 39 39 0 1 W +X VDD_4 19 200 2050 150 D 39 39 0 1 W +X VSS_1 31 200 -2000 150 U 39 39 0 1 W +X VDD_1 32 -100 2050 150 D 39 39 0 1 W +X VSS_2 47 100 -2000 150 U 39 39 0 1 W +X VDD_2 48 0 2050 150 D 39 39 0 1 W +X VSS_3 63 0 -2000 150 U 39 39 0 1 W +X VDD_3 64 100 2050 150 D 39 39 0 1 W +X PC2/ADC12_IN12 10 2100 1400 150 L 39 39 1 1 B +X PC3/ADC12_IN13 11 2100 1300 150 L 39 39 1 1 B X PA0/WKUP/USART2_CTS/ADC12_IN0/TIM2_CH1_ETR 14 -2100 1600 150 R 39 39 1 1 B X PA1/USART2_RTS/ADC12_IN1/TIM2_CH2 15 -2100 1500 150 R 39 39 1 1 B X PA2/USART2_TX/ADC12_IN2/TIM2_CH3 16 -2100 1400 150 R 39 39 1 1 B X PA3/USART2_RX/ADC12_IN3/TIM2_CH4 17 -2100 1300 150 R 39 39 1 1 B -X PC13/TMPR/RTC 2 2100 -1400 150 L 39 39 1 1 B +X PC13/TMPR/RTC 2 2100 300 150 L 39 39 1 1 B X PA4/SPI1_NSS/USART2_CK/ADC12_IN4 20 -2100 1200 150 R 39 39 1 1 B X PA5/SPI1_SCK/ADC12_IN5 21 -2100 1100 150 R 39 39 1 1 B X PA6/SPI1_MISO/ADC12_IN6/TIM3_CH1/TIM1_BKIN 22 -2100 1000 150 R 39 39 1 1 B X PA7/SPI1_MOSI/ADC12_IN7/TIM3_CH2/TIM1_CH1N 23 -2100 900 150 R 39 39 1 1 B -X PC4/ADC12_IN14 24 2100 -500 150 L 39 39 1 1 B -X PC5/ADC12_IN15 25 2100 -600 150 L 39 39 1 1 B -X PB0/ADC12_IN8/TIM3_CH3/TIM1_CH2N 26 2100 1600 150 L 39 39 1 1 B -X PB1/ADC12_IN9/TIM3_CH4/TIM1_CH3N 27 2100 1500 150 L 39 39 1 1 B -X PB2/BOOT1 28 2100 1400 150 L 39 39 1 1 B -X PB10/I2C2_SCL/USART3_TX/TIM2_CH3 29 2100 600 150 L 39 39 1 1 B -X PC14/OSC32_IN 3 2100 -1500 150 L 39 39 1 1 B -X PB11/I2C2_SDA/USART3_RX/TIM2_CH4 30 2100 500 150 L 39 39 1 1 B -X PB12/SPI2_NSS/I2C2_SMBAI/USART3_CK/TIM1_BKIN 33 2100 400 150 L 39 39 1 1 B -X PB13/SPI2_SCK/USART3_CTS/TIM1_CH1N 34 2100 300 150 L 39 39 1 1 B -X PB14/SPI2_MISO/USART3_RTS/TIM1_CH2N 35 2100 200 150 L 39 39 1 1 B -X PB15/SPI2_MOSI/TIM1_CH3N 36 2100 100 150 L 39 39 1 1 B -X PC6/TIM3_CH1 37 2100 -700 150 L 39 39 1 1 B -X PC7/TIM3_CH2 38 2100 -800 150 L 39 39 1 1 B -X PC8/TIM3_CH3 39 2100 -900 150 L 39 39 1 1 B -X PC15/OSC32_OUT 4 2100 -1600 150 L 39 39 1 1 B -X PC9/TIM3_CH4 40 2100 -1000 150 L 39 39 1 1 B +X PC4/ADC12_IN14 24 2100 1200 150 L 39 39 1 1 B +X PC5/ADC12_IN15 25 2100 1100 150 L 39 39 1 1 B +X PB0/ADC12_IN8/TIM3_CH3/TIM1_CH2N 26 -2100 -100 150 R 39 39 1 1 B +X PB1/ADC12_IN9/TIM3_CH4/TIM1_CH3N 27 -2100 -200 150 R 39 39 1 1 B +X PB2/BOOT1 28 -2100 -300 150 R 39 39 1 1 B +X PB10/I2C2_SCL/USART3_TX/TIM2_CH3 29 -2100 -1100 150 R 39 39 1 1 B +X PC14/OSC32_IN 3 2100 200 150 L 39 39 1 1 B +X PB11/I2C2_SDA/USART3_RX/TIM2_CH4 30 -2100 -1200 150 R 39 39 1 1 B +X PB12/SPI2_NSS/I2C2_SMBAI/USART3_CK/TIM1_BKIN 33 -2100 -1300 150 R 39 39 1 1 B +X PB13/SPI2_SCK/USART3_CTS/TIM1_CH1N 34 -2100 -1400 150 R 39 39 1 1 B +X PB14/SPI2_MISO/USART3_RTS/TIM1_CH2N 35 -2100 -1500 150 R 39 39 1 1 B +X PB15/SPI2_MOSI/TIM1_CH3N 36 -2100 -1600 150 R 39 39 1 1 B +X PC6/TIM3_CH1 37 2100 1000 150 L 39 39 1 1 B +X PC7/TIM3_CH2 38 2100 900 150 L 39 39 1 1 B +X PC8/TIM3_CH3 39 2100 800 150 L 39 39 1 1 B +X PC15/OSC32_OUT 4 2100 100 150 L 39 39 1 1 B +X PC9/TIM3_CH4 40 2100 700 150 L 39 39 1 1 B X PA8/USART1_CK/TIM1_CH1/MCO 41 -2100 800 150 R 39 39 1 1 B X PA9/USART1_TX/TIM1_CH2 42 -2100 700 150 R 39 39 1 1 B X PA10/USART1_RX/TIM1_CH3 43 -2100 600 150 R 39 39 1 1 B @@ -1554,32 +1553,32 @@ X PA11/USART1_CTS/CANRX/USBDM/TIM1_CH4 44 -2100 500 150 R 39 39 1 1 B X PA12/USART1_RTS/CANTX/USBDP/TIM1_ETR 45 -2100 400 150 R 39 39 1 1 B X JTMS/SWDIO/PA13 46 -2100 300 150 R 39 39 1 1 B X JTCK/SWCLK/PA14 49 -2100 200 150 R 39 39 1 1 B -X OSC_IN/PD0 5 -2100 -100 150 R 39 39 1 1 I +X OSC_IN/PD0 5 2100 -300 150 L 39 39 1 1 I X JTDI/TIM2_CH1_ETR/PA15/SPI1_NSS 50 -2100 100 150 R 39 39 1 1 B -X PC10/USART3_TX 51 2100 -1100 150 L 39 39 1 1 B -X PC11/USART3_RX 52 2100 -1200 150 L 39 39 1 1 B -X PC12/USART3_CK 53 2100 -1300 150 L 39 39 1 1 B -X PD2/TIM3_ETR 54 -2100 -300 150 R 39 39 1 1 B -X JTDO/TIM2_CH2/PB3/TRACESWO/SPI1_SCK 55 2100 1300 150 L 39 39 1 1 B -X JNTRST/TIM3_CH1/PB4/SPI1_MISO 56 2100 1200 150 L 39 39 1 1 B -X PB5/I2C1_SMBAI/TIM3_CH2/SPI1_MOSI 57 2100 1100 150 L 39 39 1 1 B -X PB6/I2C1_SCL/TIM4_CH1/USART1_TX 58 2100 1000 150 L 39 39 1 1 B -X PB7/I2C1_SDA/TIM4_CH2/USART1_RX 59 2100 900 150 L 39 39 1 1 B -X OSC_OUT/PD1 6 -2100 -200 150 R 39 39 1 1 O -X BOOT0 60 -2100 -500 150 R 39 39 1 1 B -X PB8/TIM4_CH3/I2C1_SCL/CANRX 61 2100 800 150 L 39 39 1 1 B -X PB9/TIM4_CH4/I2C1_SDA/CANTX 62 2100 700 150 L 39 39 1 1 B -X NRST 7 -2100 -600 150 R 39 39 1 1 B -X PC0/ADC12_IN10 8 2100 -100 150 L 39 39 1 1 B -X PC1/ADC12_IN11 9 2100 -200 150 L 39 39 1 1 B +X PC10/USART3_TX 51 2100 600 150 L 39 39 1 1 B +X PC11/USART3_RX 52 2100 500 150 L 39 39 1 1 B +X PC12/USART3_CK 53 2100 400 150 L 39 39 1 1 B +X PD2/TIM3_ETR 54 2100 -100 150 L 39 39 1 1 B +X JTDO/TIM2_CH2/PB3/TRACESWO/SPI1_SCK 55 -2100 -400 150 R 39 39 1 1 B +X JNTRST/TIM3_CH1/PB4/SPI1_MISO 56 -2100 -500 150 R 39 39 1 1 B +X PB5/I2C1_SMBAI/TIM3_CH2/SPI1_MOSI 57 -2100 -600 150 R 39 39 1 1 B +X PB6/I2C1_SCL/TIM4_CH1/USART1_TX 58 -2100 -700 150 R 39 39 1 1 B +X PB7/I2C1_SDA/TIM4_CH2/USART1_RX 59 -2100 -800 150 R 39 39 1 1 B +X OSC_OUT/PD1 6 2100 -400 150 L 39 39 1 1 O +X BOOT0 60 2100 -750 150 L 39 39 1 1 B +X PB8/TIM4_CH3/I2C1_SCL/CANRX 61 -2100 -900 150 R 39 39 1 1 B +X PB9/TIM4_CH4/I2C1_SDA/CANTX 62 -2100 -1000 150 R 39 39 1 1 B +X NRST 7 2100 -950 150 L 39 39 1 1 B +X PC0/ADC12_IN10 8 2100 1600 150 L 39 39 1 1 B +X PC1/ADC12_IN11 9 2100 1500 150 L 39 39 1 1 B ENDDRAW ENDDEF # # STM32F103RCT6 # DEF STM32F103RCT6 U 0 10 Y Y 1 F N -F0 "U" -1900 1850 60 H V C CNN -F1 "STM32F103RCT6" 50 0 60 H V C CNN +F0 "U" -1900 1900 60 H V C CNN +F1 "STM32F103RCT6" -1100 1900 60 H V C CNN F2 "" 0 0 50 H I C CNN F3 "" 0 0 50 H I C CNN ALIAS STM32F103RDT6 STM32F103RET6 @@ -1587,46 +1586,46 @@ $FPLIST LQFP64 $ENDFPLIST DRAW -S 1950 -1800 -1950 1800 1 1 0 f -X VBAT 1 -2100 -700 150 R 39 39 0 1 W -X VSSA 12 -2100 -1300 150 R 39 39 0 1 W -X VDDA 13 -2100 -800 150 R 39 39 0 1 W -X VSS_4 18 -2100 -1700 150 R 39 39 0 1 W -X VDD_4 19 -2100 -1200 150 R 39 39 0 1 W -X VSS_1 31 -2100 -1400 150 R 39 39 0 1 W -X VDD_1 32 -2100 -900 150 R 39 39 0 1 W -X VSS_2 47 -2100 -1500 150 R 39 39 0 1 W -X VDD_2 48 -2100 -1000 150 R 39 39 0 1 W -X VSS_3 63 -2100 -1600 150 R 39 39 0 1 W -X VDD_3 64 -2100 -1100 150 R 39 39 0 1 W -X PC2/ADC123_IN12 10 2100 -300 150 L 39 39 1 1 B -X PC3/ADC123_IN13 11 2100 -400 150 L 39 39 1 1 B +S 1950 -1900 -1950 1850 1 1 0 f +X VBAT 1 2100 -1200 150 L 39 39 0 1 W +X VSSA 12 2100 -1600 150 L 39 39 0 1 W +X VDDA 13 2100 -1400 150 L 39 39 0 1 W +X VSS_4 18 200 -2050 150 U 39 39 0 1 W +X VDD_4 19 -100 2000 150 D 39 39 0 1 W +X VSS_1 31 -100 -2050 150 U 39 39 0 1 W +X VDD_1 32 200 2000 150 D 39 39 0 1 W +X VSS_2 47 0 -2050 150 U 39 39 0 1 W +X VDD_2 48 100 2000 150 D 39 39 0 1 W +X VSS_3 63 100 -2050 150 U 39 39 0 1 W +X VDD_3 64 0 2000 150 D 39 39 0 1 W +X PC2/ADC123_IN12 10 2100 1400 150 L 39 39 1 1 B +X PC3/ADC123_IN13 11 2100 1300 150 L 39 39 1 1 B X PA0/WKUP/USART2_CTS/ADC123_IN0/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR 14 -2100 1600 150 R 39 39 1 1 B X PA1/USART2_RTS/ADC123_IN1/TIM2_CH2/TIM5_CH2 15 -2100 1500 150 R 39 39 1 1 B X PA2/USART2_TX/ADC123_IN2/TIM2_CH3/TIM5_CH3 16 -2100 1400 150 R 39 39 1 1 B X PA3/USART2_RX/ADC123_IN3/TIM2_CH4/TIM5_CH4 17 -2100 1300 150 R 39 39 1 1 B -X PC13/TMPR/RTC 2 2100 -1400 150 L 39 39 1 1 B +X PC13/TMPR/RTC 2 2100 300 150 L 39 39 1 1 B X PA4/SPI1_NSS/USART2_CK/ADC12_IN4/DAC_OUT1 20 -2100 1200 150 R 39 39 1 1 B X PA5/SPI1_SCK/ADC12_IN5/DAC_OUT2 21 -2100 1100 150 R 39 39 1 1 B X PA6/SPI1_MISO/ADC12_IN6/TIM3_CH1/TIM1_BKIN/TIM8_BKIN 22 -2100 1000 150 R 39 39 1 1 B X PA7/SPI1_MOSI/ADC12_IN7/TIM3_CH2/TIM8_CH1N/TIM1_CH1N 23 -2100 900 150 R 39 39 1 1 B -X PC4/ADC12_IN14 24 2100 -500 150 L 39 39 1 1 B -X PC5/ADC12_IN15 25 2100 -600 150 L 39 39 1 1 B -X PB0/ADC12_IN8/TIM3_CH3/TIM8_CH2N/TIM1_CH2N 26 2100 1600 150 L 39 39 1 1 B -X PB1/ADC12_IN9/TIM3_CH4/TIM8_CH3N/TIM1_CH3N 27 2100 1500 150 L 39 39 1 1 B -X PB2/BOOT1 28 2100 1400 150 L 39 39 1 1 B -X PB10/I2C2_SCL/USART3_TX/TIM2_CH3 29 2100 600 150 L 39 39 1 1 B -X PC14/OSC32_IN 3 2100 -1500 150 L 39 39 1 1 B -X PB11/I2C2_SDA/USART3_RX/TIM2_CH4 30 2100 500 150 L 39 39 1 1 B -X PB12/SPI2_NSS/I2C2_SMBA/USART3_CK/TIM1_BKIN/I2S2_WS 33 2100 400 150 L 39 39 1 1 B -X PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N 34 2100 300 150 L 39 39 1 1 B -X PB14/SPI2_MISO/USART3_RTS/TIM1_CH2N 35 2100 200 150 L 39 39 1 1 B -X PB15/SPI2_MOSI/TIM1_CH3N/I2S2_SD 36 2100 100 150 L 39 39 1 1 B -X PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/TIM3_CH1 37 2100 -700 150 L 39 39 1 1 B -X PC7/I2S3_MCK/TIM8_CH2/SDIO_D7/TIM3_CH2 38 2100 -800 150 L 39 39 1 1 B -X PC8/TIM8_CH3/SDIO_D0/TIM3_CH3 39 2100 -900 150 L 39 39 1 1 B -X PC15/OSC32_OUT 4 2100 -1600 150 L 39 39 1 1 B -X PC9/TIM8_CH4/SDIO_D1/TIM3_CH4 40 2100 -1000 150 L 39 39 1 1 B +X PC4/ADC12_IN14 24 2100 1200 150 L 39 39 1 1 B +X PC5/ADC12_IN15 25 2100 1100 150 L 39 39 1 1 B +X PB0/ADC12_IN8/TIM3_CH3/TIM8_CH2N/TIM1_CH2N 26 -2100 -100 150 R 39 39 1 1 B +X PB1/ADC12_IN9/TIM3_CH4/TIM8_CH3N/TIM1_CH3N 27 -2100 -200 150 R 39 39 1 1 B +X PB2/BOOT1 28 -2100 -300 150 R 39 39 1 1 B +X PB10/I2C2_SCL/USART3_TX/TIM2_CH3 29 -2100 -1100 150 R 39 39 1 1 B +X PC14/OSC32_IN 3 2100 200 150 L 39 39 1 1 B +X PB11/I2C2_SDA/USART3_RX/TIM2_CH4 30 -2100 -1200 150 R 39 39 1 1 B +X PB12/SPI2_NSS/I2C2_SMBA/USART3_CK/TIM1_BKIN/I2S2_WS 33 -2100 -1300 150 R 39 39 1 1 B +X PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N 34 -2100 -1400 150 R 39 39 1 1 B +X PB14/SPI2_MISO/USART3_RTS/TIM1_CH2N 35 -2100 -1500 150 R 39 39 1 1 B +X PB15/SPI2_MOSI/TIM1_CH3N/I2S2_SD 36 -2100 -1600 150 R 39 39 1 1 B +X PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/TIM3_CH1 37 2100 1000 150 L 39 39 1 1 B +X PC7/I2S3_MCK/TIM8_CH2/SDIO_D7/TIM3_CH2 38 2100 900 150 L 39 39 1 1 B +X PC8/TIM8_CH3/SDIO_D0/TIM3_CH3 39 2100 800 150 L 39 39 1 1 B +X PC15/OSC32_OUT 4 2100 100 150 L 39 39 1 1 B +X PC9/TIM8_CH4/SDIO_D1/TIM3_CH4 40 2100 700 150 L 39 39 1 1 B X PA8/USART1_CK/TIM1_CH1/MCO 41 -2100 800 150 R 39 39 1 1 B X PA9/USART1_TX/TIM1_CH2 42 -2100 700 150 R 39 39 1 1 B X PA10/USART1_RX/TIM1_CH3 43 -2100 600 150 R 39 39 1 1 B @@ -1634,24 +1633,24 @@ X PA11/USART1_CTS/CANRX/USBDM/TIM1_CH4 44 -2100 500 150 R 39 39 1 1 B X PA12/USART1_RTS/CANTX/USBDP/TIM1_ETR 45 -2100 400 150 R 39 39 1 1 B X JTMS/SWDIO/PA13 46 -2100 300 150 R 39 39 1 1 B X JTCK/SWCLK/PA14 49 -2100 200 150 R 39 39 1 1 B -X OSC_IN/PD0/CANRX 5 -2100 -100 150 R 39 39 1 1 I +X OSC_IN/PD0/CANRX 5 2100 -400 150 L 39 39 1 1 I X JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/PA15/SPI1_NSS 50 -2100 100 150 R 39 39 1 1 B -X PC10/UART4_TX/SDIO_D2/USART3_TX 51 2100 -1100 150 L 39 39 1 1 B -X PC11/UART4_RX/SDIO_D3/USART3_RX 52 2100 -1200 150 L 39 39 1 1 B -X PC12/UART5_TX/SDIO_CK/USART3_CK 53 2100 -1300 150 L 39 39 1 1 B -X PD2/TIM3_ETR/UART5_RX/SDIO_CMD 54 -2100 -300 150 R 39 39 1 1 B -X JTDO/SPI3_SCK/I2S3_CK/TIM2_CH2/PB3/TRACESWO/SPI1_SCK 55 2100 1300 150 L 39 39 1 1 B -X JNTRST/SPI3_MISO/TIM3_CH1/PB4/SPI1_MISO 56 2100 1200 150 L 39 39 1 1 B -X PB5/I2C1_SMBA/SPI3_MOSI/I2S3_SD/TIM3_CH2/SPI1_MOSI 57 2100 1100 150 L 39 39 1 1 B -X PB6/I2C1_SCL/TIM4_CH1/USART1_TX 58 2100 1000 150 L 39 39 1 1 B -X PB7/I2C1_SDA/TIM4_CH2/USART1_RX 59 2100 900 150 L 39 39 1 1 B -X OSC_OUT/PD1/CANTX 6 -2100 -200 150 R 39 39 1 1 O -X BOOT0 60 -2100 -500 150 R 39 39 1 1 B -X PB8/TIM4_CH3/SDIO_D4/I2C1_SCL/CANRX 61 2100 800 150 L 39 39 1 1 B -X PB9/TIM4_CH4/SDIO_D5//I2C1_SDA/CANTX 62 2100 700 150 L 39 39 1 1 B -X NRST 7 -2100 -600 150 R 39 39 1 1 B -X PC0/ADC123_IN10 8 2100 -100 150 L 39 39 1 1 B -X PC1/ADC123_IN11 9 2100 -200 150 L 39 39 1 1 B +X PC10/UART4_TX/SDIO_D2/USART3_TX 51 2100 600 150 L 39 39 1 1 B +X PC11/UART4_RX/SDIO_D3/USART3_RX 52 2100 500 150 L 39 39 1 1 B +X PC12/UART5_TX/SDIO_CK/USART3_CK 53 2100 400 150 L 39 39 1 1 B +X PD2/TIM3_ETR/UART5_RX/SDIO_CMD 54 2100 -100 150 L 39 39 1 1 B +X JTDO/SPI3_SCK/I2S3_CK/TIM2_CH2/PB3/TRACESWO/SPI1_SCK 55 -2100 -400 150 R 39 39 1 1 B +X JNTRST/SPI3_MISO/TIM3_CH1/PB4/SPI1_MISO 56 -2100 -500 150 R 39 39 1 1 B +X PB5/I2C1_SMBA/SPI3_MOSI/I2S3_SD/TIM3_CH2/SPI1_MOSI 57 -2100 -600 150 R 39 39 1 1 B +X PB6/I2C1_SCL/TIM4_CH1/USART1_TX 58 -2100 -700 150 R 39 39 1 1 B +X PB7/I2C1_SDA/TIM4_CH2/USART1_RX 59 -2100 -800 150 R 39 39 1 1 B +X OSC_OUT/PD1/CANTX 6 2100 -500 150 L 39 39 1 1 O +X BOOT0 60 2100 -800 150 L 39 39 1 1 B +X PB8/TIM4_CH3/SDIO_D4/I2C1_SCL/CANRX 61 -2100 -900 150 R 39 39 1 1 B +X PB9/TIM4_CH4/SDIO_D5//I2C1_SDA/CANTX 62 -2100 -1000 150 R 39 39 1 1 B +X NRST 7 2100 -1000 150 L 39 39 1 1 B +X PC0/ADC123_IN10 8 2100 1600 150 L 39 39 1 1 B +X PC1/ADC123_IN11 9 2100 1500 150 L 39 39 1 1 B ENDDRAW ENDDEF # @@ -1976,77 +1975,77 @@ ENDDEF # # STM32F401RETx # -DEF STM32F401RETx U 0 40 Y Y 1 L N +DEF STM32F401RETx U 0 40 Y Y 1 F N F0 "U" -2200 1925 50 H V L BNN F1 "STM32F401RETx" 2200 1925 50 H V R BNN -F2 "LQFP64" 2200 1875 50 H I R TNN +F2 "LQFP64" 1500 2000 50 H V R TNN F3 "" 0 0 50 H I C CNN DRAW -S -2200 -1800 2200 1900 0 1 10 f -X VBAT 1 -2300 1200 100 R 50 50 1 1 W -X PC2/ADC1_IN12/I2S2_ext_SD/SPI2_MISO 10 -2300 -200 100 R 50 50 1 1 B -X PC3/ADC1_IN13/I2S2_SD/SPI2_MOSI 11 -2300 -300 100 R 50 50 1 1 B -X VSSA 12 200 -1900 100 U 50 50 1 1 W -X VREF+ 13 -2300 1100 100 R 50 50 1 1 W -X ADC1_IN0/SYS_WKUP/TIM2_CH1/TIM2_ETR/TIM5_CH1/USART2_CTS/PA0 14 2300 1600 100 L 50 50 1 1 B -X ADC1_IN1/TIM2_CH2/TIM5_CH2/USART2_RTS/PA1 15 2300 1500 100 L 50 50 1 1 B -X ADC1_IN2/TIM2_CH3/TIM5_CH3/TIM9_CH1/USART2_TX/PA2 16 2300 1400 100 L 50 50 1 1 B -X ADC1_IN3/TIM2_CH4/TIM5_CH4/TIM9_CH2/USART2_RX/PA3 17 2300 1300 100 L 50 50 1 1 B -X VSS 18 -200 -1900 100 U 50 50 1 1 W -X VDD 19 -200 2000 100 D 50 50 1 1 W -X PC13/ANTI_TAMP/RTC_AF1 2 -2300 -1300 100 R 50 50 1 1 B -X ADC1_IN4/I2S3_WS/SPI1_NSS/SPI3_NSS/USART2_CK/PA4 20 2300 1200 100 L 50 50 1 1 B -X ADC1_IN5/SPI1_SCK/TIM2_CH1/TIM2_ETR/PA5 21 2300 1100 100 L 50 50 1 1 B -X ADC1_IN6/SPI1_MISO/TIM1_BKIN/TIM3_CH1/PA6 22 2300 1000 100 L 50 50 1 1 B -X ADC1_IN7/SPI1_MOSI/TIM1_CH1N/TIM3_CH2/PA7 23 2300 900 100 L 50 50 1 1 B -X PC4/ADC1_IN14 24 -2300 -400 100 R 50 50 1 1 B -X PC5/ADC1_IN15 25 -2300 -500 100 R 50 50 1 1 B -X ADC1_IN8/TIM1_CH2N/TIM3_CH3/PB0 26 2300 -100 100 L 50 50 1 1 B -X ADC1_IN9/TIM1_CH3N/TIM3_CH4/PB1 27 2300 -200 100 L 50 50 1 1 B -X BOOT1/PB2 28 2300 -300 100 L 50 50 1 1 B -X I2C2_SCL/I2S2_CK/SPI2_SCK/TIM2_CH3/PB10 29 2300 -1100 100 L 50 50 1 1 B -X PC14/RCC_OSC32_IN 3 -2300 -1400 100 R 50 50 1 1 B -X VCAP1 30 -2300 1000 100 R 50 50 1 1 W -X VSS 31 -100 -1900 100 U 50 50 1 1 W -X VDD 32 -100 2000 100 D 50 50 1 1 W -X I2C2_SMBA/I2S2_WS/SPI2_NSS/TIM1_BKIN/PB12 33 2300 -1200 100 L 50 50 1 1 B -X I2S2_CK/SPI2_SCK/TIM1_CH1N/PB13 34 2300 -1300 100 L 50 50 1 1 B -X I2S2_ext_SD/SPI2_MISO/TIM1_CH2N/PB14 35 2300 -1400 100 L 50 50 1 1 B -X ADC1_EXTI15/I2S2_SD/RTC_REFIN/SPI2_MOSI/TIM1_CH3N/PB15 36 2300 -1500 100 L 50 50 1 1 B -X PC6/I2S2_MCK/SDIO_D6/TIM3_CH1/USART6_TX 37 -2300 -600 100 R 50 50 1 1 B -X PC7/I2S3_MCK/SDIO_D7/TIM3_CH2/USART6_RX 38 -2300 -700 100 R 50 50 1 1 B -X PC8/SDIO_D0/TIM3_CH3/USART6_CK 39 -2300 -800 100 R 50 50 1 1 B -X PC15/ADC1_EXTI15/RCC_OSC32_OUT 4 -2300 -1500 100 R 50 50 1 1 B -X PC9/I2C3_SDA/I2S_CKIN/RCC_MCO_2/SDIO_D1/TIM3_CH4 40 -2300 -900 100 R 50 50 1 1 B -X I2C3_SCL/RCC_MCO_1/TIM1_CH1/USART1_CK/USB_OTG_FS_SOF/PA8 41 2300 800 100 L 50 50 1 1 B -X I2C3_SMBA/TIM1_CH2/USART1_TX/USB_OTG_FS_VBUS/PA9 42 2300 700 100 L 50 50 1 1 B -X TIM1_CH3/USART1_RX/USB_OTG_FS_ID/PA10 43 2300 600 100 L 50 50 1 1 B -X ADC1_EXTI11/TIM1_CH4/USART1_CTS/USART6_TX/USB_OTG_FS_DM/PA11 44 2300 500 100 L 50 50 1 1 B -X TIM1_ETR/USART1_RTS/USART6_RX/USB_OTG_FS_DP/PA12 45 2300 400 100 L 50 50 1 1 B -X SYS_JTMS-SWDIO/PA13 46 2300 300 100 L 50 50 1 1 B -X VSS 47 0 -1900 100 U 50 50 1 1 W -X VDD 48 0 2000 100 D 50 50 1 1 W -X SYS_JTCK-SWCLK/PA14 49 2300 200 100 L 50 50 1 1 B -X PH0/RCC_OSC_IN 5 -2300 500 100 R 50 50 1 1 I -X ADC1_EXTI15/I2S3_WS/SPI1_NSS/SPI3_NSS/SYS_JTDI/TIM2_CH1/TIM2_ETR/PA15 50 2300 100 100 L 50 50 1 1 B -X PC10/I2S3_CK/SDIO_D2/SPI3_SCK 51 -2300 -1000 100 R 50 50 1 1 B -X PC11/ADC1_EXTI11/I2S3_ext_SD/SDIO_D3/SPI3_MISO 52 -2300 -1100 100 R 50 50 1 1 B -X PC12/I2S3_SD/SDIO_CK/SPI3_MOSI 53 -2300 -1200 100 R 50 50 1 1 B -X PD2/SDIO_CMD/TIM3_ETR 54 -2300 200 100 R 50 50 1 1 B -X I2C2_SDA/I2S3_CK/SPI1_SCK/SPI3_SCK/SYS_JTDO-SWO/TIM2_CH2/PB3 55 2300 -400 100 L 50 50 1 1 B -X I2C3_SDA/I2S3_ext_SD/SPI1_MISO/SPI3_MISO/SYS_JTRST/TIM3_CH1/PB4 56 2300 -500 100 L 50 50 1 1 B -X I2C1_SMBA/I2S3_SD/SPI1_MOSI/SPI3_MOSI/TIM3_CH2/PB5 57 2300 -600 100 L 50 50 1 1 B -X I2C1_SCL/TIM4_CH1/USART1_TX/PB6 58 2300 -700 100 L 50 50 1 1 B -X I2C1_SDA/TIM4_CH2/USART1_RX/PB7 59 2300 -800 100 L 50 50 1 1 B -X PH1/RCC_OSC_OUT 6 -2300 400 100 R 50 50 1 1 I -X BOOT0 60 -2300 1400 100 R 50 50 1 1 I -X I2C1_SCL/SDIO_D4/TIM10_CH1/TIM4_CH3/PB8 61 2300 -900 100 L 50 50 1 1 B -X I2C1_SDA/I2S2_WS/SDIO_D5/SPI2_NSS/TIM11_CH1/TIM4_CH4/PB9 62 2300 -1000 100 L 50 50 1 1 B -X VSS 63 100 -1900 100 U 50 50 1 1 W -X VDD 64 100 2000 100 D 50 50 1 1 W -X NRST 7 -2300 1600 100 R 50 50 1 1 I -X PC0/ADC1_IN10 8 -2300 0 100 R 50 50 1 1 B -X PC1/ADC1_IN11 9 -2300 -100 100 R 50 50 1 1 B +S -2200 -1850 2200 1900 0 1 10 f +X VBAT 1 2350 -1100 150 L 50 50 1 1 W +X PC2/SPI2_MISO/I2S2ext_SD/ADC1_IN12 10 2350 1400 150 L 50 50 1 1 B +X PC3/SPI2_MOSI/I2S2_SD/ADC1_IN13 11 2350 1300 150 L 50 50 1 1 B +X VSSA/VREF- 12 2350 -1600 150 L 50 50 1 1 W +X VDDA/VREF+ 13 2350 -1400 150 L 50 50 1 1 W +X PA0/USART2_CTS/TIM2_CH1/TIM2_ETR/TIM5_CH1/ADC1_IN0/WKUP 14 -2350 1600 150 R 50 50 1 1 B +X PA1/USART2_RTS/TIM2_CH2/TIM5_CH2/ADC1_IN1 15 -2350 1500 150 R 50 50 1 1 B +X PA2/USART2_TX/TIM2_CH3/TIM5_CH3/TIM9_CH1/ADC1_IN2 16 -2350 1400 150 R 50 50 1 1 B +X PA3/USART2_RX/TIM2_CH4/TIM5_CH4/TIM9_CH2/ADC1_IN3 17 -2350 1300 150 R 50 50 1 1 B +X VSS 18 200 -2000 150 U 50 50 1 1 W +X VDD 19 200 2050 150 D 50 50 1 1 W +X PC13/RTC_TAMP1/RTC_OUT/RTC_TS 2 2350 300 150 L 50 50 1 1 B +X PA4/SPI1_NSS/SPI3_NSS/I2S3_WS/USART2_CK/ADC1_IN4 20 -2350 1200 150 R 50 50 1 1 B +X PA5/SPI1_SCK/TIM2_CH1/TIM2_ETR/ADC1_IN5 21 -2350 1100 150 R 50 50 1 1 B +X PA6/SPI1_MISO/TIM1_BKIN/TIM3_CH1/ADC1_IN6 22 -2350 1000 150 R 50 50 1 1 B +X PA7/SPI1_MOSI/TIM1_CH1N/TIM3_CH2/ADC1_IN7 23 -2350 900 150 R 50 50 1 1 B +X PC4/ADC1_IN14 24 2350 1200 150 L 50 50 1 1 B +X PC5/ADC1_IN15 25 2350 1100 150 L 50 50 1 1 B +X PB0/TIM1_CH2N/TIM3_CH3/ADC1_IN8 26 -2350 -100 150 R 50 50 1 1 B +X PB1/TIM1_CH3N/TIM3_CH4/ADC1_IN9 27 -2350 -200 150 R 50 50 1 1 B +X PB2/BOOT1 28 -2350 -300 150 R 50 50 1 1 B +X PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/TIM2_CH3 29 -2350 -1100 150 R 50 50 1 1 B +X PC14/OSC32_IN 3 2350 200 150 L 50 50 1 1 B +X VCAP_1 30 1200 -1950 150 U 50 50 1 1 U +X VSS 31 100 -2000 150 U 50 50 1 1 W +X VDD 32 100 2050 150 D 50 50 1 1 W +X PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/TIM1_BKIN 33 -2350 -1300 150 R 50 50 1 1 B +X PB13/SPI2_SCK/I2S2_CK/TIM1_CH1N 34 -2350 -1400 150 R 50 50 1 1 B +X PB14/SPI2_MISO/I2S2ext_SD/TIM1_CH2N 35 -2350 -1500 150 R 50 50 1 1 B +X PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/RTC_REFIN 36 -2350 -1600 150 R 50 50 1 1 B +X PC6/I2S2_MCK/USART6_TX/TIM3_CH1/SDIO_D6 37 2350 1000 150 L 50 50 1 1 B +X PC7/I2S3_MCK/USART6_RX/TIM3_CH2/SDIO_D7 38 2350 900 150 L 50 50 1 1 B +X PC8/USART6_CK/TIM3_CH3/SDIO_D0 39 2350 800 150 L 50 50 1 1 B +X PC15/OSC32_OUT 4 2350 100 150 L 50 50 1 1 B +X PC9/I2S_CKIN/I2C3_SDA/TIM3_CH4/SDIO_D1/MCO_2 40 2350 700 150 L 50 50 1 1 B +X PA8/I2C3_SCL/USART1_CK/TIM1_CH1/OTG_FS_SOF/MCO_1 41 -2350 800 150 R 50 50 1 1 B +X PA9/I2C3_SMBA/USART1_TX/TIM1_CH2/OTG_FS_VBUS 42 -2350 700 150 R 50 50 1 1 B +X PA10/USART1_RX/TIM1_CH3/OTG_FS_ID 43 -2350 600 150 R 50 50 1 1 B +X PA11/USART1_CTS/USART6_TX/TIM1_CH4/OTG_FS_DM 44 -2350 500 150 R 50 50 1 1 B +X PA12/USART1_RTS/USART6_RX/TIM1_ETR/OTG_FS_DP 45 -2350 400 150 R 50 50 1 1 B +X PA13/JTMS-SWDIO 46 -2350 300 150 R 50 50 1 1 B +X VSS 47 0 -2000 150 U 50 50 1 1 W +X VDD 48 0 2050 150 D 50 50 1 1 W +X PA14/JTCK-SWCLK 49 -2350 200 150 R 50 50 1 1 B +X PH0/OSC_IN 5 2350 -300 150 L 50 50 1 1 B +X PA15/JTDI/SPI1_NSS/SPI3_NSS/I2S3_WS/TIM2_CH1/TIM2_ETR/JTDI 50 -2350 100 150 R 50 50 1 1 B +X PC10/SPI3_SCK/I2S3_CK/SDIO_D2 51 2350 600 150 L 50 50 1 1 B +X PC11/I2S3ext_SD/SPI3_MISO/SDIO_D3 52 2350 500 150 L 50 50 1 1 B +X PC12/SPI3_MOSI/I2S3_SD/SDIO_CK 53 2350 400 150 L 50 50 1 1 B +X PD2/TIM3_ETR/SDIO_CMD 54 2350 -100 150 L 50 50 1 1 B +X PB3/JTDO-SWO/SPI1_SCK/SPI3_SCK/I2S3_CK/I2C2_SDA/TIM2_CH2 55 -2350 -400 150 R 50 50 1 1 B +X PB4/NJTRST/SPI1_MISO/SPI3_MISO/I2S3ext_SD/I2C3_SDA/TIM3_CH1 56 -2350 -500 150 R 50 50 1 1 B +X PB5/SPI1_MOSI/SPI3_MOSI/I2S3_SD/I2C1_SMBA/TIM3_CH2 57 -2350 -600 150 R 50 50 1 1 B +X PB6/I2C1_SCL/USART1_TX/TIM4_CH1 58 -2350 -700 150 R 50 50 1 1 B +X PB7/I2C1_SDA/USART1_RX/TIM4_CH2 59 -2350 -800 150 R 50 50 1 1 B +X PH1/OSC_OUT 6 2350 -400 150 L 50 50 1 1 B +X BOOT0/VPP 60 2350 -700 150 L 50 50 1 1 I +X PB8/I2C1_SCL/TIM4_CH3/TIM10_CH1/SDIO_D4 61 -2350 -900 150 R 50 50 1 1 B +X PB9/SPI2_NSS/I2S2_WS/I2C1_SDA/TIM4_CH4/TIM11_CH1/SDIO_D5 62 -2350 -1000 150 R 50 50 1 1 B +X VSS 63 -100 -2000 150 U 50 50 1 1 W +X VDD 64 -100 2050 150 D 50 50 1 1 W +X NRST 7 2350 -900 150 L 50 50 1 1 I +X PC0/ADC1_IN10 8 2350 1600 150 L 50 50 1 1 B +X PC1/ADC1_IN11 9 2350 1500 150 L 50 50 1 1 B ENDDRAW ENDDEF # diff --git a/tools/gl.py b/tools/gl.py new file mode 100644 index 0000000..37a14a2 --- /dev/null +++ b/tools/gl.py @@ -0,0 +1,8 @@ +#coding:utf-8 + +import os +import re + +InputFileName="stm32f401_64pin.txt" +InputFile = open(InputFileName, 'r') + diff --git a/tools/stm32f401_64pin.txt b/tools/stm32f401_64pin.txt new file mode 100644 index 0000000..0772c20 --- /dev/null +++ b/tools/stm32f401_64pin.txt @@ -0,0 +1,64 @@ +X VBAT 1 2300 100 150 L 50 50 1 1 B +X PC13/RTC_TAMP1/RTC_OUT/RTC_TS 2 2300 200 150 L 50 50 1 1 B +X PC14/OSC32_IN 3 2300 300 150 L 50 50 1 1 B +X PC15/OSC32_OUT 4 2300 400 150 L 50 50 1 1 B +X PH0/OSC_IN 5 2300 500 150 L 50 50 1 1 B +X PH1/OSC_OUT 6 2300 600 150 L 50 50 1 1 B +X NRST 7 2300 700 150 L 50 50 1 1 B +X PC0/ADC1_IN10 8 2300 800 150 L 50 50 1 1 B +X PC1/ADC1_IN11 9 2300 900 150 L 50 50 1 1 B +X PC2/SPI2_MISO/I2S2ext_SD/ADC1_IN12 10 2300 1000 150 L 50 50 1 1 B +X PC3/SPI2_MOSI/I2S2_SD/ADC1_IN13 11 2300 1100 150 L 50 50 1 1 B +X VSSA/VREF- 12 2300 1200 150 L 50 50 1 1 B +X VDDA/VREF+ 13 2300 1300 150 L 50 50 1 1 B +X PA0/USART2_CTS/TIM2_CH1/TIM2_ETR/TIM5_CH1/ADC1_IN0/WKUP 14 2300 1400 150 L 50 50 1 1 B +X PA1/USART2_RTS/TIM2_CH2/TIM5_CH2/ADC1_IN1 15 2300 1500 150 L 50 50 1 1 B +X PA2/USART2_TX/TIM2_CH3/TIM5_CH3/TIM9_CH1/ADC1_IN2 16 2300 1600 150 L 50 50 1 1 B +X PA3/USART2_RX/TIM2_CH4/TIM5_CH4/TIM9_CH2/ADC1_IN3 17 2300 1700 150 L 50 50 1 1 B +X VSS 18 2300 1800 150 L 50 50 1 1 B +X VDD 19 2300 1900 150 L 50 50 1 1 B +X PA4/SPI1_NSS/SPI3_NSS/I2S3_WS/USART2_CK/ADC1_IN4 20 2300 2000 150 L 50 50 1 1 B +X PA5/SPI1_SCK/TIM2_CH1/TIM2_ETR/ADC1_IN5 21 2300 2100 150 L 50 50 1 1 B +X PA6/SPI1_MISO/TIM1_BKIN/TIM3_CH1/ADC1_IN6 22 2300 2200 150 L 50 50 1 1 B +X PA7/SPI1_MOSI/TIM1_CH1N/TIM3_CH2/ADC1_IN7 23 2300 2300 150 L 50 50 1 1 B +X PC4/ADC1_IN14 24 2300 2400 150 L 50 50 1 1 B +X PC5/ADC1_IN15 25 2300 2500 150 L 50 50 1 1 B +X PB0/TIM1_CH2N/TIM3_CH3/ADC1_IN8 26 2300 2600 150 L 50 50 1 1 B +X PB1/TIM1_CH3N/TIM3_CH4/ADC1_IN9 27 2300 2700 150 L 50 50 1 1 B +X PB2/BOOT1 28 2300 2800 150 L 50 50 1 1 B +X PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/TIM2_CH3 29 2300 2900 150 L 50 50 1 1 B +X VCAP_1 30 2300 3000 150 L 50 50 1 1 B +X VSS 31 2300 3100 150 L 50 50 1 1 B +X VDD 32 2300 3200 150 L 50 50 1 1 B +X PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/TIM1_BKIN 33 2300 3300 150 L 50 50 1 1 B +X PB13/SPI2_SCK/I2S2_CK/TIM1_CH1N 34 2300 3400 150 L 50 50 1 1 B +X PB14/SPI2_MISO/I2S2ext_SD/TIM1_CH2N 35 2300 3500 150 L 50 50 1 1 B +X PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/RTC_REFIN 36 2300 3600 150 L 50 50 1 1 B +X PC6/I2S2_MCK/USART6_TX/TIM3_CH1/SDIO_D6 37 2300 3700 150 L 50 50 1 1 B +X PC7/I2S3_MCK/USART6_RX/TIM3_CH2/SDIO_D7 38 2300 3800 150 L 50 50 1 1 B +X PC8/USART6_CK/TIM3_CH3/SDIO_D0 39 2300 3900 150 L 50 50 1 1 B +X PC9/I2S_CKIN/I2C3_SDA/TIM3_CH4/SDIO_D1/MCO_2 40 2300 4000 150 L 50 50 1 1 B +X PA8/I2C3_SCL/USART1_CK/TIM1_CH1/OTG_FS_SOF/MCO_1 41 2300 4100 150 L 50 50 1 1 B +X PA9/I2C3_SMBA/USART1_TX/TIM1_CH2/OTG_FS_VBUS 42 2300 4200 150 L 50 50 1 1 B +X PA10/USART1_RX/TIM1_CH3/OTG_FS_ID 43 2300 4300 150 L 50 50 1 1 B +X PA11/USART1_CTS/USART6_TX/TIM1_CH4/OTG_FS_DM 44 2300 4400 150 L 50 50 1 1 B +X PA12/USART1_RTS/USART6_RX/TIM1_ETR/OTG_FS_DP 45 2300 4500 150 L 50 50 1 1 B +X PA13/JTMS-SWDIO 46 2300 4600 150 L 50 50 1 1 B +X VSS 47 2300 4700 150 L 50 50 1 1 B +X VDD 48 2300 4800 150 L 50 50 1 1 B +X PA14/JTCK-SWCLK 49 2300 4900 150 L 50 50 1 1 B +X PA15/JTDI/SPI1_NSS/SPI3_NSS/I2S3_WS/TIM2_CH1/TIM2_ETR/JTDI 50 2300 5000 150 L 50 50 1 1 B +X PC10/SPI3_SCK/I2S3_CK/SDIO_D2 51 2300 5100 150 L 50 50 1 1 B +X PC11/I2S3ext_SD/SPI3_MISO/SDIO_D3 52 2300 5200 150 L 50 50 1 1 B +X PC12/SPI3_MOSI/I2S3_SD/SDIO_CK 53 2300 5300 150 L 50 50 1 1 B +X PD2/TIM3_ETR/SDIO_CMD 54 2300 5400 150 L 50 50 1 1 B +X PB3/JTDO-SWO/SPI1_SCK/SPI3_SCK/I2S3_CK/I2C2_SDA/TIM2_CH2 55 2300 5500 150 L 50 50 1 1 B +X PB4/NJTRST/SPI1_MISO/SPI3_MISO/I2S3ext_SD/I2C3_SDA/TIM3_CH1 56 2300 5600 150 L 50 50 1 1 B +X PB5/SPI1_MOSI/SPI3_MOSI/I2S3_SD/I2C1_SMBA/TIM3_CH2 57 2300 5700 150 L 50 50 1 1 B +X PB6/I2C1_SCL/USART1_TX/TIM4_CH1 58 2300 5800 150 L 50 50 1 1 B +X PB7/I2C1_SDA/USART1_RX/TIM4_CH2 59 2300 5900 150 L 50 50 1 1 B +X BOOT0/VPP 60 2300 6000 150 L 50 50 1 1 B +X PB8/I2C1_SCL/TIM4_CH3/TIM10_CH1/SDIO_D4 61 2300 6100 150 L 50 50 1 1 B +X PB9/SPI2_NSS/I2S2_WS/I2C1_SDA/TIM4_CH4/TIM11_CH1/SDIO_D5 62 2300 6200 150 L 50 50 1 1 B +X VSS 63 2300 6300 150 L 50 50 1 1 B +X VDD 64 2300 6400 150 L 50 50 1 1 B diff --git a/tools/stm32管脚定义正则表达式.md b/tools/stm32管脚定义正则表达式.md new file mode 100644 index 0000000..98888a4 --- /dev/null +++ b/tools/stm32管脚定义正则表达式.md @@ -0,0 +1,48 @@ +STM34F401xB/xC 管脚定义 + + +* PIN_Number--> aaaaaPIN_Number + ``` + 查找: ^\S+\s\S+\s(\d+)\s\S+\s\S+ + 替换: aaaaa$1 + ``` +* \n --> (空格) + ``` + 查找: \n + 替换: (空格) + ``` +* aaaaa --> \n + ``` + 查找: aaaaa + 替换: \n + ``` +* 首字是"-",删除整行 + ``` + 查找: ^-.+\n + 替换: (空白) + ``` +* "-","EVENTOUT","I/O","FT","," ,"I","O","B"-->(空格) + ``` + 查找: \s-(?=\s|\n)|EVENTOUT|I/O|FT\w*|\(\d+\)|,|\sI(?=\s)|\sO(?=\s)|\sS(?=\s)|\sB(?=\s) + 替换: (空格) + ``` +* 行首数字后的空白--> "," + ``` + 查找: (?<=^\d+)\s+ + 替换: , + ``` +* 空白==>"/" + ``` + 查找: \s+(?=\S) + 替换: / + ``` +* 删除行末空白 + ``` + 查找: \s+$ + 替换: (空白) + ``` +* 转成kicad库 + ``` + 查找: &(\d+),(.*)$ + 替换: X $2 $1 2300 $100 100 L 50 50 1 1 B + ``` \ No newline at end of file