2024-07-22 20:00:29 +08:00
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#ifndef RT_CONFIG_H__
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#define RT_CONFIG_H__
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#define SOC_STM32F407ZG
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#define BOARD_STM32F407_SPARK
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/* RT-Thread Kernel */
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#define RT_NAME_MAX 8
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#define RT_CPUS_NR 1
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#define RT_ALIGN_SIZE 8
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#define RT_THREAD_PRIORITY_32
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#define RT_THREAD_PRIORITY_MAX 32
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#define RT_TICK_PER_SECOND 1000
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#define RT_USING_HOOK
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#define RT_HOOK_USING_FUNC_PTR
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#define RT_USING_IDLE_HOOK
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#define RT_IDLE_HOOK_LIST_SIZE 4
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#define IDLE_THREAD_STACK_SIZE 1024
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/* kservice optimization */
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/* end of kservice optimization */
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/* klibc optimization */
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/* end of klibc optimization */
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#define RT_USING_DEBUG
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#define RT_DEBUGING_ASSERT
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#define RT_DEBUGING_COLOR
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#define RT_DEBUGING_CONTEXT
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#define RT_USING_OVERFLOW_CHECK
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/* Inter-Thread communication */
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#define RT_USING_SEMAPHORE
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#define RT_USING_MUTEX
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#define RT_USING_EVENT
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#define RT_USING_MAILBOX
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#define RT_USING_MESSAGEQUEUE
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/* end of Inter-Thread communication */
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/* Memory Management */
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#define RT_USING_MEMPOOL
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#define RT_USING_SMALL_MEM
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#define RT_USING_SMALL_MEM_AS_HEAP
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#define RT_USING_HEAP
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/* end of Memory Management */
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#define RT_USING_DEVICE
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#define RT_USING_CONSOLE
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#define RT_CONSOLEBUF_SIZE 128
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#define RT_CONSOLE_DEVICE_NAME "uart1"
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#define RT_VER_NUM 0x50200
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#define RT_BACKTRACE_LEVEL_MAX_NR 32
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/* end of RT-Thread Kernel */
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#define RT_USING_HW_ATOMIC
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#define RT_USING_CPU_FFS
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#define ARCH_ARM
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#define ARCH_ARM_CORTEX_M
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#define ARCH_ARM_CORTEX_M4
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/* RT-Thread Components */
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#define RT_USING_COMPONENTS_INIT
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#define RT_USING_USER_MAIN
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#define RT_MAIN_THREAD_STACK_SIZE 2048
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#define RT_MAIN_THREAD_PRIORITY 10
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#define RT_USING_MSH
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#define RT_USING_FINSH
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#define FINSH_USING_MSH
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#define FINSH_THREAD_NAME "tshell"
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#define FINSH_THREAD_PRIORITY 20
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#define FINSH_THREAD_STACK_SIZE 4096
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#define FINSH_USING_HISTORY
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#define FINSH_HISTORY_LINES 5
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#define FINSH_USING_SYMTAB
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#define FINSH_CMD_SIZE 80
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#define MSH_USING_BUILT_IN_COMMANDS
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#define FINSH_USING_DESCRIPTION
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#define FINSH_ARG_MAX 10
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#define FINSH_USING_OPTION_COMPLETION
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/* DFS: device virtual file system */
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/* end of DFS: device virtual file system */
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/* Device Drivers */
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#define RT_USING_DEVICE_IPC
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#define RT_UNAMED_PIPE_NUMBER 64
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2024-07-25 21:13:42 +08:00
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#define RT_USING_SYSTEM_WORKQUEUE
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#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048
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#define RT_SYSTEM_WORKQUEUE_PRIORITY 23
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2024-07-22 20:00:29 +08:00
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#define RT_USING_SERIAL
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#define RT_USING_SERIAL_V1
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#define RT_SERIAL_USING_DMA
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#define RT_SERIAL_RB_BUFSZ 64
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#define RT_USING_I2C
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#define RT_USING_I2C_BITOPS
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#define RT_USING_PWM
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2024-07-25 21:13:42 +08:00
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#define RT_USING_SPI
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#define RT_USING_SFUD
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#define RT_SFUD_USING_SFDP
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#define RT_SFUD_USING_FLASH_INFO_TABLE
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#define RT_SFUD_SPI_MAX_HZ 50000000
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#define RT_USING_WIFI
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#define RT_WLAN_DEVICE_STA_NAME "wlan0"
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#define RT_WLAN_DEVICE_AP_NAME "wlan1"
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#define RT_WLAN_SSID_MAX_LENGTH 32
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#define RT_WLAN_PASSWORD_MAX_LENGTH 32
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#define RT_WLAN_DEV_EVENT_NUM 2
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#define RT_WLAN_MANAGE_ENABLE
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#define RT_WLAN_SCAN_WAIT_MS 10000
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#define RT_WLAN_CONNECT_WAIT_MS 10000
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#define RT_WLAN_SCAN_SORT
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#define RT_WLAN_MSH_CMD_ENABLE
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#define RT_WLAN_JOIN_SCAN_BY_MGNT
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#define RT_WLAN_AUTO_CONNECT_ENABLE
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#define AUTO_CONNECTION_PERIOD_MS 2000
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#define RT_WLAN_CFG_ENABLE
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#define RT_WLAN_CFG_INFO_MAX 3
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#define RT_WLAN_PROT_ENABLE
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#define RT_WLAN_PROT_NAME_LEN 8
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#define RT_WLAN_PROT_MAX 2
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#define RT_WLAN_DEFAULT_PROT "lwip"
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#define RT_WLAN_PROT_LWIP_ENABLE
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#define RT_WLAN_PROT_LWIP_NAME "lwip"
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#define RT_WLAN_WORK_THREAD_ENABLE
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#define RT_WLAN_WORKQUEUE_THREAD_NAME "wlan"
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#define RT_WLAN_WORKQUEUE_THREAD_SIZE 2048
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#define RT_WLAN_WORKQUEUE_THREAD_PRIO 15
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2024-07-22 20:00:29 +08:00
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#define RT_USING_PIN
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/* end of Device Drivers */
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/* C/C++ and POSIX layer */
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/* ISO-ANSI C layer */
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/* Timezone and Daylight Saving Time */
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#define RT_LIBC_USING_LIGHT_TZ_DST
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#define RT_LIBC_TZ_DEFAULT_HOUR 8
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#define RT_LIBC_TZ_DEFAULT_MIN 0
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#define RT_LIBC_TZ_DEFAULT_SEC 0
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/* end of Timezone and Daylight Saving Time */
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/* end of ISO-ANSI C layer */
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/* POSIX (Portable Operating System Interface) layer */
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/* Interprocess Communication (IPC) */
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/* Socket is in the 'Network' category */
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/* end of Interprocess Communication (IPC) */
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/* end of POSIX (Portable Operating System Interface) layer */
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/* end of C/C++ and POSIX layer */
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/* Network */
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2024-07-25 21:13:42 +08:00
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#define RT_USING_SAL
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#define SAL_INTERNET_CHECK
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/* Docking with protocol stacks */
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#define SAL_USING_LWIP
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/* end of Docking with protocol stacks */
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#define SAL_SOCKETS_NUM 16
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#define RT_USING_NETDEV
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#define NETDEV_USING_IFCONFIG
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#define NETDEV_USING_PING
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#define NETDEV_USING_NETSTAT
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#define NETDEV_USING_AUTO_DEFAULT
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#define NETDEV_IPV4 1
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#define NETDEV_IPV6 0
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#define RT_USING_LWIP
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#define RT_USING_LWIP203
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#define RT_USING_LWIP_VER_NUM 0x20003
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#define RT_LWIP_MEM_ALIGNMENT 4
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#define RT_LWIP_IGMP
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#define RT_LWIP_ICMP
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#define RT_LWIP_DNS
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#define RT_LWIP_DHCP
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#define IP_SOF_BROADCAST 1
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#define IP_SOF_BROADCAST_RECV 1
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/* Static IPv4 Address */
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#define RT_LWIP_IPADDR "192.168.1.30"
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#define RT_LWIP_GWADDR "192.168.1.1"
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#define RT_LWIP_MSKADDR "255.255.255.0"
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/* end of Static IPv4 Address */
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#define RT_LWIP_UDP
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#define RT_LWIP_TCP
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#define RT_LWIP_RAW
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#define RT_MEMP_NUM_NETCONN 8
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#define RT_LWIP_PBUF_NUM 16
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#define RT_LWIP_RAW_PCB_NUM 4
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#define RT_LWIP_UDP_PCB_NUM 4
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#define RT_LWIP_TCP_PCB_NUM 4
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#define RT_LWIP_TCP_SEG_NUM 40
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#define RT_LWIP_TCP_SND_BUF 8196
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#define RT_LWIP_TCP_WND 8196
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#define RT_LWIP_TCPTHREAD_PRIORITY 10
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#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8
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#define RT_LWIP_TCPTHREAD_STACKSIZE 1024
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#define RT_LWIP_ETHTHREAD_PRIORITY 12
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#define RT_LWIP_ETHTHREAD_STACKSIZE 1024
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#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
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#define LWIP_NETIF_STATUS_CALLBACK 1
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#define LWIP_NETIF_LINK_CALLBACK 1
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#define RT_LWIP_NETIF_NAMESIZE 6
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#define SO_REUSE 1
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#define LWIP_SO_RCVTIMEO 1
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#define LWIP_SO_SNDTIMEO 1
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#define LWIP_SO_RCVBUF 1
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#define LWIP_SO_LINGER 0
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#define LWIP_NETIF_LOOPBACK 0
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#define RT_LWIP_USING_PING
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2024-07-22 20:00:29 +08:00
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/* end of Network */
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/* Memory protection */
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/* end of Memory protection */
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/* Utilities */
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2024-07-25 21:13:42 +08:00
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#define RT_USING_ULOG
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#define ULOG_OUTPUT_LVL_D
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#define ULOG_OUTPUT_LVL 7
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#define ULOG_ASSERT_ENABLE
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#define ULOG_LINE_BUF_SIZE 128
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/* log format */
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#define ULOG_USING_COLOR
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#define ULOG_OUTPUT_TIME
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#define ULOG_OUTPUT_LEVEL
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#define ULOG_OUTPUT_TAG
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/* end of log format */
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#define ULOG_BACKEND_USING_CONSOLE
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2024-07-22 20:00:29 +08:00
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/* end of Utilities */
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/* Using USB legacy version */
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/* end of Using USB legacy version */
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/* end of RT-Thread Components */
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/* RT-Thread online packages */
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/* IoT - internet of things */
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/* Wi-Fi */
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/* Marvell WiFi */
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/* end of Marvell WiFi */
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/* Wiced WiFi */
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/* end of Wiced WiFi */
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2024-07-25 21:13:42 +08:00
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#define PKG_USING_RW007
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#define PKG_USING_RW007_V210
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#define RW007_USING_STM32_DRIVERS
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#define RW007_SPI_MAX_HZ 30000000
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#define RW007_SPI_BUS_NAME "spi2"
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#define RW007_CS_PIN 102
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#define RW007_BOOT0_PIN 175
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#define RW007_BOOT1_PIN 102
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#define RW007_INT_BUSY_PIN 62
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#define RW007_RST_PIN 187
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2024-07-22 20:00:29 +08:00
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/* CYW43012 WiFi */
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/* end of CYW43012 WiFi */
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/* BL808 WiFi */
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/* end of BL808 WiFi */
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/* CYW43439 WiFi */
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/* end of CYW43439 WiFi */
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/* end of Wi-Fi */
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/* IoT Cloud */
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/* end of IoT Cloud */
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/* end of IoT - internet of things */
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/* security packages */
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/* end of security packages */
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/* language packages */
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/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
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/* end of JSON: JavaScript Object Notation, a lightweight data-interchange format */
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/* XML: Extensible Markup Language */
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/* end of XML: Extensible Markup Language */
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/* end of language packages */
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/* multimedia packages */
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/* LVGL: powerful and easy-to-use embedded GUI library */
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/* end of LVGL: powerful and easy-to-use embedded GUI library */
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/* u8g2: a monochrome graphic library */
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/* end of u8g2: a monochrome graphic library */
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/* end of multimedia packages */
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/* tools packages */
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/* end of tools packages */
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/* system packages */
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/* enhanced kernel services */
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/* end of enhanced kernel services */
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/* acceleration: Assembly language or algorithmic acceleration packages */
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/* end of acceleration: Assembly language or algorithmic acceleration packages */
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/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
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/* end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
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/* Micrium: Micrium software products porting for RT-Thread */
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/* end of Micrium: Micrium software products porting for RT-Thread */
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/* end of system packages */
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/* peripheral libraries and drivers */
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/* HAL & SDK Drivers */
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/* STM32 HAL & SDK Drivers */
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/* end of STM32 HAL & SDK Drivers */
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/* Infineon HAL Packages */
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/* end of Infineon HAL Packages */
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/* Kendryte SDK */
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/* end of Kendryte SDK */
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/* end of HAL & SDK Drivers */
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/* sensors drivers */
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/* end of sensors drivers */
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/* touch drivers */
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/* end of touch drivers */
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/* end of peripheral libraries and drivers */
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/* AI packages */
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/* end of AI packages */
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/* Signal Processing and Control Algorithm Packages */
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/* end of Signal Processing and Control Algorithm Packages */
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/* miscellaneous packages */
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/* project laboratory */
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/* end of project laboratory */
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/* samples: kernel and components samples */
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2024-07-25 00:37:35 +08:00
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#define PKG_USING_KERNEL_SAMPLES
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#define PKG_USING_KERNEL_SAMPLES_LATEST_VERSION
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#define PKG_USING_KERNEL_SAMPLES_EN
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#define KERNEL_SAMPLES_USING_THREAD
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#define KERNEL_SAMPLES_USING_SEMAPHORE
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#define KERNEL_SAMPLES_USING_MUTEX
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#define KERNEL_SAMPLES_USING_MAILBOX
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#define KERNEL_SAMPLES_USING_EVENT
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#define KERNEL_SAMPLES_USING_MESSAGEQUEUE
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2024-07-22 20:00:29 +08:00
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/* end of samples: kernel and components samples */
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/* entertainment: terminal games and other interesting software packages */
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/* end of entertainment: terminal games and other interesting software packages */
|
2024-07-25 21:13:42 +08:00
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#define PKG_USING_FLEXIBLE_BUTTON
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#define PKG_USING_FLEXIBLE_BUTTON_V100
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2024-07-22 20:00:29 +08:00
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|
|
/* end of miscellaneous packages */
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|
/* Arduino libraries */
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|
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/* Projects and Demos */
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/* end of Projects and Demos */
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/* Sensors */
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/* end of Sensors */
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/* Display */
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/* end of Display */
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/* Timing */
|
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|
/* end of Timing */
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|
/* Data Processing */
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|
/* end of Data Processing */
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|
/* Data Storage */
|
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|
/* Communication */
|
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|
/* end of Communication */
|
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|
|
/* Device Control */
|
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|
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|
/* end of Device Control */
|
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|
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|
|
/* Other */
|
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|
|
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|
|
|
/* end of Other */
|
|
|
|
|
|
|
|
/* Signal IO */
|
|
|
|
|
|
|
|
/* end of Signal IO */
|
|
|
|
|
|
|
|
/* Uncategorized */
|
|
|
|
|
|
|
|
/* end of Arduino libraries */
|
|
|
|
/* end of RT-Thread online packages */
|
|
|
|
#define SOC_FAMILY_STM32
|
|
|
|
#define SOC_SERIES_STM32F4
|
|
|
|
|
|
|
|
/* Hardware Drivers Config */
|
|
|
|
|
|
|
|
/* Onboard Peripheral Drivers */
|
|
|
|
|
|
|
|
#define BSP_USING_USB_TO_USART
|
2024-07-25 21:13:42 +08:00
|
|
|
#define BSP_USING_SPI_FLASH
|
|
|
|
#define BSP_USING_RW007_WLAN
|
2024-07-22 20:00:29 +08:00
|
|
|
/* end of Onboard Peripheral Drivers */
|
|
|
|
|
|
|
|
/* On-chip Peripheral Drivers */
|
|
|
|
|
|
|
|
#define BSP_USING_GPIO
|
|
|
|
#define BSP_USING_UART
|
|
|
|
#define BSP_USING_UART1
|
2024-07-25 21:13:42 +08:00
|
|
|
#define BSP_USING_SPI
|
|
|
|
#define BSP_USING_SPI2
|
2024-07-22 20:00:29 +08:00
|
|
|
/* end of On-chip Peripheral Drivers */
|
|
|
|
|
|
|
|
/* Board extended module Drivers */
|
|
|
|
|
2024-07-25 21:13:42 +08:00
|
|
|
#define BSP_USING_TEST
|
2024-07-22 20:00:29 +08:00
|
|
|
/* end of Board extended module Drivers */
|
|
|
|
/* end of Hardware Drivers Config */
|
|
|
|
|
|
|
|
#endif
|