317 lines
9.5 KiB
C
317 lines
9.5 KiB
C
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Date Author Notes
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* 2019-07-31 Zero-Free first implementation
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "drv_es8388.h"
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/* ES8388 address */
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#define ES8388_ADDR 0x10 /*0x11:CE=1;0x10:CE=0*/
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struct es8388_device
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{
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struct rt_i2c_bus_device *i2c;
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rt_uint16_t pin;
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};
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static struct es8388_device es_dev = {0};
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static rt_uint16_t reg_read(rt_uint8_t addr)
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{
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struct rt_i2c_msg msg[2] = {0};
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rt_uint8_t val = 0xff;
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RT_ASSERT(es_dev.i2c != RT_NULL);
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msg[0].addr = ES8388_ADDR;
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msg[0].flags = RT_I2C_WR;
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msg[0].len = 1;
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msg[0].buf = &addr;
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msg[1].addr = ES8388_ADDR;
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msg[1].flags = RT_I2C_RD;
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msg[1].len = 1;
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msg[1].buf = &val;
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if (rt_i2c_transfer(es_dev.i2c, msg, 2) != 2)
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{
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rt_kprintf("I2C read data failed, reg = 0x%02x. \n", addr);
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return 0xff;
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}
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return val;
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}
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static void reg_write(rt_uint8_t addr, rt_uint8_t val)
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{
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struct rt_i2c_msg msgs[1] = {0};
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rt_uint8_t buff[2] = {0};
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RT_ASSERT(es_dev.i2c != RT_NULL);
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buff[0] = addr;
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buff[1] = val;
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msgs[0].addr = ES8388_ADDR;
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msgs[0].flags = RT_I2C_WR;
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msgs[0].buf = buff;
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msgs[0].len = 2;
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if (rt_i2c_transfer(es_dev.i2c, msgs, 1) != 1)
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{
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rt_kprintf("I2C write data failed, reg = 0x%2x. \n", addr);
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return;
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}
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}
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static int es8388_set_adc_dac_volume(int mode, int volume, int dot)
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{
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int res = 0;
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if (volume < -96 || volume > 0)
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{
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if (volume < -96)
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volume = -96;
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else
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volume = 0;
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}
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dot = (dot >= 5 ? 1 : 0);
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volume = (-volume << 1) + dot;
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if (mode == ES_MODE_ADC || mode == ES_MODE_DAC_ADC)
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{
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reg_write(ES8388_ADCCONTROL8, volume);
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reg_write(ES8388_ADCCONTROL9, volume); //ADC Right Volume=0db
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}
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if (mode == ES_MODE_DAC || mode == ES_MODE_DAC_ADC)
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{
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reg_write(ES8388_DACCONTROL5, volume);
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reg_write(ES8388_DACCONTROL4, volume);
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}
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return res;
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}
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void es8388_set_voice_mute(rt_bool_t enable)
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{
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rt_uint8_t reg = 0;
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reg = reg_read(ES8388_DACCONTROL3);
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reg = reg & 0xFB;
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reg_write(ES8388_DACCONTROL3, reg | (((int)enable) << 2));
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}
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rt_err_t es8388_init(const char *i2c_name, rt_uint16_t pin)
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{
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es_dev.i2c = rt_i2c_bus_device_find(i2c_name);
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if (es_dev.i2c == RT_NULL)
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{
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rt_kprintf("%s bus not found\n", i2c_name);
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return -RT_ERROR;
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}
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es_dev.pin = pin;
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reg_write(ES8388_DACCONTROL3, 0x04); // 0x04 mute/0x00 unmute&ramp;DAC unmute and disabled digital volume control soft ramp
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/* Chip Control and Power Management */
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reg_write(ES8388_CONTROL2, 0x50);
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reg_write(ES8388_CHIPPOWER, 0x00); //normal all and power up all
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reg_write(ES8388_MASTERMODE, 0x00); //TODO:CODEC IN I2S SLAVE MODE
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/* dac */
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reg_write(ES8388_DACPOWER, 0xC0); //disable DAC and disable Lout/Rout/1/2
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reg_write(ES8388_CONTROL1, 0x12); //Enfr=0,Play&Record Mode,(0x17-both of mic&paly)
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// reg_write(ES8388_CONTROL2, 0); //LPVrefBuf=0,Pdn_ana=0
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reg_write(ES8388_DACCONTROL1, 0x18);//1a 0x18:16bit iis , 0x00:24
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reg_write(ES8388_DACCONTROL2, 0x02); //DACFsMode,SINGLE SPEED; DACFsRatio,256
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reg_write(ES8388_DACCONTROL16, 0x00); // 0x00 audio on LIN1&RIN1, 0x09 LIN2&RIN2
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reg_write(ES8388_DACCONTROL17, 0x9C); // only left DAC to left mixer enable 0db
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reg_write(ES8388_DACCONTROL20, 0x9C); // only right DAC to right mixer enable 0db
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reg_write(ES8388_DACCONTROL21, 0x80); //set internal ADC and DAC use the same LRCK clock, ADC LRCK as internal LRCK
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reg_write(ES8388_DACCONTROL23, 0x00); //vroi=0
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es8388_set_adc_dac_volume(ES_MODE_DAC, 0, 0); // 0db
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reg_write(ES8388_DACPOWER, 0x3c); //0x3c Enable DAC and Enable Lout/Rout/1/2
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/* adc */
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reg_write(ES8388_ADCPOWER, 0xFF);
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reg_write(ES8388_ADCCONTROL1, 0xbb); // MIC Left and Right channel PGA gain
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reg_write(ES8388_ADCCONTROL2, 0x00); //0x00 LINSEL & RINSEL, LIN1/RIN1 as ADC Input; DSSEL,use one DS Reg11; DSR, LINPUT1-RINPUT1
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reg_write(ES8388_ADCCONTROL3, 0x02);
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reg_write(ES8388_ADCCONTROL4, 0x0d); // Left/Right data, Left/Right justified mode, Bits length, I2S format
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reg_write(ES8388_ADCCONTROL5, 0x02); //ADCFsMode,singel SPEED,RATIO=256
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//ALC for Microphone
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es8388_set_adc_dac_volume(ES_MODE_ADC, 0, 0); // 0db
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reg_write(ES8388_ADCPOWER, 0x09); //Power on ADC, Enable LIN&RIN, Power off MICBIAS, set int1lp to low power mode
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/* enable es8388 PA */
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es8388_pa_power(RT_TRUE);
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reg_write(ES8388_DACCONTROL24, 0x1E); // LOUT1VOL balanced noise: 0x18
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reg_write(ES8388_DACCONTROL25, 0x1E); // ROUT1VOL balanced noise: 0x18
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return RT_EOK;
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}
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rt_err_t es8388_start(enum es8388_mode mode)
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{
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int res = 0;
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rt_uint8_t prev_data = 0, data = 0;
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prev_data = reg_read(ES8388_DACCONTROL21);
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if (mode == ES_MODE_LINE)
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{
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reg_write(ES8388_DACCONTROL16, 0x09); // 0x00 audio on LIN1&RIN1, 0x09 LIN2&RIN2 by pass enable
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reg_write(ES8388_DACCONTROL17, 0x50); // left DAC to left mixer enable and LIN signal to left mixer enable 0db : bupass enable
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reg_write(ES8388_DACCONTROL20, 0x50); // right DAC to right mixer enable and LIN signal to right mixer enable 0db : bupass enable
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reg_write(ES8388_DACCONTROL21, 0xC0); //enable adc
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}
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else
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{
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reg_write(ES8388_DACCONTROL21, 0x80); //enable dac
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}
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data = reg_read(ES8388_DACCONTROL21);
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if (prev_data != data)
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{
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reg_write(ES8388_CHIPPOWER, 0xF0); //start state machine
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// reg_write(ES8388_ADDR, ES8388_CONTROL1, 0x16);
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// reg_write(ES8388_ADDR, ES8388_CONTROL2, 0x50);
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reg_write(ES8388_CHIPPOWER, 0x00); //start state machine
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}
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if (mode == ES_MODE_ADC || mode == ES_MODE_DAC_ADC || mode == ES_MODE_LINE)
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{
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reg_write(ES8388_ADCPOWER, 0x00); //power up adc and line in
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}
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if (mode == ES_MODE_DAC || mode == ES_MODE_DAC_ADC || mode == ES_MODE_LINE)
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{
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reg_write(ES8388_DACPOWER, 0x3c); //power up dac and line out
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es8388_set_voice_mute(RT_FALSE);
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}
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return res;
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}
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rt_err_t es8388_stop(enum es8388_mode mode)
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{
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int res = 0;
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if (mode == ES_MODE_LINE)
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{
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reg_write(ES8388_DACCONTROL21, 0x80); //enable dac
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reg_write(ES8388_DACCONTROL16, 0x00); // 0x00 audio on LIN1&RIN1, 0x09 LIN2&RIN2
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reg_write(ES8388_DACCONTROL17, 0x90); // only left DAC to left mixer enable 0db
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reg_write(ES8388_DACCONTROL20, 0x90); // only right DAC to right mixer enable 0db
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return res;
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}
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if (mode == ES_MODE_DAC || mode == ES_MODE_DAC_ADC)
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{
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reg_write(ES8388_DACPOWER, 0x00);
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es8388_set_voice_mute(RT_TRUE); //res |= Es8388SetAdcDacVolume(ES_MODULE_DAC, -96, 5); // 0db
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// reg_write(ES8388_ADDR, ES8388_DACPOWER, 0xC0); //power down dac and line out
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}
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if (mode == ES_MODE_ADC || mode == ES_MODE_DAC_ADC)
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{
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// Es8388SetAdcDacVolume(ES_MODULE_ADC, -96, 5); // 0db
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reg_write(ES8388_ADCPOWER, 0xFF); //power down adc and line in
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}
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if (mode == ES_MODE_DAC_ADC)
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{
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reg_write(ES8388_DACCONTROL21, 0x9C); //disable mclk
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// reg_write(ES8388_CONTROL1, 0x00);
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// reg_write(ES8388_CONTROL2, 0x58);
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// reg_write(ES8388_CHIPPOWER, 0xF3); //stop state machine
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}
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return RT_EOK;
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}
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rt_err_t es8388_fmt_set(enum es8388_mode mode, enum es8388_format fmt)
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{
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rt_uint8_t reg = 0;
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if (mode == ES_MODE_ADC || mode == ES_MODE_DAC_ADC)
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{
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reg = reg_read(ES8388_ADCCONTROL4);
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reg = reg & 0xfc;
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reg_write(ES8388_ADCCONTROL4, reg | fmt);
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}
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if (mode == ES_MODE_DAC || mode == ES_MODE_DAC_ADC)
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{
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reg = reg_read(ES8388_DACCONTROL1);
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reg = reg & 0xf9;
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reg_write(ES8388_DACCONTROL1, reg | (fmt << 1));
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}
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return RT_EOK;
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}
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void es8388_volume_set(rt_uint8_t volume)
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{
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uint32_t real_vol = 0;
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volume = 100 - volume;
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if (volume > 100)
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volume = 100;
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real_vol = 192 * volume / 100;
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reg_write(ES8388_DACCONTROL4, (rt_uint8_t)real_vol); // DAC L
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reg_write(ES8388_DACCONTROL5, (rt_uint8_t)real_vol); // DAC R
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}
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rt_uint8_t es8388_volume_get(void)
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{
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rt_uint8_t volume;
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volume = reg_read(ES8388_DACCONTROL24);
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if (volume == 0xff)
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{
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volume = 0;
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}
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else
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{
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volume *= 3;
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if (volume == 99)
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volume = 100;
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}
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return volume;
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}
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void es8388_pa_power(rt_bool_t enable)
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{
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rt_pin_mode(es_dev.pin, PIN_MODE_OUTPUT);
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if (enable)
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{
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rt_pin_write(es_dev.pin, PIN_HIGH);
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}
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else
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{
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rt_pin_write(es_dev.pin, PIN_LOW);
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}
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}
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void estest()
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{
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// reg_write(ES8388_DACCONTROL24, volume);
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reg_write(ES8388_ADCCONTROL1, 0x88); /* R9,左右通道PGA增益设置 */
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reg_write(ES8388_ADCCONTROL2, 0x10); // 使用板载麦克风
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// reg_write(ES8388_ADCCONTROL2,0x50); // 使用耳机麦克风
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// reg_write(ES8388_ADCCONTROL3, 0xC0);
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reg_write(ES8388_ADCCONTROL8, 0x00); // LADCVOL
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reg_write(ES8388_ADCCONTROL9, 0x00); // RADCVOL
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reg_write(ES8388_DACCONTROL16, 0x1B); // LMIXSEL RMIXSEL
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reg_write(ES8388_DACCONTROL17, 0x40); // LI2LOVOL
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reg_write(ES8388_DACCONTROL24, 0x21); // LOUT1VOL
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reg_write(ES8388_DACCONTROL25, 0x21); // ROUT1VOL
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reg_write(ES8388_DACCONTROL24, 33); // LOUT1VOL balanced noise: 0x18
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reg_write(ES8388_DACCONTROL25, 33); // ROUT1VOL balanced noise: 0x18
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}
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MSH_CMD_EXPORT(estest, test mic loop)
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