67 lines
2.5 KiB
C
67 lines
2.5 KiB
C
/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-05-07 aozima the first version
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* 2022-09-24 yuqi add phase and dead time configuration
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*/
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#ifndef __DRV_PWM_H_INCLUDE__
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#define __DRV_PWM_H_INCLUDE__
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#include <rtthread.h>
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#define PWM_CMD_ENABLE (RT_DEVICE_CTRL_BASE(PWM) + 0)
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#define PWM_CMD_DISABLE (RT_DEVICE_CTRL_BASE(PWM) + 1)
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#define PWM_CMD_SET (RT_DEVICE_CTRL_BASE(PWM) + 2)
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#define PWM_CMD_GET (RT_DEVICE_CTRL_BASE(PWM) + 3)
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#define PWMN_CMD_ENABLE (RT_DEVICE_CTRL_BASE(PWM) + 4)
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#define PWMN_CMD_DISABLE (RT_DEVICE_CTRL_BASE(PWM) + 5)
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#define PWM_CMD_SET_PERIOD (RT_DEVICE_CTRL_BASE(PWM) + 6)
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#define PWM_CMD_SET_PULSE (RT_DEVICE_CTRL_BASE(PWM) + 7)
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#define PWM_CMD_SET_DEAD_TIME (RT_DEVICE_CTRL_BASE(PWM) + 8)
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#define PWM_CMD_SET_PHASE (RT_DEVICE_CTRL_BASE(PWM) + 9)
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#define PWM_CMD_ENABLE_IRQ (RT_DEVICE_CTRL_BASE(PWM) + 10)
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#define PWM_CMD_DISABLE_IRQ (RT_DEVICE_CTRL_BASE(PWM) + 11)
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struct rt_pwm_configuration
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{
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rt_uint32_t channel; /* 0 ~ n or 0 ~ -n, which depends on specific MCU requirements */
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rt_uint32_t period; /* unit:ns 1ns~4.29s:1Ghz~0.23hz */
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rt_uint32_t pulse; /* unit:ns (pulse<=period) */
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rt_uint32_t dead_time; /* unit:ns */
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rt_uint32_t phase; /*unit: degree, 0~360, which is the phase of pwm output, */
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/*
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* RT_TRUE : The channel of pwm is complememtary.
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* RT_FALSE : The channel of pwm is nomal.
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*/
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rt_bool_t complementary;
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};
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struct rt_device_pwm;
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struct rt_pwm_ops
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{
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rt_err_t (*control)(struct rt_device_pwm *device, int cmd, void *arg);
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};
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struct rt_device_pwm
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{
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struct rt_device parent;
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const struct rt_pwm_ops *ops;
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};
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rt_err_t rt_device_pwm_register(struct rt_device_pwm *device, const char *name, const struct rt_pwm_ops *ops, const void *user_data);
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rt_err_t rt_pwm_enable(struct rt_device_pwm *device, int channel);
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rt_err_t rt_pwm_disable(struct rt_device_pwm *device, int channel);
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rt_err_t rt_pwm_set(struct rt_device_pwm *device, int channel, rt_uint32_t period, rt_uint32_t pulse);
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rt_err_t rt_pwm_set_period(struct rt_device_pwm *device, int channel, rt_uint32_t period);
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rt_err_t rt_pwm_set_pulse(struct rt_device_pwm *device, int channel, rt_uint32_t pulse);
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rt_err_t rt_pwm_set_dead_time(struct rt_device_pwm *device, int channel, rt_uint32_t dead_time);
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rt_err_t rt_pwm_set_phase(struct rt_device_pwm *device, int channel, rt_uint32_t phase);
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#endif /* __DRV_PWM_H_INCLUDE__ */
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