rtt更新

rt-thread/components/drivers/usb/cherryusb/port/pusb2/README.md

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+# USB 2.0 OTG 控制器 (PUSB2)
+
+- Phytium PI 和 Phyium E2000 系列开发板提供了兼容 USB2.0 的 OTG 接口
+- 相关的使用例程可以在 Phytium PI（飞腾派）和 E2000 D/Q Demo 板上运行，例程包括
+
+---------------------------------------------
+
+- Host 模式
+
+- - 1. [FreeRTOS 上作为主机使用键盘/鼠标/U盘](https://gitee.com/phytium_embedded/phytium-free-rtos-sdk/tree/master/example/peripheral/usb/pusb2_host/README.md)
+- - 5. [RT-Thread 上作为主机识别键盘/鼠标/U盘](https://github.com/RT-Thread/rt-thread/blob/master/bsp/phytium/doc/use_cherryusb.md)
+
+---------------------------------------------
+
+- Device 模式
+
+- - 1. [裸机上模拟为一个 U 盘](https://gitee.com/phytium_embedded/phytium-standalone-sdk/tree/master/example/peripherals/usb/pusb2_device/README.md) 
+- - 2. [裸机上模拟为一个虚拟串口](https://gitee.com/phytium_embedded/phytium-standalone-sdk/tree/master/example/peripherals/usb/pusb2_device/README.md) 
+- - 3. [FreeRTOS 上模拟为一个 U 盘](https://gitee.com/phytium_embedded/phytium-free-rtos-sdk/tree/master/example/peripheral/usb/pusb2_device/README.md)
+- - 4. [FreeRTOS 上模拟为虚拟串口](https://gitee.com/phytium_embedded/phytium-free-rtos-sdk/tree/master/example/peripheral/usb/pusb2_device/README.md)
+- - 5. [RT-Thread 上模拟为一个 U 盘](https://github.com/RT-Thread/rt-thread/blob/master/bsp/phytium/doc/use_cherryusb.md)
+
+---------------------------------------------
+
+- PUSB2 的驱动功能以静态库的方式提供，
+- - libpusb2_hc_a64.a : AARCH64 主机模式驱动库
+- - libpusb2_dc_a64.a : AARCH64 从机模式驱动库
+- - libpusb2_hc_a32_hardfp.a ：AARCH32 主机模式驱动库，使用硬浮点
+- - libpusb2_hc_a32_softfp.a ：AARCH32 主机模式驱动库，使用软浮点
+- - libpusb2_dc_a32_hardfp.a ：AARCH32 从机模式驱动库，使用硬浮点
+- - libpusb2_dc_a32_softfp.a ：AARCH32 从机模式驱动库，使用软浮点
+
+需要获取源代码请联系 `opensource_embedded@phytium.com.cn` 获取
+
+# USB 2.0 OTG Controller (PUSB2)
+
+- Phytium PI and the Phytium E2000 series development boards offer OTG interfaces compatible with USB 2.0.
+- Relevant usage examples can be run on the Phytium PI and E2000 D/Q Demo boards, including:
+
+---------------------------------------------
+
+- Host Mode
+
+  - 1. [Using a keyboard/mouse/USB flash drive as a host on FreeRTOS](https://gitee.com/phytium_embedded/phytium-free-rtos-sdk/tree/master/example/peripheral/usb/pusb2_host/README.md)
+  - 5. [Recognizing a keyboard/mouse/USB flash drive as a host on RT-Thread](https://github.com/RT-Thread/rt-thread/blob/master/bsp/phytium/doc/use_cherryusb.md)
+
+---------------------------------------------
+
+- Device Mode
+  - 1. [Simulating as a USB flash drive on a standalone system](https://gitee.com/phytium_embedded/phytium-standalone-sdk/tree/master/example/peripherals/usb/pusb2_device/README.md)
+  - 2. [Simulating as a virtual serial port on a standalone system](https://gitee.com/phytium_embedded/phytium-standalone-sdk/tree/master/example/peripherals/usb/pusb2_device/README.md)
+  - 3. [Simulating as a USB flash drive on FreeRTOS](https://gitee.com/phytium_embedded/phytium-free-rtos-sdk/tree/master/example/peripheral/usb/pusb2_device/README.md)
+  - 4. [Simulating as a virtual serial port on FreeRTOS](https://gitee.com/phytium_embedded/phytium-free-rtos-sdk/tree/master/example/peripheral/usb/pusb2_device/README.md)
+  - 5. [Simulating as a USB flash drive on RT-Thread](https://github.com/RT-Thread/rt-thread/blob/master/bsp/phytium/doc/use_cherryusb.md)
+
+---------------------------------------------
+
+- The driver functionality of PUSB2 is provided as static libraries:
+  - - `libpusb2_hc_a64.a` : Host mode driver library for AARCH64
+  - - `libpusb2_dc_a64.a` : Device mode driver library for AARCH64
+  - - `libpusb2_hc_a32_hardfp.a` : Host mode driver library for AARCH32, using hard floating point
+  - - `libpusb2_hc_a32_softfp.a` : Host mode driver library for AARCH32, using soft floating point
+  - - `libpusb2_dc_a32_hardfp.a` : Device mode driver library for AARCH32, using hard floating point
+  - - `libpusb2_dc_a32_softfp.a` : Device mode driver library for AARCH32, using soft floating point
+
+- To obtain the source code, please contact `opensource_embedded@phytium.com.cn`.

rt-thread/components/drivers/usb/cherryusb/port/pusb2/rt-thread/usb_config.h

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+/*
+ * Copyright : (C) 2024 Phytium Information Technology, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Modify History:
+ *  Ver   Who        Date         Changes
+ * ----- ------     --------    --------------------------------------
+ * 1.0   zhugengyu  2024/6/26 first commit
+ */
+#ifndef CHERRYUSB_CONFIG_H
+#define CHERRYUSB_CONFIG_H
+
+#include "rtconfig.h"
+
+/* ================ USB common Configuration ================ */
+
+#define CONFIG_USB_PRINTF(...) rt_kprintf(__VA_ARGS__)
+
+void *usb_sys_mem_malloc(size_t size);
+void usb_sys_mem_free(void *ptr);
+void *usb_sys_malloc_align(size_t align, size_t size);
+
+#define usb_malloc(size)        usb_sys_mem_malloc(size)
+#define usb_free(ptr)           usb_sys_mem_free(ptr)
+#define usb_align(align, size)  usb_sys_malloc_align(align, size)
+
+unsigned long usb_hc_get_register_base(uint32_t id);
+unsigned long usb_dc_get_register_base(uint32_t id);
+
+#define CONFIG_USB_DBG_LEVEL USB_DBG_ERROR
+
+/* Enable print with color */
+#define CONFIG_USB_PRINTF_COLOR_ENABLE
+
+/* data align size when use dma */
+#ifndef CONFIG_USB_ALIGN_SIZE
+#define CONFIG_USB_ALIGN_SIZE 4
+#endif
+
+/* attribute data into no cache ram */
+#define USB_NOCACHE_RAM_SECTION __attribute__((section(".noncacheable")))
+
+/* ================= USB Device Stack Configuration ================ */
+
+/* Ep0 in and out transfer buffer */
+#ifndef CONFIG_USBDEV_REQUEST_BUFFER_LEN
+#define CONFIG_USBDEV_REQUEST_BUFFER_LEN 512
+#endif
+
+/* Setup packet log for debug */
+// #define CONFIG_USBDEV_SETUP_LOG_PRINT
+
+/* Send ep0 in data from user buffer instead of copying into ep0 reqdata
+ * Please note that user buffer must be aligned with CONFIG_USB_ALIGN_SIZE
+*/
+// #define CONFIG_USBDEV_EP0_INDATA_NO_COPY
+
+/* Check if the input descriptor is correct */
+// #define CONFIG_USBDEV_DESC_CHECK
+
+/* Enable test mode */
+// #define CONFIG_USBDEV_TEST_MODE
+
+#ifndef CONFIG_USBDEV_MSC_MAX_LUN
+#define CONFIG_USBDEV_MSC_MAX_LUN 1
+#endif
+
+#ifndef CONFIG_USBDEV_MSC_MAX_BUFSIZE
+#define CONFIG_USBDEV_MSC_MAX_BUFSIZE 4096
+#endif
+
+#ifndef CONFIG_USBDEV_MSC_MANUFACTURER_STRING
+#define CONFIG_USBDEV_MSC_MANUFACTURER_STRING ""
+#endif
+
+#ifndef CONFIG_USBDEV_MSC_PRODUCT_STRING
+#define CONFIG_USBDEV_MSC_PRODUCT_STRING ""
+#endif
+
+#ifndef CONFIG_USBDEV_MSC_VERSION_STRING
+#define CONFIG_USBDEV_MSC_VERSION_STRING "0.01"
+#endif
+
+// #define CONFIG_USBDEV_MSC_THREAD
+
+#ifndef CONFIG_USBDEV_MSC_PRIO
+#define CONFIG_USBDEV_MSC_PRIO 4
+#endif
+
+#ifndef CONFIG_USBDEV_MSC_STACKSIZE
+#define CONFIG_USBDEV_MSC_STACKSIZE 8192
+#endif
+
+#ifndef CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE
+#define CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE 156
+#endif
+
+/* rndis transfer buffer size, must be a multiple of (1536 + 44)*/
+#ifndef CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE
+#define CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE 1580
+#endif
+
+#ifndef CONFIG_USBDEV_RNDIS_VENDOR_ID
+#define CONFIG_USBDEV_RNDIS_VENDOR_ID 0x0000ffff
+#endif
+
+#ifndef CONFIG_USBDEV_RNDIS_VENDOR_DESC
+#define CONFIG_USBDEV_RNDIS_VENDOR_DESC "CherryUSB"
+#endif
+
+#define CONFIG_USBDEV_RNDIS_USING_LWIP
+
+/* ================ USB HOST Stack Configuration ================== */
+
+#define CONFIG_USBHOST_MAX_RHPORTS          1
+#define CONFIG_USBHOST_MAX_EXTHUBS          0
+#define CONFIG_USBHOST_MAX_EHPORTS          8
+#define CONFIG_USBHOST_MAX_INTERFACES       8
+#define CONFIG_USBHOST_MAX_INTF_ALTSETTINGS 8
+#define CONFIG_USBHOST_MAX_ENDPOINTS        8
+
+#define CONFIG_USBHOST_MAX_CDC_ACM_CLASS 4
+#define CONFIG_USBHOST_MAX_HID_CLASS     4
+#define CONFIG_USBHOST_MAX_MSC_CLASS     2
+#define CONFIG_USBHOST_MAX_AUDIO_CLASS   1
+#define CONFIG_USBHOST_MAX_VIDEO_CLASS   1
+
+#define CONFIG_USBHOST_DEV_NAMELEN 16
+
+#ifndef CONFIG_USBHOST_PSC_PRIO
+#define CONFIG_USBHOST_PSC_PRIO 0
+#endif
+#ifndef CONFIG_USBHOST_PSC_STACKSIZE
+#define CONFIG_USBHOST_PSC_STACKSIZE 8192
+#endif
+
+//#define CONFIG_USBHOST_GET_STRING_DESC
+
+// #define CONFIG_USBHOST_MSOS_ENABLE
+#ifndef CONFIG_USBHOST_MSOS_VENDOR_CODE
+#define CONFIG_USBHOST_MSOS_VENDOR_CODE 0x00
+#endif
+
+/* Ep0 max transfer buffer */
+#ifndef CONFIG_USBHOST_REQUEST_BUFFER_LEN
+#define CONFIG_USBHOST_REQUEST_BUFFER_LEN 512
+#endif
+
+#ifndef CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT
+#define CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT 500
+#endif
+
+#ifndef CONFIG_USBHOST_MSC_TIMEOUT
+#define CONFIG_USBHOST_MSC_TIMEOUT 5000
+#endif
+
+/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size,
+ * you can change to 2K ~ 16K and must be larger than TCP RX windows size in order to avoid being overflow.
+ */
+#ifndef CONFIG_USBHOST_RNDIS_ETH_MAX_RX_SIZE
+#define CONFIG_USBHOST_RNDIS_ETH_MAX_RX_SIZE (2048)
+#endif
+
+/* Because lwip do not support multi pbuf at a time, so increasing this variable has no performance improvement */
+#ifndef CONFIG_USBHOST_RNDIS_ETH_MAX_TX_SIZE
+#define CONFIG_USBHOST_RNDIS_ETH_MAX_TX_SIZE (2048)
+#endif
+
+/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size,
+ * you can change to 2K ~ 16K and must be larger than TCP RX windows size in order to avoid being overflow.
+ */
+#ifndef CONFIG_USBHOST_CDC_NCM_ETH_MAX_RX_SIZE
+#define CONFIG_USBHOST_CDC_NCM_ETH_MAX_RX_SIZE (2048)
+#endif
+/* Because lwip do not support multi pbuf at a time, so increasing this variable has no performance improvement */
+#ifndef CONFIG_USBHOST_CDC_NCM_ETH_MAX_TX_SIZE
+#define CONFIG_USBHOST_CDC_NCM_ETH_MAX_TX_SIZE (2048)
+#endif
+
+/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size,
+ * you can change to 2K ~ 16K and must be larger than TCP RX windows size in order to avoid being overflow.
+ */
+#ifndef CONFIG_USBHOST_ASIX_ETH_MAX_RX_SIZE
+#define CONFIG_USBHOST_ASIX_ETH_MAX_RX_SIZE (2048)
+#endif
+/* Because lwip do not support multi pbuf at a time, so increasing this variable has no performance improvement */
+#ifndef CONFIG_USBHOST_ASIX_ETH_MAX_TX_SIZE
+#define CONFIG_USBHOST_ASIX_ETH_MAX_TX_SIZE (2048)
+#endif
+
+/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size,
+ * you can change to 2K ~ 16K and must be larger than TCP RX windows size in order to avoid being overflow.
+ */
+#ifndef CONFIG_USBHOST_RTL8152_ETH_MAX_RX_SIZE
+#define CONFIG_USBHOST_RTL8152_ETH_MAX_RX_SIZE (2048)
+#endif
+/* Because lwip do not support multi pbuf at a time, so increasing this variable has no performance improvement */
+#ifndef CONFIG_USBHOST_RTL8152_ETH_MAX_TX_SIZE
+#define CONFIG_USBHOST_RTL8152_ETH_MAX_TX_SIZE (2048)
+#endif
+
+#define CONFIG_USBHOST_BLUETOOTH_HCI_H4
+// #define CONFIG_USBHOST_BLUETOOTH_HCI_LOG
+
+#ifndef CONFIG_USBHOST_BLUETOOTH_TX_SIZE
+#define CONFIG_USBHOST_BLUETOOTH_TX_SIZE 2048
+#endif
+#ifndef CONFIG_USBHOST_BLUETOOTH_RX_SIZE
+#define CONFIG_USBHOST_BLUETOOTH_RX_SIZE 2048
+#endif
+
+/* ================ USB Device Port Configuration ================*/
+
+#ifndef CONFIG_USBDEV_MAX_BUS
+#define CONFIG_USBDEV_MAX_BUS 1 // for now, bus num must be 1 except hpm ip
+#endif
+
+#ifndef CONFIG_USBDEV_EP_NUM
+#define CONFIG_USBDEV_EP_NUM 8
+#endif
+
+/* ---------------- FSDEV Configuration ---------------- */
+//#define CONFIG_USBDEV_FSDEV_PMA_ACCESS 2 // maybe 1 or 2, many chips may have a difference
+
+/* ---------------- DWC2 Configuration ---------------- */
+/* (5 * number of control endpoints + 8) + ((largest USB packet used / 4) + 1 for
+ * status information) + (2 * number of OUT endpoints) + 1 for Global NAK
+ */
+// #define CONFIG_USB_DWC2_RXALL_FIFO_SIZE (1024 / 4)
+/* IN Endpoints Max packet Size / 4 */
+// #define CONFIG_USB_DWC2_TX0_FIFO_SIZE (64 / 4)
+// #define CONFIG_USB_DWC2_TX1_FIFO_SIZE (512 / 4)
+// #define CONFIG_USB_DWC2_TX2_FIFO_SIZE (64 / 4)
+// #define CONFIG_USB_DWC2_TX3_FIFO_SIZE (64 / 4)
+// #define CONFIG_USB_DWC2_TX4_FIFO_SIZE (0 / 4)
+// #define CONFIG_USB_DWC2_TX5_FIFO_SIZE (0 / 4)
+// #define CONFIG_USB_DWC2_TX6_FIFO_SIZE (0 / 4)
+// #define CONFIG_USB_DWC2_TX7_FIFO_SIZE (0 / 4)
+// #define CONFIG_USB_DWC2_TX8_FIFO_SIZE (0 / 4)
+
+/* ---------------- MUSB Configuration ---------------- */
+// #define CONFIG_USB_MUSB_SUNXI
+
+/* ================ USB Host Port Configuration ==================*/
+#ifndef CONFIG_INPUT_MOUSE_WHEEL
+#define CONFIG_INPUT_MOUSE_WHEEL
+#endif
+
+#ifndef CONFIG_USBHOST_MAX_BUS
+#define CONFIG_USBHOST_MAX_BUS 3
+#endif
+
+#ifndef CONFIG_USBHOST_PIPE_NUM
+#define CONFIG_USBHOST_PIPE_NUM 10
+#endif
+
+/* ---------------- XHCI Configuration ---------------- */
+#define CONFIG_USB_XHCI_HCCR_OFFSET (0x0)
+
+/* ---------------- PUSB2 Configuration ---------------- */
+#define CONFIG_USB_PUSB2_BUS_NUM  3U
+#define CONFIG_USB_PUSB2_BUS_ID   0U
+
+#endif

rt-thread/components/drivers/usb/cherryusb/port/pusb2/rt-thread/usb_dc_glue_phytium.c

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+/*
+ * Copyright : (C) 2024 Phytium Information Technology, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Modify History:
+ *  Ver   Who        Date         Changes
+ * ----- ------     --------    --------------------------------------
+ * 1.0   zhugengyu  2024/6/26 first commit
+ */
+#include "rtthread.h"
+#include "interrupt.h"
+
+#include "fparameters.h"
+
+#include "usbd_core.h"
+
+void USBD_IRQHandler(uint8_t busid);
+
+void usb_assert(const char *filename, int linenum)
+{
+    rt_assert_handler("", filename, linenum);
+}
+
+static void usb_dc_pusb2_interrupt_handler(int irqno, void *param)
+{
+    USBD_IRQHandler(CONFIG_USB_PUSB2_BUS_ID);
+}
+
+static void usb_dc_setup_pusb2_interrupt(uint32_t id)
+{
+    uint32_t irq_num = FUSB2_0_VHUB_IRQ_NUM;
+
+    rt_hw_interrupt_set_priority(irq_num, 0U);
+    rt_hw_interrupt_install(irq_num, usb_dc_pusb2_interrupt_handler, NULL, "pusb2-dc");
+    rt_hw_interrupt_umask(irq_num);
+}
+
+static void usb_dc_revoke_pusb2_interrupt(uint32_t id)
+{
+    uint32_t irq_num = FUSB2_0_VHUB_IRQ_NUM;
+
+    rt_hw_interrupt_mask(irq_num);
+}
+
+unsigned long usb_dc_get_register_base(uint32_t id)
+{
+    USB_ASSERT(id == FUSB2_ID_VHUB_0);
+    return FUSB2_0_VHUB_BASE_ADDR;
+}
+
+void usb_dc_low_level_init()
+{
+    usb_dc_setup_pusb2_interrupt(CONFIG_USB_PUSB2_BUS_ID);
+}
+
+void usb_dc_low_level_deinit(void)
+{
+    usb_dc_revoke_pusb2_interrupt(CONFIG_USB_PUSB2_BUS_ID);
+}
+
+void *usb_sys_mem_malloc(size_t size)
+{
+    void *buf = rt_malloc(size);
+
+    if (buf) {
+        rt_memset(buf, 0, size);
+    }
+
+    return buf;
+}
+
+void usb_sys_mem_free(void *ptr)
+{
+    if (ptr) {
+        rt_free(ptr);
+    }
+}
+
+void *usb_sys_malloc_align(size_t align, size_t size)
+{
+    void *buf = rt_malloc_align(size, align);
+
+    if (buf) {
+        rt_memset(buf, 0, size);
+    }
+
+    return buf;
+}

rt-thread/components/drivers/usb/cherryusb/port/pusb2/rt-thread/usb_hc_glue_phytium.c

@@ -0,0 +1,109 @@
+/*
+ * Copyright : (C) 2024 Phytium Information Technology, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Modify History:
+ *  Ver   Who        Date         Changes
+ * ----- ------     --------    --------------------------------------
+ * 1.0   zhugengyu  2024/6/26 first commit
+ */
+#include "rtthread.h"
+#include "interrupt.h"
+
+#include "fparameters.h"
+
+#include "usbh_core.h"
+
+static const uint32_t irq_nums[] = {
+    FUSB2_0_VHUB_IRQ_NUM, FUSB2_1_IRQ_NUM, FUSB2_2_IRQ_NUM
+};
+
+void USBH_IRQHandler(uint8_t busid);
+
+void usb_assert(const char *filename, int linenum)
+{
+    rt_assert_handler("", filename, linenum);
+}
+
+static void usb_hc_pusb2_interrupt_handler(int irqno, void *param)
+{
+    if (irqno == FUSB2_0_VHUB_IRQ_NUM) {
+        USBH_IRQHandler(FUSB2_ID_VHUB_0);
+    } else if (irqno == FUSB2_1_IRQ_NUM) {
+        USBH_IRQHandler(FUSB2_ID_1);
+    } else if (irqno == FUSB2_2_IRQ_NUM) {
+        USBH_IRQHandler(FUSB2_ID_2);
+    }
+}
+
+static void usb_hc_setup_pusb2_interrupt(uint32_t id)
+{
+    uint32_t irq_num = irq_nums[id];
+
+    rt_hw_interrupt_set_priority(irq_num, 0U);
+    rt_hw_interrupt_install(irq_num, usb_hc_pusb2_interrupt_handler, NULL, "pusb2-hc");
+    rt_hw_interrupt_umask(irq_num);
+
+    USB_LOG_DBG("Enable irq-%d\n", irq_num);
+}
+
+static void usb_hc_revoke_pusb2_interrupt(uint32_t id)
+{
+    uint32_t irq_num = irq_nums[id];
+
+    rt_hw_interrupt_mask(irq_num);
+}
+
+unsigned long usb_hc_get_register_base(uint32_t id)
+{
+    if (id == FUSB2_ID_VHUB_0) {
+        return FUSB2_0_VHUB_BASE_ADDR;
+    } else if (id == FUSB2_ID_1) {
+        return FUSB2_1_BASE_ADDR;
+    } else if (id == FUSB2_ID_2) {
+        return FUSB2_2_BASE_ADDR;
+    } else {
+        USB_ASSERT(0);
+        return 0;
+    }
+}
+
+void usb_hc_low_level_init(struct usbh_bus *bus)
+{
+    usb_hc_setup_pusb2_interrupt(bus->busid);
+}
+
+void usb_hc_low_level_deinit(struct usbh_bus *bus)
+{
+    usb_hc_revoke_pusb2_interrupt(bus->busid);
+}
+
+void *usb_sys_mem_malloc(size_t size)
+{
+    void *buf = rt_malloc(size);
+
+    if (buf) {
+        rt_memset(buf, 0, size);
+    }
+
+    return buf;
+}
+
+void usb_sys_mem_free(void *ptr)
+{
+    if (ptr) {
+        rt_free(ptr);
+    }
+}
+
+void *usb_sys_malloc_align(size_t align, size_t size)
+{
+    void *buf = rt_malloc_align(size, align);
+
+    if (buf) {
+        rt_memset(buf, 0, size);
+    }
+
+    return buf;
+}