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This commit is contained in:
@@ -0,0 +1,33 @@
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# Note
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## Support Chip List
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## STM32
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- STM32F042x6、STM32F048xx、STM32F070x6、STM32F070xb、STM32F072xb、STM32F078xx
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- STM32F102x6、STM32F102xb、STM32F103x6、STM32F103xb、STM32F103xe、STM32F103xg
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- STM32F302x8、STM32F302xc、STM32F302xe、STM32F373xc
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- STM32g431xx、STM32g441xx、STM32g471xx、STM32g483xx、STM32g484xx、STM32gbk1cb
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- STM32l052xx、STM32l053xx、STM32l062xx、STM32l063xx、STM32l072xx、STM32l073xx、STM32l082xx、STM32l083xx
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- STM32l100xb、STM32l100xba、STM32l100xc、STM32l151xb、STM32l151xba、STM32l151xc、STM32l151xca、STM32l151xd、STM32l151xdx、STM32l151xe、STM32l152xb、STM32l152xba、STM32l152xc、STM32l152xa、STM32l152xd、STM32l152xdx、STM32l152xe、STM32l162xc、STM32l162xca、STM32l162xd、STM32l162xdx、STM32l162xe
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- STM32l412xx、STM32l422xx、STM32l432xx、STM32l433xx、STM32l442xx、STM32l452xx、STM32l462xx
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- STM32wb5mxx、STM32wb35xx、STM32wb55xx
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## AT32
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- AT32F403xx、AT32F407xx、AT32F413xx
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## APM32
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- APM32f10x
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## GD32
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- GD32F10X_MD、GD32F10X_HD、GD32F10X_XD
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- GD32F30X_HD、GD32F30X_XD
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- GD32F350
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- GD32F407
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## CH32
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- CH32F10x、CH32V10x
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@@ -0,0 +1,540 @@
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/*
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* Copyright (c) 2022, sakumisu
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "usbd_core.h"
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#ifndef CONFIG_USBDEV_FSDEV_PMA_ACCESS
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#error "please define CONFIG_USBDEV_FSDEV_PMA_ACCESS in usb_config.h"
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#endif
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#define PMA_ACCESS CONFIG_USBDEV_FSDEV_PMA_ACCESS
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#include "usb_fsdev_reg.h"
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#ifndef CONFIG_USB_FSDEV_RAM_SIZE
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#define CONFIG_USB_FSDEV_RAM_SIZE 512
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#endif
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#ifndef CONFIG_USBDEV_EP_NUM
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#define CONFIG_USBDEV_EP_NUM 8
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#endif
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#define USB ((USB_TypeDef *)g_usbdev_bus[0].reg_base)
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#define USB_BTABLE_SIZE (8 * CONFIG_USBDEV_EP_NUM)
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static void fsdev_write_pma(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
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static void fsdev_read_pma(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
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/* Endpoint state */
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struct fsdev_ep_state {
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uint16_t ep_mps; /* Endpoint max packet size */
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uint8_t ep_type; /* Endpoint type */
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uint8_t ep_stalled; /* Endpoint stall flag */
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uint8_t ep_enable; /* Endpoint enable */
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uint16_t ep_pma_buf_len; /* Previously allocated buffer size */
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uint16_t ep_pma_addr; /* ep pmd allocated addr */
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uint8_t *xfer_buf;
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uint32_t xfer_len;
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uint32_t actual_xfer_len;
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};
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/* Driver state */
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struct fsdev_udc {
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struct usb_setup_packet setup;
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volatile uint8_t dev_addr; /*!< USB Address */
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volatile uint32_t pma_offset; /*!< pma offset */
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struct fsdev_ep_state in_ep[CONFIG_USBDEV_EP_NUM]; /*!< IN endpoint parameters*/
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struct fsdev_ep_state out_ep[CONFIG_USBDEV_EP_NUM]; /*!< OUT endpoint parameters */
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} g_fsdev_udc;
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__WEAK void usb_dc_low_level_init(void)
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{
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}
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__WEAK void usb_dc_low_level_deinit(void)
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{
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}
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int usb_dc_init(uint8_t busid)
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{
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usb_dc_low_level_init();
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/* Init Device */
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/* CNTR_FRES = 1 */
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USB->CNTR = (uint16_t)USB_CNTR_FRES;
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/* CNTR_FRES = 0 */
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USB->CNTR = 0U;
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/* Clear pending interrupts */
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USB->ISTR = 0U;
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/*Set Btable Address*/
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USB->BTABLE = BTABLE_ADDRESS;
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uint32_t winterruptmask;
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/* Set winterruptmask variable */
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winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
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USB_CNTR_SUSPM | USB_CNTR_ERRM |
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USB_CNTR_SOFM | USB_CNTR_ESOFM |
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USB_CNTR_RESETM;
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/* Set interrupt mask */
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USB->CNTR = (uint16_t)winterruptmask;
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/* Enabling DP Pull-UP bit to Connect internal PU resistor on USB DP line */
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USB->BCDR |= (uint16_t)USB_BCDR_DPPU;
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return 0;
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}
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int usb_dc_deinit(uint8_t busid)
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{
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/* disable all interrupts and force USB reset */
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USB->CNTR = (uint16_t)USB_CNTR_FRES;
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/* clear interrupt status register */
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USB->ISTR = 0U;
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/* switch-off device */
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USB->CNTR = (uint16_t)(USB_CNTR_FRES | USB_CNTR_PDWN);
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usb_dc_low_level_deinit();
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return 0;
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}
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int usbd_set_address(uint8_t busid, const uint8_t addr)
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{
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if (addr == 0U) {
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/* set device address and enable function */
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USB->DADDR = (uint16_t)USB_DADDR_EF;
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}
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g_fsdev_udc.dev_addr = addr;
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return 0;
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}
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uint8_t usbd_get_port_speed(uint8_t busid)
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{
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return USB_SPEED_FULL;
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}
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int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep)
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{
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uint8_t ep_idx = USB_EP_GET_IDX(ep->bEndpointAddress);
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if (ep_idx > (CONFIG_USBDEV_EP_NUM - 1)) {
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USB_LOG_ERR("Ep addr %02x overflow\r\n", ep->bEndpointAddress);
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return -1;
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}
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uint16_t wEpRegVal;
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/* initialize Endpoint */
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switch (USB_GET_ENDPOINT_TYPE(ep->bmAttributes)) {
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case USB_ENDPOINT_TYPE_CONTROL:
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wEpRegVal = USB_EP_CONTROL;
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break;
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case USB_ENDPOINT_TYPE_BULK:
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wEpRegVal = USB_EP_BULK;
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break;
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case USB_ENDPOINT_TYPE_INTERRUPT:
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wEpRegVal = USB_EP_INTERRUPT;
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break;
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case USB_ENDPOINT_TYPE_ISOCHRONOUS:
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wEpRegVal = USB_EP_ISOCHRONOUS;
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break;
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default:
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break;
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}
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PCD_SET_EPTYPE(USB, ep_idx, wEpRegVal);
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PCD_SET_EP_ADDRESS(USB, ep_idx, ep_idx);
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if (USB_EP_DIR_IS_OUT(ep->bEndpointAddress)) {
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g_fsdev_udc.out_ep[ep_idx].ep_mps = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize);
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g_fsdev_udc.out_ep[ep_idx].ep_type = USB_GET_ENDPOINT_TYPE(ep->bmAttributes);
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g_fsdev_udc.out_ep[ep_idx].ep_enable = true;
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if (g_fsdev_udc.out_ep[ep_idx].ep_mps > g_fsdev_udc.out_ep[ep_idx].ep_pma_buf_len) {
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if (g_fsdev_udc.pma_offset + g_fsdev_udc.out_ep[ep_idx].ep_mps > CONFIG_USB_FSDEV_RAM_SIZE) {
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USB_LOG_ERR("Ep pma %02x overflow\r\n", ep->bEndpointAddress);
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return -1;
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}
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g_fsdev_udc.out_ep[ep_idx].ep_pma_buf_len = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize);
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g_fsdev_udc.out_ep[ep_idx].ep_pma_addr = g_fsdev_udc.pma_offset;
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/*Set the endpoint Receive buffer address */
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PCD_SET_EP_RX_ADDRESS(USB, ep_idx, g_fsdev_udc.pma_offset);
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g_fsdev_udc.pma_offset += USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize);
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}
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/*Set the endpoint Receive buffer counter*/
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PCD_SET_EP_RX_CNT(USB, ep_idx, USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize));
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PCD_CLEAR_RX_DTOG(USB, ep_idx);
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} else {
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g_fsdev_udc.in_ep[ep_idx].ep_mps = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize);
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g_fsdev_udc.in_ep[ep_idx].ep_type = USB_GET_ENDPOINT_TYPE(ep->bmAttributes);
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g_fsdev_udc.in_ep[ep_idx].ep_enable = true;
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if (g_fsdev_udc.in_ep[ep_idx].ep_mps > g_fsdev_udc.in_ep[ep_idx].ep_pma_buf_len) {
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if (g_fsdev_udc.pma_offset + g_fsdev_udc.in_ep[ep_idx].ep_mps > CONFIG_USB_FSDEV_RAM_SIZE) {
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USB_LOG_ERR("Ep pma %02x overflow\r\n", ep->bEndpointAddress);
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return -1;
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}
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g_fsdev_udc.in_ep[ep_idx].ep_pma_buf_len = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize);
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g_fsdev_udc.in_ep[ep_idx].ep_pma_addr = g_fsdev_udc.pma_offset;
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/*Set the endpoint Transmit buffer address */
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PCD_SET_EP_TX_ADDRESS(USB, ep_idx, g_fsdev_udc.pma_offset);
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g_fsdev_udc.pma_offset += USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize);
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}
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PCD_CLEAR_TX_DTOG(USB, ep_idx);
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if (USB_GET_ENDPOINT_TYPE(ep->bmAttributes) != USB_ENDPOINT_TYPE_ISOCHRONOUS) {
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/* Configure NAK status for the Endpoint */
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PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_NAK);
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} else {
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/* Configure TX Endpoint to disabled state */
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PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_DIS);
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}
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}
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return 0;
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}
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int usbd_ep_close(uint8_t busid, const uint8_t ep)
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{
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uint8_t ep_idx = USB_EP_GET_IDX(ep);
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if (USB_EP_DIR_IS_OUT(ep)) {
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PCD_CLEAR_RX_DTOG(USB, ep_idx);
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/* Configure DISABLE status for the Endpoint*/
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PCD_SET_EP_RX_STATUS(USB, ep_idx, USB_EP_RX_DIS);
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} else {
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PCD_CLEAR_TX_DTOG(USB, ep_idx);
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/* Configure DISABLE status for the Endpoint*/
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PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_DIS);
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}
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return 0;
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}
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int usbd_ep_set_stall(uint8_t busid, const uint8_t ep)
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{
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uint8_t ep_idx = USB_EP_GET_IDX(ep);
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if (USB_EP_DIR_IS_OUT(ep)) {
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PCD_SET_EP_RX_STATUS(USB, ep_idx, USB_EP_RX_STALL);
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} else {
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PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_STALL);
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}
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return 0;
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}
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int usbd_ep_clear_stall(uint8_t busid, const uint8_t ep)
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{
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uint8_t ep_idx = USB_EP_GET_IDX(ep);
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if (USB_EP_DIR_IS_OUT(ep)) {
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PCD_CLEAR_RX_DTOG(USB, ep_idx);
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/* Configure VALID status for the Endpoint */
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PCD_SET_EP_RX_STATUS(USB, ep_idx, USB_EP_RX_VALID);
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} else {
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PCD_CLEAR_TX_DTOG(USB, ep_idx);
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if (g_fsdev_udc.in_ep[ep_idx].ep_type != USB_ENDPOINT_TYPE_ISOCHRONOUS) {
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/* Configure NAK status for the Endpoint */
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PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_NAK);
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}
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}
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return 0;
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}
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int usbd_ep_is_stalled(uint8_t busid, const uint8_t ep, uint8_t *stalled)
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{
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if (USB_EP_DIR_IS_OUT(ep)) {
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} else {
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}
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return 0;
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}
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int usbd_ep_start_write(uint8_t busid, const uint8_t ep, const uint8_t *data, uint32_t data_len)
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{
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uint8_t ep_idx = USB_EP_GET_IDX(ep);
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if (!data && data_len) {
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return -1;
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}
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if (!g_fsdev_udc.in_ep[ep_idx].ep_enable) {
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return -2;
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}
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g_fsdev_udc.in_ep[ep_idx].xfer_buf = (uint8_t *)data;
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g_fsdev_udc.in_ep[ep_idx].xfer_len = data_len;
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g_fsdev_udc.in_ep[ep_idx].actual_xfer_len = 0;
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data_len = MIN(data_len, g_fsdev_udc.in_ep[ep_idx].ep_mps);
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fsdev_write_pma(USB, (uint8_t *)data, g_fsdev_udc.in_ep[ep_idx].ep_pma_addr, (uint16_t)data_len);
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PCD_SET_EP_TX_CNT(USB, ep_idx, (uint16_t)data_len);
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PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_VALID);
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return 0;
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}
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int usbd_ep_start_read(uint8_t busid, const uint8_t ep, uint8_t *data, uint32_t data_len)
|
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{
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uint8_t ep_idx = USB_EP_GET_IDX(ep);
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if (!data && data_len) {
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return -1;
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}
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if (!g_fsdev_udc.out_ep[ep_idx].ep_enable) {
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return -2;
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}
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g_fsdev_udc.out_ep[ep_idx].xfer_buf = data;
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g_fsdev_udc.out_ep[ep_idx].xfer_len = data_len;
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g_fsdev_udc.out_ep[ep_idx].actual_xfer_len = 0;
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PCD_SET_EP_RX_STATUS(USB, ep_idx, USB_EP_RX_VALID);
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return 0;
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}
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void USBD_IRQHandler(uint8_t busid)
|
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{
|
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uint16_t wIstr, wEPVal;
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uint8_t ep_idx;
|
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uint8_t read_count;
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uint16_t write_count;
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uint16_t store_ep[8];
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wIstr = USB->ISTR;
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if (wIstr & USB_ISTR_CTR) {
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while ((USB->ISTR & USB_ISTR_CTR) != 0U) {
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wIstr = USB->ISTR;
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/* extract highest priority endpoint number */
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ep_idx = (uint8_t)(wIstr & USB_ISTR_EP_ID);
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if (ep_idx == 0U) {
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if ((wIstr & USB_ISTR_DIR) == 0U) {
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PCD_CLEAR_TX_EP_CTR(USB, ep_idx);
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write_count = PCD_GET_EP_TX_CNT(USB, ep_idx);
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g_fsdev_udc.in_ep[ep_idx].xfer_buf += write_count;
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g_fsdev_udc.in_ep[ep_idx].xfer_len -= write_count;
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g_fsdev_udc.in_ep[ep_idx].actual_xfer_len += write_count;
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usbd_event_ep_in_complete_handler(0, ep_idx | 0x80, g_fsdev_udc.in_ep[ep_idx].actual_xfer_len);
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if (g_fsdev_udc.setup.wLength == 0) {
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/* In status, start reading setup */
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usbd_ep_start_read(0, 0x00, NULL, 0);
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} else if (g_fsdev_udc.setup.wLength && ((g_fsdev_udc.setup.bmRequestType & USB_REQUEST_DIR_MASK) == USB_REQUEST_DIR_OUT)) {
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/* In status, start reading setup */
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usbd_ep_start_read(0, 0x00, NULL, 0);
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}
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if ((g_fsdev_udc.dev_addr > 0U) && (write_count == 0U)) {
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USB->DADDR = ((uint16_t)g_fsdev_udc.dev_addr | USB_DADDR_EF);
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g_fsdev_udc.dev_addr = 0U;
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}
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} else {
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wEPVal = PCD_GET_ENDPOINT(USB, ep_idx);
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if ((wEPVal & USB_EP_SETUP) != 0U) {
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PCD_CLEAR_RX_EP_CTR(USB, ep_idx);
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read_count = PCD_GET_EP_RX_CNT(USB, ep_idx);
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fsdev_read_pma(USB, (uint8_t *)&g_fsdev_udc.setup, g_fsdev_udc.out_ep[ep_idx].ep_pma_addr, (uint16_t)read_count);
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usbd_event_ep0_setup_complete_handler(0, (uint8_t *)&g_fsdev_udc.setup);
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} else if ((wEPVal & USB_EP_CTR_RX) != 0U) {
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PCD_CLEAR_RX_EP_CTR(USB, ep_idx);
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read_count = PCD_GET_EP_RX_CNT(USB, ep_idx);
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||||
fsdev_read_pma(USB, g_fsdev_udc.out_ep[ep_idx].xfer_buf, g_fsdev_udc.out_ep[ep_idx].ep_pma_addr, (uint16_t)read_count);
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||||
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||||
g_fsdev_udc.out_ep[ep_idx].xfer_buf += read_count;
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||||
g_fsdev_udc.out_ep[ep_idx].xfer_len -= read_count;
|
||||
g_fsdev_udc.out_ep[ep_idx].actual_xfer_len += read_count;
|
||||
|
||||
usbd_event_ep_out_complete_handler(0, ep_idx, g_fsdev_udc.out_ep[ep_idx].actual_xfer_len);
|
||||
|
||||
if (read_count == 0) {
|
||||
/* Out status, start reading setup */
|
||||
usbd_ep_start_read(0, 0x00, NULL, 0);
|
||||
}
|
||||
}
|
||||
}
|
||||
} else {
|
||||
wEPVal = PCD_GET_ENDPOINT(USB, ep_idx);
|
||||
|
||||
if ((wEPVal & USB_EP_CTR_RX) != 0U) {
|
||||
PCD_CLEAR_RX_EP_CTR(USB, ep_idx);
|
||||
read_count = PCD_GET_EP_RX_CNT(USB, ep_idx);
|
||||
fsdev_read_pma(USB, g_fsdev_udc.out_ep[ep_idx].xfer_buf, g_fsdev_udc.out_ep[ep_idx].ep_pma_addr, (uint16_t)read_count);
|
||||
g_fsdev_udc.out_ep[ep_idx].xfer_buf += read_count;
|
||||
g_fsdev_udc.out_ep[ep_idx].xfer_len -= read_count;
|
||||
g_fsdev_udc.out_ep[ep_idx].actual_xfer_len += read_count;
|
||||
|
||||
if ((read_count < g_fsdev_udc.out_ep[ep_idx].ep_mps) ||
|
||||
(g_fsdev_udc.out_ep[ep_idx].xfer_len == 0)) {
|
||||
usbd_event_ep_out_complete_handler(0, ep_idx, g_fsdev_udc.out_ep[ep_idx].actual_xfer_len);
|
||||
} else {
|
||||
PCD_SET_EP_RX_STATUS(USB, ep_idx, USB_EP_RX_VALID);
|
||||
}
|
||||
}
|
||||
|
||||
if ((wEPVal & USB_EP_CTR_TX) != 0U) {
|
||||
PCD_CLEAR_TX_EP_CTR(USB, ep_idx);
|
||||
write_count = PCD_GET_EP_TX_CNT(USB, ep_idx);
|
||||
|
||||
g_fsdev_udc.in_ep[ep_idx].xfer_buf += write_count;
|
||||
g_fsdev_udc.in_ep[ep_idx].xfer_len -= write_count;
|
||||
g_fsdev_udc.in_ep[ep_idx].actual_xfer_len += write_count;
|
||||
|
||||
if (g_fsdev_udc.in_ep[ep_idx].xfer_len == 0) {
|
||||
usbd_event_ep_in_complete_handler(0, ep_idx | 0x80, g_fsdev_udc.in_ep[ep_idx].actual_xfer_len);
|
||||
} else {
|
||||
write_count = MIN(g_fsdev_udc.in_ep[ep_idx].xfer_len, g_fsdev_udc.in_ep[ep_idx].ep_mps);
|
||||
fsdev_write_pma(USB, g_fsdev_udc.in_ep[ep_idx].xfer_buf, g_fsdev_udc.in_ep[ep_idx].ep_pma_addr, (uint16_t)write_count);
|
||||
PCD_SET_EP_TX_CNT(USB, ep_idx, write_count);
|
||||
PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_VALID);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
if (wIstr & USB_ISTR_RESET) {
|
||||
memset(&g_fsdev_udc, 0, sizeof(struct fsdev_udc));
|
||||
g_fsdev_udc.pma_offset = USB_BTABLE_SIZE;
|
||||
usbd_event_reset_handler(0);
|
||||
/* start reading setup packet */
|
||||
PCD_SET_EP_RX_STATUS(USB, 0, USB_EP_RX_VALID);
|
||||
USB->ISTR &= (uint16_t)(~USB_ISTR_RESET);
|
||||
}
|
||||
if (wIstr & USB_ISTR_PMAOVR) {
|
||||
USB->ISTR &= (uint16_t)(~USB_ISTR_PMAOVR);
|
||||
}
|
||||
if (wIstr & USB_ISTR_ERR) {
|
||||
USB->ISTR &= (uint16_t)(~USB_ISTR_ERR);
|
||||
}
|
||||
if (wIstr & USB_ISTR_WKUP) {
|
||||
USB->CNTR &= (uint16_t) ~(USB_CNTR_LP_MODE);
|
||||
USB->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP);
|
||||
|
||||
USB->ISTR &= (uint16_t)(~USB_ISTR_WKUP);
|
||||
}
|
||||
if (wIstr & USB_ISTR_SUSP) {
|
||||
/* WA: To Clear Wakeup flag if raised with suspend signal */
|
||||
|
||||
/* Store Endpoint register */
|
||||
for (uint8_t i = 0U; i < 8U; i++) {
|
||||
store_ep[i] = PCD_GET_ENDPOINT(USB, i);
|
||||
}
|
||||
|
||||
/* FORCE RESET */
|
||||
USB->CNTR |= (uint16_t)(USB_CNTR_FRES);
|
||||
|
||||
/* CLEAR RESET */
|
||||
USB->CNTR &= (uint16_t)(~USB_CNTR_FRES);
|
||||
|
||||
/* wait for reset flag in ISTR */
|
||||
while ((USB->ISTR & USB_ISTR_RESET) == 0U) {
|
||||
}
|
||||
|
||||
/* Clear Reset Flag */
|
||||
USB->ISTR &= (uint16_t)(~USB_ISTR_RESET);
|
||||
/* Restore Registre */
|
||||
for (uint8_t i = 0U; i < 8U; i++) {
|
||||
PCD_SET_ENDPOINT(USB, i, store_ep[i]);
|
||||
}
|
||||
|
||||
/* Force low-power mode in the macrocell */
|
||||
USB->CNTR |= (uint16_t)USB_CNTR_FSUSP;
|
||||
|
||||
/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
|
||||
USB->ISTR &= (uint16_t)(~USB_ISTR_SUSP);
|
||||
|
||||
USB->CNTR |= (uint16_t)USB_CNTR_LP_MODE;
|
||||
}
|
||||
if (wIstr & USB_ISTR_SOF) {
|
||||
USB->ISTR &= (uint16_t)(~USB_ISTR_SOF);
|
||||
}
|
||||
if (wIstr & USB_ISTR_ESOF) {
|
||||
USB->ISTR &= (uint16_t)(~USB_ISTR_ESOF);
|
||||
}
|
||||
}
|
||||
|
||||
static void fsdev_write_pma(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
|
||||
{
|
||||
uint32_t n = ((uint32_t)wNBytes + 1U) >> 1;
|
||||
uint32_t BaseAddr = (uint32_t)USBx;
|
||||
uint32_t i, temp1, temp2;
|
||||
__IO uint16_t *pdwVal;
|
||||
uint8_t *pBuf = pbUsrBuf;
|
||||
|
||||
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
|
||||
|
||||
for (i = n; i != 0U; i--) {
|
||||
temp1 = *pBuf;
|
||||
pBuf++;
|
||||
temp2 = temp1 | ((uint16_t)((uint16_t)*pBuf << 8));
|
||||
*pdwVal = (uint16_t)temp2;
|
||||
pdwVal++;
|
||||
|
||||
#if PMA_ACCESS > 1U
|
||||
pdwVal++;
|
||||
#endif
|
||||
|
||||
pBuf++;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Copy data from packet memory area (PMA) to user memory buffer
|
||||
* @param USBx USB peripheral instance register address.
|
||||
* @param pbUsrBuf pointer to user memory area.
|
||||
* @param wPMABufAddr address into PMA.
|
||||
* @param wNBytes no. of bytes to be copied.
|
||||
* @retval None
|
||||
*/
|
||||
static void fsdev_read_pma(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
|
||||
{
|
||||
uint32_t n = (uint32_t)wNBytes >> 1;
|
||||
uint32_t BaseAddr = (uint32_t)USBx;
|
||||
uint32_t i, temp;
|
||||
__IO uint16_t *pdwVal;
|
||||
uint8_t *pBuf = pbUsrBuf;
|
||||
|
||||
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
|
||||
|
||||
for (i = n; i != 0U; i--) {
|
||||
temp = *(__IO uint16_t *)pdwVal;
|
||||
pdwVal++;
|
||||
*pBuf = (uint8_t)((temp >> 0) & 0xFFU);
|
||||
pBuf++;
|
||||
*pBuf = (uint8_t)((temp >> 8) & 0xFFU);
|
||||
pBuf++;
|
||||
|
||||
#if PMA_ACCESS > 1U
|
||||
pdwVal++;
|
||||
#endif
|
||||
}
|
||||
|
||||
if ((wNBytes % 2U) != 0U) {
|
||||
temp = *pdwVal;
|
||||
*pBuf = (uint8_t)((temp >> 0) & 0xFFU);
|
||||
}
|
||||
}
|
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user