first
This commit is contained in:
72
libraries/HAL_Drivers/drivers/config/f1/adc_config.h
Normal file
72
libraries/HAL_Drivers/drivers/config/f1/adc_config.h
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@@ -0,0 +1,72 @@
|
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
|
||||
* SPDX-License-Identifier: Apache-2.0
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||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
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||||
* 2018-12-07 zylx first version
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||||
*/
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#ifndef __ADC_CONFIG_H__
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#define __ADC_CONFIG_H__
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#include <rtthread.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef BSP_USING_ADC1
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#ifndef ADC1_CONFIG
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#define ADC1_CONFIG \
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{ \
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.Instance = ADC1, \
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.Init.DataAlign = ADC_DATAALIGN_RIGHT, \
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.Init.ScanConvMode = ADC_SCAN_DISABLE, \
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.Init.ContinuousConvMode = DISABLE, \
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.Init.NbrOfConversion = 1, \
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.Init.DiscontinuousConvMode = DISABLE, \
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.Init.NbrOfDiscConversion = 1, \
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.Init.ExternalTrigConv = ADC_SOFTWARE_START, \
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}
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#endif /* ADC1_CONFIG */
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#endif /* BSP_USING_ADC1 */
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#ifdef BSP_USING_ADC2
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#ifndef ADC2_CONFIG
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#define ADC2_CONFIG \
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{ \
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.Instance = ADC2, \
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.Init.DataAlign = ADC_DATAALIGN_RIGHT, \
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.Init.ScanConvMode = ADC_SCAN_DISABLE, \
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.Init.ContinuousConvMode = DISABLE, \
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.Init.NbrOfConversion = 1, \
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.Init.DiscontinuousConvMode = DISABLE, \
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.Init.NbrOfDiscConversion = 1, \
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.Init.ExternalTrigConv = ADC_SOFTWARE_START, \
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}
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#endif /* ADC2_CONFIG */
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#endif /* BSP_USING_ADC2 */
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#ifdef BSP_USING_ADC3
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#ifndef ADC3_CONFIG
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#define ADC3_CONFIG \
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{ \
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.Instance = ADC3, \
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.Init.DataAlign = ADC_DATAALIGN_RIGHT, \
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.Init.ScanConvMode = ADC_SCAN_DISABLE, \
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.Init.ContinuousConvMode = DISABLE, \
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.Init.NbrOfConversion = 1, \
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.Init.DiscontinuousConvMode = DISABLE, \
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.Init.NbrOfDiscConversion = 1, \
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.Init.ExternalTrigConv = ADC_SOFTWARE_START, \
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}
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#endif /* ADC3_CONFIG */
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#endif /* BSP_USING_ADC3 */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ADC_CONFIG_H__ */
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127
libraries/HAL_Drivers/drivers/config/f1/dma_config.h
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127
libraries/HAL_Drivers/drivers/config/f1/dma_config.h
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@@ -0,0 +1,127 @@
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
|
||||
* Change Logs:
|
||||
* Date Author Notes
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* 2018-01-02 SummerGift first version
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* 2019-01-08 SummerGift clean up the code
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*/
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#ifndef __DMA_CONFIG_H__
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#define __DMA_CONFIG_H__
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#include <rtthread.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* DMA1 channel1 */
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/* DMA1 channel2 */
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#if defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE)
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#define SPI1_DMA_RX_IRQHandler DMA1_Channel2_IRQHandler
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#define SPI1_RX_DMA_RCC RCC_AHBENR_DMA1EN
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#define SPI1_RX_DMA_INSTANCE DMA1_Channel2
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#define SPI1_RX_DMA_IRQ DMA1_Channel2_IRQn
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#elif defined(BSP_UART3_TX_USING_DMA) && !defined(UART3_TX_DMA_INSTANCE)
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#define UART3_DMA_TX_IRQHandler DMA1_Channel2_IRQHandler
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#define UART3_TX_DMA_RCC RCC_AHBENR_DMA1EN
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#define UART3_TX_DMA_INSTANCE DMA1_Channel2
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#define UART3_TX_DMA_IRQ DMA1_Channel2_IRQn
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#endif
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/* DMA1 channel3 */
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#if defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_INSTANCE)
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#define SPI1_DMA_TX_IRQHandler DMA1_Channel3_IRQHandler
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#define SPI1_TX_DMA_RCC RCC_AHBENR_DMA1EN
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#define SPI1_TX_DMA_INSTANCE DMA1_Channel3
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#define SPI1_TX_DMA_IRQ DMA1_Channel3_IRQn
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#elif defined(BSP_UART3_RX_USING_DMA) && !defined(UART3_RX_DMA_INSTANCE)
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#define UART3_DMA_RX_IRQHandler DMA1_Channel3_IRQHandler
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#define UART3_RX_DMA_RCC RCC_AHBENR_DMA1EN
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#define UART3_RX_DMA_INSTANCE DMA1_Channel3
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#define UART3_RX_DMA_IRQ DMA1_Channel3_IRQn
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#endif
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/* DMA1 channel4 */
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#if defined(BSP_SPI2_RX_USING_DMA) && !defined(SPI2_RX_DMA_INSTANCE)
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#define SPI2_DMA_RX_IRQHandler DMA1_Channel4_IRQHandler
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#define SPI2_RX_DMA_RCC RCC_AHBENR_DMA1EN
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#define SPI2_RX_DMA_INSTANCE DMA1_Channel4
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#define SPI2_RX_DMA_IRQ DMA1_Channel4_IRQn
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#elif defined(BSP_UART1_TX_USING_DMA) && !defined(UART1_TX_DMA_INSTANCE)
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#define UART1_DMA_TX_IRQHandler DMA1_Channel4_IRQHandler
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#define UART1_TX_DMA_RCC RCC_AHBENR_DMA1EN
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#define UART1_TX_DMA_INSTANCE DMA1_Channel4
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#define UART1_TX_DMA_IRQ DMA1_Channel4_IRQn
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#endif
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/* DMA1 channel5 */
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#if defined(BSP_SPI2_TX_USING_DMA) && !defined(SPI2_TX_DMA_INSTANCE)
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#define SPI2_DMA_TX_IRQHandler DMA1_Channel5_IRQHandler
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#define SPI2_TX_DMA_RCC RCC_AHBENR_DMA1EN
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#define SPI2_TX_DMA_INSTANCE DMA1_Channel5
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#define SPI2_TX_DMA_IRQ DMA1_Channel5_IRQn
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#elif defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE)
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#define UART1_DMA_RX_IRQHandler DMA1_Channel5_IRQHandler
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#define UART1_RX_DMA_RCC RCC_AHBENR_DMA1EN
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#define UART1_RX_DMA_INSTANCE DMA1_Channel5
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#define UART1_RX_DMA_IRQ DMA1_Channel5_IRQn
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#endif
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/* DMA1 channel6 */
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#if defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_INSTANCE)
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#define UART2_DMA_RX_IRQHandler DMA1_Channel6_IRQHandler
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#define UART2_RX_DMA_RCC RCC_AHBENR_DMA1EN
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#define UART2_RX_DMA_INSTANCE DMA1_Channel6
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#define UART2_RX_DMA_IRQ DMA1_Channel6_IRQn
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#endif
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/* DMA1 channel7 */
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#if defined(BSP_UART2_TX_USING_DMA) && !defined(UART2_TX_DMA_INSTANCE)
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#define UART2_DMA_TX_IRQHandler DMA1_Channel7_IRQHandler
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#define UART2_TX_DMA_RCC RCC_AHBENR_DMA1EN
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#define UART2_TX_DMA_INSTANCE DMA1_Channel7
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#define UART2_TX_DMA_IRQ DMA1_Channel7_IRQn
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#endif
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/* DMA2 channel1 */
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#if defined(BSP_SPI3_RX_USING_DMA) && !defined(SPI3_RX_DMA_INSTANCE)
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#define SPI3_DMA_RX_IRQHandler DMA2_Channel1_IRQHandler
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#define SPI3_RX_DMA_RCC RCC_AHBENR_DMA2EN
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#define SPI3_RX_DMA_INSTANCE DMA2_Channel1
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#define SPI3_RX_DMA_IRQ DMA2_Channel1_IRQn
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#endif
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/* DMA2 channel2 */
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#if defined(BSP_SPI3_TX_USING_DMA) && !defined(SPI3_TX_DMA_INSTANCE)
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#define SPI3_DMA_TX_IRQHandler DMA2_Channel2_IRQHandler
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#define SPI3_TX_DMA_RCC RCC_AHBENR_DMA2EN
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#define SPI3_TX_DMA_INSTANCE DMA2_Channel2
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#define SPI3_TX_DMA_IRQ DMA2_Channel2_IRQn
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#endif
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/* DMA2 channel3 */
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#if defined(BSP_UART4_RX_USING_DMA) && !defined(UART4_RX_DMA_INSTANCE)
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#define UART4_DMA_RX_IRQHandler DMA2_Channel3_IRQHandler
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#define UART4_RX_DMA_RCC RCC_AHBENR_DMA2EN
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#define UART4_RX_DMA_INSTANCE DMA2_Channel3
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#define UART4_RX_DMA_IRQ DMA2_Channel3_IRQn
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#endif
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/* DMA2 channel4 */
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/* DMA2 channel5 */
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#if defined(BSP_UART4_TX_USING_DMA) && !defined(UART4_TX_DMA_INSTANCE)
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#define UART4_DMA_TX_IRQHandler DMA2_Channel4_5_IRQHandler
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#define UART4_TX_DMA_RCC RCC_AHBENR_DMA2EN
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#define UART4_TX_DMA_INSTANCE DMA2_Channel5
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#define UART4_TX_DMA_IRQ DMA2_Channel4_5_IRQn
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#endif
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#ifdef __cplusplus
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||||
}
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#endif
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#endif /* __DMA_CONFIG_H__ */
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@@ -0,0 +1,68 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-08-23 balanceTWK first version
|
||||
*/
|
||||
|
||||
#ifndef __PULSE_ENCODER_CONFIG_H__
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#define __PULSE_ENCODER_CONFIG_H__
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#include <rtthread.h>
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||||
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#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_PULSE_ENCODER1
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#ifndef PULSE_ENCODER1_CONFIG
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#define PULSE_ENCODER1_CONFIG \
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{ \
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.tim_handler.Instance = TIM1, \
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.encoder_irqn = TIM1_UP_IRQn, \
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.name = "pulse1" \
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}
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#endif /* PULSE_ENCODER1_CONFIG */
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#endif /* BSP_USING_PULSE_ENCODER1 */
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#ifdef BSP_USING_PULSE_ENCODER2
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#ifndef PULSE_ENCODER2_CONFIG
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||||
#define PULSE_ENCODER2_CONFIG \
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||||
{ \
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.tim_handler.Instance = TIM2, \
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.encoder_irqn = TIM2_IRQn, \
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.name = "pulse2" \
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||||
}
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||||
#endif /* PULSE_ENCODER2_CONFIG */
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#endif /* BSP_USING_PULSE_ENCODER2 */
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#ifdef BSP_USING_PULSE_ENCODER3
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#ifndef PULSE_ENCODER3_CONFIG
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#define PULSE_ENCODER3_CONFIG \
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||||
{ \
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.tim_handler.Instance = TIM3, \
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.encoder_irqn = TIM3_IRQn, \
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.name = "pulse3" \
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}
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#endif /* PULSE_ENCODER3_CONFIG */
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#endif /* BSP_USING_PULSE_ENCODER3 */
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||||
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#ifdef BSP_USING_PULSE_ENCODER4
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#ifndef PULSE_ENCODER4_CONFIG
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||||
#define PULSE_ENCODER4_CONFIG \
|
||||
{ \
|
||||
.tim_handler.Instance = TIM4, \
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||||
.encoder_irqn = TIM4_IRQn, \
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||||
.name = "pulse4" \
|
||||
}
|
||||
#endif /* PULSE_ENCODER4_CONFIG */
|
||||
#endif /* BSP_USING_PULSE_ENCODER4 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __PULSE_ENCODER_CONFIG_H__ */
|
||||
196
libraries/HAL_Drivers/drivers/config/f1/pwm_config.h
Normal file
196
libraries/HAL_Drivers/drivers/config/f1/pwm_config.h
Normal file
@@ -0,0 +1,196 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-12-13 zylx first version
|
||||
* 2023-04-08 Wangyuqiang complete PWM defination
|
||||
*/
|
||||
|
||||
#ifndef __PWM_CONFIG_H__
|
||||
#define __PWM_CONFIG_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_PWM1
|
||||
#define PWM1_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM1, \
|
||||
.name = "pwm1", \
|
||||
.channel = RT_NULL \
|
||||
}
|
||||
#endif /* BSP_USING_PWM1 */
|
||||
|
||||
#ifdef BSP_USING_PWM2
|
||||
#define PWM2_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM2, \
|
||||
.name = "pwm2", \
|
||||
.channel = RT_NULL \
|
||||
}
|
||||
#endif /* BSP_USING_PWM2 */
|
||||
|
||||
#ifdef BSP_USING_PWM3
|
||||
#define PWM3_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM3, \
|
||||
.name = "pwm3", \
|
||||
.channel = RT_NULL \
|
||||
}
|
||||
#endif /* BSP_USING_PWM3 */
|
||||
|
||||
#ifdef BSP_USING_PWM4
|
||||
#define PWM4_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM4, \
|
||||
.name = "pwm4", \
|
||||
.channel = RT_NULL \
|
||||
}
|
||||
#endif /* BSP_USING_PWM4 */
|
||||
|
||||
#ifdef BSP_USING_PWM5
|
||||
#define PWM5_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM5, \
|
||||
.name = "pwm5", \
|
||||
.channel = RT_NULL \
|
||||
}
|
||||
#endif /* BSP_USING_PWM5 */
|
||||
|
||||
#ifdef BSP_USING_PWM6
|
||||
#define PWM6_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM6, \
|
||||
.name = "pwm6", \
|
||||
.channel = RT_NULL \
|
||||
}
|
||||
#endif /* BSP_USING_PWM6 */
|
||||
|
||||
#ifdef BSP_USING_PWM7
|
||||
#define PWM7_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM7, \
|
||||
.name = "pwm7", \
|
||||
.channel = RT_NULL \
|
||||
}
|
||||
#endif /* BSP_USING_PWM7 */
|
||||
|
||||
#ifdef BSP_USING_PWM8
|
||||
#define PWM8_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM8, \
|
||||
.name = "pwm8", \
|
||||
.channel = RT_NULL \
|
||||
}
|
||||
#endif /* BSP_USING_PWM8 */
|
||||
|
||||
#ifdef BSP_USING_PWM9
|
||||
#define PWM9_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM9, \
|
||||
.name = "pwm9", \
|
||||
.channel = RT_NULL \
|
||||
}
|
||||
#endif /* BSP_USING_PWM9 */
|
||||
|
||||
#ifdef BSP_USING_PWM10
|
||||
#define PWM10_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM10, \
|
||||
.name = "pwm10", \
|
||||
.channel = RT_NULL \
|
||||
}
|
||||
#endif /* BSP_USING_PWM10 */
|
||||
|
||||
#ifdef BSP_USING_PWM11
|
||||
#define PWM11_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM11, \
|
||||
.name = "pwm11", \
|
||||
.channel = RT_NULL \
|
||||
}
|
||||
#endif /* BSP_USING_PWM11 */
|
||||
|
||||
#ifdef BSP_USING_PWM12
|
||||
#define PWM12_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM12, \
|
||||
.name = "pwm12", \
|
||||
.channel = RT_NULL \
|
||||
}
|
||||
#endif /* BSP_USING_PWM12 */
|
||||
|
||||
#ifdef BSP_USING_PWM13
|
||||
#define PWM13_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM13, \
|
||||
.name = "pwm13", \
|
||||
.channel = RT_NULL \
|
||||
}
|
||||
#endif /* BSP_USING_PWM13 */
|
||||
|
||||
#ifdef BSP_USING_PWM14
|
||||
#define PWM14_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM14, \
|
||||
.name = "pwm14", \
|
||||
.channel = RT_NULL \
|
||||
}
|
||||
#endif /* BSP_USING_PWM14 */
|
||||
|
||||
#ifdef BSP_USING_PWM15
|
||||
#define PWM15_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM15, \
|
||||
.name = "pwm15", \
|
||||
.channel = RT_NULL \
|
||||
}
|
||||
#endif /* BSP_USING_PWM15 */
|
||||
|
||||
#ifdef BSP_USING_PWM16
|
||||
#define PWM16_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM16, \
|
||||
.name = "pwm16", \
|
||||
.channel = RT_NULL \
|
||||
}
|
||||
#endif /* BSP_USING_PWM16 */
|
||||
|
||||
#ifdef BSP_USING_PWM17
|
||||
#define PWM17_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM17, \
|
||||
.name = "pwm17", \
|
||||
.channel = RT_NULL \
|
||||
}
|
||||
#endif /* BSP_USING_PWM17 */
|
||||
|
||||
#ifdef BSP_USING_PWM18
|
||||
#define PWM18_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM18, \
|
||||
.name = "pwm18", \
|
||||
.channel = RT_NULL \
|
||||
}
|
||||
#endif /* BSP_USING_PWM18 */
|
||||
|
||||
#ifdef BSP_USING_PWM19
|
||||
#define PWM19_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM19, \
|
||||
.name = "pwm19", \
|
||||
.channel = RT_NULL \
|
||||
}
|
||||
#endif /* BSP_USING_PWM19 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __PWM_CONFIG_H__ */
|
||||
42
libraries/HAL_Drivers/drivers/config/f1/sdio_config.h
Normal file
42
libraries/HAL_Drivers/drivers/config/f1/sdio_config.h
Normal file
@@ -0,0 +1,42 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-12-13 BalanceTWK first version
|
||||
*/
|
||||
|
||||
#ifndef __SDIO_CONFIG_H__
|
||||
#define __SDIO_CONFIG_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "stm32f1xx_hal.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_SDIO
|
||||
#define SDIO_BUS_CONFIG \
|
||||
{ \
|
||||
.Instance = SDIO, \
|
||||
.dma_rx.dma_rcc = RCC_AHBENR_DMA2EN, \
|
||||
.dma_tx.dma_rcc = RCC_AHBENR_DMA2EN, \
|
||||
.dma_rx.Instance = DMA2_Channel4, \
|
||||
.dma_rx.dma_irq = DMA2_Channel4_IRQn, \
|
||||
.dma_tx.Instance = DMA2_Channel4, \
|
||||
.dma_tx.dma_irq = DMA2_Channel4_IRQn, \
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__SDIO_CONFIG_H__ */
|
||||
|
||||
|
||||
|
||||
127
libraries/HAL_Drivers/drivers/config/f1/spi_config.h
Normal file
127
libraries/HAL_Drivers/drivers/config/f1/spi_config.h
Normal file
@@ -0,0 +1,127 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-11-06 SummerGift first version
|
||||
* 2019-01-05 SummerGift modify DMA support
|
||||
*/
|
||||
|
||||
#ifndef __SPI_CONFIG_H__
|
||||
#define __SPI_CONFIG_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_SPI1
|
||||
#ifndef SPI1_BUS_CONFIG
|
||||
#define SPI1_BUS_CONFIG \
|
||||
{ \
|
||||
.Instance = SPI1, \
|
||||
.bus_name = "spi1", \
|
||||
.irq_type = SPI1_IRQn, \
|
||||
}
|
||||
#endif /* SPI1_BUS_CONFIG */
|
||||
#endif /* BSP_USING_SPI1 */
|
||||
|
||||
#ifdef BSP_SPI1_TX_USING_DMA
|
||||
#ifndef SPI1_TX_DMA_CONFIG
|
||||
#define SPI1_TX_DMA_CONFIG \
|
||||
{ \
|
||||
.dma_rcc = SPI1_TX_DMA_RCC, \
|
||||
.Instance = SPI1_TX_DMA_INSTANCE, \
|
||||
.dma_irq = SPI1_TX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* SPI1_TX_DMA_CONFIG */
|
||||
#endif /* BSP_SPI1_TX_USING_DMA */
|
||||
|
||||
#ifdef BSP_SPI1_RX_USING_DMA
|
||||
#ifndef SPI1_RX_DMA_CONFIG
|
||||
#define SPI1_RX_DMA_CONFIG \
|
||||
{ \
|
||||
.dma_rcc = SPI1_RX_DMA_RCC, \
|
||||
.Instance = SPI1_RX_DMA_INSTANCE, \
|
||||
.dma_irq = SPI1_RX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* SPI1_RX_DMA_CONFIG */
|
||||
#endif /* BSP_SPI1_RX_USING_DMA */
|
||||
|
||||
#ifdef BSP_USING_SPI2
|
||||
#ifndef SPI2_BUS_CONFIG
|
||||
#define SPI2_BUS_CONFIG \
|
||||
{ \
|
||||
.Instance = SPI2, \
|
||||
.bus_name = "spi2", \
|
||||
.irq_type = SPI2_IRQn, \
|
||||
}
|
||||
#endif /* SPI2_BUS_CONFIG */
|
||||
#endif /* BSP_USING_SPI2 */
|
||||
|
||||
#ifdef BSP_SPI2_TX_USING_DMA
|
||||
#ifndef SPI2_TX_DMA_CONFIG
|
||||
#define SPI2_TX_DMA_CONFIG \
|
||||
{ \
|
||||
.dma_rcc = SPI2_TX_DMA_RCC, \
|
||||
.Instance = SPI2_TX_DMA_INSTANCE, \
|
||||
.dma_irq = SPI2_TX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* SPI2_TX_DMA_CONFIG */
|
||||
#endif /* BSP_SPI2_TX_USING_DMA */
|
||||
|
||||
#ifdef BSP_SPI2_RX_USING_DMA
|
||||
#ifndef SPI2_RX_DMA_CONFIG
|
||||
#define SPI2_RX_DMA_CONFIG \
|
||||
{ \
|
||||
.dma_rcc = SPI2_RX_DMA_RCC, \
|
||||
.Instance = SPI2_RX_DMA_INSTANCE, \
|
||||
.dma_irq = SPI2_RX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* SPI2_RX_DMA_CONFIG */
|
||||
#endif /* BSP_SPI2_RX_USING_DMA */
|
||||
|
||||
#ifdef BSP_USING_SPI3
|
||||
#ifndef SPI3_BUS_CONFIG
|
||||
#define SPI3_BUS_CONFIG \
|
||||
{ \
|
||||
.Instance = SPI3, \
|
||||
.bus_name = "spi3", \
|
||||
.irq_type = SPI3_IRQn, \
|
||||
}
|
||||
#endif /* SPI3_BUS_CONFIG */
|
||||
#endif /* BSP_USING_SPI3 */
|
||||
|
||||
#ifdef BSP_SPI3_TX_USING_DMA
|
||||
#ifndef SPI3_TX_DMA_CONFIG
|
||||
#define SPI3_TX_DMA_CONFIG \
|
||||
{ \
|
||||
.dma_rcc = SPI3_TX_DMA_RCC, \
|
||||
.Instance = SPI3_TX_DMA_INSTANCE, \
|
||||
.dma_irq = SPI3_TX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* SPI3_TX_DMA_CONFIG */
|
||||
#endif /* BSP_SPI3_TX_USING_DMA */
|
||||
|
||||
#ifdef BSP_SPI3_RX_USING_DMA
|
||||
#ifndef SPI3_RX_DMA_CONFIG
|
||||
#define SPI3_RX_DMA_CONFIG \
|
||||
{ \
|
||||
.dma_rcc = SPI3_RX_DMA_RCC, \
|
||||
.Instance = SPI3_RX_DMA_INSTANCE, \
|
||||
.dma_irq = SPI3_RX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* SPI3_RX_DMA_CONFIG */
|
||||
#endif /* BSP_SPI3_RX_USING_DMA */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__SPI_CONFIG_H__ */
|
||||
|
||||
|
||||
|
||||
78
libraries/HAL_Drivers/drivers/config/f1/tim_config.h
Normal file
78
libraries/HAL_Drivers/drivers/config/f1/tim_config.h
Normal file
@@ -0,0 +1,78 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-12-11 zylx first version
|
||||
*/
|
||||
|
||||
#ifndef __TIM_CONFIG_H__
|
||||
#define __TIM_CONFIG_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifndef TIM_DEV_INFO_CONFIG
|
||||
#define TIM_DEV_INFO_CONFIG \
|
||||
{ \
|
||||
.maxfreq = 1000000, \
|
||||
.minfreq = 2000, \
|
||||
.maxcnt = 0xFFFF, \
|
||||
.cntmode = HWTIMER_CNTMODE_UP, \
|
||||
}
|
||||
#endif /* TIM_DEV_INFO_CONFIG */
|
||||
|
||||
#ifdef BSP_USING_TIM2
|
||||
#ifndef TIM2_CONFIG
|
||||
#define TIM2_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM2, \
|
||||
.tim_irqn = TIM2_IRQn, \
|
||||
.name = "timer2", \
|
||||
}
|
||||
#endif /* TIM2_CONFIG */
|
||||
#endif /* BSP_USING_TIM2 */
|
||||
|
||||
#ifdef BSP_USING_TIM3
|
||||
#ifndef TIM3_CONFIG
|
||||
#define TIM3_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM3, \
|
||||
.tim_irqn = TIM3_IRQn, \
|
||||
.name = "timer3", \
|
||||
}
|
||||
#endif /* TIM3_CONFIG */
|
||||
#endif /* BSP_USING_TIM3 */
|
||||
|
||||
#ifdef BSP_USING_TIM4
|
||||
#ifndef TIM4_CONFIG
|
||||
#define TIM4_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM4, \
|
||||
.tim_irqn = TIM4_IRQn, \
|
||||
.name = "timer4", \
|
||||
}
|
||||
#endif /* TIM4_CONFIG */
|
||||
#endif /* BSP_USING_TIM4 */
|
||||
|
||||
#ifdef BSP_USING_TIM5
|
||||
#ifndef TIM5_CONFIG
|
||||
#define TIM5_CONFIG \
|
||||
{ \
|
||||
.tim_handle.Instance = TIM5, \
|
||||
.tim_irqn = TIM5_IRQn, \
|
||||
.name = "timer5", \
|
||||
}
|
||||
#endif /* TIM5_CONFIG */
|
||||
#endif /* BSP_USING_TIM5 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __TIM_CONFIG_H__ */
|
||||
178
libraries/HAL_Drivers/drivers/config/f1/uart_config.h
Normal file
178
libraries/HAL_Drivers/drivers/config/f1/uart_config.h
Normal file
@@ -0,0 +1,178 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-10-30 BalanceTWK first version
|
||||
* 2019-01-05 SummerGift modify DMA support
|
||||
*/
|
||||
|
||||
#ifndef __UART_CONFIG_H__
|
||||
#define __UART_CONFIG_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "dma_config.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined(BSP_USING_UART1)
|
||||
#ifndef UART1_CONFIG
|
||||
#define UART1_CONFIG \
|
||||
{ \
|
||||
.name = "uart1", \
|
||||
.Instance = USART1, \
|
||||
.irq_type = USART1_IRQn, \
|
||||
}
|
||||
#endif /* UART1_CONFIG */
|
||||
|
||||
#if defined(BSP_UART1_RX_USING_DMA)
|
||||
#ifndef UART1_DMA_RX_CONFIG
|
||||
#define UART1_DMA_RX_CONFIG \
|
||||
{ \
|
||||
.Instance = UART1_RX_DMA_INSTANCE, \
|
||||
.dma_rcc = UART1_RX_DMA_RCC, \
|
||||
.dma_irq = UART1_RX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* UART1_DMA_RX_CONFIG */
|
||||
#endif /* BSP_UART1_RX_USING_DMA */
|
||||
|
||||
#if defined(BSP_UART1_TX_USING_DMA)
|
||||
#ifndef UART1_DMA_TX_CONFIG
|
||||
#define UART1_DMA_TX_CONFIG \
|
||||
{ \
|
||||
.Instance = UART1_TX_DMA_INSTANCE, \
|
||||
.dma_rcc = UART1_TX_DMA_RCC, \
|
||||
.dma_irq = UART1_TX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* UART1_DMA_TX_CONFIG */
|
||||
#endif /* BSP_UART1_TX_USING_DMA */
|
||||
#endif /* BSP_USING_UART1 */
|
||||
|
||||
#if defined(BSP_USING_UART2)
|
||||
#ifndef UART2_CONFIG
|
||||
#define UART2_CONFIG \
|
||||
{ \
|
||||
.name = "uart2", \
|
||||
.Instance = USART2, \
|
||||
.irq_type = USART2_IRQn, \
|
||||
}
|
||||
#endif /* UART2_CONFIG */
|
||||
|
||||
#if defined(BSP_UART2_RX_USING_DMA)
|
||||
#ifndef UART2_DMA_RX_CONFIG
|
||||
#define UART2_DMA_RX_CONFIG \
|
||||
{ \
|
||||
.Instance = UART2_RX_DMA_INSTANCE, \
|
||||
.dma_rcc = UART2_RX_DMA_RCC, \
|
||||
.dma_irq = UART2_RX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* UART2_DMA_RX_CONFIG */
|
||||
#endif /* BSP_UART2_RX_USING_DMA */
|
||||
|
||||
#if defined(BSP_UART2_TX_USING_DMA)
|
||||
#ifndef UART2_DMA_TX_CONFIG
|
||||
#define UART2_DMA_TX_CONFIG \
|
||||
{ \
|
||||
.Instance = UART2_TX_DMA_INSTANCE, \
|
||||
.dma_rcc = UART2_TX_DMA_RCC, \
|
||||
.dma_irq = UART2_TX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* UART2_DMA_TX_CONFIG */
|
||||
#endif /* BSP_UART2_TX_USING_DMA */
|
||||
#endif /* BSP_USING_UART2 */
|
||||
|
||||
#if defined(BSP_USING_UART3)
|
||||
#ifndef UART3_CONFIG
|
||||
#define UART3_CONFIG \
|
||||
{ \
|
||||
.name = "uart3", \
|
||||
.Instance = USART3, \
|
||||
.irq_type = USART3_IRQn, \
|
||||
}
|
||||
#endif /* UART3_CONFIG */
|
||||
|
||||
#if defined(BSP_UART3_RX_USING_DMA)
|
||||
#ifndef UART3_DMA_RX_CONFIG
|
||||
#define UART3_DMA_RX_CONFIG \
|
||||
{ \
|
||||
.Instance = UART3_RX_DMA_INSTANCE, \
|
||||
.dma_rcc = UART3_RX_DMA_RCC, \
|
||||
.dma_irq = UART3_RX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* UART3_DMA_RX_CONFIG */
|
||||
#endif /* BSP_UART3_RX_USING_DMA */
|
||||
|
||||
#if defined(BSP_UART3_TX_USING_DMA)
|
||||
#ifndef UART3_DMA_TX_CONFIG
|
||||
#define UART3_DMA_TX_CONFIG \
|
||||
{ \
|
||||
.Instance = UART3_TX_DMA_INSTANCE, \
|
||||
.dma_rcc = UART3_TX_DMA_RCC, \
|
||||
.dma_irq = UART3_TX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* UART3_DMA_TX_CONFIG */
|
||||
#endif /* BSP_UART3_TX_USING_DMA */
|
||||
#endif /* BSP_USING_UART3 */
|
||||
|
||||
#if defined(BSP_USING_UART4)
|
||||
#ifndef UART4_CONFIG
|
||||
#define UART4_CONFIG \
|
||||
{ \
|
||||
.name = "uart4", \
|
||||
.Instance = UART4, \
|
||||
.irq_type = UART4_IRQn, \
|
||||
}
|
||||
#endif /* UART4_CONFIG */
|
||||
|
||||
#if defined(BSP_UART4_RX_USING_DMA)
|
||||
#ifndef UART4_DMA_RX_CONFIG
|
||||
#define UART4_DMA_RX_CONFIG \
|
||||
{ \
|
||||
.Instance = UART4_RX_DMA_INSTANCE, \
|
||||
.dma_rcc = UART4_RX_DMA_RCC, \
|
||||
.dma_irq = UART4_RX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* UART4_DMA_RX_CONFIG */
|
||||
#endif /* BSP_UART4_RX_USING_DMA */
|
||||
|
||||
#if defined(BSP_UART4_TX_USING_DMA)
|
||||
#ifndef UART4_DMA_TX_CONFIG
|
||||
#define UART4_DMA_TX_CONFIG \
|
||||
{ \
|
||||
.Instance = UART4_TX_DMA_INSTANCE, \
|
||||
.dma_rcc = UART4_TX_DMA_RCC, \
|
||||
.dma_irq = UART4_TX_DMA_IRQ, \
|
||||
}
|
||||
#endif /* UART4_DMA_TX_CONFIG */
|
||||
#endif /* BSP_UART4_TX_USING_DMA */
|
||||
#endif /* BSP_USING_UART4 */
|
||||
|
||||
#if defined(BSP_USING_UART5)
|
||||
#ifndef UART5_CONFIG
|
||||
#define UART5_CONFIG \
|
||||
{ \
|
||||
.name = "uart5", \
|
||||
.Instance = UART5, \
|
||||
.irq_type = UART5_IRQn, \
|
||||
}
|
||||
#endif /* UART5_CONFIG */
|
||||
#endif /* BSP_USING_UART5 */
|
||||
|
||||
#if defined(BSP_UART5_RX_USING_DMA)
|
||||
#ifndef UART5_DMA_RX_CONFIG
|
||||
#define UART5_DMA_RX_CONFIG \
|
||||
{ \
|
||||
.Instance = DMA_NOT_AVAILABLE, \
|
||||
}
|
||||
#endif /* UART5_DMA_RX_CONFIG */
|
||||
#endif /* BSP_UART5_RX_USING_DMA */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
27
libraries/HAL_Drivers/drivers/config/f1/usbd_config.h
Normal file
27
libraries/HAL_Drivers/drivers/config/f1/usbd_config.h
Normal file
@@ -0,0 +1,27 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-04-10 ZYH first version
|
||||
* 2019-07-29 Chinese66 change from f4 to f1
|
||||
*/
|
||||
#ifndef __USBD_CONFIG_H__
|
||||
#define __USBD_CONFIG_H__
|
||||
|
||||
#define USBD_IRQ_TYPE USB_LP_CAN1_RX0_IRQn
|
||||
#define USBD_IRQ_HANDLER USB_LP_CAN1_RX0_IRQHandler
|
||||
#define USBD_INSTANCE USB
|
||||
#define USBD_PCD_SPEED PCD_SPEED_FULL
|
||||
#define USBD_PCD_PHY_MODULE PCD_PHY_EMBEDDED
|
||||
|
||||
#ifndef BSP_USB_CONNECT_PIN
|
||||
#define BSP_USB_CONNECT_PIN -1
|
||||
#endif
|
||||
|
||||
#ifndef BSP_USB_PULL_UP_STATUS
|
||||
#define BSP_USB_PULL_UP_STATUS 1
|
||||
#endif
|
||||
#endif
|
||||
Reference in New Issue
Block a user