445 lines
11 KiB
C
445 lines
11 KiB
C
/*
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* File : emac.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006-2014, RT-Thread Develop Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://openlab.rt-thread.com/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2014-08-29 aozima first implementation
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*/
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#include <rtthread.h>
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#include <netif/ethernetif.h>
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#include "lwipopts.h"
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#include "board.h"
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#include "app_phy.h"
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/* debug option */
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#define ETH_DEBUG
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//#define ETH_RX_DUMP
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//#define ETH_TX_DUMP
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#ifdef ETH_DEBUG
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#define CME_ETH_PRINTF rt_kprintf
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#else
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#define CME_ETH_PRINTF(...)
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#endif
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#define MAX_ADDR_LEN 6
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struct rt_cme_eth
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{
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/* inherit from ethernet device */
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struct eth_device parent;
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/* interface address info. */
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rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */
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uint32_t ETH_Speed;
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uint32_t ETH_Mode;
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struct rt_semaphore tx_buf_free;
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struct rt_mutex lock;
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};
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static struct rt_cme_eth cme_eth_device;
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#if defined(ETH_RX_DUMP) || defined(ETH_TX_DUMP)
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static void packet_dump(const char * msg, const struct pbuf* p)
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{
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const struct pbuf* q;
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rt_uint32_t i,j;
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rt_uint8_t *ptr;
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rt_kprintf("%s %d byte\n", msg, p->tot_len);
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i=0;
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for(q=p; q != RT_NULL; q= q->next)
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{
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ptr = q->payload;
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for(j=0; j<q->len; j++)
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{
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if( (i%8) == 0 )
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{
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rt_kprintf(" ");
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}
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if( (i%16) == 0 )
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{
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rt_kprintf("\r\n");
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}
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rt_kprintf("%02x ",*ptr);
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i++;
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ptr++;
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}
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}
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rt_kprintf("\n\n");
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}
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#else
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#define packet_dump(...)
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#endif /* dump */
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/////////////////////////////////////////////////////////////////
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uint32_t rxTotalMemory = 0x2000;
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uint32_t rxDescNum = 3;
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uint32_t rxBufSize = 0x400;
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uint32_t rxBaseAddr = 0x2000C000;// C000-48K
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uint32_t txBaseAddr = 0x2000E000;// E000-56K
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uint32_t txTotalMemory = 0x2000;
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BOOL isRxNoBuf = FALSE;
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#define ETH_MAX_PACKET_SIZE 1520 /* ETH_HEADER + ETH_EXTRA + MAX_ETH_PAYLOAD + ETH_CRC */
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#define ETH_RXBUFNB 4
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#define ETH_TXBUFNB 2
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struct eth_rx_buffer
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{
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ETH_RX_DESC desc;
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uint32_t buffer[ETH_MAX_PACKET_SIZE/4];
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};
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struct eth_tx_buffer
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{
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ETH_TX_DESC desc;
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uint32_t buffer[ETH_MAX_PACKET_SIZE/4];
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};
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static struct eth_rx_buffer rx_buffer[ETH_RXBUFNB];
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static struct eth_tx_buffer tx_buffer[ETH_TXBUFNB];
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static void RxDescChainInit(void)
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{
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uint32_t i;
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// initialize rx descriptor
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ETH_RX_DESC *desc = &rx_buffer[0].desc;
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for (i = 0; i < ETH_RXBUFNB; i++)
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{
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desc->RX_1.RX1_b.SIZE = ETH_MAX_PACKET_SIZE;
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desc->bufAddr = (uint32_t)rx_buffer[i].buffer;
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if((i+1) == ETH_RXBUFNB)
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desc->nextDescAddr = (uint32_t)&rx_buffer[0].desc;
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else
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desc->nextDescAddr = (uint32_t)&rx_buffer[i+1].desc;
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desc = (ETH_RX_DESC *)desc->nextDescAddr;
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}
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ETH_SetRxDescRing(&rx_buffer[0].desc);
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}
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static void TxDescChainInit(void)
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{
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uint32_t i;
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// initialize tx descriptor
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ETH_TX_DESC *desc = &tx_buffer[0].desc;
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for (i = 0; i < ETH_TXBUFNB; i++)
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{
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desc->TX_1.TX1_b.SIZE = ETH_MAX_PACKET_SIZE;
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desc->bufAddr = (uint32_t)tx_buffer[i].buffer;
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if((i+1) == ETH_TXBUFNB)
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desc->nextDescAddr = (uint32_t)&tx_buffer[0].desc;
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else
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desc->nextDescAddr = (uint32_t)&tx_buffer[i+1].desc;
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desc = (ETH_TX_DESC *)desc->nextDescAddr;
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}
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ETH_SetTxDescRing(&tx_buffer[0].desc);
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}
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/////////////////////////////////////////////////////////////////
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/* initialize the interface */
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static rt_err_t rt_cme_eth_init(rt_device_t dev)
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{
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struct rt_cme_eth * cme_eth = (struct rt_cme_eth *)dev;
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ETH_InitTypeDef init;
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ETH_FrameFilter flt;
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init.ETH_Speed = phy_GetSpeed();
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init.ETH_Duplex = phy_GetDuplex();
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init.ETH_LinkUp = phy_IsLink();
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init.ETH_RxEn = TRUE;
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init.ETH_TxEn = TRUE;
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init.ETH_ChecksumOffload = FALSE;
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init.ETH_JumboFrame = FALSE;
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memcpy(init.ETH_MacAddr, cme_eth->dev_addr, sizeof(init.ETH_MacAddr));
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// Disable broadcast;
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// TODO: why?
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memset(&flt, 0, sizeof(ETH_FrameFilter));
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flt.ETH_BroadcastFilterEnable = FALSE;
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flt.ETH_OwnFilterEnable = FALSE;
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flt.ETH_SelfDrop = FALSE;
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flt.ETH_SourceFilterEnable = FALSE;
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flt.ETH_SourceDrop = FALSE;
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init.ETH_Filter = &flt;
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if (!phy_Init())
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{
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rt_kprintf("phy_Init failed!\n");
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while (1);
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}
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if (!ETH_Init(&init))
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{
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rt_kprintf("ETH_Init failed!\n");
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while (1);
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}
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RxDescChainInit();
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TxDescChainInit();
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ETH_ITConfig(ETH_INT_BUS_FATAL_ERROR, TRUE);
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ETH_ITConfig(ETH_INT_RX_COMPLETE_FRAME, TRUE);
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ETH_ITConfig(ETH_INT_RX_BUF_UNAVAI, TRUE);
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ETH_ITConfig(ETH_INT_RX_STOP, TRUE);
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ETH_StartRx();
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ETH_ITConfig(ETH_INT_TX_COMPLETE_FRAME, TRUE);
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ETH_StartTx();
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return RT_EOK;
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}
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static rt_err_t rt_cme_eth_open(rt_device_t dev, rt_uint16_t oflag)
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{
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return RT_EOK;
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}
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static rt_err_t rt_cme_eth_close(rt_device_t dev)
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{
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return RT_EOK;
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}
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static rt_size_t rt_cme_eth_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
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{
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rt_set_errno(-RT_ENOSYS);
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return 0;
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}
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static rt_size_t rt_cme_eth_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
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{
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rt_set_errno(-RT_ENOSYS);
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return 0;
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}
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static rt_err_t rt_cme_eth_control(rt_device_t dev, int cmd, void *args)
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{
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switch(cmd)
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{
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case NIOCTL_GADDR:
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/* get mac address */
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if(args) rt_memcpy(args, cme_eth_device.dev_addr, 6);
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else return -RT_ERROR;
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break;
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default :
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break;
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}
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return RT_EOK;
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}
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/* ethernet device interface */
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/* transmit packet. */
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rt_err_t rt_cme_eth_tx( rt_device_t dev, struct pbuf* p)
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{
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rt_err_t result = RT_EOK;
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ETH_TX_DESC *desc;
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struct rt_cme_eth * cme_eth = (struct rt_cme_eth *)dev;
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rt_mutex_take(&cme_eth->lock, RT_WAITING_FOREVER);
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#ifdef ETH_TX_DUMP
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packet_dump("TX dump", p);
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#endif /* ETH_TX_DUMP */
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/* get free tx buffer */
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{
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rt_err_t result;
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result = rt_sem_take(&cme_eth->tx_buf_free, RT_TICK_PER_SECOND/10);
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if (result != RT_EOK)
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{
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result = -RT_ERROR;
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goto _exit;
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}
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}
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desc = ETH_AcquireFreeTxDesc();
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if(desc == RT_NULL)
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{
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CME_ETH_PRINTF("TxDesc not ready!\n");
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RT_ASSERT(0);
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result = -RT_ERROR;
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goto _exit;
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}
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desc->TX_0.TX0_b.FS = TRUE;
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desc->TX_0.TX0_b.LS = TRUE;
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desc->TX_1.TX1_b.SIZE = p->tot_len;
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pbuf_copy_partial(p, ( void *)(desc->bufAddr), p->tot_len, 0);
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ETH_ReleaseTxDesc(desc);
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ETH_ResumeTx();
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_exit:
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rt_mutex_release(&cme_eth->lock);
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return result;
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}
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/* reception packet. */
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struct pbuf *rt_cme_eth_rx(rt_device_t dev)
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{
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struct pbuf* p = RT_NULL;
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ETH_RX_DESC *desc;
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uint32_t framelength;
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struct rt_cme_eth * cme_eth = (struct rt_cme_eth *)dev;
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rt_mutex_take(&cme_eth->lock, RT_WAITING_FOREVER);
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desc = ETH_AcquireFreeRxDesc();
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if(desc == RT_NULL)
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{
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ETH_ITConfig(ETH_INT_RX_COMPLETE_FRAME, TRUE);
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ETH_ITConfig(ETH_INT_RX_BUF_UNAVAI, TRUE);
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ETH_ResumeRx();
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goto _exit;
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}
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framelength = desc->RX_0.RX0_b.FL;
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/* allocate buffer */
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p = pbuf_alloc(PBUF_LINK, framelength, PBUF_RAM);
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if (p != RT_NULL)
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{
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pbuf_take(p, (const void *)(desc->bufAddr), framelength);
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#ifdef ETH_RX_DUMP
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packet_dump("RX dump", p);
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#endif /* ETH_RX_DUMP */
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}
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ETH_ReleaseRxDesc(desc);
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_exit:
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rt_mutex_release(&cme_eth->lock);
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return p;
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}
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static void NVIC_Configuration(void)
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{
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NVIC_InitTypeDef NVIC_InitStructure;
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/* Enable the USARTy Interrupt */
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NVIC_InitStructure.NVIC_IRQChannel = ETH_INT_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelCmd = TRUE;
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NVIC_Init(&NVIC_InitStructure);
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}
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int cme_m7_eth_init(void)
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{
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// /* PHY RESET: PA4 */
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// {
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// GPIO_ResetBits(GPIOA, GPIO_Pin_4);
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// rt_thread_delay(2);
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// GPIO_SetBits(GPIOA, GPIO_Pin_4);
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// rt_thread_delay(2);
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// }
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// GPIO_Configuration();
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NVIC_Configuration();
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// cme_eth_device.ETH_Speed = ETH_Speed_100M;
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// cme_eth_device.ETH_Mode = ETH_Mode_FullDuplex;
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/* OUI 00-80-E1 STMICROELECTRONICS. */
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cme_eth_device.dev_addr[0] = 0x00;
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cme_eth_device.dev_addr[1] = 0x80;
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cme_eth_device.dev_addr[2] = 0xE1;
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/* generate MAC addr from 96bit unique ID (only for test). */
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// cme_eth_device.dev_addr[3] = *(rt_uint8_t*)(0x1FFF7A10+4);
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// cme_eth_device.dev_addr[4] = *(rt_uint8_t*)(0x1FFF7A10+2);
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// cme_eth_device.dev_addr[5] = *(rt_uint8_t*)(0x1FFF7A10+0);
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cme_eth_device.dev_addr[3] = 12;
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cme_eth_device.dev_addr[4] = 34;
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cme_eth_device.dev_addr[5] = 56;
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cme_eth_device.parent.parent.init = rt_cme_eth_init;
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cme_eth_device.parent.parent.open = rt_cme_eth_open;
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cme_eth_device.parent.parent.close = rt_cme_eth_close;
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cme_eth_device.parent.parent.read = rt_cme_eth_read;
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cme_eth_device.parent.parent.write = rt_cme_eth_write;
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cme_eth_device.parent.parent.control = rt_cme_eth_control;
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cme_eth_device.parent.parent.user_data = RT_NULL;
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cme_eth_device.parent.eth_rx = rt_cme_eth_rx;
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cme_eth_device.parent.eth_tx = rt_cme_eth_tx;
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/* init EMAC lock */
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rt_mutex_init(&cme_eth_device.lock, "emac0", RT_IPC_FLAG_PRIO);
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/* init tx buffer free semaphore */
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rt_sem_init(&cme_eth_device.tx_buf_free,
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"tx_buf",
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ETH_TXBUFNB,
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RT_IPC_FLAG_FIFO);
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/* register eth device */
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eth_device_init(&(cme_eth_device.parent), "e0");
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return RT_EOK;
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}
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void ETH_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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if (ETH_GetITStatus(ETH_INT_TX_COMPLETE_FRAME))
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{
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rt_sem_release(&cme_eth_device.tx_buf_free);
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ETH_ClearITPendingBit(ETH_INT_TX_COMPLETE_FRAME);
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}
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if (ETH_GetITStatus(ETH_INT_RX_STOP))
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{
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CME_ETH_PRINTF("ETH_INT_RX_STOP\n");
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ETH_ClearITPendingBit(ETH_INT_RX_STOP);
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}
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if ((ETH_GetITStatus(ETH_INT_RX_BUF_UNAVAI)) ||
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(ETH_GetITStatus(ETH_INT_RX_COMPLETE_FRAME)))
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{
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/* a frame has been received */
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eth_device_ready(&(cme_eth_device.parent));
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ETH_ITConfig(ETH_INT_RX_COMPLETE_FRAME, FALSE);
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ETH_ITConfig(ETH_INT_RX_BUF_UNAVAI, FALSE);
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ETH_ClearITPendingBit(ETH_INT_RX_BUF_UNAVAI);
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ETH_ClearITPendingBit(ETH_INT_RX_COMPLETE_FRAME);
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}
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/* leave interrupt */
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rt_interrupt_leave();
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}
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