116 lines
4.1 KiB
C
116 lines
4.1 KiB
C
/*
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* @brief GPIO Pin Interrupt Registers and control functions
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __GPIOPININT_001_H_
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#define __GPIOPININT_001_H_
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#include "sys_config.h"
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#include "cmsis.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @defgroup IP_GPIOPININT_001 IP: GPIO Pin Interrupt register block and driver
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* @ingroup IP_Drivers
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* @{
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*/
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/**
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* @brief GPIO pin interrupt register block structure
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*/
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typedef struct { /*!< GPIO_PIN_INT Structure */
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__IO uint32_t ISEL; /*!< Pin Interrupt Mode register */
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__IO uint32_t IENR; /*!< Pin Interrupt Enable (Rising) register */
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__O uint32_t SIENR; /*!< Set Pin Interrupt Enable (Rising) register */
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__O uint32_t CIENR; /*!< Clear Pin Interrupt Enable (Rising) register */
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__IO uint32_t IENF; /*!< Pin Interrupt Enable Falling Edge / Active Level register */
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__O uint32_t SIENF; /*!< Set Pin Interrupt Enable Falling Edge / Active Level register */
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__O uint32_t CIENF; /*!< Clear Pin Interrupt Enable Falling Edge / Active Level address */
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__IO uint32_t RISE; /*!< Pin Interrupt Rising Edge register */
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__IO uint32_t FALL; /*!< Pin Interrupt Falling Edge register */
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__IO uint32_t IST; /*!< Pin Interrupt Status register */
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} IP_GPIOPININT_001_Type;
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typedef enum {
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IP_GPIOPININT_RISING_EDGE = 0x01,
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IP_GPIOPININT_FALLING_EDGE = 0x02,
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IP_GPIOPININT_ACTIVE_HIGH_LEVEL = 0x04,
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IP_GPIOPININT_ACTIVE_LOW_LEVEL = 0x08
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} Gpio_PinInt_Mode_Enum;
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/**
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* @brief Enable GPIO Interrupt
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* @param pGPIOPININT : Pointer to GPIO interrupt register block
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* @param PortNum : GPIO port number interrupt
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* @param IntMode : Interrupt mode, should be:
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* 0: Rising edge interrupt mode
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* 1: Falling edge interrupt mode
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* 2: Active-High interrupt mode
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* 3: Active-Low interrupt mode
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* @return None
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*/
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void IP_GPIOPININT_IntCmd(IP_GPIOPININT_001_Type *pGPIOPININT, uint8_t PortNum, Gpio_PinInt_Mode_Enum IntMode);
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/**
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* @brief Get GPIO Interrupt Status
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* @param pGPIOPININT : Pointer to GPIO interrupt register block
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* @param PortNum : GPIO port number interrupt
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* @return true if interrupt is pending, otherwise false
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*/
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STATIC INLINE bool IP_GPIOPININT_IntGetStatus(IP_GPIOPININT_001_Type *pGPIOPININT, uint8_t PortNum)
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{
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return (bool) (((pGPIOPININT->IST) >> PortNum) & 0x01);
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}
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/**
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* @brief Clear GPIO Interrupt (Edge interrupt cases only)
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* @param pGPIOPININT : Pointer to GPIO interrupt register block
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* @param PortNum : GPIO port number interrupt
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* @return None
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*/
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STATIC INLINE void IP_GPIOPININT_IntClear(IP_GPIOPININT_001_Type *pGPIOPININT, uint8_t PortNum)
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{
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if (!(pGPIOPININT->ISEL & (1 << PortNum))) {
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pGPIOPININT->IST |= (1 << PortNum);
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}
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}
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __GPIOPININT_001_H_ */
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