265 lines
9.1 KiB
C
265 lines
9.1 KiB
C
/** @file sys_core.h
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* @brief System Core Header File
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* @date 23.May.2013
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* @version 03.05.01
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*
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* This file contains:
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* - Core Interface Functions
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* .
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* which are relevant for the System driver.
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*/
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/* (c) Texas Instruments 2009-2013, All rights reserved. */
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#ifndef __SYS_CORE_H__
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#define __SYS_CORE_H__
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#include "sys_common.h"
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/* USER CODE BEGIN (0) */
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/* USER CODE END */
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/* System Core Interface Functions */
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/** @fn void _coreInitRegisters_(void)
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* @brief Initialize Core register
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*/
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void _coreInitRegisters_(void);
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/** @fn void _coreInitStackPointer_(void)
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* @brief Initialize Core stack pointer
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*/
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void _coreInitStackPointer_(void);
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/** @fn void _getCPSRValue_(void)
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* @brief Get CPSR Value
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*/
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uint32 _getCPSRValue_(void);
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/** @fn void _gotoCPUIdle_(void)
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* @brief Take CPU to Idle state
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*/
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void _gotoCPUIdle_(void);
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/** @fn void _coreEnableIrqVicOffset_(void)
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* @brief Enable Irq offset propagation via Vic controller
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*/
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void _coreEnableIrqVicOffset_(void);
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/** @fn void _coreEnableVfp_(void)
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* @brief Enable vector floating point unit
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*/
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void _coreEnableVfp_(void);
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/** @fn void _coreEnableEventBusExport_(void)
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* @brief Enable event bus export for external monitoring modules
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* @note It is required to enable event bus export to process ecc issues.
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*
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* This function enables event bus exports to external monitoring modules
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* like tightly coupled RAM wrapper, Flash wrapper and error signaling module.
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*/
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void _coreEnableEventBusExport_(void);
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/** @fn void _coreDisableEventBusExport_(void)
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* @brief Disable event bus export for external monitoring modules
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*
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* This function disables event bus exports to external monitoring modules
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* like tightly coupled RAM wrapper, Flash wrapper and error signaling module.
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*/
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void _coreDisableEventBusExport_(void);
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/** @fn void _coreEnableRamEcc_(void)
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* @brief Enable external ecc error for RAM odd and even bank
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* @note It is required to enable event bus export to process ecc issues.
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*/
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void _coreEnableRamEcc_(void);
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/** @fn void _coreDisableRamEcc_(void)
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* @brief Disable external ecc error for RAM odd and even bank
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*/
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void _coreDisableRamEcc_(void);
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/** @fn void _coreEnableFlashEcc_(void)
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* @brief Enable external ecc error for the Flash
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* @note It is required to enable event bus export to process ecc issues.
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*/
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void _coreEnableFlashEcc_(void);
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/** @fn void _coreDisableFlashEcc_(void)
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* @brief Disable external ecc error for the Flash
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*/
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void _coreDisableFlashEcc_(void);
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/** @fn uint32 _coreGetDataFault_(void)
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* @brief Get core data fault status register
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* @return The function will return the data fault status register value:
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* - bit [10,3..0]:
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* - 0b00001: Alignment -> address is valid
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* - 0b00000: Background -> address is valid
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* - 0b01101: Permission -> address is valid
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* - 0b01000: Precise External Abort -> address is valid
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* - 0b10110: Imprecise External Abort -> address is unpredictable
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* - 0b11001: Precise ECC Error -> address is valid
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* - 0b11000: Imprecise ECC Error -> address is unpredictable
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* - 0b00010: Debug -> address is unchanged
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* - bit [11]:
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* - 0: Read
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* - 1: Write
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* - bit [12]:
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* - 0: AXI Decode Error (DECERR)
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* - 1: AXI Slave Error (SLVERR)
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*/
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uint32 _coreGetDataFault_(void);
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/** @fn void _coreClearDataFault_(void)
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* @brief Clear core data fault status register
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*/
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void _coreClearDataFault_(void);
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/** @fn uint32 _coreGetInstructionFault_(void)
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* @brief Get core instruction fault status register
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* @return The function will return the instruction fault status register value:
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* - bit [10,3..0]:
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* - 0b00001: Alignment -> address is valid
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* - 0b00000: Background -> address is valid
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* - 0b01101: Permission -> address is valid
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* - 0b01000: Precise External Abort -> address is valid
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* - 0b10110: Imprecise External Abort -> address is unpredictable
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* - 0b11001: Precise ECC Error -> address is valid
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* - 0b11000: Imprecise ECC Error -> address is unpredictable
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* - 0b00010: Debug -> address is unchanged
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* - bit [12]:
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* - 0: AXI Decode Error (DECERR)
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* - 1: AXI Slave Error (SLVERR)
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*/
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uint32 _coreGetInstructionFault_(void);
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/** @fn void _coreClearInstructionFault_(void)
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* @brief Clear core instruction fault status register
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*/
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void _coreClearInstructionFault_(void);
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/** @fn uint32 _coreGetDataFaultAddress_(void)
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* @brief Get core data fault address register
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* @return The function will return the data fault address:
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*/
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uint32 _coreGetDataFaultAddress_(void);
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/** @fn void _coreClearDataFaultAddress_(void)
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* @brief Clear core data fault address register
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*/
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void _coreClearDataFaultAddress_(void);
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/** @fn uint32 _coreGetInstructionFaultAddress_(void)
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* @brief Get core instruction fault address register
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* @return The function will return the instruction fault address:
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*/
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uint32 _coreGetInstructionFaultAddress_(void);
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/** @fn void _coreClearInstructionFaultAddress_(void)
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* @brief Clear core instruction fault address register
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*/
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void _coreClearInstructionFaultAddress_(void);
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/** @fn uint32 _coreGetAuxiliaryDataFault_(void)
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* @brief Get core auxiliary data fault status register
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* @return The function will return the auxiliary data fault status register value:
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* - bit [13..5]:
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* - Index value for access giving error
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* - bit [21]:
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* - 0: Unrecoverable error
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* - 1: Recoverable error
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* - bit [23..22]:
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* - 0: Side cache
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* - 1: Side ATCM (Flash)
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* - 2: Side BTCM (RAM)
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* - 3: Reserved
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* - bit [27..24]:
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* - Cache way or way in which error occurred
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*/
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uint32 _coreGetAuxiliaryDataFault_(void);
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/** @fn void _coreClearAuxiliaryDataFault_(void)
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* @brief Clear core auxiliary data fault status register
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*/
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void _coreClearAuxiliaryDataFault_(void);
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/** @fn uint32 _coreGetAuxiliaryInstructionFault_(void)
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* @brief Get core auxiliary instruction fault status register
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* @return The function will return the auxiliary instruction fault status register value:
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* - bit [13..5]:
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* - Index value for access giving error
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* - bit [21]:
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* - 0: Unrecoverable error
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* - 1: Recoverable error
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* - bit [23..22]:
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* - 0: Side cache
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* - 1: Side ATCM (Flash)
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* - 2: Side BTCM (RAM)
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* - 3: Reserved
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* - bit [27..24]:
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* - Cache way or way in which error occurred
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*/
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uint32 _coreGetAuxiliaryInstructionFault_(void);
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/** @fn void _coreClearAuxiliaryInstructionFault_(void)
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* @brief Clear core auxiliary instruction fault status register
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*/
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void _coreClearAuxiliaryInstructionFault_(void);
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/** @fn void _disable_interrupt_(void)
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* @brief Disable IRQ and FIQ Interrupt mode in CPSR register
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*
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* This function disables IRQ and FIQ Interrupt mode in CPSR register.
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*/
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void _disable_interrupt_(void);
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/** @fn void _disable_IRQ_interrupt_(void)
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* @brief Disable IRQ Interrupt mode in CPSR register
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*
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* This function disables IRQ Interrupt mode in CPSR register.
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*/
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void _disable_IRQ_interrupt_(void);
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/** @fn void _disable_FIQ_interrupt_(void)
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* @brief Disable FIQ Interrupt mode in CPSR register
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*
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* This function disables IRQ Interrupt mode in CPSR register.
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*/
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void _disable_FIQ_interrupt_(void);
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/** @fn void _enable_interrupt_(void)
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* @brief Enable IRQ and FIQ Interrupt mode in CPSR register
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*
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* This function Enables IRQ and FIQ Interrupt mode in CPSR register.
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* User must call this function to enable Interrupts in non-OS environments.
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*/
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void _enable_interrupt_(void);
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/** @fn void _esmCcmErrorsClear_(void)
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* @brief Clears ESM Error caused due to CCM Errata in RevA Silicon
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*
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* This function Clears ESM Error caused due to CCM Errata
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* in RevA Silicon immediately after powerup.
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*/
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void _esmCcmErrorsClear_(void);
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/** @fn void _errata_CORTEXR4_66_(void)
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* @brief Work Around for Errata CORTEX-R4#66
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*
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* This function Disable out-of-order completion for divide
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* instructions in Auxiliary Control register.
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*/
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void _errata_CORTEXR4_66_(void);
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/** @fn void _errata_CORTEXR4_57_(void)
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* @brief Work Around for Errata CORTEX-R4#57
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*
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* Disable out-of-order single-precision floating point
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* multiply-accumulate instruction completion.
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*/
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void _errata_CORTEXR4_57_(void);
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#endif
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