413 lines
16 KiB
C
413 lines
16 KiB
C
/*!
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*******************************************************************************
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**
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** \file gh_gdma.h
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**
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** \brief The Graphics DMA unit.
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**
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** Copyright: 2012 - 2013 (C) GoKe Microelectronics ShangHai Branch
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**
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** \attention THIS SAMPLE CODE IS PROVIDED AS IS. GOKE MICROELECTRONICS
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** ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR
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** OMMISSIONS.
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**
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** \note Do not modify this file as it is generated automatically.
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**
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******************************************************************************/
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#ifndef _GH_GDMA_H
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#define _GH_GDMA_H
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#ifdef __LINUX__
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#include "reg4linux.h"
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#else
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#define FIO_ADDRESS(block,address) (address)
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#define FIO_MOFFSET(block,moffset) (moffset)
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#endif
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#ifndef __LINUX__
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#include "gtypes.h" /* global type definitions */
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#include "gh_lib_cfg.h" /* configuration */
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#endif
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#define GH_GDMA_ENABLE_DEBUG_PRINT 0
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#ifdef __LINUX__
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#define GH_GDMA_DEBUG_PRINT_FUNCTION printk
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#else
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#define GH_GDMA_DEBUG_PRINT_FUNCTION printf
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#endif
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#ifndef __LINUX__
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#if GH_GDMA_ENABLE_DEBUG_PRINT
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#include <stdio.h>
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#endif
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#endif
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/* check configuration */
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#ifndef GH_INLINE_LEVEL
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#error "GH_INLINE_LEVEL is not defined!"
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#endif
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#if GH_INLINE_LEVEL > 2
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#error "GH_INLINE_LEVEL must be set 0, 1 or 2!"
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#endif
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#ifndef GH_INLINE
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#error "GH_INLINE is not defined!"
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#endif
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/* disable inlining for debugging */
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#ifdef DEBUG
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#undef GH_INLINE_LEVEL
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#define GH_INLINE_LEVEL 0
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#endif
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/*----------------------------------------------------------------------------*/
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/* registers */
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/*----------------------------------------------------------------------------*/
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#define REG_GDMA_SOURCE1_BASE FIO_ADDRESS(GDMA,0x60015000) /* read/write */
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#define REG_GDMA_SOURCE1_PITCH FIO_ADDRESS(GDMA,0x60015004) /* read/write */
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#define REG_GDMA_SOURCE2_BASE FIO_ADDRESS(GDMA,0x60015008) /* read/write */
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#define REG_GDMA_SOURCE2_PITCH FIO_ADDRESS(GDMA,0x6001500C) /* read/write */
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#define REG_GDMA_DESTINATION_BASE FIO_ADDRESS(GDMA,0x60015010) /* read/write */
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#define REG_GDMA_DESTINATION_PITCH FIO_ADDRESS(GDMA,0x60015014) /* read/write */
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#define REG_GDMA_WIDTH FIO_ADDRESS(GDMA,0x60015018) /* read/write */
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#define REG_GDMA_HEIGHT FIO_ADDRESS(GDMA,0x6001501C) /* read/write */
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#define REG_GDMA_TRANSPARENT FIO_ADDRESS(GDMA,0x60015020) /* read/write */
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#define REG_GDMA_OPCODE FIO_ADDRESS(GDMA,0x60015024) /* read/write */
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#define REG_GDMA_NUM_PENDING_OPS FIO_ADDRESS(GDMA,0x60015028) /* read */
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/*----------------------------------------------------------------------------*/
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/* bit group structures */
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/*----------------------------------------------------------------------------*/
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/*----------------------------------------------------------------------------*/
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/* mirror variables */
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/*----------------------------------------------------------------------------*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*----------------------------------------------------------------------------*/
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/* register GDMA_SOURCE1_BASE (read/write) */
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/*----------------------------------------------------------------------------*/
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#if GH_INLINE_LEVEL == 0
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/*! \brief Writes the register 'GDMA_SOURCE1_BASE'. */
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void GH_GDMA_set_SOURCE1_BASE(U32 data);
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/*! \brief Reads the register 'GDMA_SOURCE1_BASE'. */
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U32 GH_GDMA_get_SOURCE1_BASE(void);
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#else /* GH_INLINE_LEVEL == 0 */
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GH_INLINE void GH_GDMA_set_SOURCE1_BASE(U32 data)
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{
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*(volatile U32 *)REG_GDMA_SOURCE1_BASE = data;
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#if GH_GDMA_ENABLE_DEBUG_PRINT
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GH_GDMA_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_GDMA_set_SOURCE1_BASE] <-- 0x%08x\n",
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REG_GDMA_SOURCE1_BASE,data,data);
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#endif
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}
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GH_INLINE U32 GH_GDMA_get_SOURCE1_BASE(void)
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{
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U32 value = (*(volatile U32 *)REG_GDMA_SOURCE1_BASE);
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#if GH_GDMA_ENABLE_DEBUG_PRINT
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GH_GDMA_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_GDMA_get_SOURCE1_BASE] --> 0x%08x\n",
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REG_GDMA_SOURCE1_BASE,value);
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#endif
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return value;
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}
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#endif /* GH_INLINE_LEVEL == 0 */
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/*----------------------------------------------------------------------------*/
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/* register GDMA_SOURCE1_PITCH (read/write) */
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/*----------------------------------------------------------------------------*/
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#if GH_INLINE_LEVEL == 0
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/*! \brief Writes the register 'GDMA_SOURCE1_PITCH'. */
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void GH_GDMA_set_SOURCE1_PITCH(U32 data);
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/*! \brief Reads the register 'GDMA_SOURCE1_PITCH'. */
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U32 GH_GDMA_get_SOURCE1_PITCH(void);
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#else /* GH_INLINE_LEVEL == 0 */
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GH_INLINE void GH_GDMA_set_SOURCE1_PITCH(U32 data)
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{
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*(volatile U32 *)REG_GDMA_SOURCE1_PITCH = data;
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#if GH_GDMA_ENABLE_DEBUG_PRINT
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GH_GDMA_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_GDMA_set_SOURCE1_PITCH] <-- 0x%08x\n",
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REG_GDMA_SOURCE1_PITCH,data,data);
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#endif
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}
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GH_INLINE U32 GH_GDMA_get_SOURCE1_PITCH(void)
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{
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U32 value = (*(volatile U32 *)REG_GDMA_SOURCE1_PITCH);
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#if GH_GDMA_ENABLE_DEBUG_PRINT
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GH_GDMA_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_GDMA_get_SOURCE1_PITCH] --> 0x%08x\n",
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REG_GDMA_SOURCE1_PITCH,value);
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#endif
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return value;
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}
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#endif /* GH_INLINE_LEVEL == 0 */
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/*----------------------------------------------------------------------------*/
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/* register GDMA_SOURCE2_BASE (read/write) */
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/*----------------------------------------------------------------------------*/
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#if GH_INLINE_LEVEL == 0
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/*! \brief Writes the register 'GDMA_SOURCE2_BASE'. */
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void GH_GDMA_set_SOURCE2_BASE(U32 data);
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/*! \brief Reads the register 'GDMA_SOURCE2_BASE'. */
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U32 GH_GDMA_get_SOURCE2_BASE(void);
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#else /* GH_INLINE_LEVEL == 0 */
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GH_INLINE void GH_GDMA_set_SOURCE2_BASE(U32 data)
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{
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*(volatile U32 *)REG_GDMA_SOURCE2_BASE = data;
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#if GH_GDMA_ENABLE_DEBUG_PRINT
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GH_GDMA_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_GDMA_set_SOURCE2_BASE] <-- 0x%08x\n",
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REG_GDMA_SOURCE2_BASE,data,data);
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#endif
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}
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GH_INLINE U32 GH_GDMA_get_SOURCE2_BASE(void)
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{
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U32 value = (*(volatile U32 *)REG_GDMA_SOURCE2_BASE);
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#if GH_GDMA_ENABLE_DEBUG_PRINT
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GH_GDMA_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_GDMA_get_SOURCE2_BASE] --> 0x%08x\n",
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REG_GDMA_SOURCE2_BASE,value);
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#endif
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return value;
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}
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#endif /* GH_INLINE_LEVEL == 0 */
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/*----------------------------------------------------------------------------*/
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/* register GDMA_SOURCE2_PITCH (read/write) */
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/*----------------------------------------------------------------------------*/
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#if GH_INLINE_LEVEL == 0
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/*! \brief Writes the register 'GDMA_SOURCE2_PITCH'. */
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void GH_GDMA_set_SOURCE2_PITCH(U32 data);
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/*! \brief Reads the register 'GDMA_SOURCE2_PITCH'. */
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U32 GH_GDMA_get_SOURCE2_PITCH(void);
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#else /* GH_INLINE_LEVEL == 0 */
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GH_INLINE void GH_GDMA_set_SOURCE2_PITCH(U32 data)
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{
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*(volatile U32 *)REG_GDMA_SOURCE2_PITCH = data;
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#if GH_GDMA_ENABLE_DEBUG_PRINT
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GH_GDMA_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_GDMA_set_SOURCE2_PITCH] <-- 0x%08x\n",
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REG_GDMA_SOURCE2_PITCH,data,data);
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#endif
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}
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GH_INLINE U32 GH_GDMA_get_SOURCE2_PITCH(void)
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{
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U32 value = (*(volatile U32 *)REG_GDMA_SOURCE2_PITCH);
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#if GH_GDMA_ENABLE_DEBUG_PRINT
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GH_GDMA_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_GDMA_get_SOURCE2_PITCH] --> 0x%08x\n",
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REG_GDMA_SOURCE2_PITCH,value);
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#endif
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return value;
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}
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#endif /* GH_INLINE_LEVEL == 0 */
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/*----------------------------------------------------------------------------*/
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/* register GDMA_DESTINATION_BASE (read/write) */
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/*----------------------------------------------------------------------------*/
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#if GH_INLINE_LEVEL == 0
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/*! \brief Writes the register 'GDMA_DESTINATION_BASE'. */
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void GH_GDMA_set_DESTINATION_BASE(U32 data);
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/*! \brief Reads the register 'GDMA_DESTINATION_BASE'. */
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U32 GH_GDMA_get_DESTINATION_BASE(void);
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#else /* GH_INLINE_LEVEL == 0 */
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GH_INLINE void GH_GDMA_set_DESTINATION_BASE(U32 data)
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{
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*(volatile U32 *)REG_GDMA_DESTINATION_BASE = data;
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#if GH_GDMA_ENABLE_DEBUG_PRINT
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GH_GDMA_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_GDMA_set_DESTINATION_BASE] <-- 0x%08x\n",
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REG_GDMA_DESTINATION_BASE,data,data);
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#endif
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}
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GH_INLINE U32 GH_GDMA_get_DESTINATION_BASE(void)
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{
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U32 value = (*(volatile U32 *)REG_GDMA_DESTINATION_BASE);
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#if GH_GDMA_ENABLE_DEBUG_PRINT
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GH_GDMA_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_GDMA_get_DESTINATION_BASE] --> 0x%08x\n",
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REG_GDMA_DESTINATION_BASE,value);
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#endif
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return value;
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}
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#endif /* GH_INLINE_LEVEL == 0 */
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/*----------------------------------------------------------------------------*/
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/* register GDMA_DESTINATION_PITCH (read/write) */
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/*----------------------------------------------------------------------------*/
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#if GH_INLINE_LEVEL == 0
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/*! \brief Writes the register 'GDMA_DESTINATION_PITCH'. */
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void GH_GDMA_set_DESTINATION_PITCH(U32 data);
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/*! \brief Reads the register 'GDMA_DESTINATION_PITCH'. */
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U32 GH_GDMA_get_DESTINATION_PITCH(void);
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#else /* GH_INLINE_LEVEL == 0 */
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GH_INLINE void GH_GDMA_set_DESTINATION_PITCH(U32 data)
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{
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*(volatile U32 *)REG_GDMA_DESTINATION_PITCH = data;
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#if GH_GDMA_ENABLE_DEBUG_PRINT
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GH_GDMA_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_GDMA_set_DESTINATION_PITCH] <-- 0x%08x\n",
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REG_GDMA_DESTINATION_PITCH,data,data);
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#endif
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}
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GH_INLINE U32 GH_GDMA_get_DESTINATION_PITCH(void)
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{
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U32 value = (*(volatile U32 *)REG_GDMA_DESTINATION_PITCH);
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#if GH_GDMA_ENABLE_DEBUG_PRINT
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GH_GDMA_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_GDMA_get_DESTINATION_PITCH] --> 0x%08x\n",
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REG_GDMA_DESTINATION_PITCH,value);
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#endif
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return value;
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}
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#endif /* GH_INLINE_LEVEL == 0 */
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/*----------------------------------------------------------------------------*/
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/* register GDMA_WIDTH (read/write) */
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/*----------------------------------------------------------------------------*/
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#if GH_INLINE_LEVEL == 0
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/*! \brief Writes the register 'GDMA_WIDTH'. */
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void GH_GDMA_set_WIDTH(U32 data);
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/*! \brief Reads the register 'GDMA_WIDTH'. */
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U32 GH_GDMA_get_WIDTH(void);
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#else /* GH_INLINE_LEVEL == 0 */
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GH_INLINE void GH_GDMA_set_WIDTH(U32 data)
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{
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*(volatile U32 *)REG_GDMA_WIDTH = data;
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#if GH_GDMA_ENABLE_DEBUG_PRINT
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GH_GDMA_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_GDMA_set_WIDTH] <-- 0x%08x\n",
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REG_GDMA_WIDTH,data,data);
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#endif
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}
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GH_INLINE U32 GH_GDMA_get_WIDTH(void)
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{
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U32 value = (*(volatile U32 *)REG_GDMA_WIDTH);
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#if GH_GDMA_ENABLE_DEBUG_PRINT
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GH_GDMA_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_GDMA_get_WIDTH] --> 0x%08x\n",
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REG_GDMA_WIDTH,value);
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#endif
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return value;
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}
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#endif /* GH_INLINE_LEVEL == 0 */
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/*----------------------------------------------------------------------------*/
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/* register GDMA_HEIGHT (read/write) */
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/*----------------------------------------------------------------------------*/
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#if GH_INLINE_LEVEL == 0
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/*! \brief Writes the register 'GDMA_HEIGHT'. */
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void GH_GDMA_set_HEIGHT(U32 data);
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/*! \brief Reads the register 'GDMA_HEIGHT'. */
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U32 GH_GDMA_get_HEIGHT(void);
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#else /* GH_INLINE_LEVEL == 0 */
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GH_INLINE void GH_GDMA_set_HEIGHT(U32 data)
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{
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*(volatile U32 *)REG_GDMA_HEIGHT = data;
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#if GH_GDMA_ENABLE_DEBUG_PRINT
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GH_GDMA_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_GDMA_set_HEIGHT] <-- 0x%08x\n",
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REG_GDMA_HEIGHT,data,data);
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#endif
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}
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GH_INLINE U32 GH_GDMA_get_HEIGHT(void)
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{
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U32 value = (*(volatile U32 *)REG_GDMA_HEIGHT);
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#if GH_GDMA_ENABLE_DEBUG_PRINT
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GH_GDMA_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_GDMA_get_HEIGHT] --> 0x%08x\n",
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REG_GDMA_HEIGHT,value);
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#endif
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return value;
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}
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#endif /* GH_INLINE_LEVEL == 0 */
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/*----------------------------------------------------------------------------*/
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/* register GDMA_TRANSPARENT (read/write) */
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/*----------------------------------------------------------------------------*/
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#if GH_INLINE_LEVEL == 0
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/*! \brief Writes the register 'GDMA_TRANSPARENT'. */
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void GH_GDMA_set_TRANSPARENT(U32 data);
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/*! \brief Reads the register 'GDMA_TRANSPARENT'. */
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U32 GH_GDMA_get_TRANSPARENT(void);
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#else /* GH_INLINE_LEVEL == 0 */
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GH_INLINE void GH_GDMA_set_TRANSPARENT(U32 data)
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{
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*(volatile U32 *)REG_GDMA_TRANSPARENT = data;
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#if GH_GDMA_ENABLE_DEBUG_PRINT
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GH_GDMA_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_GDMA_set_TRANSPARENT] <-- 0x%08x\n",
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REG_GDMA_TRANSPARENT,data,data);
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#endif
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}
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GH_INLINE U32 GH_GDMA_get_TRANSPARENT(void)
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{
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U32 value = (*(volatile U32 *)REG_GDMA_TRANSPARENT);
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#if GH_GDMA_ENABLE_DEBUG_PRINT
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GH_GDMA_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_GDMA_get_TRANSPARENT] --> 0x%08x\n",
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REG_GDMA_TRANSPARENT,value);
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#endif
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return value;
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}
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#endif /* GH_INLINE_LEVEL == 0 */
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/*----------------------------------------------------------------------------*/
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/* register GDMA_OPCODE (read/write) */
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/*----------------------------------------------------------------------------*/
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#if GH_INLINE_LEVEL == 0
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/*! \brief Writes the register 'GDMA_OPCODE'. */
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void GH_GDMA_set_OPCODE(U32 data);
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/*! \brief Reads the register 'GDMA_OPCODE'. */
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U32 GH_GDMA_get_OPCODE(void);
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#else /* GH_INLINE_LEVEL == 0 */
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GH_INLINE void GH_GDMA_set_OPCODE(U32 data)
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{
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*(volatile U32 *)REG_GDMA_OPCODE = data;
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#if GH_GDMA_ENABLE_DEBUG_PRINT
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GH_GDMA_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_GDMA_set_OPCODE] <-- 0x%08x\n",
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REG_GDMA_OPCODE,data,data);
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#endif
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}
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GH_INLINE U32 GH_GDMA_get_OPCODE(void)
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{
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U32 value = (*(volatile U32 *)REG_GDMA_OPCODE);
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#if GH_GDMA_ENABLE_DEBUG_PRINT
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GH_GDMA_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_GDMA_get_OPCODE] --> 0x%08x\n",
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REG_GDMA_OPCODE,value);
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#endif
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return value;
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}
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#endif /* GH_INLINE_LEVEL == 0 */
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/*----------------------------------------------------------------------------*/
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/* register GDMA_NUM_PENDING_OPS (read) */
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/*----------------------------------------------------------------------------*/
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#if GH_INLINE_LEVEL == 0
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/*! \brief Reads the register 'GDMA_NUM_PENDING_OPS'. */
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U32 GH_GDMA_get_NUM_PENDING_OPS(void);
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#else /* GH_INLINE_LEVEL == 0 */
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GH_INLINE U32 GH_GDMA_get_NUM_PENDING_OPS(void)
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{
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U32 value = (*(volatile U32 *)REG_GDMA_NUM_PENDING_OPS);
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#if GH_GDMA_ENABLE_DEBUG_PRINT
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GH_GDMA_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_GDMA_get_NUM_PENDING_OPS] --> 0x%08x\n",
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REG_GDMA_NUM_PENDING_OPS,value);
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#endif
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return value;
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}
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#endif /* GH_INLINE_LEVEL == 0 */
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/*----------------------------------------------------------------------------*/
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/* init function */
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/*----------------------------------------------------------------------------*/
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/*! \brief Initialises the registers and mirror variables. */
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void GH_GDMA_init(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _GH_GDMA_H */
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/*----------------------------------------------------------------------------*/
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/* end of file */
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/*----------------------------------------------------------------------------*/
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