371 lines
12 KiB
C
371 lines
12 KiB
C
/*
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* File : drv_sdram.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2015, RT-Thread Development Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Change Logs:
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* Date Author Notes
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* 2015-08-03 xiaonong The first version for STM32F7
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*/
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#include "drv_sdram.h"
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static SDRAM_HandleTypeDef sdramHandle;
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static FMC_SDRAM_TimingTypeDef Timing;
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static FMC_SDRAM_CommandTypeDef Command;
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/**
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* @brief Initializes SDRAM MSP.
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* @param hsdram: SDRAM handle
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* @param Params
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* @retval None
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*/
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static void SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram, void *Params)
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{
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static DMA_HandleTypeDef dma_handle;
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GPIO_InitTypeDef gpio_init_structure;
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/* Enable FMC clock */
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__HAL_RCC_FMC_CLK_ENABLE();
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/* Enable chosen DMAx clock */
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SDRAM_DMA_CLK_ENABLE();
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/* Enable GPIOs clock */
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__HAL_RCC_GPIOC_CLK_ENABLE();
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__HAL_RCC_GPIOD_CLK_ENABLE();
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__HAL_RCC_GPIOE_CLK_ENABLE();
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__HAL_RCC_GPIOF_CLK_ENABLE();
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__HAL_RCC_GPIOG_CLK_ENABLE();
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__HAL_RCC_GPIOH_CLK_ENABLE();
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/* Common GPIO configuration */
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gpio_init_structure.Mode = GPIO_MODE_AF_PP;
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gpio_init_structure.Pull = GPIO_PULLUP;
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gpio_init_structure.Speed = GPIO_SPEED_FAST;
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gpio_init_structure.Alternate = GPIO_AF12_FMC;
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/* GPIOC configuration */
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gpio_init_structure.Pin = GPIO_PIN_3;
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HAL_GPIO_Init(GPIOC, &gpio_init_structure);
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/* GPIOD configuration */
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gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_3 | GPIO_PIN_8 | GPIO_PIN_9 |
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GPIO_PIN_10 | GPIO_PIN_14 | GPIO_PIN_15;
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HAL_GPIO_Init(GPIOD, &gpio_init_structure);
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/* GPIOE configuration */
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gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_7| GPIO_PIN_8 | GPIO_PIN_9 |\
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GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |\
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GPIO_PIN_15;
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HAL_GPIO_Init(GPIOE, &gpio_init_structure);
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/* GPIOF configuration */
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gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2| GPIO_PIN_3 | GPIO_PIN_4 |\
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GPIO_PIN_5 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |\
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GPIO_PIN_15;
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HAL_GPIO_Init(GPIOF, &gpio_init_structure);
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/* GPIOG configuration */
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gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_4| GPIO_PIN_5 | GPIO_PIN_8 |\
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GPIO_PIN_15;
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HAL_GPIO_Init(GPIOG, &gpio_init_structure);
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/* GPIOH configuration */
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gpio_init_structure.Pin = GPIO_PIN_3 | GPIO_PIN_5;
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HAL_GPIO_Init(GPIOH, &gpio_init_structure);
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/* Configure common DMA parameters */
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dma_handle.Init.Channel = SDRAM_DMA_CHANNEL;
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dma_handle.Init.Direction = DMA_MEMORY_TO_MEMORY;
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dma_handle.Init.PeriphInc = DMA_PINC_ENABLE;
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dma_handle.Init.MemInc = DMA_MINC_ENABLE;
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dma_handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
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dma_handle.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
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dma_handle.Init.Mode = DMA_NORMAL;
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dma_handle.Init.Priority = DMA_PRIORITY_HIGH;
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dma_handle.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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dma_handle.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
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dma_handle.Init.MemBurst = DMA_MBURST_SINGLE;
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dma_handle.Init.PeriphBurst = DMA_PBURST_SINGLE;
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dma_handle.Instance = SDRAM_DMA_STREAM;
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/* Associate the DMA handle */
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__HAL_LINKDMA(hsdram, hdma, dma_handle);
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/* Deinitialize the stream for new transfer */
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HAL_DMA_DeInit(&dma_handle);
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/* Configure the DMA stream */
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HAL_DMA_Init(&dma_handle);
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/* NVIC configuration for DMA transfer complete interrupt */
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HAL_NVIC_SetPriority(SDRAM_DMA_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(SDRAM_DMA_IRQn);
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}
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/**
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* @brief DeInitializes SDRAM MSP.
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* @param hsdram: SDRAM handle
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* @param Params
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* @retval None
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*/
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static void SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram, void *Params)
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{
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static DMA_HandleTypeDef dma_handle;
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/* Disable NVIC configuration for DMA interrupt */
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HAL_NVIC_DisableIRQ(SDRAM_DMA_IRQn);
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/* Deinitialize the stream for new transfer */
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dma_handle.Instance = SDRAM_DMA_STREAM;
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HAL_DMA_DeInit(&dma_handle);
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/* GPIO pins clock, FMC clock and DMA clock can be shut down in the applications
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by surcharging this __weak function */
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}
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/**
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* @brief Programs the SDRAM device.
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* @param RefreshCount: SDRAM refresh counter value
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* @retval None
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*/
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static void SDRAM_InitializationSequence(uint32_t RefreshCount)
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{
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__IO uint32_t tmpmrd = 0;
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/* Step 1: Configure a clock configuration enable command */
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Command.CommandMode = FMC_SDRAM_CMD_CLK_ENABLE;
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Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
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Command.AutoRefreshNumber = 1;
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Command.ModeRegisterDefinition = 0;
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/* Send the command */
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HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
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/* Step 2: Insert 100 us minimum delay */
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/* Inserted delay is equal to 1 ms due to systick time base unit (ms) */
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// HAL_Delay(1);
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/* interrupt is not enable, just to delay some time. */
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for (tmpmrd = 0; tmpmrd < 0xfffff; tmpmrd ++)
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;
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/* Step 3: Configure a PALL (precharge all) command */
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Command.CommandMode = FMC_SDRAM_CMD_PALL;
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Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
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Command.AutoRefreshNumber = 1;
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Command.ModeRegisterDefinition = 0;
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/* Send the command */
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HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
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/* Step 4: Configure an Auto Refresh command */
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Command.CommandMode = FMC_SDRAM_CMD_AUTOREFRESH_MODE;
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Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
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Command.AutoRefreshNumber = 8;
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Command.ModeRegisterDefinition = 0;
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/* Send the command */
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HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
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/* Step 5: Program the external memory mode register */
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tmpmrd = (uint32_t)SDRAM_MODEREG_BURST_LENGTH_1 |\
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SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL |\
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SDRAM_MODEREG_CAS_LATENCY_2 |\
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SDRAM_MODEREG_OPERATING_MODE_STANDARD |\
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SDRAM_MODEREG_WRITEBURST_MODE_SINGLE;
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Command.CommandMode = FMC_SDRAM_CMD_LOAD_MODE;
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Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
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Command.AutoRefreshNumber = 1;
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Command.ModeRegisterDefinition = tmpmrd;
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/* Send the command */
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HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
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/* Step 6: Set the refresh rate counter */
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/* Set the device refresh rate */
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HAL_SDRAM_ProgramRefreshRate(&sdramHandle, RefreshCount);
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}
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/**
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* @brief Reads an amount of data from the SDRAM memory in polling mode.
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* @param uwStartAddress: Read start address
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* @param pData: Pointer to data to be read
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* @param uwDataSize: Size of read data from the memory
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* @retval SDRAM status
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*/
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rt_err_t SDRAM_ReadData(uint32_t Address, uint32_t *Data, uint32_t DataSize)
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{
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if(HAL_SDRAM_Read_32b(&sdramHandle, (uint32_t *)Address, Data, DataSize) != HAL_OK)
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{
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return RT_ERROR;
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}
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else
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{
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return RT_EOK;
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}
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}
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/**
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* @brief Reads an amount of data from the SDRAM memory in DMA mode.
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* @param uwStartAddress: Read start address
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* @param pData: Pointer to data to be read
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* @param uwDataSize: Size of read data from the memory
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* @retval SDRAM status
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*/
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rt_err_t SDRAM_ReadDataDMA(uint32_t Address, uint32_t *Data, uint32_t DataSize)
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{
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if(HAL_SDRAM_Read_DMA(&sdramHandle, (uint32_t *)Address, Data, DataSize) != HAL_OK)
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{
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return RT_ERROR;
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}
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else
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{
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return RT_EOK;
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}
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}
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/**
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* @brief Writes an amount of data to the SDRAM memory in polling mode.
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* @param uwStartAddress: Write start address
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* @param pData: Pointer to data to be written
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* @param uwDataSize: Size of written data from the memory
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* @retval SDRAM status
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*/
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rt_err_t SDRAM_WriteData(uint32_t Address, uint32_t *Data, uint32_t DataSize)
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{
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if(HAL_SDRAM_Write_32b(&sdramHandle, (uint32_t *)Address, Data, DataSize) != HAL_OK)
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{
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return RT_ERROR;
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}
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else
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{
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return RT_EOK;
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}
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}
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/**
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* @brief Writes an amount of data to the SDRAM memory in DMA mode.
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* @param Address: Write start address
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* @param Data: Pointer to data to be written
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* @param DataSize: Size of written data from the memory
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* @retval SDRAM status
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*/
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rt_err_t SDRAM_WriteDataDMA(uint32_t Address, uint32_t *Data, uint32_t DataSize)
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{
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if(HAL_SDRAM_Write_DMA(&sdramHandle, (uint32_t *)Address, Data, DataSize) != HAL_OK)
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{
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return RT_ERROR;
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}
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else
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{
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return RT_EOK;
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}
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}
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/**
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* @brief Initializes the SDRAM device.
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* @retval SDRAM status
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*/
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rt_err_t sdram_hw_init(void)
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{
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static uint8_t sdramstatus = RT_ERROR;
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/* SDRAM device configuration */
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sdramHandle.Instance = FMC_SDRAM_DEVICE;
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/* Timing configuration for 100Mhz as SD clock frequency (System clock is up to 200Mhz) */
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Timing.LoadToActiveDelay = 2;
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Timing.ExitSelfRefreshDelay = 7;
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Timing.SelfRefreshTime = 4;
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Timing.RowCycleDelay = 7;
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Timing.WriteRecoveryTime = 2;
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Timing.RPDelay = 2;
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Timing.RCDDelay = 2;
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sdramHandle.Init.SDBank = FMC_SDRAM_BANK1;
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sdramHandle.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_8;
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sdramHandle.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_12;
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sdramHandle.Init.MemoryDataWidth = SDRAM_MEMORY_WIDTH;
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sdramHandle.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
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sdramHandle.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_2;
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sdramHandle.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
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sdramHandle.Init.SDClockPeriod = SDCLOCK_PERIOD;
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sdramHandle.Init.ReadBurst = FMC_SDRAM_RBURST_ENABLE;
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sdramHandle.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_0;
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/* SDRAM controller initialization */
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SDRAM_MspInit(&sdramHandle, NULL); /* __weak function can be rewritten by the application */
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if(HAL_SDRAM_Init(&sdramHandle, &Timing) != HAL_OK)
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{
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sdramstatus = RT_ERROR;
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}
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else
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{
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sdramstatus = RT_EOK;
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}
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/* SDRAM initialization sequence */
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SDRAM_InitializationSequence(REFRESH_COUNT);
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return sdramstatus;
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}
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/**
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* @brief DeInitializes the SDRAM device.
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* @retval SDRAM status
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*/
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rt_err_t sdram_hw_deinit(void)
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{
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static uint8_t sdramstatus = RT_ERROR;
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/* SDRAM device de-initialization */
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sdramHandle.Instance = FMC_SDRAM_DEVICE;
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if(HAL_SDRAM_DeInit(&sdramHandle) != HAL_OK)
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{
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sdramstatus = RT_ERROR;
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}
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else
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{
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sdramstatus = RT_EOK;
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}
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/* SDRAM controller de-initialization */
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SDRAM_MspDeInit(&sdramHandle, NULL);
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return sdramstatus;
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}
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/**
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* @brief Handles SDRAM DMA transfer interrupt request.
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* @retval None
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*/
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void SDRAM_DMA_IRQHandler(void)
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{
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HAL_DMA_IRQHandler(sdramHandle.hdma);
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}
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static int rt_sdram_hw_init(void)
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{
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return (int)sdram_hw_init();
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}
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INIT_BOARD_EXPORT(rt_sdram_hw_init);
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