835 lines
20 KiB
C
835 lines
20 KiB
C
/***************************************************************************//**
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* @file drv_adc.c
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* @brief ADC driver of RT-Thread RTOS for EFM32
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* COPYRIGHT (C) 2012, RT-Thread Development Team
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* @author onelife
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* @version 1.0
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*******************************************************************************
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* @section License
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* The license and distribution terms for this file may be found in the file
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* LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
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*******************************************************************************
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* @section Change Logs
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* Date Author Notes
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* 2011-02-21 onelife Initial creation for EFM32
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* 2011-07-14 onelife Add multiple channels support for scan mode
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******************************************************************************/
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/***************************************************************************//**
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* @addtogroup efm32
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* @{
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******************************************************************************/
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/* Includes ------------------------------------------------------------------*/
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#include "board.h"
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#include "drv_adc.h"
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#if defined(RT_USING_ADC0)
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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#ifdef RT_ADC_DEBUG
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#define adc_debug(format,args...) rt_kprintf(format, ##args)
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#else
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#define adc_debug(format,args...)
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#endif
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/* Private variables ---------------------------------------------------------*/
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#ifdef RT_USING_ADC0
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static struct rt_device adc0_device;
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#endif
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static rt_uint32_t adcErrataShift = 0;
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/* Private function prototypes -----------------------------------------------*/
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/* Private functions ---------------------------------------------------------*/
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/***************************************************************************//**
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* @brief
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* Calibrate offset and gain for the specified reference.
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* Supports currently only single ended gain calibration.
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* Could easily be expanded to support differential gain calibration.
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*
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* @details
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* The offset calibration routine measures 0 V with the ADC, and adjust
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* the calibration register until the converted value equals 0.
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* The gain calibration routine needs an external reference voltage equal
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* to the top value for the selected reference. For example if the 2.5 V
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* reference is to be calibrated, the external supply must also equal 2.5V.
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*
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* @param[in] adc
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* Pointer to ADC peripheral register block.
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*
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* @param[in] ref
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* Reference used during calibration. Can be both external and internal
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* references.
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*
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* @param[in] input
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* Input channel used during calibration.
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*
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* @return
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* The final value of the calibration register, note that the calibration
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* register gets updated with this value during the calibration.
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* No need to load the calibration values after the function returns.
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******************************************************************************/
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rt_uint32_t efm32_adc_calibration(
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ADC_TypeDef *adc,
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ADC_Ref_TypeDef ref,
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ADC_SingleInput_TypeDef input)
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{
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rt_uint32_t cal;
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rt_int32_t sample;
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rt_int8_t high, mid, low, tmp;
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ADC_InitSingle_TypeDef singleInit = ADC_INITSINGLE_DEFAULT;
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/* Init for single conversion use, measure diff 0 with selected reference. */
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singleInit.reference = ref;
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singleInit.input = adcSingleInpDiff0;
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singleInit.acqTime = adcAcqTime32;
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singleInit.diff = true;
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/* Enable oversampling rate */
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singleInit.resolution = adcResOVS;
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ADC_InitSingle(adc, &singleInit);
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/* ADC is now set up for offset calibration */
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/* Offset calibration register is a 7 bit signed 2's complement value. */
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/* Use unsigned indexes for binary search, and convert when calibration */
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/* register is written to. */
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high = 63;
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low = -64;
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/* Do binary search for offset calibration*/
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while (low < high)
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{
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/* Calculate midpoint */
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mid = low + (high - low) / 2;
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/* Midpoint is converted to 2's complement and written to both scan and */
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/* single calibration registers */
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cal = adc->CAL & ~(_ADC_CAL_SINGLEOFFSET_MASK | _ADC_CAL_SCANOFFSET_MASK);
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tmp = mid < 0 ? (((mid & 0x3F) ^ 0x3F) | 0x40) + 1 : mid;
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cal |= tmp << _ADC_CAL_SINGLEOFFSET_SHIFT;
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cal |= tmp << _ADC_CAL_SCANOFFSET_SHIFT;
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adc_debug("adc->CAL = %x, cal = %x, tmp = %x\n", adc->CAL, cal, tmp);
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adc->CAL = cal;
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/* Do a conversion */
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ADC_Start(adc, adcStartSingle);
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/* Wait while conversion is active */
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while (adc->STATUS & ADC_STATUS_SINGLEACT) ;
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/* Get ADC result */
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sample = ADC_DataSingleGet(adc);
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/* Check result and decide in which part of to repeat search */
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/* Calibration register has negative effect on result */
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if (sample < 0)
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{
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/* Repeat search in bottom half. */
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high = mid;
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}
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else if (sample > 0)
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{
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/* Repeat search in top half. */
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low = mid + 1;
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}
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else
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{
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/* Found it, exit while loop */
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break;
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}
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}
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adc_debug("adc->CAL = %x\n", adc->CAL);
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/* Now do gain calibration, only input and diff settings needs to be changed */
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adc->SINGLECTRL &= ~(_ADC_SINGLECTRL_INPUTSEL_MASK | _ADC_SINGLECTRL_DIFF_MASK);
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adc->SINGLECTRL |= (input << _ADC_SINGLECTRL_INPUTSEL_SHIFT);
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adc->SINGLECTRL |= (false << _ADC_SINGLECTRL_DIFF_SHIFT);
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/* ADC is now set up for gain calibration */
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/* Gain calibration register is a 7 bit unsigned value. */
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high = 127;
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low = 0;
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/* Do binary search for gain calibration */
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while (low < high)
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{
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/* Calculate midpoint and write to calibration register */
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mid = low + (high - low) / 2;
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/* Midpoint is converted to 2's complement */
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cal = adc->CAL & ~(_ADC_CAL_SINGLEGAIN_MASK | _ADC_CAL_SCANGAIN_MASK);
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cal |= mid << _ADC_CAL_SINGLEGAIN_SHIFT;
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cal |= mid << _ADC_CAL_SCANGAIN_SHIFT;
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adc_debug("adc->CAL = %x, cal = %x, mid = %x\n", adc->CAL, cal, mid);
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adc->CAL = cal;
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/* Do a conversion */
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ADC_Start(adc, adcStartSingle);
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/* Wait while conversion is active */
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while (adc->STATUS & ADC_STATUS_SINGLEACT) ;
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/* Get ADC result */
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sample = ADC_DataSingleGet(adc);
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/* Check result and decide in which part to repeat search */
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/* Compare with a value atleast one LSB's less than top to avoid overshooting */
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/* Since oversampling is used, the result is 16 bits, but a couple of lsb's */
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/* applies to the 12 bit result value, if 0xffe is the top value in 12 bit, this */
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/* is in turn 0xffe0 in the 16 bit result. */
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/* Calibration register has positive effect on result */
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if (sample > 0xffd0)
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{
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/* Repeat search in bottom half. */
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high = mid;
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}
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else if (sample < 0xffd0)
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{
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/* Repeat search in top half. */
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low = mid + 1;
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}
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else
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{
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/* Found it, exit while loop */
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break;
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}
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}
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adc_debug("adc->CAL = %x\n", adc->CAL);
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return adc->CAL;
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}
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/***************************************************************************//**
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* @brief
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* Configure DMA for ADC
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*
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* @details
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*
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* @note
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*
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* @param[in] adc_device
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* Pointer to ADC registers base address
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*
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* @param[in] mode
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* ADC mode
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*
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* @param[in] channel
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* DMA channel
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******************************************************************************/
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void efm32_adc_cfg_dma(
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ADC_TypeDef *adc_device,
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rt_uint8_t mode,
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rt_uint8_t channel)
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{
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DMA_CfgChannel_TypeDef chnlCfg;
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DMA_CfgDescr_TypeDef descrCfg;
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if (channel == (rt_uint8_t)EFM32_NO_DMA)
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{
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return;
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}
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/* Set up DMA channel */
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chnlCfg.highPri = false;
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chnlCfg.enableInt = false;
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if (adc_device == ADC0)
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{
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switch (mode & ADC_MASK_MODE)
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{
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case ADC_MODE_SINGLE:
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chnlCfg.select = DMAREQ_ADC0_SINGLE;
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break;
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case ADC_MODE_SCAN:
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chnlCfg.select = DMAREQ_ADC0_SCAN;
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break;
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default:
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return;
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}
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}
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else
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{
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// TODO: Any other channel?
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return;
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}
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chnlCfg.cb = RT_NULL;
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DMA_CfgChannel((rt_uint32_t)channel, &chnlCfg);
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/* Setting up DMA channel descriptor */
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descrCfg.dstInc = dmaDataInc4;
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descrCfg.srcInc = dmaDataIncNone;
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descrCfg.size = dmaDataSize4;
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descrCfg.arbRate = dmaArbitrate1;
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descrCfg.hprot = 0;
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DMA_CfgDescr((rt_uint32_t)channel, true, &descrCfg);
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}
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/***************************************************************************//**
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* @brief
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* Activate DMA for ADC
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*
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* @details
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*
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* @note
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*
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* @param[in] adc_device
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* Pointer to ADC registers base address
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*
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* @param[in] mode
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* ADC mode
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*
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* @param[in] count
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* ADC channel count
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*
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* @param[in] channel
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* DMA channel
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*
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* @param[out] buffer
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* Pointer to ADC results buffer
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******************************************************************************/
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void efm32_adc_on_dma(
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ADC_TypeDef *adc_device,
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rt_uint8_t mode,
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rt_uint8_t count,
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rt_uint8_t channel,
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void *buffer)
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{
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switch (mode & ADC_MASK_MODE)
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{
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case ADC_MODE_SINGLE:
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/* Activate DMA */
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DMA_ActivateBasic(
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(rt_uint32_t)channel,
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true,
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false,
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buffer,
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(void *)&(adc_device->SINGLEDATA),
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count - 1);
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break;
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case ADC_MODE_SCAN:
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DMA_ActivateBasic(
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(rt_uint32_t)channel,
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true,
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false,
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buffer,
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(void *)&(adc_device->SCANDATA),
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count - 1);
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break;
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default:
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return;
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}
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}
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/***************************************************************************//**
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* @brief
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* Initialize ADC device
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*
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* @details
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*
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* @note
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*
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* @param[in] dev
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* Pointer to device descriptor
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*
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* @return
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* Error code
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******************************************************************************/
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static rt_err_t rt_adc_init(rt_device_t dev)
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{
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RT_ASSERT(dev != RT_NULL);
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rt_uint32_t temp;
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struct efm32_adc_device_t *adc;
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adc = (struct efm32_adc_device_t *)(dev->user_data);
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temp = efm32_adc_calibration(adc->adc_device, ADC_CALI_REF, ADC_CALI_CH);
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adc_debug("adc->CAL = %x\n", temp);
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return RT_EOK;
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}
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/***************************************************************************//**
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* @brief
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* Configure ADC device
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*
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* @details
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*
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* @note
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*
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* @param[in] dev
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* Pointer to device descriptor
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*
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* @param[in] cmd
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* ADC control command
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*
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* @param[in] args
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* Arguments
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*
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* @return
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* Error code
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******************************************************************************/
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static rt_err_t rt_adc_control(
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rt_device_t dev,
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rt_uint8_t cmd,
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void *args)
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{
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RT_ASSERT(dev != RT_NULL);
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struct efm32_adc_device_t *adc;
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adc = (struct efm32_adc_device_t *)(dev->user_data);
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switch (cmd)
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{
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case RT_DEVICE_CTRL_SUSPEND:
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/* Suspend device */
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dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
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adc->adc_device->CMD = ADC_CMD_SINGLESTOP | ADC_CMD_SCANSTOP;
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break;
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case RT_DEVICE_CTRL_RESUME:
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{
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/* Resume device */
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struct efm32_adc_result_t *control = \
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(struct efm32_adc_result_t *)args;
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dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
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switch (control->mode)
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{
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case ADC_MODE_SINGLE:
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if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
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{
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efm32_adc_on_dma(
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adc->adc_device,
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control->mode,
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adc->singleCount,
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adc->singleDmaChannel,
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control->buffer);
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}
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ADC_Start(adc->adc_device, adcStartSingle);
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break;
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case ADC_MODE_SCAN:
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if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
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{
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efm32_adc_on_dma(
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adc->adc_device,
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control->mode,
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adc->scanCount,
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adc->scanDmaChannel,
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control->buffer);
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}
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ADC_Start(adc->adc_device, adcStartScan);
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break;
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case ADC_MODE_TAILGATE:
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{
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void *index = control->buffer;
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if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
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{
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efm32_adc_on_dma(
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adc->adc_device,
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control->mode,
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adc->scanCount,
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adc->scanDmaChannel,
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index);
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index += adc->scanCount;
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}
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if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
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{
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efm32_adc_on_dma(
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adc->adc_device,
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control->mode,
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adc->singleCount,
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adc->singleDmaChannel,
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index);
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index += adc->singleCount;
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}
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ADC_Start(adc->adc_device, adcStartScanAndSingle);
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}
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break;
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default:
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return -RT_ERROR;
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}
|
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}
|
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break;
|
|
|
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case RT_DEVICE_CTRL_ADC_MODE:
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{
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/* change device setting */
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struct efm32_adc_control_t *control = \
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(struct efm32_adc_control_t *)args;
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switch (control->mode)
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{
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case ADC_MODE_SINGLE:
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ADC_InitSingle(adc->adc_device, control->single.init);
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break;
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|
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case ADC_MODE_SCAN:
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ADC_InitScan(adc->adc_device, control->scan.init);
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break;
|
|
|
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case ADC_MODE_TAILGATE:
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ADC_InitSingle(adc->adc_device, control->single.init);
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ADC_InitScan(adc->adc_device, control->scan.init);
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break;
|
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|
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default:
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return -RT_ERROR;
|
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}
|
|
|
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if (control->mode == ADC_MODE_TAILGATE)
|
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{
|
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adc->mode = ADC_MODE_TAILGATE;
|
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}
|
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else
|
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{
|
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adc->mode &= ~(rt_uint8_t)ADC_MODE_TAILGATE;
|
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adc->mode |= control->mode;
|
|
}
|
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if ((control->mode == ADC_MODE_TAILGATE) || \
|
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(control->mode == ADC_MODE_SINGLE))
|
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{
|
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if (control->single.init->rep)
|
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{
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adc->mode |= ADC_OP_SINGLE_REPEAT;
|
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}
|
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adc->singleCount = control->single.count;
|
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adc->singleDmaChannel = control->single.dmaChannel;
|
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efm32_adc_cfg_dma(adc->adc_device, control->mode, adc->singleDmaChannel);
|
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}
|
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if ((control->mode == ADC_MODE_TAILGATE) || \
|
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(control->mode == ADC_MODE_SCAN))
|
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{
|
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if (control->scan.init->rep)
|
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{
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adc->mode |= ADC_OP_SCAN_REPEAT;
|
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}
|
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adc->scanCount = control->scan.count;
|
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adc->scanDmaChannel = control->scan.dmaChannel;
|
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efm32_adc_cfg_dma(adc->adc_device, control->mode, adc->scanDmaChannel);
|
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}
|
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}
|
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break;
|
|
|
|
case RT_DEVICE_CTRL_ADC_RESULT:
|
|
{
|
|
struct efm32_adc_result_t *control = \
|
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(struct efm32_adc_result_t *)args;
|
|
|
|
switch (control->mode)
|
|
{
|
|
case ADC_MODE_SINGLE:
|
|
if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
|
|
{
|
|
if (adc->mode & ADC_OP_SINGLE_REPEAT)
|
|
{
|
|
if (!(DMA->IF & (1 << adc->singleDmaChannel)))
|
|
{
|
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efm32_adc_on_dma(
|
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adc->adc_device,
|
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control->mode,
|
|
adc->singleCount,
|
|
adc->singleDmaChannel,
|
|
control->buffer);
|
|
}
|
|
while (!(DMA->IF & (1 << adc->singleDmaChannel)));
|
|
}
|
|
else
|
|
{
|
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while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT);
|
|
}
|
|
}
|
|
else
|
|
{
|
|
while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT);
|
|
*((rt_uint32_t *)control->buffer) = \
|
|
ADC_DataSingleGet(adc->adc_device) << adcErrataShift;
|
|
}
|
|
break;
|
|
|
|
case ADC_MODE_SCAN:
|
|
if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
|
|
{
|
|
if (adc->mode & ADC_OP_SCAN_REPEAT)
|
|
{
|
|
if (!(DMA->IF & (1 << adc->scanDmaChannel)))
|
|
{
|
|
efm32_adc_on_dma(
|
|
adc->adc_device,
|
|
control->mode,
|
|
adc->scanCount,
|
|
adc->scanDmaChannel,
|
|
control->buffer);
|
|
}
|
|
while (!(DMA->IF & (1 << adc->scanDmaChannel)));
|
|
}
|
|
else
|
|
{
|
|
while (adc->adc_device->STATUS & ADC_STATUS_SCANACT);
|
|
}
|
|
}
|
|
else
|
|
{
|
|
while (adc->adc_device->STATUS & ADC_STATUS_SCANACT);
|
|
*((rt_uint32_t *)control->buffer) = \
|
|
ADC_DataScanGet(adc->adc_device) << adcErrataShift;
|
|
}
|
|
break;
|
|
|
|
case ADC_MODE_TAILGATE:
|
|
{
|
|
void *index = control->buffer;
|
|
|
|
if ((adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA) && \
|
|
!(adc->mode & ADC_OP_SCAN_REPEAT))
|
|
{
|
|
index += adc->scanCount;
|
|
}
|
|
if ((adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA) && \
|
|
!(adc->mode & ADC_OP_SINGLE_REPEAT))
|
|
{
|
|
index += adc->singleCount;
|
|
}
|
|
|
|
if (adc->scanDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
|
|
{
|
|
if (adc->mode & ADC_OP_SCAN_REPEAT)
|
|
{
|
|
if (!(DMA->IF & (1 << adc->scanDmaChannel)))
|
|
{
|
|
efm32_adc_on_dma(
|
|
adc->adc_device,
|
|
control->mode,
|
|
adc->scanCount,
|
|
adc->scanDmaChannel,
|
|
index);
|
|
index += adc->scanCount;
|
|
}
|
|
while (!(DMA->IF & (1 << adc->scanDmaChannel)));
|
|
}
|
|
else
|
|
{
|
|
while (adc->adc_device->STATUS & ADC_STATUS_SCANACT);
|
|
}
|
|
}
|
|
else
|
|
{
|
|
while (adc->adc_device->STATUS & ADC_STATUS_SCANACT);
|
|
*(rt_uint32_t *)(index++) = \
|
|
ADC_DataScanGet(adc->adc_device) << adcErrataShift;
|
|
}
|
|
if (adc->singleDmaChannel != (rt_uint8_t)EFM32_NO_DMA)
|
|
{
|
|
if (adc->mode & ADC_OP_SINGLE_REPEAT)
|
|
{
|
|
if (!(DMA->IF & (1 << adc->singleDmaChannel)))
|
|
{
|
|
efm32_adc_on_dma(
|
|
adc->adc_device,
|
|
control->mode,
|
|
adc->singleCount,
|
|
adc->singleDmaChannel,
|
|
index);
|
|
index += adc->singleCount;
|
|
}
|
|
while (!(DMA->IF & (1 << adc->singleDmaChannel)));
|
|
}
|
|
else
|
|
{
|
|
while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT);
|
|
}
|
|
}
|
|
else
|
|
{
|
|
while (adc->adc_device->STATUS & ADC_STATUS_SINGLEACT);
|
|
*(rt_uint32_t *)(index++) = \
|
|
ADC_DataSingleGet(adc->adc_device) << adcErrataShift;
|
|
}
|
|
}
|
|
break;
|
|
|
|
default:
|
|
return -RT_ERROR;
|
|
}
|
|
}
|
|
break;
|
|
|
|
default:
|
|
return -RT_ERROR;
|
|
}
|
|
|
|
return RT_EOK;
|
|
}
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Register ADC device
|
|
*
|
|
* @details
|
|
*
|
|
* @note
|
|
*
|
|
* @param[in] device
|
|
* Pointer to device descriptor
|
|
*
|
|
* @param[in] name
|
|
* Device name
|
|
*
|
|
* @param[in] flag
|
|
* Configuration flags
|
|
*
|
|
* @param[in] adc
|
|
* Pointer to ADC device descriptor
|
|
*
|
|
* @return
|
|
* Error code
|
|
******************************************************************************/
|
|
rt_err_t rt_hw_adc_register(
|
|
rt_device_t device,
|
|
const char *name,
|
|
rt_uint32_t flag,
|
|
struct efm32_adc_device_t *adc)
|
|
{
|
|
RT_ASSERT(device != RT_NULL);
|
|
|
|
device->type = RT_Device_Class_Char; /* fixme: should be adc type */
|
|
device->rx_indicate = RT_NULL;
|
|
device->tx_complete = RT_NULL;
|
|
device->init = rt_adc_init;
|
|
device->open = RT_NULL;
|
|
device->close = RT_NULL;
|
|
device->read = RT_NULL;
|
|
device->write = RT_NULL;
|
|
device->control = rt_adc_control;
|
|
device->user_data = adc;
|
|
|
|
/* register a character device */
|
|
return rt_device_register(device, name, flag);
|
|
}
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Initialize the specified ADC unit
|
|
*
|
|
* @details
|
|
*
|
|
* @note
|
|
*
|
|
* @param[in] device
|
|
* Pointer to device descriptor
|
|
*
|
|
* @param[in] unitNumber
|
|
* Unit number
|
|
*
|
|
* @return
|
|
* Pointer to ADC device
|
|
******************************************************************************/
|
|
static struct efm32_adc_device_t *rt_hw_adc_unit_init(
|
|
rt_device_t device,
|
|
rt_uint8_t unitNumber)
|
|
{
|
|
struct efm32_adc_device_t *adc;
|
|
CMU_Clock_TypeDef adcClock;
|
|
ADC_Init_TypeDef init = ADC_INIT_DEFAULT;
|
|
|
|
do
|
|
{
|
|
/* Allocate device and set default value */
|
|
adc = rt_malloc(sizeof(struct efm32_adc_device_t));
|
|
if (adc == RT_NULL)
|
|
{
|
|
adc_debug("no memory for ADC%d driver\n", unitNumber);
|
|
break;
|
|
}
|
|
adc->mode = 0;
|
|
adc->singleCount = 0;
|
|
adc->singleDmaChannel = (rt_uint8_t)EFM32_NO_DMA;
|
|
adc->scanCount = 0;
|
|
adc->scanDmaChannel = (rt_uint8_t)EFM32_NO_DMA;
|
|
|
|
/* Initialization */
|
|
if (unitNumber >= ADC_COUNT)
|
|
{
|
|
break;
|
|
}
|
|
switch (unitNumber)
|
|
{
|
|
case 0:
|
|
adc->adc_device = ADC0;
|
|
adcClock = (CMU_Clock_TypeDef)cmuClock_ADC0;
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
|
|
/* Enable ADC clock */
|
|
CMU_ClockEnable(adcClock, true);
|
|
|
|
/* Reset */
|
|
ADC_Reset(adc->adc_device);
|
|
|
|
/* Configure ADC */
|
|
// TODO: Fixed oversampling rate?
|
|
init.ovsRateSel = adcOvsRateSel4096;
|
|
init.timebase = ADC_TimebaseCalc(0);
|
|
init.prescale = ADC_PrescaleCalc(ADC_CONVERT_FREQUENCY, 0);
|
|
ADC_Init(adc->adc_device, &init);
|
|
|
|
return adc;
|
|
} while(0);
|
|
|
|
if (adc)
|
|
{
|
|
rt_free(adc);
|
|
}
|
|
rt_kprintf("ADC: Init failed!\n");
|
|
return RT_NULL;
|
|
}
|
|
|
|
/***************************************************************************//**
|
|
* @brief
|
|
* Initialize all ADC module related hardware and register ADC device to kernel
|
|
*
|
|
* @details
|
|
*
|
|
* @note
|
|
*
|
|
******************************************************************************/
|
|
void rt_hw_adc_init(void)
|
|
{
|
|
SYSTEM_ChipRevision_TypeDef chipRev;
|
|
struct efm32_adc_device_t *adc;
|
|
|
|
#ifdef RT_USING_ADC0
|
|
if ((adc = rt_hw_adc_unit_init(&adc0_device, 0)) != RT_NULL)
|
|
{
|
|
rt_hw_adc_register(&adc0_device, RT_ADC0_NAME, EFM32_NO_DATA, adc);
|
|
}
|
|
#endif
|
|
|
|
/* ADC errata for rev B when using VDD as reference, need to multiply */
|
|
/* result by 2 */
|
|
SYSTEM_ChipRevisionGet(&chipRev);
|
|
if ((chipRev.major == 0x01) && (chipRev.minor == 0x01))
|
|
{
|
|
adcErrataShift = 1;
|
|
}
|
|
}
|
|
|
|
#endif
|
|
/***************************************************************************//**
|
|
* @}
|
|
******************************************************************************/
|