1896 lines
64 KiB
C
1896 lines
64 KiB
C
//*****************************************************************************
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//
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// timer.c - Driver for the timer module.
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//
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// Copyright (c) 2005-2014 Texas Instruments Incorporated. All rights reserved.
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// Software License Agreement
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// This is part of revision 2.1.0.12573 of the Tiva Peripheral Driver Library.
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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//! \addtogroup timer_api
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//! @{
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//
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//*****************************************************************************
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#include <stdbool.h>
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#include <stdint.h>
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#include "inc/hw_ints.h"
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#include "inc/hw_memmap.h"
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#include "inc/hw_timer.h"
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#include "inc/hw_types.h"
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#include "inc/hw_sysctl.h"
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#include "driverlib/debug.h"
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#include "driverlib/interrupt.h"
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#include "driverlib/tiva_timer.h"
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//*****************************************************************************
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//
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// A macro used to determine whether the target part supports new
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// configuration and control options.
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//
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//*****************************************************************************
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#define NEW_TIMER_CONFIGURATION CLASS_IS_TM4C129
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//*****************************************************************************
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//
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// A mapping of timer base address to interrupt number.
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//
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//*****************************************************************************
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static const uint32_t g_ppui32TimerIntMap[][2] =
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{
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{ TIMER0_BASE, INT_TIMER0A_TM4C123 },
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{ TIMER1_BASE, INT_TIMER1A_TM4C123 },
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{ TIMER2_BASE, INT_TIMER2A_TM4C123 },
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{ TIMER3_BASE, INT_TIMER3A_TM4C123 },
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{ TIMER4_BASE, INT_TIMER4A_TM4C123 },
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{ TIMER5_BASE, INT_TIMER5A_TM4C123 },
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{ WTIMER0_BASE, INT_WTIMER0A_TM4C123 },
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{ WTIMER1_BASE, INT_WTIMER1A_TM4C123 },
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{ WTIMER2_BASE, INT_WTIMER2A_TM4C123 },
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{ WTIMER3_BASE, INT_WTIMER3A_TM4C123 },
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{ WTIMER4_BASE, INT_WTIMER4A_TM4C123 },
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{ WTIMER5_BASE, INT_WTIMER5A_TM4C123 },
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};
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static const uint_fast8_t g_ui8TimerIntMapRows =
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sizeof(g_ppui32TimerIntMap) / sizeof(g_ppui32TimerIntMap[0]);
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static const uint32_t g_ppui32TimerIntMapSnowflake[][2] =
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{
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{ TIMER0_BASE, INT_TIMER0A_TM4C129 },
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{ TIMER1_BASE, INT_TIMER1A_TM4C129 },
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{ TIMER2_BASE, INT_TIMER2A_TM4C129 },
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{ TIMER3_BASE, INT_TIMER3A_TM4C129 },
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{ TIMER4_BASE, INT_TIMER4A_TM4C129 },
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{ TIMER5_BASE, INT_TIMER5A_TM4C129 },
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{ TIMER6_BASE, INT_TIMER6A_TM4C129 },
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{ TIMER7_BASE, INT_TIMER7A_TM4C129 },
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};
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static const uint_fast8_t g_ui8TimerIntMapRowsSnowflake =
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sizeof(g_ppui32TimerIntMapSnowflake) /
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sizeof(g_ppui32TimerIntMapSnowflake[0]);
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//*****************************************************************************
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//
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//! \internal
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//! Checks a timer base address.
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//!
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//! \param ui32Base is the base address of the timer module.
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//!
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//! This function determines if a timer module base address is valid.
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//!
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//! \return Returns \b true if the base address is valid and \b false
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//! otherwise.
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//
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//*****************************************************************************
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#ifdef DEBUG
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static bool
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_TimerBaseValid(uint32_t ui32Base)
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{
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return((ui32Base == TIMER0_BASE) || (ui32Base == TIMER1_BASE) ||
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(ui32Base == TIMER2_BASE) || (ui32Base == TIMER3_BASE) ||
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(ui32Base == TIMER4_BASE) || (ui32Base == TIMER5_BASE) ||
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(ui32Base == WTIMER0_BASE) || (ui32Base == WTIMER1_BASE) ||
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(ui32Base == WTIMER2_BASE) || (ui32Base == WTIMER3_BASE) ||
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(ui32Base == WTIMER4_BASE) || (ui32Base == WTIMER5_BASE));
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}
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#endif
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//*****************************************************************************
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//
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//! Returns a timer modules interrupt number.
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//!
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//! \param ui32Base is the base address of the selected timer.
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//! \param ui32Timer specifies the timer(s) to enable; must be one of
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//! \b TIMER_A, \b TIMER_B, or \b TIMER_BOTH.
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//!
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//! This function returns the interrupt number for a given timer module
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//! specified by the \e ui32Base and \e ui32Timer parameter.
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//!
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//! \return Returns a timer module's interrupt number or 0 if the interrupt
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//! does not exist.
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//
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//*****************************************************************************
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static uint32_t
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_TimerIntNumberGet(uint32_t ui32Base, uint32_t ui32Timer)
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{
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uint32_t ui32Int;
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uint_fast8_t ui8Idx, ui8Rows;
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const uint32_t (*ppui32SSIIntMap)[2];
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//
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// Default interrupt map.
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//
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ppui32SSIIntMap = g_ppui32TimerIntMap;
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ui8Rows = g_ui8TimerIntMapRows;
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if(CLASS_IS_TM4C129)
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{
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ppui32SSIIntMap = g_ppui32TimerIntMapSnowflake;
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ui8Rows = g_ui8TimerIntMapRowsSnowflake;
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}
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//
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// Loop through the table that maps timer base addresses to interrupt
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// numbers.
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//
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for(ui8Idx = 0; ui8Idx < ui8Rows; ui8Idx++)
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{
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//
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// See if this base address matches.
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//
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if(ppui32SSIIntMap[ui8Idx][0] == ui32Base)
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{
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ui32Int = ppui32SSIIntMap[ui8Idx][1];
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if(ui32Timer == TIMER_B)
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{
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ui32Int += 1;
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}
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//
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// Return the corresponding interrupt number.
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//
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return(ui32Int);
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}
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}
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//
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// The base address could not be found, so return an error.
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//
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return(0);
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}
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//*****************************************************************************
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//
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//! Enables the timer(s).
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//!
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//! \param ui32Base is the base address of the timer module.
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//! \param ui32Timer specifies the timer(s) to enable; must be one of
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//! \b TIMER_A, \b TIMER_B, or \b TIMER_BOTH.
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//!
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//! This function enables operation of the timer module. The timer must be
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//! configured before it is enabled.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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TimerEnable(uint32_t ui32Base, uint32_t ui32Timer)
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{
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//
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// Check the arguments.
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//
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ASSERT(_TimerBaseValid(ui32Base));
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ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
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(ui32Timer == TIMER_BOTH));
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//
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// Enable the timer(s) module.
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//
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HWREG(ui32Base + TIMER_O_CTL) |= ui32Timer & (TIMER_CTL_TAEN |
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TIMER_CTL_TBEN);
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}
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//*****************************************************************************
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//
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//! Disables the timer(s).
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//!
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//! \param ui32Base is the base address of the timer module.
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//! \param ui32Timer specifies the timer(s) to disable; must be one of
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//! \b TIMER_A, \b TIMER_B, or \b TIMER_BOTH.
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//!
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//! This function disables operation of the timer module.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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TimerDisable(uint32_t ui32Base, uint32_t ui32Timer)
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{
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//
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// Check the arguments.
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//
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ASSERT(_TimerBaseValid(ui32Base));
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ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
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(ui32Timer == TIMER_BOTH));
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//
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// Disable the timer module.
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//
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HWREG(ui32Base + TIMER_O_CTL) &= ~(ui32Timer &
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(TIMER_CTL_TAEN | TIMER_CTL_TBEN));
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}
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//*****************************************************************************
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//
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//! Configures the timer(s).
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//!
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//! \param ui32Base is the base address of the timer module.
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//! \param ui32Config is the configuration for the timer.
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//!
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//! This function configures the operating mode of the timer(s). The timer
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//! module is disabled before being configured and is left in the disabled
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//! state. The timer can be configured to be a single full-width timer
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//! by using the \b TIMER_CFG_* values or a pair of half-width timers using the
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//! \b TIMER_CFG_A_* and \b TIMER_CFG_B_* values passed in the \e ui32Config
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//! parameter.
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//!
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//! The configuration is specified in \e ui32Config as one of the following
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//! values:
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//!
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//! - \b TIMER_CFG_ONE_SHOT - Full-width one-shot timer
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//! - \b TIMER_CFG_ONE_SHOT_UP - Full-width one-shot timer that counts up
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//! instead of down (not available on all parts)
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//! - \b TIMER_CFG_PERIODIC - Full-width periodic timer
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//! - \b TIMER_CFG_PERIODIC_UP - Full-width periodic timer that counts up
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//! instead of down (not available on all parts)
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//! - \b TIMER_CFG_RTC - Full-width real time clock timer
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//! - \b TIMER_CFG_SPLIT_PAIR - Two half-width timers
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//!
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//! When configured for a pair of half-width timers, each timer is separately
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//! configured. The first timer is configured by setting \e ui32Config to
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//! the result of a logical OR operation between one of the following values
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//! and \e ui32Config:
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//!
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//! - \b TIMER_CFG_A_ONE_SHOT - Half-width one-shot timer
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//! - \b TIMER_CFG_A_ONE_SHOT_UP - Half-width one-shot timer that counts up
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//! instead of down (not available on all parts)
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//! - \b TIMER_CFG_A_PERIODIC - Half-width periodic timer
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//! - \b TIMER_CFG_A_PERIODIC_UP - Half-width periodic timer that counts up
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//! instead of down (not available on all parts)
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//! - \b TIMER_CFG_A_CAP_COUNT - Half-width edge count capture
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//! - \b TIMER_CFG_A_CAP_COUNT_UP - Half-width edge count capture that counts
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//! up instead of down (not available on all parts)
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//! - \b TIMER_CFG_A_CAP_TIME - Half-width edge time capture
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//! - \b TIMER_CFG_A_CAP_TIME_UP - Half-width edge time capture that counts up
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//! instead of down (not available on all parts)
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//! - \b TIMER_CFG_A_PWM - Half-width PWM output
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//!
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//! Some Tiva devices also allow configuring an action when the timers
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//! reach their timeout. Please consult the data sheet for the part you are
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//! using to determine whether configuring actions on timers is available.
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//!
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//! One of the following can be combined with the \b TIMER_CFG_* values to
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//! enable an action on timer A:
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//!
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//! - \b TIMER_CFG_A_ACT_TOINTD - masks the timeout interrupt of timer A.
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//! - \b TIMER_CFG_A_ACT_NONE - no additional action on timeout of timer A.
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//! - \b TIMER_CFG_A_ACT_TOGGLE - toggle CCP on timeout of timer A.
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//! - \b TIMER_CFG_A_ACT_SETTO - set CCP on timeout of timer A.
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//! - \b TIMER_CFG_A_ACT_CLRTO - clear CCP on timeout of timer A.
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//! - \b TIMER_CFG_A_ACT_SETTOGTO - set CCP immediately and then toggle it on
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//! timeout of timer A.
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//! - \b TIMER_CFG_A_ACT_CLRTOGTO - clear CCP immediately and then toggle it on
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//! timeout of timer A.
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//! - \b TIMER_CFG_A_ACT_SETCLRTO - set CCP immediately and then clear it on
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//! timeout of timer A.
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//! - \b TIMER_CFG_A_ACT_CLRSETTO - clear CCP immediately and then set it on
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//! timeout of timer A.
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//!
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//! One of the following can be combined with the \b TIMER_CFG_* values to
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//! enable an action on timer B:
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//!
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//! - \b TIMER_CFG_B_ACT_TOINTD - masks the timeout interrupt of timer B.
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//! - \b TIMER_CFG_B_ACT_NONE - no additional action on timeout of timer B.
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//! - \b TIMER_CFG_B_ACT_TOGGLE - toggle CCP on timeout of timer B.
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//! - \b TIMER_CFG_B_ACT_SETTO - set CCP on timeout of timer B.
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//! - \b TIMER_CFG_B_ACT_CLRTO - clear CCP on timeout of timer B.
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//! - \b TIMER_CFG_B_ACT_SETTOGTO - set CCP immediately and then toggle it on
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//! timeout of timer B.
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//! - \b TIMER_CFG_B_ACT_CLRTOGTO - clear CCP immediately and then toggle it on
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//! timeout of timer B.
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//! - \b TIMER_CFG_B_ACT_SETCLRTO - set CCP immediately and then clear it on
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//! timeout of timer B.
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//! - \b TIMER_CFG_B_ACT_CLRSETTO - clear CCP immediately and then set it on
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//! timeout of timer B.
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//!
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//! Similarly, the second timer is configured by setting \e ui32Config to
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//! the result of a logical OR operation between one of the corresponding
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//! \b TIMER_CFG_B_* values and \e ui32Config.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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TimerConfigure(uint32_t ui32Base, uint32_t ui32Config)
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{
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//
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// Check the arguments.
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//
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ASSERT(_TimerBaseValid(ui32Base));
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ASSERT((ui32Config == TIMER_CFG_ONE_SHOT) ||
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(ui32Config == TIMER_CFG_ONE_SHOT_UP) ||
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(ui32Config == TIMER_CFG_PERIODIC) ||
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(ui32Config == TIMER_CFG_PERIODIC_UP) ||
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(ui32Config == TIMER_CFG_RTC) ||
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((ui32Config & 0xff000000) == TIMER_CFG_SPLIT_PAIR));
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ASSERT(((ui32Config & 0xff000000) != TIMER_CFG_SPLIT_PAIR) ||
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((((ui32Config & 0x000000ff) == TIMER_CFG_A_ONE_SHOT) ||
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((ui32Config & 0x000000ff) == TIMER_CFG_A_ONE_SHOT_UP) ||
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((ui32Config & 0x000000ff) == TIMER_CFG_A_PERIODIC) ||
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((ui32Config & 0x000000ff) == TIMER_CFG_A_PERIODIC_UP) ||
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((ui32Config & 0x000000ff) == TIMER_CFG_A_CAP_COUNT) ||
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((ui32Config & 0x000000ff) == TIMER_CFG_A_CAP_TIME) ||
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((ui32Config & 0x000000ff) == TIMER_CFG_A_PWM)) &&
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(((ui32Config & 0x0000ff00) == TIMER_CFG_B_ONE_SHOT) ||
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((ui32Config & 0x0000ff00) == TIMER_CFG_B_ONE_SHOT_UP) ||
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((ui32Config & 0x0000ff00) == TIMER_CFG_B_PERIODIC) ||
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((ui32Config & 0x0000ff00) == TIMER_CFG_B_PERIODIC_UP) ||
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((ui32Config & 0x0000ff00) == TIMER_CFG_B_CAP_COUNT) ||
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((ui32Config & 0x0000ff00) == TIMER_CFG_B_CAP_COUNT_UP) ||
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((ui32Config & 0x0000ff00) == TIMER_CFG_B_CAP_TIME) ||
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((ui32Config & 0x0000ff00) == TIMER_CFG_B_CAP_TIME_UP) ||
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((ui32Config & 0x0000ff00) == TIMER_CFG_B_PWM))));
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//
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// Disable the timers.
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//
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HWREG(ui32Base + TIMER_O_CTL) &= ~(TIMER_CTL_TAEN | TIMER_CTL_TBEN);
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//
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// Set the global timer configuration.
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//
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HWREG(ui32Base + TIMER_O_CFG) = ui32Config >> 24;
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//
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// Set the configuration of the A and B timers and set the TxPWMIE bit.
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// Note that the B timer configuration is ignored by the hardware in 32-bit
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// modes.
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//
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if(NEW_TIMER_CONFIGURATION)
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{
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HWREG(ui32Base + TIMER_O_TAMR) = (((ui32Config & 0x000f0000) >> 4) |
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(ui32Config & 0xff) |
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TIMER_TAMR_TAPWMIE);
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HWREG(ui32Base + TIMER_O_TBMR) = (((ui32Config & 0x00f00000) >> 8) |
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((ui32Config >> 8) & 0xff) |
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TIMER_TBMR_TBPWMIE);
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}
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else
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{
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HWREG(ui32Base + TIMER_O_TAMR) = ((ui32Config & 0xff) |
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TIMER_TAMR_TAPWMIE);
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HWREG(ui32Base + TIMER_O_TBMR) = (((ui32Config >> 8) & 0xff) |
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TIMER_TBMR_TBPWMIE);
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}
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}
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|
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//*****************************************************************************
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//
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//! Controls the output level.
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//!
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//! \param ui32Base is the base address of the timer module.
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//! \param ui32Timer specifies the timer(s) to adjust; must be one of
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//! \b TIMER_A, \b TIMER_B, or \b TIMER_BOTH.
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//! \param bInvert specifies the output level.
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//!
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//! This function configures the PWM output level for the specified timer. If
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//! the \e bInvert parameter is \b true, then the timer's output is made active
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//! low; otherwise, it is made active high.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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TimerControlLevel(uint32_t ui32Base, uint32_t ui32Timer, bool bInvert)
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{
|
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//
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// Check the arguments.
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//
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ASSERT(_TimerBaseValid(ui32Base));
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ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
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(ui32Timer == TIMER_BOTH));
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|
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//
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// Set the output levels as requested.
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//
|
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ui32Timer &= TIMER_CTL_TAPWML | TIMER_CTL_TBPWML;
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HWREG(ui32Base + TIMER_O_CTL) = (bInvert ?
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(HWREG(ui32Base + TIMER_O_CTL) |
|
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ui32Timer) :
|
|
(HWREG(ui32Base + TIMER_O_CTL) &
|
|
~(ui32Timer)));
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Enables or disables the ADC trigger output.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//! \param ui32Timer specifies the timer to adjust; must be one of \b TIMER_A,
|
|
//! \b TIMER_B, or \b TIMER_BOTH.
|
|
//! \param bEnable specifies the desired ADC trigger state.
|
|
//!
|
|
//! This function controls the ADC trigger output for the specified timer. If
|
|
//! the \e bEnable parameter is \b true, then the timer's ADC output trigger is
|
|
//! enabled; otherwise it is disabled.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
TimerControlTrigger(uint32_t ui32Base, uint32_t ui32Timer,
|
|
bool bEnable)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
|
|
(ui32Timer == TIMER_BOTH));
|
|
|
|
//
|
|
// On newer devices the Timer time out ADC trigger enable must also
|
|
// be set.
|
|
//
|
|
if(NEW_TIMER_CONFIGURATION)
|
|
{
|
|
uint32_t ui32Val;
|
|
|
|
//
|
|
// Determine which bits to set or clear in GPTMADCEV.
|
|
//
|
|
ui32Val = (TIMER_ADCEV_TATOADCEN | TIMER_ADCEV_TBTOADCEN);
|
|
ui32Val &= ui32Timer;
|
|
|
|
//
|
|
// Write the GPTM ADC Event register to enable or disable the trigger
|
|
// to the ADC.
|
|
//
|
|
HWREG(ui32Base + TIMER_O_ADCEV) = (bEnable ?
|
|
(HWREG(ui32Base + TIMER_O_ADCEV) |
|
|
ui32Val) :
|
|
(HWREG(ui32Base + TIMER_O_ADCEV) &
|
|
~(ui32Val)));
|
|
}
|
|
|
|
//
|
|
// Set the trigger output as requested.
|
|
// Set the ADC trigger output as requested.
|
|
//
|
|
ui32Timer &= TIMER_CTL_TAOTE | TIMER_CTL_TBOTE;
|
|
HWREG(ui32Base + TIMER_O_CTL) = (bEnable ?
|
|
(HWREG(ui32Base + TIMER_O_CTL) |
|
|
ui32Timer) :
|
|
(HWREG(ui32Base + TIMER_O_CTL) &
|
|
~(ui32Timer)));
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Controls the event type.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//! \param ui32Timer specifies the timer(s) to be adjusted; must be one of
|
|
//! \b TIMER_A, \b TIMER_B, or \b TIMER_BOTH.
|
|
//! \param ui32Event specifies the type of event; must be one of
|
|
//! \b TIMER_EVENT_POS_EDGE, \b TIMER_EVENT_NEG_EDGE, or
|
|
//! \b TIMER_EVENT_BOTH_EDGES.
|
|
//!
|
|
//! This function configures the signal edge(s) that triggers the timer when
|
|
//! in capture mode.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
TimerControlEvent(uint32_t ui32Base, uint32_t ui32Timer,
|
|
uint32_t ui32Event)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
|
|
(ui32Timer == TIMER_BOTH));
|
|
|
|
//
|
|
// Set the event type.
|
|
//
|
|
ui32Timer &= TIMER_CTL_TAEVENT_M | TIMER_CTL_TBEVENT_M;
|
|
HWREG(ui32Base + TIMER_O_CTL) = ((HWREG(ui32Base + TIMER_O_CTL) &
|
|
~ui32Timer) | (ui32Event & ui32Timer));
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Controls the stall handling.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//! \param ui32Timer specifies the timer(s) to be adjusted; must be one of
|
|
//! \b TIMER_A, \b TIMER_B, or \b TIMER_BOTH.
|
|
//! \param bStall specifies the response to a stall signal.
|
|
//!
|
|
//! This function controls the stall response for the specified timer. If the
|
|
//! \e bStall parameter is \b true, then the timer stops counting if the
|
|
//! processor enters debug mode; otherwise the timer keeps running while in
|
|
//! debug mode.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
TimerControlStall(uint32_t ui32Base, uint32_t ui32Timer,
|
|
bool bStall)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
|
|
(ui32Timer == TIMER_BOTH));
|
|
|
|
//
|
|
// Set the stall mode.
|
|
//
|
|
ui32Timer &= TIMER_CTL_TASTALL | TIMER_CTL_TBSTALL;
|
|
HWREG(ui32Base + TIMER_O_CTL) = (bStall ?
|
|
(HWREG(ui32Base + TIMER_O_CTL) |
|
|
ui32Timer) :
|
|
(HWREG(ui32Base + TIMER_O_CTL) &
|
|
~(ui32Timer)));
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Controls the wait on trigger handling.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//! \param ui32Timer specifies the timer(s) to be adjusted; must be one of
|
|
//! \b TIMER_A, \b TIMER_B, or \b TIMER_BOTH.
|
|
//! \param bWait specifies if the timer should wait for a trigger input.
|
|
//!
|
|
//! This function controls whether or not a timer waits for a trigger input to
|
|
//! start counting. When enabled, the previous timer in the trigger chain must
|
|
//! count to its timeout in order for this timer to start counting. Refer to
|
|
//! the part's data sheet for a description of the trigger chain.
|
|
//!
|
|
//! \note This functionality is not available on all parts. This function
|
|
//! should not be used for Timer 0A or Wide Timer 0A.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
TimerControlWaitOnTrigger(uint32_t ui32Base, uint32_t ui32Timer,
|
|
bool bWait)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
|
|
(ui32Timer == TIMER_BOTH));
|
|
|
|
//
|
|
// Set the wait on trigger mode for timer A.
|
|
//
|
|
if((ui32Timer & TIMER_A) != 0)
|
|
{
|
|
if(bWait)
|
|
{
|
|
HWREG(ui32Base + TIMER_O_TAMR) |= TIMER_TAMR_TAWOT;
|
|
}
|
|
else
|
|
{
|
|
HWREG(ui32Base + TIMER_O_TAMR) &= ~(TIMER_TAMR_TAWOT);
|
|
}
|
|
}
|
|
|
|
//
|
|
// Set the wait on trigger mode for timer B.
|
|
//
|
|
if((ui32Timer & TIMER_B) != 0)
|
|
{
|
|
if(bWait)
|
|
{
|
|
HWREG(ui32Base + TIMER_O_TBMR) |= TIMER_TBMR_TBWOT;
|
|
}
|
|
else
|
|
{
|
|
HWREG(ui32Base + TIMER_O_TBMR) &= ~(TIMER_TBMR_TBWOT);
|
|
}
|
|
}
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Enables RTC counting.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//!
|
|
//! This function causes the timer to start counting when in RTC mode. If not
|
|
//! configured for RTC mode, this function does nothing.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
TimerRTCEnable(uint32_t ui32Base)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
|
|
//
|
|
// Enable RTC counting.
|
|
//
|
|
HWREG(ui32Base + TIMER_O_CTL) |= TIMER_CTL_RTCEN;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Disables RTC counting.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//!
|
|
//! This function causes the timer to stop counting when in RTC mode.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
TimerRTCDisable(uint32_t ui32Base)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
|
|
//
|
|
// Disable RTC counting.
|
|
//
|
|
HWREG(ui32Base + TIMER_O_CTL) &= ~(TIMER_CTL_RTCEN);
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Sets the clock source for the specified timer module.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//! \param ui32Source is the clock source for the timer module.
|
|
//!
|
|
//! This function sets the clock source for both timer A and timer B for the
|
|
//! given timer module. The possible clock sources are the system clock
|
|
//! (\b TIMER_CLOCK_SYSTEM) or the precision internal oscillator
|
|
//! (\b TIMER_CLOCK_PIOSC).
|
|
//!
|
|
//! \note The ability to specify the timer clock source varies with the
|
|
//! Tiva part in use. Please consult the data sheet for the part you are
|
|
//! using to determine whether this support is available.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
TimerClockSourceSet(uint32_t ui32Base, uint32_t ui32Source)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
ASSERT((ui32Source == TIMER_CLOCK_SYSTEM) ||
|
|
(ui32Source == TIMER_CLOCK_PIOSC));
|
|
|
|
//
|
|
// Set the timer clock source.
|
|
//
|
|
HWREG(ui32Base + TIMER_O_CC) = ui32Source;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Returns the clock source for the specified timer module.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//!
|
|
//! This function returns the clock source for the specified timer module. The
|
|
//! possible clock sources are the system clock (\b TIMER_CLOCK_SYSTEM) or
|
|
//! the precision internal oscillator (\b TIMER_CLOCK_PIOSC).
|
|
//!
|
|
//! \note The ability to specify the timer clock source varies with the
|
|
//! Tiva part in use. Please consult the data sheet for the part you are
|
|
//! using to determine whether this support is available.
|
|
//!
|
|
//! \return Returns either \b TIMER_CLOCK_SYSTEM or \b TIMER_CLOCK_PIOSC.
|
|
//
|
|
//*****************************************************************************
|
|
uint32_t
|
|
TimerClockSourceGet(uint32_t ui32Base)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
|
|
//
|
|
// Return the timer clock source.
|
|
//
|
|
return(HWREG(ui32Base + TIMER_O_CC));
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Sets the timer prescale value.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//! \param ui32Timer specifies the timer(s) to adjust; must be one of
|
|
//! \b TIMER_A, \b TIMER_B, or \b TIMER_BOTH.
|
|
//! \param ui32Value is the timer prescale value which must be between 0 and
|
|
//! 255 (inclusive) for 16/32-bit timers and between 0 and 65535 (inclusive)
|
|
//! for 32/64-bit timers.
|
|
//!
|
|
//! This function configures the value of the input clock prescaler. The
|
|
//! prescaler is only operational when in half-width mode and is used to extend
|
|
//! the range of the half-width timer modes. The prescaler provides the least
|
|
//! significant bits when counting down in periodic and one-shot modes; in all
|
|
//! other modes, the prescaler provides the most significant bits.
|
|
//!
|
|
//! \note The availability of the prescaler varies with the Tiva part and
|
|
//! timer mode in use. Please consult the datasheet for the part you are using
|
|
//! to determine whether this support is available.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
TimerPrescaleSet(uint32_t ui32Base, uint32_t ui32Timer, uint32_t ui32Value)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
|
|
(ui32Timer == TIMER_BOTH));
|
|
ASSERT(ui32Value < 256);
|
|
|
|
//
|
|
// Set the timer A prescaler if requested.
|
|
//
|
|
if(ui32Timer & TIMER_A)
|
|
{
|
|
HWREG(ui32Base + TIMER_O_TAPR) = ui32Value;
|
|
}
|
|
|
|
//
|
|
// Set the timer B prescaler if requested.
|
|
//
|
|
if(ui32Timer & TIMER_B)
|
|
{
|
|
HWREG(ui32Base + TIMER_O_TBPR) = ui32Value;
|
|
}
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Gets the timer prescale value.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//! \param ui32Timer specifies the timer; must be one of \b TIMER_A or
|
|
//! \b TIMER_B.
|
|
//!
|
|
//! This function gets the value of the input clock prescaler. The prescaler
|
|
//! is only operational when in half-width mode and is used to extend the range
|
|
//! of the half-width timer modes. The prescaler provides the least
|
|
//! significant bits when counting down in periodic and one-shot modes; in all
|
|
//! other modes, the prescaler provides the most significant bits.
|
|
//!
|
|
//! \note The availability of the prescaler varies with the Tiva part and
|
|
//! timer mode in use. Please consult the datasheet for the part you are using
|
|
//! to determine whether this support is available.
|
|
//!
|
|
//! \return The value of the timer prescaler.
|
|
//
|
|
//*****************************************************************************
|
|
uint32_t
|
|
TimerPrescaleGet(uint32_t ui32Base, uint32_t ui32Timer)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
|
|
(ui32Timer == TIMER_BOTH));
|
|
|
|
//
|
|
// Return the appropriate prescale value.
|
|
//
|
|
return((ui32Timer == TIMER_A) ? HWREG(ui32Base + TIMER_O_TAPR) :
|
|
HWREG(ui32Base + TIMER_O_TBPR));
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Sets the timer prescale match value.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//! \param ui32Timer specifies the timer(s) to adjust; must be one of
|
|
//! \b TIMER_A, \b TIMER_B, or \b TIMER_BOTH.
|
|
//! \param ui32Value is the timer prescale match value which must be between 0
|
|
//! and 255 (inclusive) for 16/32-bit timers and between 0 and 65535
|
|
//! (inclusive) for 32/64-bit timers.
|
|
//!
|
|
//! This function configures the value of the input clock prescaler match
|
|
//! value. When in a half-width mode that uses the counter match and the
|
|
//! prescaler, the prescale match effectively extends the range of the match.
|
|
//! The prescaler provides the least significant bits when counting down in
|
|
//! periodic and one-shot modes; in all other modes, the prescaler provides the
|
|
//! most significant bits.
|
|
//!
|
|
//! \note The availability of the prescaler match varies with the Tiva
|
|
//! part and timer mode in use. Please consult the datasheet for the part you
|
|
//! are using to determine whether this support is available.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
TimerPrescaleMatchSet(uint32_t ui32Base, uint32_t ui32Timer,
|
|
uint32_t ui32Value)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
|
|
(ui32Timer == TIMER_BOTH));
|
|
ASSERT(ui32Value < 256);
|
|
|
|
//
|
|
// Set the timer A prescale match if requested.
|
|
//
|
|
if(ui32Timer & TIMER_A)
|
|
{
|
|
HWREG(ui32Base + TIMER_O_TAPMR) = ui32Value;
|
|
}
|
|
|
|
//
|
|
// Set the timer B prescale match if requested.
|
|
//
|
|
if(ui32Timer & TIMER_B)
|
|
{
|
|
HWREG(ui32Base + TIMER_O_TBPMR) = ui32Value;
|
|
}
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Gets the timer prescale match value.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//! \param ui32Timer specifies the timer; must be one of \b TIMER_A or
|
|
//! \b TIMER_B.
|
|
//!
|
|
//! This function gets the value of the input clock prescaler match value.
|
|
//! When in a half-width mode that uses the counter match and prescaler, the
|
|
//! prescale match effectively extends the range of the match. The prescaler
|
|
//! provides the least significant bits when counting down in periodic and
|
|
//! one-shot modes; in all other modes, the prescaler provides the most
|
|
//! significant bits.
|
|
//!
|
|
//! \note The availability of the prescaler match varies with the Tiva
|
|
//! part and timer mode in use. Please consult the datasheet for the part you
|
|
//! are using to determine whether this support is available.
|
|
//!
|
|
//! \return The value of the timer prescale match.
|
|
//
|
|
//*****************************************************************************
|
|
uint32_t
|
|
TimerPrescaleMatchGet(uint32_t ui32Base, uint32_t ui32Timer)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
|
|
(ui32Timer == TIMER_BOTH));
|
|
|
|
//
|
|
// Return the appropriate prescale match value.
|
|
//
|
|
return((ui32Timer == TIMER_A) ? HWREG(ui32Base + TIMER_O_TAPMR) :
|
|
HWREG(ui32Base + TIMER_O_TBPMR));
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Sets the timer load value.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//! \param ui32Timer specifies the timer(s) to adjust; must be one of
|
|
//! \b TIMER_A, \b TIMER_B, or \b TIMER_BOTH. Only \b TIMER_A should be used
|
|
//! when the timer is configured for full-width operation.
|
|
//! \param ui32Value is the load value.
|
|
//!
|
|
//! This function configures the timer load value; if the timer is running then
|
|
//! the value is immediately loaded into the timer.
|
|
//!
|
|
//! \note This function can be used for both full- and half-width modes of
|
|
//! 16/32-bit timers and for half-width modes of 32/64-bit timers. Use
|
|
//! TimerLoadSet64() for full-width modes of 32/64-bit timers.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
TimerLoadSet(uint32_t ui32Base, uint32_t ui32Timer, uint32_t ui32Value)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
|
|
(ui32Timer == TIMER_BOTH));
|
|
|
|
//
|
|
// Set the timer A load value if requested.
|
|
//
|
|
if(ui32Timer & TIMER_A)
|
|
{
|
|
HWREG(ui32Base + TIMER_O_TAILR) = ui32Value;
|
|
}
|
|
|
|
//
|
|
// Set the timer B load value if requested.
|
|
//
|
|
if(ui32Timer & TIMER_B)
|
|
{
|
|
HWREG(ui32Base + TIMER_O_TBILR) = ui32Value;
|
|
}
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Gets the timer load value.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//! \param ui32Timer specifies the timer; must be one of \b TIMER_A or
|
|
//! \b TIMER_B. Only \b TIMER_A should be used when the timer is configured
|
|
//! for full-width operation.
|
|
//!
|
|
//! This function gets the currently programmed interval load value for the
|
|
//! specified timer.
|
|
//!
|
|
//! \note This function can be used for both full- and half-width modes of
|
|
//! 16/32-bit timers and for half-width modes of 32/64-bit timers. Use
|
|
//! TimerLoadGet64() for full-width modes of 32/64-bit timers.
|
|
//!
|
|
//! \return Returns the load value for the timer.
|
|
//
|
|
//*****************************************************************************
|
|
uint32_t
|
|
TimerLoadGet(uint32_t ui32Base, uint32_t ui32Timer)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B));
|
|
|
|
//
|
|
// Return the appropriate load value.
|
|
//
|
|
return((ui32Timer == TIMER_A) ? HWREG(ui32Base + TIMER_O_TAILR) :
|
|
HWREG(ui32Base + TIMER_O_TBILR));
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Sets the timer load value for a 64-bit timer.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//! \param ui64Value is the load value.
|
|
//!
|
|
//! This function configures the timer load value for a 64-bit timer; if the
|
|
//! timer is running, then the value is immediately loaded into the timer.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
TimerLoadSet64(uint32_t ui32Base, uint64_t ui64Value)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
|
|
//
|
|
// Set the timer load value. The upper 32-bits must be written before the
|
|
// lower 32-bits in order to adhere to the hardware interlocks on the
|
|
// 64-bit value.
|
|
//
|
|
HWREG(ui32Base + TIMER_O_TBILR) = ui64Value >> 32;
|
|
HWREG(ui32Base + TIMER_O_TAILR) = ui64Value & 0xffffffff;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Gets the timer load value for a 64-bit timer.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//!
|
|
//! This function gets the currently programmed interval load value for the
|
|
//! specified 64-bit timer.
|
|
//!
|
|
//! \return Returns the load value for the timer.
|
|
//
|
|
//*****************************************************************************
|
|
uint64_t
|
|
TimerLoadGet64(uint32_t ui32Base)
|
|
{
|
|
uint32_t ui32High1, ui32High2, ui32Low;
|
|
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
|
|
//
|
|
// Read the 64-bit load value. A read of the low 32-bits is performed
|
|
// between two reads of the upper 32-bits; if the upper 32-bit values match
|
|
// then the 64-bit value is consistent. If they do not match, then the
|
|
// read is performed again until they do match (it should never execute the
|
|
// loop body more than twice).
|
|
//
|
|
do
|
|
{
|
|
ui32High1 = HWREG(ui32Base + TIMER_O_TBILR);
|
|
ui32Low = HWREG(ui32Base + TIMER_O_TAILR);
|
|
ui32High2 = HWREG(ui32Base + TIMER_O_TBILR);
|
|
}
|
|
while(ui32High1 != ui32High2);
|
|
|
|
//
|
|
// Return the load value.
|
|
//
|
|
return(((uint64_t)ui32High1 << 32) | (uint64_t)ui32Low);
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Gets the current timer value.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//! \param ui32Timer specifies the timer; must be one of \b TIMER_A or
|
|
//! \b TIMER_B. Only \b TIMER_A should be used when the timer is configured
|
|
//! for full-width operation.
|
|
//!
|
|
//! This function reads the current value of the specified timer.
|
|
//!
|
|
//! \note This function can be used for both full- and half-width modes of
|
|
//! 16/32-bit timers and for half-width modes of 32/64-bit timers. Use
|
|
//! TimerValueGet64() for full-width modes of 32/64-bit timers.
|
|
//!
|
|
//! \return Returns the current value of the timer.
|
|
//
|
|
//*****************************************************************************
|
|
uint32_t
|
|
TimerValueGet(uint32_t ui32Base, uint32_t ui32Timer)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B));
|
|
|
|
//
|
|
// Return the appropriate timer value.
|
|
//
|
|
return((ui32Timer == TIMER_A) ? HWREG(ui32Base + TIMER_O_TAR) :
|
|
HWREG(ui32Base + TIMER_O_TBR));
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Gets the current 64-bit timer value.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//!
|
|
//! This function reads the current value of the specified timer.
|
|
//!
|
|
//! \return Returns the current value of the timer.
|
|
//
|
|
//*****************************************************************************
|
|
uint64_t
|
|
TimerValueGet64(uint32_t ui32Base)
|
|
{
|
|
uint32_t ui32High1, ui32High2, ui32Low;
|
|
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
|
|
//
|
|
// Read the 64-bit timer value. A read of the low 32-bits is performed
|
|
// between two reads of the upper 32-bits; if the upper 32-bit values match
|
|
// then the 64-bit value is consistent. If they do not match, then the
|
|
// read is performed again until they do match (it should never execute the
|
|
// loop body more than twice).
|
|
//
|
|
do
|
|
{
|
|
ui32High1 = HWREG(ui32Base + TIMER_O_TBR);
|
|
ui32Low = HWREG(ui32Base + TIMER_O_TAR);
|
|
ui32High2 = HWREG(ui32Base + TIMER_O_TBR);
|
|
}
|
|
while(ui32High1 != ui32High2);
|
|
|
|
//
|
|
// Return the timer value.
|
|
//
|
|
return(((uint64_t)ui32High1 << 32) | (uint64_t)ui32Low);
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Sets the timer match value.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//! \param ui32Timer specifies the timer(s) to adjust; must be one of
|
|
//! \b TIMER_A, \b TIMER_B, or \b TIMER_BOTH. Only \b TIMER_A should be used
|
|
//! when the timer is configured for full-width operation.
|
|
//! \param ui32Value is the match value.
|
|
//!
|
|
//! This function configures the match value for a timer. This value is used
|
|
//! in capture count mode to determine when to interrupt the processor and in
|
|
//! PWM mode to determine the duty cycle of the output signal. On some
|
|
//! Tiva devices, match interrupts can also be generated in periodic and
|
|
//! one-shot modes.
|
|
//!
|
|
//! \note This function can be used for both full- and half-width modes of
|
|
//! 16/32-bit timers and for half-width modes of 32/64-bit timers. Use
|
|
//! TimerMatchSet64() for full-width modes of 32/64-bit timers.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
TimerMatchSet(uint32_t ui32Base, uint32_t ui32Timer,
|
|
uint32_t ui32Value)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
|
|
(ui32Timer == TIMER_BOTH));
|
|
|
|
//
|
|
// Set the timer A match value if requested.
|
|
//
|
|
if(ui32Timer & TIMER_A)
|
|
{
|
|
HWREG(ui32Base + TIMER_O_TAMATCHR) = ui32Value;
|
|
}
|
|
|
|
//
|
|
// Set the timer B match value if requested.
|
|
//
|
|
if(ui32Timer & TIMER_B)
|
|
{
|
|
HWREG(ui32Base + TIMER_O_TBMATCHR) = ui32Value;
|
|
}
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Gets the timer match value.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//! \param ui32Timer specifies the timer; must be one of \b TIMER_A or
|
|
//! \b TIMER_B. Only \b TIMER_A should be used when the timer is configured
|
|
//! for full-width operation.
|
|
//!
|
|
//! This function gets the match value for the specified timer.
|
|
//!
|
|
//! \note This function can be used for both full- and half-width modes of
|
|
//! 16/32-bit timers and for half-width modes of 32/64-bit timers. Use
|
|
//! TimerMatchGet64() for full-width modes of 32/64-bit timers.
|
|
//!
|
|
//! \return Returns the match value for the timer.
|
|
//
|
|
//*****************************************************************************
|
|
uint32_t
|
|
TimerMatchGet(uint32_t ui32Base, uint32_t ui32Timer)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B));
|
|
|
|
//
|
|
// Return the appropriate match value.
|
|
//
|
|
return((ui32Timer == TIMER_A) ? HWREG(ui32Base + TIMER_O_TAMATCHR) :
|
|
HWREG(ui32Base + TIMER_O_TBMATCHR));
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Sets the timer match value for a 64-bit timer.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//! \param ui64Value is the match value.
|
|
//!
|
|
//! This function configures the match value for a timer. This value is used
|
|
//! in capture count mode to determine when to interrupt the processor and in
|
|
//! PWM mode to determine the duty cycle of the output signal.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
TimerMatchSet64(uint32_t ui32Base, uint64_t ui64Value)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
|
|
//
|
|
// Set the timer match value. The upper 32-bits must be written before the
|
|
// lower 32-bits in order to adhere to the hardware interlocks on the
|
|
// 64-bit value.
|
|
//
|
|
HWREG(ui32Base + TIMER_O_TBMATCHR) = ui64Value >> 32;
|
|
HWREG(ui32Base + TIMER_O_TAMATCHR) = ui64Value & 0xffffffff;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Gets the timer match value for a 64-bit timer.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//!
|
|
//! This function gets the match value for the specified timer.
|
|
//!
|
|
//! \return Returns the match value for the timer.
|
|
//
|
|
//*****************************************************************************
|
|
uint64_t
|
|
TimerMatchGet64(uint32_t ui32Base)
|
|
{
|
|
uint32_t ui32High1, ui32High2, ui32Low;
|
|
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
|
|
//
|
|
// Read the 64-bit match value. A read of the low 32-bits is performed
|
|
// between two reads of the upper 32-bits; if the upper 32-bit values match
|
|
// then the 64-bit value is consistent. If they do not match, then the
|
|
// read is performed again until they do match (it should never execute the
|
|
// loop body more than twice).
|
|
//
|
|
do
|
|
{
|
|
ui32High1 = HWREG(ui32Base + TIMER_O_TBMATCHR);
|
|
ui32Low = HWREG(ui32Base + TIMER_O_TAMATCHR);
|
|
ui32High2 = HWREG(ui32Base + TIMER_O_TBMATCHR);
|
|
}
|
|
while(ui32High1 != ui32High2);
|
|
|
|
//
|
|
// Return the match value.
|
|
//
|
|
return(((uint64_t)ui32High1 << 32) | (uint64_t)ui32Low);
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Registers an interrupt handler for the timer interrupt.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//! \param ui32Timer specifies the timer(s); must be one of \b TIMER_A,
|
|
//! \b TIMER_B, or \b TIMER_BOTH.
|
|
//! \param pfnHandler is a pointer to the function to be called when the timer
|
|
//! interrupt occurs.
|
|
//!
|
|
//! This function registers the handler to be called when a timer interrupt
|
|
//! occurs. In addition, this function enables the global interrupt in the
|
|
//! interrupt controller; specific timer interrupts must be enabled via
|
|
//! TimerIntEnable(). It is the interrupt handler's responsibility to clear
|
|
//! the interrupt source via TimerIntClear().
|
|
//!
|
|
//! \sa IntRegister() for important information about registering interrupt
|
|
//! handlers.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
TimerIntRegister(uint32_t ui32Base, uint32_t ui32Timer,
|
|
void (*pfnHandler)(void))
|
|
{
|
|
uint32_t ui32Int;
|
|
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
|
|
(ui32Timer == TIMER_BOTH));
|
|
|
|
//
|
|
// Get the interrupt number for this timer module.
|
|
//
|
|
ui32Int = _TimerIntNumberGet(ui32Base, ui32Timer);
|
|
|
|
ASSERT(ui32Int != 0);
|
|
|
|
//
|
|
// Register the interrupt handler.
|
|
//
|
|
IntRegister(ui32Int, pfnHandler);
|
|
|
|
//
|
|
// Enable the interrupt.
|
|
//
|
|
IntEnable(ui32Int);
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Unregisters an interrupt handler for the timer interrupt.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//! \param ui32Timer specifies the timer(s); must be one of \b TIMER_A,
|
|
//! \b TIMER_B, or \b TIMER_BOTH.
|
|
//!
|
|
//! This function unregisters the handler to be called when a timer interrupt
|
|
//! occurs. This function also masks off the interrupt in the interrupt
|
|
//! controller so that the interrupt handler is no longer called.
|
|
//!
|
|
//! \sa IntRegister() for important information about registering interrupt
|
|
//! handlers.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
TimerIntUnregister(uint32_t ui32Base, uint32_t ui32Timer)
|
|
{
|
|
uint32_t ui32Int;
|
|
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
|
|
(ui32Timer == TIMER_BOTH));
|
|
|
|
//
|
|
// Get the interrupt number for this timer module.
|
|
//
|
|
ui32Int = _TimerIntNumberGet(ui32Base, ui32Timer);
|
|
|
|
//
|
|
// Disable the interrupt.
|
|
//
|
|
IntDisable(ui32Int);
|
|
|
|
//
|
|
// Unregister the interrupt handler.
|
|
//
|
|
IntUnregister(ui32Int);
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Enables individual timer interrupt sources.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//! \param ui32IntFlags is the bit mask of the interrupt sources to be enabled.
|
|
//!
|
|
//! This function enables the indicated timer interrupt sources. Only the
|
|
//! sources that are enabled can be reflected to the processor interrupt;
|
|
//! disabled sources have no effect on the processor.
|
|
//!
|
|
//! The \e ui32IntFlags parameter must be the logical OR of any combination of
|
|
//! the following:
|
|
//!
|
|
//! - \b TIMER_TIMB_DMA - Timer B uDMA complete
|
|
//! - \b TIMER_TIMA_DMA - Timer A uDMA complete
|
|
//! - \b TIMER_CAPB_EVENT - Capture B event interrupt
|
|
//! - \b TIMER_CAPB_MATCH - Capture B match interrupt
|
|
//! - \b TIMER_TIMB_TIMEOUT - Timer B timeout interrupt
|
|
//! - \b TIMER_RTC_MATCH - RTC interrupt mask
|
|
//! - \b TIMER_CAPA_EVENT - Capture A event interrupt
|
|
//! - \b TIMER_CAPA_MATCH - Capture A match interrupt
|
|
//! - \b TIMER_TIMA_TIMEOUT - Timer A timeout interrupt
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
TimerIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
|
|
//
|
|
// Enable the specified interrupts.
|
|
//
|
|
HWREG(ui32Base + TIMER_O_IMR) |= ui32IntFlags;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Disables individual timer interrupt sources.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//! \param ui32IntFlags is the bit mask of the interrupt sources to be
|
|
//! disabled.
|
|
//!
|
|
//! This function disables the indicated timer interrupt sources. Only the
|
|
//! sources that are enabled can be reflected to the processor interrupt;
|
|
//! disabled sources have no effect on the processor.
|
|
//!
|
|
//! The \e ui32IntFlags parameter has the same definition as the
|
|
//! \e ui32IntFlags parameter to TimerIntEnable().
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
TimerIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
|
|
//
|
|
// Disable the specified interrupts.
|
|
//
|
|
HWREG(ui32Base + TIMER_O_IMR) &= ~(ui32IntFlags);
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Gets the current interrupt status.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//! \param bMasked is false if the raw interrupt status is required and true if
|
|
//! the masked interrupt status is required.
|
|
//!
|
|
//! This function returns the interrupt status for the timer module. Either
|
|
//! the raw interrupt status or the status of interrupts that are allowed to
|
|
//! reflect to the processor can be returned.
|
|
//!
|
|
//! \return The current interrupt status, enumerated as a bit field of
|
|
//! values described in TimerIntEnable().
|
|
//
|
|
//*****************************************************************************
|
|
uint32_t
|
|
TimerIntStatus(uint32_t ui32Base, bool bMasked)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
|
|
//
|
|
// Return either the interrupt status or the raw interrupt status as
|
|
// requested.
|
|
//
|
|
return(bMasked ? HWREG(ui32Base + TIMER_O_MIS) :
|
|
HWREG(ui32Base + TIMER_O_RIS));
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Clears timer interrupt sources.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//! \param ui32IntFlags is a bit mask of the interrupt sources to be cleared.
|
|
//!
|
|
//! The specified timer interrupt sources are cleared, so that they no longer
|
|
//! assert. This function must be called in the interrupt handler to keep the
|
|
//! interrupt from being triggered again immediately upon exit.
|
|
//!
|
|
//! The \e ui32IntFlags parameter has the same definition as the
|
|
//! \e ui32IntFlags parameter to TimerIntEnable().
|
|
//!
|
|
//! \note Because there is a write buffer in the Cortex-M processor, it may
|
|
//! take several clock cycles before the interrupt source is actually cleared.
|
|
//! Therefore, it is recommended that the interrupt source be cleared early in
|
|
//! the interrupt handler (as opposed to the very last action) to avoid
|
|
//! returning from the interrupt handler before the interrupt source is
|
|
//! actually cleared. Failure to do so may result in the interrupt handler
|
|
//! being immediately reentered (because the interrupt controller still sees
|
|
//! the interrupt source asserted).
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
TimerIntClear(uint32_t ui32Base, uint32_t ui32IntFlags)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
|
|
//
|
|
// Clear the requested interrupt sources.
|
|
//
|
|
HWREG(ui32Base + TIMER_O_ICR) = ui32IntFlags;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Synchronizes the counters in a set of timers.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module. This parameter
|
|
//! must be the base address of Timer0 (in other words, \b TIMER0_BASE).
|
|
//! \param ui32Timers is the set of timers to synchronize.
|
|
//!
|
|
//! This function synchronizes the counters in a specified set of timers.
|
|
//! When a timer is running in half-width mode, each half can be included or
|
|
//! excluded in the synchronization event. When a timer is running in
|
|
//! full-width mode, only the A timer can be synchronized (specifying the B
|
|
//! timer has no effect).
|
|
//!
|
|
//! The \e ui32Timers parameter is the logical OR of any of the following
|
|
//! defines:
|
|
//!
|
|
//! - \b TIMER_0A_SYNC
|
|
//! - \b TIMER_0B_SYNC
|
|
//! - \b TIMER_1A_SYNC
|
|
//! - \b TIMER_1B_SYNC
|
|
//! - \b TIMER_2A_SYNC
|
|
//! - \b TIMER_2B_SYNC
|
|
//! - \b TIMER_3A_SYNC
|
|
//! - \b TIMER_3B_SYNC
|
|
//! - \b TIMER_4A_SYNC
|
|
//! - \b TIMER_4B_SYNC
|
|
//! - \b TIMER_5A_SYNC
|
|
//! - \b TIMER_5B_SYNC
|
|
//! - \b WTIMER_0A_SYNC
|
|
//! - \b WTIMER_0B_SYNC
|
|
//! - \b WTIMER_1A_SYNC
|
|
//! - \b WTIMER_1B_SYNC
|
|
//! - \b WTIMER_2A_SYNC
|
|
//! - \b WTIMER_2B_SYNC
|
|
//! - \b WTIMER_3A_SYNC
|
|
//! - \b WTIMER_3B_SYNC
|
|
//! - \b WTIMER_4A_SYNC
|
|
//! - \b WTIMER_4B_SYNC
|
|
//! - \b WTIMER_5A_SYNC
|
|
//! - \b WTIMER_5B_SYNC
|
|
//!
|
|
//! \note This functionality is not available on all parts.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
TimerSynchronize(uint32_t ui32Base, uint32_t ui32Timers)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(ui32Base == TIMER0_BASE);
|
|
|
|
//
|
|
// Synchronize the specified timers.
|
|
//
|
|
HWREG(ui32Base + TIMER_O_SYNC) = ui32Timers;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Enables the events that can cause an ADC trigger event.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//! \param ui32ADCEvent is a bit mask of the events that can cause an ADC
|
|
//! trigger event.
|
|
//!
|
|
//! This function enables the timer events that can cause an ADC trigger event.
|
|
//! The ADC trigger events are specified in the \e ui32ADCEvent parameter by
|
|
//! passing in the logical OR of any of the following values:
|
|
//!
|
|
//! - \b TIMER_ADC_MODEMATCH_B - Enables the mode match ADC trigger for timer
|
|
//! B.
|
|
//! - \b TIMER_ADC_CAPEVENT_B - Enables the capture event ADC trigger for
|
|
//! timer B.
|
|
//! - \b TIMER_ADC_CAPMATCH_B - Enables the capture match ADC trigger for
|
|
//! timer B.
|
|
//! - \b TIMER_ADC_TIMEOUT_B - Enables the timeout ADC trigger for timer B.
|
|
//! - \b TIMER_ADC_MODEMATCH_A - Enables the mode match ADC trigger for timer
|
|
//! A.
|
|
//! - \b TIMER_ADC_RTC_A - Enables the RTC ADC trigger for timer A.
|
|
//! - \b TIMER_ADC_CAPEVENT_A - Enables the capture event ADC trigger for
|
|
//! timer A.
|
|
//! - \b TIMER_ADC_CAPMATCH_A - Enables the capture match ADC trigger for
|
|
//! timer A.
|
|
//! - \b TIMER_ADC_TIMEOUT_A - Enables the timeout ADC trigger for timer A.
|
|
//!
|
|
//! \note The ability to specify ADC event triggers varies with the Tiva
|
|
//! part in use. Please consult the data sheet for the part you are
|
|
//! using to determine whether this support is available.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
TimerADCEventSet(uint32_t ui32Base, uint32_t ui32ADCEvent)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
|
|
//
|
|
// Set the ADC triggers.
|
|
//
|
|
HWREG(ui32Base + TIMER_O_ADCEV) = ui32ADCEvent;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Returns the events that can cause an ADC trigger event.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//!
|
|
//! This function returns the timer events that can cause an ADC trigger event.
|
|
//! The ADC trigger events are the logical OR of any of the following values:
|
|
//!
|
|
//! - \b TIMER_ADC_MODEMATCH_B - The mode match ADC trigger for timer B is
|
|
//! enabled.
|
|
//! - \b TIMER_ADC_CAPEVENT_B - The capture event ADC trigger for timer B is
|
|
//! enabled.
|
|
//! - \b TIMER_ADC_CAPMATCH_B - The capture match ADC trigger for timer B is
|
|
//! enabled.
|
|
//! - \b TIMER_ADC_TIMEOUT_B - The timeout ADC trigger for timer B is enabled.
|
|
//! - \b TIMER_ADC_MODEMATCH_A - The mode match ADC trigger for timer A is
|
|
//! enabled.
|
|
//! - \b TIMER_ADC_RTC_A - The RTC ADC trigger for timer A is enabled.
|
|
//! - \b TIMER_ADC_CAPEVENT_A - The capture event ADC trigger for timer A is
|
|
//! enabled.
|
|
//! - \b TIMER_ADC_CAPMATCH_A - The capture match ADC trigger for timer A is
|
|
//! enabled.
|
|
//! - \b TIMER_ADC_TIMEOUT_A - The timeout ADC trigger for timer A is enabled.
|
|
//!
|
|
//! \note The ability to specify ADC event triggers varies with the Tiva
|
|
//! part in use. Please consult the data sheet for the part you are
|
|
//! using to determine whether this support is available.
|
|
//!
|
|
//! \return The timer events that trigger the ADC.
|
|
//
|
|
//*****************************************************************************
|
|
uint32_t
|
|
TimerADCEventGet(uint32_t ui32Base)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
|
|
//
|
|
// Return the current ADC triggers.
|
|
//
|
|
return(HWREG(ui32Base + TIMER_O_ADCEV));
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Enables the events that can trigger a uDMA request.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//! \param ui32DMAEvent is a bit mask of the events that can trigger uDMA.
|
|
//!
|
|
//! This function enables the timer events that can trigger the start of a uDMA
|
|
//! sequence. The uDMA trigger events are specified in the \e ui32DMAEvent
|
|
//! parameter by passing in the logical OR of the following values:
|
|
//!
|
|
//! - \b TIMER_DMA_MODEMATCH_B - The mode match uDMA trigger for timer B is
|
|
//! enabled.
|
|
//! - \b TIMER_DMA_CAPEVENT_B - The capture event uDMA trigger for timer B is
|
|
//! enabled.
|
|
//! - \b TIMER_DMA_CAPMATCH_B - The capture match uDMA trigger for timer B is
|
|
//! enabled.
|
|
//! - \b TIMER_DMA_TIMEOUT_B - The timeout uDMA trigger for timer B is enabled.
|
|
//! - \b TIMER_DMA_MODEMATCH_A - The mode match uDMA trigger for timer A is
|
|
//! enabled.
|
|
//! - \b TIMER_DMA_RTC_A - The RTC uDMA trigger for timer A is enabled.
|
|
//! - \b TIMER_DMA_CAPEVENT_A - The capture event uDMA trigger for timer A is
|
|
//! enabled.
|
|
//! - \b TIMER_DMA_CAPMATCH_A - The capture match uDMA trigger for timer A is
|
|
//! enabled.
|
|
//! - \b TIMER_DMA_TIMEOUT_A - The timeout uDMA trigger for timer A is enabled.
|
|
//!
|
|
//! \note The ability to specify uDMA event triggers varies with the Tiva
|
|
//! part in use. Please consult the data sheet for the part you are
|
|
//! using to determine whether this support is available.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
TimerDMAEventSet(uint32_t ui32Base, uint32_t ui32DMAEvent)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
|
|
//
|
|
// Set the uDMA triggers.
|
|
//
|
|
HWREG(ui32Base + TIMER_O_DMAEV) = ui32DMAEvent;
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Returns the events that can trigger a uDMA request.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//!
|
|
//! This function returns the timer events that can trigger the start of a uDMA
|
|
//! sequence. The uDMA trigger events are the logical OR of the following
|
|
//! values:
|
|
//!
|
|
//! - \b TIMER_DMA_MODEMATCH_B - Enables the mode match uDMA trigger for timer
|
|
//! B.
|
|
//! - \b TIMER_DMA_CAPEVENT_B - Enables the capture event uDMA trigger for
|
|
//! timer B.
|
|
//! - \b TIMER_DMA_CAPMATCH_B - Enables the capture match uDMA trigger for
|
|
//! timer B.
|
|
//! - \b TIMER_DMA_TIMEOUT_B - Enables the timeout uDMA trigger for timer B.
|
|
//! - \b TIMER_DMA_MODEMATCH_A - Enables the mode match uDMA trigger for timer
|
|
//! A.
|
|
//! - \b TIMER_DMA_RTC_A - Enables the RTC uDMA trigger for timer A.
|
|
//! - \b TIMER_DMA_CAPEVENT_A - Enables the capture event uDMA trigger for
|
|
//! timer A.
|
|
//! - \b TIMER_DMA_CAPMATCH_A - Enables the capture match uDMA trigger for
|
|
//! timer A.
|
|
//! - \b TIMER_DMA_TIMEOUT_A - Enables the timeout uDMA trigger for timer A.
|
|
//!
|
|
//! \note The ability to specify uDMA event triggers varies with the Tiva
|
|
//! part in use. Please consult the data sheet for the part you are
|
|
//! using to determine whether this support is available.
|
|
//!
|
|
//! \return The timer events that trigger the uDMA.
|
|
//
|
|
//*****************************************************************************
|
|
uint32_t
|
|
TimerDMAEventGet(uint32_t ui32Base)
|
|
{
|
|
//
|
|
// Check the arguments.
|
|
//
|
|
ASSERT(_TimerBaseValid(ui32Base));
|
|
|
|
//
|
|
// Return the current uDMA triggers.
|
|
//
|
|
return(HWREG(ui32Base + TIMER_O_DMAEV));
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! This function configures the update of timer load and match settings.
|
|
//!
|
|
//! \param ui32Base is the base address of the timer module.
|
|
//! \param ui32Timer specifies the timer(s); must be one of \b TIMER_A,
|
|
//! \b TIMER_B, or \b TIMER_BOTH.
|
|
//! \param ui32Config is a combination of the updates methods for the timers
|
|
//! specified in the \e ui32Timer parameter.
|
|
//!
|
|
//! This function configures how the timer updates the timer load and match
|
|
//! values for the timers. The \e ui32Timer values can be \b TIMER_A,
|
|
//! \b TIMER_B, or \b TIMER_BOTH to apply the settings in \e ui32Config to
|
|
//! either timer or both timers. If the timer is not split then the \b TIMER_A
|
|
//! should be used. The \e ui32Config values affects when the TimerLoadSet()
|
|
//! and TimerLoadSet64() values take effect.
|
|
//!
|
|
//! - \b TIMER_UP_LOAD_IMMEDIATE is the default mode that causes the
|
|
//! TimerLoadSet() or TimerLoadSet64() to update the timer counter immediately.
|
|
//! - \b TIMER_UP_LOAD_TIMEOUT causes the TimerLoadSet() or TimerLoadSet64() to
|
|
//! update the timer when it counts down to zero.
|
|
//!
|
|
//! Similarly the \e ui32Config value affects when the TimerMatchSet() and
|
|
//! TimerMatchSet64() values take effect.
|
|
//!
|
|
//! - \b TIMER_UP_MATCH_IMMEDIATE is the default mode that causes the
|
|
//! TimerMatchSet() or TimerMatchSet64() to update the timer match value
|
|
//! immediately.
|
|
//! - \b TIMER_UP_MATCH_TIMEOUT causes the TimerMatchSet() or TimerMatchSet64()
|
|
//! to update the timer match value when it counts down to zero.
|
|
//!
|
|
//! \note These settings have no effect if the timer is not in count down mode
|
|
//! and are mostly useful when operating in PWM mode to allow for synchronous
|
|
//! update of timer match and load values.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
void
|
|
TimerUpdateMode(uint32_t ui32Base, uint32_t ui32Timer, uint32_t ui32Config)
|
|
{
|
|
uint32_t ui32Value;
|
|
|
|
if((ui32Timer & TIMER_A) == TIMER_A)
|
|
{
|
|
ui32Value = HWREG(ui32Base + TIMER_O_TAMR) & ~(0x00000500);
|
|
ui32Value |= ui32Config;
|
|
HWREG(ui32Base + TIMER_O_TAMR) = ui32Value;
|
|
}
|
|
|
|
if((ui32Timer & TIMER_B) == TIMER_B)
|
|
{
|
|
ui32Value = HWREG(ui32Base + TIMER_O_TBMR) & ~(0x00000500);
|
|
ui32Value |= ui32Config;
|
|
HWREG(ui32Base + TIMER_O_TBMR) = ui32Value;
|
|
}
|
|
}
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// Close the Doxygen group.
|
|
//! @}
|
|
//
|
|
//*****************************************************************************
|