29270 lines
1.6 MiB
29270 lines
1.6 MiB
/************************************************************************/
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/* (C) Fujitsu Semiconductor Europe GmbH (FSEU) */
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/* */
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/* The following software deliverable is intended for and must only be */
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/* used for reference and in an evaluation laboratory environment. */
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/* It is provided on an as-is basis without charge and is subject to */
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/* alterations. */
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/* It is the user's obligation to fully test the software in its */
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/* environment and to ensure proper functionality, qualification and */
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/* compliance with component specifications. */
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/* */
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/* In the event the software deliverable includes the use of open */
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/* source components, the provisions of the governing open source */
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/* license agreement shall apply with respect to such software */
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/* deliverable. */
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/* FSEU does not warrant that the deliverables do not infringe any */
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/* third party intellectual property right (IPR). In the event that */
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/* the deliverables infringe a third party IPR it is the sole */
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/* responsibility of the customer to obtain necessary licenses to */
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/* continue the usage of the deliverable. */
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/* */
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/* To the maximum extent permitted by applicable law FSEU disclaims all */
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/* warranties, whether express or implied, in particular, but not */
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/* limited to, warranties of merchantability and fitness for a */
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/* particular purpose for which the deliverable is not designated. */
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/* */
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/* To the maximum extent permitted by applicable law, FSEU's liability */
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/* is restricted to intentional misconduct and gross negligence. */
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/* FSEU is not liable for consequential damages. */
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/* */
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/* (V1.5) */
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/************************************************************************/
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/* */
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/* Header File for Device MB9BF618S */
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/* Version V1.00 */
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/* Date 2011-08-04 */
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/* */
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/************************************************************************/
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#ifndef _MB9BF618S_H_
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#define _MB9BF618S_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/******************************************************************************
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* Configuration of the Cortex-M3 Processor and Core Peripherals
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******************************************************************************/
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#define __MPU_PRESENT 1 /* FM3 provide an MPU */
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#define __NVIC_PRIO_BITS 4 /* FM3 uses 4 Bits for the Priority Levels */
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#define __Vendor_SysTickConfig 0 /* Set to 1 if different SysTick Config is used */
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/******************************************************************************
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* Interrupt Number Definition
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******************************************************************************/
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typedef enum IRQn
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{
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NMI_IRQn = -14, /* 2 Non Maskable */
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HardFault_IRQn = -13, /* 3 Hard Fault */
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MemManage_IRQn = -12, /* 4 Memory Management */
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BusFault_IRQn = -11, /* 5 Bus Fault */
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UsageFault_IRQn = -10, /* 6 Usage Fault */
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SVC_IRQn = -5, /* 11 SV Call */
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DebugMonitor_IRQn = -4, /* 12 Debug Monitor */
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PendSV_IRQn = -2, /* 14 Pend SV */
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SysTick_IRQn = -1, /* 15 System Tick */
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CSV_IRQn = 0, /* Clock Super Visor */
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SWDT_IRQn = 1, /* Software Watchdog Timer */
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LVD_IRQn = 2, /* Low Voltage Detector */
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WFG_IRQn = 3, /* Wave Form Generator */
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EXINT0_7_IRQn = 4, /* External Interrupt Request ch.0 to ch.7 */
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EXINT8_31_IRQn = 5, /* External Interrupt Request ch.8 to ch.31 */
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DTIM_QDU_IRQn = 6, /* Dual Timer / Quad Decoder */
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MFS0RX_IRQn = 7, /* MultiFunction Serial Reception ch.0 */
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MFS0TX_IRQn = 8, /* MultiFunction Serial Transmission ch.0 */
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MFS1RX_IRQn = 9, /* MultiFunction Serial Reception ch.1 */
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MFS1TX_IRQn = 10, /* MultiFunction Serial Transmission ch.1 */
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MFS2RX_IRQn = 11, /* MultiFunction Serial Reception ch.2 */
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MFS2TX_IRQn = 12, /* MultiFunction Serial Transmission ch.2 */
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MFS3RX_IRQn = 13, /* MultiFunction Serial Reception ch.3 */
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MFS3TX_IRQn = 14, /* MultiFunction Serial Transmission ch.3 */
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MFS4RX_IRQn = 15, /* MultiFunction Serial Reception ch.4 */
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MFS4TX_IRQn = 16, /* MultiFunction Serial Transmission ch.4 */
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MFS5RX_IRQn = 17, /* MultiFunction Serial Reception ch.5 */
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MFS5TX_IRQn = 18, /* MultiFunction Serial Transmission ch.5 */
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MFS6RX_IRQn = 19, /* MultiFunction Serial Reception ch.6 */
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MFS6TX_IRQn = 20, /* MultiFunction Serial Transmission ch.6 */
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MFS7RX_IRQn = 21, /* MultiFunction Serial Reception ch.7 */
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MFS7TX_IRQn = 22, /* MultiFunction Serial Transmission ch.7 */
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PPG_IRQn = 23, /* PPG */
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OSC_PLL_WC_IRQn = 24, /* OSC / PLL / Watch Counter */
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ADC0_IRQn = 25, /* ADC0 */
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ADC1_IRQn = 26, /* ADC1 */
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ADC2_IRQn = 27, /* ADC2 */
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FRTIM_IRQn = 28, /* Free-run Timer */
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INCAP_IRQn = 29, /* Input Capture */
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OUTCOMP_IRQn = 30, /* Output Compare */
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BTIM0_7_IRQn = 31, /* Base Timer ch.0 to ch.7 */
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ETHER_MAC0_IRQn = 32, /* Ethernet MAC ch.0 */
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ETHER_MAC1_IRQn = 33, /* Ethernet MAC ch.1 */
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USB0F_IRQn = 34, /* USB Function ch.0 */
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USB0F_USB0H_IRQn = 35, /* USB Function ch.0 / USB Host ch.0 */
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USB1F_IRQn = 36, /* USB Function ch.1 */
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USB1F_USB1H_IRQn = 37, /* USB Function ch.1 / USB Host ch.1 */
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DMAC0_IRQn = 38, /* DMAC ch.0 */
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DMAC1_IRQn = 39, /* DMAC ch.1 */
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DMAC2_IRQn = 40, /* DMAC ch.2 */
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DMAC3_IRQn = 41, /* DMAC ch.3 */
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DMAC4_IRQn = 42, /* DMAC ch.4 */
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DMAC5_IRQn = 43, /* DMAC ch.5 */
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DMAC6_IRQn = 44, /* DMAC ch.6 */
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DMAC7_IRQn = 45, /* DMAC ch.7 */
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BTIM8_15_IRQn = 46 /* Base Timer ch.8 to ch.15 */
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/* Reserved = 47 */
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} IRQn_Type;
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#include <core_cm3.h>
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#include "system_mb9bf61x.h"
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#include <stdint.h>
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#define SUCCESS 0
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#define ERROR -1
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#ifndef NULL
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#define NULL 0
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#endif
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/******************************************************************************/
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/* Device Specific Peripheral Registers structures */
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/******************************************************************************/
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#if defined ( __CC_ARM )
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#pragma anon_unions
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#endif
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/******************************************************************************
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* Peripheral register bit fields
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******************************************************************************/
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/******************************************************************************
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* Flash_IF_MODULE
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******************************************************************************/
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/* Flash_IF_MODULE register bit fields */
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typedef struct stc_flash_if_faszr_field
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{
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__IO uint32_t ASZ0 : 1;
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__IO uint32_t ASZ1 : 1;
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} stc_flash_if_faszr_field_t;
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typedef struct stc_flash_if_frwtr_field
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{
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__IO uint32_t RWT0 : 1;
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__IO uint32_t RWT1 : 1;
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} stc_flash_if_frwtr_field_t;
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typedef struct stc_flash_if_fstr_field
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{
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__IO uint32_t RDY : 1;
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__IO uint32_t HNG : 1;
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__IO uint32_t EER : 1;
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} stc_flash_if_fstr_field_t;
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typedef struct stc_flash_if_fsyndn_field
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{
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__IO uint32_t SD0 : 1;
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__IO uint32_t SD1 : 1;
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__IO uint32_t SD2 : 1;
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} stc_flash_if_fsyndn_field_t;
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typedef struct stc_flash_if_crtrmm_field
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{
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__IO uint32_t TRMM0 : 1;
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__IO uint32_t TRMM1 : 1;
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__IO uint32_t TRMM2 : 1;
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__IO uint32_t TRMM3 : 1;
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__IO uint32_t TRMM4 : 1;
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__IO uint32_t TRMM5 : 1;
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__IO uint32_t TRMM6 : 1;
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__IO uint32_t TRMM7 : 1;
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__IO uint32_t TRMM8 : 1;
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__IO uint32_t TRMM9 : 1;
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} stc_flash_if_crtrmm_field_t;
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/******************************************************************************
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* Clock_Reset_MODULE
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******************************************************************************/
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/* Clock_Reset_MODULE register bit fields */
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typedef struct stc_crg_scm_ctl_field
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{
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uint8_t RESERVED1 : 1;
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__IO uint8_t MOSCE : 1;
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uint8_t RESERVED2 : 1;
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__IO uint8_t SOSCE : 1;
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__IO uint8_t PLLE : 1;
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__IO uint8_t RCS0 : 1;
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__IO uint8_t RCS1 : 1;
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__IO uint8_t RCS2 : 1;
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} stc_crg_scm_ctl_field_t;
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typedef struct stc_crg_scm_str_field
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{
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uint8_t RESERVED1 : 1;
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__IO uint8_t MORDY : 1;
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uint8_t RESERVED2 : 1;
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__IO uint8_t SORDY : 1;
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__IO uint8_t PLRDY : 1;
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__IO uint8_t RCM0 : 1;
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__IO uint8_t RCM1 : 1;
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__IO uint8_t RCM2 : 1;
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} stc_crg_scm_str_field_t;
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typedef struct stc_crg_rst_str_field
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{
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__IO uint16_t PONR : 1;
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__IO uint16_t INITX : 1;
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uint16_t RESERVED1 : 2;
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__IO uint16_t SWDT : 1;
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__IO uint16_t HWDT : 1;
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__IO uint16_t CSVR : 1;
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__IO uint16_t FCSR : 1;
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__IO uint16_t SRST : 1;
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} stc_crg_rst_str_field_t;
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typedef struct stc_crg_bsc_psr_field
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{
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__IO uint8_t BSR0 : 1;
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__IO uint8_t BSR1 : 1;
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__IO uint8_t BSR2 : 1;
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} stc_crg_bsc_psr_field_t;
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typedef struct stc_crg_apbc0_psr_field
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{
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__IO uint8_t APBC00 : 1;
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__IO uint8_t APBC01 : 1;
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} stc_crg_apbc0_psr_field_t;
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typedef struct stc_crg_apbc1_psr_field
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{
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__IO uint8_t APBC10 : 1;
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__IO uint8_t APBC11 : 1;
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uint8_t RESERVED1 : 2;
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__IO uint8_t APBC1RST : 1;
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uint8_t RESERVED2 : 2;
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__IO uint8_t APBC1EN : 1;
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} stc_crg_apbc1_psr_field_t;
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typedef struct stc_crg_apbc2_psr_field
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{
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__IO uint8_t APBC20 : 1;
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__IO uint8_t APBC21 : 1;
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uint8_t RESERVED1 : 2;
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__IO uint8_t APBC2RST : 1;
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uint8_t RESERVED2 : 2;
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__IO uint8_t APBC2EN : 1;
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} stc_crg_apbc2_psr_field_t;
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typedef struct stc_crg_swc_psr_field
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{
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__IO uint8_t SWDS0 : 1;
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__IO uint8_t SWDS1 : 1;
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uint8_t RESERVED1 : 5;
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__IO uint8_t TESTB : 1;
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} stc_crg_swc_psr_field_t;
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typedef struct stc_crg_ttc_psr_field
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{
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__IO uint8_t TTC0 : 1;
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__IO uint8_t TTC1 : 1;
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} stc_crg_ttc_psr_field_t;
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typedef struct stc_crg_csw_tmr_field
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{
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__IO uint8_t MOWT0 : 1;
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__IO uint8_t MOWT1 : 1;
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__IO uint8_t MOWT2 : 1;
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__IO uint8_t MOWT3 : 1;
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__IO uint8_t SOWT0 : 1;
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__IO uint8_t SOWT1 : 1;
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__IO uint8_t SOWT2 : 1;
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} stc_crg_csw_tmr_field_t;
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typedef struct stc_crg_psw_tmr_field
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{
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__IO uint8_t POWT0 : 1;
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__IO uint8_t POWT1 : 1;
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__IO uint8_t POWT2 : 1;
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uint8_t RESERVED1 : 1;
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__IO uint8_t PINC : 1;
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} stc_crg_psw_tmr_field_t;
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typedef struct stc_crg_pll_ctl1_field
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{
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__IO uint8_t PLLM0 : 1;
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__IO uint8_t PLLM1 : 1;
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__IO uint8_t PLLM2 : 1;
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__IO uint8_t PLLM3 : 1;
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__IO uint8_t PLLK0 : 1;
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__IO uint8_t PLLK1 : 1;
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__IO uint8_t PLLK2 : 1;
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__IO uint8_t PLLK3 : 1;
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} stc_crg_pll_ctl1_field_t;
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typedef struct stc_crg_pll_ctl2_field
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{
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__IO uint8_t PLLN0 : 1;
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__IO uint8_t PLLN1 : 1;
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__IO uint8_t PLLN2 : 1;
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__IO uint8_t PLLN3 : 1;
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__IO uint8_t PLLN4 : 1;
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__IO uint8_t PLLN5 : 1;
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} stc_crg_pll_ctl2_field_t;
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typedef struct stc_crg_csv_ctl_field
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{
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__IO uint16_t MCSVE : 1;
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__IO uint16_t SCSVE : 1;
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uint16_t RESERVED1 : 6;
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__IO uint16_t FCSDE : 1;
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__IO uint16_t FCSRE : 1;
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uint16_t RESERVED2 : 2;
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__IO uint16_t FCD0 : 1;
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__IO uint16_t FCD1 : 1;
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__IO uint16_t FCD2 : 1;
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} stc_crg_csv_ctl_field_t;
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typedef struct stc_crg_csv_str_field
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{
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__IO uint8_t MCMF : 1;
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__IO uint8_t SCMF : 1;
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} stc_crg_csv_str_field_t;
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typedef struct stc_crg_dbwdt_ctl_field
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{
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uint8_t RESERVED1 : 5;
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__IO uint8_t DPSWBE : 1;
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uint8_t RESERVED2 : 1;
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__IO uint8_t DPHWBE : 1;
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} stc_crg_dbwdt_ctl_field_t;
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typedef struct stc_crg_int_enr_field
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{
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__IO uint8_t MCSE : 1;
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__IO uint8_t SCSE : 1;
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__IO uint8_t PCSE : 1;
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uint8_t RESERVED1 : 2;
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__IO uint8_t FCSE : 1;
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} stc_crg_int_enr_field_t;
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typedef struct stc_crg_int_str_field
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{
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__IO uint8_t MCSI : 1;
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__IO uint8_t SCSI : 1;
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__IO uint8_t PCSI : 1;
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uint8_t RESERVED1 : 2;
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__IO uint8_t FCSI : 1;
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} stc_crg_int_str_field_t;
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typedef struct stc_crg_int_clr_field
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{
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__IO uint8_t MCSC : 1;
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__IO uint8_t SCSC : 1;
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__IO uint8_t PCSC : 1;
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uint8_t RESERVED1 : 2;
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__IO uint8_t FCSC : 1;
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} stc_crg_int_clr_field_t;
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/******************************************************************************
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* HWWDT_MODULE
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******************************************************************************/
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/* HWWDT_MODULE register bit fields */
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typedef struct stc_hwwdt_wdg_ctl_field
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{
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__IO uint8_t INTEN : 1;
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__IO uint8_t RESEN : 1;
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} stc_hwwdt_wdg_ctl_field_t;
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typedef struct stc_hwwdt_wdg_ris_field
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{
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__IO uint8_t RIS : 1;
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} stc_hwwdt_wdg_ris_field_t;
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/******************************************************************************
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* SWWDT_MODULE
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******************************************************************************/
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/* SWWDT_MODULE register bit fields */
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typedef struct stc_swwdt_wdogcontrol_field
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{
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__IO uint8_t INTEN : 1;
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__IO uint8_t RESEN : 1;
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} stc_swwdt_wdogcontrol_field_t;
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typedef struct stc_swwdt_wdogris_field
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{
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__IO uint8_t RIS : 1;
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} stc_swwdt_wdogris_field_t;
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/******************************************************************************
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* DTIM_MODULE
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******************************************************************************/
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/* DTIM_MODULE register bit fields */
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typedef struct stc_dtim_timer1control_field
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{
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__IO uint32_t ONESHOT : 1;
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__IO uint32_t TIMERSIZE : 1;
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__IO uint32_t TIMERPRE0 : 1;
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__IO uint32_t TIMERPRE1 : 1;
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uint32_t RESERVED1 : 1;
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__IO uint32_t INTENABLE : 1;
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__IO uint32_t TIMERMODE : 1;
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__IO uint32_t TIMEREN : 1;
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} stc_dtim_timer1control_field_t;
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typedef struct stc_dtim_timer1ris_field
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{
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__IO uint32_t TIMER1RIS : 1;
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} stc_dtim_timer1ris_field_t;
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typedef struct stc_dtim_timer1mis_field
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{
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__IO uint32_t TIMER1MIS : 1;
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} stc_dtim_timer1mis_field_t;
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typedef struct stc_dtim_timer2control_field
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{
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__IO uint32_t ONESHOT : 1;
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__IO uint32_t TIMERSIZE : 1;
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__IO uint32_t TIMERPRE0 : 1;
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__IO uint32_t TIMERPRE1 : 1;
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uint32_t RESERVED1 : 1;
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__IO uint32_t INTENABLE : 1;
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__IO uint32_t TIMERMODE : 1;
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__IO uint32_t TIMEREN : 1;
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} stc_dtim_timer2control_field_t;
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typedef struct stc_dtim_timer2ris_field
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{
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__IO uint32_t TIMER2RIS : 1;
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} stc_dtim_timer2ris_field_t;
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typedef struct stc_dtim_timer2mis_field
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{
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__IO uint32_t TIMER2MIS : 1;
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} stc_dtim_timer2mis_field_t;
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/******************************************************************************
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* MFT_FRT_MODULE
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******************************************************************************/
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/* MFT_FRT_MODULE register bit fields */
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typedef struct stc_mft_frt_tcsa0_field
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{
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__IO uint16_t CLK0 : 1;
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__IO uint16_t CLK1 : 1;
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|
__IO uint16_t CLK2 : 1;
|
|
__IO uint16_t CLK3 : 1;
|
|
__IO uint16_t SCLR : 1;
|
|
__IO uint16_t MODE : 1;
|
|
__IO uint16_t STOP : 1;
|
|
__IO uint16_t BFE : 1;
|
|
__IO uint16_t ICRE : 1;
|
|
__IO uint16_t ICLR : 1;
|
|
uint16_t RESERVED1 : 3;
|
|
__IO uint16_t IRQZE : 1;
|
|
__IO uint16_t IRQZF : 1;
|
|
__IO uint16_t ECKE : 1;
|
|
} stc_mft_frt_tcsa0_field_t;
|
|
|
|
typedef struct stc_mft_frt_tcsb0_field
|
|
{
|
|
__IO uint16_t AD0E : 1;
|
|
__IO uint16_t AD1E : 1;
|
|
__IO uint16_t AD2E : 1;
|
|
} stc_mft_frt_tcsb0_field_t;
|
|
|
|
typedef struct stc_mft_frt_tcsa1_field
|
|
{
|
|
__IO uint16_t CLK0 : 1;
|
|
__IO uint16_t CLK1 : 1;
|
|
__IO uint16_t CLK2 : 1;
|
|
__IO uint16_t CLK3 : 1;
|
|
__IO uint16_t SCLR : 1;
|
|
__IO uint16_t MODE : 1;
|
|
__IO uint16_t STOP : 1;
|
|
__IO uint16_t BFE : 1;
|
|
__IO uint16_t ICRE : 1;
|
|
__IO uint16_t ICLR : 1;
|
|
uint16_t RESERVED1 : 3;
|
|
__IO uint16_t IRQZE : 1;
|
|
__IO uint16_t IRQZF : 1;
|
|
__IO uint16_t ECKE : 1;
|
|
} stc_mft_frt_tcsa1_field_t;
|
|
|
|
typedef struct stc_mft_frt_tcsb1_field
|
|
{
|
|
__IO uint16_t AD0E : 1;
|
|
__IO uint16_t AD1E : 1;
|
|
__IO uint16_t AD2E : 1;
|
|
} stc_mft_frt_tcsb1_field_t;
|
|
|
|
typedef struct stc_mft_frt_tcsa2_field
|
|
{
|
|
__IO uint16_t CLK0 : 1;
|
|
__IO uint16_t CLK1 : 1;
|
|
__IO uint16_t CLK2 : 1;
|
|
__IO uint16_t CLK3 : 1;
|
|
__IO uint16_t SCLR : 1;
|
|
__IO uint16_t MODE : 1;
|
|
__IO uint16_t STOP : 1;
|
|
__IO uint16_t BFE : 1;
|
|
__IO uint16_t ICRE : 1;
|
|
__IO uint16_t ICLR : 1;
|
|
uint16_t RESERVED1 : 3;
|
|
__IO uint16_t IRQZE : 1;
|
|
__IO uint16_t IRQZF : 1;
|
|
__IO uint16_t ECKE : 1;
|
|
} stc_mft_frt_tcsa2_field_t;
|
|
|
|
typedef struct stc_mft_frt_tcsb2_field
|
|
{
|
|
__IO uint16_t AD0E : 1;
|
|
__IO uint16_t AD1E : 1;
|
|
__IO uint16_t AD2E : 1;
|
|
} stc_mft_frt_tcsb2_field_t;
|
|
|
|
/******************************************************************************
|
|
* MFT_OCU_MODULE
|
|
******************************************************************************/
|
|
/* MFT_OCU_MODULE register bit fields */
|
|
typedef struct stc_mft_ocu_ocsa10_field
|
|
{
|
|
__IO uint8_t CST0 : 1;
|
|
__IO uint8_t CST1 : 1;
|
|
__IO uint8_t BDIS0 : 1;
|
|
__IO uint8_t BDIS1 : 1;
|
|
__IO uint8_t IOE0 : 1;
|
|
__IO uint8_t IOE1 : 1;
|
|
__IO uint8_t IOP0 : 1;
|
|
__IO uint8_t IOP1 : 1;
|
|
} stc_mft_ocu_ocsa10_field_t;
|
|
|
|
typedef struct stc_mft_ocu_ocsb10_field
|
|
{
|
|
__IO uint8_t OTD0 : 1;
|
|
__IO uint8_t OTD1 : 1;
|
|
uint8_t RESERVED1 : 2;
|
|
__IO uint8_t CMOD : 1;
|
|
__IO uint8_t BTS0 : 1;
|
|
__IO uint8_t BTS1 : 1;
|
|
} stc_mft_ocu_ocsb10_field_t;
|
|
|
|
typedef struct stc_mft_ocu_ocsa32_field
|
|
{
|
|
__IO uint8_t CST2 : 1;
|
|
__IO uint8_t CST3 : 1;
|
|
__IO uint8_t BDIS2 : 1;
|
|
__IO uint8_t BDIS3 : 1;
|
|
__IO uint8_t IOE2 : 1;
|
|
__IO uint8_t IOE3 : 1;
|
|
__IO uint8_t IOP2 : 1;
|
|
__IO uint8_t IOP3 : 1;
|
|
} stc_mft_ocu_ocsa32_field_t;
|
|
|
|
typedef struct stc_mft_ocu_ocsb32_field
|
|
{
|
|
__IO uint8_t OTD2 : 1;
|
|
__IO uint8_t OTD3 : 1;
|
|
uint8_t RESERVED1 : 2;
|
|
__IO uint8_t CMOD : 1;
|
|
__IO uint8_t BTS2 : 1;
|
|
__IO uint8_t BTS3 : 1;
|
|
} stc_mft_ocu_ocsb32_field_t;
|
|
|
|
typedef struct stc_mft_ocu_ocsa54_field
|
|
{
|
|
__IO uint8_t CST4 : 1;
|
|
__IO uint8_t CST5 : 1;
|
|
__IO uint8_t BDIS4 : 1;
|
|
__IO uint8_t BDIS5 : 1;
|
|
__IO uint8_t IOE4 : 1;
|
|
__IO uint8_t IOE5 : 1;
|
|
__IO uint8_t IOP4 : 1;
|
|
__IO uint8_t IOP5 : 1;
|
|
} stc_mft_ocu_ocsa54_field_t;
|
|
|
|
typedef struct stc_mft_ocu_ocsb54_field
|
|
{
|
|
__IO uint8_t OTD4 : 1;
|
|
__IO uint8_t OTD5 : 1;
|
|
uint8_t RESERVED1 : 2;
|
|
__IO uint8_t CMOD : 1;
|
|
__IO uint8_t BTS4 : 1;
|
|
__IO uint8_t BTS5 : 1;
|
|
} stc_mft_ocu_ocsb54_field_t;
|
|
|
|
typedef struct stc_mft_ocu_ocsc_field
|
|
{
|
|
__IO uint8_t MOD0 : 1;
|
|
__IO uint8_t MOD1 : 1;
|
|
__IO uint8_t MOD2 : 1;
|
|
__IO uint8_t MOD3 : 1;
|
|
__IO uint8_t MOD4 : 1;
|
|
__IO uint8_t MOD5 : 1;
|
|
} stc_mft_ocu_ocsc_field_t;
|
|
|
|
typedef struct stc_mft_ocu_ocfs10_field
|
|
{
|
|
__IO uint8_t FSO00 : 1;
|
|
__IO uint8_t FSO01 : 1;
|
|
__IO uint8_t FSO02 : 1;
|
|
__IO uint8_t FSO03 : 1;
|
|
__IO uint8_t FSO10 : 1;
|
|
__IO uint8_t FSO11 : 1;
|
|
__IO uint8_t FSO12 : 1;
|
|
__IO uint8_t FSO13 : 1;
|
|
} stc_mft_ocu_ocfs10_field_t;
|
|
|
|
typedef struct stc_mft_ocu_ocfs32_field
|
|
{
|
|
__IO uint8_t FSO20 : 1;
|
|
__IO uint8_t FSO21 : 1;
|
|
__IO uint8_t FSO22 : 1;
|
|
__IO uint8_t FSO23 : 1;
|
|
__IO uint8_t FSO30 : 1;
|
|
__IO uint8_t FSO31 : 1;
|
|
__IO uint8_t FSO32 : 1;
|
|
__IO uint8_t FSO33 : 1;
|
|
} stc_mft_ocu_ocfs32_field_t;
|
|
|
|
typedef struct stc_mft_ocu_ocfs54_field
|
|
{
|
|
__IO uint8_t FSO40 : 1;
|
|
__IO uint8_t FSO41 : 1;
|
|
__IO uint8_t FSO42 : 1;
|
|
__IO uint8_t FSO43 : 1;
|
|
__IO uint8_t FSO50 : 1;
|
|
__IO uint8_t FSO51 : 1;
|
|
__IO uint8_t FSO52 : 1;
|
|
__IO uint8_t FSO53 : 1;
|
|
} stc_mft_ocu_ocfs54_field_t;
|
|
|
|
/******************************************************************************
|
|
* MFT_WFG_MODULE
|
|
******************************************************************************/
|
|
/* MFT_WFG_MODULE register bit fields */
|
|
typedef struct stc_mft_wfg_wfsa10_field
|
|
{
|
|
__IO uint16_t DCK0 : 1;
|
|
__IO uint16_t DCK1 : 1;
|
|
__IO uint16_t DCK2 : 1;
|
|
__IO uint16_t TMD0 : 1;
|
|
__IO uint16_t TMD1 : 1;
|
|
__IO uint16_t TMD2 : 1;
|
|
__IO uint16_t GTEN0 : 1;
|
|
__IO uint16_t GTEN1 : 1;
|
|
__IO uint16_t PSEL0 : 1;
|
|
__IO uint16_t PSEL1 : 1;
|
|
__IO uint16_t PGEN0 : 1;
|
|
__IO uint16_t PGEN1 : 1;
|
|
__IO uint16_t DMOD : 1;
|
|
} stc_mft_wfg_wfsa10_field_t;
|
|
|
|
typedef struct stc_mft_wfg_wfsa32_field
|
|
{
|
|
__IO uint16_t DCK0 : 1;
|
|
__IO uint16_t DCK1 : 1;
|
|
__IO uint16_t DCK2 : 1;
|
|
__IO uint16_t TMD0 : 1;
|
|
__IO uint16_t TMD1 : 1;
|
|
__IO uint16_t TMD2 : 1;
|
|
__IO uint16_t GTEN0 : 1;
|
|
__IO uint16_t GTEN1 : 1;
|
|
__IO uint16_t PSEL0 : 1;
|
|
__IO uint16_t PSEL1 : 1;
|
|
__IO uint16_t PGEN0 : 1;
|
|
__IO uint16_t PGEN1 : 1;
|
|
__IO uint16_t DMOD : 1;
|
|
} stc_mft_wfg_wfsa32_field_t;
|
|
|
|
typedef struct stc_mft_wfg_wfsa54_field
|
|
{
|
|
__IO uint16_t DCK0 : 1;
|
|
__IO uint16_t DCK1 : 1;
|
|
__IO uint16_t DCK2 : 1;
|
|
__IO uint16_t TMD0 : 1;
|
|
__IO uint16_t TMD1 : 1;
|
|
__IO uint16_t TMD2 : 1;
|
|
__IO uint16_t GTEN0 : 1;
|
|
__IO uint16_t GTEN1 : 1;
|
|
__IO uint16_t PSEL0 : 1;
|
|
__IO uint16_t PSEL1 : 1;
|
|
__IO uint16_t PGEN0 : 1;
|
|
__IO uint16_t PGEN1 : 1;
|
|
__IO uint16_t DMOD : 1;
|
|
} stc_mft_wfg_wfsa54_field_t;
|
|
|
|
typedef struct stc_mft_wfg_wfir_field
|
|
{
|
|
__IO uint16_t DTIF : 1;
|
|
__IO uint16_t DTIC : 1;
|
|
uint16_t RESERVED1 : 2;
|
|
__IO uint16_t TMIF10 : 1;
|
|
__IO uint16_t TMIC10 : 1;
|
|
__IO uint16_t TMIE10 : 1;
|
|
__IO uint16_t TMIS10 : 1;
|
|
__IO uint16_t TMIF32 : 1;
|
|
__IO uint16_t TMIC32 : 1;
|
|
__IO uint16_t TMIE32 : 1;
|
|
__IO uint16_t TMIS32 : 1;
|
|
__IO uint16_t TMIF54 : 1;
|
|
__IO uint16_t TMIC54 : 1;
|
|
__IO uint16_t TMIE54 : 1;
|
|
__IO uint16_t TMIS54 : 1;
|
|
} stc_mft_wfg_wfir_field_t;
|
|
|
|
typedef struct stc_mft_wfg_nzcl_field
|
|
{
|
|
__IO uint16_t DTIE : 1;
|
|
__IO uint16_t NWS0 : 1;
|
|
__IO uint16_t NWS1 : 1;
|
|
__IO uint16_t NWS2 : 1;
|
|
__IO uint16_t SDTI : 1;
|
|
} stc_mft_wfg_nzcl_field_t;
|
|
|
|
/******************************************************************************
|
|
* MFT_ICU_MODULE
|
|
******************************************************************************/
|
|
/* MFT_ICU_MODULE register bit fields */
|
|
typedef struct stc_mft_icu_icfs10_field
|
|
{
|
|
__IO uint8_t FSI00 : 1;
|
|
__IO uint8_t FSI01 : 1;
|
|
__IO uint8_t FSI02 : 1;
|
|
__IO uint8_t FSI03 : 1;
|
|
__IO uint8_t FSI10 : 1;
|
|
__IO uint8_t FSI11 : 1;
|
|
__IO uint8_t FSI12 : 1;
|
|
__IO uint8_t FSI13 : 1;
|
|
} stc_mft_icu_icfs10_field_t;
|
|
|
|
typedef struct stc_mft_icu_icfs32_field
|
|
{
|
|
__IO uint8_t FSI20 : 1;
|
|
__IO uint8_t FSI21 : 1;
|
|
__IO uint8_t FSI22 : 1;
|
|
__IO uint8_t FSI23 : 1;
|
|
__IO uint8_t FSI30 : 1;
|
|
__IO uint8_t FSI31 : 1;
|
|
__IO uint8_t FSI32 : 1;
|
|
__IO uint8_t FSI33 : 1;
|
|
} stc_mft_icu_icfs32_field_t;
|
|
|
|
typedef struct stc_mft_icu_icsa10_field
|
|
{
|
|
__IO uint8_t EG00 : 1;
|
|
__IO uint8_t EG01 : 1;
|
|
__IO uint8_t EG10 : 1;
|
|
__IO uint8_t EG11 : 1;
|
|
__IO uint8_t ICE0 : 1;
|
|
__IO uint8_t ICE1 : 1;
|
|
__IO uint8_t ICP0 : 1;
|
|
__IO uint8_t ICP1 : 1;
|
|
} stc_mft_icu_icsa10_field_t;
|
|
|
|
typedef struct stc_mft_icu_icsb10_field
|
|
{
|
|
__IO uint8_t IEI0 : 1;
|
|
__IO uint8_t IEI1 : 1;
|
|
} stc_mft_icu_icsb10_field_t;
|
|
|
|
typedef struct stc_mft_icu_icsa32_field
|
|
{
|
|
__IO uint8_t EG20 : 1;
|
|
__IO uint8_t EG21 : 1;
|
|
__IO uint8_t EG30 : 1;
|
|
__IO uint8_t EG31 : 1;
|
|
__IO uint8_t ICE2 : 1;
|
|
__IO uint8_t ICE3 : 1;
|
|
__IO uint8_t ICP2 : 1;
|
|
__IO uint8_t ICP3 : 1;
|
|
} stc_mft_icu_icsa32_field_t;
|
|
|
|
typedef struct stc_mft_icu_icsb32_field
|
|
{
|
|
__IO uint8_t IEI2 : 1;
|
|
__IO uint8_t IEI3 : 1;
|
|
} stc_mft_icu_icsb32_field_t;
|
|
|
|
/******************************************************************************
|
|
* MFT_ADCMP_MODULE
|
|
******************************************************************************/
|
|
/* MFT_ADCMP_MODULE register bit fields */
|
|
typedef struct stc_mft_adcmp_acsb_field
|
|
{
|
|
__IO uint8_t BDIS0 : 1;
|
|
__IO uint8_t BDIS1 : 1;
|
|
__IO uint8_t BDIS2 : 1;
|
|
uint8_t RESERVED1 : 1;
|
|
__IO uint8_t BTS0 : 1;
|
|
__IO uint8_t BTS1 : 1;
|
|
__IO uint8_t BTS2 : 1;
|
|
} stc_mft_adcmp_acsb_field_t;
|
|
|
|
typedef struct stc_mft_adcmp_acsa_field
|
|
{
|
|
__IO uint16_t CE00 : 1;
|
|
__IO uint16_t CE01 : 1;
|
|
__IO uint16_t CE10 : 1;
|
|
__IO uint16_t CE11 : 1;
|
|
__IO uint16_t CE20 : 1;
|
|
__IO uint16_t CE21 : 1;
|
|
uint16_t RESERVED1 : 2;
|
|
__IO uint16_t SEL00 : 1;
|
|
__IO uint16_t SEL01 : 1;
|
|
__IO uint16_t SEL10 : 1;
|
|
__IO uint16_t SEL11 : 1;
|
|
__IO uint16_t SEL20 : 1;
|
|
__IO uint16_t SEL21 : 1;
|
|
} stc_mft_adcmp_acsa_field_t;
|
|
|
|
typedef struct stc_mft_adcmp_atsa_field
|
|
{
|
|
__IO uint16_t AD0S0 : 1;
|
|
__IO uint16_t AD0S1 : 1;
|
|
__IO uint16_t AD1S0 : 1;
|
|
__IO uint16_t AD1S1 : 1;
|
|
__IO uint16_t AD2S0 : 1;
|
|
__IO uint16_t AD2S1 : 1;
|
|
uint16_t RESERVED1 : 2;
|
|
__IO uint16_t AD0P0 : 1;
|
|
__IO uint16_t AD0P1 : 1;
|
|
__IO uint16_t AD1P0 : 1;
|
|
__IO uint16_t AD1P1 : 1;
|
|
__IO uint16_t AD2P0 : 1;
|
|
__IO uint16_t AD2P1 : 1;
|
|
} stc_mft_adcmp_atsa_field_t;
|
|
|
|
/******************************************************************************
|
|
* MFT_PPG_MODULE
|
|
******************************************************************************/
|
|
/* MFT_PPG_MODULE register bit fields */
|
|
typedef struct stc_mft_ppg_ttcr0_field
|
|
{
|
|
__IO uint8_t STR0 : 1;
|
|
__IO uint8_t MONI0 : 1;
|
|
__IO uint8_t CS00 : 1;
|
|
__IO uint8_t CS01 : 1;
|
|
__IO uint8_t TRG0O : 1;
|
|
__IO uint8_t TRG2O : 1;
|
|
__IO uint8_t TRG4O : 1;
|
|
__IO uint8_t TRG6O : 1;
|
|
} stc_mft_ppg_ttcr0_field_t;
|
|
|
|
typedef struct stc_mft_ppg_ttcr1_field
|
|
{
|
|
__IO uint8_t STR1 : 1;
|
|
__IO uint8_t MONI1 : 1;
|
|
__IO uint8_t CS10 : 1;
|
|
__IO uint8_t CS11 : 1;
|
|
__IO uint8_t TRG1O : 1;
|
|
__IO uint8_t TRG3O : 1;
|
|
__IO uint8_t TRG5O : 1;
|
|
__IO uint8_t TRG7O : 1;
|
|
} stc_mft_ppg_ttcr1_field_t;
|
|
|
|
typedef struct stc_mft_ppg_ttcr2_field
|
|
{
|
|
__IO uint8_t STR2 : 1;
|
|
__IO uint8_t MONI2 : 1;
|
|
__IO uint8_t CS20 : 1;
|
|
__IO uint8_t CS21 : 1;
|
|
__IO uint8_t TRG16O : 1;
|
|
__IO uint8_t TRG18O : 1;
|
|
__IO uint8_t TRG20O : 1;
|
|
__IO uint8_t TRG22O : 1;
|
|
} stc_mft_ppg_ttcr2_field_t;
|
|
|
|
typedef struct stc_mft_ppg_trg_field
|
|
{
|
|
__IO uint16_t PEN00 : 1;
|
|
__IO uint16_t PEN01 : 1;
|
|
__IO uint16_t PEN02 : 1;
|
|
__IO uint16_t PEN03 : 1;
|
|
__IO uint16_t PEN04 : 1;
|
|
__IO uint16_t PEN05 : 1;
|
|
__IO uint16_t PEN06 : 1;
|
|
__IO uint16_t PEN07 : 1;
|
|
__IO uint16_t PEN08 : 1;
|
|
__IO uint16_t PEN09 : 1;
|
|
__IO uint16_t PEN10 : 1;
|
|
__IO uint16_t PEN11 : 1;
|
|
__IO uint16_t PEN12 : 1;
|
|
__IO uint16_t PEN13 : 1;
|
|
__IO uint16_t PEN14 : 1;
|
|
__IO uint16_t PEN15 : 1;
|
|
} stc_mft_ppg_trg_field_t;
|
|
|
|
typedef struct stc_mft_ppg_trg1_field
|
|
{
|
|
__IO uint16_t PEN16 : 1;
|
|
__IO uint16_t PEN17 : 1;
|
|
__IO uint16_t PEN18 : 1;
|
|
__IO uint16_t PEN19 : 1;
|
|
__IO uint16_t PEN20 : 1;
|
|
__IO uint16_t PEN21 : 1;
|
|
__IO uint16_t PEN22 : 1;
|
|
__IO uint16_t PEN23 : 1;
|
|
} stc_mft_ppg_trg1_field_t;
|
|
|
|
typedef struct stc_mft_ppg_revc_field
|
|
{
|
|
__IO uint16_t REV00 : 1;
|
|
__IO uint16_t REV01 : 1;
|
|
__IO uint16_t REV02 : 1;
|
|
__IO uint16_t REV03 : 1;
|
|
__IO uint16_t REV04 : 1;
|
|
__IO uint16_t REV05 : 1;
|
|
__IO uint16_t REV06 : 1;
|
|
__IO uint16_t REV07 : 1;
|
|
__IO uint16_t REV08 : 1;
|
|
__IO uint16_t REV09 : 1;
|
|
__IO uint16_t REV10 : 1;
|
|
__IO uint16_t REV11 : 1;
|
|
__IO uint16_t REV12 : 1;
|
|
__IO uint16_t REV13 : 1;
|
|
__IO uint16_t REV14 : 1;
|
|
__IO uint16_t REV15 : 1;
|
|
} stc_mft_ppg_revc_field_t;
|
|
|
|
typedef struct stc_mft_ppg_revc1_field
|
|
{
|
|
__IO uint16_t REV16 : 1;
|
|
__IO uint16_t REV17 : 1;
|
|
__IO uint16_t REV18 : 1;
|
|
__IO uint16_t REV19 : 1;
|
|
__IO uint16_t REV20 : 1;
|
|
__IO uint16_t REV21 : 1;
|
|
__IO uint16_t REV22 : 1;
|
|
__IO uint16_t REV23 : 1;
|
|
} stc_mft_ppg_revc1_field_t;
|
|
|
|
typedef struct stc_mft_ppg_ppgc1_field
|
|
{
|
|
__IO uint8_t TTRG : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t PCS0 : 1;
|
|
__IO uint8_t PCS1 : 1;
|
|
__IO uint8_t INTM : 1;
|
|
__IO uint8_t PUF : 1;
|
|
__IO uint8_t PIE : 1;
|
|
} stc_mft_ppg_ppgc1_field_t;
|
|
|
|
typedef struct stc_mft_ppg_ppgc0_field
|
|
{
|
|
__IO uint8_t TTRG : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t PCS0 : 1;
|
|
__IO uint8_t PCS1 : 1;
|
|
__IO uint8_t INTM : 1;
|
|
__IO uint8_t PUF : 1;
|
|
__IO uint8_t PIE : 1;
|
|
} stc_mft_ppg_ppgc0_field_t;
|
|
|
|
typedef struct stc_mft_ppg_ppgc3_field
|
|
{
|
|
__IO uint8_t TTRG : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t PCS0 : 1;
|
|
__IO uint8_t PCS1 : 1;
|
|
__IO uint8_t INTM : 1;
|
|
__IO uint8_t PUF : 1;
|
|
__IO uint8_t PIE : 1;
|
|
} stc_mft_ppg_ppgc3_field_t;
|
|
|
|
typedef struct stc_mft_ppg_ppgc2_field
|
|
{
|
|
__IO uint8_t TTRG : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t PCS0 : 1;
|
|
__IO uint8_t PCS1 : 1;
|
|
__IO uint8_t INTM : 1;
|
|
__IO uint8_t PUF : 1;
|
|
__IO uint8_t PIE : 1;
|
|
} stc_mft_ppg_ppgc2_field_t;
|
|
|
|
typedef struct stc_mft_ppg_gatec0_field
|
|
{
|
|
__IO uint8_t EDGE0 : 1;
|
|
__IO uint8_t STRG0 : 1;
|
|
uint8_t RESERVED1 : 2;
|
|
__IO uint8_t EDGE2 : 1;
|
|
__IO uint8_t STRG2 : 1;
|
|
} stc_mft_ppg_gatec0_field_t;
|
|
|
|
typedef struct stc_mft_ppg_ppgc5_field
|
|
{
|
|
__IO uint8_t TTRG : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t PCS0 : 1;
|
|
__IO uint8_t PCS1 : 1;
|
|
__IO uint8_t INTM : 1;
|
|
__IO uint8_t PUF : 1;
|
|
__IO uint8_t PIE : 1;
|
|
} stc_mft_ppg_ppgc5_field_t;
|
|
|
|
typedef struct stc_mft_ppg_ppgc4_field
|
|
{
|
|
__IO uint8_t TTRG : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t PCS0 : 1;
|
|
__IO uint8_t PCS1 : 1;
|
|
__IO uint8_t INTM : 1;
|
|
__IO uint8_t PUF : 1;
|
|
__IO uint8_t PIE : 1;
|
|
} stc_mft_ppg_ppgc4_field_t;
|
|
|
|
typedef struct stc_mft_ppg_ppgc7_field
|
|
{
|
|
__IO uint8_t TTRG : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t PCS0 : 1;
|
|
__IO uint8_t PCS1 : 1;
|
|
__IO uint8_t INTM : 1;
|
|
__IO uint8_t PUF : 1;
|
|
__IO uint8_t PIE : 1;
|
|
} stc_mft_ppg_ppgc7_field_t;
|
|
|
|
typedef struct stc_mft_ppg_ppgc6_field
|
|
{
|
|
__IO uint8_t TTRG : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t PCS0 : 1;
|
|
__IO uint8_t PCS1 : 1;
|
|
__IO uint8_t INTM : 1;
|
|
__IO uint8_t PUF : 1;
|
|
__IO uint8_t PIE : 1;
|
|
} stc_mft_ppg_ppgc6_field_t;
|
|
|
|
typedef struct stc_mft_ppg_gatec4_field
|
|
{
|
|
__IO uint8_t EDGE4 : 1;
|
|
__IO uint8_t STRG4 : 1;
|
|
uint8_t RESERVED1 : 2;
|
|
__IO uint8_t EDGE6 : 1;
|
|
__IO uint8_t STRG6 : 1;
|
|
} stc_mft_ppg_gatec4_field_t;
|
|
|
|
typedef struct stc_mft_ppg_ppgc9_field
|
|
{
|
|
__IO uint8_t TTRG : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t PCS0 : 1;
|
|
__IO uint8_t PCS1 : 1;
|
|
__IO uint8_t INTM : 1;
|
|
__IO uint8_t PUF : 1;
|
|
__IO uint8_t PIE : 1;
|
|
} stc_mft_ppg_ppgc9_field_t;
|
|
|
|
typedef struct stc_mft_ppg_ppgc8_field
|
|
{
|
|
__IO uint8_t TTRG : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t PCS0 : 1;
|
|
__IO uint8_t PCS1 : 1;
|
|
__IO uint8_t INTM : 1;
|
|
__IO uint8_t PUF : 1;
|
|
__IO uint8_t PIE : 1;
|
|
} stc_mft_ppg_ppgc8_field_t;
|
|
|
|
typedef struct stc_mft_ppg_ppgc11_field
|
|
{
|
|
__IO uint8_t TTRG : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t PCS0 : 1;
|
|
__IO uint8_t PCS1 : 1;
|
|
__IO uint8_t INTM : 1;
|
|
__IO uint8_t PUF : 1;
|
|
__IO uint8_t PIE : 1;
|
|
} stc_mft_ppg_ppgc11_field_t;
|
|
|
|
typedef struct stc_mft_ppg_ppgc10_field
|
|
{
|
|
__IO uint8_t TTRG : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t PCS0 : 1;
|
|
__IO uint8_t PCS1 : 1;
|
|
__IO uint8_t INTM : 1;
|
|
__IO uint8_t PUF : 1;
|
|
__IO uint8_t PIE : 1;
|
|
} stc_mft_ppg_ppgc10_field_t;
|
|
|
|
typedef struct stc_mft_ppg_gatec8_field
|
|
{
|
|
__IO uint8_t EDGE8 : 1;
|
|
__IO uint8_t STRG8 : 1;
|
|
uint8_t RESERVED1 : 2;
|
|
__IO uint8_t EDGE10 : 1;
|
|
__IO uint8_t STRG10 : 1;
|
|
} stc_mft_ppg_gatec8_field_t;
|
|
|
|
typedef struct stc_mft_ppg_ppgc13_field
|
|
{
|
|
__IO uint8_t TTRG : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t PCS0 : 1;
|
|
__IO uint8_t PCS1 : 1;
|
|
__IO uint8_t INTM : 1;
|
|
__IO uint8_t PUF : 1;
|
|
__IO uint8_t PIE : 1;
|
|
} stc_mft_ppg_ppgc13_field_t;
|
|
|
|
typedef struct stc_mft_ppg_ppgc12_field
|
|
{
|
|
__IO uint8_t TTRG : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t PCS0 : 1;
|
|
__IO uint8_t PCS1 : 1;
|
|
__IO uint8_t INTM : 1;
|
|
__IO uint8_t PUF : 1;
|
|
__IO uint8_t PIE : 1;
|
|
} stc_mft_ppg_ppgc12_field_t;
|
|
|
|
typedef struct stc_mft_ppg_ppgc15_field
|
|
{
|
|
__IO uint8_t TTRG : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t PCS0 : 1;
|
|
__IO uint8_t PCS1 : 1;
|
|
__IO uint8_t INTM : 1;
|
|
__IO uint8_t PUF : 1;
|
|
__IO uint8_t PIE : 1;
|
|
} stc_mft_ppg_ppgc15_field_t;
|
|
|
|
typedef struct stc_mft_ppg_ppgc14_field
|
|
{
|
|
__IO uint8_t TTRG : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t PCS0 : 1;
|
|
__IO uint8_t PCS1 : 1;
|
|
__IO uint8_t INTM : 1;
|
|
__IO uint8_t PUF : 1;
|
|
__IO uint8_t PIE : 1;
|
|
} stc_mft_ppg_ppgc14_field_t;
|
|
|
|
typedef struct stc_mft_ppg_gatec12_field
|
|
{
|
|
__IO uint8_t EDGE12 : 1;
|
|
__IO uint8_t STRG12 : 1;
|
|
uint8_t RESERVED1 : 2;
|
|
__IO uint8_t EDGE14 : 1;
|
|
__IO uint8_t STRG14 : 1;
|
|
} stc_mft_ppg_gatec12_field_t;
|
|
|
|
typedef struct stc_mft_ppg_ppgc17_field
|
|
{
|
|
__IO uint8_t TTRG : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t PCS0 : 1;
|
|
__IO uint8_t PCS1 : 1;
|
|
__IO uint8_t INTM : 1;
|
|
__IO uint8_t PUF : 1;
|
|
__IO uint8_t PIE : 1;
|
|
} stc_mft_ppg_ppgc17_field_t;
|
|
|
|
typedef struct stc_mft_ppg_ppgc16_field
|
|
{
|
|
__IO uint8_t TTRG : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t PCS0 : 1;
|
|
__IO uint8_t PCS1 : 1;
|
|
__IO uint8_t INTM : 1;
|
|
__IO uint8_t PUF : 1;
|
|
__IO uint8_t PIE : 1;
|
|
} stc_mft_ppg_ppgc16_field_t;
|
|
|
|
typedef struct stc_mft_ppg_ppgc19_field
|
|
{
|
|
__IO uint8_t TTRG : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t PCS0 : 1;
|
|
__IO uint8_t PCS1 : 1;
|
|
__IO uint8_t INTM : 1;
|
|
__IO uint8_t PUF : 1;
|
|
__IO uint8_t PIE : 1;
|
|
} stc_mft_ppg_ppgc19_field_t;
|
|
|
|
typedef struct stc_mft_ppg_ppgc18_field
|
|
{
|
|
__IO uint8_t TTRG : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t PCS0 : 1;
|
|
__IO uint8_t PCS1 : 1;
|
|
__IO uint8_t INTM : 1;
|
|
__IO uint8_t PUF : 1;
|
|
__IO uint8_t PIE : 1;
|
|
} stc_mft_ppg_ppgc18_field_t;
|
|
|
|
typedef struct stc_mft_ppg_gatec16_field
|
|
{
|
|
__IO uint8_t EDGE16 : 1;
|
|
__IO uint8_t STRG16 : 1;
|
|
uint8_t RESERVED1 : 2;
|
|
__IO uint8_t EDGE18 : 1;
|
|
__IO uint8_t STRG18 : 1;
|
|
} stc_mft_ppg_gatec16_field_t;
|
|
|
|
typedef struct stc_mft_ppg_ppgc21_field
|
|
{
|
|
__IO uint8_t TTRG : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t PCS0 : 1;
|
|
__IO uint8_t PCS1 : 1;
|
|
__IO uint8_t INTM : 1;
|
|
__IO uint8_t PUF : 1;
|
|
__IO uint8_t PIE : 1;
|
|
} stc_mft_ppg_ppgc21_field_t;
|
|
|
|
typedef struct stc_mft_ppg_ppgc20_field
|
|
{
|
|
__IO uint8_t TTRG : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t PCS0 : 1;
|
|
__IO uint8_t PCS1 : 1;
|
|
__IO uint8_t INTM : 1;
|
|
__IO uint8_t PUF : 1;
|
|
__IO uint8_t PIE : 1;
|
|
} stc_mft_ppg_ppgc20_field_t;
|
|
|
|
typedef struct stc_mft_ppg_ppgc23_field
|
|
{
|
|
__IO uint8_t TTRG : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t PCS0 : 1;
|
|
__IO uint8_t PCS1 : 1;
|
|
__IO uint8_t INTM : 1;
|
|
__IO uint8_t PUF : 1;
|
|
__IO uint8_t PIE : 1;
|
|
} stc_mft_ppg_ppgc23_field_t;
|
|
|
|
typedef struct stc_mft_ppg_ppgc22_field
|
|
{
|
|
__IO uint8_t TTRG : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t PCS0 : 1;
|
|
__IO uint8_t PCS1 : 1;
|
|
__IO uint8_t INTM : 1;
|
|
__IO uint8_t PUF : 1;
|
|
__IO uint8_t PIE : 1;
|
|
} stc_mft_ppg_ppgc22_field_t;
|
|
|
|
typedef struct stc_mft_ppg_gatec20_field
|
|
{
|
|
__IO uint8_t EDGE20 : 1;
|
|
__IO uint8_t STRG20 : 1;
|
|
uint8_t RESERVED1 : 2;
|
|
__IO uint8_t EDGE22 : 1;
|
|
__IO uint8_t STRG22 : 1;
|
|
} stc_mft_ppg_gatec20_field_t;
|
|
|
|
/******************************************************************************
|
|
* BT_PPG_MODULE
|
|
******************************************************************************/
|
|
/* BT_PPG_MODULE register bit fields */
|
|
typedef struct stc_bt_ppg_tmcr_field
|
|
{
|
|
__IO uint16_t STRG : 1;
|
|
__IO uint16_t CTEN : 1;
|
|
__IO uint16_t MDSE : 1;
|
|
__IO uint16_t OSEL : 1;
|
|
__IO uint16_t FMD0 : 1;
|
|
__IO uint16_t FMD1 : 1;
|
|
__IO uint16_t FMD2 : 1;
|
|
uint16_t RESERVED1 : 1;
|
|
__IO uint16_t EGS0 : 1;
|
|
__IO uint16_t EGS1 : 1;
|
|
__IO uint16_t PMSK : 1;
|
|
__IO uint16_t RTGEN : 1;
|
|
__IO uint16_t CKS0 : 1;
|
|
__IO uint16_t CKS1 : 1;
|
|
__IO uint16_t CKS2 : 1;
|
|
} stc_bt_ppg_tmcr_field_t;
|
|
|
|
typedef struct stc_bt_ppg_stc_field
|
|
{
|
|
__IO uint8_t UDIR : 1;
|
|
uint8_t RESERVED1 : 1;
|
|
__IO uint8_t TGIR : 1;
|
|
uint8_t RESERVED2 : 1;
|
|
__IO uint8_t UDIE : 1;
|
|
uint8_t RESERVED3 : 1;
|
|
__IO uint8_t TGIE : 1;
|
|
} stc_bt_ppg_stc_field_t;
|
|
|
|
typedef struct stc_bt_ppg_tmcr2_field
|
|
{
|
|
__IO uint8_t CKS3 : 1;
|
|
} stc_bt_ppg_tmcr2_field_t;
|
|
|
|
/******************************************************************************
|
|
* BT_PWM_MODULE
|
|
******************************************************************************/
|
|
/* BT_PWM_MODULE register bit fields */
|
|
typedef struct stc_bt_pwm_tmcr_field
|
|
{
|
|
__IO uint16_t STRG : 1;
|
|
__IO uint16_t CTEN : 1;
|
|
__IO uint16_t MDSE : 1;
|
|
__IO uint16_t OSEL : 1;
|
|
__IO uint16_t FMD0 : 1;
|
|
__IO uint16_t FMD1 : 1;
|
|
__IO uint16_t FMD2 : 1;
|
|
uint16_t RESERVED1 : 1;
|
|
__IO uint16_t EGS0 : 1;
|
|
__IO uint16_t EGS1 : 1;
|
|
__IO uint16_t PMSK : 1;
|
|
__IO uint16_t RTGEN : 1;
|
|
__IO uint16_t CKS0 : 1;
|
|
__IO uint16_t CKS1 : 1;
|
|
__IO uint16_t CKS2 : 1;
|
|
} stc_bt_pwm_tmcr_field_t;
|
|
|
|
typedef struct stc_bt_pwm_stc_field
|
|
{
|
|
__IO uint8_t UDIR : 1;
|
|
__IO uint8_t DTIR : 1;
|
|
__IO uint8_t TGIR : 1;
|
|
uint8_t RESERVED1 : 1;
|
|
__IO uint8_t UDIE : 1;
|
|
__IO uint8_t DTIE : 1;
|
|
__IO uint8_t TGIE : 1;
|
|
} stc_bt_pwm_stc_field_t;
|
|
|
|
typedef struct stc_bt_pwm_tmcr2_field
|
|
{
|
|
__IO uint8_t CKS3 : 1;
|
|
} stc_bt_pwm_tmcr2_field_t;
|
|
|
|
/******************************************************************************
|
|
* BT_RT_MODULE
|
|
******************************************************************************/
|
|
/* BT_RT_MODULE register bit fields */
|
|
typedef struct stc_bt_rt_tmcr_field
|
|
{
|
|
__IO uint16_t STRG : 1;
|
|
__IO uint16_t CTEN : 1;
|
|
__IO uint16_t MDSE : 1;
|
|
__IO uint16_t OSEL : 1;
|
|
__IO uint16_t FMD0 : 1;
|
|
__IO uint16_t FMD1 : 1;
|
|
__IO uint16_t FMD2 : 1;
|
|
__IO uint16_t T32 : 1;
|
|
__IO uint16_t EGS0 : 1;
|
|
__IO uint16_t EGS1 : 1;
|
|
uint16_t RESERVED1 : 2;
|
|
__IO uint16_t CKS0 : 1;
|
|
__IO uint16_t CKS1 : 1;
|
|
__IO uint16_t CKS2 : 1;
|
|
} stc_bt_rt_tmcr_field_t;
|
|
|
|
typedef struct stc_bt_rt_stc_field
|
|
{
|
|
__IO uint8_t UDIR : 1;
|
|
uint8_t RESERVED1 : 1;
|
|
__IO uint8_t TGIR : 1;
|
|
uint8_t RESERVED2 : 1;
|
|
__IO uint8_t UDIE : 1;
|
|
uint8_t RESERVED3 : 1;
|
|
__IO uint8_t TGIE : 1;
|
|
} stc_bt_rt_stc_field_t;
|
|
|
|
typedef struct stc_bt_rt_tmcr2_field
|
|
{
|
|
__IO uint8_t CKS3 : 1;
|
|
} stc_bt_rt_tmcr2_field_t;
|
|
|
|
/******************************************************************************
|
|
* BT_PWC_MODULE
|
|
******************************************************************************/
|
|
/* BT_PWC_MODULE register bit fields */
|
|
typedef struct stc_bt_pwc_tmcr_field
|
|
{
|
|
uint16_t RESERVED1 : 1;
|
|
__IO uint16_t CTEN : 1;
|
|
__IO uint16_t MDSE : 1;
|
|
uint16_t RESERVED2 : 1;
|
|
__IO uint16_t FMD0 : 1;
|
|
__IO uint16_t FMD1 : 1;
|
|
__IO uint16_t FMD2 : 1;
|
|
__IO uint16_t T32 : 1;
|
|
__IO uint16_t EGS0 : 1;
|
|
__IO uint16_t EGS1 : 1;
|
|
__IO uint16_t EGS2 : 1;
|
|
uint16_t RESERVED3 : 1;
|
|
__IO uint16_t CKS0 : 1;
|
|
__IO uint16_t CKS1 : 1;
|
|
__IO uint16_t CKS2 : 1;
|
|
} stc_bt_pwc_tmcr_field_t;
|
|
|
|
typedef struct stc_bt_pwc_stc_field
|
|
{
|
|
__IO uint8_t OVIR : 1;
|
|
uint8_t RESERVED1 : 1;
|
|
__IO uint8_t EDIR : 1;
|
|
uint8_t RESERVED2 : 1;
|
|
__IO uint8_t OVIE : 1;
|
|
uint8_t RESERVED3 : 1;
|
|
__IO uint8_t EDIE : 1;
|
|
__IO uint8_t ERR : 1;
|
|
} stc_bt_pwc_stc_field_t;
|
|
|
|
typedef struct stc_bt_pwc_tmcr2_field
|
|
{
|
|
__IO uint8_t CKS3 : 1;
|
|
} stc_bt_pwc_tmcr2_field_t;
|
|
|
|
/******************************************************************************
|
|
* BTIOSEL03_MODULE
|
|
******************************************************************************/
|
|
/* BTIOSEL03_MODULE register bit fields */
|
|
typedef struct stc_btiosel03_btsel0123_field
|
|
{
|
|
__IO uint8_t SEL01_0 : 1;
|
|
__IO uint8_t SEL01_1 : 1;
|
|
__IO uint8_t SEL01_2 : 1;
|
|
__IO uint8_t SEL01_3 : 1;
|
|
__IO uint8_t SEL23_0 : 1;
|
|
__IO uint8_t SEL23_1 : 1;
|
|
__IO uint8_t SEL23_2 : 1;
|
|
__IO uint8_t SEL23_3 : 1;
|
|
} stc_btiosel03_btsel0123_field_t;
|
|
|
|
/******************************************************************************
|
|
* BTIOSEL47_MODULE
|
|
******************************************************************************/
|
|
/* BTIOSEL47_MODULE register bit fields */
|
|
typedef struct stc_btiosel47_btsel4567_field
|
|
{
|
|
__IO uint8_t SEL45_0 : 1;
|
|
__IO uint8_t SEL45_1 : 1;
|
|
__IO uint8_t SEL45_2 : 1;
|
|
__IO uint8_t SEL45_3 : 1;
|
|
__IO uint8_t SEL67_0 : 1;
|
|
__IO uint8_t SEL67_1 : 1;
|
|
__IO uint8_t SEL67_2 : 1;
|
|
__IO uint8_t SEL67_3 : 1;
|
|
} stc_btiosel47_btsel4567_field_t;
|
|
|
|
/******************************************************************************
|
|
* BTIOSEL811_MODULE
|
|
******************************************************************************/
|
|
/* BTIOSEL811_MODULE register bit fields */
|
|
typedef struct stc_btiosel8b_btsel89ab_field
|
|
{
|
|
__IO uint8_t SEL89_0 : 1;
|
|
__IO uint8_t SEL89_1 : 1;
|
|
__IO uint8_t SEL89_2 : 1;
|
|
__IO uint8_t SEL89_3 : 1;
|
|
__IO uint8_t SELAB_0 : 1;
|
|
__IO uint8_t SELAB_1 : 1;
|
|
__IO uint8_t SELAB_2 : 1;
|
|
__IO uint8_t SELAB_3 : 1;
|
|
} stc_btiosel8b_btsel89ab_field_t;
|
|
|
|
/******************************************************************************
|
|
* BTIOSEL1215_MODULE
|
|
******************************************************************************/
|
|
/* BTIOSEL1215_MODULE register bit fields */
|
|
typedef struct stc_btioselcf_btselcdef_field
|
|
{
|
|
__IO uint8_t SELCD_0 : 1;
|
|
__IO uint8_t SELCD_1 : 1;
|
|
__IO uint8_t SELCD_2 : 1;
|
|
__IO uint8_t SELCD_3 : 1;
|
|
__IO uint8_t SELEF_0 : 1;
|
|
__IO uint8_t SELEF_1 : 1;
|
|
__IO uint8_t SELEF_2 : 1;
|
|
__IO uint8_t SELEF_3 : 1;
|
|
} stc_btioselcf_btselcdef_field_t;
|
|
|
|
/******************************************************************************
|
|
* SBSSR_MODULE
|
|
******************************************************************************/
|
|
/* SBSSR_MODULE register bit fields */
|
|
typedef struct stc_sbssr_btsssr_field
|
|
{
|
|
__IO uint16_t SSR0 : 1;
|
|
__IO uint16_t SSR1 : 1;
|
|
__IO uint16_t SSR2 : 1;
|
|
__IO uint16_t SSR3 : 1;
|
|
__IO uint16_t SSR4 : 1;
|
|
__IO uint16_t SSR5 : 1;
|
|
__IO uint16_t SSR6 : 1;
|
|
__IO uint16_t SSR7 : 1;
|
|
__IO uint16_t SSR8 : 1;
|
|
__IO uint16_t SSR9 : 1;
|
|
__IO uint16_t SSR10 : 1;
|
|
__IO uint16_t SSR11 : 1;
|
|
__IO uint16_t SSR12 : 1;
|
|
__IO uint16_t SSR13 : 1;
|
|
__IO uint16_t SSR14 : 1;
|
|
__IO uint16_t SSR15 : 1;
|
|
} stc_sbssr_btsssr_field_t;
|
|
|
|
/******************************************************************************
|
|
* QPRC_MODULE
|
|
******************************************************************************/
|
|
/* QPRC_MODULE register bit fields */
|
|
typedef struct stc_qprc_qicr_field
|
|
{
|
|
__IO uint16_t QPCMIE : 1;
|
|
__IO uint16_t QPCMF : 1;
|
|
__IO uint16_t QPRCMIE : 1;
|
|
__IO uint16_t QPRCMF : 1;
|
|
__IO uint16_t OUZIE : 1;
|
|
__IO uint16_t UFDF : 1;
|
|
__IO uint16_t OFDF : 1;
|
|
__IO uint16_t ZIIF : 1;
|
|
__IO uint16_t CDCIE : 1;
|
|
__IO uint16_t CDCF : 1;
|
|
__IO uint16_t DIRPC : 1;
|
|
__IO uint16_t DIROU : 1;
|
|
__IO uint16_t QPCNRCMIE : 1;
|
|
__IO uint16_t QPCNRCMF : 1;
|
|
} stc_qprc_qicr_field_t;
|
|
|
|
typedef struct stc_qprc_qicrl_field
|
|
{
|
|
__IO uint8_t QPCMIE : 1;
|
|
__IO uint8_t QPCMF : 1;
|
|
__IO uint8_t QPRCMIE : 1;
|
|
__IO uint8_t QPRCMF : 1;
|
|
__IO uint8_t OUZIE : 1;
|
|
__IO uint8_t UFDF : 1;
|
|
__IO uint8_t OFDF : 1;
|
|
__IO uint8_t ZIIF : 1;
|
|
} stc_qprc_qicrl_field_t;
|
|
|
|
typedef struct stc_qprc_qicrh_field
|
|
{
|
|
__IO uint8_t CDCIE : 1;
|
|
__IO uint8_t CDCF : 1;
|
|
__IO uint8_t DIRPC : 1;
|
|
__IO uint8_t DIROU : 1;
|
|
__IO uint8_t QPCNRCMIE : 1;
|
|
__IO uint8_t QPCNRCMF : 1;
|
|
} stc_qprc_qicrh_field_t;
|
|
|
|
typedef struct stc_qprc_qcr_field
|
|
{
|
|
__IO uint16_t PCM0 : 1;
|
|
__IO uint16_t PCM1 : 1;
|
|
__IO uint16_t RCM0 : 1;
|
|
__IO uint16_t RCM1 : 1;
|
|
__IO uint16_t PSTP : 1;
|
|
__IO uint16_t CGSC : 1;
|
|
__IO uint16_t RSEL : 1;
|
|
__IO uint16_t SWAP : 1;
|
|
__IO uint16_t PCRM0 : 1;
|
|
__IO uint16_t PCRM1 : 1;
|
|
__IO uint16_t AES0 : 1;
|
|
__IO uint16_t AES1 : 1;
|
|
__IO uint16_t BES0 : 1;
|
|
__IO uint16_t BES1 : 1;
|
|
__IO uint16_t CGE0 : 1;
|
|
__IO uint16_t CGE1 : 1;
|
|
} stc_qprc_qcr_field_t;
|
|
|
|
typedef struct stc_qprc_qcrl_field
|
|
{
|
|
__IO uint8_t PCM0 : 1;
|
|
__IO uint8_t PCM1 : 1;
|
|
__IO uint8_t RCM0 : 1;
|
|
__IO uint8_t RCM1 : 1;
|
|
__IO uint8_t PSTP : 1;
|
|
__IO uint8_t CGSC : 1;
|
|
__IO uint8_t RSEL : 1;
|
|
__IO uint8_t SWAP : 1;
|
|
} stc_qprc_qcrl_field_t;
|
|
|
|
typedef struct stc_qprc_qcrh_field
|
|
{
|
|
__IO uint8_t PCRM0 : 1;
|
|
__IO uint8_t PCRM1 : 1;
|
|
__IO uint8_t AES0 : 1;
|
|
__IO uint8_t AES1 : 1;
|
|
__IO uint8_t BES0 : 1;
|
|
__IO uint8_t BES1 : 1;
|
|
__IO uint8_t CGE0 : 1;
|
|
__IO uint8_t CGE1 : 1;
|
|
} stc_qprc_qcrh_field_t;
|
|
|
|
typedef struct stc_qprc_qecr_field
|
|
{
|
|
__IO uint16_t ORNGMD : 1;
|
|
__IO uint16_t ORNGF : 1;
|
|
__IO uint16_t ORNGIE : 1;
|
|
} stc_qprc_qecr_field_t;
|
|
|
|
/******************************************************************************
|
|
* ADC12_MODULE
|
|
******************************************************************************/
|
|
/* ADC12_MODULE register bit fields */
|
|
typedef struct stc_adc_adsr_field
|
|
{
|
|
__IO uint8_t SCS : 1;
|
|
__IO uint8_t PCS : 1;
|
|
__IO uint8_t PCNS : 1;
|
|
uint8_t RESERVED1 : 3;
|
|
__IO uint8_t FDAS : 1;
|
|
__IO uint8_t ADSTP : 1;
|
|
} stc_adc_adsr_field_t;
|
|
|
|
typedef struct stc_adc_adcr_field
|
|
{
|
|
__IO uint8_t OVRIE : 1;
|
|
__IO uint8_t CMPIE : 1;
|
|
__IO uint8_t PCIE : 1;
|
|
__IO uint8_t SCIE : 1;
|
|
uint8_t RESERVED1 : 1;
|
|
__IO uint8_t CMPIF : 1;
|
|
__IO uint8_t PCIF : 1;
|
|
__IO uint8_t SCIF : 1;
|
|
} stc_adc_adcr_field_t;
|
|
|
|
typedef struct stc_adc_sfns_field
|
|
{
|
|
__IO uint8_t SFS0 : 1;
|
|
__IO uint8_t SFS1 : 1;
|
|
__IO uint8_t SFS2 : 1;
|
|
__IO uint8_t SFS3 : 1;
|
|
} stc_adc_sfns_field_t;
|
|
|
|
typedef struct stc_adc_sccr_field
|
|
{
|
|
__IO uint8_t SSTR : 1;
|
|
__IO uint8_t SHEN : 1;
|
|
__IO uint8_t RPT : 1;
|
|
uint8_t RESERVED1 : 1;
|
|
__IO uint8_t SFCLR : 1;
|
|
__IO uint8_t SOVR : 1;
|
|
__IO uint8_t SFUL : 1;
|
|
__IO uint8_t SEMP : 1;
|
|
} stc_adc_sccr_field_t;
|
|
|
|
typedef struct stc_adc_scfd_field
|
|
{
|
|
__IO uint32_t SC0 : 1;
|
|
__IO uint32_t SC1 : 1;
|
|
__IO uint32_t SC2 : 1;
|
|
__IO uint32_t SC3 : 1;
|
|
__IO uint32_t SC4 : 1;
|
|
uint32_t RESERVED1 : 3;
|
|
__IO uint32_t RS0 : 1;
|
|
__IO uint32_t RS1 : 1;
|
|
uint32_t RESERVED2 : 2;
|
|
__IO uint32_t INVL : 1;
|
|
uint32_t RESERVED3 : 7;
|
|
__IO uint32_t SD0 : 1;
|
|
__IO uint32_t SD1 : 1;
|
|
__IO uint32_t SD2 : 1;
|
|
__IO uint32_t SD3 : 1;
|
|
__IO uint32_t SD4 : 1;
|
|
__IO uint32_t SD5 : 1;
|
|
__IO uint32_t SD6 : 1;
|
|
__IO uint32_t SD7 : 1;
|
|
__IO uint32_t SD8 : 1;
|
|
__IO uint32_t SD9 : 1;
|
|
__IO uint32_t SD10 : 1;
|
|
__IO uint32_t SD11 : 1;
|
|
} stc_adc_scfd_field_t;
|
|
|
|
typedef struct stc_adc_scfdl_field
|
|
{
|
|
__IO uint16_t SC0 : 1;
|
|
__IO uint16_t SC1 : 1;
|
|
__IO uint16_t SC2 : 1;
|
|
__IO uint16_t SC3 : 1;
|
|
__IO uint16_t SC4 : 1;
|
|
uint16_t RESERVED1 : 3;
|
|
__IO uint16_t RS0 : 1;
|
|
__IO uint16_t RS1 : 1;
|
|
uint16_t RESERVED2 : 2;
|
|
__IO uint16_t INVL : 1;
|
|
} stc_adc_scfdl_field_t;
|
|
|
|
typedef struct stc_adc_scfdh_field
|
|
{
|
|
uint16_t RESERVED1 : 4;
|
|
__IO uint16_t SD0 : 1;
|
|
__IO uint16_t SD1 : 1;
|
|
__IO uint16_t SD2 : 1;
|
|
__IO uint16_t SD3 : 1;
|
|
__IO uint16_t SD4 : 1;
|
|
__IO uint16_t SD5 : 1;
|
|
__IO uint16_t SD6 : 1;
|
|
__IO uint16_t SD7 : 1;
|
|
__IO uint16_t SD8 : 1;
|
|
__IO uint16_t SD9 : 1;
|
|
__IO uint16_t SD10 : 1;
|
|
__IO uint16_t SD11 : 1;
|
|
} stc_adc_scfdh_field_t;
|
|
|
|
typedef struct stc_adc_scis23_field
|
|
{
|
|
__IO uint16_t AN16 : 1;
|
|
__IO uint16_t AN17 : 1;
|
|
__IO uint16_t AN18 : 1;
|
|
__IO uint16_t AN19 : 1;
|
|
__IO uint16_t AN20 : 1;
|
|
__IO uint16_t AN21 : 1;
|
|
__IO uint16_t AN22 : 1;
|
|
__IO uint16_t AN23 : 1;
|
|
__IO uint16_t AN24 : 1;
|
|
__IO uint16_t AN25 : 1;
|
|
__IO uint16_t AN26 : 1;
|
|
__IO uint16_t AN27 : 1;
|
|
__IO uint16_t AN28 : 1;
|
|
__IO uint16_t AN29 : 1;
|
|
__IO uint16_t AN30 : 1;
|
|
__IO uint16_t AN31 : 1;
|
|
} stc_adc_scis23_field_t;
|
|
|
|
typedef struct stc_adc_scis2_field
|
|
{
|
|
__IO uint8_t AN16 : 1;
|
|
__IO uint8_t AN17 : 1;
|
|
__IO uint8_t AN18 : 1;
|
|
__IO uint8_t AN19 : 1;
|
|
__IO uint8_t AN20 : 1;
|
|
__IO uint8_t AN21 : 1;
|
|
__IO uint8_t AN22 : 1;
|
|
__IO uint8_t AN23 : 1;
|
|
} stc_adc_scis2_field_t;
|
|
|
|
typedef struct stc_adc_scis3_field
|
|
{
|
|
__IO uint8_t AN24 : 1;
|
|
__IO uint8_t AN25 : 1;
|
|
__IO uint8_t AN26 : 1;
|
|
__IO uint8_t AN27 : 1;
|
|
__IO uint8_t AN28 : 1;
|
|
__IO uint8_t AN29 : 1;
|
|
__IO uint8_t AN30 : 1;
|
|
__IO uint8_t AN31 : 1;
|
|
} stc_adc_scis3_field_t;
|
|
|
|
typedef struct stc_adc_scis01_field
|
|
{
|
|
__IO uint16_t AN0 : 1;
|
|
__IO uint16_t AN1 : 1;
|
|
__IO uint16_t AN2 : 1;
|
|
__IO uint16_t AN3 : 1;
|
|
__IO uint16_t AN4 : 1;
|
|
__IO uint16_t AN5 : 1;
|
|
__IO uint16_t AN6 : 1;
|
|
__IO uint16_t AN7 : 1;
|
|
__IO uint16_t AN8 : 1;
|
|
__IO uint16_t AN9 : 1;
|
|
__IO uint16_t AN10 : 1;
|
|
__IO uint16_t AN11 : 1;
|
|
__IO uint16_t AN12 : 1;
|
|
__IO uint16_t AN13 : 1;
|
|
__IO uint16_t AN14 : 1;
|
|
__IO uint16_t AN15 : 1;
|
|
} stc_adc_scis01_field_t;
|
|
|
|
typedef struct stc_adc_scis0_field
|
|
{
|
|
__IO uint8_t AN0 : 1;
|
|
__IO uint8_t AN1 : 1;
|
|
__IO uint8_t AN2 : 1;
|
|
__IO uint8_t AN3 : 1;
|
|
__IO uint8_t AN4 : 1;
|
|
__IO uint8_t AN5 : 1;
|
|
__IO uint8_t AN6 : 1;
|
|
__IO uint8_t AN7 : 1;
|
|
} stc_adc_scis0_field_t;
|
|
|
|
typedef struct stc_adc_scis1_field
|
|
{
|
|
__IO uint8_t AN8 : 1;
|
|
__IO uint8_t AN9 : 1;
|
|
__IO uint8_t AN10 : 1;
|
|
__IO uint8_t AN11 : 1;
|
|
__IO uint8_t AN12 : 1;
|
|
__IO uint8_t AN13 : 1;
|
|
__IO uint8_t AN14 : 1;
|
|
__IO uint8_t AN15 : 1;
|
|
} stc_adc_scis1_field_t;
|
|
|
|
typedef struct stc_adc_pfns_field
|
|
{
|
|
__IO uint8_t PFS0 : 1;
|
|
__IO uint8_t PFS1 : 1;
|
|
uint8_t RESERVED1 : 2;
|
|
__IO uint8_t TEST0 : 1;
|
|
__IO uint8_t TEST1 : 1;
|
|
} stc_adc_pfns_field_t;
|
|
|
|
typedef struct stc_adc_pccr_field
|
|
{
|
|
__IO uint8_t PSTR : 1;
|
|
__IO uint8_t PHEN : 1;
|
|
__IO uint8_t PEEN : 1;
|
|
__IO uint8_t ESCE : 1;
|
|
__IO uint8_t PFCLR : 1;
|
|
__IO uint8_t POVR : 1;
|
|
__IO uint8_t PFUL : 1;
|
|
__IO uint8_t PEMP : 1;
|
|
} stc_adc_pccr_field_t;
|
|
|
|
typedef struct stc_adc_pcfd_field
|
|
{
|
|
__IO uint32_t PC0 : 1;
|
|
__IO uint32_t PC1 : 1;
|
|
__IO uint32_t PC2 : 1;
|
|
__IO uint32_t PC3 : 1;
|
|
__IO uint32_t PC4 : 1;
|
|
uint32_t RESERVED1 : 3;
|
|
__IO uint32_t RS0 : 1;
|
|
__IO uint32_t RS1 : 1;
|
|
__IO uint32_t RS2 : 1;
|
|
uint32_t RESERVED2 : 1;
|
|
__IO uint32_t INVL : 1;
|
|
uint32_t RESERVED3 : 7;
|
|
__IO uint32_t PD0 : 1;
|
|
__IO uint32_t PD1 : 1;
|
|
__IO uint32_t PD2 : 1;
|
|
__IO uint32_t PD3 : 1;
|
|
__IO uint32_t PD4 : 1;
|
|
__IO uint32_t PD5 : 1;
|
|
__IO uint32_t PD6 : 1;
|
|
__IO uint32_t PD7 : 1;
|
|
__IO uint32_t PD8 : 1;
|
|
__IO uint32_t PD9 : 1;
|
|
__IO uint32_t PD10 : 1;
|
|
__IO uint32_t PD11 : 1;
|
|
} stc_adc_pcfd_field_t;
|
|
|
|
typedef struct stc_adc_pcfdl_field
|
|
{
|
|
__IO uint16_t PC0 : 1;
|
|
__IO uint16_t PC1 : 1;
|
|
__IO uint16_t PC2 : 1;
|
|
__IO uint16_t PC3 : 1;
|
|
__IO uint16_t PC4 : 1;
|
|
uint16_t RESERVED1 : 3;
|
|
__IO uint16_t RS0 : 1;
|
|
__IO uint16_t RS1 : 1;
|
|
__IO uint16_t RS2 : 1;
|
|
uint16_t RESERVED2 : 1;
|
|
__IO uint16_t INVL : 1;
|
|
} stc_adc_pcfdl_field_t;
|
|
|
|
typedef struct stc_adc_pcfdh_field
|
|
{
|
|
uint16_t RESERVED1 : 4;
|
|
__IO uint16_t PD0 : 1;
|
|
__IO uint16_t PD1 : 1;
|
|
__IO uint16_t PD2 : 1;
|
|
__IO uint16_t PD3 : 1;
|
|
__IO uint16_t PD4 : 1;
|
|
__IO uint16_t PD5 : 1;
|
|
__IO uint16_t PD6 : 1;
|
|
__IO uint16_t PD7 : 1;
|
|
__IO uint16_t PD8 : 1;
|
|
__IO uint16_t PD9 : 1;
|
|
__IO uint16_t PD10 : 1;
|
|
__IO uint16_t PD11 : 1;
|
|
} stc_adc_pcfdh_field_t;
|
|
|
|
typedef struct stc_adc_pcis_field
|
|
{
|
|
__IO uint8_t P1A0 : 1;
|
|
__IO uint8_t P1A1 : 1;
|
|
__IO uint8_t P1A2 : 1;
|
|
__IO uint8_t P2A0 : 1;
|
|
__IO uint8_t P2A1 : 1;
|
|
__IO uint8_t P2A2 : 1;
|
|
__IO uint8_t P2A3 : 1;
|
|
__IO uint8_t P2A4 : 1;
|
|
} stc_adc_pcis_field_t;
|
|
|
|
typedef struct stc_adc_cmpcr_field
|
|
{
|
|
__IO uint8_t CCH0 : 1;
|
|
__IO uint8_t CCH1 : 1;
|
|
__IO uint8_t CCH2 : 1;
|
|
__IO uint8_t CCH3 : 1;
|
|
__IO uint8_t CCH4 : 1;
|
|
__IO uint8_t CMD0 : 1;
|
|
__IO uint8_t CMD1 : 1;
|
|
__IO uint8_t CMPEN : 1;
|
|
} stc_adc_cmpcr_field_t;
|
|
|
|
typedef struct stc_adc_cmpd_field
|
|
{
|
|
uint16_t RESERVED1 : 6;
|
|
__IO uint16_t CMAD2 : 1;
|
|
__IO uint16_t CMAD3 : 1;
|
|
__IO uint16_t CMAD4 : 1;
|
|
__IO uint16_t CMAD5 : 1;
|
|
__IO uint16_t CMAD6 : 1;
|
|
__IO uint16_t CMAD7 : 1;
|
|
__IO uint16_t CMAD8 : 1;
|
|
__IO uint16_t CMAD9 : 1;
|
|
__IO uint16_t CMAD10 : 1;
|
|
__IO uint16_t CMAD11 : 1;
|
|
} stc_adc_cmpd_field_t;
|
|
|
|
typedef struct stc_adc_adss23_field
|
|
{
|
|
__IO uint16_t TS16 : 1;
|
|
__IO uint16_t TS17 : 1;
|
|
__IO uint16_t TS18 : 1;
|
|
__IO uint16_t TS19 : 1;
|
|
__IO uint16_t TS20 : 1;
|
|
__IO uint16_t TS21 : 1;
|
|
__IO uint16_t TS22 : 1;
|
|
__IO uint16_t TS23 : 1;
|
|
__IO uint16_t TS24 : 1;
|
|
__IO uint16_t TS25 : 1;
|
|
__IO uint16_t TS26 : 1;
|
|
__IO uint16_t TS27 : 1;
|
|
__IO uint16_t TS28 : 1;
|
|
__IO uint16_t TS29 : 1;
|
|
__IO uint16_t TS30 : 1;
|
|
__IO uint16_t TS31 : 1;
|
|
} stc_adc_adss23_field_t;
|
|
|
|
typedef struct stc_adc_adss2_field
|
|
{
|
|
__IO uint8_t TS16 : 1;
|
|
__IO uint8_t TS17 : 1;
|
|
__IO uint8_t TS18 : 1;
|
|
__IO uint8_t TS19 : 1;
|
|
__IO uint8_t TS20 : 1;
|
|
__IO uint8_t TS21 : 1;
|
|
__IO uint8_t TS22 : 1;
|
|
__IO uint8_t TS23 : 1;
|
|
} stc_adc_adss2_field_t;
|
|
|
|
typedef struct stc_adc_adss3_field
|
|
{
|
|
__IO uint8_t TS24 : 1;
|
|
__IO uint8_t TS25 : 1;
|
|
__IO uint8_t TS26 : 1;
|
|
__IO uint8_t TS27 : 1;
|
|
__IO uint8_t TS28 : 1;
|
|
__IO uint8_t TS29 : 1;
|
|
__IO uint8_t TS30 : 1;
|
|
__IO uint8_t TS31 : 1;
|
|
} stc_adc_adss3_field_t;
|
|
|
|
typedef struct stc_adc_adss01_field
|
|
{
|
|
__IO uint16_t TS0 : 1;
|
|
__IO uint16_t TS1 : 1;
|
|
__IO uint16_t TS2 : 1;
|
|
__IO uint16_t TS3 : 1;
|
|
__IO uint16_t TS4 : 1;
|
|
__IO uint16_t TS5 : 1;
|
|
__IO uint16_t TS6 : 1;
|
|
__IO uint16_t TS7 : 1;
|
|
__IO uint16_t TS8 : 1;
|
|
__IO uint16_t TS9 : 1;
|
|
__IO uint16_t TS10 : 1;
|
|
__IO uint16_t TS11 : 1;
|
|
__IO uint16_t TS12 : 1;
|
|
__IO uint16_t TS13 : 1;
|
|
__IO uint16_t TS14 : 1;
|
|
__IO uint16_t TS15 : 1;
|
|
} stc_adc_adss01_field_t;
|
|
|
|
typedef struct stc_adc_adss0_field
|
|
{
|
|
__IO uint8_t TS0 : 1;
|
|
__IO uint8_t TS1 : 1;
|
|
__IO uint8_t TS2 : 1;
|
|
__IO uint8_t TS3 : 1;
|
|
__IO uint8_t TS4 : 1;
|
|
__IO uint8_t TS5 : 1;
|
|
__IO uint8_t TS6 : 1;
|
|
__IO uint8_t TS7 : 1;
|
|
} stc_adc_adss0_field_t;
|
|
|
|
typedef struct stc_adc_adss1_field
|
|
{
|
|
__IO uint8_t TS8 : 1;
|
|
__IO uint8_t TS9 : 1;
|
|
__IO uint8_t TS10 : 1;
|
|
__IO uint8_t TS11 : 1;
|
|
__IO uint8_t TS12 : 1;
|
|
__IO uint8_t TS13 : 1;
|
|
__IO uint8_t TS14 : 1;
|
|
__IO uint8_t TS15 : 1;
|
|
} stc_adc_adss1_field_t;
|
|
|
|
typedef struct stc_adc_adst01_field
|
|
{
|
|
__IO uint16_t ST10 : 1;
|
|
__IO uint16_t ST11 : 1;
|
|
__IO uint16_t ST12 : 1;
|
|
__IO uint16_t ST13 : 1;
|
|
__IO uint16_t ST14 : 1;
|
|
__IO uint16_t STX10 : 1;
|
|
__IO uint16_t STX11 : 1;
|
|
__IO uint16_t STX12 : 1;
|
|
__IO uint16_t ST00 : 1;
|
|
__IO uint16_t ST01 : 1;
|
|
__IO uint16_t ST02 : 1;
|
|
__IO uint16_t ST03 : 1;
|
|
__IO uint16_t ST04 : 1;
|
|
__IO uint16_t STX00 : 1;
|
|
__IO uint16_t STX01 : 1;
|
|
__IO uint16_t STX02 : 1;
|
|
} stc_adc_adst01_field_t;
|
|
|
|
typedef struct stc_adc_adst1_field
|
|
{
|
|
__IO uint8_t ST10 : 1;
|
|
__IO uint8_t ST11 : 1;
|
|
__IO uint8_t ST12 : 1;
|
|
__IO uint8_t ST13 : 1;
|
|
__IO uint8_t ST14 : 1;
|
|
__IO uint8_t STX10 : 1;
|
|
__IO uint8_t STX11 : 1;
|
|
__IO uint8_t STX12 : 1;
|
|
} stc_adc_adst1_field_t;
|
|
|
|
typedef struct stc_adc_adst0_field
|
|
{
|
|
__IO uint8_t ST00 : 1;
|
|
__IO uint8_t ST01 : 1;
|
|
__IO uint8_t ST02 : 1;
|
|
__IO uint8_t ST03 : 1;
|
|
__IO uint8_t ST04 : 1;
|
|
__IO uint8_t STX00 : 1;
|
|
__IO uint8_t STX01 : 1;
|
|
__IO uint8_t STX02 : 1;
|
|
} stc_adc_adst0_field_t;
|
|
|
|
typedef struct stc_adc_adct_field
|
|
{
|
|
__IO uint8_t CT0 : 1;
|
|
__IO uint8_t CT1 : 1;
|
|
__IO uint8_t CT2 : 1;
|
|
__IO uint8_t CT3 : 1;
|
|
__IO uint8_t CT4 : 1;
|
|
__IO uint8_t CT5 : 1;
|
|
__IO uint8_t CT6 : 1;
|
|
__IO uint8_t CT7 : 1;
|
|
} stc_adc_adct_field_t;
|
|
|
|
typedef struct stc_adc_prtsl_field
|
|
{
|
|
__IO uint8_t PRTSL0 : 1;
|
|
__IO uint8_t PRTSL1 : 1;
|
|
__IO uint8_t PRTSL2 : 1;
|
|
__IO uint8_t PRTSL3 : 1;
|
|
} stc_adc_prtsl_field_t;
|
|
|
|
typedef struct stc_adc_sctsl_field
|
|
{
|
|
__IO uint8_t SCTSL0 : 1;
|
|
__IO uint8_t SCTSL1 : 1;
|
|
__IO uint8_t SCTSL2 : 1;
|
|
__IO uint8_t SCTSL3 : 1;
|
|
} stc_adc_sctsl_field_t;
|
|
|
|
typedef struct stc_adc_adcen_field
|
|
{
|
|
__IO uint8_t ENBL : 1;
|
|
__IO uint8_t READY : 1;
|
|
uint8_t RESERVED1 : 2;
|
|
__IO uint8_t CYCLSL0 : 1;
|
|
__IO uint8_t CYCLSL1 : 1;
|
|
} stc_adc_adcen_field_t;
|
|
|
|
/******************************************************************************
|
|
* CRTRIM_MODULE
|
|
******************************************************************************/
|
|
/* CRTRIM_MODULE register bit fields */
|
|
typedef struct stc_crtrim_mcr_psr_field
|
|
{
|
|
__IO uint8_t CSR0 : 1;
|
|
__IO uint8_t CSR1 : 1;
|
|
} stc_crtrim_mcr_psr_field_t;
|
|
|
|
typedef struct stc_crtrim_mcr_ftrm_field
|
|
{
|
|
__IO uint16_t TRD0 : 1;
|
|
__IO uint16_t TRD1 : 1;
|
|
__IO uint16_t TRD2 : 1;
|
|
__IO uint16_t TRD3 : 1;
|
|
__IO uint16_t TRD4 : 1;
|
|
__IO uint16_t TRD5 : 1;
|
|
__IO uint16_t TRD6 : 1;
|
|
__IO uint16_t TRD7 : 1;
|
|
} stc_crtrim_mcr_ftrm_field_t;
|
|
|
|
/******************************************************************************
|
|
* EXTI_MODULE
|
|
******************************************************************************/
|
|
/* EXTI_MODULE registEN bit fields */
|
|
typedef struct stc_exti_enir_field
|
|
{
|
|
__IO uint16_t EN0 : 1;
|
|
__IO uint16_t EN1 : 1;
|
|
__IO uint16_t EN2 : 1;
|
|
__IO uint16_t EN3 : 1;
|
|
__IO uint16_t EN4 : 1;
|
|
__IO uint16_t EN5 : 1;
|
|
__IO uint16_t EN6 : 1;
|
|
__IO uint16_t EN7 : 1;
|
|
__IO uint16_t EN8 : 1;
|
|
__IO uint16_t EN9 : 1;
|
|
__IO uint16_t EN10 : 1;
|
|
__IO uint16_t EN11 : 1;
|
|
__IO uint16_t EN12 : 1;
|
|
__IO uint16_t EN13 : 1;
|
|
__IO uint16_t EN14 : 1;
|
|
__IO uint16_t EN15 : 1;
|
|
__IO uint16_t EN16 : 1;
|
|
__IO uint16_t EN17 : 1;
|
|
__IO uint16_t EN18 : 1;
|
|
__IO uint16_t EN19 : 1;
|
|
__IO uint16_t EN20 : 1;
|
|
__IO uint16_t EN21 : 1;
|
|
__IO uint16_t EN22 : 1;
|
|
__IO uint16_t EN23 : 1;
|
|
__IO uint16_t EN24 : 1;
|
|
__IO uint16_t EN25 : 1;
|
|
__IO uint16_t EN26 : 1;
|
|
__IO uint16_t EN27 : 1;
|
|
__IO uint16_t EN28 : 1;
|
|
__IO uint16_t EN29 : 1;
|
|
__IO uint16_t EN30 : 1;
|
|
__IO uint16_t EN31 : 1;
|
|
} stc_exti_enir_field_t;
|
|
|
|
typedef struct stc_exti_eirr_field
|
|
{
|
|
__IO uint16_t ER0 : 1;
|
|
__IO uint16_t ER1 : 1;
|
|
__IO uint16_t ER2 : 1;
|
|
__IO uint16_t ER3 : 1;
|
|
__IO uint16_t ER4 : 1;
|
|
__IO uint16_t ER5 : 1;
|
|
__IO uint16_t ER6 : 1;
|
|
__IO uint16_t ER7 : 1;
|
|
__IO uint16_t ER8 : 1;
|
|
__IO uint16_t ER9 : 1;
|
|
__IO uint16_t ER10 : 1;
|
|
__IO uint16_t ER11 : 1;
|
|
__IO uint16_t ER12 : 1;
|
|
__IO uint16_t ER13 : 1;
|
|
__IO uint16_t ER14 : 1;
|
|
__IO uint16_t ER15 : 1;
|
|
__IO uint16_t ER16 : 1;
|
|
__IO uint16_t ER17 : 1;
|
|
__IO uint16_t ER18 : 1;
|
|
__IO uint16_t ER19 : 1;
|
|
__IO uint16_t ER20 : 1;
|
|
__IO uint16_t ER21 : 1;
|
|
__IO uint16_t ER22 : 1;
|
|
__IO uint16_t ER23 : 1;
|
|
__IO uint16_t ER24 : 1;
|
|
__IO uint16_t ER25 : 1;
|
|
__IO uint16_t ER26 : 1;
|
|
__IO uint16_t ER27 : 1;
|
|
__IO uint16_t ER28 : 1;
|
|
__IO uint16_t ER29 : 1;
|
|
__IO uint16_t ER30 : 1;
|
|
__IO uint16_t ER31 : 1;
|
|
} stc_exti_eirr_field_t;
|
|
|
|
typedef struct stc_exti_eicl_field
|
|
{
|
|
__IO uint16_t ECL0 : 1;
|
|
__IO uint16_t ECL1 : 1;
|
|
__IO uint16_t ECL2 : 1;
|
|
__IO uint16_t ECL3 : 1;
|
|
__IO uint16_t ECL4 : 1;
|
|
__IO uint16_t ECL5 : 1;
|
|
__IO uint16_t ECL6 : 1;
|
|
__IO uint16_t ECL7 : 1;
|
|
__IO uint16_t ECL8 : 1;
|
|
__IO uint16_t ECL9 : 1;
|
|
__IO uint16_t ECL10 : 1;
|
|
__IO uint16_t ECL11 : 1;
|
|
__IO uint16_t ECL12 : 1;
|
|
__IO uint16_t ECL13 : 1;
|
|
__IO uint16_t ECL14 : 1;
|
|
__IO uint16_t ECL15 : 1;
|
|
__IO uint16_t ECL16 : 1;
|
|
__IO uint16_t ECL17 : 1;
|
|
__IO uint16_t ECL18 : 1;
|
|
__IO uint16_t ECL19 : 1;
|
|
__IO uint16_t ECL20 : 1;
|
|
__IO uint16_t ECL21 : 1;
|
|
__IO uint16_t ECL22 : 1;
|
|
__IO uint16_t ECL23 : 1;
|
|
__IO uint16_t ECL24 : 1;
|
|
__IO uint16_t ECL25 : 1;
|
|
__IO uint16_t ECL26 : 1;
|
|
__IO uint16_t ECL27 : 1;
|
|
__IO uint16_t ECL28 : 1;
|
|
__IO uint16_t ECL29 : 1;
|
|
__IO uint16_t ECL30 : 1;
|
|
__IO uint16_t ECL31 : 1;
|
|
} stc_exti_eicl_field_t;
|
|
|
|
typedef struct stc_exti_elvr_field
|
|
{
|
|
__IO uint32_t LA0 : 1;
|
|
__IO uint32_t LB0 : 1;
|
|
__IO uint32_t LA1 : 1;
|
|
__IO uint32_t LB1 : 1;
|
|
__IO uint32_t LA2 : 1;
|
|
__IO uint32_t LB2 : 1;
|
|
__IO uint32_t LA3 : 1;
|
|
__IO uint32_t LB3 : 1;
|
|
__IO uint32_t LA4 : 1;
|
|
__IO uint32_t LB4 : 1;
|
|
__IO uint32_t LA5 : 1;
|
|
__IO uint32_t LB5 : 1;
|
|
__IO uint32_t LA6 : 1;
|
|
__IO uint32_t LB6 : 1;
|
|
__IO uint32_t LA7 : 1;
|
|
__IO uint32_t LB7 : 1;
|
|
__IO uint32_t LA8 : 1;
|
|
__IO uint32_t LB8 : 1;
|
|
__IO uint32_t LA9 : 1;
|
|
__IO uint32_t LB9 : 1;
|
|
__IO uint32_t LA10 : 1;
|
|
__IO uint32_t LB10 : 1;
|
|
__IO uint32_t LA11 : 1;
|
|
__IO uint32_t LB11 : 1;
|
|
__IO uint32_t LA12 : 1;
|
|
__IO uint32_t LB12 : 1;
|
|
__IO uint32_t LA13 : 1;
|
|
__IO uint32_t LB13 : 1;
|
|
__IO uint32_t LA14 : 1;
|
|
__IO uint32_t LB14 : 1;
|
|
__IO uint32_t LA15 : 1;
|
|
__IO uint32_t LB15 : 1;
|
|
} stc_exti_elvr_field_t;
|
|
|
|
typedef struct stc_exti_elvr1_field
|
|
{
|
|
__IO uint32_t LA16 : 1;
|
|
__IO uint32_t LB16 : 1;
|
|
__IO uint32_t LA17 : 1;
|
|
__IO uint32_t LB17 : 1;
|
|
__IO uint32_t LA18 : 1;
|
|
__IO uint32_t LB18 : 1;
|
|
__IO uint32_t LA19 : 1;
|
|
__IO uint32_t LB19 : 1;
|
|
__IO uint32_t LA20 : 1;
|
|
__IO uint32_t LB20 : 1;
|
|
__IO uint32_t LA21 : 1;
|
|
__IO uint32_t LB21 : 1;
|
|
__IO uint32_t LA22 : 1;
|
|
__IO uint32_t LB22 : 1;
|
|
__IO uint32_t LA23 : 1;
|
|
__IO uint32_t LB23 : 1;
|
|
__IO uint32_t LA24 : 1;
|
|
__IO uint32_t LB24 : 1;
|
|
__IO uint32_t LA25 : 1;
|
|
__IO uint32_t LB25 : 1;
|
|
__IO uint32_t LA26 : 1;
|
|
__IO uint32_t LB26 : 1;
|
|
__IO uint32_t LA27 : 1;
|
|
__IO uint32_t LB27 : 1;
|
|
__IO uint32_t LA28 : 1;
|
|
__IO uint32_t LB28 : 1;
|
|
__IO uint32_t LA29 : 1;
|
|
__IO uint32_t LB29 : 1;
|
|
__IO uint32_t LA30 : 1;
|
|
__IO uint32_t LB30 : 1;
|
|
__IO uint32_t LA31 : 1;
|
|
__IO uint32_t LB31 : 1;
|
|
} stc_exti_elvr1_field_t;
|
|
|
|
typedef struct stc_exti_nmirr_field
|
|
{
|
|
__IO uint8_t NR0 : 1;
|
|
} stc_exti_nmirr_field_t;
|
|
|
|
typedef struct stc_exti_nmicl_field
|
|
{
|
|
__IO uint8_t NCL0 : 1;
|
|
} stc_exti_nmicl_field_t;
|
|
|
|
/******************************************************************************
|
|
* INTREQ_MODULE
|
|
******************************************************************************/
|
|
/* INTREQ_MODULE register bit fields */
|
|
typedef struct stc_intreq_drqsel_field
|
|
{
|
|
__IO uint32_t DRQSEL0 : 1;
|
|
__IO uint32_t DRQSEL1 : 1;
|
|
__IO uint32_t DRQSEL2 : 1;
|
|
__IO uint32_t DRQSEL3 : 1;
|
|
__IO uint32_t DRQSEL4 : 1;
|
|
__IO uint32_t DRQSEL5 : 1;
|
|
__IO uint32_t DRQSEL6 : 1;
|
|
__IO uint32_t DRQSEL7 : 1;
|
|
__IO uint32_t DRQSEL8 : 1;
|
|
__IO uint32_t DRQSEL9 : 1;
|
|
__IO uint32_t DRQSEL10 : 1;
|
|
__IO uint32_t DRQSEL11 : 1;
|
|
__IO uint32_t DRQSEL12 : 1;
|
|
__IO uint32_t DRQSEL13 : 1;
|
|
__IO uint32_t DRQSEL14 : 1;
|
|
__IO uint32_t DRQSEL15 : 1;
|
|
__IO uint32_t DRQSEL16 : 1;
|
|
__IO uint32_t DRQSEL17 : 1;
|
|
__IO uint32_t DRQSEL18 : 1;
|
|
__IO uint32_t DRQSEL19 : 1;
|
|
__IO uint32_t DRQSEL20 : 1;
|
|
__IO uint32_t DRQSEL21 : 1;
|
|
__IO uint32_t DRQSEL22 : 1;
|
|
__IO uint32_t DRQSEL23 : 1;
|
|
__IO uint32_t DRQSEL24 : 1;
|
|
__IO uint32_t DRQSEL25 : 1;
|
|
__IO uint32_t DRQSEL26 : 1;
|
|
__IO uint32_t DRQSEL27 : 1;
|
|
__IO uint32_t DRQSEL28 : 1;
|
|
__IO uint32_t DRQSEL29 : 1;
|
|
__IO uint32_t DRQSEL30 : 1;
|
|
__IO uint32_t DRQSEL31 : 1;
|
|
} stc_intreq_drqsel_field_t;
|
|
|
|
typedef struct stc_intreq_oddpks_field
|
|
{
|
|
__IO uint8_t ODDPKS0 : 1;
|
|
__IO uint8_t ODDPKS1 : 1;
|
|
__IO uint8_t ODDPKS2 : 1;
|
|
__IO uint8_t ODDPKS3 : 1;
|
|
__IO uint8_t ODDPKS4 : 1;
|
|
} stc_intreq_oddpks_field_t;
|
|
|
|
typedef struct stc_intreq_exc02mon_field
|
|
{
|
|
__IO uint32_t NMI : 1;
|
|
__IO uint32_t HWINT : 1;
|
|
} stc_intreq_exc02mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq00mon_field
|
|
{
|
|
__IO uint32_t FCSINT : 1;
|
|
} stc_intreq_irq00mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq01mon_field
|
|
{
|
|
__IO uint32_t SWWDTINT : 1;
|
|
} stc_intreq_irq01mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq02mon_field
|
|
{
|
|
__IO uint32_t LVDINT : 1;
|
|
} stc_intreq_irq02mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq03mon_field
|
|
{
|
|
__IO uint32_t WAVE0INT0 : 1;
|
|
__IO uint32_t WAVE0INT1 : 1;
|
|
__IO uint32_t WAVE0INT2 : 1;
|
|
__IO uint32_t WAVE0INT3 : 1;
|
|
__IO uint32_t WAVE1INT0 : 1;
|
|
__IO uint32_t WAVE1INT1 : 1;
|
|
__IO uint32_t WAVE1INT2 : 1;
|
|
__IO uint32_t WAVE1INT3 : 1;
|
|
__IO uint32_t WAVE2INT0 : 1;
|
|
__IO uint32_t WAVE2INT1 : 1;
|
|
__IO uint32_t WAVE2INT2 : 1;
|
|
__IO uint32_t WAVE2INT3 : 1;
|
|
} stc_intreq_irq03mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq04mon_field
|
|
{
|
|
__IO uint32_t EXTINT0 : 1;
|
|
__IO uint32_t EXTINT1 : 1;
|
|
__IO uint32_t EXTINT2 : 1;
|
|
__IO uint32_t EXTINT3 : 1;
|
|
__IO uint32_t EXTINT4 : 1;
|
|
__IO uint32_t EXTINT5 : 1;
|
|
__IO uint32_t EXTINT6 : 1;
|
|
__IO uint32_t EXTINT7 : 1;
|
|
} stc_intreq_irq04mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq05mon_field
|
|
{
|
|
__IO uint32_t EXTINT0 : 1;
|
|
__IO uint32_t EXTINT1 : 1;
|
|
__IO uint32_t EXTINT2 : 1;
|
|
__IO uint32_t EXTINT3 : 1;
|
|
__IO uint32_t EXTINT4 : 1;
|
|
__IO uint32_t EXTINT5 : 1;
|
|
__IO uint32_t EXTINT6 : 1;
|
|
__IO uint32_t EXTINT7 : 1;
|
|
__IO uint32_t EXTINT8 : 1;
|
|
__IO uint32_t EXTINT9 : 1;
|
|
__IO uint32_t EXTINT10 : 1;
|
|
__IO uint32_t EXTINT11 : 1;
|
|
__IO uint32_t EXTINT12 : 1;
|
|
__IO uint32_t EXTINT13 : 1;
|
|
__IO uint32_t EXTINT14 : 1;
|
|
__IO uint32_t EXTINT15 : 1;
|
|
__IO uint32_t EXTINT16 : 1;
|
|
__IO uint32_t EXTINT17 : 1;
|
|
__IO uint32_t EXTINT18 : 1;
|
|
__IO uint32_t EXTINT19 : 1;
|
|
__IO uint32_t EXTINT20 : 1;
|
|
__IO uint32_t EXTINT21 : 1;
|
|
__IO uint32_t EXTINT22 : 1;
|
|
__IO uint32_t EXTINT23 : 1;
|
|
} stc_intreq_irq05mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq06mon_field
|
|
{
|
|
__IO uint32_t TIMINT1 : 1;
|
|
__IO uint32_t TIMINT2 : 1;
|
|
__IO uint32_t QUD0INT0 : 1;
|
|
__IO uint32_t QUD0INT1 : 1;
|
|
__IO uint32_t QUD0INT2 : 1;
|
|
__IO uint32_t QUD0INT3 : 1;
|
|
__IO uint32_t QUD0INT4 : 1;
|
|
__IO uint32_t QUD0INT5 : 1;
|
|
__IO uint32_t QUD1INT0 : 1;
|
|
__IO uint32_t QUD1INT1 : 1;
|
|
__IO uint32_t QUD1INT2 : 1;
|
|
__IO uint32_t QUD1INT3 : 1;
|
|
__IO uint32_t QUD1INT4 : 1;
|
|
__IO uint32_t QUD1INT5 : 1;
|
|
__IO uint32_t QUD2INT0 : 1;
|
|
__IO uint32_t QUD2INT1 : 1;
|
|
__IO uint32_t QUD2INT2 : 1;
|
|
__IO uint32_t QUD2INT3 : 1;
|
|
__IO uint32_t QUD2INT4 : 1;
|
|
__IO uint32_t QUD2INT5 : 1;
|
|
} stc_intreq_irq06mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq07mon_field
|
|
{
|
|
__IO uint32_t FMSINT : 1;
|
|
} stc_intreq_irq07mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq08mon_field
|
|
{
|
|
__IO uint32_t MFSINT0 : 1;
|
|
__IO uint32_t MFSINT1 : 1;
|
|
} stc_intreq_irq08mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq09mon_field
|
|
{
|
|
__IO uint32_t FMSINT : 1;
|
|
} stc_intreq_irq09mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq10mon_field
|
|
{
|
|
__IO uint32_t MFSINT0 : 1;
|
|
__IO uint32_t MFSINT1 : 1;
|
|
} stc_intreq_irq10mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq11mon_field
|
|
{
|
|
__IO uint32_t FMSINT : 1;
|
|
} stc_intreq_irq11mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq12mon_field
|
|
{
|
|
__IO uint32_t MFSINT0 : 1;
|
|
__IO uint32_t MFSINT1 : 1;
|
|
} stc_intreq_irq12mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq13mon_field
|
|
{
|
|
__IO uint32_t FMSINT : 1;
|
|
} stc_intreq_irq13mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq14mon_field
|
|
{
|
|
__IO uint32_t MFSINT0 : 1;
|
|
__IO uint32_t MFSINT1 : 1;
|
|
} stc_intreq_irq14mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq15mon_field
|
|
{
|
|
__IO uint32_t FMSINT : 1;
|
|
} stc_intreq_irq15mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq16mon_field
|
|
{
|
|
__IO uint32_t MFSINT0 : 1;
|
|
__IO uint32_t MFSINT1 : 1;
|
|
} stc_intreq_irq16mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq17mon_field
|
|
{
|
|
__IO uint32_t FMSINT : 1;
|
|
} stc_intreq_irq17mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq18mon_field
|
|
{
|
|
__IO uint32_t MFSINT0 : 1;
|
|
__IO uint32_t MFSINT1 : 1;
|
|
} stc_intreq_irq18mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq19mon_field
|
|
{
|
|
__IO uint32_t FMSINT : 1;
|
|
} stc_intreq_irq19mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq20mon_field
|
|
{
|
|
__IO uint32_t MFSINT0 : 1;
|
|
__IO uint32_t MFSINT1 : 1;
|
|
} stc_intreq_irq20mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq21mon_field
|
|
{
|
|
__IO uint32_t FMSINT : 1;
|
|
} stc_intreq_irq21mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq22mon_field
|
|
{
|
|
__IO uint32_t MFSINT0 : 1;
|
|
__IO uint32_t MFSINT1 : 1;
|
|
} stc_intreq_irq22mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq23mon_field
|
|
{
|
|
__IO uint32_t PPGINT0 : 1;
|
|
__IO uint32_t PPGINT1 : 1;
|
|
__IO uint32_t PPGINT2 : 1;
|
|
__IO uint32_t PPGINT3 : 1;
|
|
__IO uint32_t PPGINT4 : 1;
|
|
__IO uint32_t PPGINT5 : 1;
|
|
__IO uint32_t PPGINT6 : 1;
|
|
__IO uint32_t PPGINT7 : 1;
|
|
__IO uint32_t PPGINT8 : 1;
|
|
} stc_intreq_irq23mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq24mon_field
|
|
{
|
|
__IO uint32_t MOSCINT : 1;
|
|
__IO uint32_t SOSCINT : 1;
|
|
__IO uint32_t MPLLINT : 1;
|
|
__IO uint32_t UPLLINT : 1;
|
|
__IO uint32_t WCINT : 1;
|
|
} stc_intreq_irq24mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq25mon_field
|
|
{
|
|
__IO uint32_t ADCINT0 : 1;
|
|
__IO uint32_t ADCINT1 : 1;
|
|
__IO uint32_t ADCINT2 : 1;
|
|
__IO uint32_t ADCINT3 : 1;
|
|
} stc_intreq_irq25mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq26mon_field
|
|
{
|
|
__IO uint32_t ADCINT0 : 1;
|
|
__IO uint32_t ADCINT1 : 1;
|
|
__IO uint32_t ADCINT2 : 1;
|
|
__IO uint32_t ADCINT3 : 1;
|
|
} stc_intreq_irq26mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq27mon_field
|
|
{
|
|
__IO uint32_t ADCINT0 : 1;
|
|
__IO uint32_t ADCINT1 : 1;
|
|
__IO uint32_t ADCINT2 : 1;
|
|
__IO uint32_t ADCINT3 : 1;
|
|
} stc_intreq_irq27mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq28mon_field
|
|
{
|
|
__IO uint32_t FRT0INT0 : 1;
|
|
__IO uint32_t FRT0INT1 : 1;
|
|
__IO uint32_t FRT0INT2 : 1;
|
|
__IO uint32_t FRT0INT3 : 1;
|
|
__IO uint32_t FRT0INT4 : 1;
|
|
__IO uint32_t FRT0INT5 : 1;
|
|
__IO uint32_t FRT1INT0 : 1;
|
|
__IO uint32_t FRT1INT1 : 1;
|
|
__IO uint32_t FRT1INT2 : 1;
|
|
__IO uint32_t FRT1INT3 : 1;
|
|
__IO uint32_t FRT1INT4 : 1;
|
|
__IO uint32_t FRT1INT5 : 1;
|
|
__IO uint32_t FRT2INT0 : 1;
|
|
__IO uint32_t FRT2INT1 : 1;
|
|
__IO uint32_t FRT2INT2 : 1;
|
|
__IO uint32_t FRT2INT3 : 1;
|
|
__IO uint32_t FRT2INT4 : 1;
|
|
__IO uint32_t FRT2INT5 : 1;
|
|
} stc_intreq_irq28mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq29mon_field
|
|
{
|
|
__IO uint32_t ICU0INT0 : 1;
|
|
__IO uint32_t ICU0INT1 : 1;
|
|
__IO uint32_t ICU0INT2 : 1;
|
|
__IO uint32_t ICU0INT3 : 1;
|
|
__IO uint32_t ICU1INT0 : 1;
|
|
__IO uint32_t ICU1INT1 : 1;
|
|
__IO uint32_t ICU1INT2 : 1;
|
|
__IO uint32_t ICU1INT3 : 1;
|
|
__IO uint32_t ICU2INT0 : 1;
|
|
__IO uint32_t ICU2INT1 : 1;
|
|
__IO uint32_t ICU2INT2 : 1;
|
|
__IO uint32_t ICU2INT3 : 1;
|
|
} stc_intreq_irq29mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq30mon_field
|
|
{
|
|
__IO uint32_t OCU0INT0 : 1;
|
|
__IO uint32_t OCU0INT1 : 1;
|
|
__IO uint32_t OCU0INT2 : 1;
|
|
__IO uint32_t OCU0INT3 : 1;
|
|
__IO uint32_t OCU0INT4 : 1;
|
|
__IO uint32_t OCU0INT5 : 1;
|
|
__IO uint32_t OCU1INT0 : 1;
|
|
__IO uint32_t OCU1INT1 : 1;
|
|
__IO uint32_t OCU1INT2 : 1;
|
|
__IO uint32_t OCU1INT3 : 1;
|
|
__IO uint32_t OCU1INT4 : 1;
|
|
__IO uint32_t OCU1INT5 : 1;
|
|
__IO uint32_t OCU2INT0 : 1;
|
|
__IO uint32_t OCU2INT1 : 1;
|
|
__IO uint32_t OCU2INT2 : 1;
|
|
__IO uint32_t OCU2INT3 : 1;
|
|
__IO uint32_t OCU2INT4 : 1;
|
|
__IO uint32_t OCU2INT5 : 1;
|
|
} stc_intreq_irq30mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq31mon_field
|
|
{
|
|
__IO uint32_t BTINT0 : 1;
|
|
__IO uint32_t BTINT1 : 1;
|
|
__IO uint32_t BTINT2 : 1;
|
|
__IO uint32_t BTINT3 : 1;
|
|
__IO uint32_t BTINT4 : 1;
|
|
__IO uint32_t BTINT5 : 1;
|
|
__IO uint32_t BTINT6 : 1;
|
|
__IO uint32_t BTINT7 : 1;
|
|
__IO uint32_t BTINT8 : 1;
|
|
__IO uint32_t BTINT9 : 1;
|
|
__IO uint32_t BTINT10 : 1;
|
|
__IO uint32_t BTINT11 : 1;
|
|
__IO uint32_t BTINT12 : 1;
|
|
__IO uint32_t BTINT13 : 1;
|
|
__IO uint32_t BTINT14 : 1;
|
|
__IO uint32_t BTINT15 : 1;
|
|
} stc_intreq_irq31mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq32mon_field
|
|
{
|
|
uint32_t RESERVED1 : 1;
|
|
__IO uint32_t MAC0SBD : 1;
|
|
__IO uint32_t MAC0PMI : 1;
|
|
__IO uint32_t MAC0LPI : 1;
|
|
} stc_intreq_irq32mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq33mon_field
|
|
{
|
|
uint32_t RESERVED1 : 1;
|
|
__IO uint32_t MAC1SBD : 1;
|
|
__IO uint32_t MAC1PMI : 1;
|
|
} stc_intreq_irq33mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq34mon_field
|
|
{
|
|
__IO uint32_t USB0INT0 : 1;
|
|
__IO uint32_t USB0INT1 : 1;
|
|
__IO uint32_t USB0INT2 : 1;
|
|
__IO uint32_t USB0INT3 : 1;
|
|
__IO uint32_t USB0INT4 : 1;
|
|
} stc_intreq_irq34mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq35mon_field
|
|
{
|
|
__IO uint32_t USB0INT0 : 1;
|
|
__IO uint32_t USB0INT1 : 1;
|
|
__IO uint32_t USB0INT2 : 1;
|
|
__IO uint32_t USB0INT3 : 1;
|
|
__IO uint32_t USB0INT4 : 1;
|
|
__IO uint32_t USB0INT5 : 1;
|
|
} stc_intreq_irq35mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq36mon_field
|
|
{
|
|
__IO uint32_t USB1INT0 : 1;
|
|
__IO uint32_t USB1INT1 : 1;
|
|
__IO uint32_t USB1INT2 : 1;
|
|
__IO uint32_t USB1INT3 : 1;
|
|
__IO uint32_t USB1INT4 : 1;
|
|
} stc_intreq_irq36mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq37mon_field
|
|
{
|
|
__IO uint32_t USB1INT0 : 1;
|
|
__IO uint32_t USB1INT1 : 1;
|
|
__IO uint32_t USB1INT2 : 1;
|
|
__IO uint32_t USB1INT3 : 1;
|
|
__IO uint32_t USB1INT4 : 1;
|
|
__IO uint32_t USB1INT5 : 1;
|
|
} stc_intreq_irq37mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq38mon_field
|
|
{
|
|
__IO uint32_t DMAINT : 1;
|
|
} stc_intreq_irq38mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq39mon_field
|
|
{
|
|
__IO uint32_t DMAINT : 1;
|
|
} stc_intreq_irq39mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq40mon_field
|
|
{
|
|
__IO uint32_t DMAINT : 1;
|
|
} stc_intreq_irq40mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq41mon_field
|
|
{
|
|
__IO uint32_t DMAINT : 1;
|
|
} stc_intreq_irq41mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq42mon_field
|
|
{
|
|
__IO uint32_t DMAINT : 1;
|
|
} stc_intreq_irq42mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq43mon_field
|
|
{
|
|
__IO uint32_t DMAINT : 1;
|
|
} stc_intreq_irq43mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq44mon_field
|
|
{
|
|
__IO uint32_t DMAINT : 1;
|
|
} stc_intreq_irq44mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq45mon_field
|
|
{
|
|
__IO uint32_t DMAINT : 1;
|
|
} stc_intreq_irq45mon_field_t;
|
|
|
|
typedef struct stc_intreq_irq46mon_field
|
|
{
|
|
__IO uint32_t BTINT0 : 1;
|
|
__IO uint32_t BTINT1 : 1;
|
|
__IO uint32_t BTINT2 : 1;
|
|
__IO uint32_t BTINT3 : 1;
|
|
__IO uint32_t BTINT4 : 1;
|
|
__IO uint32_t BTINT5 : 1;
|
|
__IO uint32_t BTINT6 : 1;
|
|
__IO uint32_t BTINT7 : 1;
|
|
__IO uint32_t BTINT8 : 1;
|
|
__IO uint32_t BTINT9 : 1;
|
|
__IO uint32_t BTINT10 : 1;
|
|
__IO uint32_t BTINT11 : 1;
|
|
__IO uint32_t BTINT12 : 1;
|
|
__IO uint32_t BTINT13 : 1;
|
|
__IO uint32_t BTINT14 : 1;
|
|
__IO uint32_t BTINT15 : 1;
|
|
} stc_intreq_irq46mon_field_t;
|
|
|
|
typedef struct stc_intreq_drqsel1_field
|
|
{
|
|
__IO uint32_t DRQSEL10 : 1;
|
|
__IO uint32_t DRQSEL11 : 1;
|
|
__IO uint32_t DRQSEL12 : 1;
|
|
__IO uint32_t DRQSEL13 : 1;
|
|
__IO uint32_t DRQSEL14 : 1;
|
|
} stc_intreq_drqsel1_field_t;
|
|
|
|
typedef struct stc_intreq_dqesel_field
|
|
{
|
|
__IO uint32_t ESEL100 : 1;
|
|
__IO uint32_t ESEL101 : 1;
|
|
__IO uint32_t ESEL102 : 1;
|
|
__IO uint32_t ESEL103 : 1;
|
|
__IO uint32_t ESEL110 : 1;
|
|
__IO uint32_t ESEL111 : 1;
|
|
__IO uint32_t ESEL112 : 1;
|
|
__IO uint32_t ESEL113 : 1;
|
|
__IO uint32_t ESEL240 : 1;
|
|
__IO uint32_t ESEL241 : 1;
|
|
__IO uint32_t ESEL242 : 1;
|
|
__IO uint32_t ESEL243 : 1;
|
|
__IO uint32_t ESEL250 : 1;
|
|
__IO uint32_t ESEL251 : 1;
|
|
__IO uint32_t ESEL252 : 1;
|
|
__IO uint32_t ESEL253 : 1;
|
|
__IO uint32_t ESEL260 : 1;
|
|
__IO uint32_t ESEL261 : 1;
|
|
__IO uint32_t ESEL262 : 1;
|
|
__IO uint32_t ESEL263 : 1;
|
|
__IO uint32_t ESEL270 : 1;
|
|
__IO uint32_t ESEL271 : 1;
|
|
__IO uint32_t ESEL272 : 1;
|
|
__IO uint32_t ESEL273 : 1;
|
|
__IO uint32_t ESEL300 : 1;
|
|
__IO uint32_t ESEL301 : 1;
|
|
__IO uint32_t ESEL302 : 1;
|
|
__IO uint32_t ESEL303 : 1;
|
|
__IO uint32_t ESEL310 : 1;
|
|
__IO uint32_t ESEL311 : 1;
|
|
__IO uint32_t ESEL312 : 1;
|
|
__IO uint32_t ESEL313 : 1;
|
|
} stc_intreq_dqesel_field_t;
|
|
|
|
typedef struct stc_intreq_oddpks1_field
|
|
{
|
|
__IO uint8_t ODDPKS10 : 1;
|
|
__IO uint8_t ODDPKS11 : 1;
|
|
__IO uint8_t ODDPKS12 : 1;
|
|
__IO uint8_t ODDPKS13 : 1;
|
|
__IO uint8_t ODDPKS14 : 1;
|
|
} stc_intreq_oddpks1_field_t;
|
|
|
|
/******************************************************************************
|
|
* GPIO_MODULE
|
|
******************************************************************************/
|
|
/* GPIO_MODULE register bit fields */
|
|
typedef struct stc_gpio_pfr0_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
} stc_gpio_pfr0_field_t;
|
|
|
|
typedef struct stc_gpio_pfr1_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t PC : 1;
|
|
__IO uint32_t PD : 1;
|
|
__IO uint32_t PE : 1;
|
|
__IO uint32_t PF : 1;
|
|
} stc_gpio_pfr1_field_t;
|
|
|
|
typedef struct stc_gpio_pfr2_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
} stc_gpio_pfr2_field_t;
|
|
|
|
typedef struct stc_gpio_pfr3_field
|
|
{
|
|
uint32_t RESERVED1 : 6;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t PC : 1;
|
|
__IO uint32_t PD : 1;
|
|
__IO uint32_t PE : 1;
|
|
__IO uint32_t PF : 1;
|
|
} stc_gpio_pfr3_field_t;
|
|
|
|
typedef struct stc_gpio_pfr4_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t PC : 1;
|
|
__IO uint32_t PD : 1;
|
|
__IO uint32_t PE : 1;
|
|
} stc_gpio_pfr4_field_t;
|
|
|
|
typedef struct stc_gpio_pfr5_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
} stc_gpio_pfr5_field_t;
|
|
|
|
typedef struct stc_gpio_pfr6_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
} stc_gpio_pfr6_field_t;
|
|
|
|
typedef struct stc_gpio_pfr7_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
} stc_gpio_pfr7_field_t;
|
|
|
|
typedef struct stc_gpio_pfr8_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
} stc_gpio_pfr8_field_t;
|
|
|
|
|
|
typedef struct stc_gpio_pfra_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
} stc_gpio_pfra_field_t;
|
|
|
|
typedef struct stc_gpio_pfrc_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t PC : 1;
|
|
__IO uint32_t PD : 1;
|
|
__IO uint32_t PE : 1;
|
|
__IO uint32_t PF : 1;
|
|
} stc_gpio_pfrc_field_t;
|
|
|
|
typedef struct stc_gpio_pfrd_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
} stc_gpio_pfrd_field_t;
|
|
|
|
typedef struct stc_gpio_pfre_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
uint32_t RESERVED1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
} stc_gpio_pfre_field_t;
|
|
|
|
typedef struct stc_gpio_pfrf_field
|
|
{
|
|
uint32_t RESERVED1 : 5;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
} stc_gpio_pfrf_field_t;
|
|
|
|
typedef struct stc_gpio_pcr0_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
} stc_gpio_pcr0_field_t;
|
|
|
|
typedef struct stc_gpio_pcr1_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t PC : 1;
|
|
__IO uint32_t PD : 1;
|
|
__IO uint32_t PE : 1;
|
|
__IO uint32_t PF : 1;
|
|
} stc_gpio_pcr1_field_t;
|
|
|
|
typedef struct stc_gpio_pcr2_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
} stc_gpio_pcr2_field_t;
|
|
|
|
typedef struct stc_gpio_pcr3_field
|
|
{
|
|
uint32_t RESERVED1 : 6;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t PC : 1;
|
|
__IO uint32_t PD : 1;
|
|
__IO uint32_t PE : 1;
|
|
__IO uint32_t PF : 1;
|
|
} stc_gpio_pcr3_field_t;
|
|
|
|
typedef struct stc_gpio_pcr4_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t PC : 1;
|
|
__IO uint32_t PD : 1;
|
|
__IO uint32_t PE : 1;
|
|
} stc_gpio_pcr4_field_t;
|
|
|
|
typedef struct stc_gpio_pcr5_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
} stc_gpio_pcr5_field_t;
|
|
|
|
typedef struct stc_gpio_pcr6_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
} stc_gpio_pcr6_field_t;
|
|
|
|
typedef struct stc_gpio_pcr7_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
} stc_gpio_pcr7_field_t;
|
|
|
|
typedef struct stc_gpio_pcra_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
} stc_gpio_pcra_field_t;
|
|
|
|
typedef struct stc_gpio_pcrc_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t PC : 1;
|
|
__IO uint32_t PD : 1;
|
|
__IO uint32_t PE : 1;
|
|
__IO uint32_t PF : 1;
|
|
} stc_gpio_pcrc_field_t;
|
|
|
|
typedef struct stc_gpio_pcrd_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
} stc_gpio_pcrd_field_t;
|
|
|
|
typedef struct stc_gpio_pcre_field
|
|
{
|
|
uint32_t RESERVED1 : 2;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
} stc_gpio_pcre_field_t;
|
|
|
|
typedef struct stc_gpio_ddr0_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
} stc_gpio_ddr0_field_t;
|
|
|
|
typedef struct stc_gpio_ddr1_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t PC : 1;
|
|
__IO uint32_t PD : 1;
|
|
__IO uint32_t PE : 1;
|
|
__IO uint32_t PF : 1;
|
|
} stc_gpio_ddr1_field_t;
|
|
|
|
typedef struct stc_gpio_ddr2_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
} stc_gpio_ddr2_field_t;
|
|
|
|
typedef struct stc_gpio_ddr3_field
|
|
{
|
|
uint32_t RESERVED1 : 6;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t PC : 1;
|
|
__IO uint32_t PD : 1;
|
|
__IO uint32_t PE : 1;
|
|
__IO uint32_t PF : 1;
|
|
} stc_gpio_ddr3_field_t;
|
|
|
|
typedef struct stc_gpio_ddr4_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t PC : 1;
|
|
__IO uint32_t PD : 1;
|
|
__IO uint32_t PE : 1;
|
|
} stc_gpio_ddr4_field_t;
|
|
|
|
typedef struct stc_gpio_ddr5_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
} stc_gpio_ddr5_field_t;
|
|
|
|
typedef struct stc_gpio_ddr6_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
} stc_gpio_ddr6_field_t;
|
|
|
|
typedef struct stc_gpio_ddr7_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
} stc_gpio_ddr7_field_t;
|
|
|
|
typedef struct stc_gpio_ddr8_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
} stc_gpio_ddr8_field_t;
|
|
|
|
typedef struct stc_gpio_ddra_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
} stc_gpio_ddra_field_t;
|
|
|
|
typedef struct stc_gpio_ddrc_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t PC : 1;
|
|
__IO uint32_t PD : 1;
|
|
__IO uint32_t PE : 1;
|
|
__IO uint32_t PF : 1;
|
|
} stc_gpio_ddrc_field_t;
|
|
|
|
typedef struct stc_gpio_ddrd_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
} stc_gpio_ddrd_field_t;
|
|
|
|
typedef struct stc_gpio_ddre_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
uint32_t RESERVED1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
} stc_gpio_ddre_field_t;
|
|
|
|
typedef struct stc_gpio_ddrf_field
|
|
{
|
|
uint32_t RESERVED1 : 5;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
} stc_gpio_ddrf_field_t;
|
|
|
|
typedef struct stc_gpio_pdir0_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
} stc_gpio_pdir0_field_t;
|
|
|
|
typedef struct stc_gpio_pdir1_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t PC : 1;
|
|
__IO uint32_t PD : 1;
|
|
__IO uint32_t PE : 1;
|
|
__IO uint32_t PF : 1;
|
|
} stc_gpio_pdir1_field_t;
|
|
|
|
typedef struct stc_gpio_pdir2_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
} stc_gpio_pdir2_field_t;
|
|
|
|
typedef struct stc_gpio_pdir3_field
|
|
{
|
|
uint32_t RESERVED1 : 6;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t PC : 1;
|
|
__IO uint32_t PD : 1;
|
|
__IO uint32_t PE : 1;
|
|
__IO uint32_t PF : 1;
|
|
} stc_gpio_pdir3_field_t;
|
|
|
|
typedef struct stc_gpio_pdir4_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t PC : 1;
|
|
__IO uint32_t PD : 1;
|
|
__IO uint32_t PE : 1;
|
|
} stc_gpio_pdir4_field_t;
|
|
|
|
typedef struct stc_gpio_pdir5_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
} stc_gpio_pdir5_field_t;
|
|
|
|
typedef struct stc_gpio_pdir6_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
} stc_gpio_pdir6_field_t;
|
|
|
|
typedef struct stc_gpio_pdir7_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
} stc_gpio_pdir7_field_t;
|
|
|
|
typedef struct stc_gpio_pdir8_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
} stc_gpio_pdir8_field_t;
|
|
|
|
typedef struct stc_gpio_pdira_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
} stc_gpio_pdira_field_t;
|
|
|
|
typedef struct stc_gpio_pdirc_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t PC : 1;
|
|
__IO uint32_t PD : 1;
|
|
__IO uint32_t PE : 1;
|
|
__IO uint32_t PF : 1;
|
|
} stc_gpio_pdirc_field_t;
|
|
|
|
typedef struct stc_gpio_pdird_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
} stc_gpio_pdird_field_t;
|
|
|
|
typedef struct stc_gpio_pdire_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
uint32_t RESERVED1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
} stc_gpio_pdire_field_t;
|
|
|
|
typedef struct stc_gpio_pdirf_field
|
|
{
|
|
uint32_t RESERVED1 : 5;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
} stc_gpio_pdirf_field_t;
|
|
|
|
typedef struct stc_gpio_pdor0_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
} stc_gpio_pdor0_field_t;
|
|
|
|
typedef struct stc_gpio_pdor1_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t PC : 1;
|
|
__IO uint32_t PD : 1;
|
|
__IO uint32_t PE : 1;
|
|
__IO uint32_t PF : 1;
|
|
} stc_gpio_pdor1_field_t;
|
|
|
|
typedef struct stc_gpio_pdor2_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
} stc_gpio_pdor2_field_t;
|
|
|
|
typedef struct stc_gpio_pdor3_field
|
|
{
|
|
uint32_t RESERVED1 : 6;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t PC : 1;
|
|
__IO uint32_t PD : 1;
|
|
__IO uint32_t PE : 1;
|
|
__IO uint32_t PF : 1;
|
|
} stc_gpio_pdor3_field_t;
|
|
|
|
typedef struct stc_gpio_pdor4_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t PC : 1;
|
|
__IO uint32_t PD : 1;
|
|
__IO uint32_t PE : 1;
|
|
} stc_gpio_pdor4_field_t;
|
|
|
|
typedef struct stc_gpio_pdor5_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
} stc_gpio_pdor5_field_t;
|
|
|
|
typedef struct stc_gpio_pdor6_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
} stc_gpio_pdor6_field_t;
|
|
|
|
typedef struct stc_gpio_pdor7_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
} stc_gpio_pdor7_field_t;
|
|
|
|
typedef struct stc_gpio_pdor8_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
} stc_gpio_pdor8_field_t;
|
|
|
|
typedef struct stc_gpio_pdora_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
} stc_gpio_pdora_field_t;
|
|
|
|
typedef struct stc_gpio_pdorc_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t PC : 1;
|
|
__IO uint32_t PD : 1;
|
|
__IO uint32_t PE : 1;
|
|
__IO uint32_t PF : 1;
|
|
} stc_gpio_pdorc_field_t;
|
|
|
|
typedef struct stc_gpio_pdord_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
} stc_gpio_pdord_field_t;
|
|
|
|
typedef struct stc_gpio_pdore_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
uint32_t RESERVED1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
} stc_gpio_pdore_field_t;
|
|
|
|
typedef struct stc_gpio_pdorf_field
|
|
{
|
|
uint32_t RESERVED1 : 5;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
} stc_gpio_pdorf_field_t;
|
|
|
|
typedef struct stc_gpio_ade_field
|
|
{
|
|
__IO uint32_t AN0 : 1;
|
|
__IO uint32_t AN1 : 1;
|
|
__IO uint32_t AN2 : 1;
|
|
__IO uint32_t AN3 : 1;
|
|
__IO uint32_t AN4 : 1;
|
|
__IO uint32_t AN5 : 1;
|
|
__IO uint32_t AN6 : 1;
|
|
__IO uint32_t AN7 : 1;
|
|
__IO uint32_t AN8 : 1;
|
|
__IO uint32_t AN9 : 1;
|
|
__IO uint32_t AN10 : 1;
|
|
__IO uint32_t AN11 : 1;
|
|
__IO uint32_t AN12 : 1;
|
|
__IO uint32_t AN13 : 1;
|
|
__IO uint32_t AN14 : 1;
|
|
__IO uint32_t AN15 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t AN24 : 1;
|
|
__IO uint32_t AN25 : 1;
|
|
__IO uint32_t AN26 : 1;
|
|
__IO uint32_t AN27 : 1;
|
|
__IO uint32_t AN28 : 1;
|
|
__IO uint32_t AN29 : 1;
|
|
__IO uint32_t AN30 : 1;
|
|
__IO uint32_t AN31 : 1;
|
|
} stc_gpio_ade_field_t;
|
|
|
|
typedef struct stc_gpio_spsr_field
|
|
{
|
|
__IO uint32_t SUBXC : 1;
|
|
uint32_t RESERVED1 : 1;
|
|
__IO uint32_t MAINXC : 1;
|
|
uint32_t RESERVED2 : 1;
|
|
__IO uint32_t USB0C : 1;
|
|
__IO uint32_t USB1C : 1;
|
|
} stc_gpio_spsr_field_t;
|
|
|
|
typedef struct stc_gpio_epfr00_field
|
|
{
|
|
__IO uint32_t NMIS : 1;
|
|
__IO uint32_t CROUTE0 : 1;
|
|
__IO uint32_t CROUTE1 : 1;
|
|
uint32_t RESERVED1 : 3;
|
|
__IO uint32_t SUBOUTE0 : 1;
|
|
__IO uint32_t SUBOUTE1 : 1;
|
|
uint32_t RESERVED2 : 1;
|
|
__IO uint32_t USBP0E : 1;
|
|
uint32_t RESERVED3 : 3;
|
|
__IO uint32_t USBP1E : 1;
|
|
uint32_t RESERVED4 : 2;
|
|
__IO uint32_t JTAGEN0B : 1;
|
|
__IO uint32_t JTAGEN1S : 1;
|
|
uint32_t RESERVED5 : 6;
|
|
__IO uint32_t TRC0E : 1;
|
|
__IO uint32_t TRC1E : 1;
|
|
} stc_gpio_epfr00_field_t;
|
|
|
|
typedef struct stc_gpio_epfr01_field
|
|
{
|
|
__IO uint32_t RTO00E0 : 1;
|
|
__IO uint32_t RTO00E1 : 1;
|
|
__IO uint32_t RTO01E0 : 1;
|
|
__IO uint32_t RTO01E1 : 1;
|
|
__IO uint32_t RTO02E0 : 1;
|
|
__IO uint32_t RTO02E1 : 1;
|
|
__IO uint32_t RTO03E0 : 1;
|
|
__IO uint32_t RTO03E1 : 1;
|
|
__IO uint32_t RTO04E0 : 1;
|
|
__IO uint32_t RTO04E1 : 1;
|
|
__IO uint32_t RTO05E0 : 1;
|
|
__IO uint32_t RTO05E1 : 1;
|
|
__IO uint32_t DTTI0C : 1;
|
|
uint32_t RESERVED1 : 3;
|
|
__IO uint32_t DTTI0S0 : 1;
|
|
__IO uint32_t DTTI0S1 : 1;
|
|
__IO uint32_t FRCK0S0 : 1;
|
|
__IO uint32_t FRCK0S1 : 1;
|
|
__IO uint32_t IC00S0 : 1;
|
|
__IO uint32_t IC00S1 : 1;
|
|
__IO uint32_t IC00S2 : 1;
|
|
__IO uint32_t IC01S0 : 1;
|
|
__IO uint32_t IC01S1 : 1;
|
|
__IO uint32_t IC01S2 : 1;
|
|
__IO uint32_t IC02S0 : 1;
|
|
__IO uint32_t IC02S1 : 1;
|
|
__IO uint32_t IC02S2 : 1;
|
|
__IO uint32_t IC03S0 : 1;
|
|
__IO uint32_t IC03S1 : 1;
|
|
__IO uint32_t IC03S2 : 1;
|
|
} stc_gpio_epfr01_field_t;
|
|
|
|
typedef struct stc_gpio_epfr02_field
|
|
{
|
|
__IO uint32_t RTO10E0 : 1;
|
|
__IO uint32_t RTO10E1 : 1;
|
|
__IO uint32_t RTO11E0 : 1;
|
|
__IO uint32_t RTO11E1 : 1;
|
|
__IO uint32_t RTO12E0 : 1;
|
|
__IO uint32_t RTO12E1 : 1;
|
|
__IO uint32_t RTO13E0 : 1;
|
|
__IO uint32_t RTO13E1 : 1;
|
|
__IO uint32_t RTO14E0 : 1;
|
|
__IO uint32_t RTO14E1 : 1;
|
|
__IO uint32_t RTO15E0 : 1;
|
|
__IO uint32_t RTO15E1 : 1;
|
|
__IO uint32_t DTTI1C : 1;
|
|
uint32_t RESERVED1 : 3;
|
|
__IO uint32_t DTTI1S0 : 1;
|
|
__IO uint32_t DTTI1S1 : 1;
|
|
__IO uint32_t FRCK1S0 : 1;
|
|
__IO uint32_t FRCK1S1 : 1;
|
|
__IO uint32_t IC10S0 : 1;
|
|
__IO uint32_t IC10S1 : 1;
|
|
__IO uint32_t IC10S2 : 1;
|
|
__IO uint32_t IC11S0 : 1;
|
|
__IO uint32_t IC11S1 : 1;
|
|
__IO uint32_t IC11S2 : 1;
|
|
__IO uint32_t IC12S0 : 1;
|
|
__IO uint32_t IC12S1 : 1;
|
|
__IO uint32_t IC12S2 : 1;
|
|
__IO uint32_t IC13S0 : 1;
|
|
__IO uint32_t IC13S1 : 1;
|
|
__IO uint32_t IC13S2 : 1;
|
|
} stc_gpio_epfr02_field_t;
|
|
|
|
typedef struct stc_gpio_epfr03_field
|
|
{
|
|
__IO uint32_t RTO20E0 : 1;
|
|
__IO uint32_t RTO20E1 : 1;
|
|
__IO uint32_t RTO21E0 : 1;
|
|
__IO uint32_t RTO21E1 : 1;
|
|
__IO uint32_t RTO22E0 : 1;
|
|
__IO uint32_t RTO22E1 : 1;
|
|
__IO uint32_t RTO23E0 : 1;
|
|
__IO uint32_t RTO23E1 : 1;
|
|
__IO uint32_t RTO24E0 : 1;
|
|
__IO uint32_t RTO24E1 : 1;
|
|
__IO uint32_t RTO25E0 : 1;
|
|
__IO uint32_t RTO25E1 : 1;
|
|
__IO uint32_t DTTI2C : 1;
|
|
uint32_t RESERVED1 : 3;
|
|
__IO uint32_t DTTI2S0 : 1;
|
|
__IO uint32_t DTTI2S1 : 1;
|
|
__IO uint32_t FRCK2S0 : 1;
|
|
__IO uint32_t FRCK2S1 : 1;
|
|
__IO uint32_t IC20S0 : 1;
|
|
__IO uint32_t IC20S1 : 1;
|
|
__IO uint32_t IC20S2 : 1;
|
|
__IO uint32_t IC21S0 : 1;
|
|
__IO uint32_t IC21S1 : 1;
|
|
__IO uint32_t IC21S2 : 1;
|
|
__IO uint32_t IC22S0 : 1;
|
|
__IO uint32_t IC22S1 : 1;
|
|
__IO uint32_t IC22S2 : 1;
|
|
__IO uint32_t IC23S0 : 1;
|
|
__IO uint32_t IC23S1 : 1;
|
|
__IO uint32_t IC23S2 : 1;
|
|
} stc_gpio_epfr03_field_t;
|
|
|
|
typedef struct stc_gpio_epfr04_field
|
|
{
|
|
uint32_t RESERVED1 : 2;
|
|
__IO uint32_t TIOA0E0 : 1;
|
|
__IO uint32_t TIOA0E1 : 1;
|
|
__IO uint32_t TIOB0S0 : 1;
|
|
__IO uint32_t TIOB0S1 : 1;
|
|
uint32_t RESERVED2 : 2;
|
|
__IO uint32_t TIOA1S0 : 1;
|
|
__IO uint32_t TIOA1S1 : 1;
|
|
__IO uint32_t TIOA1E0 : 1;
|
|
__IO uint32_t TIOA1E1 : 1;
|
|
__IO uint32_t TIOB1S0 : 1;
|
|
__IO uint32_t TIOB1S1 : 1;
|
|
uint32_t RESERVED3 : 4;
|
|
__IO uint32_t TIOA2E0 : 1;
|
|
__IO uint32_t TIOA2E1 : 1;
|
|
__IO uint32_t TIOB2S0 : 1;
|
|
__IO uint32_t TIOB2S1 : 1;
|
|
uint32_t RESERVED4 : 2;
|
|
__IO uint32_t TIOA3S0 : 1;
|
|
__IO uint32_t TIOA3S1 : 1;
|
|
__IO uint32_t TIOA3E0 : 1;
|
|
__IO uint32_t TIOA3E1 : 1;
|
|
__IO uint32_t TIOB3S0 : 1;
|
|
__IO uint32_t TIOB3S1 : 1;
|
|
} stc_gpio_epfr04_field_t;
|
|
|
|
typedef struct stc_gpio_epfr05_field
|
|
{
|
|
uint32_t RESERVED1 : 2;
|
|
__IO uint32_t TIOA4E0 : 1;
|
|
__IO uint32_t TIOA4E1 : 1;
|
|
__IO uint32_t TIOB4S0 : 1;
|
|
__IO uint32_t TIOB4S1 : 1;
|
|
uint32_t RESERVED2 : 2;
|
|
__IO uint32_t TIOA5S0 : 1;
|
|
__IO uint32_t TIOA5S1 : 1;
|
|
__IO uint32_t TIOA5E0 : 1;
|
|
__IO uint32_t TIOA5E1 : 1;
|
|
__IO uint32_t TIOB5S0 : 1;
|
|
__IO uint32_t TIOB5S1 : 1;
|
|
uint32_t RESERVED3 : 4;
|
|
__IO uint32_t TIOA6E0 : 1;
|
|
__IO uint32_t TIOA6E1 : 1;
|
|
__IO uint32_t TIOB6S0 : 1;
|
|
__IO uint32_t TIOB6S1 : 1;
|
|
uint32_t RESERVED4 : 2;
|
|
__IO uint32_t TIOA7S0 : 1;
|
|
__IO uint32_t TIOA7S1 : 1;
|
|
__IO uint32_t TIOA7E0 : 1;
|
|
__IO uint32_t TIOA7E1 : 1;
|
|
__IO uint32_t TIOB7S0 : 1;
|
|
__IO uint32_t TIOB7S1 : 1;
|
|
} stc_gpio_epfr05_field_t;
|
|
|
|
typedef struct stc_gpio_epfr06_field
|
|
{
|
|
__IO uint32_t EINT00S0 : 1;
|
|
__IO uint32_t EINT00S1 : 1;
|
|
__IO uint32_t EINT01S0 : 1;
|
|
__IO uint32_t EINT01S1 : 1;
|
|
__IO uint32_t EINT02S0 : 1;
|
|
__IO uint32_t EINT02S1 : 1;
|
|
__IO uint32_t EINT03S0 : 1;
|
|
__IO uint32_t EINT03S1 : 1;
|
|
__IO uint32_t EINT04S0 : 1;
|
|
__IO uint32_t EINT04S1 : 1;
|
|
__IO uint32_t EINT05S0 : 1;
|
|
__IO uint32_t EINT05S1 : 1;
|
|
__IO uint32_t EINT06S0 : 1;
|
|
__IO uint32_t EINT06S1 : 1;
|
|
__IO uint32_t EINT07S0 : 1;
|
|
__IO uint32_t EINT07S1 : 1;
|
|
__IO uint32_t EINT08S0 : 1;
|
|
__IO uint32_t EINT08S1 : 1;
|
|
__IO uint32_t EINT09S0 : 1;
|
|
__IO uint32_t EINT09S1 : 1;
|
|
__IO uint32_t EINT10S0 : 1;
|
|
__IO uint32_t EINT10S1 : 1;
|
|
__IO uint32_t EINT11S0 : 1;
|
|
__IO uint32_t EINT11S1 : 1;
|
|
__IO uint32_t EINT12S0 : 1;
|
|
__IO uint32_t EINT12S1 : 1;
|
|
__IO uint32_t EINT13S0 : 1;
|
|
__IO uint32_t EINT13S1 : 1;
|
|
__IO uint32_t EINT14S0 : 1;
|
|
__IO uint32_t EINT14S1 : 1;
|
|
__IO uint32_t EINT15S0 : 1;
|
|
__IO uint32_t EINT15S1 : 1;
|
|
} stc_gpio_epfr06_field_t;
|
|
|
|
typedef struct stc_gpio_epfr07_field
|
|
{
|
|
uint32_t RESERVED1 : 4;
|
|
__IO uint32_t SIN0S0 : 1;
|
|
__IO uint32_t SIN0S1 : 1;
|
|
__IO uint32_t SOT0B0 : 1;
|
|
__IO uint32_t SOT0B1 : 1;
|
|
__IO uint32_t SCK0B0 : 1;
|
|
__IO uint32_t SCK0B1 : 1;
|
|
__IO uint32_t SIN1S0 : 1;
|
|
__IO uint32_t SIN1S1 : 1;
|
|
__IO uint32_t SOT1B0 : 1;
|
|
__IO uint32_t SOT1B1 : 1;
|
|
__IO uint32_t SCK1B0 : 1;
|
|
__IO uint32_t SCK1B1 : 1;
|
|
__IO uint32_t SIN2S0 : 1;
|
|
__IO uint32_t SIN2S1 : 1;
|
|
__IO uint32_t SOT2B0 : 1;
|
|
__IO uint32_t SOT2B1 : 1;
|
|
__IO uint32_t SCK2B0 : 1;
|
|
__IO uint32_t SCK2B1 : 1;
|
|
__IO uint32_t SIN3S0 : 1;
|
|
__IO uint32_t SIN3S1 : 1;
|
|
__IO uint32_t SOT3B0 : 1;
|
|
__IO uint32_t SOT3B1 : 1;
|
|
__IO uint32_t SCK3B0 : 1;
|
|
__IO uint32_t SCK3B1 : 1;
|
|
} stc_gpio_epfr07_field_t;
|
|
|
|
typedef struct stc_gpio_epfr08_field
|
|
{
|
|
__IO uint32_t RTS4E0 : 1;
|
|
__IO uint32_t RTS4E1 : 1;
|
|
__IO uint32_t CTS4S0 : 1;
|
|
__IO uint32_t CTS4S1 : 1;
|
|
__IO uint32_t SIN4S0 : 1;
|
|
__IO uint32_t SIN4S1 : 1;
|
|
__IO uint32_t SOT4B0 : 1;
|
|
__IO uint32_t SOT4B1 : 1;
|
|
__IO uint32_t SCK4B0 : 1;
|
|
__IO uint32_t SCK4B1 : 1;
|
|
__IO uint32_t SIN5S0 : 1;
|
|
__IO uint32_t SIN5S1 : 1;
|
|
__IO uint32_t SOT5B0 : 1;
|
|
__IO uint32_t SOT5B1 : 1;
|
|
__IO uint32_t SCK5B0 : 1;
|
|
__IO uint32_t SCK5B1 : 1;
|
|
__IO uint32_t SIN6S0 : 1;
|
|
__IO uint32_t SIN6S1 : 1;
|
|
__IO uint32_t SOT6B0 : 1;
|
|
__IO uint32_t SOT6B1 : 1;
|
|
__IO uint32_t SCK6B0 : 1;
|
|
__IO uint32_t SCK6B1 : 1;
|
|
__IO uint32_t SIN7S0 : 1;
|
|
__IO uint32_t SIN7S1 : 1;
|
|
__IO uint32_t SOT7B0 : 1;
|
|
__IO uint32_t SOT7B1 : 1;
|
|
__IO uint32_t SCK7B0 : 1;
|
|
__IO uint32_t SCK7B1 : 1;
|
|
} stc_gpio_epfr08_field_t;
|
|
|
|
typedef struct stc_gpio_epfr09_field
|
|
{
|
|
__IO uint32_t QAIN0S0 : 1;
|
|
__IO uint32_t QAIN0S1 : 1;
|
|
__IO uint32_t QBIN0S0 : 1;
|
|
__IO uint32_t QBIN0S1 : 1;
|
|
__IO uint32_t QZIN0S0 : 1;
|
|
__IO uint32_t QZIN0S1 : 1;
|
|
__IO uint32_t QAIN1S0 : 1;
|
|
__IO uint32_t QAIN1S1 : 1;
|
|
__IO uint32_t QBIN1S0 : 1;
|
|
__IO uint32_t QBIN1S1 : 1;
|
|
__IO uint32_t QZIN1S0 : 1;
|
|
__IO uint32_t QZIN1S1 : 1;
|
|
__IO uint32_t ADTRG0S0 : 1;
|
|
__IO uint32_t ADTRG0S1 : 1;
|
|
__IO uint32_t ADTRG0S2 : 1;
|
|
__IO uint32_t ADTRG0S3 : 1;
|
|
__IO uint32_t ADTRG1S0 : 1;
|
|
__IO uint32_t ADTRG1S1 : 1;
|
|
__IO uint32_t ADTRG1S2 : 1;
|
|
__IO uint32_t ADTRG1S3 : 1;
|
|
__IO uint32_t ADTRG2S0 : 1;
|
|
__IO uint32_t ADTRG2S1 : 1;
|
|
__IO uint32_t ADTRG2S2 : 1;
|
|
__IO uint32_t ADTRG2S3 : 1;
|
|
} stc_gpio_epfr09_field_t;
|
|
|
|
typedef struct stc_gpio_epfr10_field
|
|
{
|
|
__IO uint32_t UEDEFB : 1;
|
|
__IO uint32_t UEDTHB : 1;
|
|
__IO uint32_t UECLKE : 1;
|
|
__IO uint32_t UEWEXE : 1;
|
|
__IO uint32_t UEDQME : 1;
|
|
__IO uint32_t UEOEXE : 1;
|
|
__IO uint32_t UEFLSE : 1;
|
|
__IO uint32_t UECS1E : 1;
|
|
__IO uint32_t UECS2E : 1;
|
|
__IO uint32_t UECS3E : 1;
|
|
__IO uint32_t UECS4E : 1;
|
|
__IO uint32_t UECS5E : 1;
|
|
__IO uint32_t UECS6E : 1;
|
|
__IO uint32_t UECS7E : 1;
|
|
__IO uint32_t UEAOOE : 1;
|
|
__IO uint32_t UEA08E : 1;
|
|
__IO uint32_t UEA09E : 1;
|
|
__IO uint32_t UEA10E : 1;
|
|
__IO uint32_t UEA11E : 1;
|
|
__IO uint32_t UEA12E : 1;
|
|
__IO uint32_t UEA13E : 1;
|
|
__IO uint32_t UEA14E : 1;
|
|
__IO uint32_t UEA15E : 1;
|
|
__IO uint32_t UEA16E : 1;
|
|
__IO uint32_t UEA17E : 1;
|
|
__IO uint32_t UEA18E : 1;
|
|
} stc_gpio_epfr10_field_t;
|
|
|
|
typedef struct stc_gpio_epfr11_field
|
|
{
|
|
__IO uint32_t UEALEE : 1;
|
|
__IO uint32_t UECS0E : 1;
|
|
__IO uint32_t UEA01E : 1;
|
|
__IO uint32_t UEA02E : 1;
|
|
__IO uint32_t UEA03E : 1;
|
|
__IO uint32_t UEA04E : 1;
|
|
__IO uint32_t UEA05E : 1;
|
|
__IO uint32_t UEA06E : 1;
|
|
__IO uint32_t UEA07E : 1;
|
|
__IO uint32_t UED00B : 1;
|
|
__IO uint32_t UED01B : 1;
|
|
__IO uint32_t UED02B : 1;
|
|
__IO uint32_t UED03B : 1;
|
|
__IO uint32_t UED04B : 1;
|
|
__IO uint32_t UED05B : 1;
|
|
__IO uint32_t UED06B : 1;
|
|
__IO uint32_t UED07B : 1;
|
|
__IO uint32_t UED08B : 1;
|
|
__IO uint32_t UED09B : 1;
|
|
__IO uint32_t UED10B : 1;
|
|
__IO uint32_t UED11B : 1;
|
|
__IO uint32_t UED12B : 1;
|
|
__IO uint32_t UED13B : 1;
|
|
__IO uint32_t UED14B : 1;
|
|
__IO uint32_t UED15B : 1;
|
|
__IO uint32_t UERLC : 1;
|
|
} stc_gpio_epfr11_field_t;
|
|
|
|
typedef struct stc_gpio_epfr12_field
|
|
{
|
|
uint32_t RESERVED1 : 2;
|
|
__IO uint32_t TIOA8E0 : 1;
|
|
__IO uint32_t TIOA8E1 : 1;
|
|
__IO uint32_t TIOB8S0 : 1;
|
|
__IO uint32_t TIOB8S1 : 1;
|
|
uint32_t RESERVED2 : 2;
|
|
__IO uint32_t TIOA9S0 : 1;
|
|
__IO uint32_t TIOA9S1 : 1;
|
|
__IO uint32_t TIOA9E0 : 1;
|
|
__IO uint32_t TIOA9E1 : 1;
|
|
__IO uint32_t TIOB9S0 : 1;
|
|
__IO uint32_t TIOB9S1 : 1;
|
|
uint32_t RESERVED3 : 4;
|
|
__IO uint32_t TIOA10E0 : 1;
|
|
__IO uint32_t TIOA10E1 : 1;
|
|
__IO uint32_t TIOB10S0 : 1;
|
|
__IO uint32_t TIOB10S1 : 1;
|
|
uint32_t RESERVED4 : 2;
|
|
__IO uint32_t TIOA11S0 : 1;
|
|
__IO uint32_t TIOA11S1 : 1;
|
|
__IO uint32_t TIOA11E0 : 1;
|
|
__IO uint32_t TIOA11E1 : 1;
|
|
__IO uint32_t TIOB11S0 : 1;
|
|
__IO uint32_t TIOB11S1 : 1;
|
|
} stc_gpio_epfr12_field_t;
|
|
|
|
typedef struct stc_gpio_epfr13_field
|
|
{
|
|
uint32_t RESERVED1 : 2;
|
|
__IO uint32_t TIOA12E0 : 1;
|
|
__IO uint32_t TIOA12E1 : 1;
|
|
__IO uint32_t TIOB12S0 : 1;
|
|
__IO uint32_t TIOB12S1 : 1;
|
|
uint32_t RESERVED2 : 2;
|
|
__IO uint32_t TIOA13S0 : 1;
|
|
__IO uint32_t TIOA13S1 : 1;
|
|
__IO uint32_t TIOA13E0 : 1;
|
|
__IO uint32_t TIOA13E1 : 1;
|
|
__IO uint32_t TIOB13S0 : 1;
|
|
__IO uint32_t TIOB13S1 : 1;
|
|
uint32_t RESERVED3 : 4;
|
|
__IO uint32_t TIOA14E0 : 1;
|
|
__IO uint32_t TIOA14E1 : 1;
|
|
__IO uint32_t TIOB14S0 : 1;
|
|
__IO uint32_t TIOB14S1 : 1;
|
|
uint32_t RESERVED4 : 2;
|
|
__IO uint32_t TIOA15S0 : 1;
|
|
__IO uint32_t TIOA15S1 : 1;
|
|
__IO uint32_t TIOA15E0 : 1;
|
|
__IO uint32_t TIOA15E1 : 1;
|
|
__IO uint32_t TIOB15S0 : 1;
|
|
__IO uint32_t TIOB15S1 : 1;
|
|
} stc_gpio_epfr13_field_t;
|
|
|
|
typedef struct stc_gpio_epfr14_field
|
|
{
|
|
__IO uint32_t QAIN2S0 : 1;
|
|
__IO uint32_t QAIN2S1 : 1;
|
|
__IO uint32_t QBIN2S0 : 1;
|
|
__IO uint32_t QBIN2S1 : 1;
|
|
__IO uint32_t QZIN2S0 : 1;
|
|
__IO uint32_t QZIN2S1 : 1;
|
|
uint32_t RESERVED1 : 12;
|
|
__IO uint32_t E_TD0E : 1;
|
|
__IO uint32_t E_TD1E : 1;
|
|
__IO uint32_t E_TE0E : 1;
|
|
__IO uint32_t E_TE1E : 1;
|
|
__IO uint32_t E_MC0E : 1;
|
|
__IO uint32_t E_MC1B : 1;
|
|
__IO uint32_t E_MD0B : 1;
|
|
__IO uint32_t E_MD1B : 1;
|
|
__IO uint32_t E_CKE : 1;
|
|
__IO uint32_t E_PSE : 1;
|
|
__IO uint32_t E_SPLC0 : 1;
|
|
__IO uint32_t E_SPLC1 : 1;
|
|
} stc_gpio_epfr14_field_t;
|
|
|
|
typedef struct stc_gpio_epfr15_field
|
|
{
|
|
__IO uint32_t EINT16S0 : 1;
|
|
__IO uint32_t EINT16S1 : 1;
|
|
__IO uint32_t EINT17S0 : 1;
|
|
__IO uint32_t EINT17S1 : 1;
|
|
__IO uint32_t EINT18S0 : 1;
|
|
__IO uint32_t EINT18S1 : 1;
|
|
__IO uint32_t EINT19S0 : 1;
|
|
__IO uint32_t EINT19S1 : 1;
|
|
__IO uint32_t EINT20S0 : 1;
|
|
__IO uint32_t EINT20S1 : 1;
|
|
__IO uint32_t EINT21S0 : 1;
|
|
__IO uint32_t EINT21S1 : 1;
|
|
__IO uint32_t EINT22S0 : 1;
|
|
__IO uint32_t EINT22S1 : 1;
|
|
__IO uint32_t EINT23S0 : 1;
|
|
__IO uint32_t EINT23S1 : 1;
|
|
__IO uint32_t EINT24S0 : 1;
|
|
__IO uint32_t EINT24S1 : 1;
|
|
__IO uint32_t EINT25S0 : 1;
|
|
__IO uint32_t EINT25S1 : 1;
|
|
__IO uint32_t EINT26S0 : 1;
|
|
__IO uint32_t EINT26S1 : 1;
|
|
__IO uint32_t EINT27S0 : 1;
|
|
__IO uint32_t EINT27S1 : 1;
|
|
__IO uint32_t EINT28S0 : 1;
|
|
__IO uint32_t EINT28S1 : 1;
|
|
__IO uint32_t EINT29S0 : 1;
|
|
__IO uint32_t EINT29S1 : 1;
|
|
__IO uint32_t EINT30S0 : 1;
|
|
__IO uint32_t EINT30S1 : 1;
|
|
__IO uint32_t EINT31S0 : 1;
|
|
__IO uint32_t EINT31S1 : 1;
|
|
} stc_gpio_epfr15_field_t;
|
|
|
|
typedef struct stc_gpio_pzr0_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
} stc_gpio_pzr0_field_t;
|
|
|
|
typedef struct stc_gpio_pzr1_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t PC : 1;
|
|
__IO uint32_t PD : 1;
|
|
__IO uint32_t PE : 1;
|
|
__IO uint32_t PF : 1;
|
|
} stc_gpio_pzr1_field_t;
|
|
|
|
typedef struct stc_gpio_pzr2_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
} stc_gpio_pzr2_field_t;
|
|
|
|
typedef struct stc_gpio_pzr3_field
|
|
{
|
|
uint32_t RESERVED1 : 6;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t PC : 1;
|
|
__IO uint32_t PD : 1;
|
|
__IO uint32_t PE : 1;
|
|
__IO uint32_t PF : 1;
|
|
} stc_gpio_pzr3_field_t;
|
|
|
|
typedef struct stc_gpio_pzr4_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t PC : 1;
|
|
__IO uint32_t PD : 1;
|
|
__IO uint32_t PE : 1;
|
|
} stc_gpio_pzr4_field_t;
|
|
|
|
typedef struct stc_gpio_pzr5_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
} stc_gpio_pzr5_field_t;
|
|
|
|
typedef struct stc_gpio_pzr6_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
} stc_gpio_pzr6_field_t;
|
|
|
|
typedef struct stc_gpio_pzr7_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
} stc_gpio_pzr7_field_t;
|
|
|
|
typedef struct stc_gpio_pzr8_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
} stc_gpio_pzr8_field_t;
|
|
|
|
typedef struct stc_gpio_pzra_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
} stc_gpio_pzra_field_t;
|
|
|
|
typedef struct stc_gpio_pzrc_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
__IO uint32_t P4 : 1;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
__IO uint32_t P7 : 1;
|
|
__IO uint32_t P8 : 1;
|
|
__IO uint32_t P9 : 1;
|
|
__IO uint32_t PA : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t PC : 1;
|
|
__IO uint32_t PD : 1;
|
|
__IO uint32_t PE : 1;
|
|
__IO uint32_t PF : 1;
|
|
} stc_gpio_pzrc_field_t;
|
|
|
|
typedef struct stc_gpio_pzrd_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
__IO uint32_t P1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
} stc_gpio_pzrd_field_t;
|
|
|
|
typedef struct stc_gpio_pzre_field
|
|
{
|
|
__IO uint32_t P0 : 1;
|
|
uint32_t RESERVED1 : 1;
|
|
__IO uint32_t P2 : 1;
|
|
__IO uint32_t P3 : 1;
|
|
} stc_gpio_pzre_field_t;
|
|
|
|
typedef struct stc_gpio_pzrf_field
|
|
{
|
|
uint32_t RESERVED1 : 5;
|
|
__IO uint32_t P5 : 1;
|
|
__IO uint32_t P6 : 1;
|
|
} stc_gpio_pzrf_field_t;
|
|
|
|
/******************************************************************************
|
|
* LVD_MODULE
|
|
******************************************************************************/
|
|
/* LVD_MODULE register bit fields */
|
|
typedef struct stc_lvd_lvd_ctl_field
|
|
{
|
|
uint8_t RESERVED1 : 2;
|
|
__IO uint8_t SVHI0 : 1;
|
|
__IO uint8_t SVHI1 : 1;
|
|
__IO uint8_t SVHI2 : 1;
|
|
__IO uint8_t SVHI3 : 1;
|
|
uint8_t RESERVED2 : 1;
|
|
__IO uint8_t LVDIE : 1;
|
|
} stc_lvd_lvd_ctl_field_t;
|
|
|
|
typedef struct stc_lvd_lvd_str_field
|
|
{
|
|
uint8_t RESERVED1 : 7;
|
|
__IO uint8_t LVDIR : 1;
|
|
} stc_lvd_lvd_str_field_t;
|
|
|
|
typedef struct stc_lvd_lvd_clr_field
|
|
{
|
|
uint8_t RESERVED1 : 7;
|
|
__IO uint8_t LVDCL : 1;
|
|
} stc_lvd_lvd_clr_field_t;
|
|
|
|
typedef struct stc_lvd_lvd_str2_field
|
|
{
|
|
uint8_t RESERVED1 : 7;
|
|
__IO uint8_t LVDIRDY : 1;
|
|
} stc_lvd_lvd_str2_field_t;
|
|
|
|
/******************************************************************************
|
|
* USB Ethernet CLK
|
|
******************************************************************************/
|
|
/* USB ETHERNET CLK register bit fields */
|
|
typedef struct stc_usbethernetclk_uccr_field
|
|
{
|
|
__IO uint8_t UCEN0 : 1;
|
|
__IO uint8_t UCSEL0 : 1;
|
|
__IO uint8_t UCSEL1 : 1;
|
|
__IO uint8_t UCEN1 : 1;
|
|
__IO uint8_t ECEN : 1;
|
|
__IO uint8_t ECSEL0 : 1;
|
|
__IO uint8_t ECSEL1 : 1;
|
|
} stc_usbethernetclk_uccr_field_t;
|
|
|
|
typedef struct stc_usbethernetclk_upcr1_field
|
|
{
|
|
__IO uint8_t UPLLEN : 1;
|
|
__IO uint8_t UPINC : 1;
|
|
} stc_usbethernetclk_upcr1_field_t;
|
|
|
|
typedef struct stc_usbethernetclk_upcr2_field
|
|
{
|
|
__IO uint8_t UPOWT0 : 1;
|
|
__IO uint8_t UPOWT1 : 1;
|
|
__IO uint8_t UPOWT2 : 1;
|
|
} stc_usbethernetclk_upcr2_field_t;
|
|
|
|
typedef struct stc_usbethernetclk_upcr3_field
|
|
{
|
|
__IO uint8_t UPLLK0 : 1;
|
|
__IO uint8_t UPLLK1 : 1;
|
|
__IO uint8_t UPLLK2 : 1;
|
|
__IO uint8_t UPLLK3 : 1;
|
|
__IO uint8_t UPLLK4 : 1;
|
|
} stc_usbethernetclk_upcr3_field_t;
|
|
|
|
typedef struct stc_usbethernetclk_upcr4_field
|
|
{
|
|
__IO uint8_t UPLLN0 : 1;
|
|
__IO uint8_t UPLLN1 : 1;
|
|
__IO uint8_t UPLLN2 : 1;
|
|
__IO uint8_t UPLLN3 : 1;
|
|
__IO uint8_t UPLLN4 : 1;
|
|
__IO uint8_t UPLLN5 : 1;
|
|
__IO uint8_t UPLLN6 : 1;
|
|
} stc_usbethernetclk_upcr4_field_t;
|
|
|
|
typedef struct stc_usbethernetclk_up_str_field
|
|
{
|
|
__IO uint8_t UPRDY : 1;
|
|
} stc_usbethernetclk_up_str_field_t;
|
|
|
|
typedef struct stc_usbethernetclk_upint_enr_field
|
|
{
|
|
__IO uint8_t UPCSE : 1;
|
|
} stc_usbethernetclk_upint_enr_field_t;
|
|
|
|
typedef struct stc_usbethernetclk_upint_clr_field
|
|
{
|
|
__IO uint8_t UPCSC : 1;
|
|
} stc_usbethernetclk_upint_clr_field_t;
|
|
|
|
typedef struct stc_usbethernetclk_upint_str_field
|
|
{
|
|
__IO uint8_t UPCSI : 1;
|
|
} stc_usbethernetclk_upint_str_field_t;
|
|
|
|
typedef struct stc_usbethernetclk_upcr5_field
|
|
{
|
|
__IO uint8_t UPLLM0 : 1;
|
|
__IO uint8_t UPLLM1 : 1;
|
|
__IO uint8_t UPLLM2 : 1;
|
|
__IO uint8_t UPLLM3 : 1;
|
|
} stc_usbethernetclk_upcr5_field_t;
|
|
|
|
typedef struct stc_usbethernetclk_upcr6_field
|
|
{
|
|
__IO uint8_t UBSR0 : 1;
|
|
__IO uint8_t UBSR1 : 1;
|
|
__IO uint8_t UBSR2 : 1;
|
|
__IO uint8_t UBSR3 : 1;
|
|
} stc_usbethernetclk_upcr6_field_t;
|
|
|
|
typedef struct stc_usbethernetclk_upcr7_field
|
|
{
|
|
__IO uint8_t EPLLEN : 1;
|
|
} stc_usbethernetclk_upcr7_field_t;
|
|
|
|
typedef struct stc_usbethernetclk_usben0_field
|
|
{
|
|
__IO uint8_t USBEN0 : 1;
|
|
} stc_usbethernetclk_usben0_field_t;
|
|
|
|
typedef struct stc_usbethernetclk_usben1_field
|
|
{
|
|
__IO uint8_t USBEN1 : 1;
|
|
} stc_usbethernetclk_usben1_field_t;
|
|
|
|
/******************************************************************************
|
|
* MFS03_UART_MODULE
|
|
******************************************************************************/
|
|
/* MFS03_UART_MODULE register bit fields */
|
|
typedef struct stc_mfs03_uart_smr_field
|
|
{
|
|
__IO uint8_t SOE : 1;
|
|
uint8_t RESERVED1 : 1;
|
|
__IO uint8_t BDS : 1;
|
|
__IO uint8_t SBL : 1;
|
|
__IO uint8_t WUCR : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t MD2 : 1;
|
|
} stc_mfs03_uart_smr_field_t;
|
|
|
|
typedef struct stc_mfs03_uart_scr_field
|
|
{
|
|
__IO uint8_t TXE : 1;
|
|
__IO uint8_t RXE : 1;
|
|
__IO uint8_t TBIE : 1;
|
|
__IO uint8_t TIE : 1;
|
|
__IO uint8_t RIE : 1;
|
|
uint8_t RESERVED1 : 2;
|
|
__IO uint8_t UPCL : 1;
|
|
} stc_mfs03_uart_scr_field_t;
|
|
|
|
typedef struct stc_mfs03_uart_escr_field
|
|
{
|
|
__IO uint8_t L0 : 1;
|
|
__IO uint8_t L1 : 1;
|
|
__IO uint8_t L2 : 1;
|
|
__IO uint8_t P : 1;
|
|
__IO uint8_t PEN : 1;
|
|
__IO uint8_t INV : 1;
|
|
__IO uint8_t ESBL : 1;
|
|
__IO uint8_t FLWEN : 1;
|
|
} stc_mfs03_uart_escr_field_t;
|
|
|
|
typedef struct stc_mfs03_uart_ssr_field
|
|
{
|
|
__IO uint8_t TBI : 1;
|
|
__IO uint8_t TDRE : 1;
|
|
__IO uint8_t RDRF : 1;
|
|
__IO uint8_t ORE : 1;
|
|
__IO uint8_t FRE : 1;
|
|
__IO uint8_t PE : 1;
|
|
uint8_t RESERVED1 : 1;
|
|
__IO uint8_t REC : 1;
|
|
} stc_mfs03_uart_ssr_field_t;
|
|
|
|
typedef struct stc_mfs03_uart_rdr_field
|
|
{
|
|
uint16_t RESERVED1 : 8;
|
|
__IO uint16_t AD : 1;
|
|
} stc_mfs03_uart_rdr_field_t;
|
|
|
|
typedef struct stc_mfs03_uart_tdr_field
|
|
{
|
|
uint16_t RESERVED1 : 8;
|
|
__IO uint16_t AD : 1;
|
|
} stc_mfs03_uart_tdr_field_t;
|
|
|
|
typedef struct stc_mfs03_uart_bgr_field
|
|
{
|
|
uint16_t RESERVED1 : 15;
|
|
__IO uint16_t EXT : 1;
|
|
} stc_mfs03_uart_bgr_field_t;
|
|
|
|
typedef struct stc_mfs03_uart_bgr1_field
|
|
{
|
|
uint8_t RESERVED1 : 7;
|
|
__IO uint8_t EXT : 1;
|
|
} stc_mfs03_uart_bgr1_field_t;
|
|
|
|
/******************************************************************************
|
|
* MFS03_CSIO_MODULE
|
|
******************************************************************************/
|
|
/* MFS03_CSIO_MODULE register bit fields */
|
|
typedef struct stc_mfs03_csio_smr_field
|
|
{
|
|
__IO uint8_t SOE : 1;
|
|
__IO uint8_t SCKE : 1;
|
|
__IO uint8_t BDS : 1;
|
|
__IO uint8_t SCINV : 1;
|
|
__IO uint8_t WUCR : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t MD2 : 1;
|
|
} stc_mfs03_csio_smr_field_t;
|
|
|
|
typedef struct stc_mfs03_csio_scr_field
|
|
{
|
|
__IO uint8_t TXE : 1;
|
|
__IO uint8_t RXE : 1;
|
|
__IO uint8_t TBIE : 1;
|
|
__IO uint8_t TIE : 1;
|
|
__IO uint8_t RIE : 1;
|
|
__IO uint8_t SPI : 1;
|
|
__IO uint8_t MS : 1;
|
|
__IO uint8_t UPCL : 1;
|
|
} stc_mfs03_csio_scr_field_t;
|
|
|
|
typedef struct stc_mfs03_csio_escr_field
|
|
{
|
|
__IO uint8_t L0 : 1;
|
|
__IO uint8_t L1 : 1;
|
|
__IO uint8_t L2 : 1;
|
|
__IO uint8_t WT0 : 1;
|
|
__IO uint8_t WT1 : 1;
|
|
uint8_t RESERVED1 : 2;
|
|
__IO uint8_t SOP : 1;
|
|
} stc_mfs03_csio_escr_field_t;
|
|
|
|
typedef struct stc_mfs03_csio_ssr_field
|
|
{
|
|
__IO uint8_t TBI : 1;
|
|
__IO uint8_t TDRE : 1;
|
|
__IO uint8_t RDRF : 1;
|
|
__IO uint8_t ORE : 1;
|
|
uint8_t RESERVED1 : 3;
|
|
__IO uint8_t REC : 1;
|
|
} stc_mfs03_csio_ssr_field_t;
|
|
|
|
/******************************************************************************
|
|
* MFS03_LIN_MODULE
|
|
******************************************************************************/
|
|
/* MFS03_LIN_MODULE register bit fields */
|
|
typedef struct stc_mfs03_lin_smr_field
|
|
{
|
|
__IO uint8_t SOE : 1;
|
|
uint8_t RESERVED1 : 2;
|
|
__IO uint8_t SBL : 1;
|
|
__IO uint8_t WUCR : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t MD2 : 1;
|
|
} stc_mfs03_lin_smr_field_t;
|
|
|
|
typedef struct stc_mfs03_lin_scr_field
|
|
{
|
|
__IO uint8_t TXE : 1;
|
|
__IO uint8_t RXE : 1;
|
|
__IO uint8_t TBIE : 1;
|
|
__IO uint8_t TIE : 1;
|
|
__IO uint8_t RIE : 1;
|
|
__IO uint8_t LBR : 1;
|
|
__IO uint8_t MS : 1;
|
|
__IO uint8_t UPCL : 1;
|
|
} stc_mfs03_lin_scr_field_t;
|
|
|
|
typedef struct stc_mfs03_lin_escr_field
|
|
{
|
|
__IO uint8_t DEL0 : 1;
|
|
__IO uint8_t DEL1 : 1;
|
|
__IO uint8_t LBL0 : 1;
|
|
__IO uint8_t LBL1 : 1;
|
|
__IO uint8_t LBIE : 1;
|
|
uint8_t RESERVED1 : 1;
|
|
__IO uint8_t ESBL : 1;
|
|
} stc_mfs03_lin_escr_field_t;
|
|
|
|
typedef struct stc_mfs03_lin_ssr_field
|
|
{
|
|
__IO uint8_t TBI : 1;
|
|
__IO uint8_t TDRE : 1;
|
|
__IO uint8_t RDRF : 1;
|
|
__IO uint8_t ORE : 1;
|
|
__IO uint8_t FRE : 1;
|
|
__IO uint8_t LBD : 1;
|
|
uint8_t RESERVED1 : 1;
|
|
__IO uint8_t REC : 1;
|
|
} stc_mfs03_lin_ssr_field_t;
|
|
|
|
typedef struct stc_mfs03_lin_bgr_field
|
|
{
|
|
uint16_t RESERVED1 : 15;
|
|
__IO uint16_t EXT : 1;
|
|
} stc_mfs03_lin_bgr_field_t;
|
|
|
|
typedef struct stc_mfs03_lin_bgr1_field
|
|
{
|
|
uint8_t RESERVED1 : 7;
|
|
__IO uint8_t EXT : 1;
|
|
} stc_mfs03_lin_bgr1_field_t;
|
|
|
|
/******************************************************************************
|
|
* MFS03_I2C_MODULE
|
|
******************************************************************************/
|
|
/* MFS03_I2C_MODULE register bit fields */
|
|
typedef struct stc_mfs03_i2c_smr_field
|
|
{
|
|
__IO uint8_t ITST0 : 1;
|
|
__IO uint8_t ITST1 : 1;
|
|
__IO uint8_t TIE : 1;
|
|
__IO uint8_t RIE : 1;
|
|
__IO uint8_t WUCR : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t MD2 : 1;
|
|
} stc_mfs03_i2c_smr_field_t;
|
|
|
|
typedef struct stc_mfs03_i2c_ibcr_field
|
|
{
|
|
__IO uint8_t INT : 1;
|
|
__IO uint8_t BER : 1;
|
|
__IO uint8_t INTE : 1;
|
|
__IO uint8_t CNDE : 1;
|
|
__IO uint8_t WSEL : 1;
|
|
__IO uint8_t ACKE : 1;
|
|
__IO uint8_t SCC : 1;
|
|
__IO uint8_t MSS : 1;
|
|
} stc_mfs03_i2c_ibcr_field_t;
|
|
|
|
typedef struct stc_mfs03_i2c_ibsr_field
|
|
{
|
|
__IO uint8_t BB : 1;
|
|
__IO uint8_t SPC : 1;
|
|
__IO uint8_t RSC : 1;
|
|
__IO uint8_t AL : 1;
|
|
__IO uint8_t TRX : 1;
|
|
__IO uint8_t RSA : 1;
|
|
__IO uint8_t RACK : 1;
|
|
__IO uint8_t FBT : 1;
|
|
} stc_mfs03_i2c_ibsr_field_t;
|
|
|
|
typedef struct stc_mfs03_i2c_ssr_field
|
|
{
|
|
__IO uint8_t TBI : 1;
|
|
__IO uint8_t TDRE : 1;
|
|
__IO uint8_t RDRF : 1;
|
|
__IO uint8_t ORE : 1;
|
|
__IO uint8_t TBIE : 1;
|
|
__IO uint8_t DMA : 1;
|
|
__IO uint8_t TSET : 1;
|
|
__IO uint8_t REC : 1;
|
|
} stc_mfs03_i2c_ssr_field_t;
|
|
|
|
typedef struct stc_mfs03_i2c_isba_field
|
|
{
|
|
__IO uint8_t SA0 : 1;
|
|
__IO uint8_t SA1 : 1;
|
|
__IO uint8_t SA2 : 1;
|
|
__IO uint8_t SA3 : 1;
|
|
__IO uint8_t SA4 : 1;
|
|
__IO uint8_t SA5 : 1;
|
|
__IO uint8_t SA6 : 1;
|
|
__IO uint8_t SAEN : 1;
|
|
} stc_mfs03_i2c_isba_field_t;
|
|
|
|
typedef struct stc_mfs03_i2c_ismk_field
|
|
{
|
|
__IO uint8_t SM0 : 1;
|
|
__IO uint8_t SM1 : 1;
|
|
__IO uint8_t SM2 : 1;
|
|
__IO uint8_t SM3 : 1;
|
|
__IO uint8_t SM4 : 1;
|
|
__IO uint8_t SM5 : 1;
|
|
__IO uint8_t SM6 : 1;
|
|
__IO uint8_t EN : 1;
|
|
} stc_mfs03_i2c_ismk_field_t;
|
|
|
|
/******************************************************************************
|
|
* MFS47_UART_MODULE
|
|
******************************************************************************/
|
|
/* MFS47_UART_MODULE register bit fields */
|
|
typedef struct stc_mfs47_uart_smr_field
|
|
{
|
|
__IO uint8_t SOE : 1;
|
|
uint8_t RESERVED1 : 1;
|
|
__IO uint8_t BDS : 1;
|
|
__IO uint8_t SBL : 1;
|
|
__IO uint8_t WUCR : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t MD2 : 1;
|
|
} stc_mfs47_uart_smr_field_t;
|
|
|
|
typedef struct stc_mfs47_uart_scr_field
|
|
{
|
|
__IO uint8_t TXE : 1;
|
|
__IO uint8_t RXE : 1;
|
|
__IO uint8_t TBIE : 1;
|
|
__IO uint8_t TIE : 1;
|
|
__IO uint8_t RIE : 1;
|
|
uint8_t RESERVED1 : 2;
|
|
__IO uint8_t UPCL : 1;
|
|
} stc_mfs47_uart_scr_field_t;
|
|
|
|
typedef struct stc_mfs47_uart_escr_field
|
|
{
|
|
__IO uint8_t L0 : 1;
|
|
__IO uint8_t L1 : 1;
|
|
__IO uint8_t L2 : 1;
|
|
__IO uint8_t P : 1;
|
|
__IO uint8_t PEN : 1;
|
|
__IO uint8_t INV : 1;
|
|
__IO uint8_t ESBL : 1;
|
|
__IO uint8_t FLWEN : 1;
|
|
} stc_mfs47_uart_escr_field_t;
|
|
|
|
typedef struct stc_mfs47_uart_ssr_field
|
|
{
|
|
__IO uint8_t TBI : 1;
|
|
__IO uint8_t TDRE : 1;
|
|
__IO uint8_t RDRF : 1;
|
|
__IO uint8_t ORE : 1;
|
|
__IO uint8_t FRE : 1;
|
|
__IO uint8_t PE : 1;
|
|
uint8_t RESERVED1 : 1;
|
|
__IO uint8_t REC : 1;
|
|
} stc_mfs47_uart_ssr_field_t;
|
|
|
|
typedef struct stc_mfs47_uart_rdr_field
|
|
{
|
|
uint16_t RESERVED1 : 8;
|
|
__IO uint16_t AD : 1;
|
|
} stc_mfs47_uart_rdr_field_t;
|
|
|
|
typedef struct stc_mfs47_uart_tdr_field
|
|
{
|
|
uint16_t RESERVED1 : 8;
|
|
__IO uint16_t AD : 1;
|
|
} stc_mfs47_uart_tdr_field_t;
|
|
|
|
typedef struct stc_mfs47_uart_bgr_field
|
|
{
|
|
uint16_t RESERVED1 : 15;
|
|
__IO uint16_t EXT : 1;
|
|
} stc_mfs47_uart_bgr_field_t;
|
|
|
|
typedef struct stc_mfs47_uart_bgr1_field
|
|
{
|
|
uint8_t RESERVED1 : 7;
|
|
__IO uint8_t EXT : 1;
|
|
} stc_mfs47_uart_bgr1_field_t;
|
|
|
|
typedef struct stc_mfs47_uart_fcr_field
|
|
{
|
|
__IO uint16_t FE1 : 1;
|
|
__IO uint16_t FE2 : 1;
|
|
__IO uint16_t FCL1 : 1;
|
|
__IO uint16_t FCL2 : 1;
|
|
__IO uint16_t FSET : 1;
|
|
__IO uint16_t FLD : 1;
|
|
__IO uint16_t FLST : 1;
|
|
uint16_t RESERVED1 : 1;
|
|
__IO uint16_t FSEL : 1;
|
|
__IO uint16_t FTIE : 1;
|
|
__IO uint16_t FDRQ : 1;
|
|
__IO uint16_t FRIE : 1;
|
|
__IO uint16_t FLSTE : 1;
|
|
uint16_t RESERVED2 : 1;
|
|
__IO uint16_t FTST0 : 1;
|
|
__IO uint16_t FTST1 : 1;
|
|
} stc_mfs47_uart_fcr_field_t;
|
|
|
|
typedef struct stc_mfs47_uart_fcr0_field
|
|
{
|
|
__IO uint8_t FE1 : 1;
|
|
__IO uint8_t FE2 : 1;
|
|
__IO uint8_t FCL1 : 1;
|
|
__IO uint8_t FCL2 : 1;
|
|
__IO uint8_t FSET : 1;
|
|
__IO uint8_t FLD : 1;
|
|
__IO uint8_t FLST : 1;
|
|
} stc_mfs47_uart_fcr0_field_t;
|
|
|
|
typedef struct stc_mfs47_uart_fcr1_field
|
|
{
|
|
__IO uint8_t FSEL : 1;
|
|
__IO uint8_t FTIE : 1;
|
|
__IO uint8_t FDRQ : 1;
|
|
__IO uint8_t FRIE : 1;
|
|
__IO uint8_t FLSTE : 1;
|
|
uint8_t RESERVED1 : 1;
|
|
__IO uint8_t FTST0 : 1;
|
|
__IO uint8_t FTST1 : 1;
|
|
} stc_mfs47_uart_fcr1_field_t;
|
|
|
|
typedef struct stc_mfs47_uart_fbyte_field
|
|
{
|
|
__IO uint16_t FD0 : 1;
|
|
__IO uint16_t FD1 : 1;
|
|
__IO uint16_t FD2 : 1;
|
|
__IO uint16_t FD3 : 1;
|
|
__IO uint16_t FD4 : 1;
|
|
__IO uint16_t FD5 : 1;
|
|
__IO uint16_t FD6 : 1;
|
|
__IO uint16_t FD7 : 1;
|
|
__IO uint16_t FD8 : 1;
|
|
__IO uint16_t FD9 : 1;
|
|
__IO uint16_t FD10 : 1;
|
|
__IO uint16_t FD11 : 1;
|
|
__IO uint16_t FD12 : 1;
|
|
__IO uint16_t FD13 : 1;
|
|
__IO uint16_t FD14 : 1;
|
|
__IO uint16_t FD15 : 1;
|
|
} stc_mfs47_uart_fbyte_field_t;
|
|
|
|
typedef struct stc_mfs47_uart_fbyte1_field
|
|
{
|
|
__IO uint8_t FD0 : 1;
|
|
__IO uint8_t FD1 : 1;
|
|
__IO uint8_t FD2 : 1;
|
|
__IO uint8_t FD3 : 1;
|
|
__IO uint8_t FD4 : 1;
|
|
__IO uint8_t FD5 : 1;
|
|
__IO uint8_t FD6 : 1;
|
|
__IO uint8_t FD7 : 1;
|
|
} stc_mfs47_uart_fbyte1_field_t;
|
|
|
|
typedef struct stc_mfs47_uart_fbyte2_field
|
|
{
|
|
__IO uint8_t FD8 : 1;
|
|
__IO uint8_t FD9 : 1;
|
|
__IO uint8_t FD10 : 1;
|
|
__IO uint8_t FD11 : 1;
|
|
__IO uint8_t FD12 : 1;
|
|
__IO uint8_t FD13 : 1;
|
|
__IO uint8_t FD14 : 1;
|
|
__IO uint8_t FD15 : 1;
|
|
} stc_mfs47_uart_fbyte2_field_t;
|
|
|
|
/******************************************************************************
|
|
* MFS47_CSIO_MODULE
|
|
******************************************************************************/
|
|
/* MFS47_CSIO_MODULE register bit fields */
|
|
typedef struct stc_mfs47_csio_smr_field
|
|
{
|
|
__IO uint8_t SOE : 1;
|
|
__IO uint8_t SCKE : 1;
|
|
__IO uint8_t BDS : 1;
|
|
__IO uint8_t SCINV : 1;
|
|
__IO uint8_t WUCR : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t MD2 : 1;
|
|
} stc_mfs47_csio_smr_field_t;
|
|
|
|
typedef struct stc_mfs47_csio_scr_field
|
|
{
|
|
__IO uint8_t TXE : 1;
|
|
__IO uint8_t RXE : 1;
|
|
__IO uint8_t TBIE : 1;
|
|
__IO uint8_t TIE : 1;
|
|
__IO uint8_t RIE : 1;
|
|
__IO uint8_t SPI : 1;
|
|
__IO uint8_t MS : 1;
|
|
__IO uint8_t UPCL : 1;
|
|
} stc_mfs47_csio_scr_field_t;
|
|
|
|
typedef struct stc_mfs47_csio_escr_field
|
|
{
|
|
__IO uint8_t L0 : 1;
|
|
__IO uint8_t L1 : 1;
|
|
__IO uint8_t L2 : 1;
|
|
__IO uint8_t WT0 : 1;
|
|
__IO uint8_t WT1 : 1;
|
|
uint8_t RESERVED1 : 2;
|
|
__IO uint8_t SOP : 1;
|
|
} stc_mfs47_csio_escr_field_t;
|
|
|
|
typedef struct stc_mfs47_csio_ssr_field
|
|
{
|
|
__IO uint8_t TBI : 1;
|
|
__IO uint8_t TDRE : 1;
|
|
__IO uint8_t RDRF : 1;
|
|
__IO uint8_t ORE : 1;
|
|
uint8_t RESERVED1 : 3;
|
|
__IO uint8_t REC : 1;
|
|
} stc_mfs47_csio_ssr_field_t;
|
|
|
|
typedef struct stc_mfs47_csio_fcr_field
|
|
{
|
|
__IO uint16_t FE1 : 1;
|
|
__IO uint16_t FE2 : 1;
|
|
__IO uint16_t FCL1 : 1;
|
|
__IO uint16_t FCL2 : 1;
|
|
__IO uint16_t FSET : 1;
|
|
__IO uint16_t FLD : 1;
|
|
__IO uint16_t FLST : 1;
|
|
uint16_t RESERVED1 : 1;
|
|
__IO uint16_t FSEL : 1;
|
|
__IO uint16_t FTIE : 1;
|
|
__IO uint16_t FDRQ : 1;
|
|
__IO uint16_t FRIE : 1;
|
|
__IO uint16_t FLSTE : 1;
|
|
uint16_t RESERVED2 : 1;
|
|
__IO uint16_t FTST0 : 1;
|
|
__IO uint16_t FTST1 : 1;
|
|
} stc_mfs47_csio_fcr_field_t;
|
|
|
|
typedef struct stc_mfs47_csio_fcr0_field
|
|
{
|
|
__IO uint8_t FE1 : 1;
|
|
__IO uint8_t FE2 : 1;
|
|
__IO uint8_t FCL1 : 1;
|
|
__IO uint8_t FCL2 : 1;
|
|
__IO uint8_t FSET : 1;
|
|
__IO uint8_t FLD : 1;
|
|
__IO uint8_t FLST : 1;
|
|
} stc_mfs47_csio_fcr0_field_t;
|
|
|
|
typedef struct stc_mfs47_csio_fcr1_field
|
|
{
|
|
__IO uint8_t FSEL : 1;
|
|
__IO uint8_t FTIE : 1;
|
|
__IO uint8_t FDRQ : 1;
|
|
__IO uint8_t FRIE : 1;
|
|
__IO uint8_t FLSTE : 1;
|
|
uint8_t RESERVED1 : 1;
|
|
__IO uint8_t FTST0 : 1;
|
|
__IO uint8_t FTST1 : 1;
|
|
} stc_mfs47_csio_fcr1_field_t;
|
|
|
|
typedef struct stc_mfs47_csio_fbyte_field
|
|
{
|
|
__IO uint16_t FD0 : 1;
|
|
__IO uint16_t FD1 : 1;
|
|
__IO uint16_t FD2 : 1;
|
|
__IO uint16_t FD3 : 1;
|
|
__IO uint16_t FD4 : 1;
|
|
__IO uint16_t FD5 : 1;
|
|
__IO uint16_t FD6 : 1;
|
|
__IO uint16_t FD7 : 1;
|
|
__IO uint16_t FD8 : 1;
|
|
__IO uint16_t FD9 : 1;
|
|
__IO uint16_t FD10 : 1;
|
|
__IO uint16_t FD11 : 1;
|
|
__IO uint16_t FD12 : 1;
|
|
__IO uint16_t FD13 : 1;
|
|
__IO uint16_t FD14 : 1;
|
|
__IO uint16_t FD15 : 1;
|
|
} stc_mfs47_csio_fbyte_field_t;
|
|
|
|
typedef struct stc_mfs47_csio_fbyte1_field
|
|
{
|
|
__IO uint8_t FD0 : 1;
|
|
__IO uint8_t FD1 : 1;
|
|
__IO uint8_t FD2 : 1;
|
|
__IO uint8_t FD3 : 1;
|
|
__IO uint8_t FD4 : 1;
|
|
__IO uint8_t FD5 : 1;
|
|
__IO uint8_t FD6 : 1;
|
|
__IO uint8_t FD7 : 1;
|
|
} stc_mfs47_csio_fbyte1_field_t;
|
|
|
|
typedef struct stc_mfs47_csio_fbyte2_field
|
|
{
|
|
__IO uint8_t FD8 : 1;
|
|
__IO uint8_t FD9 : 1;
|
|
__IO uint8_t FD10 : 1;
|
|
__IO uint8_t FD11 : 1;
|
|
__IO uint8_t FD12 : 1;
|
|
__IO uint8_t FD13 : 1;
|
|
__IO uint8_t FD14 : 1;
|
|
__IO uint8_t FD15 : 1;
|
|
} stc_mfs47_csio_fbyte2_field_t;
|
|
|
|
/******************************************************************************
|
|
* MFS47_LIN_MODULE
|
|
******************************************************************************/
|
|
/* MFS47_LIN_MODULE register bit fields */
|
|
typedef struct stc_mfs47_lin_smr_field
|
|
{
|
|
__IO uint8_t SOE : 1;
|
|
uint8_t RESERVED1 : 2;
|
|
__IO uint8_t SBL : 1;
|
|
__IO uint8_t WUCR : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t MD2 : 1;
|
|
} stc_mfs47_lin_smr_field_t;
|
|
|
|
typedef struct stc_mfs47_lin_scr_field
|
|
{
|
|
__IO uint8_t TXE : 1;
|
|
__IO uint8_t RXE : 1;
|
|
__IO uint8_t TBIE : 1;
|
|
__IO uint8_t TIE : 1;
|
|
__IO uint8_t RIE : 1;
|
|
__IO uint8_t LBR : 1;
|
|
__IO uint8_t MS : 1;
|
|
__IO uint8_t UPCL : 1;
|
|
} stc_mfs47_lin_scr_field_t;
|
|
|
|
typedef struct stc_mfs47_lin_escr_field
|
|
{
|
|
__IO uint8_t DEL0 : 1;
|
|
__IO uint8_t DEL1 : 1;
|
|
__IO uint8_t LBL0 : 1;
|
|
__IO uint8_t LBL1 : 1;
|
|
__IO uint8_t LBIE : 1;
|
|
uint8_t RESERVED1 : 1;
|
|
__IO uint8_t ESBL : 1;
|
|
} stc_mfs47_lin_escr_field_t;
|
|
|
|
typedef struct stc_mfs47_lin_ssr_field
|
|
{
|
|
__IO uint8_t TBI : 1;
|
|
__IO uint8_t TDRE : 1;
|
|
__IO uint8_t RDRF : 1;
|
|
__IO uint8_t ORE : 1;
|
|
__IO uint8_t FRE : 1;
|
|
__IO uint8_t LBD : 1;
|
|
uint8_t RESERVED1 : 1;
|
|
__IO uint8_t REC : 1;
|
|
} stc_mfs47_lin_ssr_field_t;
|
|
|
|
typedef struct stc_mfs47_lin_bgr_field
|
|
{
|
|
uint16_t RESERVED1 : 15;
|
|
__IO uint16_t EXT : 1;
|
|
} stc_mfs47_lin_bgr_field_t;
|
|
|
|
typedef struct stc_mfs47_lin_bgr1_field
|
|
{
|
|
uint8_t RESERVED1 : 7;
|
|
__IO uint8_t EXT : 1;
|
|
} stc_mfs47_lin_bgr1_field_t;
|
|
|
|
typedef struct stc_mfs47_lin_fcr_field
|
|
{
|
|
__IO uint16_t FE1 : 1;
|
|
__IO uint16_t FE2 : 1;
|
|
__IO uint16_t FCL1 : 1;
|
|
__IO uint16_t FCL2 : 1;
|
|
__IO uint16_t FSET : 1;
|
|
__IO uint16_t FLD : 1;
|
|
__IO uint16_t FLST : 1;
|
|
uint16_t RESERVED1 : 1;
|
|
__IO uint16_t FSEL : 1;
|
|
__IO uint16_t FTIE : 1;
|
|
__IO uint16_t FDRQ : 1;
|
|
__IO uint16_t FRIE : 1;
|
|
__IO uint16_t FLSTE : 1;
|
|
uint16_t RESERVED2 : 1;
|
|
__IO uint16_t FTST0 : 1;
|
|
__IO uint16_t FTST1 : 1;
|
|
} stc_mfs47_lin_fcr_field_t;
|
|
|
|
typedef struct stc_mfs47_lin_fcr0_field
|
|
{
|
|
__IO uint8_t FE1 : 1;
|
|
__IO uint8_t FE2 : 1;
|
|
__IO uint8_t FCL1 : 1;
|
|
__IO uint8_t FCL2 : 1;
|
|
__IO uint8_t FSET : 1;
|
|
__IO uint8_t FLD : 1;
|
|
__IO uint8_t FLST : 1;
|
|
} stc_mfs47_lin_fcr0_field_t;
|
|
|
|
typedef struct stc_mfs47_lin_fcr1_field
|
|
{
|
|
__IO uint8_t FSEL : 1;
|
|
__IO uint8_t FTIE : 1;
|
|
__IO uint8_t FDRQ : 1;
|
|
__IO uint8_t FRIE : 1;
|
|
__IO uint8_t FLSTE : 1;
|
|
uint8_t RESERVED1 : 1;
|
|
__IO uint8_t FTST0 : 1;
|
|
__IO uint8_t FTST1 : 1;
|
|
} stc_mfs47_lin_fcr1_field_t;
|
|
|
|
typedef struct stc_mfs47_lin_fbyte_field
|
|
{
|
|
__IO uint16_t FD0 : 1;
|
|
__IO uint16_t FD1 : 1;
|
|
__IO uint16_t FD2 : 1;
|
|
__IO uint16_t FD3 : 1;
|
|
__IO uint16_t FD4 : 1;
|
|
__IO uint16_t FD5 : 1;
|
|
__IO uint16_t FD6 : 1;
|
|
__IO uint16_t FD7 : 1;
|
|
__IO uint16_t FD8 : 1;
|
|
__IO uint16_t FD9 : 1;
|
|
__IO uint16_t FD10 : 1;
|
|
__IO uint16_t FD11 : 1;
|
|
__IO uint16_t FD12 : 1;
|
|
__IO uint16_t FD13 : 1;
|
|
__IO uint16_t FD14 : 1;
|
|
__IO uint16_t FD15 : 1;
|
|
} stc_mfs47_lin_fbyte_field_t;
|
|
|
|
typedef struct stc_mfs47_lin_fbyte1_field
|
|
{
|
|
__IO uint8_t FD0 : 1;
|
|
__IO uint8_t FD1 : 1;
|
|
__IO uint8_t FD2 : 1;
|
|
__IO uint8_t FD3 : 1;
|
|
__IO uint8_t FD4 : 1;
|
|
__IO uint8_t FD5 : 1;
|
|
__IO uint8_t FD6 : 1;
|
|
__IO uint8_t FD7 : 1;
|
|
} stc_mfs47_lin_fbyte1_field_t;
|
|
|
|
typedef struct stc_mfs47_lin_fbyte2_field
|
|
{
|
|
__IO uint8_t FD8 : 1;
|
|
__IO uint8_t FD9 : 1;
|
|
__IO uint8_t FD10 : 1;
|
|
__IO uint8_t FD11 : 1;
|
|
__IO uint8_t FD12 : 1;
|
|
__IO uint8_t FD13 : 1;
|
|
__IO uint8_t FD14 : 1;
|
|
__IO uint8_t FD15 : 1;
|
|
} stc_mfs47_lin_fbyte2_field_t;
|
|
|
|
/******************************************************************************
|
|
* MFS47_I2C_MODULE
|
|
******************************************************************************/
|
|
/* MFS47_I2C_MODULE register bit fields */
|
|
typedef struct stc_mfs47_i2c_smr_field
|
|
{
|
|
__IO uint8_t ITST0 : 1;
|
|
__IO uint8_t ITST1 : 1;
|
|
__IO uint8_t TIE : 1;
|
|
__IO uint8_t RIE : 1;
|
|
__IO uint8_t WUCR : 1;
|
|
__IO uint8_t MD0 : 1;
|
|
__IO uint8_t MD1 : 1;
|
|
__IO uint8_t MD2 : 1;
|
|
} stc_mfs47_i2c_smr_field_t;
|
|
|
|
typedef struct stc_mfs47_i2c_ibcr_field
|
|
{
|
|
__IO uint8_t INT : 1;
|
|
__IO uint8_t BER : 1;
|
|
__IO uint8_t INTE : 1;
|
|
__IO uint8_t CNDE : 1;
|
|
__IO uint8_t WSEL : 1;
|
|
__IO uint8_t ACKE : 1;
|
|
__IO uint8_t SCC : 1;
|
|
__IO uint8_t MSS : 1;
|
|
} stc_mfs47_i2c_ibcr_field_t;
|
|
|
|
typedef struct stc_mfs47_i2c_ibsr_field
|
|
{
|
|
__IO uint8_t BB : 1;
|
|
__IO uint8_t SPC : 1;
|
|
__IO uint8_t RSC : 1;
|
|
__IO uint8_t AL : 1;
|
|
__IO uint8_t TRX : 1;
|
|
__IO uint8_t RSA : 1;
|
|
__IO uint8_t RACK : 1;
|
|
__IO uint8_t FBT : 1;
|
|
} stc_mfs47_i2c_ibsr_field_t;
|
|
|
|
typedef struct stc_mfs47_i2c_ssr_field
|
|
{
|
|
__IO uint8_t TBI : 1;
|
|
__IO uint8_t TDRE : 1;
|
|
__IO uint8_t RDRF : 1;
|
|
__IO uint8_t ORE : 1;
|
|
__IO uint8_t TBIE : 1;
|
|
__IO uint8_t DMA : 1;
|
|
__IO uint8_t TSET : 1;
|
|
__IO uint8_t REC : 1;
|
|
} stc_mfs47_i2c_ssr_field_t;
|
|
|
|
typedef struct stc_mfs47_i2c_isba_field
|
|
{
|
|
__IO uint8_t SA0 : 1;
|
|
__IO uint8_t SA1 : 1;
|
|
__IO uint8_t SA2 : 1;
|
|
__IO uint8_t SA3 : 1;
|
|
__IO uint8_t SA4 : 1;
|
|
__IO uint8_t SA5 : 1;
|
|
__IO uint8_t SA6 : 1;
|
|
__IO uint8_t SAEN : 1;
|
|
} stc_mfs47_i2c_isba_field_t;
|
|
|
|
typedef struct stc_mfs47_i2c_ismk_field
|
|
{
|
|
__IO uint8_t SM0 : 1;
|
|
__IO uint8_t SM1 : 1;
|
|
__IO uint8_t SM2 : 1;
|
|
__IO uint8_t SM3 : 1;
|
|
__IO uint8_t SM4 : 1;
|
|
__IO uint8_t SM5 : 1;
|
|
__IO uint8_t SM6 : 1;
|
|
__IO uint8_t EN : 1;
|
|
} stc_mfs47_i2c_ismk_field_t;
|
|
|
|
typedef struct stc_mfs47_i2c_fcr_field
|
|
{
|
|
__IO uint16_t FE1 : 1;
|
|
__IO uint16_t FE2 : 1;
|
|
__IO uint16_t FCL1 : 1;
|
|
__IO uint16_t FCL2 : 1;
|
|
__IO uint16_t FSET : 1;
|
|
__IO uint16_t FLD : 1;
|
|
__IO uint16_t FLST : 1;
|
|
uint16_t RESERVED1 : 1;
|
|
__IO uint16_t FSEL : 1;
|
|
__IO uint16_t FTIE : 1;
|
|
__IO uint16_t FDRQ : 1;
|
|
__IO uint16_t FRIE : 1;
|
|
__IO uint16_t FLSTE : 1;
|
|
uint16_t RESERVED2 : 1;
|
|
__IO uint16_t FTST0 : 1;
|
|
__IO uint16_t FTST1 : 1;
|
|
} stc_mfs47_i2c_fcr_field_t;
|
|
|
|
typedef struct stc_mfs47_i2c_fcr0_field
|
|
{
|
|
__IO uint8_t FE1 : 1;
|
|
__IO uint8_t FE2 : 1;
|
|
__IO uint8_t FCL1 : 1;
|
|
__IO uint8_t FCL2 : 1;
|
|
__IO uint8_t FSET : 1;
|
|
__IO uint8_t FLD : 1;
|
|
__IO uint8_t FLST : 1;
|
|
} stc_mfs47_i2c_fcr0_field_t;
|
|
|
|
typedef struct stc_mfs47_i2c_fcr1_field
|
|
{
|
|
__IO uint8_t FSEL : 1;
|
|
__IO uint8_t FTIE : 1;
|
|
__IO uint8_t FDRQ : 1;
|
|
__IO uint8_t FRIE : 1;
|
|
__IO uint8_t FLSTE : 1;
|
|
uint8_t RESERVED1 : 1;
|
|
__IO uint8_t FTST0 : 1;
|
|
__IO uint8_t FTST1 : 1;
|
|
} stc_mfs47_i2c_fcr1_field_t;
|
|
|
|
typedef struct stc_mfs47_i2c_fbyte_field
|
|
{
|
|
__IO uint16_t FD0 : 1;
|
|
__IO uint16_t FD1 : 1;
|
|
__IO uint16_t FD2 : 1;
|
|
__IO uint16_t FD3 : 1;
|
|
__IO uint16_t FD4 : 1;
|
|
__IO uint16_t FD5 : 1;
|
|
__IO uint16_t FD6 : 1;
|
|
__IO uint16_t FD7 : 1;
|
|
__IO uint16_t FD8 : 1;
|
|
__IO uint16_t FD9 : 1;
|
|
__IO uint16_t FD10 : 1;
|
|
__IO uint16_t FD11 : 1;
|
|
__IO uint16_t FD12 : 1;
|
|
__IO uint16_t FD13 : 1;
|
|
__IO uint16_t FD14 : 1;
|
|
__IO uint16_t FD15 : 1;
|
|
} stc_mfs47_i2c_fbyte_field_t;
|
|
|
|
typedef struct stc_mfs47_i2c_fbyte1_field
|
|
{
|
|
__IO uint8_t FD0 : 1;
|
|
__IO uint8_t FD1 : 1;
|
|
__IO uint8_t FD2 : 1;
|
|
__IO uint8_t FD3 : 1;
|
|
__IO uint8_t FD4 : 1;
|
|
__IO uint8_t FD5 : 1;
|
|
__IO uint8_t FD6 : 1;
|
|
__IO uint8_t FD7 : 1;
|
|
} stc_mfs47_i2c_fbyte1_field_t;
|
|
|
|
typedef struct stc_mfs47_i2c_fbyte2_field
|
|
{
|
|
__IO uint8_t FD8 : 1;
|
|
__IO uint8_t FD9 : 1;
|
|
__IO uint8_t FD10 : 1;
|
|
__IO uint8_t FD11 : 1;
|
|
__IO uint8_t FD12 : 1;
|
|
__IO uint8_t FD13 : 1;
|
|
__IO uint8_t FD14 : 1;
|
|
__IO uint8_t FD15 : 1;
|
|
} stc_mfs47_i2c_fbyte2_field_t;
|
|
|
|
/******************************************************************************
|
|
* MFS_NFC_MODULE
|
|
******************************************************************************/
|
|
/* MFS_NFC_MODULE register bit fields */
|
|
typedef struct stc_mfs_nfc_i2cdnf_field
|
|
{
|
|
__IO uint16_t I2CDNF00 : 1;
|
|
__IO uint16_t I2CDNF01 : 1;
|
|
__IO uint16_t I2CDNF10 : 1;
|
|
__IO uint16_t I2CDNF11 : 1;
|
|
__IO uint16_t I2CDNF20 : 1;
|
|
__IO uint16_t I2CDNF21 : 1;
|
|
__IO uint16_t I2CDNF30 : 1;
|
|
__IO uint16_t I2CDNF31 : 1;
|
|
__IO uint16_t I2CDNF40 : 1;
|
|
__IO uint16_t I2CDNF41 : 1;
|
|
__IO uint16_t I2CDNF50 : 1;
|
|
__IO uint16_t I2CDNF51 : 1;
|
|
__IO uint16_t I2CDNF60 : 1;
|
|
__IO uint16_t I2CDNF61 : 1;
|
|
__IO uint16_t I2CDNF70 : 1;
|
|
__IO uint16_t I2CDNF71 : 1;
|
|
} stc_mfs_nfc_i2cdnf_field_t;
|
|
|
|
/******************************************************************************
|
|
* CRC_MODULE
|
|
******************************************************************************/
|
|
/* CRC_MODULE register bit fields */
|
|
typedef struct stc_crc_crccr_field
|
|
{
|
|
__IO uint8_t INIT : 1;
|
|
__IO uint8_t CRC32 : 1;
|
|
__IO uint8_t LTLEND : 1;
|
|
__IO uint8_t LSBFST : 1;
|
|
__IO uint8_t CRCLTE : 1;
|
|
__IO uint8_t CRCLSF : 1;
|
|
__IO uint8_t FXOR : 1;
|
|
} stc_crc_crccr_field_t;
|
|
|
|
/******************************************************************************
|
|
* WC_MODULE
|
|
******************************************************************************/
|
|
/* WC_MODULE register bit fields */
|
|
typedef struct stc_wc_wcrd_field
|
|
{
|
|
__IO uint8_t CTR0 : 1;
|
|
__IO uint8_t CTR1 : 1;
|
|
__IO uint8_t CTR2 : 1;
|
|
__IO uint8_t CTR3 : 1;
|
|
__IO uint8_t CTR4 : 1;
|
|
__IO uint8_t CTR5 : 1;
|
|
} stc_wc_wcrd_field_t;
|
|
|
|
typedef struct stc_wc_wcrl_field
|
|
{
|
|
__IO uint8_t RLC0 : 1;
|
|
__IO uint8_t RLC1 : 1;
|
|
__IO uint8_t RLC2 : 1;
|
|
__IO uint8_t RLC3 : 1;
|
|
__IO uint8_t RLC4 : 1;
|
|
__IO uint8_t RLC5 : 1;
|
|
} stc_wc_wcrl_field_t;
|
|
|
|
typedef struct stc_wc_wccr_field
|
|
{
|
|
__IO uint8_t WCIF : 1;
|
|
__IO uint8_t WCIE : 1;
|
|
__IO uint8_t CS0 : 1;
|
|
__IO uint8_t CS1 : 1;
|
|
uint8_t RESERVED1 : 2;
|
|
__IO uint8_t WCOP : 1;
|
|
__IO uint8_t WCEN : 1;
|
|
} stc_wc_wccr_field_t;
|
|
|
|
typedef struct stc_wc_clk_sel_field
|
|
{
|
|
__IO uint16_t SEL_IN : 1;
|
|
uint16_t RESERVED1 : 7;
|
|
__IO uint16_t SEL_OUT : 1;
|
|
} stc_wc_clk_sel_field_t;
|
|
|
|
typedef struct stc_wc_clk_en_field
|
|
{
|
|
__IO uint8_t CLK_EN : 1;
|
|
__IO uint8_t CLK_EN_R : 1;
|
|
} stc_wc_clk_en_field_t;
|
|
|
|
/******************************************************************************
|
|
* EXBUS_MODULE
|
|
******************************************************************************/
|
|
/* EXBUS_MODULE register bit fields */
|
|
typedef struct stc_exbus_mode0_field
|
|
{
|
|
__IO uint32_t WDTH0 : 1;
|
|
__IO uint32_t WDTH1 : 1;
|
|
__IO uint32_t RBMON : 1;
|
|
__IO uint32_t WEOFF : 1;
|
|
__IO uint32_t NAND : 1;
|
|
__IO uint32_t PAGE : 1;
|
|
__IO uint32_t RDY : 1;
|
|
__IO uint32_t SHRTDOUT : 1;
|
|
__IO uint32_t MPXMODE : 1;
|
|
__IO uint32_t ALEINV : 1;
|
|
uint32_t RESERVED1 : 1;
|
|
__IO uint32_t MPXDOFF : 1;
|
|
__IO uint32_t MPXCSOF : 1;
|
|
__IO uint32_t MOEXEUP : 1;
|
|
} stc_exbus_mode0_field_t;
|
|
|
|
typedef struct stc_exbus_mode1_field
|
|
{
|
|
__IO uint32_t WDTH0 : 1;
|
|
__IO uint32_t WDTH1 : 1;
|
|
__IO uint32_t RBMON : 1;
|
|
__IO uint32_t WEOFF : 1;
|
|
__IO uint32_t NAND : 1;
|
|
__IO uint32_t PAGE : 1;
|
|
__IO uint32_t RDY : 1;
|
|
__IO uint32_t SHRTDOUT : 1;
|
|
__IO uint32_t MPXMODE : 1;
|
|
__IO uint32_t ALEINV : 1;
|
|
uint32_t RESERVED1 : 1;
|
|
__IO uint32_t MPXDOFF : 1;
|
|
__IO uint32_t MPXCSOF : 1;
|
|
__IO uint32_t MOEXEUP : 1;
|
|
} stc_exbus_mode1_field_t;
|
|
|
|
typedef struct stc_exbus_mode2_field
|
|
{
|
|
__IO uint32_t WDTH0 : 1;
|
|
__IO uint32_t WDTH1 : 1;
|
|
__IO uint32_t RBMON : 1;
|
|
__IO uint32_t WEOFF : 1;
|
|
__IO uint32_t NAND : 1;
|
|
__IO uint32_t PAGE : 1;
|
|
__IO uint32_t RDY : 1;
|
|
__IO uint32_t SHRTDOUT : 1;
|
|
__IO uint32_t MPXMODE : 1;
|
|
__IO uint32_t ALEINV : 1;
|
|
uint32_t RESERVED1 : 1;
|
|
__IO uint32_t MPXDOFF : 1;
|
|
__IO uint32_t MPXCSOF : 1;
|
|
__IO uint32_t MOEXEUP : 1;
|
|
} stc_exbus_mode2_field_t;
|
|
|
|
typedef struct stc_exbus_mode3_field
|
|
{
|
|
__IO uint32_t WDTH0 : 1;
|
|
__IO uint32_t WDTH1 : 1;
|
|
__IO uint32_t RBMON : 1;
|
|
__IO uint32_t WEOFF : 1;
|
|
__IO uint32_t NAND : 1;
|
|
__IO uint32_t PAGE : 1;
|
|
__IO uint32_t RDY : 1;
|
|
__IO uint32_t SHRTDOUT : 1;
|
|
__IO uint32_t MPXMODE : 1;
|
|
__IO uint32_t ALEINV : 1;
|
|
uint32_t RESERVED1 : 1;
|
|
__IO uint32_t MPXDOFF : 1;
|
|
__IO uint32_t MPXCSOF : 1;
|
|
__IO uint32_t MOEXEUP : 1;
|
|
} stc_exbus_mode3_field_t;
|
|
|
|
typedef struct stc_exbus_mode4_field
|
|
{
|
|
__IO uint32_t WDTH0 : 1;
|
|
__IO uint32_t WDTH1 : 1;
|
|
__IO uint32_t RBMON : 1;
|
|
__IO uint32_t WEOFF : 1;
|
|
__IO uint32_t NAND : 1;
|
|
__IO uint32_t PAGE : 1;
|
|
__IO uint32_t RDY : 1;
|
|
__IO uint32_t SHRTDOUT : 1;
|
|
__IO uint32_t MPXMODE : 1;
|
|
__IO uint32_t ALEINV : 1;
|
|
uint32_t RESERVED1 : 1;
|
|
__IO uint32_t MPXDOFF : 1;
|
|
__IO uint32_t MPXCSOF : 1;
|
|
__IO uint32_t MOEXEUP : 1;
|
|
} stc_exbus_mode4_field_t;
|
|
|
|
typedef struct stc_exbus_mode5_field
|
|
{
|
|
__IO uint32_t WDTH0 : 1;
|
|
__IO uint32_t WDTH1 : 1;
|
|
__IO uint32_t RBMON : 1;
|
|
__IO uint32_t WEOFF : 1;
|
|
__IO uint32_t NAND : 1;
|
|
__IO uint32_t PAGE : 1;
|
|
__IO uint32_t RDY : 1;
|
|
__IO uint32_t SHRTDOUT : 1;
|
|
__IO uint32_t MPXMODE : 1;
|
|
__IO uint32_t ALEINV : 1;
|
|
uint32_t RESERVED1 : 1;
|
|
__IO uint32_t MPXDOFF : 1;
|
|
__IO uint32_t MPXCSOF : 1;
|
|
__IO uint32_t MOEXEUP : 1;
|
|
} stc_exbus_mode5_field_t;
|
|
|
|
typedef struct stc_exbus_mode6_field
|
|
{
|
|
__IO uint32_t WDTH0 : 1;
|
|
__IO uint32_t WDTH1 : 1;
|
|
__IO uint32_t RBMON : 1;
|
|
__IO uint32_t WEOFF : 1;
|
|
__IO uint32_t NAND : 1;
|
|
__IO uint32_t PAGE : 1;
|
|
__IO uint32_t RDY : 1;
|
|
__IO uint32_t SHRTDOUT : 1;
|
|
__IO uint32_t MPXMODE : 1;
|
|
__IO uint32_t ALEINV : 1;
|
|
uint32_t RESERVED1 : 1;
|
|
__IO uint32_t MPXDOFF : 1;
|
|
__IO uint32_t MPXCSOF : 1;
|
|
__IO uint32_t MOEXEUP : 1;
|
|
} stc_exbus_mode6_field_t;
|
|
|
|
typedef struct stc_exbus_mode7_field
|
|
{
|
|
__IO uint32_t WDTH0 : 1;
|
|
__IO uint32_t WDTH1 : 1;
|
|
__IO uint32_t RBMON : 1;
|
|
__IO uint32_t WEOFF : 1;
|
|
__IO uint32_t NAND : 1;
|
|
__IO uint32_t PAGE : 1;
|
|
__IO uint32_t RDY : 1;
|
|
__IO uint32_t SHRTDOUT : 1;
|
|
__IO uint32_t MPXMODE : 1;
|
|
__IO uint32_t ALEINV : 1;
|
|
uint32_t RESERVED1 : 1;
|
|
__IO uint32_t MPXDOFF : 1;
|
|
__IO uint32_t MPXCSOF : 1;
|
|
__IO uint32_t MOEXEUP : 1;
|
|
} stc_exbus_mode7_field_t;
|
|
|
|
typedef struct stc_exbus_tim0_field
|
|
{
|
|
__IO uint32_t RACC0 : 1;
|
|
__IO uint32_t RACC1 : 1;
|
|
__IO uint32_t RACC2 : 1;
|
|
__IO uint32_t RACC3 : 1;
|
|
__IO uint32_t RADC0 : 1;
|
|
__IO uint32_t RADC1 : 1;
|
|
__IO uint32_t RADC2 : 1;
|
|
__IO uint32_t RADC3 : 1;
|
|
__IO uint32_t FRADC0 : 1;
|
|
__IO uint32_t FRADC1 : 1;
|
|
__IO uint32_t FRADC2 : 1;
|
|
__IO uint32_t FRADC3 : 1;
|
|
__IO uint32_t RIDLC0 : 1;
|
|
__IO uint32_t RIDLC1 : 1;
|
|
__IO uint32_t RIDLC2 : 1;
|
|
__IO uint32_t RIDLC3 : 1;
|
|
__IO uint32_t WACC0 : 1;
|
|
__IO uint32_t WACC1 : 1;
|
|
__IO uint32_t WACC2 : 1;
|
|
__IO uint32_t WACC3 : 1;
|
|
__IO uint32_t WADC0 : 1;
|
|
__IO uint32_t WADC1 : 1;
|
|
__IO uint32_t WADC2 : 1;
|
|
__IO uint32_t WADC3 : 1;
|
|
__IO uint32_t WWEC0 : 1;
|
|
__IO uint32_t WWEC1 : 1;
|
|
__IO uint32_t WWEC2 : 1;
|
|
__IO uint32_t WWEC3 : 1;
|
|
__IO uint32_t WIDLC0 : 1;
|
|
__IO uint32_t WIDLC1 : 1;
|
|
__IO uint32_t WIDLC2 : 1;
|
|
__IO uint32_t WIDLC3 : 1;
|
|
} stc_exbus_tim0_field_t;
|
|
|
|
typedef struct stc_exbus_tim1_field
|
|
{
|
|
__IO uint32_t RACC0 : 1;
|
|
__IO uint32_t RACC1 : 1;
|
|
__IO uint32_t RACC2 : 1;
|
|
__IO uint32_t RACC3 : 1;
|
|
__IO uint32_t RADC0 : 1;
|
|
__IO uint32_t RADC1 : 1;
|
|
__IO uint32_t RADC2 : 1;
|
|
__IO uint32_t RADC3 : 1;
|
|
__IO uint32_t FRADC0 : 1;
|
|
__IO uint32_t FRADC1 : 1;
|
|
__IO uint32_t FRADC2 : 1;
|
|
__IO uint32_t FRADC3 : 1;
|
|
__IO uint32_t RIDLC0 : 1;
|
|
__IO uint32_t RIDLC1 : 1;
|
|
__IO uint32_t RIDLC2 : 1;
|
|
__IO uint32_t RIDLC3 : 1;
|
|
__IO uint32_t WACC0 : 1;
|
|
__IO uint32_t WACC1 : 1;
|
|
__IO uint32_t WACC2 : 1;
|
|
__IO uint32_t WACC3 : 1;
|
|
__IO uint32_t WADC0 : 1;
|
|
__IO uint32_t WADC1 : 1;
|
|
__IO uint32_t WADC2 : 1;
|
|
__IO uint32_t WADC3 : 1;
|
|
__IO uint32_t WWEC0 : 1;
|
|
__IO uint32_t WWEC1 : 1;
|
|
__IO uint32_t WWEC2 : 1;
|
|
__IO uint32_t WWEC3 : 1;
|
|
__IO uint32_t WIDLC0 : 1;
|
|
__IO uint32_t WIDLC1 : 1;
|
|
__IO uint32_t WIDLC2 : 1;
|
|
__IO uint32_t WIDLC3 : 1;
|
|
} stc_exbus_tim1_field_t;
|
|
|
|
typedef struct stc_exbus_tim2_field
|
|
{
|
|
__IO uint32_t RACC0 : 1;
|
|
__IO uint32_t RACC1 : 1;
|
|
__IO uint32_t RACC2 : 1;
|
|
__IO uint32_t RACC3 : 1;
|
|
__IO uint32_t RADC0 : 1;
|
|
__IO uint32_t RADC1 : 1;
|
|
__IO uint32_t RADC2 : 1;
|
|
__IO uint32_t RADC3 : 1;
|
|
__IO uint32_t FRADC0 : 1;
|
|
__IO uint32_t FRADC1 : 1;
|
|
__IO uint32_t FRADC2 : 1;
|
|
__IO uint32_t FRADC3 : 1;
|
|
__IO uint32_t RIDLC0 : 1;
|
|
__IO uint32_t RIDLC1 : 1;
|
|
__IO uint32_t RIDLC2 : 1;
|
|
__IO uint32_t RIDLC3 : 1;
|
|
__IO uint32_t WACC0 : 1;
|
|
__IO uint32_t WACC1 : 1;
|
|
__IO uint32_t WACC2 : 1;
|
|
__IO uint32_t WACC3 : 1;
|
|
__IO uint32_t WADC0 : 1;
|
|
__IO uint32_t WADC1 : 1;
|
|
__IO uint32_t WADC2 : 1;
|
|
__IO uint32_t WADC3 : 1;
|
|
__IO uint32_t WWEC0 : 1;
|
|
__IO uint32_t WWEC1 : 1;
|
|
__IO uint32_t WWEC2 : 1;
|
|
__IO uint32_t WWEC3 : 1;
|
|
__IO uint32_t WIDLC0 : 1;
|
|
__IO uint32_t WIDLC1 : 1;
|
|
__IO uint32_t WIDLC2 : 1;
|
|
__IO uint32_t WIDLC3 : 1;
|
|
} stc_exbus_tim2_field_t;
|
|
|
|
typedef struct stc_exbus_tim3_field
|
|
{
|
|
__IO uint32_t RACC0 : 1;
|
|
__IO uint32_t RACC1 : 1;
|
|
__IO uint32_t RACC2 : 1;
|
|
__IO uint32_t RACC3 : 1;
|
|
__IO uint32_t RADC0 : 1;
|
|
__IO uint32_t RADC1 : 1;
|
|
__IO uint32_t RADC2 : 1;
|
|
__IO uint32_t RADC3 : 1;
|
|
__IO uint32_t FRADC0 : 1;
|
|
__IO uint32_t FRADC1 : 1;
|
|
__IO uint32_t FRADC2 : 1;
|
|
__IO uint32_t FRADC3 : 1;
|
|
__IO uint32_t RIDLC0 : 1;
|
|
__IO uint32_t RIDLC1 : 1;
|
|
__IO uint32_t RIDLC2 : 1;
|
|
__IO uint32_t RIDLC3 : 1;
|
|
__IO uint32_t WACC0 : 1;
|
|
__IO uint32_t WACC1 : 1;
|
|
__IO uint32_t WACC2 : 1;
|
|
__IO uint32_t WACC3 : 1;
|
|
__IO uint32_t WADC0 : 1;
|
|
__IO uint32_t WADC1 : 1;
|
|
__IO uint32_t WADC2 : 1;
|
|
__IO uint32_t WADC3 : 1;
|
|
__IO uint32_t WWEC0 : 1;
|
|
__IO uint32_t WWEC1 : 1;
|
|
__IO uint32_t WWEC2 : 1;
|
|
__IO uint32_t WWEC3 : 1;
|
|
__IO uint32_t WIDLC0 : 1;
|
|
__IO uint32_t WIDLC1 : 1;
|
|
__IO uint32_t WIDLC2 : 1;
|
|
__IO uint32_t WIDLC3 : 1;
|
|
} stc_exbus_tim3_field_t;
|
|
|
|
typedef struct stc_exbus_tim4_field
|
|
{
|
|
__IO uint32_t RACC0 : 1;
|
|
__IO uint32_t RACC1 : 1;
|
|
__IO uint32_t RACC2 : 1;
|
|
__IO uint32_t RACC3 : 1;
|
|
__IO uint32_t RADC0 : 1;
|
|
__IO uint32_t RADC1 : 1;
|
|
__IO uint32_t RADC2 : 1;
|
|
__IO uint32_t RADC3 : 1;
|
|
__IO uint32_t FRADC0 : 1;
|
|
__IO uint32_t FRADC1 : 1;
|
|
__IO uint32_t FRADC2 : 1;
|
|
__IO uint32_t FRADC3 : 1;
|
|
__IO uint32_t RIDLC0 : 1;
|
|
__IO uint32_t RIDLC1 : 1;
|
|
__IO uint32_t RIDLC2 : 1;
|
|
__IO uint32_t RIDLC3 : 1;
|
|
__IO uint32_t WACC0 : 1;
|
|
__IO uint32_t WACC1 : 1;
|
|
__IO uint32_t WACC2 : 1;
|
|
__IO uint32_t WACC3 : 1;
|
|
__IO uint32_t WADC0 : 1;
|
|
__IO uint32_t WADC1 : 1;
|
|
__IO uint32_t WADC2 : 1;
|
|
__IO uint32_t WADC3 : 1;
|
|
__IO uint32_t WWEC0 : 1;
|
|
__IO uint32_t WWEC1 : 1;
|
|
__IO uint32_t WWEC2 : 1;
|
|
__IO uint32_t WWEC3 : 1;
|
|
__IO uint32_t WIDLC0 : 1;
|
|
__IO uint32_t WIDLC1 : 1;
|
|
__IO uint32_t WIDLC2 : 1;
|
|
__IO uint32_t WIDLC3 : 1;
|
|
} stc_exbus_tim4_field_t;
|
|
|
|
typedef struct stc_exbus_tim5_field
|
|
{
|
|
__IO uint32_t RACC0 : 1;
|
|
__IO uint32_t RACC1 : 1;
|
|
__IO uint32_t RACC2 : 1;
|
|
__IO uint32_t RACC3 : 1;
|
|
__IO uint32_t RADC0 : 1;
|
|
__IO uint32_t RADC1 : 1;
|
|
__IO uint32_t RADC2 : 1;
|
|
__IO uint32_t RADC3 : 1;
|
|
__IO uint32_t FRADC0 : 1;
|
|
__IO uint32_t FRADC1 : 1;
|
|
__IO uint32_t FRADC2 : 1;
|
|
__IO uint32_t FRADC3 : 1;
|
|
__IO uint32_t RIDLC0 : 1;
|
|
__IO uint32_t RIDLC1 : 1;
|
|
__IO uint32_t RIDLC2 : 1;
|
|
__IO uint32_t RIDLC3 : 1;
|
|
__IO uint32_t WACC0 : 1;
|
|
__IO uint32_t WACC1 : 1;
|
|
__IO uint32_t WACC2 : 1;
|
|
__IO uint32_t WACC3 : 1;
|
|
__IO uint32_t WADC0 : 1;
|
|
__IO uint32_t WADC1 : 1;
|
|
__IO uint32_t WADC2 : 1;
|
|
__IO uint32_t WADC3 : 1;
|
|
__IO uint32_t WWEC0 : 1;
|
|
__IO uint32_t WWEC1 : 1;
|
|
__IO uint32_t WWEC2 : 1;
|
|
__IO uint32_t WWEC3 : 1;
|
|
__IO uint32_t WIDLC0 : 1;
|
|
__IO uint32_t WIDLC1 : 1;
|
|
__IO uint32_t WIDLC2 : 1;
|
|
__IO uint32_t WIDLC3 : 1;
|
|
} stc_exbus_tim5_field_t;
|
|
|
|
typedef struct stc_exbus_tim6_field
|
|
{
|
|
__IO uint32_t RACC0 : 1;
|
|
__IO uint32_t RACC1 : 1;
|
|
__IO uint32_t RACC2 : 1;
|
|
__IO uint32_t RACC3 : 1;
|
|
__IO uint32_t RADC0 : 1;
|
|
__IO uint32_t RADC1 : 1;
|
|
__IO uint32_t RADC2 : 1;
|
|
__IO uint32_t RADC3 : 1;
|
|
__IO uint32_t FRADC0 : 1;
|
|
__IO uint32_t FRADC1 : 1;
|
|
__IO uint32_t FRADC2 : 1;
|
|
__IO uint32_t FRADC3 : 1;
|
|
__IO uint32_t RIDLC0 : 1;
|
|
__IO uint32_t RIDLC1 : 1;
|
|
__IO uint32_t RIDLC2 : 1;
|
|
__IO uint32_t RIDLC3 : 1;
|
|
__IO uint32_t WACC0 : 1;
|
|
__IO uint32_t WACC1 : 1;
|
|
__IO uint32_t WACC2 : 1;
|
|
__IO uint32_t WACC3 : 1;
|
|
__IO uint32_t WADC0 : 1;
|
|
__IO uint32_t WADC1 : 1;
|
|
__IO uint32_t WADC2 : 1;
|
|
__IO uint32_t WADC3 : 1;
|
|
__IO uint32_t WWEC0 : 1;
|
|
__IO uint32_t WWEC1 : 1;
|
|
__IO uint32_t WWEC2 : 1;
|
|
__IO uint32_t WWEC3 : 1;
|
|
__IO uint32_t WIDLC0 : 1;
|
|
__IO uint32_t WIDLC1 : 1;
|
|
__IO uint32_t WIDLC2 : 1;
|
|
__IO uint32_t WIDLC3 : 1;
|
|
} stc_exbus_tim6_field_t;
|
|
|
|
typedef struct stc_exbus_tim7_field
|
|
{
|
|
__IO uint32_t RACC0 : 1;
|
|
__IO uint32_t RACC1 : 1;
|
|
__IO uint32_t RACC2 : 1;
|
|
__IO uint32_t RACC3 : 1;
|
|
__IO uint32_t RADC0 : 1;
|
|
__IO uint32_t RADC1 : 1;
|
|
__IO uint32_t RADC2 : 1;
|
|
__IO uint32_t RADC3 : 1;
|
|
__IO uint32_t FRADC0 : 1;
|
|
__IO uint32_t FRADC1 : 1;
|
|
__IO uint32_t FRADC2 : 1;
|
|
__IO uint32_t FRADC3 : 1;
|
|
__IO uint32_t RIDLC0 : 1;
|
|
__IO uint32_t RIDLC1 : 1;
|
|
__IO uint32_t RIDLC2 : 1;
|
|
__IO uint32_t RIDLC3 : 1;
|
|
__IO uint32_t WACC0 : 1;
|
|
__IO uint32_t WACC1 : 1;
|
|
__IO uint32_t WACC2 : 1;
|
|
__IO uint32_t WACC3 : 1;
|
|
__IO uint32_t WADC0 : 1;
|
|
__IO uint32_t WADC1 : 1;
|
|
__IO uint32_t WADC2 : 1;
|
|
__IO uint32_t WADC3 : 1;
|
|
__IO uint32_t WWEC0 : 1;
|
|
__IO uint32_t WWEC1 : 1;
|
|
__IO uint32_t WWEC2 : 1;
|
|
__IO uint32_t WWEC3 : 1;
|
|
__IO uint32_t WIDLC0 : 1;
|
|
__IO uint32_t WIDLC1 : 1;
|
|
__IO uint32_t WIDLC2 : 1;
|
|
__IO uint32_t WIDLC3 : 1;
|
|
} stc_exbus_tim7_field_t;
|
|
|
|
typedef struct stc_exbus_area0_field
|
|
{
|
|
__IO uint32_t ADDR0 : 1;
|
|
__IO uint32_t ADDR1 : 1;
|
|
__IO uint32_t ADDR2 : 1;
|
|
__IO uint32_t ADDR3 : 1;
|
|
__IO uint32_t ADDR4 : 1;
|
|
__IO uint32_t ADDR5 : 1;
|
|
__IO uint32_t ADDR6 : 1;
|
|
__IO uint32_t ADDR7 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MASK0 : 1;
|
|
__IO uint32_t MASK1 : 1;
|
|
__IO uint32_t MASK2 : 1;
|
|
__IO uint32_t MASK3 : 1;
|
|
__IO uint32_t MASK4 : 1;
|
|
__IO uint32_t MASK5 : 1;
|
|
__IO uint32_t MASK6 : 1;
|
|
} stc_exbus_area0_field_t;
|
|
|
|
typedef struct stc_exbus_area1_field
|
|
{
|
|
__IO uint32_t ADDR0 : 1;
|
|
__IO uint32_t ADDR1 : 1;
|
|
__IO uint32_t ADDR2 : 1;
|
|
__IO uint32_t ADDR3 : 1;
|
|
__IO uint32_t ADDR4 : 1;
|
|
__IO uint32_t ADDR5 : 1;
|
|
__IO uint32_t ADDR6 : 1;
|
|
__IO uint32_t ADDR7 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MASK0 : 1;
|
|
__IO uint32_t MASK1 : 1;
|
|
__IO uint32_t MASK2 : 1;
|
|
__IO uint32_t MASK3 : 1;
|
|
__IO uint32_t MASK4 : 1;
|
|
__IO uint32_t MASK5 : 1;
|
|
__IO uint32_t MASK6 : 1;
|
|
} stc_exbus_area1_field_t;
|
|
|
|
typedef struct stc_exbus_area2_field
|
|
{
|
|
__IO uint32_t ADDR0 : 1;
|
|
__IO uint32_t ADDR1 : 1;
|
|
__IO uint32_t ADDR2 : 1;
|
|
__IO uint32_t ADDR3 : 1;
|
|
__IO uint32_t ADDR4 : 1;
|
|
__IO uint32_t ADDR5 : 1;
|
|
__IO uint32_t ADDR6 : 1;
|
|
__IO uint32_t ADDR7 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MASK0 : 1;
|
|
__IO uint32_t MASK1 : 1;
|
|
__IO uint32_t MASK2 : 1;
|
|
__IO uint32_t MASK3 : 1;
|
|
__IO uint32_t MASK4 : 1;
|
|
__IO uint32_t MASK5 : 1;
|
|
__IO uint32_t MASK6 : 1;
|
|
} stc_exbus_area2_field_t;
|
|
|
|
typedef struct stc_exbus_area3_field
|
|
{
|
|
__IO uint32_t ADDR0 : 1;
|
|
__IO uint32_t ADDR1 : 1;
|
|
__IO uint32_t ADDR2 : 1;
|
|
__IO uint32_t ADDR3 : 1;
|
|
__IO uint32_t ADDR4 : 1;
|
|
__IO uint32_t ADDR5 : 1;
|
|
__IO uint32_t ADDR6 : 1;
|
|
__IO uint32_t ADDR7 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MASK0 : 1;
|
|
__IO uint32_t MASK1 : 1;
|
|
__IO uint32_t MASK2 : 1;
|
|
__IO uint32_t MASK3 : 1;
|
|
__IO uint32_t MASK4 : 1;
|
|
__IO uint32_t MASK5 : 1;
|
|
__IO uint32_t MASK6 : 1;
|
|
} stc_exbus_area3_field_t;
|
|
|
|
typedef struct stc_exbus_area4_field
|
|
{
|
|
__IO uint32_t ADDR0 : 1;
|
|
__IO uint32_t ADDR1 : 1;
|
|
__IO uint32_t ADDR2 : 1;
|
|
__IO uint32_t ADDR3 : 1;
|
|
__IO uint32_t ADDR4 : 1;
|
|
__IO uint32_t ADDR5 : 1;
|
|
__IO uint32_t ADDR6 : 1;
|
|
__IO uint32_t ADDR7 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MASK0 : 1;
|
|
__IO uint32_t MASK1 : 1;
|
|
__IO uint32_t MASK2 : 1;
|
|
__IO uint32_t MASK3 : 1;
|
|
__IO uint32_t MASK4 : 1;
|
|
__IO uint32_t MASK5 : 1;
|
|
__IO uint32_t MASK6 : 1;
|
|
} stc_exbus_area4_field_t;
|
|
|
|
typedef struct stc_exbus_area5_field
|
|
{
|
|
__IO uint32_t ADDR0 : 1;
|
|
__IO uint32_t ADDR1 : 1;
|
|
__IO uint32_t ADDR2 : 1;
|
|
__IO uint32_t ADDR3 : 1;
|
|
__IO uint32_t ADDR4 : 1;
|
|
__IO uint32_t ADDR5 : 1;
|
|
__IO uint32_t ADDR6 : 1;
|
|
__IO uint32_t ADDR7 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MASK0 : 1;
|
|
__IO uint32_t MASK1 : 1;
|
|
__IO uint32_t MASK2 : 1;
|
|
__IO uint32_t MASK3 : 1;
|
|
__IO uint32_t MASK4 : 1;
|
|
__IO uint32_t MASK5 : 1;
|
|
__IO uint32_t MASK6 : 1;
|
|
} stc_exbus_area5_field_t;
|
|
|
|
typedef struct stc_exbus_area6_field
|
|
{
|
|
__IO uint32_t ADDR0 : 1;
|
|
__IO uint32_t ADDR1 : 1;
|
|
__IO uint32_t ADDR2 : 1;
|
|
__IO uint32_t ADDR3 : 1;
|
|
__IO uint32_t ADDR4 : 1;
|
|
__IO uint32_t ADDR5 : 1;
|
|
__IO uint32_t ADDR6 : 1;
|
|
__IO uint32_t ADDR7 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MASK0 : 1;
|
|
__IO uint32_t MASK1 : 1;
|
|
__IO uint32_t MASK2 : 1;
|
|
__IO uint32_t MASK3 : 1;
|
|
__IO uint32_t MASK4 : 1;
|
|
__IO uint32_t MASK5 : 1;
|
|
__IO uint32_t MASK6 : 1;
|
|
} stc_exbus_area6_field_t;
|
|
|
|
typedef struct stc_exbus_area7_field
|
|
{
|
|
__IO uint32_t ADDR0 : 1;
|
|
__IO uint32_t ADDR1 : 1;
|
|
__IO uint32_t ADDR2 : 1;
|
|
__IO uint32_t ADDR3 : 1;
|
|
__IO uint32_t ADDR4 : 1;
|
|
__IO uint32_t ADDR5 : 1;
|
|
__IO uint32_t ADDR6 : 1;
|
|
__IO uint32_t ADDR7 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MASK0 : 1;
|
|
__IO uint32_t MASK1 : 1;
|
|
__IO uint32_t MASK2 : 1;
|
|
__IO uint32_t MASK3 : 1;
|
|
__IO uint32_t MASK4 : 1;
|
|
__IO uint32_t MASK5 : 1;
|
|
__IO uint32_t MASK6 : 1;
|
|
} stc_exbus_area7_field_t;
|
|
|
|
typedef struct stc_exbus_atim0_field
|
|
{
|
|
__IO uint16_t ALC0 : 1;
|
|
__IO uint16_t ALC1 : 1;
|
|
__IO uint16_t ALC2 : 1;
|
|
__IO uint16_t ALC3 : 1;
|
|
__IO uint16_t ALES0 : 1;
|
|
__IO uint16_t ALES1 : 1;
|
|
__IO uint16_t ALES2 : 1;
|
|
__IO uint16_t ALES3 : 1;
|
|
__IO uint16_t ALEW0 : 1;
|
|
__IO uint16_t ALEW1 : 1;
|
|
__IO uint16_t ALEW2 : 1;
|
|
__IO uint16_t ALEW3 : 1;
|
|
} stc_exbus_atim0_field_t;
|
|
|
|
typedef struct stc_exbus_atim1_field
|
|
{
|
|
__IO uint16_t ALC0 : 1;
|
|
__IO uint16_t ALC1 : 1;
|
|
__IO uint16_t ALC2 : 1;
|
|
__IO uint16_t ALC3 : 1;
|
|
__IO uint16_t ALES0 : 1;
|
|
__IO uint16_t ALES1 : 1;
|
|
__IO uint16_t ALES2 : 1;
|
|
__IO uint16_t ALES3 : 1;
|
|
__IO uint16_t ALEW0 : 1;
|
|
__IO uint16_t ALEW1 : 1;
|
|
__IO uint16_t ALEW2 : 1;
|
|
__IO uint16_t ALEW3 : 1;
|
|
} stc_exbus_atim1_field_t;
|
|
|
|
typedef struct stc_exbus_atim2_field
|
|
{
|
|
__IO uint16_t ALC0 : 1;
|
|
__IO uint16_t ALC1 : 1;
|
|
__IO uint16_t ALC2 : 1;
|
|
__IO uint16_t ALC3 : 1;
|
|
__IO uint16_t ALES0 : 1;
|
|
__IO uint16_t ALES1 : 1;
|
|
__IO uint16_t ALES2 : 1;
|
|
__IO uint16_t ALES3 : 1;
|
|
__IO uint16_t ALEW0 : 1;
|
|
__IO uint16_t ALEW1 : 1;
|
|
__IO uint16_t ALEW2 : 1;
|
|
__IO uint16_t ALEW3 : 1;
|
|
} stc_exbus_atim2_field_t;
|
|
|
|
typedef struct stc_exbus_atim3_field
|
|
{
|
|
__IO uint16_t ALC0 : 1;
|
|
__IO uint16_t ALC1 : 1;
|
|
__IO uint16_t ALC2 : 1;
|
|
__IO uint16_t ALC3 : 1;
|
|
__IO uint16_t ALES0 : 1;
|
|
__IO uint16_t ALES1 : 1;
|
|
__IO uint16_t ALES2 : 1;
|
|
__IO uint16_t ALES3 : 1;
|
|
__IO uint16_t ALEW0 : 1;
|
|
__IO uint16_t ALEW1 : 1;
|
|
__IO uint16_t ALEW2 : 1;
|
|
__IO uint16_t ALEW3 : 1;
|
|
} stc_exbus_atim3_field_t;
|
|
|
|
typedef struct stc_exbus_atim4_field
|
|
{
|
|
__IO uint16_t ALC0 : 1;
|
|
__IO uint16_t ALC1 : 1;
|
|
__IO uint16_t ALC2 : 1;
|
|
__IO uint16_t ALC3 : 1;
|
|
__IO uint16_t ALES0 : 1;
|
|
__IO uint16_t ALES1 : 1;
|
|
__IO uint16_t ALES2 : 1;
|
|
__IO uint16_t ALES3 : 1;
|
|
__IO uint16_t ALEW0 : 1;
|
|
__IO uint16_t ALEW1 : 1;
|
|
__IO uint16_t ALEW2 : 1;
|
|
__IO uint16_t ALEW3 : 1;
|
|
} stc_exbus_atim4_field_t;
|
|
|
|
typedef struct stc_exbus_atim5_field
|
|
{
|
|
__IO uint16_t ALC0 : 1;
|
|
__IO uint16_t ALC1 : 1;
|
|
__IO uint16_t ALC2 : 1;
|
|
__IO uint16_t ALC3 : 1;
|
|
__IO uint16_t ALES0 : 1;
|
|
__IO uint16_t ALES1 : 1;
|
|
__IO uint16_t ALES2 : 1;
|
|
__IO uint16_t ALES3 : 1;
|
|
__IO uint16_t ALEW0 : 1;
|
|
__IO uint16_t ALEW1 : 1;
|
|
__IO uint16_t ALEW2 : 1;
|
|
__IO uint16_t ALEW3 : 1;
|
|
} stc_exbus_atim5_field_t;
|
|
|
|
typedef struct stc_exbus_atim6_field
|
|
{
|
|
__IO uint16_t ALC0 : 1;
|
|
__IO uint16_t ALC1 : 1;
|
|
__IO uint16_t ALC2 : 1;
|
|
__IO uint16_t ALC3 : 1;
|
|
__IO uint16_t ALES0 : 1;
|
|
__IO uint16_t ALES1 : 1;
|
|
__IO uint16_t ALES2 : 1;
|
|
__IO uint16_t ALES3 : 1;
|
|
__IO uint16_t ALEW0 : 1;
|
|
__IO uint16_t ALEW1 : 1;
|
|
__IO uint16_t ALEW2 : 1;
|
|
__IO uint16_t ALEW3 : 1;
|
|
} stc_exbus_atim6_field_t;
|
|
|
|
typedef struct stc_exbus_atim7_field
|
|
{
|
|
__IO uint16_t ALC0 : 1;
|
|
__IO uint16_t ALC1 : 1;
|
|
__IO uint16_t ALC2 : 1;
|
|
__IO uint16_t ALC3 : 1;
|
|
__IO uint16_t ALES0 : 1;
|
|
__IO uint16_t ALES1 : 1;
|
|
__IO uint16_t ALES2 : 1;
|
|
__IO uint16_t ALES3 : 1;
|
|
__IO uint16_t ALEW0 : 1;
|
|
__IO uint16_t ALEW1 : 1;
|
|
__IO uint16_t ALEW2 : 1;
|
|
__IO uint16_t ALEW3 : 1;
|
|
} stc_exbus_atim7_field_t;
|
|
|
|
typedef struct stc_exbus_dclkr_field
|
|
{
|
|
__IO uint8_t MDIV0 : 1;
|
|
__IO uint8_t MDIV1 : 1;
|
|
__IO uint8_t MDIV2 : 1;
|
|
__IO uint8_t MDIV3 : 1;
|
|
__IO uint8_t MCLKON : 1;
|
|
} stc_exbus_dclkr_field_t;
|
|
|
|
/******************************************************************************
|
|
* USB_MODULE
|
|
******************************************************************************/
|
|
/* USB_MODULE register bit fields */
|
|
typedef struct stc_usb_hcnt_field
|
|
{
|
|
__IO uint16_t HOST : 1;
|
|
__IO uint16_t URST : 1;
|
|
__IO uint16_t SOFIRE : 1;
|
|
__IO uint16_t DIRE : 1;
|
|
__IO uint16_t CNNIRE : 1;
|
|
__IO uint16_t CMPIRE : 1;
|
|
__IO uint16_t URIRE : 1;
|
|
__IO uint16_t RWKIRE : 1;
|
|
__IO uint16_t RETRY : 1;
|
|
__IO uint16_t CANCEL : 1;
|
|
__IO uint16_t SOFSTEP : 1;
|
|
} stc_usb_hcnt_field_t;
|
|
|
|
typedef struct stc_usb_hcnt0_field
|
|
{
|
|
__IO uint8_t HOST : 1;
|
|
__IO uint8_t URST : 1;
|
|
__IO uint8_t SOFIRE : 1;
|
|
__IO uint8_t DIRE : 1;
|
|
__IO uint8_t CNNIRE : 1;
|
|
__IO uint8_t CMPIRE : 1;
|
|
__IO uint8_t URIRE : 1;
|
|
__IO uint8_t RWKIRE : 1;
|
|
} stc_usb_hcnt0_field_t;
|
|
|
|
typedef struct stc_usb_hcnt1_field
|
|
{
|
|
__IO uint8_t RETRY : 1;
|
|
__IO uint8_t CANCEL : 1;
|
|
__IO uint8_t SOFSTEP : 1;
|
|
} stc_usb_hcnt1_field_t;
|
|
|
|
typedef struct stc_usb_hirq_field
|
|
{
|
|
__IO uint8_t SOFIRQ : 1;
|
|
__IO uint8_t DIRQ : 1;
|
|
__IO uint8_t CNNIRQ : 1;
|
|
__IO uint8_t CMPIRQ : 1;
|
|
__IO uint8_t URIRQ : 1;
|
|
__IO uint8_t RWKIRQ : 1;
|
|
uint8_t RESERVED1 : 1;
|
|
__IO uint8_t TCAN : 1;
|
|
} stc_usb_hirq_field_t;
|
|
|
|
typedef struct stc_usb_herr_field
|
|
{
|
|
__IO uint8_t HS0 : 1;
|
|
__IO uint8_t HS1 : 1;
|
|
__IO uint8_t STUFF : 1;
|
|
__IO uint8_t TGERR : 1;
|
|
__IO uint8_t CRC : 1;
|
|
__IO uint8_t TOUT : 1;
|
|
__IO uint8_t RERR : 1;
|
|
__IO uint8_t LSTOF : 1;
|
|
} stc_usb_herr_field_t;
|
|
|
|
typedef struct stc_usb_hstate_field
|
|
{
|
|
__IO uint8_t CSTAT : 1;
|
|
__IO uint8_t TMODE : 1;
|
|
__IO uint8_t SUSP : 1;
|
|
__IO uint8_t SOFBUSY : 1;
|
|
__IO uint8_t CLKSEL : 1;
|
|
__IO uint8_t ALIVE : 1;
|
|
} stc_usb_hstate_field_t;
|
|
|
|
typedef struct stc_usb_hfcomp_field
|
|
{
|
|
__IO uint8_t FRAMECOMP0 : 1;
|
|
__IO uint8_t FRAMECOMP1 : 1;
|
|
__IO uint8_t FRAMECOMP2 : 1;
|
|
__IO uint8_t FRAMECOMP3 : 1;
|
|
__IO uint8_t FRAMECOMP4 : 1;
|
|
__IO uint8_t FRAMECOMP5 : 1;
|
|
__IO uint8_t FRAMECOMP6 : 1;
|
|
__IO uint8_t FRAMECOMP7 : 1;
|
|
} stc_usb_hfcomp_field_t;
|
|
|
|
typedef struct stc_usb_hrtimer_field
|
|
{
|
|
__IO uint16_t RTIMER0 : 1;
|
|
__IO uint16_t RTIMER1 : 1;
|
|
__IO uint16_t RTIMER2 : 1;
|
|
__IO uint16_t RTIMER3 : 1;
|
|
__IO uint16_t RTIMER4 : 1;
|
|
__IO uint16_t RTIMER5 : 1;
|
|
__IO uint16_t RTIMER6 : 1;
|
|
__IO uint16_t RTIMER7 : 1;
|
|
__IO uint16_t RTIMER8 : 1;
|
|
__IO uint16_t RTIMER9 : 1;
|
|
__IO uint16_t RTIMER10 : 1;
|
|
__IO uint16_t RTIMER11 : 1;
|
|
__IO uint16_t RTIMER12 : 1;
|
|
__IO uint16_t RTIMER13 : 1;
|
|
__IO uint16_t RTIMER14 : 1;
|
|
__IO uint16_t RTIMER15 : 1;
|
|
} stc_usb_hrtimer_field_t;
|
|
|
|
typedef struct stc_usb_hrtimer0_field
|
|
{
|
|
__IO uint8_t RTIMER00 : 1;
|
|
__IO uint8_t RTIMER01 : 1;
|
|
__IO uint8_t RTIMER02 : 1;
|
|
__IO uint8_t RTIMER03 : 1;
|
|
__IO uint8_t RTIMER04 : 1;
|
|
__IO uint8_t RTIMER05 : 1;
|
|
__IO uint8_t RTIMER06 : 1;
|
|
__IO uint8_t RTIMER07 : 1;
|
|
} stc_usb_hrtimer0_field_t;
|
|
|
|
typedef struct stc_usb_hrtimer1_field
|
|
{
|
|
__IO uint8_t RTIMER10 : 1;
|
|
__IO uint8_t RTIMER11 : 1;
|
|
__IO uint8_t RTIMER12 : 1;
|
|
__IO uint8_t RTIMER13 : 1;
|
|
__IO uint8_t RTIMER14 : 1;
|
|
__IO uint8_t RTIMER15 : 1;
|
|
__IO uint8_t RTIMER16 : 1;
|
|
__IO uint8_t RTIMER17 : 1;
|
|
} stc_usb_hrtimer1_field_t;
|
|
|
|
typedef struct stc_usb_hrtimer2_field
|
|
{
|
|
__IO uint8_t RTIMER20 : 1;
|
|
__IO uint8_t RTIMER21 : 1;
|
|
__IO uint8_t RTIMER22 : 1;
|
|
} stc_usb_hrtimer2_field_t;
|
|
|
|
typedef struct stc_usb_hadr_field
|
|
{
|
|
__IO uint8_t ADDRESS0 : 1;
|
|
__IO uint8_t ADDRESS1 : 1;
|
|
__IO uint8_t ADDRESS2 : 1;
|
|
__IO uint8_t ADDRESS3 : 1;
|
|
__IO uint8_t ADDRESS4 : 1;
|
|
__IO uint8_t ADDRESS5 : 1;
|
|
__IO uint8_t ADDRESS6 : 1;
|
|
} stc_usb_hadr_field_t;
|
|
|
|
typedef struct stc_usb_heof_field
|
|
{
|
|
__IO uint16_t EOF0 : 1;
|
|
__IO uint16_t EOF1 : 1;
|
|
__IO uint16_t EOF2 : 1;
|
|
__IO uint16_t EOF3 : 1;
|
|
__IO uint16_t EOF4 : 1;
|
|
__IO uint16_t EOF5 : 1;
|
|
__IO uint16_t EOF6 : 1;
|
|
__IO uint16_t EOF7 : 1;
|
|
__IO uint16_t EOF8 : 1;
|
|
__IO uint16_t EOF9 : 1;
|
|
__IO uint16_t EOF10 : 1;
|
|
__IO uint16_t EOF11 : 1;
|
|
__IO uint16_t EOF12 : 1;
|
|
__IO uint16_t EOF13 : 1;
|
|
__IO uint16_t EOF14 : 1;
|
|
__IO uint16_t EOF15 : 1;
|
|
} stc_usb_heof_field_t;
|
|
|
|
typedef struct stc_usb_heof0_field
|
|
{
|
|
__IO uint8_t EOF00 : 1;
|
|
__IO uint8_t EOF01 : 1;
|
|
__IO uint8_t EOF02 : 1;
|
|
__IO uint8_t EOF03 : 1;
|
|
__IO uint8_t EOF04 : 1;
|
|
__IO uint8_t EOF05 : 1;
|
|
__IO uint8_t EOF06 : 1;
|
|
__IO uint8_t EOF07 : 1;
|
|
} stc_usb_heof0_field_t;
|
|
|
|
typedef struct stc_usb_heof1_field
|
|
{
|
|
__IO uint8_t EOF10 : 1;
|
|
__IO uint8_t EOF11 : 1;
|
|
__IO uint8_t EOF12 : 1;
|
|
__IO uint8_t EOF13 : 1;
|
|
__IO uint8_t EOF14 : 1;
|
|
__IO uint8_t EOF15 : 1;
|
|
} stc_usb_heof1_field_t;
|
|
|
|
typedef struct stc_usb_hframe_field
|
|
{
|
|
__IO uint16_t FRAME0 : 1;
|
|
__IO uint16_t FRAME1 : 1;
|
|
__IO uint16_t FRAME2 : 1;
|
|
__IO uint16_t FRAME3 : 1;
|
|
__IO uint16_t FRAME4 : 1;
|
|
__IO uint16_t FRAME5 : 1;
|
|
__IO uint16_t FRAME6 : 1;
|
|
__IO uint16_t FRAME7 : 1;
|
|
__IO uint16_t FRAME8 : 1;
|
|
__IO uint16_t FRAME9 : 1;
|
|
__IO uint16_t FRAME10 : 1;
|
|
} stc_usb_hframe_field_t;
|
|
|
|
typedef struct stc_usb_hframe0_field
|
|
{
|
|
__IO uint8_t FRAME00 : 1;
|
|
__IO uint8_t FRAME01 : 1;
|
|
__IO uint8_t FRAME02 : 1;
|
|
__IO uint8_t FRAME03 : 1;
|
|
__IO uint8_t FRAME04 : 1;
|
|
__IO uint8_t FRAME05 : 1;
|
|
__IO uint8_t FRAME06 : 1;
|
|
__IO uint8_t FRAME07 : 1;
|
|
} stc_usb_hframe0_field_t;
|
|
|
|
typedef struct stc_usb_hframe1_field
|
|
{
|
|
__IO uint8_t FRAME10 : 1;
|
|
__IO uint8_t FRAME11 : 1;
|
|
__IO uint8_t FRAME12 : 1;
|
|
__IO uint8_t FRAME13 : 1;
|
|
} stc_usb_hframe1_field_t;
|
|
|
|
typedef struct stc_usb_htoken_field
|
|
{
|
|
__IO uint8_t ENDPT0 : 1;
|
|
__IO uint8_t ENDPT1 : 1;
|
|
__IO uint8_t ENDPT2 : 1;
|
|
__IO uint8_t ENDPT3 : 1;
|
|
__IO uint8_t TKNEN0 : 1;
|
|
__IO uint8_t TKNEN1 : 1;
|
|
__IO uint8_t TKNEN2 : 1;
|
|
__IO uint8_t TGGL : 1;
|
|
} stc_usb_htoken_field_t;
|
|
|
|
typedef struct stc_usb_udcc_field
|
|
{
|
|
__IO uint16_t PWC : 1;
|
|
__IO uint16_t RFBK : 1;
|
|
uint16_t RESERVED1 : 1;
|
|
__IO uint16_t STALCLREN : 1;
|
|
__IO uint16_t USTP : 1;
|
|
__IO uint16_t HCONX : 1;
|
|
__IO uint16_t RESUM : 1;
|
|
__IO uint16_t RST : 1;
|
|
} stc_usb_udcc_field_t;
|
|
|
|
typedef struct stc_usb_ep0c_field
|
|
{
|
|
__IO uint16_t PKS00 : 1;
|
|
__IO uint16_t PKS01 : 1;
|
|
__IO uint16_t PKS02 : 1;
|
|
__IO uint16_t PKS03 : 1;
|
|
__IO uint16_t PKS04 : 1;
|
|
__IO uint16_t PKS05 : 1;
|
|
__IO uint16_t PKS06 : 1;
|
|
uint16_t RESERVED1 : 2;
|
|
__IO uint16_t STAL : 1;
|
|
} stc_usb_ep0c_field_t;
|
|
|
|
typedef struct stc_usb_ep1c_field
|
|
{
|
|
__IO uint16_t PKS10 : 1;
|
|
__IO uint16_t PKS11 : 1;
|
|
__IO uint16_t PKS12 : 1;
|
|
__IO uint16_t PKS13 : 1;
|
|
__IO uint16_t PKS14 : 1;
|
|
__IO uint16_t PKS15 : 1;
|
|
__IO uint16_t PKS16 : 1;
|
|
__IO uint16_t PKS17 : 1;
|
|
__IO uint16_t PKS18 : 1;
|
|
__IO uint16_t STAL : 1;
|
|
__IO uint16_t NULE : 1;
|
|
__IO uint16_t DMAE : 1;
|
|
__IO uint16_t DIR : 1;
|
|
__IO uint16_t TYPE0 : 1;
|
|
__IO uint16_t TYPE1 : 1;
|
|
__IO uint16_t EPEN : 1;
|
|
} stc_usb_ep1c_field_t;
|
|
|
|
typedef struct stc_usb_ep2c_field
|
|
{
|
|
__IO uint16_t PKS20 : 1;
|
|
__IO uint16_t PKS21 : 1;
|
|
__IO uint16_t PKS22 : 1;
|
|
__IO uint16_t PKS23 : 1;
|
|
__IO uint16_t PKS24 : 1;
|
|
__IO uint16_t PKS25 : 1;
|
|
__IO uint16_t PKS26 : 1;
|
|
uint16_t RESERVED1 : 2;
|
|
__IO uint16_t STAL : 1;
|
|
__IO uint16_t NULE : 1;
|
|
__IO uint16_t DMAE : 1;
|
|
__IO uint16_t DIR : 1;
|
|
__IO uint16_t TYPE0 : 1;
|
|
__IO uint16_t TYPE1 : 1;
|
|
__IO uint16_t EPEN : 1;
|
|
} stc_usb_ep2c_field_t;
|
|
|
|
typedef struct stc_usb_ep3c_field
|
|
{
|
|
__IO uint16_t PKS30 : 1;
|
|
__IO uint16_t PKS31 : 1;
|
|
__IO uint16_t PKS32 : 1;
|
|
__IO uint16_t PKS33 : 1;
|
|
__IO uint16_t PKS34 : 1;
|
|
__IO uint16_t PKS35 : 1;
|
|
__IO uint16_t PKS36 : 1;
|
|
uint16_t RESERVED1 : 2;
|
|
__IO uint16_t STAL : 1;
|
|
__IO uint16_t NULE : 1;
|
|
__IO uint16_t DMAE : 1;
|
|
__IO uint16_t DIR : 1;
|
|
__IO uint16_t TYPE0 : 1;
|
|
__IO uint16_t TYPE1 : 1;
|
|
__IO uint16_t EPEN : 1;
|
|
} stc_usb_ep3c_field_t;
|
|
|
|
typedef struct stc_usb_ep4c_field
|
|
{
|
|
__IO uint16_t PKS40 : 1;
|
|
__IO uint16_t PKS41 : 1;
|
|
__IO uint16_t PKS42 : 1;
|
|
__IO uint16_t PKS43 : 1;
|
|
__IO uint16_t PKS44 : 1;
|
|
__IO uint16_t PKS45 : 1;
|
|
__IO uint16_t PKS46 : 1;
|
|
uint16_t RESERVED1 : 2;
|
|
__IO uint16_t STAL : 1;
|
|
__IO uint16_t NULE : 1;
|
|
__IO uint16_t DMAE : 1;
|
|
__IO uint16_t DIR : 1;
|
|
__IO uint16_t TYPE0 : 1;
|
|
__IO uint16_t TYPE1 : 1;
|
|
__IO uint16_t EPEN : 1;
|
|
} stc_usb_ep4c_field_t;
|
|
|
|
typedef struct stc_usb_ep5c_field
|
|
{
|
|
__IO uint16_t PKS50 : 1;
|
|
__IO uint16_t PKS51 : 1;
|
|
__IO uint16_t PKS52 : 1;
|
|
__IO uint16_t PKS53 : 1;
|
|
__IO uint16_t PKS54 : 1;
|
|
__IO uint16_t PKS55 : 1;
|
|
__IO uint16_t PKS56 : 1;
|
|
uint16_t RESERVED1 : 2;
|
|
__IO uint16_t STAL : 1;
|
|
__IO uint16_t NULE : 1;
|
|
__IO uint16_t DMAE : 1;
|
|
__IO uint16_t DIR : 1;
|
|
__IO uint16_t TYPE0 : 1;
|
|
__IO uint16_t TYPE1 : 1;
|
|
__IO uint16_t EPEN : 1;
|
|
} stc_usb_ep5c_field_t;
|
|
|
|
typedef struct stc_usb_tmsp_field
|
|
{
|
|
__IO uint16_t TMSP0 : 1;
|
|
__IO uint16_t TMSP1 : 1;
|
|
__IO uint16_t TMSP2 : 1;
|
|
__IO uint16_t TMSP3 : 1;
|
|
__IO uint16_t TMSP4 : 1;
|
|
__IO uint16_t TMSP5 : 1;
|
|
__IO uint16_t TMSP6 : 1;
|
|
__IO uint16_t TMSP7 : 1;
|
|
__IO uint16_t TMSP8 : 1;
|
|
__IO uint16_t TMSP9 : 1;
|
|
__IO uint16_t TMSP10 : 1;
|
|
} stc_usb_tmsp_field_t;
|
|
|
|
typedef struct stc_usb_udcs_field
|
|
{
|
|
__IO uint8_t CONF : 1;
|
|
__IO uint8_t SETP : 1;
|
|
__IO uint8_t WKUP : 1;
|
|
__IO uint8_t BRST : 1;
|
|
__IO uint8_t SOF : 1;
|
|
__IO uint8_t SUSP : 1;
|
|
} stc_usb_udcs_field_t;
|
|
|
|
typedef struct stc_usb_udcie_field
|
|
{
|
|
__IO uint8_t CONFIE : 1;
|
|
__IO uint8_t CONFN : 1;
|
|
__IO uint8_t WKUPIE : 1;
|
|
__IO uint8_t BRSTIE : 1;
|
|
__IO uint8_t SOFIE : 1;
|
|
__IO uint8_t SUSPIE : 1;
|
|
} stc_usb_udcie_field_t;
|
|
|
|
typedef struct stc_usb_ep0is_field
|
|
{
|
|
uint16_t RESERVED1 : 10;
|
|
__IO uint16_t DRQI : 1;
|
|
uint16_t RESERVED2 : 3;
|
|
__IO uint16_t DRQIIE : 1;
|
|
__IO uint16_t BFINI : 1;
|
|
} stc_usb_ep0is_field_t;
|
|
|
|
typedef struct stc_usb_ep0os_field
|
|
{
|
|
__IO uint16_t SIZE0 : 1;
|
|
__IO uint16_t SIZE1 : 1;
|
|
__IO uint16_t SIZE2 : 1;
|
|
__IO uint16_t SIZE3 : 1;
|
|
__IO uint16_t SIZE4 : 1;
|
|
__IO uint16_t SIZE5 : 1;
|
|
__IO uint16_t SIZE6 : 1;
|
|
uint16_t RESERVED1 : 2;
|
|
__IO uint16_t SPK : 1;
|
|
__IO uint16_t DRQO : 1;
|
|
uint16_t RESERVED2 : 2;
|
|
__IO uint16_t SPKIE : 1;
|
|
__IO uint16_t DRQOIE : 1;
|
|
__IO uint16_t BFINI : 1;
|
|
} stc_usb_ep0os_field_t;
|
|
|
|
typedef struct stc_usb_ep1s_field
|
|
{
|
|
__IO uint16_t SIZE10 : 1;
|
|
__IO uint16_t SIZE11 : 1;
|
|
__IO uint16_t SIZE12 : 1;
|
|
__IO uint16_t SIZE13 : 1;
|
|
__IO uint16_t SIZE14 : 1;
|
|
__IO uint16_t SIZE15 : 1;
|
|
__IO uint16_t SIZE16 : 1;
|
|
__IO uint16_t SIZE17 : 1;
|
|
__IO uint16_t SIZE18 : 1;
|
|
__IO uint16_t SPK : 1;
|
|
__IO uint16_t DRQ : 1;
|
|
__IO uint16_t BUSY : 1;
|
|
uint16_t RESERVED1 : 1;
|
|
__IO uint16_t SPKIE : 1;
|
|
__IO uint16_t DRQIE : 1;
|
|
__IO uint16_t BFINI : 1;
|
|
} stc_usb_ep1s_field_t;
|
|
|
|
typedef struct stc_usb_ep2s_field
|
|
{
|
|
__IO uint16_t SIZE20 : 1;
|
|
__IO uint16_t SIZE21 : 1;
|
|
__IO uint16_t SIZE22 : 1;
|
|
__IO uint16_t SIZE23 : 1;
|
|
__IO uint16_t SIZE24 : 1;
|
|
__IO uint16_t SIZE25 : 1;
|
|
__IO uint16_t SIZE26 : 1;
|
|
uint16_t RESERVED1 : 2;
|
|
__IO uint16_t SPK : 1;
|
|
__IO uint16_t DRQ : 1;
|
|
__IO uint16_t BUSY : 1;
|
|
uint16_t RESERVED2 : 1;
|
|
__IO uint16_t SPKIE : 1;
|
|
__IO uint16_t DRQIE : 1;
|
|
__IO uint16_t BFINI : 1;
|
|
} stc_usb_ep2s_field_t;
|
|
|
|
typedef struct stc_usb_ep4s_field
|
|
{
|
|
__IO uint16_t SIZE40 : 1;
|
|
__IO uint16_t SIZE41 : 1;
|
|
__IO uint16_t SIZE42 : 1;
|
|
__IO uint16_t SIZE43 : 1;
|
|
__IO uint16_t SIZE44 : 1;
|
|
__IO uint16_t SIZE45 : 1;
|
|
__IO uint16_t SIZE46 : 1;
|
|
uint16_t RESERVED1 : 2;
|
|
__IO uint16_t SPK : 1;
|
|
__IO uint16_t DRQ : 1;
|
|
__IO uint16_t BUSY : 1;
|
|
uint16_t RESERVED2 : 1;
|
|
__IO uint16_t SPKIE : 1;
|
|
__IO uint16_t DRQIE : 1;
|
|
__IO uint16_t BFINI : 1;
|
|
} stc_usb_ep4s_field_t;
|
|
|
|
typedef struct stc_usb_ep5s_field
|
|
{
|
|
__IO uint16_t SIZE50 : 1;
|
|
__IO uint16_t SIZE51 : 1;
|
|
__IO uint16_t SIZE52 : 1;
|
|
__IO uint16_t SIZE53 : 1;
|
|
__IO uint16_t SIZE54 : 1;
|
|
__IO uint16_t SIZE55 : 1;
|
|
__IO uint16_t SIZE56 : 1;
|
|
uint16_t RESERVED1 : 2;
|
|
__IO uint16_t SPK : 1;
|
|
__IO uint16_t DRQ : 1;
|
|
__IO uint16_t BUSY : 1;
|
|
uint16_t RESERVED2 : 1;
|
|
__IO uint16_t SPKIE : 1;
|
|
__IO uint16_t DRQIE : 1;
|
|
__IO uint16_t BFINI : 1;
|
|
} stc_usb_ep5s_field_t;
|
|
|
|
/******************************************************************************
|
|
* DMAC_MODULE
|
|
******************************************************************************/
|
|
/* DMAC_MODULE register bit fields */
|
|
typedef struct stc_dmac_dmacr_field
|
|
{
|
|
uint32_t RESERVED1 : 24;
|
|
__IO uint32_t DH0 : 1;
|
|
__IO uint32_t DH1 : 1;
|
|
__IO uint32_t DH2 : 1;
|
|
__IO uint32_t DH3 : 1;
|
|
__IO uint32_t PR : 1;
|
|
uint32_t RESERVED2 : 1;
|
|
__IO uint32_t DS : 1;
|
|
__IO uint32_t DE : 1;
|
|
} stc_dmac_dmacr_field_t;
|
|
|
|
typedef struct stc_dmac_dmaca0_field
|
|
{
|
|
__IO uint32_t TC0 : 1;
|
|
__IO uint32_t TC1 : 1;
|
|
__IO uint32_t TC2 : 1;
|
|
__IO uint32_t TC3 : 1;
|
|
__IO uint32_t TC4 : 1;
|
|
__IO uint32_t TC5 : 1;
|
|
__IO uint32_t TC6 : 1;
|
|
__IO uint32_t TC7 : 1;
|
|
__IO uint32_t TC8 : 1;
|
|
__IO uint32_t TC9 : 1;
|
|
__IO uint32_t TC10 : 1;
|
|
__IO uint32_t TC11 : 1;
|
|
__IO uint32_t TC12 : 1;
|
|
__IO uint32_t TC13 : 1;
|
|
__IO uint32_t TC14 : 1;
|
|
__IO uint32_t TC15 : 1;
|
|
__IO uint32_t BC0 : 1;
|
|
__IO uint32_t BC1 : 1;
|
|
__IO uint32_t BC2 : 1;
|
|
__IO uint32_t BC3 : 1;
|
|
uint32_t RESERVED1 : 3;
|
|
__IO uint32_t IS0 : 1;
|
|
__IO uint32_t IS1 : 1;
|
|
__IO uint32_t IS2 : 1;
|
|
__IO uint32_t IS3 : 1;
|
|
__IO uint32_t IS4 : 1;
|
|
__IO uint32_t IS5 : 1;
|
|
__IO uint32_t ST : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t EB : 1;
|
|
} stc_dmac_dmaca0_field_t;
|
|
|
|
typedef struct stc_dmac_dmacb0_field
|
|
{
|
|
__IO uint32_t EM : 1;
|
|
uint32_t RESERVED1 : 15;
|
|
__IO uint32_t SS0 : 1;
|
|
__IO uint32_t SS1 : 1;
|
|
__IO uint32_t SS2 : 1;
|
|
__IO uint32_t CI : 1;
|
|
__IO uint32_t EI : 1;
|
|
__IO uint32_t RD : 1;
|
|
__IO uint32_t RS : 1;
|
|
__IO uint32_t RC : 1;
|
|
__IO uint32_t FD : 1;
|
|
__IO uint32_t FS : 1;
|
|
__IO uint32_t TW0 : 1;
|
|
__IO uint32_t TW1 : 1;
|
|
__IO uint32_t MS0 : 1;
|
|
__IO uint32_t MS1 : 1;
|
|
} stc_dmac_dmacb0_field_t;
|
|
|
|
typedef struct stc_dmac_dmaca1_field
|
|
{
|
|
__IO uint32_t TC0 : 1;
|
|
__IO uint32_t TC1 : 1;
|
|
__IO uint32_t TC2 : 1;
|
|
__IO uint32_t TC3 : 1;
|
|
__IO uint32_t TC4 : 1;
|
|
__IO uint32_t TC5 : 1;
|
|
__IO uint32_t TC6 : 1;
|
|
__IO uint32_t TC7 : 1;
|
|
__IO uint32_t TC8 : 1;
|
|
__IO uint32_t TC9 : 1;
|
|
__IO uint32_t TC10 : 1;
|
|
__IO uint32_t TC11 : 1;
|
|
__IO uint32_t TC12 : 1;
|
|
__IO uint32_t TC13 : 1;
|
|
__IO uint32_t TC14 : 1;
|
|
__IO uint32_t TC15 : 1;
|
|
__IO uint32_t BC0 : 1;
|
|
__IO uint32_t BC1 : 1;
|
|
__IO uint32_t BC2 : 1;
|
|
__IO uint32_t BC3 : 1;
|
|
uint32_t RESERVED1 : 3;
|
|
__IO uint32_t IS0 : 1;
|
|
__IO uint32_t IS1 : 1;
|
|
__IO uint32_t IS2 : 1;
|
|
__IO uint32_t IS3 : 1;
|
|
__IO uint32_t IS4 : 1;
|
|
__IO uint32_t IS5 : 1;
|
|
__IO uint32_t ST : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t EB : 1;
|
|
} stc_dmac_dmaca1_field_t;
|
|
|
|
typedef struct stc_dmac_dmacb1_field
|
|
{
|
|
__IO uint32_t EM : 1;
|
|
uint32_t RESERVED1 : 15;
|
|
__IO uint32_t SS0 : 1;
|
|
__IO uint32_t SS1 : 1;
|
|
__IO uint32_t SS2 : 1;
|
|
__IO uint32_t CI : 1;
|
|
__IO uint32_t EI : 1;
|
|
__IO uint32_t RD : 1;
|
|
__IO uint32_t RS : 1;
|
|
__IO uint32_t RC : 1;
|
|
__IO uint32_t FD : 1;
|
|
__IO uint32_t FS : 1;
|
|
__IO uint32_t TW0 : 1;
|
|
__IO uint32_t TW1 : 1;
|
|
__IO uint32_t MS0 : 1;
|
|
__IO uint32_t MS1 : 1;
|
|
} stc_dmac_dmacb1_field_t;
|
|
|
|
typedef struct stc_dmac_dmaca2_field
|
|
{
|
|
__IO uint32_t TC0 : 1;
|
|
__IO uint32_t TC1 : 1;
|
|
__IO uint32_t TC2 : 1;
|
|
__IO uint32_t TC3 : 1;
|
|
__IO uint32_t TC4 : 1;
|
|
__IO uint32_t TC5 : 1;
|
|
__IO uint32_t TC6 : 1;
|
|
__IO uint32_t TC7 : 1;
|
|
__IO uint32_t TC8 : 1;
|
|
__IO uint32_t TC9 : 1;
|
|
__IO uint32_t TC10 : 1;
|
|
__IO uint32_t TC11 : 1;
|
|
__IO uint32_t TC12 : 1;
|
|
__IO uint32_t TC13 : 1;
|
|
__IO uint32_t TC14 : 1;
|
|
__IO uint32_t TC15 : 1;
|
|
__IO uint32_t BC0 : 1;
|
|
__IO uint32_t BC1 : 1;
|
|
__IO uint32_t BC2 : 1;
|
|
__IO uint32_t BC3 : 1;
|
|
uint32_t RESERVED1 : 3;
|
|
__IO uint32_t IS0 : 1;
|
|
__IO uint32_t IS1 : 1;
|
|
__IO uint32_t IS2 : 1;
|
|
__IO uint32_t IS3 : 1;
|
|
__IO uint32_t IS4 : 1;
|
|
__IO uint32_t IS5 : 1;
|
|
__IO uint32_t ST : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t EB : 1;
|
|
} stc_dmac_dmaca2_field_t;
|
|
|
|
typedef struct stc_dmac_dmacb2_field
|
|
{
|
|
__IO uint32_t EM : 1;
|
|
uint32_t RESERVED1 : 15;
|
|
__IO uint32_t SS0 : 1;
|
|
__IO uint32_t SS1 : 1;
|
|
__IO uint32_t SS2 : 1;
|
|
__IO uint32_t CI : 1;
|
|
__IO uint32_t EI : 1;
|
|
__IO uint32_t RD : 1;
|
|
__IO uint32_t RS : 1;
|
|
__IO uint32_t RC : 1;
|
|
__IO uint32_t FD : 1;
|
|
__IO uint32_t FS : 1;
|
|
__IO uint32_t TW0 : 1;
|
|
__IO uint32_t TW1 : 1;
|
|
__IO uint32_t MS0 : 1;
|
|
__IO uint32_t MS1 : 1;
|
|
} stc_dmac_dmacb2_field_t;
|
|
|
|
typedef struct stc_dmac_dmaca3_field
|
|
{
|
|
__IO uint32_t TC0 : 1;
|
|
__IO uint32_t TC1 : 1;
|
|
__IO uint32_t TC2 : 1;
|
|
__IO uint32_t TC3 : 1;
|
|
__IO uint32_t TC4 : 1;
|
|
__IO uint32_t TC5 : 1;
|
|
__IO uint32_t TC6 : 1;
|
|
__IO uint32_t TC7 : 1;
|
|
__IO uint32_t TC8 : 1;
|
|
__IO uint32_t TC9 : 1;
|
|
__IO uint32_t TC10 : 1;
|
|
__IO uint32_t TC11 : 1;
|
|
__IO uint32_t TC12 : 1;
|
|
__IO uint32_t TC13 : 1;
|
|
__IO uint32_t TC14 : 1;
|
|
__IO uint32_t TC15 : 1;
|
|
__IO uint32_t BC0 : 1;
|
|
__IO uint32_t BC1 : 1;
|
|
__IO uint32_t BC2 : 1;
|
|
__IO uint32_t BC3 : 1;
|
|
uint32_t RESERVED1 : 3;
|
|
__IO uint32_t IS0 : 1;
|
|
__IO uint32_t IS1 : 1;
|
|
__IO uint32_t IS2 : 1;
|
|
__IO uint32_t IS3 : 1;
|
|
__IO uint32_t IS4 : 1;
|
|
__IO uint32_t IS5 : 1;
|
|
__IO uint32_t ST : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t EB : 1;
|
|
} stc_dmac_dmaca3_field_t;
|
|
|
|
typedef struct stc_dmac_dmacb3_field
|
|
{
|
|
__IO uint32_t EM : 1;
|
|
uint32_t RESERVED1 : 15;
|
|
__IO uint32_t SS0 : 1;
|
|
__IO uint32_t SS1 : 1;
|
|
__IO uint32_t SS2 : 1;
|
|
__IO uint32_t CI : 1;
|
|
__IO uint32_t EI : 1;
|
|
__IO uint32_t RD : 1;
|
|
__IO uint32_t RS : 1;
|
|
__IO uint32_t RC : 1;
|
|
__IO uint32_t FD : 1;
|
|
__IO uint32_t FS : 1;
|
|
__IO uint32_t TW0 : 1;
|
|
__IO uint32_t TW1 : 1;
|
|
__IO uint32_t MS0 : 1;
|
|
__IO uint32_t MS1 : 1;
|
|
} stc_dmac_dmacb3_field_t;
|
|
|
|
typedef struct stc_dmac_dmaca4_field
|
|
{
|
|
__IO uint32_t TC0 : 1;
|
|
__IO uint32_t TC1 : 1;
|
|
__IO uint32_t TC2 : 1;
|
|
__IO uint32_t TC3 : 1;
|
|
__IO uint32_t TC4 : 1;
|
|
__IO uint32_t TC5 : 1;
|
|
__IO uint32_t TC6 : 1;
|
|
__IO uint32_t TC7 : 1;
|
|
__IO uint32_t TC8 : 1;
|
|
__IO uint32_t TC9 : 1;
|
|
__IO uint32_t TC10 : 1;
|
|
__IO uint32_t TC11 : 1;
|
|
__IO uint32_t TC12 : 1;
|
|
__IO uint32_t TC13 : 1;
|
|
__IO uint32_t TC14 : 1;
|
|
__IO uint32_t TC15 : 1;
|
|
__IO uint32_t BC0 : 1;
|
|
__IO uint32_t BC1 : 1;
|
|
__IO uint32_t BC2 : 1;
|
|
__IO uint32_t BC3 : 1;
|
|
uint32_t RESERVED1 : 3;
|
|
__IO uint32_t IS0 : 1;
|
|
__IO uint32_t IS1 : 1;
|
|
__IO uint32_t IS2 : 1;
|
|
__IO uint32_t IS3 : 1;
|
|
__IO uint32_t IS4 : 1;
|
|
__IO uint32_t IS5 : 1;
|
|
__IO uint32_t ST : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t EB : 1;
|
|
} stc_dmac_dmaca4_field_t;
|
|
|
|
typedef struct stc_dmac_dmacb4_field
|
|
{
|
|
__IO uint32_t EM : 1;
|
|
uint32_t RESERVED1 : 15;
|
|
__IO uint32_t SS0 : 1;
|
|
__IO uint32_t SS1 : 1;
|
|
__IO uint32_t SS2 : 1;
|
|
__IO uint32_t CI : 1;
|
|
__IO uint32_t EI : 1;
|
|
__IO uint32_t RD : 1;
|
|
__IO uint32_t RS : 1;
|
|
__IO uint32_t RC : 1;
|
|
__IO uint32_t FD : 1;
|
|
__IO uint32_t FS : 1;
|
|
__IO uint32_t TW0 : 1;
|
|
__IO uint32_t TW1 : 1;
|
|
__IO uint32_t MS0 : 1;
|
|
__IO uint32_t MS1 : 1;
|
|
} stc_dmac_dmacb4_field_t;
|
|
|
|
typedef struct stc_dmac_dmaca5_field
|
|
{
|
|
__IO uint32_t TC0 : 1;
|
|
__IO uint32_t TC1 : 1;
|
|
__IO uint32_t TC2 : 1;
|
|
__IO uint32_t TC3 : 1;
|
|
__IO uint32_t TC4 : 1;
|
|
__IO uint32_t TC5 : 1;
|
|
__IO uint32_t TC6 : 1;
|
|
__IO uint32_t TC7 : 1;
|
|
__IO uint32_t TC8 : 1;
|
|
__IO uint32_t TC9 : 1;
|
|
__IO uint32_t TC10 : 1;
|
|
__IO uint32_t TC11 : 1;
|
|
__IO uint32_t TC12 : 1;
|
|
__IO uint32_t TC13 : 1;
|
|
__IO uint32_t TC14 : 1;
|
|
__IO uint32_t TC15 : 1;
|
|
__IO uint32_t BC0 : 1;
|
|
__IO uint32_t BC1 : 1;
|
|
__IO uint32_t BC2 : 1;
|
|
__IO uint32_t BC3 : 1;
|
|
uint32_t RESERVED1 : 3;
|
|
__IO uint32_t IS0 : 1;
|
|
__IO uint32_t IS1 : 1;
|
|
__IO uint32_t IS2 : 1;
|
|
__IO uint32_t IS3 : 1;
|
|
__IO uint32_t IS4 : 1;
|
|
__IO uint32_t IS5 : 1;
|
|
__IO uint32_t ST : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t EB : 1;
|
|
} stc_dmac_dmaca5_field_t;
|
|
|
|
typedef struct stc_dmac_dmacb5_field
|
|
{
|
|
__IO uint32_t EM : 1;
|
|
uint32_t RESERVED1 : 15;
|
|
__IO uint32_t SS0 : 1;
|
|
__IO uint32_t SS1 : 1;
|
|
__IO uint32_t SS2 : 1;
|
|
__IO uint32_t CI : 1;
|
|
__IO uint32_t EI : 1;
|
|
__IO uint32_t RD : 1;
|
|
__IO uint32_t RS : 1;
|
|
__IO uint32_t RC : 1;
|
|
__IO uint32_t FD : 1;
|
|
__IO uint32_t FS : 1;
|
|
__IO uint32_t TW0 : 1;
|
|
__IO uint32_t TW1 : 1;
|
|
__IO uint32_t MS0 : 1;
|
|
__IO uint32_t MS1 : 1;
|
|
} stc_dmac_dmacb5_field_t;
|
|
|
|
typedef struct stc_dmac_dmaca6_field
|
|
{
|
|
__IO uint32_t TC0 : 1;
|
|
__IO uint32_t TC1 : 1;
|
|
__IO uint32_t TC2 : 1;
|
|
__IO uint32_t TC3 : 1;
|
|
__IO uint32_t TC4 : 1;
|
|
__IO uint32_t TC5 : 1;
|
|
__IO uint32_t TC6 : 1;
|
|
__IO uint32_t TC7 : 1;
|
|
__IO uint32_t TC8 : 1;
|
|
__IO uint32_t TC9 : 1;
|
|
__IO uint32_t TC10 : 1;
|
|
__IO uint32_t TC11 : 1;
|
|
__IO uint32_t TC12 : 1;
|
|
__IO uint32_t TC13 : 1;
|
|
__IO uint32_t TC14 : 1;
|
|
__IO uint32_t TC15 : 1;
|
|
__IO uint32_t BC0 : 1;
|
|
__IO uint32_t BC1 : 1;
|
|
__IO uint32_t BC2 : 1;
|
|
__IO uint32_t BC3 : 1;
|
|
uint32_t RESERVED1 : 3;
|
|
__IO uint32_t IS0 : 1;
|
|
__IO uint32_t IS1 : 1;
|
|
__IO uint32_t IS2 : 1;
|
|
__IO uint32_t IS3 : 1;
|
|
__IO uint32_t IS4 : 1;
|
|
__IO uint32_t IS5 : 1;
|
|
__IO uint32_t ST : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t EB : 1;
|
|
} stc_dmac_dmaca6_field_t;
|
|
|
|
typedef struct stc_dmac_dmacb6_field
|
|
{
|
|
__IO uint32_t EM : 1;
|
|
uint32_t RESERVED1 : 15;
|
|
__IO uint32_t SS0 : 1;
|
|
__IO uint32_t SS1 : 1;
|
|
__IO uint32_t SS2 : 1;
|
|
__IO uint32_t CI : 1;
|
|
__IO uint32_t EI : 1;
|
|
__IO uint32_t RD : 1;
|
|
__IO uint32_t RS : 1;
|
|
__IO uint32_t RC : 1;
|
|
__IO uint32_t FD : 1;
|
|
__IO uint32_t FS : 1;
|
|
__IO uint32_t TW0 : 1;
|
|
__IO uint32_t TW1 : 1;
|
|
__IO uint32_t MS0 : 1;
|
|
__IO uint32_t MS1 : 1;
|
|
} stc_dmac_dmacb6_field_t;
|
|
|
|
typedef struct stc_dmac_dmaca7_field
|
|
{
|
|
__IO uint32_t TC0 : 1;
|
|
__IO uint32_t TC1 : 1;
|
|
__IO uint32_t TC2 : 1;
|
|
__IO uint32_t TC3 : 1;
|
|
__IO uint32_t TC4 : 1;
|
|
__IO uint32_t TC5 : 1;
|
|
__IO uint32_t TC6 : 1;
|
|
__IO uint32_t TC7 : 1;
|
|
__IO uint32_t TC8 : 1;
|
|
__IO uint32_t TC9 : 1;
|
|
__IO uint32_t TC10 : 1;
|
|
__IO uint32_t TC11 : 1;
|
|
__IO uint32_t TC12 : 1;
|
|
__IO uint32_t TC13 : 1;
|
|
__IO uint32_t TC14 : 1;
|
|
__IO uint32_t TC15 : 1;
|
|
__IO uint32_t BC0 : 1;
|
|
__IO uint32_t BC1 : 1;
|
|
__IO uint32_t BC2 : 1;
|
|
__IO uint32_t BC3 : 1;
|
|
uint32_t RESERVED1 : 3;
|
|
__IO uint32_t IS0 : 1;
|
|
__IO uint32_t IS1 : 1;
|
|
__IO uint32_t IS2 : 1;
|
|
__IO uint32_t IS3 : 1;
|
|
__IO uint32_t IS4 : 1;
|
|
__IO uint32_t IS5 : 1;
|
|
__IO uint32_t ST : 1;
|
|
__IO uint32_t PB : 1;
|
|
__IO uint32_t EB : 1;
|
|
} stc_dmac_dmaca7_field_t;
|
|
|
|
typedef struct stc_dmac_dmacb7_field
|
|
{
|
|
__IO uint32_t EM : 1;
|
|
uint32_t RESERVED1 : 15;
|
|
__IO uint32_t SS0 : 1;
|
|
__IO uint32_t SS1 : 1;
|
|
__IO uint32_t SS2 : 1;
|
|
__IO uint32_t CI : 1;
|
|
__IO uint32_t EI : 1;
|
|
__IO uint32_t RD : 1;
|
|
__IO uint32_t RS : 1;
|
|
__IO uint32_t RC : 1;
|
|
__IO uint32_t FD : 1;
|
|
__IO uint32_t FS : 1;
|
|
__IO uint32_t TW0 : 1;
|
|
__IO uint32_t TW1 : 1;
|
|
__IO uint32_t MS0 : 1;
|
|
__IO uint32_t MS1 : 1;
|
|
} stc_dmac_dmacb7_field_t;
|
|
|
|
/******************************************************************************
|
|
* ETHERNET_MAC_MODULE
|
|
******************************************************************************/
|
|
/* ETHERNET_MAC_MODULE register bit fields */
|
|
typedef struct stc_ethernet_mac_mcr_field
|
|
{
|
|
uint32_t RESERVED1 : 2;
|
|
__IO uint32_t RE : 1;
|
|
__IO uint32_t TE : 1;
|
|
__IO uint32_t DC : 1;
|
|
__IO uint32_t BL0 : 1;
|
|
__IO uint32_t BL1 : 1;
|
|
__IO uint32_t ACS : 1;
|
|
__IO uint32_t LUD : 1;
|
|
__IO uint32_t DR : 1;
|
|
__IO uint32_t IPC : 1;
|
|
__IO uint32_t DM : 1;
|
|
__IO uint32_t LM : 1;
|
|
__IO uint32_t DO : 1;
|
|
__IO uint32_t FES : 1;
|
|
__IO uint32_t PS : 1;
|
|
__IO uint32_t DCRS : 1;
|
|
__IO uint32_t IFG0 : 1;
|
|
__IO uint32_t IFG1 : 1;
|
|
__IO uint32_t IFG2 : 1;
|
|
__IO uint32_t JE : 1;
|
|
__IO uint32_t BE : 1;
|
|
__IO uint32_t JD : 1;
|
|
__IO uint32_t WD : 1;
|
|
__IO uint32_t TC : 1;
|
|
__IO uint32_t CST : 1;
|
|
} stc_ethernet_mac_mcr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mffr_field
|
|
{
|
|
__IO uint32_t PR : 1;
|
|
__IO uint32_t HUC : 1;
|
|
__IO uint32_t HMC : 1;
|
|
__IO uint32_t DAIF : 1;
|
|
__IO uint32_t PM : 1;
|
|
__IO uint32_t DB : 1;
|
|
__IO uint32_t PCF0 : 1;
|
|
__IO uint32_t PCF1 : 1;
|
|
__IO uint32_t SAIF : 1;
|
|
__IO uint32_t SAF : 1;
|
|
__IO uint32_t HPF : 1;
|
|
uint32_t RESERVED1 :20;
|
|
__IO uint32_t RA : 1;
|
|
} stc_ethernet_mac_mffr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mhtrh_field
|
|
{
|
|
__IO uint32_t HTH0 : 1;
|
|
__IO uint32_t HTH1 : 1;
|
|
__IO uint32_t HTH2 : 1;
|
|
__IO uint32_t HTH3 : 1;
|
|
__IO uint32_t HTH4 : 1;
|
|
__IO uint32_t HTH5 : 1;
|
|
__IO uint32_t HTH6 : 1;
|
|
__IO uint32_t HTH7 : 1;
|
|
__IO uint32_t HTH8 : 1;
|
|
__IO uint32_t HTH9 : 1;
|
|
__IO uint32_t HTH10 : 1;
|
|
__IO uint32_t HTH11 : 1;
|
|
__IO uint32_t HTH12 : 1;
|
|
__IO uint32_t HTH13 : 1;
|
|
__IO uint32_t HTH14 : 1;
|
|
__IO uint32_t HTH15 : 1;
|
|
__IO uint32_t HTH16 : 1;
|
|
__IO uint32_t HTH17 : 1;
|
|
__IO uint32_t HTH18 : 1;
|
|
__IO uint32_t HTH19 : 1;
|
|
__IO uint32_t HTH20 : 1;
|
|
__IO uint32_t HTH21 : 1;
|
|
__IO uint32_t HTH22 : 1;
|
|
__IO uint32_t HTH23 : 1;
|
|
__IO uint32_t HTH24 : 1;
|
|
__IO uint32_t HTH25 : 1;
|
|
__IO uint32_t HTH26 : 1;
|
|
__IO uint32_t HTH27 : 1;
|
|
__IO uint32_t HTH28 : 1;
|
|
__IO uint32_t HTH29 : 1;
|
|
__IO uint32_t HTH30 : 1;
|
|
__IO uint32_t HTH31 : 1;
|
|
} stc_ethernet_mac_mhtrh_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mhtrl_field
|
|
{
|
|
__IO uint32_t HTL0 : 1;
|
|
__IO uint32_t HTL1 : 1;
|
|
__IO uint32_t HTL2 : 1;
|
|
__IO uint32_t HTL3 : 1;
|
|
__IO uint32_t HTL4 : 1;
|
|
__IO uint32_t HTL5 : 1;
|
|
__IO uint32_t HTL6 : 1;
|
|
__IO uint32_t HTL7 : 1;
|
|
__IO uint32_t HTL8 : 1;
|
|
__IO uint32_t HTL9 : 1;
|
|
__IO uint32_t HTL10 : 1;
|
|
__IO uint32_t HTL11 : 1;
|
|
__IO uint32_t HTL12 : 1;
|
|
__IO uint32_t HTL13 : 1;
|
|
__IO uint32_t HTL14 : 1;
|
|
__IO uint32_t HTL15 : 1;
|
|
__IO uint32_t HTL16 : 1;
|
|
__IO uint32_t HTL17 : 1;
|
|
__IO uint32_t HTL18 : 1;
|
|
__IO uint32_t HTL19 : 1;
|
|
__IO uint32_t HTL20 : 1;
|
|
__IO uint32_t HTL21 : 1;
|
|
__IO uint32_t HTL22 : 1;
|
|
__IO uint32_t HTL23 : 1;
|
|
__IO uint32_t HTL24 : 1;
|
|
__IO uint32_t HTL25 : 1;
|
|
__IO uint32_t HTL26 : 1;
|
|
__IO uint32_t HTL27 : 1;
|
|
__IO uint32_t HTL28 : 1;
|
|
__IO uint32_t HTL29 : 1;
|
|
__IO uint32_t HTL30 : 1;
|
|
__IO uint32_t HTL31 : 1;
|
|
} stc_ethernet_mac_mhtrl_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_gar_field
|
|
{
|
|
__IO uint32_t GB : 1;
|
|
__IO uint32_t GW : 1;
|
|
__IO uint32_t CR0 : 1;
|
|
__IO uint32_t CR1 : 1;
|
|
__IO uint32_t CR2 : 1;
|
|
__IO uint32_t CR3 : 1;
|
|
__IO uint32_t GR0 : 1;
|
|
__IO uint32_t GR1 : 1;
|
|
__IO uint32_t GR2 : 1;
|
|
__IO uint32_t GR3 : 1;
|
|
__IO uint32_t GR4 : 1;
|
|
__IO uint32_t PA0 : 1;
|
|
__IO uint32_t PA1 : 1;
|
|
__IO uint32_t PA2 : 1;
|
|
__IO uint32_t PA3 : 1;
|
|
__IO uint32_t PA4 : 1;
|
|
} stc_ethernet_mac_gar_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_gdr_field
|
|
{
|
|
__IO uint32_t GD0 : 1;
|
|
__IO uint32_t GD1 : 1;
|
|
__IO uint32_t GD2 : 1;
|
|
__IO uint32_t GD3 : 1;
|
|
__IO uint32_t GD4 : 1;
|
|
__IO uint32_t GD5 : 1;
|
|
__IO uint32_t GD6 : 1;
|
|
__IO uint32_t GD7 : 1;
|
|
__IO uint32_t GD8 : 1;
|
|
__IO uint32_t GD9 : 1;
|
|
__IO uint32_t GD10 : 1;
|
|
__IO uint32_t GD11 : 1;
|
|
__IO uint32_t GD12 : 1;
|
|
__IO uint32_t GD13 : 1;
|
|
__IO uint32_t GD14 : 1;
|
|
__IO uint32_t GD15 : 1;
|
|
} stc_ethernet_mac_gdr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_fcr_field
|
|
{
|
|
__IO uint32_t FCB_BPA : 1;
|
|
__IO uint32_t TFE : 1;
|
|
__IO uint32_t RFE : 1;
|
|
__IO uint32_t UP : 1;
|
|
__IO uint32_t PLT0 : 1;
|
|
__IO uint32_t PLT1 : 1;
|
|
uint32_t RESERVED1 : 1;
|
|
__IO uint32_t DZPQ : 1;
|
|
uint32_t RESERVED2 : 8;
|
|
__IO uint32_t PT0 : 1;
|
|
__IO uint32_t PT1 : 1;
|
|
__IO uint32_t PT2 : 1;
|
|
__IO uint32_t PT3 : 1;
|
|
__IO uint32_t PT4 : 1;
|
|
__IO uint32_t PT5 : 1;
|
|
__IO uint32_t PT6 : 1;
|
|
__IO uint32_t PT7 : 1;
|
|
__IO uint32_t PT8 : 1;
|
|
__IO uint32_t PT9 : 1;
|
|
__IO uint32_t PT10 : 1;
|
|
__IO uint32_t PT11 : 1;
|
|
__IO uint32_t PT12 : 1;
|
|
__IO uint32_t PT13 : 1;
|
|
__IO uint32_t PT14 : 1;
|
|
__IO uint32_t PT15 : 1;
|
|
} stc_ethernet_mac_fcr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_vtr_field
|
|
{
|
|
__IO uint32_t VL0 : 1;
|
|
__IO uint32_t VL1 : 1;
|
|
__IO uint32_t VL2 : 1;
|
|
__IO uint32_t VL3 : 1;
|
|
__IO uint32_t VL4 : 1;
|
|
__IO uint32_t VL5 : 1;
|
|
__IO uint32_t VL6 : 1;
|
|
__IO uint32_t VL7 : 1;
|
|
__IO uint32_t VL8 : 1;
|
|
__IO uint32_t VL9 : 1;
|
|
__IO uint32_t VL10 : 1;
|
|
__IO uint32_t VL11 : 1;
|
|
__IO uint32_t VL12 : 1;
|
|
__IO uint32_t VL13 : 1;
|
|
__IO uint32_t VL14 : 1;
|
|
__IO uint32_t VL15 : 1;
|
|
__IO uint32_t ETV : 1;
|
|
} stc_ethernet_mac_vtr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_rwffr_field
|
|
{
|
|
__IO uint32_t RWFFR0 : 1;
|
|
__IO uint32_t RWFFR1 : 1;
|
|
__IO uint32_t RWFFR2 : 1;
|
|
__IO uint32_t RWFFR3 : 1;
|
|
__IO uint32_t RWFFR4 : 1;
|
|
__IO uint32_t RWFFR5 : 1;
|
|
__IO uint32_t RWFFR6 : 1;
|
|
__IO uint32_t RWFFR7 : 1;
|
|
__IO uint32_t RWFFR8 : 1;
|
|
__IO uint32_t RWFFR9 : 1;
|
|
__IO uint32_t RWFFR10 : 1;
|
|
__IO uint32_t RWFFR11 : 1;
|
|
__IO uint32_t RWFFR12 : 1;
|
|
__IO uint32_t RWFFR13 : 1;
|
|
__IO uint32_t RWFFR14 : 1;
|
|
__IO uint32_t RWFFR15 : 1;
|
|
__IO uint32_t RWFFR16 : 1;
|
|
__IO uint32_t RWFFR17 : 1;
|
|
__IO uint32_t RWFFR18 : 1;
|
|
__IO uint32_t RWFFR19 : 1;
|
|
__IO uint32_t RWFFR20 : 1;
|
|
__IO uint32_t RWFFR21 : 1;
|
|
__IO uint32_t RWFFR22 : 1;
|
|
__IO uint32_t RWFFR23 : 1;
|
|
__IO uint32_t RWFFR24 : 1;
|
|
__IO uint32_t RWFFR25 : 1;
|
|
__IO uint32_t RWFFR26 : 1;
|
|
__IO uint32_t RWFFR27 : 1;
|
|
__IO uint32_t RWFFR28 : 1;
|
|
__IO uint32_t RWFFR29 : 1;
|
|
__IO uint32_t RWFFR30 : 1;
|
|
__IO uint32_t RWFFR31 : 1;
|
|
} stc_ethernet_mac_rwffr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_pmtr_field
|
|
{
|
|
__IO uint32_t PD : 1;
|
|
__IO uint32_t MPE : 1;
|
|
__IO uint32_t WFE : 1;
|
|
uint32_t RESERVED1 : 2;
|
|
__IO uint32_t MPR : 1;
|
|
__IO uint32_t WPR : 1;
|
|
uint32_t RESERVED2 : 2;
|
|
__IO uint32_t GU : 1;
|
|
uint32_t RESERVED3 :21;
|
|
__IO uint32_t RWFFRPR : 1;
|
|
} stc_ethernet_mac_pmtr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_lpicsr_field
|
|
{
|
|
__IO uint32_t TLPIEN : 1;
|
|
__IO uint32_t TLPIEX : 1;
|
|
__IO uint32_t RLPIEN : 1;
|
|
__IO uint32_t RLPIEX : 1;
|
|
uint32_t RESERVED1 : 4;
|
|
__IO uint32_t TLPIST : 1;
|
|
__IO uint32_t RLPIST : 1;
|
|
uint32_t RESERVED2 : 6;
|
|
__IO uint32_t LPIEN : 1;
|
|
__IO uint32_t PLS : 1;
|
|
__IO uint32_t PLSEN : 1;
|
|
__IO uint32_t LPITXA : 1;
|
|
} stc_ethernet_mac_lpicsr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_lpitcr_field
|
|
{
|
|
__IO uint32_t TWT0 : 1;
|
|
__IO uint32_t TWT1 : 1;
|
|
__IO uint32_t TWT2 : 1;
|
|
__IO uint32_t TWT3 : 1;
|
|
__IO uint32_t TWT4 : 1;
|
|
__IO uint32_t TWT5 : 1;
|
|
__IO uint32_t TWT6 : 1;
|
|
__IO uint32_t TWT7 : 1;
|
|
__IO uint32_t TWT8 : 1;
|
|
__IO uint32_t TWT9 : 1;
|
|
__IO uint32_t TWT10 : 1;
|
|
__IO uint32_t TWT11 : 1;
|
|
__IO uint32_t TWT12 : 1;
|
|
__IO uint32_t TWT13 : 1;
|
|
__IO uint32_t TWT14 : 1;
|
|
__IO uint32_t TWT15 : 1;
|
|
__IO uint32_t LIT0 : 1;
|
|
__IO uint32_t LIT1 : 1;
|
|
__IO uint32_t LIT2 : 1;
|
|
__IO uint32_t LIT3 : 1;
|
|
__IO uint32_t LIT4 : 1;
|
|
__IO uint32_t LIT5 : 1;
|
|
__IO uint32_t LIT6 : 1;
|
|
__IO uint32_t LIT7 : 1;
|
|
__IO uint32_t LIT8 : 1;
|
|
__IO uint32_t LIT9 : 1;
|
|
} stc_ethernet_mac_lpitcr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_isr_field
|
|
{
|
|
__IO uint32_t RGIS : 1;
|
|
uint32_t RESERVED1 : 2;
|
|
__IO uint32_t PIS : 1;
|
|
__IO uint32_t MIS : 1;
|
|
__IO uint32_t RIS : 1;
|
|
__IO uint32_t TIS : 1;
|
|
__IO uint32_t COIS : 1;
|
|
uint32_t RESERVED2 : 1;
|
|
__IO uint32_t TSIS : 1;
|
|
__IO uint32_t LPIIS : 1;
|
|
} stc_ethernet_mac_isr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_imr_field
|
|
{
|
|
__IO uint32_t RGIM : 1;
|
|
uint32_t RESERVED1 : 2;
|
|
__IO uint32_t PIM : 1;
|
|
uint32_t RESERVED2 : 5;
|
|
__IO uint32_t TSIM : 1;
|
|
__IO uint32_t LPIIM : 1;
|
|
} stc_ethernet_mac_imr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar0h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 :15;
|
|
__IO uint32_t MO : 1;
|
|
} stc_ethernet_mac_mar0h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar0l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar0l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar1h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar1h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar1l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar1l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar2h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar2h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar2l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar2l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar3h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar3h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar3l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar3l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar4h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar4h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar4l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar4l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar5h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar5h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar5l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar5l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar6h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar6h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar6l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar6l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar7h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar7h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar7l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar7l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar8h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar8h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar8l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar8l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar9h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar9h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar9l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar9l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar10h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar10h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar10l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar10l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar11h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar11h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar11l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar11l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar12h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar12h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar12l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar12l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar13h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar13h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar13l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar13l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar14h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar14h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar14l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar14l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar15h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar15h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar15l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar15l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_rgsr_field
|
|
{
|
|
__IO uint32_t LM : 1;
|
|
__IO uint32_t LSP0 : 1;
|
|
__IO uint32_t LSP1 : 1;
|
|
__IO uint32_t LS : 1;
|
|
} stc_ethernet_mac_rgsr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_tscr_field
|
|
{
|
|
__IO uint32_t TSE : 1;
|
|
__IO uint32_t TFCU : 1;
|
|
__IO uint32_t TSI : 1;
|
|
__IO uint32_t TSU : 1;
|
|
__IO uint32_t TITE : 1;
|
|
__IO uint32_t TARU : 1;
|
|
uint32_t RESERVED1 : 2;
|
|
__IO uint32_t TSEA : 1;
|
|
__IO uint32_t TSDB : 1;
|
|
__IO uint32_t TSV2E : 1;
|
|
__IO uint32_t TETSP : 1;
|
|
__IO uint32_t TSIP6E : 1;
|
|
__IO uint32_t TSIP4E : 1;
|
|
__IO uint32_t TETSEM : 1;
|
|
__IO uint32_t TSMRM : 1;
|
|
__IO uint32_t TSPS0 : 1;
|
|
__IO uint32_t TSPS1 : 1;
|
|
__IO uint32_t TSENMF : 1;
|
|
uint32_t RESERVED2 : 5;
|
|
__IO uint32_t ATSFC : 1;
|
|
} stc_ethernet_mac_tscr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_ssir_field
|
|
{
|
|
__IO uint32_t SSINC0 : 1;
|
|
__IO uint32_t SSINC1 : 1;
|
|
__IO uint32_t SSINC2 : 1;
|
|
__IO uint32_t SSINC3 : 1;
|
|
__IO uint32_t SSINC4 : 1;
|
|
__IO uint32_t SSINC5 : 1;
|
|
__IO uint32_t SSINC6 : 1;
|
|
__IO uint32_t SSINC7 : 1;
|
|
} stc_ethernet_mac_ssir_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_stsr_field
|
|
{
|
|
__IO uint32_t TSS0 : 1;
|
|
__IO uint32_t TSS1 : 1;
|
|
__IO uint32_t TSS2 : 1;
|
|
__IO uint32_t TSS3 : 1;
|
|
__IO uint32_t TSS4 : 1;
|
|
__IO uint32_t TSS5 : 1;
|
|
__IO uint32_t TSS6 : 1;
|
|
__IO uint32_t TSS7 : 1;
|
|
__IO uint32_t TSS8 : 1;
|
|
__IO uint32_t TSS9 : 1;
|
|
__IO uint32_t TSS10 : 1;
|
|
__IO uint32_t TSS11 : 1;
|
|
__IO uint32_t TSS12 : 1;
|
|
__IO uint32_t TSS13 : 1;
|
|
__IO uint32_t TSS14 : 1;
|
|
__IO uint32_t TSS15 : 1;
|
|
__IO uint32_t TSS16 : 1;
|
|
__IO uint32_t TSS17 : 1;
|
|
__IO uint32_t TSS18 : 1;
|
|
__IO uint32_t TSS19 : 1;
|
|
__IO uint32_t TSS20 : 1;
|
|
__IO uint32_t TSS21 : 1;
|
|
__IO uint32_t TSS22 : 1;
|
|
__IO uint32_t TSS23 : 1;
|
|
__IO uint32_t TSS24 : 1;
|
|
__IO uint32_t TSS25 : 1;
|
|
__IO uint32_t TSS26 : 1;
|
|
__IO uint32_t TSS27 : 1;
|
|
__IO uint32_t TSS28 : 1;
|
|
__IO uint32_t TSS29 : 1;
|
|
__IO uint32_t TSS30 : 1;
|
|
__IO uint32_t TSS31 : 1;
|
|
} stc_ethernet_mac_stsr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_stnr_field
|
|
{
|
|
__IO uint32_t TSSS0 : 1;
|
|
__IO uint32_t TSSS1 : 1;
|
|
__IO uint32_t TSSS2 : 1;
|
|
__IO uint32_t TSSS3 : 1;
|
|
__IO uint32_t TSSS4 : 1;
|
|
__IO uint32_t TSSS5 : 1;
|
|
__IO uint32_t TSSS6 : 1;
|
|
__IO uint32_t TSSS7 : 1;
|
|
__IO uint32_t TSSS8 : 1;
|
|
__IO uint32_t TSSS9 : 1;
|
|
__IO uint32_t TSSS10 : 1;
|
|
__IO uint32_t TSSS11 : 1;
|
|
__IO uint32_t TSSS12 : 1;
|
|
__IO uint32_t TSSS13 : 1;
|
|
__IO uint32_t TSSS14 : 1;
|
|
__IO uint32_t TSSS15 : 1;
|
|
__IO uint32_t TSSS16 : 1;
|
|
__IO uint32_t TSSS17 : 1;
|
|
__IO uint32_t TSSS18 : 1;
|
|
__IO uint32_t TSSS19 : 1;
|
|
__IO uint32_t TSSS20 : 1;
|
|
__IO uint32_t TSSS21 : 1;
|
|
__IO uint32_t TSSS22 : 1;
|
|
__IO uint32_t TSSS23 : 1;
|
|
__IO uint32_t TSSS24 : 1;
|
|
__IO uint32_t TSSS25 : 1;
|
|
__IO uint32_t TSSS26 : 1;
|
|
__IO uint32_t TSSS27 : 1;
|
|
__IO uint32_t TSSS28 : 1;
|
|
__IO uint32_t TSSS29 : 1;
|
|
__IO uint32_t TSSS30 : 1;
|
|
} stc_ethernet_mac_stnr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_stsur_field
|
|
{
|
|
__IO uint32_t TSS0 : 1;
|
|
__IO uint32_t TSS1 : 1;
|
|
__IO uint32_t TSS2 : 1;
|
|
__IO uint32_t TSS3 : 1;
|
|
__IO uint32_t TSS4 : 1;
|
|
__IO uint32_t TSS5 : 1;
|
|
__IO uint32_t TSS6 : 1;
|
|
__IO uint32_t TSS7 : 1;
|
|
__IO uint32_t TSS8 : 1;
|
|
__IO uint32_t TSS9 : 1;
|
|
__IO uint32_t TSS10 : 1;
|
|
__IO uint32_t TSS11 : 1;
|
|
__IO uint32_t TSS12 : 1;
|
|
__IO uint32_t TSS13 : 1;
|
|
__IO uint32_t TSS14 : 1;
|
|
__IO uint32_t TSS15 : 1;
|
|
__IO uint32_t TSS16 : 1;
|
|
__IO uint32_t TSS17 : 1;
|
|
__IO uint32_t TSS18 : 1;
|
|
__IO uint32_t TSS19 : 1;
|
|
__IO uint32_t TSS20 : 1;
|
|
__IO uint32_t TSS21 : 1;
|
|
__IO uint32_t TSS22 : 1;
|
|
__IO uint32_t TSS23 : 1;
|
|
__IO uint32_t TSS24 : 1;
|
|
__IO uint32_t TSS25 : 1;
|
|
__IO uint32_t TSS26 : 1;
|
|
__IO uint32_t TSS27 : 1;
|
|
__IO uint32_t TSS28 : 1;
|
|
__IO uint32_t TSS29 : 1;
|
|
__IO uint32_t TSS30 : 1;
|
|
__IO uint32_t TSS31 : 1;
|
|
} stc_ethernet_mac_stsur_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_stnur_field
|
|
{
|
|
__IO uint32_t TSSS0 : 1;
|
|
__IO uint32_t TSSS1 : 1;
|
|
__IO uint32_t TSSS2 : 1;
|
|
__IO uint32_t TSSS3 : 1;
|
|
__IO uint32_t TSSS4 : 1;
|
|
__IO uint32_t TSSS5 : 1;
|
|
__IO uint32_t TSSS6 : 1;
|
|
__IO uint32_t TSSS7 : 1;
|
|
__IO uint32_t TSSS8 : 1;
|
|
__IO uint32_t TSSS9 : 1;
|
|
__IO uint32_t TSSS10 : 1;
|
|
__IO uint32_t TSSS11 : 1;
|
|
__IO uint32_t TSSS12 : 1;
|
|
__IO uint32_t TSSS13 : 1;
|
|
__IO uint32_t TSSS14 : 1;
|
|
__IO uint32_t TSSS15 : 1;
|
|
__IO uint32_t TSSS16 : 1;
|
|
__IO uint32_t TSSS17 : 1;
|
|
__IO uint32_t TSSS18 : 1;
|
|
__IO uint32_t TSSS19 : 1;
|
|
__IO uint32_t TSSS20 : 1;
|
|
__IO uint32_t TSSS21 : 1;
|
|
__IO uint32_t TSSS22 : 1;
|
|
__IO uint32_t TSSS23 : 1;
|
|
__IO uint32_t TSSS24 : 1;
|
|
__IO uint32_t TSSS25 : 1;
|
|
__IO uint32_t TSSS26 : 1;
|
|
__IO uint32_t TSSS27 : 1;
|
|
__IO uint32_t TSSS28 : 1;
|
|
__IO uint32_t TSSS29 : 1;
|
|
__IO uint32_t TSSS30 : 1;
|
|
__IO uint32_t ADDSUB : 1;
|
|
} stc_ethernet_mac_stnur_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_tsar_field
|
|
{
|
|
__IO uint32_t TSAR0 : 1;
|
|
__IO uint32_t TSAR1 : 1;
|
|
__IO uint32_t TSAR2 : 1;
|
|
__IO uint32_t TSAR3 : 1;
|
|
__IO uint32_t TSAR4 : 1;
|
|
__IO uint32_t TSAR5 : 1;
|
|
__IO uint32_t TSAR6 : 1;
|
|
__IO uint32_t TSAR7 : 1;
|
|
__IO uint32_t TSAR8 : 1;
|
|
__IO uint32_t TSAR9 : 1;
|
|
__IO uint32_t TSAR10 : 1;
|
|
__IO uint32_t TSAR11 : 1;
|
|
__IO uint32_t TSAR12 : 1;
|
|
__IO uint32_t TSAR13 : 1;
|
|
__IO uint32_t TSAR14 : 1;
|
|
__IO uint32_t TSAR15 : 1;
|
|
__IO uint32_t TSAR16 : 1;
|
|
__IO uint32_t TSAR17 : 1;
|
|
__IO uint32_t TSAR18 : 1;
|
|
__IO uint32_t TSAR19 : 1;
|
|
__IO uint32_t TSAR20 : 1;
|
|
__IO uint32_t TSAR21 : 1;
|
|
__IO uint32_t TSAR22 : 1;
|
|
__IO uint32_t TSAR23 : 1;
|
|
__IO uint32_t TSAR24 : 1;
|
|
__IO uint32_t TSAR25 : 1;
|
|
__IO uint32_t TSAR26 : 1;
|
|
__IO uint32_t TSAR27 : 1;
|
|
__IO uint32_t TSAR28 : 1;
|
|
__IO uint32_t TSAR29 : 1;
|
|
__IO uint32_t TSAR30 : 1;
|
|
__IO uint32_t TSAR31 : 1;
|
|
} stc_ethernet_mac_tsar_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_ttsr_field
|
|
{
|
|
__IO uint32_t TSTR0 : 1;
|
|
__IO uint32_t TSTR1 : 1;
|
|
__IO uint32_t TSTR2 : 1;
|
|
__IO uint32_t TSTR3 : 1;
|
|
__IO uint32_t TSTR4 : 1;
|
|
__IO uint32_t TSTR5 : 1;
|
|
__IO uint32_t TSTR6 : 1;
|
|
__IO uint32_t TSTR7 : 1;
|
|
__IO uint32_t TSTR8 : 1;
|
|
__IO uint32_t TSTR9 : 1;
|
|
__IO uint32_t TSTR10 : 1;
|
|
__IO uint32_t TSTR11 : 1;
|
|
__IO uint32_t TSTR12 : 1;
|
|
__IO uint32_t TSTR13 : 1;
|
|
__IO uint32_t TSTR14 : 1;
|
|
__IO uint32_t TSTR15 : 1;
|
|
__IO uint32_t TSTR16 : 1;
|
|
__IO uint32_t TSTR17 : 1;
|
|
__IO uint32_t TSTR18 : 1;
|
|
__IO uint32_t TSTR19 : 1;
|
|
__IO uint32_t TSTR20 : 1;
|
|
__IO uint32_t TSTR21 : 1;
|
|
__IO uint32_t TSTR22 : 1;
|
|
__IO uint32_t TSTR23 : 1;
|
|
__IO uint32_t TSTR24 : 1;
|
|
__IO uint32_t TSTR25 : 1;
|
|
__IO uint32_t TSTR26 : 1;
|
|
__IO uint32_t TSTR27 : 1;
|
|
__IO uint32_t TSTR28 : 1;
|
|
__IO uint32_t TSTR29 : 1;
|
|
__IO uint32_t TSTR30 : 1;
|
|
__IO uint32_t TSTR31 : 1;
|
|
} stc_ethernet_mac_ttsr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_ttnr_field
|
|
{
|
|
__IO uint32_t TSTR0 : 1;
|
|
__IO uint32_t TSTR1 : 1;
|
|
__IO uint32_t TSTR2 : 1;
|
|
__IO uint32_t TSTR3 : 1;
|
|
__IO uint32_t TSTR4 : 1;
|
|
__IO uint32_t TSTR5 : 1;
|
|
__IO uint32_t TSTR6 : 1;
|
|
__IO uint32_t TSTR7 : 1;
|
|
__IO uint32_t TSTR8 : 1;
|
|
__IO uint32_t TSTR9 : 1;
|
|
__IO uint32_t TSTR10 : 1;
|
|
__IO uint32_t TSTR11 : 1;
|
|
__IO uint32_t TSTR12 : 1;
|
|
__IO uint32_t TSTR13 : 1;
|
|
__IO uint32_t TSTR14 : 1;
|
|
__IO uint32_t TSTR15 : 1;
|
|
__IO uint32_t TSTR16 : 1;
|
|
__IO uint32_t TSTR17 : 1;
|
|
__IO uint32_t TSTR18 : 1;
|
|
__IO uint32_t TSTR19 : 1;
|
|
__IO uint32_t TSTR20 : 1;
|
|
__IO uint32_t TSTR21 : 1;
|
|
__IO uint32_t TSTR22 : 1;
|
|
__IO uint32_t TSTR23 : 1;
|
|
__IO uint32_t TSTR24 : 1;
|
|
__IO uint32_t TSTR25 : 1;
|
|
__IO uint32_t TSTR26 : 1;
|
|
__IO uint32_t TSTR27 : 1;
|
|
__IO uint32_t TSTR28 : 1;
|
|
__IO uint32_t TSTR29 : 1;
|
|
__IO uint32_t TSTR30 : 1;
|
|
} stc_ethernet_mac_ttnr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_sthwsr_field
|
|
{
|
|
__IO uint32_t TSHWR0 : 1;
|
|
__IO uint32_t TSHWR1 : 1;
|
|
__IO uint32_t TSHWR2 : 1;
|
|
__IO uint32_t TSHWR3 : 1;
|
|
__IO uint32_t TSHWR4 : 1;
|
|
__IO uint32_t TSHWR5 : 1;
|
|
__IO uint32_t TSHWR6 : 1;
|
|
__IO uint32_t TSHWR7 : 1;
|
|
__IO uint32_t TSHWR8 : 1;
|
|
__IO uint32_t TSHWR9 : 1;
|
|
__IO uint32_t TSHWR10 : 1;
|
|
__IO uint32_t TSHWR11 : 1;
|
|
__IO uint32_t TSHWR12 : 1;
|
|
__IO uint32_t TSHWR13 : 1;
|
|
__IO uint32_t TSHWR14 : 1;
|
|
__IO uint32_t TSHWR15 : 1;
|
|
} stc_ethernet_mac_sthwsr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_tsr_field
|
|
{
|
|
__IO uint32_t TSSOVF : 1;
|
|
__IO uint32_t TSTART : 1;
|
|
__IO uint32_t ATSTS : 1;
|
|
__IO uint32_t TRGTER : 1;
|
|
uint32_t RESERVED1 :20;
|
|
__IO uint32_t ATSSTM : 1;
|
|
__IO uint32_t ATSNS0 : 1;
|
|
__IO uint32_t ATSNS1 : 1;
|
|
__IO uint32_t ATSNS2 : 1;
|
|
} stc_ethernet_mac_tsr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_ppscr_field
|
|
{
|
|
__IO uint32_t PPSCTRL0 : 1;
|
|
__IO uint32_t PPSCTRL1 : 1;
|
|
__IO uint32_t PPSCTRL2 : 1;
|
|
__IO uint32_t PPSCTRL3 : 1;
|
|
} stc_ethernet_mac_ppscr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_atnr_field
|
|
{
|
|
__IO uint32_t ATN0 : 1;
|
|
__IO uint32_t ATN1 : 1;
|
|
__IO uint32_t ATN2 : 1;
|
|
__IO uint32_t ATN3 : 1;
|
|
__IO uint32_t ATN4 : 1;
|
|
__IO uint32_t ATN5 : 1;
|
|
__IO uint32_t ATN6 : 1;
|
|
__IO uint32_t ATN7 : 1;
|
|
__IO uint32_t ATN8 : 1;
|
|
__IO uint32_t ATN9 : 1;
|
|
__IO uint32_t ATN10 : 1;
|
|
__IO uint32_t ATN11 : 1;
|
|
__IO uint32_t ATN12 : 1;
|
|
__IO uint32_t ATN13 : 1;
|
|
__IO uint32_t ATN14 : 1;
|
|
__IO uint32_t ATN15 : 1;
|
|
__IO uint32_t ATN16 : 1;
|
|
__IO uint32_t ATN17 : 1;
|
|
__IO uint32_t ATN18 : 1;
|
|
__IO uint32_t ATN19 : 1;
|
|
__IO uint32_t ATN20 : 1;
|
|
__IO uint32_t ATN21 : 1;
|
|
__IO uint32_t ATN22 : 1;
|
|
__IO uint32_t ATN23 : 1;
|
|
__IO uint32_t ATN24 : 1;
|
|
__IO uint32_t ATN25 : 1;
|
|
__IO uint32_t ATN26 : 1;
|
|
__IO uint32_t ATN27 : 1;
|
|
__IO uint32_t ATN28 : 1;
|
|
__IO uint32_t ATN29 : 1;
|
|
__IO uint32_t ATN30 : 1;
|
|
} stc_ethernet_mac_atnr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_atsr_field
|
|
{
|
|
__IO uint32_t ATS0 : 1;
|
|
__IO uint32_t ATS1 : 1;
|
|
__IO uint32_t ATS2 : 1;
|
|
__IO uint32_t ATS3 : 1;
|
|
__IO uint32_t ATS4 : 1;
|
|
__IO uint32_t ATS5 : 1;
|
|
__IO uint32_t ATS6 : 1;
|
|
__IO uint32_t ATS7 : 1;
|
|
__IO uint32_t ATS8 : 1;
|
|
__IO uint32_t ATS9 : 1;
|
|
__IO uint32_t ATS10 : 1;
|
|
__IO uint32_t ATS11 : 1;
|
|
__IO uint32_t ATS12 : 1;
|
|
__IO uint32_t ATS13 : 1;
|
|
__IO uint32_t ATS14 : 1;
|
|
__IO uint32_t ATS15 : 1;
|
|
__IO uint32_t ATS16 : 1;
|
|
__IO uint32_t ATS17 : 1;
|
|
__IO uint32_t ATS18 : 1;
|
|
__IO uint32_t ATS19 : 1;
|
|
__IO uint32_t ATS20 : 1;
|
|
__IO uint32_t ATS21 : 1;
|
|
__IO uint32_t ATS22 : 1;
|
|
__IO uint32_t ATS23 : 1;
|
|
__IO uint32_t ATS24 : 1;
|
|
__IO uint32_t ATS25 : 1;
|
|
__IO uint32_t ATS26 : 1;
|
|
__IO uint32_t ATS27 : 1;
|
|
__IO uint32_t ATS28 : 1;
|
|
__IO uint32_t ATS29 : 1;
|
|
__IO uint32_t ATS30 : 1;
|
|
__IO uint32_t ATS31 : 1;
|
|
} stc_ethernet_mac_atsr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar16h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar16h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar16l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar16l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar17h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar17h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar17l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar17l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar18h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar18h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar18l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar18l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar19h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar19h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar19l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar19l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar20h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar20h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar20l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar20l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar21h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar21h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar21l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar21l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar22h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar22h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar22l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar22l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar23h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar23h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar23l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar23l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar24h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar24h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar24l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar24l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar25h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar25h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar25l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar25l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar26h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar26h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar26l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar26l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar27h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar27h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar27l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar27l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar28h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar28h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar28l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar28l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar29h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar29h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar29l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar29l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar30h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar30h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar30l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar30l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar31h_field
|
|
{
|
|
__IO uint32_t A32 : 1;
|
|
__IO uint32_t A33 : 1;
|
|
__IO uint32_t A34 : 1;
|
|
__IO uint32_t A35 : 1;
|
|
__IO uint32_t A36 : 1;
|
|
__IO uint32_t A37 : 1;
|
|
__IO uint32_t A38 : 1;
|
|
__IO uint32_t A39 : 1;
|
|
__IO uint32_t A40 : 1;
|
|
__IO uint32_t A41 : 1;
|
|
__IO uint32_t A42 : 1;
|
|
__IO uint32_t A43 : 1;
|
|
__IO uint32_t A44 : 1;
|
|
__IO uint32_t A45 : 1;
|
|
__IO uint32_t A46 : 1;
|
|
__IO uint32_t A47 : 1;
|
|
uint32_t RESERVED1 : 8;
|
|
__IO uint32_t MBC0 : 1;
|
|
__IO uint32_t MBC1 : 1;
|
|
__IO uint32_t MBC2 : 1;
|
|
__IO uint32_t MBC3 : 1;
|
|
__IO uint32_t MBC4 : 1;
|
|
__IO uint32_t MBC5 : 1;
|
|
__IO uint32_t SA : 1;
|
|
__IO uint32_t AE : 1;
|
|
} stc_ethernet_mac_mar31h_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mar31l_field
|
|
{
|
|
__IO uint32_t A0 : 1;
|
|
__IO uint32_t A1 : 1;
|
|
__IO uint32_t A2 : 1;
|
|
__IO uint32_t A3 : 1;
|
|
__IO uint32_t A4 : 1;
|
|
__IO uint32_t A5 : 1;
|
|
__IO uint32_t A6 : 1;
|
|
__IO uint32_t A7 : 1;
|
|
__IO uint32_t A8 : 1;
|
|
__IO uint32_t A9 : 1;
|
|
__IO uint32_t A10 : 1;
|
|
__IO uint32_t A11 : 1;
|
|
__IO uint32_t A12 : 1;
|
|
__IO uint32_t A13 : 1;
|
|
__IO uint32_t A14 : 1;
|
|
__IO uint32_t A15 : 1;
|
|
__IO uint32_t A16 : 1;
|
|
__IO uint32_t A17 : 1;
|
|
__IO uint32_t A18 : 1;
|
|
__IO uint32_t A19 : 1;
|
|
__IO uint32_t A20 : 1;
|
|
__IO uint32_t A21 : 1;
|
|
__IO uint32_t A22 : 1;
|
|
__IO uint32_t A23 : 1;
|
|
__IO uint32_t A24 : 1;
|
|
__IO uint32_t A25 : 1;
|
|
__IO uint32_t A26 : 1;
|
|
__IO uint32_t A27 : 1;
|
|
__IO uint32_t A28 : 1;
|
|
__IO uint32_t A29 : 1;
|
|
__IO uint32_t A30 : 1;
|
|
__IO uint32_t A31 : 1;
|
|
} stc_ethernet_mac_mar31l_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_bmr_field
|
|
{
|
|
__IO uint32_t SWR : 1;
|
|
__IO uint32_t DA : 1;
|
|
__IO uint32_t DSL0 : 1;
|
|
__IO uint32_t DSL1 : 1;
|
|
__IO uint32_t DSL2 : 1;
|
|
__IO uint32_t DSL3 : 1;
|
|
__IO uint32_t DSL4 : 1;
|
|
__IO uint32_t ATDS : 1;
|
|
__IO uint32_t PBL0 : 1;
|
|
__IO uint32_t PBL1 : 1;
|
|
__IO uint32_t PBL2 : 1;
|
|
__IO uint32_t PBL3 : 1;
|
|
__IO uint32_t PBL4 : 1;
|
|
__IO uint32_t PBL5 : 1;
|
|
__IO uint32_t PR0 : 1;
|
|
__IO uint32_t PR1 : 1;
|
|
__IO uint32_t FB : 1;
|
|
__IO uint32_t RPBL0 : 1;
|
|
__IO uint32_t RPBL1 : 1;
|
|
__IO uint32_t RPBL2 : 1;
|
|
__IO uint32_t RPBL3 : 1;
|
|
__IO uint32_t RPBL4 : 1;
|
|
__IO uint32_t RPBL5 : 1;
|
|
__IO uint32_t USP : 1;
|
|
__IO uint32_t _8XPBL : 1;
|
|
__IO uint32_t AAL : 1;
|
|
__IO uint32_t MB : 1;
|
|
__IO uint32_t TXPR : 1;
|
|
} stc_ethernet_mac_bmr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_tpdr_field
|
|
{
|
|
__IO uint32_t TPD0 : 1;
|
|
__IO uint32_t TPD1 : 1;
|
|
__IO uint32_t TPD2 : 1;
|
|
__IO uint32_t TPD3 : 1;
|
|
__IO uint32_t TPD4 : 1;
|
|
__IO uint32_t TPD5 : 1;
|
|
__IO uint32_t TPD6 : 1;
|
|
__IO uint32_t TPD7 : 1;
|
|
__IO uint32_t TPD8 : 1;
|
|
__IO uint32_t TPD9 : 1;
|
|
__IO uint32_t TPD10 : 1;
|
|
__IO uint32_t TPD11 : 1;
|
|
__IO uint32_t TPD12 : 1;
|
|
__IO uint32_t TPD13 : 1;
|
|
__IO uint32_t TPD14 : 1;
|
|
__IO uint32_t TPD15 : 1;
|
|
__IO uint32_t TPD16 : 1;
|
|
__IO uint32_t TPD17 : 1;
|
|
__IO uint32_t TPD18 : 1;
|
|
__IO uint32_t TPD19 : 1;
|
|
__IO uint32_t TPD20 : 1;
|
|
__IO uint32_t TPD21 : 1;
|
|
__IO uint32_t TPD22 : 1;
|
|
__IO uint32_t TPD23 : 1;
|
|
__IO uint32_t TPD24 : 1;
|
|
__IO uint32_t TPD25 : 1;
|
|
__IO uint32_t TPD26 : 1;
|
|
__IO uint32_t TPD27 : 1;
|
|
__IO uint32_t TPD28 : 1;
|
|
__IO uint32_t TPD29 : 1;
|
|
__IO uint32_t TPD30 : 1;
|
|
__IO uint32_t TPD31 : 1;
|
|
} stc_ethernet_mac_tpdr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_rpdr_field
|
|
{
|
|
__IO uint32_t RPD0 : 1;
|
|
__IO uint32_t RPD1 : 1;
|
|
__IO uint32_t RPD2 : 1;
|
|
__IO uint32_t RPD3 : 1;
|
|
__IO uint32_t RPD4 : 1;
|
|
__IO uint32_t RPD5 : 1;
|
|
__IO uint32_t RPD6 : 1;
|
|
__IO uint32_t RPD7 : 1;
|
|
__IO uint32_t RPD8 : 1;
|
|
__IO uint32_t RPD9 : 1;
|
|
__IO uint32_t RPD10 : 1;
|
|
__IO uint32_t RPD11 : 1;
|
|
__IO uint32_t RPD12 : 1;
|
|
__IO uint32_t RPD13 : 1;
|
|
__IO uint32_t RPD14 : 1;
|
|
__IO uint32_t RPD15 : 1;
|
|
__IO uint32_t RPD16 : 1;
|
|
__IO uint32_t RPD17 : 1;
|
|
__IO uint32_t RPD18 : 1;
|
|
__IO uint32_t RPD19 : 1;
|
|
__IO uint32_t RPD20 : 1;
|
|
__IO uint32_t RPD21 : 1;
|
|
__IO uint32_t RPD22 : 1;
|
|
__IO uint32_t RPD23 : 1;
|
|
__IO uint32_t RPD24 : 1;
|
|
__IO uint32_t RPD25 : 1;
|
|
__IO uint32_t RPD26 : 1;
|
|
__IO uint32_t RPD27 : 1;
|
|
__IO uint32_t RPD28 : 1;
|
|
__IO uint32_t RPD29 : 1;
|
|
__IO uint32_t RPD30 : 1;
|
|
__IO uint32_t RPD31 : 1;
|
|
} stc_ethernet_mac_rpdr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_rdlar_field
|
|
{
|
|
uint32_t RESERVED1 : 2;
|
|
__IO uint32_t SRL2 : 1;
|
|
__IO uint32_t SRL3 : 1;
|
|
__IO uint32_t SRL4 : 1;
|
|
__IO uint32_t SRL5 : 1;
|
|
__IO uint32_t SRL6 : 1;
|
|
__IO uint32_t SRL7 : 1;
|
|
__IO uint32_t SRL8 : 1;
|
|
__IO uint32_t SRL9 : 1;
|
|
__IO uint32_t SRL10 : 1;
|
|
__IO uint32_t SRL11 : 1;
|
|
__IO uint32_t SRL12 : 1;
|
|
__IO uint32_t SRL13 : 1;
|
|
__IO uint32_t SRL14 : 1;
|
|
__IO uint32_t SRL15 : 1;
|
|
__IO uint32_t SRL16 : 1;
|
|
__IO uint32_t SRL17 : 1;
|
|
__IO uint32_t SRL18 : 1;
|
|
__IO uint32_t SRL19 : 1;
|
|
__IO uint32_t SRL20 : 1;
|
|
__IO uint32_t SRL21 : 1;
|
|
__IO uint32_t SRL22 : 1;
|
|
__IO uint32_t SRL23 : 1;
|
|
__IO uint32_t SRL24 : 1;
|
|
__IO uint32_t SRL25 : 1;
|
|
__IO uint32_t SRL26 : 1;
|
|
__IO uint32_t SRL27 : 1;
|
|
__IO uint32_t SRL28 : 1;
|
|
__IO uint32_t SRL29 : 1;
|
|
__IO uint32_t SRL30 : 1;
|
|
__IO uint32_t SRL31 : 1;
|
|
} stc_ethernet_mac_rdlar_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_tdlar_field
|
|
{
|
|
uint32_t RESERVED1 : 2;
|
|
__IO uint32_t STL2 : 1;
|
|
__IO uint32_t STL3 : 1;
|
|
__IO uint32_t STL4 : 1;
|
|
__IO uint32_t STL5 : 1;
|
|
__IO uint32_t STL6 : 1;
|
|
__IO uint32_t STL7 : 1;
|
|
__IO uint32_t STL8 : 1;
|
|
__IO uint32_t STL9 : 1;
|
|
__IO uint32_t STL10 : 1;
|
|
__IO uint32_t STL11 : 1;
|
|
__IO uint32_t STL12 : 1;
|
|
__IO uint32_t STL13 : 1;
|
|
__IO uint32_t STL14 : 1;
|
|
__IO uint32_t STL15 : 1;
|
|
__IO uint32_t STL16 : 1;
|
|
__IO uint32_t STL17 : 1;
|
|
__IO uint32_t STL18 : 1;
|
|
__IO uint32_t STL19 : 1;
|
|
__IO uint32_t STL20 : 1;
|
|
__IO uint32_t STL21 : 1;
|
|
__IO uint32_t STL22 : 1;
|
|
__IO uint32_t STL23 : 1;
|
|
__IO uint32_t STL24 : 1;
|
|
__IO uint32_t STL25 : 1;
|
|
__IO uint32_t STL26 : 1;
|
|
__IO uint32_t STL27 : 1;
|
|
__IO uint32_t STL28 : 1;
|
|
__IO uint32_t STL29 : 1;
|
|
__IO uint32_t STL30 : 1;
|
|
__IO uint32_t STL31 : 1;
|
|
} stc_ethernet_mac_tdlar_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_sr_field
|
|
{
|
|
__IO uint32_t TI : 1;
|
|
__IO uint32_t TPS : 1;
|
|
__IO uint32_t TU : 1;
|
|
__IO uint32_t TJT : 1;
|
|
__IO uint32_t OVF : 1;
|
|
__IO uint32_t UNF : 1;
|
|
__IO uint32_t RI : 1;
|
|
__IO uint32_t RU : 1;
|
|
__IO uint32_t RPS : 1;
|
|
__IO uint32_t RWT : 1;
|
|
__IO uint32_t ETI : 1;
|
|
uint32_t RESERVED1 : 2;
|
|
__IO uint32_t FBI : 1;
|
|
__IO uint32_t ERI : 1;
|
|
__IO uint32_t AIS : 1;
|
|
__IO uint32_t NIS : 1;
|
|
__IO uint32_t RS0 : 1;
|
|
__IO uint32_t RS1 : 1;
|
|
__IO uint32_t RS2 : 1;
|
|
__IO uint32_t TS0 : 1;
|
|
__IO uint32_t TS1 : 1;
|
|
__IO uint32_t TS2 : 1;
|
|
__IO uint32_t EB0 : 1;
|
|
__IO uint32_t EB1 : 1;
|
|
__IO uint32_t EB2 : 1;
|
|
__IO uint32_t GLI : 1;
|
|
__IO uint32_t GMI : 1;
|
|
__IO uint32_t GPI : 1;
|
|
__IO uint32_t TTI : 1;
|
|
__IO uint32_t GLPII : 1;
|
|
} stc_ethernet_mac_sr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_omr_field
|
|
{
|
|
uint32_t RESERVED1 : 1;
|
|
__IO uint32_t SR : 1;
|
|
__IO uint32_t OSF : 1;
|
|
__IO uint32_t RTC0 : 1;
|
|
__IO uint32_t RTC1 : 1;
|
|
uint32_t RESERVED2 : 1;
|
|
__IO uint32_t FUF : 1;
|
|
__IO uint32_t FEF : 1;
|
|
uint32_t RESERVED3 : 5;
|
|
__IO uint32_t ST : 1;
|
|
__IO uint32_t TTC0 : 1;
|
|
__IO uint32_t TTC1 : 1;
|
|
__IO uint32_t TTC2 : 1;
|
|
uint32_t RESERVED4 : 3;
|
|
__IO uint32_t FTF : 1;
|
|
__IO uint32_t TSF : 1;
|
|
uint32_t RESERVED5 : 2;
|
|
__IO uint32_t DFF : 1;
|
|
__IO uint32_t RSF : 1;
|
|
__IO uint32_t DT : 1;
|
|
} stc_ethernet_mac_omr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_ier_field
|
|
{
|
|
__IO uint32_t TIE : 1;
|
|
__IO uint32_t TSE : 1;
|
|
__IO uint32_t TUE : 1;
|
|
__IO uint32_t TJE : 1;
|
|
__IO uint32_t OVE : 1;
|
|
__IO uint32_t UNE : 1;
|
|
__IO uint32_t RIE : 1;
|
|
__IO uint32_t RUE : 1;
|
|
__IO uint32_t RSE : 1;
|
|
__IO uint32_t RWE : 1;
|
|
__IO uint32_t ETE : 1;
|
|
uint32_t RESERVED1 : 2;
|
|
__IO uint32_t FBE : 1;
|
|
__IO uint32_t ERE : 1;
|
|
__IO uint32_t AIE : 1;
|
|
__IO uint32_t NIE : 1;
|
|
} stc_ethernet_mac_ier_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_mfbocr_field
|
|
{
|
|
__IO uint32_t NMFH0 : 1;
|
|
__IO uint32_t NMFH1 : 1;
|
|
__IO uint32_t NMFH2 : 1;
|
|
__IO uint32_t NMFH3 : 1;
|
|
__IO uint32_t NMFH4 : 1;
|
|
__IO uint32_t NMFH5 : 1;
|
|
__IO uint32_t NMFH6 : 1;
|
|
__IO uint32_t NMFH7 : 1;
|
|
__IO uint32_t NMFH8 : 1;
|
|
__IO uint32_t NMFH9 : 1;
|
|
__IO uint32_t NMFH10 : 1;
|
|
__IO uint32_t NMFH11 : 1;
|
|
__IO uint32_t NMFH12 : 1;
|
|
__IO uint32_t NMFH13 : 1;
|
|
__IO uint32_t NMFH14 : 1;
|
|
__IO uint32_t NMFH15 : 1;
|
|
__IO uint32_t ONMFH : 1;
|
|
__IO uint32_t NMFF0 : 1;
|
|
__IO uint32_t NMFF1 : 1;
|
|
__IO uint32_t NMFF2 : 1;
|
|
__IO uint32_t NMFF3 : 1;
|
|
__IO uint32_t NMFF4 : 1;
|
|
__IO uint32_t NMFF5 : 1;
|
|
__IO uint32_t NMFF6 : 1;
|
|
__IO uint32_t NMFF7 : 1;
|
|
__IO uint32_t NMFF8 : 1;
|
|
__IO uint32_t NMFF9 : 1;
|
|
__IO uint32_t NMFF10 : 1;
|
|
__IO uint32_t ONMFF : 1;
|
|
} stc_ethernet_mac_mfbocr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_riwtr_field
|
|
{
|
|
__IO uint32_t RIWT0 : 1;
|
|
__IO uint32_t RIWT1 : 1;
|
|
__IO uint32_t RIWT2 : 1;
|
|
__IO uint32_t RIWT3 : 1;
|
|
__IO uint32_t RIWT4 : 1;
|
|
__IO uint32_t RIWT5 : 1;
|
|
__IO uint32_t RIWT6 : 1;
|
|
__IO uint32_t RIWT7 : 1;
|
|
} stc_ethernet_mac_riwtr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_ahbsr_field
|
|
{
|
|
__IO uint32_t AHBS : 1;
|
|
} stc_ethernet_mac_ahbsr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_chtdr_field
|
|
{
|
|
__IO uint32_t HTDAP0 : 1;
|
|
__IO uint32_t HTDAP1 : 1;
|
|
__IO uint32_t HTDAP2 : 1;
|
|
__IO uint32_t HTDAP3 : 1;
|
|
__IO uint32_t HTDAP4 : 1;
|
|
__IO uint32_t HTDAP5 : 1;
|
|
__IO uint32_t HTDAP6 : 1;
|
|
__IO uint32_t HTDAP7 : 1;
|
|
__IO uint32_t HTDAP8 : 1;
|
|
__IO uint32_t HTDAP9 : 1;
|
|
__IO uint32_t HTDAP10 : 1;
|
|
__IO uint32_t HTDAP11 : 1;
|
|
__IO uint32_t HTDAP12 : 1;
|
|
__IO uint32_t HTDAP13 : 1;
|
|
__IO uint32_t HTDAP14 : 1;
|
|
__IO uint32_t HTDAP15 : 1;
|
|
__IO uint32_t HTDAP16 : 1;
|
|
__IO uint32_t HTDAP17 : 1;
|
|
__IO uint32_t HTDAP18 : 1;
|
|
__IO uint32_t HTDAP19 : 1;
|
|
__IO uint32_t HTDAP20 : 1;
|
|
__IO uint32_t HTDAP21 : 1;
|
|
__IO uint32_t HTDAP22 : 1;
|
|
__IO uint32_t HTDAP23 : 1;
|
|
__IO uint32_t HTDAP24 : 1;
|
|
__IO uint32_t HTDAP25 : 1;
|
|
__IO uint32_t HTDAP26 : 1;
|
|
__IO uint32_t HTDAP27 : 1;
|
|
__IO uint32_t HTDAP28 : 1;
|
|
__IO uint32_t HTDAP29 : 1;
|
|
__IO uint32_t HTDAP30 : 1;
|
|
__IO uint32_t HTDAP31 : 1;
|
|
} stc_ethernet_mac_chtdr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_chrdr_field
|
|
{
|
|
__IO uint32_t HRDAP0 : 1;
|
|
__IO uint32_t HRDAP1 : 1;
|
|
__IO uint32_t HRDAP2 : 1;
|
|
__IO uint32_t HRDAP3 : 1;
|
|
__IO uint32_t HRDAP4 : 1;
|
|
__IO uint32_t HRDAP5 : 1;
|
|
__IO uint32_t HRDAP6 : 1;
|
|
__IO uint32_t HRDAP7 : 1;
|
|
__IO uint32_t HRDAP8 : 1;
|
|
__IO uint32_t HRDAP9 : 1;
|
|
__IO uint32_t HRDAP10 : 1;
|
|
__IO uint32_t HRDAP11 : 1;
|
|
__IO uint32_t HRDAP12 : 1;
|
|
__IO uint32_t HRDAP13 : 1;
|
|
__IO uint32_t HRDAP14 : 1;
|
|
__IO uint32_t HRDAP15 : 1;
|
|
__IO uint32_t HRDAP16 : 1;
|
|
__IO uint32_t HRDAP17 : 1;
|
|
__IO uint32_t HRDAP18 : 1;
|
|
__IO uint32_t HRDAP19 : 1;
|
|
__IO uint32_t HRDAP20 : 1;
|
|
__IO uint32_t HRDAP21 : 1;
|
|
__IO uint32_t HRDAP22 : 1;
|
|
__IO uint32_t HRDAP23 : 1;
|
|
__IO uint32_t HRDAP24 : 1;
|
|
__IO uint32_t HRDAP25 : 1;
|
|
__IO uint32_t HRDAP26 : 1;
|
|
__IO uint32_t HRDAP27 : 1;
|
|
__IO uint32_t HRDAP28 : 1;
|
|
__IO uint32_t HRDAP29 : 1;
|
|
__IO uint32_t HRDAP30 : 1;
|
|
__IO uint32_t HRDAP31 : 1;
|
|
} stc_ethernet_mac_chrdr_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_chtbar_field
|
|
{
|
|
__IO uint32_t HTBAR0 : 1;
|
|
__IO uint32_t HTBAR1 : 1;
|
|
__IO uint32_t HTBAR2 : 1;
|
|
__IO uint32_t HTBAR3 : 1;
|
|
__IO uint32_t HTBAR4 : 1;
|
|
__IO uint32_t HTBAR5 : 1;
|
|
__IO uint32_t HTBAR6 : 1;
|
|
__IO uint32_t HTBAR7 : 1;
|
|
__IO uint32_t HTBAR8 : 1;
|
|
__IO uint32_t HTBAR9 : 1;
|
|
__IO uint32_t HTBAR10 : 1;
|
|
__IO uint32_t HTBAR11 : 1;
|
|
__IO uint32_t HTBAR12 : 1;
|
|
__IO uint32_t HTBAR13 : 1;
|
|
__IO uint32_t HTBAR14 : 1;
|
|
__IO uint32_t HTBAR15 : 1;
|
|
__IO uint32_t HTBAR16 : 1;
|
|
__IO uint32_t HTBAR17 : 1;
|
|
__IO uint32_t HTBAR18 : 1;
|
|
__IO uint32_t HTBAR19 : 1;
|
|
__IO uint32_t HTBAR20 : 1;
|
|
__IO uint32_t HTBAR21 : 1;
|
|
__IO uint32_t HTBAR22 : 1;
|
|
__IO uint32_t HTBAR23 : 1;
|
|
__IO uint32_t HTBAR24 : 1;
|
|
__IO uint32_t HTBAR25 : 1;
|
|
__IO uint32_t HTBAR26 : 1;
|
|
__IO uint32_t HTBAR27 : 1;
|
|
__IO uint32_t HTBAR28 : 1;
|
|
__IO uint32_t HTBAR29 : 1;
|
|
__IO uint32_t HTBAR30 : 1;
|
|
__IO uint32_t HTBAR31 : 1;
|
|
} stc_ethernet_mac_chtbar_field_t;
|
|
|
|
typedef struct stc_ethernet_mac_chrbar_field
|
|
{
|
|
__IO uint32_t HRBAR0 : 1;
|
|
__IO uint32_t HRBAR1 : 1;
|
|
__IO uint32_t HRBAR2 : 1;
|
|
__IO uint32_t HRBAR3 : 1;
|
|
__IO uint32_t HRBAR4 : 1;
|
|
__IO uint32_t HRBAR5 : 1;
|
|
__IO uint32_t HRBAR6 : 1;
|
|
__IO uint32_t HRBAR7 : 1;
|
|
__IO uint32_t HRBAR8 : 1;
|
|
__IO uint32_t HRBAR9 : 1;
|
|
__IO uint32_t HRBAR10 : 1;
|
|
__IO uint32_t HRBAR11 : 1;
|
|
__IO uint32_t HRBAR12 : 1;
|
|
__IO uint32_t HRBAR13 : 1;
|
|
__IO uint32_t HRBAR14 : 1;
|
|
__IO uint32_t HRBAR15 : 1;
|
|
__IO uint32_t HRBAR16 : 1;
|
|
__IO uint32_t HRBAR17 : 1;
|
|
__IO uint32_t HRBAR18 : 1;
|
|
__IO uint32_t HRBAR19 : 1;
|
|
__IO uint32_t HRBAR20 : 1;
|
|
__IO uint32_t HRBAR21 : 1;
|
|
__IO uint32_t HRBAR22 : 1;
|
|
__IO uint32_t HRBAR23 : 1;
|
|
__IO uint32_t HRBAR24 : 1;
|
|
__IO uint32_t HRBAR25 : 1;
|
|
__IO uint32_t HRBAR26 : 1;
|
|
__IO uint32_t HRBAR27 : 1;
|
|
__IO uint32_t HRBAR28 : 1;
|
|
__IO uint32_t HRBAR29 : 1;
|
|
__IO uint32_t HRBAR30 : 1;
|
|
__IO uint32_t HRBAR31 : 1;
|
|
} stc_ethernet_mac_chrbar_field_t;
|
|
|
|
/* ETHERNET_CONTROL_MODULE register bit fields */
|
|
typedef struct stc_ethernet_control_eth_mode_field
|
|
{
|
|
__IO uint32_t IFMODE : 1;
|
|
uint32_t RESERVED1 : 7;
|
|
__IO uint32_t RST0 : 1;
|
|
__IO uint32_t RST1 : 1;
|
|
uint32_t RESERVED2 :18;
|
|
__IO uint32_t ASZPPSSEL : 1;
|
|
} stc_ethernet_control_eth_mode_field_t;
|
|
|
|
typedef struct stc_ethernet_control_eth_clkg_field
|
|
{
|
|
__IO uint32_t MACEN0 : 1;
|
|
__IO uint32_t MACEN1 : 1;
|
|
} stc_ethernet_control_eth_clkg_field_t;
|
|
|
|
/******************************************************************************
|
|
* Peripheral register structures
|
|
******************************************************************************/
|
|
|
|
/******************************************************************************
|
|
* Flash_IF_MODULE
|
|
******************************************************************************/
|
|
/* Flash interface registers */
|
|
typedef struct
|
|
{
|
|
union {
|
|
__IO uint32_t FASZR;
|
|
stc_flash_if_faszr_field_t FASZR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t FRWTR;
|
|
stc_flash_if_frwtr_field_t FRWTR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t FSTR;
|
|
stc_flash_if_fstr_field_t FSTR_f;
|
|
};
|
|
uint8_t RESERVED0[4];
|
|
union {
|
|
__IO uint32_t FSYNDN;
|
|
stc_flash_if_fsyndn_field_t FSYNDN_f;
|
|
};
|
|
uint8_t RESERVED1[236];
|
|
union {
|
|
__IO uint32_t CRTRMM;
|
|
stc_flash_if_crtrmm_field_t CRTRMM_f;
|
|
};
|
|
}FM3_FLASH_IF_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* Clock_Reset_MODULE
|
|
******************************************************************************/
|
|
/* Clock and reset registers */
|
|
typedef struct
|
|
{
|
|
union {
|
|
__IO uint8_t SCM_CTL;
|
|
stc_crg_scm_ctl_field_t SCM_CTL_f;
|
|
};
|
|
uint8_t RESERVED0[3];
|
|
union {
|
|
__IO uint8_t SCM_STR;
|
|
stc_crg_scm_str_field_t SCM_STR_f;
|
|
};
|
|
uint8_t RESERVED1[3];
|
|
__IO uint32_t STB_CTL;
|
|
union {
|
|
__IO uint16_t RST_STR;
|
|
stc_crg_rst_str_field_t RST_STR_f;
|
|
};
|
|
uint8_t RESERVED2[2];
|
|
union {
|
|
__IO uint8_t BSC_PSR;
|
|
stc_crg_bsc_psr_field_t BSC_PSR_f;
|
|
};
|
|
uint8_t RESERVED3[3];
|
|
union {
|
|
__IO uint8_t APBC0_PSR;
|
|
stc_crg_apbc0_psr_field_t APBC0_PSR_f;
|
|
};
|
|
uint8_t RESERVED4[3];
|
|
union {
|
|
__IO uint8_t APBC1_PSR;
|
|
stc_crg_apbc1_psr_field_t APBC1_PSR_f;
|
|
};
|
|
uint8_t RESERVED5[3];
|
|
union {
|
|
__IO uint8_t APBC2_PSR;
|
|
stc_crg_apbc2_psr_field_t APBC2_PSR_f;
|
|
};
|
|
uint8_t RESERVED6[3];
|
|
union {
|
|
__IO uint8_t SWC_PSR;
|
|
stc_crg_swc_psr_field_t SWC_PSR_f;
|
|
};
|
|
uint8_t RESERVED7[7];
|
|
union {
|
|
__IO uint8_t TTC_PSR;
|
|
stc_crg_ttc_psr_field_t TTC_PSR_f;
|
|
};
|
|
uint8_t RESERVED8[7];
|
|
union {
|
|
__IO uint8_t CSW_TMR;
|
|
stc_crg_csw_tmr_field_t CSW_TMR_f;
|
|
};
|
|
uint8_t RESERVED9[3];
|
|
union {
|
|
__IO uint8_t PSW_TMR;
|
|
stc_crg_psw_tmr_field_t PSW_TMR_f;
|
|
};
|
|
uint8_t RESERVED10[3];
|
|
union {
|
|
__IO uint8_t PLL_CTL1;
|
|
stc_crg_pll_ctl1_field_t PLL_CTL1_f;
|
|
};
|
|
uint8_t RESERVED11[3];
|
|
union {
|
|
__IO uint8_t PLL_CTL2;
|
|
stc_crg_pll_ctl2_field_t PLL_CTL2_f;
|
|
};
|
|
uint8_t RESERVED12[3];
|
|
union {
|
|
__IO uint16_t CSV_CTL;
|
|
stc_crg_csv_ctl_field_t CSV_CTL_f;
|
|
};
|
|
uint8_t RESERVED13[2];
|
|
union {
|
|
__IO uint8_t CSV_STR;
|
|
stc_crg_csv_str_field_t CSV_STR_f;
|
|
};
|
|
uint8_t RESERVED14[3];
|
|
__IO uint16_t FCSWH_CTL;
|
|
uint8_t RESERVED15[2];
|
|
__IO uint16_t FCSWL_CTL;
|
|
uint8_t RESERVED16[2];
|
|
__IO uint16_t FCSWD_CTL;
|
|
uint8_t RESERVED17[2];
|
|
union {
|
|
__IO uint8_t DBWDT_CTL;
|
|
stc_crg_dbwdt_ctl_field_t DBWDT_CTL_f;
|
|
};
|
|
uint8_t RESERVED18[11];
|
|
union {
|
|
__IO uint8_t INT_ENR;
|
|
stc_crg_int_enr_field_t INT_ENR_f;
|
|
};
|
|
uint8_t RESERVED19[3];
|
|
union {
|
|
__IO uint8_t INT_STR;
|
|
stc_crg_int_str_field_t INT_STR_f;
|
|
};
|
|
uint8_t RESERVED20[3];
|
|
union {
|
|
__IO uint8_t INT_CLR;
|
|
stc_crg_int_clr_field_t INT_CLR_f;
|
|
};
|
|
}FM3_CRG_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* HWWDT_MODULE
|
|
******************************************************************************/
|
|
/* Hardware watchdog registers */
|
|
typedef struct
|
|
{
|
|
__IO uint32_t WDG_LDR;
|
|
__IO uint32_t WDG_VLR;
|
|
union {
|
|
__IO uint8_t WDG_CTL;
|
|
stc_hwwdt_wdg_ctl_field_t WDG_CTL_f;
|
|
};
|
|
uint8_t RESERVED0[3];
|
|
__IO uint8_t WDG_ICL;
|
|
uint8_t RESERVED1[3];
|
|
union {
|
|
__IO uint8_t WDG_RIS;
|
|
stc_hwwdt_wdg_ris_field_t WDG_RIS_f;
|
|
};
|
|
uint8_t RESERVED2[3055];
|
|
__IO uint32_t WDG_LCK;
|
|
}FM3_HWWDT_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* SWWDT_MODULE
|
|
******************************************************************************/
|
|
/* Software watchdog registers */
|
|
typedef struct
|
|
{
|
|
__IO uint32_t WDOGLOAD;
|
|
__IO uint32_t WDOGVALUE;
|
|
union {
|
|
__IO uint8_t WDOGCONTROL;
|
|
stc_swwdt_wdogcontrol_field_t WDOGCONTROL_f;
|
|
};
|
|
uint8_t RESERVED0[3];
|
|
__IO uint32_t WDOGINTCLR;
|
|
union {
|
|
__IO uint8_t WDOGRIS;
|
|
stc_swwdt_wdogris_field_t WDOGRIS_f;
|
|
};
|
|
uint8_t RESERVED1[3055];
|
|
__IO uint32_t WDOGLOCK;
|
|
}FM3_SWWDT_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* DTIM_MODULE
|
|
******************************************************************************/
|
|
/* Dual timer 1/2 registers */
|
|
typedef struct
|
|
{
|
|
__IO uint32_t TIMER1LOAD;
|
|
__IO uint32_t TIMER1VALUE;
|
|
union {
|
|
__IO uint32_t TIMER1CONTROL;
|
|
stc_dtim_timer1control_field_t TIMER1CONTROL_f;
|
|
};
|
|
__IO uint32_t TIMER1INTCLR;
|
|
union {
|
|
__IO uint32_t TIMER1RIS;
|
|
stc_dtim_timer1ris_field_t TIMER1RIS_f;
|
|
};
|
|
union {
|
|
__IO uint32_t TIMER1MIS;
|
|
stc_dtim_timer1mis_field_t TIMER1MIS_f;
|
|
};
|
|
__IO uint32_t TIMER1BGLOAD;
|
|
uint8_t RESERVED0[4];
|
|
__IO uint32_t TIMER2LOAD;
|
|
__IO uint32_t TIMER2VALUE;
|
|
union {
|
|
__IO uint32_t TIMER2CONTROL;
|
|
stc_dtim_timer2control_field_t TIMER2CONTROL_f;
|
|
};
|
|
__IO uint32_t TIMER2INTCLR;
|
|
union {
|
|
__IO uint32_t TIMER2RIS;
|
|
stc_dtim_timer2ris_field_t TIMER2RIS_f;
|
|
};
|
|
union {
|
|
__IO uint32_t TIMER2MIS;
|
|
stc_dtim_timer2mis_field_t TIMER2MIS_f;
|
|
};
|
|
__IO uint32_t TIMER2BGLOAD;
|
|
}FM3_DTIM_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* MFT_FRT_MODULE
|
|
******************************************************************************/
|
|
/* Multifunction Timer unit 0 Free Running Timer registers */
|
|
typedef struct
|
|
{
|
|
uint8_t RESERVED0[40];
|
|
__IO uint16_t TCCP0;
|
|
uint8_t RESERVED1[2];
|
|
__IO uint16_t TCDT0;
|
|
uint8_t RESERVED2[2];
|
|
union {
|
|
__IO uint16_t TCSA0;
|
|
stc_mft_frt_tcsa0_field_t TCSA0_f;
|
|
};
|
|
uint8_t RESERVED3[2];
|
|
union {
|
|
__IO uint16_t TCSB0;
|
|
stc_mft_frt_tcsb0_field_t TCSB0_f;
|
|
};
|
|
uint8_t RESERVED4[2];
|
|
__IO uint16_t TCCP1;
|
|
uint8_t RESERVED5[2];
|
|
__IO uint16_t TCDT1;
|
|
uint8_t RESERVED6[2];
|
|
union {
|
|
__IO uint16_t TCSA1;
|
|
stc_mft_frt_tcsa1_field_t TCSA1_f;
|
|
};
|
|
uint8_t RESERVED7[2];
|
|
union {
|
|
__IO uint16_t TCSB1;
|
|
stc_mft_frt_tcsb1_field_t TCSB1_f;
|
|
};
|
|
uint8_t RESERVED8[2];
|
|
__IO uint16_t TCCP2;
|
|
uint8_t RESERVED9[2];
|
|
__IO uint16_t TCDT2;
|
|
uint8_t RESERVED10[2];
|
|
union {
|
|
__IO uint16_t TCSA2;
|
|
stc_mft_frt_tcsa2_field_t TCSA2_f;
|
|
};
|
|
uint8_t RESERVED11[2];
|
|
union {
|
|
__IO uint16_t TCSB2;
|
|
stc_mft_frt_tcsb2_field_t TCSB2_f;
|
|
};
|
|
}FM3_MFT_FRT_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* MFT_OCU_MODULE
|
|
******************************************************************************/
|
|
/* Multifunction Timer unit 0 Output Compare Unit registers */
|
|
typedef struct
|
|
{
|
|
__IO uint16_t OCCP0;
|
|
uint8_t RESERVED0[2];
|
|
__IO uint16_t OCCP1;
|
|
uint8_t RESERVED1[2];
|
|
__IO uint16_t OCCP2;
|
|
uint8_t RESERVED2[2];
|
|
__IO uint16_t OCCP3;
|
|
uint8_t RESERVED3[2];
|
|
__IO uint16_t OCCP4;
|
|
uint8_t RESERVED4[2];
|
|
__IO uint16_t OCCP5;
|
|
uint8_t RESERVED5[2];
|
|
union {
|
|
__IO uint8_t OCSA10;
|
|
stc_mft_ocu_ocsa10_field_t OCSA10_f;
|
|
};
|
|
union {
|
|
__IO uint8_t OCSB10;
|
|
stc_mft_ocu_ocsb10_field_t OCSB10_f;
|
|
};
|
|
uint8_t RESERVED6[2];
|
|
union {
|
|
__IO uint8_t OCSA32;
|
|
stc_mft_ocu_ocsa32_field_t OCSA32_f;
|
|
};
|
|
union {
|
|
__IO uint8_t OCSB32;
|
|
stc_mft_ocu_ocsb32_field_t OCSB32_f;
|
|
};
|
|
uint8_t RESERVED7[2];
|
|
union {
|
|
__IO uint8_t OCSA54;
|
|
stc_mft_ocu_ocsa54_field_t OCSA54_f;
|
|
};
|
|
union {
|
|
__IO uint8_t OCSB54;
|
|
stc_mft_ocu_ocsb54_field_t OCSB54_f;
|
|
};
|
|
uint8_t RESERVED8[3];
|
|
union {
|
|
__IO uint8_t OCSC;
|
|
stc_mft_ocu_ocsc_field_t OCSC_f;
|
|
};
|
|
uint8_t RESERVED9[50];
|
|
union {
|
|
__IO uint8_t OCFS10;
|
|
stc_mft_ocu_ocfs10_field_t OCFS10_f;
|
|
};
|
|
union {
|
|
__IO uint8_t OCFS32;
|
|
stc_mft_ocu_ocfs32_field_t OCFS32_f;
|
|
};
|
|
uint8_t RESERVED10[2];
|
|
union {
|
|
__IO uint8_t OCFS54;
|
|
stc_mft_ocu_ocfs54_field_t OCFS54_f;
|
|
};
|
|
}FM3_MFT_OCU_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* MFT_WFG_MODULE
|
|
******************************************************************************/
|
|
/* Multifunction Timer unit 0 Waveform Generator and Noise Canceler registers */
|
|
typedef struct
|
|
{
|
|
uint8_t RESERVED0[128];
|
|
__IO uint16_t WFTM10;
|
|
uint8_t RESERVED1[2];
|
|
__IO uint16_t WFTM32;
|
|
uint8_t RESERVED2[2];
|
|
__IO uint16_t WFTM54;
|
|
uint8_t RESERVED3[2];
|
|
union {
|
|
__IO uint16_t WFSA10;
|
|
stc_mft_wfg_wfsa10_field_t WFSA10_f;
|
|
};
|
|
uint8_t RESERVED4[2];
|
|
union {
|
|
__IO uint16_t WFSA32;
|
|
stc_mft_wfg_wfsa32_field_t WFSA32_f;
|
|
};
|
|
uint8_t RESERVED5[2];
|
|
union {
|
|
__IO uint16_t WFSA54;
|
|
stc_mft_wfg_wfsa54_field_t WFSA54_f;
|
|
};
|
|
uint8_t RESERVED6[2];
|
|
union {
|
|
__IO uint16_t WFIR;
|
|
stc_mft_wfg_wfir_field_t WFIR_f;
|
|
};
|
|
uint8_t RESERVED7[2];
|
|
union {
|
|
__IO uint16_t NZCL;
|
|
stc_mft_wfg_nzcl_field_t NZCL_f;
|
|
};
|
|
}FM3_MFT_WFG_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* MFT_ICU_MODULE
|
|
******************************************************************************/
|
|
/* Multifunction Timer unit 0 Input Capture Unit registers */
|
|
typedef struct
|
|
{
|
|
uint8_t RESERVED0[96];
|
|
union {
|
|
__IO uint8_t ICFS10;
|
|
stc_mft_icu_icfs10_field_t ICFS10_f;
|
|
};
|
|
union {
|
|
__IO uint8_t ICFS32;
|
|
stc_mft_icu_icfs32_field_t ICFS32_f;
|
|
};
|
|
uint8_t RESERVED1[6];
|
|
__IO uint16_t ICCP0;
|
|
uint8_t RESERVED2[2];
|
|
__IO uint16_t ICCP1;
|
|
uint8_t RESERVED3[2];
|
|
__IO uint16_t ICCP2;
|
|
uint8_t RESERVED4[2];
|
|
__IO uint16_t ICCP3;
|
|
uint8_t RESERVED5[2];
|
|
union {
|
|
__IO uint8_t ICSA10;
|
|
stc_mft_icu_icsa10_field_t ICSA10_f;
|
|
};
|
|
union {
|
|
__IO uint8_t ICSB10;
|
|
stc_mft_icu_icsb10_field_t ICSB10_f;
|
|
};
|
|
uint8_t RESERVED6[2];
|
|
union {
|
|
__IO uint8_t ICSA32;
|
|
stc_mft_icu_icsa32_field_t ICSA32_f;
|
|
};
|
|
union {
|
|
__IO uint8_t ICSB32;
|
|
stc_mft_icu_icsb32_field_t ICSB32_f;
|
|
};
|
|
}FM3_MFT_ICU_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* MFT_ADCMP_MODULE
|
|
******************************************************************************/
|
|
/* Multifunction Timer unit 0 ADC Start Compare Unit registers */
|
|
typedef struct
|
|
{
|
|
uint8_t RESERVED0[160];
|
|
__IO uint16_t ACCP0;
|
|
uint8_t RESERVED1[2];
|
|
__IO uint16_t ACCPDN0;
|
|
uint8_t RESERVED2[2];
|
|
__IO uint16_t ACCP1;
|
|
uint8_t RESERVED3[2];
|
|
__IO uint16_t ACCPDN1;
|
|
uint8_t RESERVED4[2];
|
|
__IO uint16_t ACCP2;
|
|
uint8_t RESERVED5[2];
|
|
__IO uint16_t ACCPDN2;
|
|
uint8_t RESERVED6[2];
|
|
union {
|
|
__IO uint8_t ACSB;
|
|
stc_mft_adcmp_acsb_field_t ACSB_f;
|
|
};
|
|
uint8_t RESERVED7[3];
|
|
union {
|
|
__IO uint16_t ACSA;
|
|
stc_mft_adcmp_acsa_field_t ACSA_f;
|
|
};
|
|
uint8_t RESERVED8[2];
|
|
union {
|
|
__IO uint16_t ATSA;
|
|
stc_mft_adcmp_atsa_field_t ATSA_f;
|
|
};
|
|
}FM3_MFT_ADCMP_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* MFT_PPG_MODULE
|
|
******************************************************************************/
|
|
/* Multifunction Timer PPG registers */
|
|
typedef struct
|
|
{
|
|
uint8_t RESERVED0;
|
|
union {
|
|
__IO uint8_t TTCR0;
|
|
stc_mft_ppg_ttcr0_field_t TTCR0_f;
|
|
};
|
|
uint8_t RESERVED1[7];
|
|
__IO uint8_t COMP0;
|
|
uint8_t RESERVED2[2];
|
|
__IO uint8_t COMP2;
|
|
uint8_t RESERVED3[4];
|
|
__IO uint8_t COMP4;
|
|
uint8_t RESERVED4[2];
|
|
__IO uint8_t COMP6;
|
|
uint8_t RESERVED5[12];
|
|
union {
|
|
__IO uint8_t TTCR1;
|
|
stc_mft_ppg_ttcr1_field_t TTCR1_f;
|
|
};
|
|
uint8_t RESERVED6[7];
|
|
__IO uint8_t COMP1;
|
|
uint8_t RESERVED7[2];
|
|
__IO uint8_t COMP3;
|
|
uint8_t RESERVED8[4];
|
|
__IO uint8_t COMP5;
|
|
uint8_t RESERVED9[2];
|
|
__IO uint8_t COMP7;
|
|
uint8_t RESERVED10[12];
|
|
union {
|
|
__IO uint8_t TTCR2;
|
|
stc_mft_ppg_ttcr2_field_t TTCR2_f;
|
|
};
|
|
uint8_t RESERVED11[7];
|
|
__IO uint8_t COMP8;
|
|
uint8_t RESERVED12[2];
|
|
__IO uint8_t COMP10;
|
|
uint8_t RESERVED13[4];
|
|
__IO uint8_t COMP12;
|
|
uint8_t RESERVED14[2];
|
|
__IO uint8_t COMP14;
|
|
uint8_t RESERVED15[171];
|
|
union {
|
|
__IO uint16_t TRG;
|
|
stc_mft_ppg_trg_field_t TRG_f;
|
|
};
|
|
uint8_t RESERVED16[2];
|
|
union {
|
|
__IO uint16_t REVC;
|
|
stc_mft_ppg_revc_field_t REVC_f;
|
|
};
|
|
uint8_t RESERVED17[58];
|
|
union {
|
|
__IO uint16_t TRG1;
|
|
stc_mft_ppg_trg1_field_t TRG1_f;
|
|
};
|
|
uint8_t RESERVED18[2];
|
|
union {
|
|
__IO uint16_t REVC1;
|
|
stc_mft_ppg_revc1_field_t REVC1_f;
|
|
};
|
|
uint8_t RESERVED19[186];
|
|
union {
|
|
__IO uint8_t PPGC1;
|
|
stc_mft_ppg_ppgc1_field_t PPGC1_f;
|
|
};
|
|
union {
|
|
__IO uint8_t PPGC0;
|
|
stc_mft_ppg_ppgc0_field_t PPGC0_f;
|
|
};
|
|
uint8_t RESERVED20[2];
|
|
union {
|
|
__IO uint8_t PPGC3;
|
|
stc_mft_ppg_ppgc3_field_t PPGC3_f;
|
|
};
|
|
union {
|
|
__IO uint8_t PPGC2;
|
|
stc_mft_ppg_ppgc2_field_t PPGC2_f;
|
|
};
|
|
uint8_t RESERVED21[2];
|
|
union {
|
|
__IO uint16_t PRL0;
|
|
struct {
|
|
__IO uint8_t PRLL0;
|
|
__IO uint8_t PRLH0;
|
|
};
|
|
};
|
|
uint8_t RESERVED22[2];
|
|
union {
|
|
__IO uint16_t PRL1;
|
|
struct {
|
|
__IO uint8_t PRLL1;
|
|
__IO uint8_t PRLH1;
|
|
};
|
|
};
|
|
uint8_t RESERVED23[2];
|
|
union {
|
|
__IO uint16_t PRL2;
|
|
struct {
|
|
__IO uint8_t PRLL2;
|
|
__IO uint8_t PRLH2;
|
|
};
|
|
};
|
|
uint8_t RESERVED24[2];
|
|
union {
|
|
__IO uint16_t PRL3;
|
|
struct {
|
|
__IO uint8_t PRLL3;
|
|
__IO uint8_t PRLH3;
|
|
};
|
|
};
|
|
uint8_t RESERVED25[2];
|
|
union {
|
|
__IO uint8_t GATEC0;
|
|
stc_mft_ppg_gatec0_field_t GATEC0_f;
|
|
};
|
|
uint8_t RESERVED26[39];
|
|
union {
|
|
__IO uint8_t PPGC5;
|
|
stc_mft_ppg_ppgc5_field_t PPGC5_f;
|
|
};
|
|
union {
|
|
__IO uint8_t PPGC4;
|
|
stc_mft_ppg_ppgc4_field_t PPGC4_f;
|
|
};
|
|
uint8_t RESERVED27[2];
|
|
union {
|
|
__IO uint8_t PPGC7;
|
|
stc_mft_ppg_ppgc7_field_t PPGC7_f;
|
|
};
|
|
union {
|
|
__IO uint8_t PPGC6;
|
|
stc_mft_ppg_ppgc6_field_t PPGC6_f;
|
|
};
|
|
uint8_t RESERVED28[2];
|
|
union {
|
|
__IO uint16_t PRL4;
|
|
struct {
|
|
__IO uint8_t PRLL4;
|
|
__IO uint8_t PRLH4;
|
|
};
|
|
};
|
|
uint8_t RESERVED29[2];
|
|
union {
|
|
__IO uint16_t PRL5;
|
|
struct {
|
|
__IO uint8_t PRLL5;
|
|
__IO uint8_t PRLH5;
|
|
};
|
|
};
|
|
uint8_t RESERVED30[2];
|
|
union {
|
|
__IO uint16_t PRL6;
|
|
struct {
|
|
__IO uint8_t PRLL6;
|
|
__IO uint8_t PRLH6;
|
|
};
|
|
};
|
|
uint8_t RESERVED31[2];
|
|
union {
|
|
__IO uint16_t PRL7;
|
|
struct {
|
|
__IO uint8_t PRLL7;
|
|
__IO uint8_t PRLH7;
|
|
};
|
|
};
|
|
uint8_t RESERVED32[2];
|
|
union {
|
|
__IO uint8_t GATEC4;
|
|
stc_mft_ppg_gatec4_field_t GATEC4_f;
|
|
};
|
|
uint8_t RESERVED33[39];
|
|
union {
|
|
__IO uint8_t PPGC9;
|
|
stc_mft_ppg_ppgc9_field_t PPGC9_f;
|
|
};
|
|
union {
|
|
__IO uint8_t PPGC8;
|
|
stc_mft_ppg_ppgc8_field_t PPGC8_f;
|
|
};
|
|
uint8_t RESERVED34[2];
|
|
union {
|
|
__IO uint8_t PPGC11;
|
|
stc_mft_ppg_ppgc11_field_t PPGC11_f;
|
|
};
|
|
union {
|
|
__IO uint8_t PPGC10;
|
|
stc_mft_ppg_ppgc10_field_t PPGC10_f;
|
|
};
|
|
uint8_t RESERVED35[2];
|
|
union {
|
|
__IO uint16_t PRL8;
|
|
struct {
|
|
__IO uint8_t PRLL8;
|
|
__IO uint8_t PRLH8;
|
|
};
|
|
};
|
|
uint8_t RESERVED36[2];
|
|
union {
|
|
__IO uint16_t PRL9;
|
|
struct {
|
|
__IO uint8_t PRLL9;
|
|
__IO uint8_t PRLH9;
|
|
};
|
|
};
|
|
uint8_t RESERVED37[2];
|
|
union {
|
|
__IO uint16_t PRL10;
|
|
struct {
|
|
__IO uint8_t PRLL10;
|
|
__IO uint8_t PRLH10;
|
|
};
|
|
};
|
|
uint8_t RESERVED38[2];
|
|
union {
|
|
__IO uint16_t PRL11;
|
|
struct {
|
|
__IO uint8_t PRLL11;
|
|
__IO uint8_t PRLH11;
|
|
};
|
|
};
|
|
uint8_t RESERVED39[2];
|
|
union {
|
|
__IO uint8_t GATEC8;
|
|
stc_mft_ppg_gatec8_field_t GATEC8_f;
|
|
};
|
|
uint8_t RESERVED40[39];
|
|
union {
|
|
__IO uint8_t PPGC13;
|
|
stc_mft_ppg_ppgc13_field_t PPGC13_f;
|
|
};
|
|
union {
|
|
__IO uint8_t PPGC12;
|
|
stc_mft_ppg_ppgc12_field_t PPGC12_f;
|
|
};
|
|
uint8_t RESERVED41[2];
|
|
union {
|
|
__IO uint8_t PPGC15;
|
|
stc_mft_ppg_ppgc15_field_t PPGC15_f;
|
|
};
|
|
union {
|
|
__IO uint8_t PPGC14;
|
|
stc_mft_ppg_ppgc14_field_t PPGC14_f;
|
|
};
|
|
uint8_t RESERVED42[2];
|
|
union {
|
|
__IO uint16_t PRL12;
|
|
struct {
|
|
__IO uint8_t PRLL12;
|
|
__IO uint8_t PRLH12;
|
|
};
|
|
};
|
|
uint8_t RESERVED43[2];
|
|
union {
|
|
__IO uint16_t PRL13;
|
|
struct {
|
|
__IO uint8_t PRLL13;
|
|
__IO uint8_t PRLH13;
|
|
};
|
|
};
|
|
uint8_t RESERVED44[2];
|
|
union {
|
|
__IO uint16_t PRL14;
|
|
struct {
|
|
__IO uint8_t PRLL14;
|
|
__IO uint8_t PRLH14;
|
|
};
|
|
};
|
|
uint8_t RESERVED45[2];
|
|
union {
|
|
__IO uint16_t PRL15;
|
|
struct {
|
|
__IO uint8_t PRLL15;
|
|
__IO uint8_t PRLH15;
|
|
};
|
|
};
|
|
uint8_t RESERVED46[2];
|
|
union {
|
|
__IO uint8_t GATEC12;
|
|
stc_mft_ppg_gatec12_field_t GATEC12_f;
|
|
};
|
|
uint8_t RESERVED47[39];
|
|
union {
|
|
__IO uint8_t PPGC17;
|
|
stc_mft_ppg_ppgc17_field_t PPGC17_f;
|
|
};
|
|
union {
|
|
__IO uint8_t PPGC16;
|
|
stc_mft_ppg_ppgc16_field_t PPGC16_f;
|
|
};
|
|
uint8_t RESERVED48[2];
|
|
union {
|
|
__IO uint8_t PPGC19;
|
|
stc_mft_ppg_ppgc19_field_t PPGC19_f;
|
|
};
|
|
union {
|
|
__IO uint8_t PPGC18;
|
|
stc_mft_ppg_ppgc18_field_t PPGC18_f;
|
|
};
|
|
uint8_t RESERVED49[2];
|
|
union {
|
|
__IO uint16_t PRL16;
|
|
struct {
|
|
__IO uint8_t PRLL16;
|
|
__IO uint8_t PRLH16;
|
|
};
|
|
};
|
|
uint8_t RESERVED50[2];
|
|
union {
|
|
__IO uint16_t PRL17;
|
|
struct {
|
|
__IO uint8_t PRLL17;
|
|
__IO uint8_t PRLH17;
|
|
};
|
|
};
|
|
uint8_t RESERVED51[2];
|
|
union {
|
|
__IO uint16_t PRL18;
|
|
struct {
|
|
__IO uint8_t PRLL18;
|
|
__IO uint8_t PRLH18;
|
|
};
|
|
};
|
|
uint8_t RESERVED52[2];
|
|
union {
|
|
__IO uint16_t PRL19;
|
|
struct {
|
|
__IO uint8_t PRLL19;
|
|
__IO uint8_t PRLH19;
|
|
};
|
|
};
|
|
uint8_t RESERVED53[2];
|
|
union {
|
|
__IO uint8_t GATEC16;
|
|
stc_mft_ppg_gatec16_field_t GATEC16_f;
|
|
};
|
|
uint8_t RESERVED54[39];
|
|
union {
|
|
__IO uint8_t PPGC21;
|
|
stc_mft_ppg_ppgc21_field_t PPGC21_f;
|
|
};
|
|
union {
|
|
__IO uint8_t PPGC20;
|
|
stc_mft_ppg_ppgc20_field_t PPGC20_f;
|
|
};
|
|
uint8_t RESERVED55[2];
|
|
union {
|
|
__IO uint8_t PPGC23;
|
|
stc_mft_ppg_ppgc23_field_t PPGC23_f;
|
|
};
|
|
union {
|
|
__IO uint8_t PPGC22;
|
|
stc_mft_ppg_ppgc22_field_t PPGC22_f;
|
|
};
|
|
uint8_t RESERVED56[2];
|
|
union {
|
|
__IO uint16_t PRL20;
|
|
struct {
|
|
__IO uint8_t PRLL20;
|
|
__IO uint8_t PRLH20;
|
|
};
|
|
};
|
|
uint8_t RESERVED57[2];
|
|
union {
|
|
__IO uint16_t PRL21;
|
|
struct {
|
|
__IO uint8_t PRLL21;
|
|
__IO uint8_t PRLH21;
|
|
};
|
|
};
|
|
uint8_t RESERVED58[2];
|
|
union {
|
|
__IO uint16_t PRL22;
|
|
struct {
|
|
__IO uint8_t PRLL22;
|
|
__IO uint8_t PRLH22;
|
|
};
|
|
};
|
|
uint8_t RESERVED59[2];
|
|
union {
|
|
__IO uint16_t PRL23;
|
|
struct {
|
|
__IO uint8_t PRLL23;
|
|
__IO uint8_t PRLH23;
|
|
};
|
|
};
|
|
uint8_t RESERVED60[2];
|
|
union {
|
|
__IO uint8_t GATEC20;
|
|
stc_mft_ppg_gatec20_field_t GATEC20_f;
|
|
};
|
|
}FM3_MFT_PPG_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* BT_PPG_MODULE
|
|
******************************************************************************/
|
|
/* Base Timer 0 PPG registers */
|
|
typedef struct
|
|
{
|
|
__IO uint16_t PRLL;
|
|
uint8_t RESERVED0[2];
|
|
__IO uint16_t PRLH;
|
|
uint8_t RESERVED1[2];
|
|
__IO uint16_t TMR;
|
|
uint8_t RESERVED2[2];
|
|
union {
|
|
__IO uint16_t TMCR;
|
|
stc_bt_ppg_tmcr_field_t TMCR_f;
|
|
};
|
|
uint8_t RESERVED3[2];
|
|
union {
|
|
__IO uint8_t STC;
|
|
stc_bt_ppg_stc_field_t STC_f;
|
|
};
|
|
union {
|
|
__IO uint8_t TMCR2;
|
|
stc_bt_ppg_tmcr2_field_t TMCR2_f;
|
|
};
|
|
}FM3_BT_PPG_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* BT_PWM_MODULE
|
|
******************************************************************************/
|
|
/* Base Timer 0 PWM registers */
|
|
typedef struct
|
|
{
|
|
__IO uint16_t PCSR;
|
|
uint8_t RESERVED0[2];
|
|
__IO uint16_t PDUT;
|
|
uint8_t RESERVED1[2];
|
|
__IO uint16_t TMR;
|
|
uint8_t RESERVED2[2];
|
|
union {
|
|
__IO uint16_t TMCR;
|
|
stc_bt_pwm_tmcr_field_t TMCR_f;
|
|
};
|
|
uint8_t RESERVED3[2];
|
|
union {
|
|
__IO uint8_t STC;
|
|
stc_bt_pwm_stc_field_t STC_f;
|
|
};
|
|
union {
|
|
__IO uint8_t TMCR2;
|
|
stc_bt_pwm_tmcr2_field_t TMCR2_f;
|
|
};
|
|
}FM3_BT_PWM_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* BT_RT_MODULE
|
|
******************************************************************************/
|
|
/* Base Timer 0 RT registers */
|
|
typedef struct
|
|
{
|
|
__IO uint16_t PCSR;
|
|
uint8_t RESERVED0[6];
|
|
__IO uint16_t TMR;
|
|
uint8_t RESERVED1[2];
|
|
union {
|
|
__IO uint16_t TMCR;
|
|
stc_bt_rt_tmcr_field_t TMCR_f;
|
|
};
|
|
uint8_t RESERVED2[2];
|
|
union {
|
|
__IO uint8_t STC;
|
|
stc_bt_rt_stc_field_t STC_f;
|
|
};
|
|
union {
|
|
__IO uint8_t TMCR2;
|
|
stc_bt_rt_tmcr2_field_t TMCR2_f;
|
|
};
|
|
}FM3_BT_RT_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* BT_PWC_MODULE
|
|
******************************************************************************/
|
|
/* Base Timer 0 PWC registers */
|
|
typedef struct
|
|
{
|
|
uint8_t RESERVED0[4];
|
|
__IO uint16_t DTBF;
|
|
uint8_t RESERVED1[6];
|
|
union {
|
|
__IO uint16_t TMCR;
|
|
stc_bt_pwc_tmcr_field_t TMCR_f;
|
|
};
|
|
uint8_t RESERVED2[2];
|
|
union {
|
|
__IO uint8_t STC;
|
|
stc_bt_pwc_stc_field_t STC_f;
|
|
};
|
|
union {
|
|
__IO uint8_t TMCR2;
|
|
stc_bt_pwc_tmcr2_field_t TMCR2_f;
|
|
};
|
|
}FM3_BT_PWC_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* BTIOSEL03_MODULE
|
|
******************************************************************************/
|
|
/* Base Timer I/O selector channel 0 - channel 3 registers */
|
|
typedef struct
|
|
{
|
|
uint8_t RESERVED0;
|
|
union {
|
|
__IO uint8_t BTSEL0123;
|
|
stc_btiosel03_btsel0123_field_t BTSEL0123_f;
|
|
};
|
|
}FM3_BTIOSEL03_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* BTIOSEL47_MODULE
|
|
******************************************************************************/
|
|
/* Base Timer I/O selector channel 4 - channel 7 registers */
|
|
typedef struct
|
|
{
|
|
uint8_t RESERVED0;
|
|
union {
|
|
__IO uint8_t BTSEL4567;
|
|
stc_btiosel47_btsel4567_field_t BTSEL4567_f;
|
|
};
|
|
}FM3_BTIOSEL47_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* BTIOSEL8B_MODULE
|
|
******************************************************************************/
|
|
/* Base Timer I/O selector channel 8 - channel 11 registers */
|
|
typedef struct
|
|
{
|
|
uint8_t RESERVED0;
|
|
union {
|
|
__IO uint8_t BTSEL89AB;
|
|
stc_btiosel8b_btsel89ab_field_t BTSEL89AB_f;
|
|
};
|
|
}FM3_BTIOSEL8B_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* BTIOSELCF_MODULE
|
|
******************************************************************************/
|
|
/* Base Timer I/O selector channel 12 - channel 15 registers */
|
|
typedef struct
|
|
{
|
|
uint8_t RESERVED0;
|
|
union {
|
|
__IO uint8_t BTSELCDEF;
|
|
stc_btioselcf_btselcdef_field_t BTSELCDEF_f;
|
|
};
|
|
}FM3_BTIOSELCF_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* SBSSR_MODULE
|
|
******************************************************************************/
|
|
/* Software based Simulation Startup (Base Timer) register */
|
|
typedef struct
|
|
{
|
|
union {
|
|
__IO uint16_t BTSSSR;
|
|
stc_sbssr_btsssr_field_t BTSSSR_f;
|
|
};
|
|
}FM3_SBSSR_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* QPRC_MODULE
|
|
******************************************************************************/
|
|
/* Quad position and revolution counter channel 0 registers */
|
|
typedef struct
|
|
{
|
|
__IO uint16_t QPCR;
|
|
uint8_t RESERVED0[2];
|
|
__IO uint16_t QRCR;
|
|
uint8_t RESERVED1[2];
|
|
__IO uint16_t QPCCR;
|
|
uint8_t RESERVED2[2];
|
|
__IO uint16_t QPRCR;
|
|
uint8_t RESERVED3[2];
|
|
__IO uint16_t QMPR;
|
|
uint8_t RESERVED4[2];
|
|
union {
|
|
union {
|
|
__IO uint16_t QICR;
|
|
stc_qprc_qicr_field_t QICR_f;
|
|
};
|
|
struct {
|
|
union {
|
|
__IO uint8_t QICRL;
|
|
stc_qprc_qicrl_field_t QICRL_f;
|
|
};
|
|
union {
|
|
__IO uint8_t QICRH;
|
|
stc_qprc_qicrh_field_t QICRH_f;
|
|
};
|
|
};
|
|
};
|
|
uint8_t RESERVED5[2];
|
|
union {
|
|
union {
|
|
__IO uint16_t QCR;
|
|
stc_qprc_qcr_field_t QCR_f;
|
|
};
|
|
struct {
|
|
union {
|
|
__IO uint8_t QCRL;
|
|
stc_qprc_qcrl_field_t QCRL_f;
|
|
};
|
|
union {
|
|
__IO uint8_t QCRH;
|
|
stc_qprc_qcrh_field_t QCRH_f;
|
|
};
|
|
};
|
|
};
|
|
uint8_t RESERVED6[2];
|
|
union {
|
|
__IO uint16_t QECR;
|
|
stc_qprc_qecr_field_t QECR_f;
|
|
};
|
|
uint8_t RESERVED7[30];
|
|
__IO uint16_t QRCRR;
|
|
__IO uint16_t QPCRR;
|
|
}FM3_QPRC_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* ADC12_MODULE
|
|
******************************************************************************/
|
|
/* 12-bit ADC unit 0 registers */
|
|
typedef struct
|
|
{
|
|
union {
|
|
__IO uint8_t ADSR;
|
|
stc_adc_adsr_field_t ADSR_f;
|
|
};
|
|
union {
|
|
__IO uint8_t ADCR;
|
|
stc_adc_adcr_field_t ADCR_f;
|
|
};
|
|
uint8_t RESERVED0[6];
|
|
union {
|
|
__IO uint8_t SFNS;
|
|
stc_adc_sfns_field_t SFNS_f;
|
|
};
|
|
union {
|
|
__IO uint8_t SCCR;
|
|
stc_adc_sccr_field_t SCCR_f;
|
|
};
|
|
uint8_t RESERVED1[2];
|
|
union {
|
|
union {
|
|
__IO uint32_t SCFD;
|
|
stc_adc_scfd_field_t SCFD_f;
|
|
};
|
|
struct {
|
|
union {
|
|
__IO uint16_t SCFDL;
|
|
stc_adc_scfdl_field_t SCFDL_f;
|
|
};
|
|
union {
|
|
__IO uint16_t SCFDH;
|
|
stc_adc_scfdh_field_t SCFDH_f;
|
|
};
|
|
};
|
|
};
|
|
union {
|
|
union {
|
|
__IO uint16_t SCIS23;
|
|
stc_adc_scis23_field_t SCIS23_f;
|
|
};
|
|
struct {
|
|
union {
|
|
__IO uint8_t SCIS2;
|
|
stc_adc_scis2_field_t SCIS2_f;
|
|
};
|
|
union {
|
|
__IO uint8_t SCIS3;
|
|
stc_adc_scis3_field_t SCIS3_f;
|
|
};
|
|
};
|
|
};
|
|
uint8_t RESERVED2[2];
|
|
union {
|
|
union {
|
|
__IO uint16_t SCIS01;
|
|
stc_adc_scis01_field_t SCIS01_f;
|
|
};
|
|
struct {
|
|
union {
|
|
__IO uint8_t SCIS0;
|
|
stc_adc_scis0_field_t SCIS0_f;
|
|
};
|
|
union {
|
|
__IO uint8_t SCIS1;
|
|
stc_adc_scis1_field_t SCIS1_f;
|
|
};
|
|
};
|
|
};
|
|
uint8_t RESERVED3[2];
|
|
union {
|
|
__IO uint8_t PFNS;
|
|
stc_adc_pfns_field_t PFNS_f;
|
|
};
|
|
union {
|
|
__IO uint8_t PCCR;
|
|
stc_adc_pccr_field_t PCCR_f;
|
|
};
|
|
uint8_t RESERVED4[2];
|
|
union {
|
|
union {
|
|
__IO uint32_t PCFD;
|
|
stc_adc_pcfd_field_t PCFD_f;
|
|
};
|
|
struct {
|
|
union {
|
|
__IO uint16_t PCFDL;
|
|
stc_adc_pcfdl_field_t PCFDL_f;
|
|
};
|
|
union {
|
|
__IO uint16_t PCFDH;
|
|
stc_adc_pcfdh_field_t PCFDH_f;
|
|
};
|
|
};
|
|
};
|
|
union {
|
|
__IO uint8_t PCIS;
|
|
stc_adc_pcis_field_t PCIS_f;
|
|
};
|
|
uint8_t RESERVED5[3];
|
|
union {
|
|
__IO uint8_t CMPCR;
|
|
stc_adc_cmpcr_field_t CMPCR_f;
|
|
};
|
|
uint8_t RESERVED6;
|
|
union {
|
|
__IO uint16_t CMPD;
|
|
stc_adc_cmpd_field_t CMPD_f;
|
|
};
|
|
union {
|
|
union {
|
|
__IO uint16_t ADSS23;
|
|
stc_adc_adss23_field_t ADSS23_f;
|
|
};
|
|
struct {
|
|
union {
|
|
__IO uint8_t ADSS2;
|
|
stc_adc_adss2_field_t ADSS2_f;
|
|
};
|
|
union {
|
|
__IO uint8_t ADSS3;
|
|
stc_adc_adss3_field_t ADSS3_f;
|
|
};
|
|
};
|
|
};
|
|
uint8_t RESERVED7[2];
|
|
union {
|
|
union {
|
|
__IO uint16_t ADSS01;
|
|
stc_adc_adss01_field_t ADSS01_f;
|
|
};
|
|
struct {
|
|
union {
|
|
__IO uint8_t ADSS0;
|
|
stc_adc_adss0_field_t ADSS0_f;
|
|
};
|
|
union {
|
|
__IO uint8_t ADSS1;
|
|
stc_adc_adss1_field_t ADSS1_f;
|
|
};
|
|
};
|
|
};
|
|
uint8_t RESERVED8[2];
|
|
union {
|
|
union {
|
|
__IO uint16_t ADST01;
|
|
stc_adc_adst01_field_t ADST01_f;
|
|
};
|
|
struct {
|
|
union {
|
|
__IO uint8_t ADST1;
|
|
stc_adc_adst1_field_t ADST1_f;
|
|
};
|
|
union {
|
|
__IO uint8_t ADST0;
|
|
stc_adc_adst0_field_t ADST0_f;
|
|
};
|
|
};
|
|
};
|
|
uint8_t RESERVED9[2];
|
|
union {
|
|
__IO uint8_t ADCT;
|
|
stc_adc_adct_field_t ADCT_f;
|
|
};
|
|
uint8_t RESERVED10[3];
|
|
union {
|
|
__IO uint8_t PRTSL;
|
|
stc_adc_prtsl_field_t PRTSL_f;
|
|
};
|
|
union {
|
|
__IO uint8_t SCTSL;
|
|
stc_adc_sctsl_field_t SCTSL_f;
|
|
};
|
|
uint8_t RESERVED11[2];
|
|
union {
|
|
__IO uint8_t ADCEN;
|
|
stc_adc_adcen_field_t ADCEN_f;
|
|
};
|
|
}FM3_ADC_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* CRTRIM_MODULE
|
|
******************************************************************************/
|
|
/* CR trimming registers */
|
|
typedef struct
|
|
{
|
|
union {
|
|
__IO uint8_t MCR_PSR;
|
|
stc_crtrim_mcr_psr_field_t MCR_PSR_f;
|
|
};
|
|
uint8_t RESERVED0[3];
|
|
union {
|
|
__IO uint16_t MCR_FTRM;
|
|
stc_crtrim_mcr_ftrm_field_t MCR_FTRM_f;
|
|
};
|
|
uint8_t RESERVED1[6];
|
|
__IO uint32_t MCR_RLR;
|
|
}FM3_CRTRIM_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* EXTI_MODULE
|
|
******************************************************************************/
|
|
/* External interrupt registers */
|
|
typedef struct
|
|
{
|
|
union {
|
|
__IO uint32_t ENIR;
|
|
stc_exti_enir_field_t ENIR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t EIRR;
|
|
stc_exti_eirr_field_t EIRR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t EICL;
|
|
stc_exti_eicl_field_t EICL_f;
|
|
};
|
|
union {
|
|
__IO uint32_t ELVR;
|
|
stc_exti_elvr_field_t ELVR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t ELVR1;
|
|
stc_exti_elvr1_field_t ELVR1_f;
|
|
};
|
|
union {
|
|
__IO uint8_t NMIRR;
|
|
stc_exti_nmirr_field_t NMIRR_f;
|
|
};
|
|
uint8_t RESERVED4[3];
|
|
union {
|
|
__IO uint8_t NMICL;
|
|
stc_exti_nmicl_field_t NMICL_f;
|
|
};
|
|
}FM3_EXTI_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* INTREQ_MODULE
|
|
******************************************************************************/
|
|
/* Interrupt request read registers */
|
|
typedef struct
|
|
{
|
|
union {
|
|
__IO uint32_t DRQSEL;
|
|
stc_intreq_drqsel_field_t DRQSEL_f;
|
|
};
|
|
uint8_t RESERVED0[7];
|
|
union {
|
|
__IO uint8_t ODDPKS;
|
|
stc_intreq_oddpks_field_t ODDPKS_f;
|
|
};
|
|
uint8_t RESERVED1[4];
|
|
union {
|
|
__IO uint32_t EXC02MON;
|
|
stc_intreq_exc02mon_field_t EXC02MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ00MON;
|
|
stc_intreq_irq00mon_field_t IRQ00MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ01MON;
|
|
stc_intreq_irq01mon_field_t IRQ01MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ02MON;
|
|
stc_intreq_irq02mon_field_t IRQ02MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ03MON;
|
|
stc_intreq_irq03mon_field_t IRQ03MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ04MON;
|
|
stc_intreq_irq04mon_field_t IRQ04MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ05MON;
|
|
stc_intreq_irq05mon_field_t IRQ05MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ06MON;
|
|
stc_intreq_irq06mon_field_t IRQ06MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ07MON;
|
|
stc_intreq_irq07mon_field_t IRQ07MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ08MON;
|
|
stc_intreq_irq08mon_field_t IRQ08MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ09MON;
|
|
stc_intreq_irq09mon_field_t IRQ09MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ10MON;
|
|
stc_intreq_irq10mon_field_t IRQ10MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ11MON;
|
|
stc_intreq_irq11mon_field_t IRQ11MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ12MON;
|
|
stc_intreq_irq12mon_field_t IRQ12MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ13MON;
|
|
stc_intreq_irq13mon_field_t IRQ13MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ14MON;
|
|
stc_intreq_irq14mon_field_t IRQ14MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ15MON;
|
|
stc_intreq_irq15mon_field_t IRQ15MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ16MON;
|
|
stc_intreq_irq16mon_field_t IRQ16MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ17MON;
|
|
stc_intreq_irq17mon_field_t IRQ17MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ18MON;
|
|
stc_intreq_irq18mon_field_t IRQ18MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ19MON;
|
|
stc_intreq_irq19mon_field_t IRQ19MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ20MON;
|
|
stc_intreq_irq20mon_field_t IRQ20MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ21MON;
|
|
stc_intreq_irq21mon_field_t IRQ21MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ22MON;
|
|
stc_intreq_irq22mon_field_t IRQ22MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ23MON;
|
|
stc_intreq_irq23mon_field_t IRQ23MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ24MON;
|
|
stc_intreq_irq24mon_field_t IRQ24MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ25MON;
|
|
stc_intreq_irq25mon_field_t IRQ25MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ26MON;
|
|
stc_intreq_irq26mon_field_t IRQ26MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ27MON;
|
|
stc_intreq_irq27mon_field_t IRQ27MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ28MON;
|
|
stc_intreq_irq28mon_field_t IRQ28MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ29MON;
|
|
stc_intreq_irq29mon_field_t IRQ29MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ30MON;
|
|
stc_intreq_irq30mon_field_t IRQ30MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ31MON;
|
|
stc_intreq_irq31mon_field_t IRQ31MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ32MON;
|
|
stc_intreq_irq32mon_field_t IRQ32MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ33MON;
|
|
stc_intreq_irq33mon_field_t IRQ33MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ34MON;
|
|
stc_intreq_irq34mon_field_t IRQ34MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ35MON;
|
|
stc_intreq_irq35mon_field_t IRQ35MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ36MON;
|
|
stc_intreq_irq36mon_field_t IRQ36MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ37MON;
|
|
stc_intreq_irq37mon_field_t IRQ37MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ38MON;
|
|
stc_intreq_irq38mon_field_t IRQ38MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ39MON;
|
|
stc_intreq_irq39mon_field_t IRQ39MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ40MON;
|
|
stc_intreq_irq40mon_field_t IRQ40MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ41MON;
|
|
stc_intreq_irq41mon_field_t IRQ41MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ42MON;
|
|
stc_intreq_irq42mon_field_t IRQ42MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ43MON;
|
|
stc_intreq_irq43mon_field_t IRQ43MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ44MON;
|
|
stc_intreq_irq44mon_field_t IRQ44MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ45MON;
|
|
stc_intreq_irq45mon_field_t IRQ45MON_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IRQ46MON;
|
|
stc_intreq_irq46mon_field_t IRQ46MON_f;
|
|
};
|
|
uint8_t RESERVED2[300];
|
|
union {
|
|
__IO uint32_t DRQSEL1;
|
|
stc_intreq_drqsel1_field_t DRQSEL1_f;
|
|
};
|
|
union {
|
|
__IO uint32_t DQESEL;
|
|
stc_intreq_dqesel_field_t DQESEL_f;
|
|
};
|
|
uint8_t RESERVED3[7];
|
|
union {
|
|
__IO uint8_t ODDPKS1;
|
|
stc_intreq_oddpks1_field_t ODDPKS1_f;
|
|
};
|
|
}FM3_INTREQ_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* GPIO_MODULE
|
|
******************************************************************************/
|
|
/* General purpose I/O registers */
|
|
typedef struct
|
|
{
|
|
union {
|
|
__IO uint32_t PFR0;
|
|
stc_gpio_pfr0_field_t PFR0_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PFR1;
|
|
stc_gpio_pfr1_field_t PFR1_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PFR2;
|
|
stc_gpio_pfr2_field_t PFR2_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PFR3;
|
|
stc_gpio_pfr3_field_t PFR3_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PFR4;
|
|
stc_gpio_pfr4_field_t PFR4_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PFR5;
|
|
stc_gpio_pfr5_field_t PFR5_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PFR6;
|
|
stc_gpio_pfr6_field_t PFR6_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PFR7;
|
|
stc_gpio_pfr7_field_t PFR7_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PFR8;
|
|
stc_gpio_pfr8_field_t PFR8_f;
|
|
};
|
|
__IO uint32_t PFR9;
|
|
union {
|
|
__IO uint32_t PFRA;
|
|
stc_gpio_pfra_field_t PFRA_f;
|
|
};
|
|
__IO uint32_t PFRB;
|
|
union {
|
|
__IO uint32_t PFRC;
|
|
stc_gpio_pfrc_field_t PFRC_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PFRD;
|
|
stc_gpio_pfrd_field_t PFRD_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PFRE;
|
|
stc_gpio_pfre_field_t PFRE_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PFRF;
|
|
stc_gpio_pfrf_field_t PFRF_f;
|
|
};
|
|
uint8_t RESERVED0[192];
|
|
union {
|
|
__IO uint32_t PCR0;
|
|
stc_gpio_pcr0_field_t PCR0_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PCR1;
|
|
stc_gpio_pcr1_field_t PCR1_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PCR2;
|
|
stc_gpio_pcr2_field_t PCR2_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PCR3;
|
|
stc_gpio_pcr3_field_t PCR3_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PCR4;
|
|
stc_gpio_pcr4_field_t PCR4_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PCR5;
|
|
stc_gpio_pcr5_field_t PCR5_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PCR6;
|
|
stc_gpio_pcr6_field_t PCR6_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PCR7;
|
|
stc_gpio_pcr7_field_t PCR7_f;
|
|
};
|
|
__IO uint32_t PCR8;
|
|
__IO uint32_t PCR9;
|
|
union {
|
|
__IO uint32_t PCRA;
|
|
stc_gpio_pcra_field_t PCRA_f;
|
|
};
|
|
__IO uint32_t PCRB;
|
|
union {
|
|
__IO uint32_t PCRC;
|
|
stc_gpio_pcrc_field_t PCRC_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PCRD;
|
|
stc_gpio_pcrd_field_t PCRD_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PCRE;
|
|
stc_gpio_pcre_field_t PCRE_f;
|
|
};
|
|
__IO uint32_t PCRF;
|
|
uint8_t RESERVED1[192];
|
|
union {
|
|
__IO uint32_t DDR0;
|
|
stc_gpio_ddr0_field_t DDR0_f;
|
|
};
|
|
union {
|
|
__IO uint32_t DDR1;
|
|
stc_gpio_ddr1_field_t DDR1_f;
|
|
};
|
|
union {
|
|
__IO uint32_t DDR2;
|
|
stc_gpio_ddr2_field_t DDR2_f;
|
|
};
|
|
union {
|
|
__IO uint32_t DDR3;
|
|
stc_gpio_ddr3_field_t DDR3_f;
|
|
};
|
|
union {
|
|
__IO uint32_t DDR4;
|
|
stc_gpio_ddr4_field_t DDR4_f;
|
|
};
|
|
union {
|
|
__IO uint32_t DDR5;
|
|
stc_gpio_ddr5_field_t DDR5_f;
|
|
};
|
|
union {
|
|
__IO uint32_t DDR6;
|
|
stc_gpio_ddr6_field_t DDR6_f;
|
|
};
|
|
union {
|
|
__IO uint32_t DDR7;
|
|
stc_gpio_ddr7_field_t DDR7_f;
|
|
};
|
|
union {
|
|
__IO uint32_t DDR8;
|
|
stc_gpio_ddr8_field_t DDR8_f;
|
|
};
|
|
__IO uint32_t DDR9;
|
|
union {
|
|
__IO uint32_t DDRA;
|
|
stc_gpio_ddra_field_t DDRA_f;
|
|
};
|
|
__IO uint32_t DDRB;
|
|
union {
|
|
__IO uint32_t DDRC;
|
|
stc_gpio_ddrc_field_t DDRC_f;
|
|
};
|
|
union {
|
|
__IO uint32_t DDRD;
|
|
stc_gpio_ddrd_field_t DDRD_f;
|
|
};
|
|
union {
|
|
__IO uint32_t DDRE;
|
|
stc_gpio_ddre_field_t DDRE_f;
|
|
};
|
|
union {
|
|
__IO uint32_t DDRF;
|
|
stc_gpio_ddrf_field_t DDRF_f;
|
|
};
|
|
uint8_t RESERVED2[192];
|
|
union {
|
|
__IO uint32_t PDIR0;
|
|
stc_gpio_pdir0_field_t PDIR0_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PDIR1;
|
|
stc_gpio_pdir1_field_t PDIR1_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PDIR2;
|
|
stc_gpio_pdir2_field_t PDIR2_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PDIR3;
|
|
stc_gpio_pdir3_field_t PDIR3_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PDIR4;
|
|
stc_gpio_pdir4_field_t PDIR4_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PDIR5;
|
|
stc_gpio_pdir5_field_t PDIR5_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PDIR6;
|
|
stc_gpio_pdir6_field_t PDIR6_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PDIR7;
|
|
stc_gpio_pdir7_field_t PDIR7_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PDIR8;
|
|
stc_gpio_pdir8_field_t PDIR8_f;
|
|
};
|
|
__IO uint32_t PDIR9;
|
|
union {
|
|
__IO uint32_t PDIRA;
|
|
stc_gpio_pdira_field_t PDIRA_f;
|
|
};
|
|
__IO uint32_t PDIRB;
|
|
union {
|
|
__IO uint32_t PDIRC;
|
|
stc_gpio_pdirc_field_t PDIRC_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PDIRD;
|
|
stc_gpio_pdird_field_t PDIRD_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PDIRE;
|
|
stc_gpio_pdire_field_t PDIRE_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PDIRF;
|
|
stc_gpio_pdirf_field_t PDIRF_f;
|
|
};
|
|
uint8_t RESERVED3[192];
|
|
union {
|
|
__IO uint32_t PDOR0;
|
|
stc_gpio_pdor0_field_t PDOR0_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PDOR1;
|
|
stc_gpio_pdor1_field_t PDOR1_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PDOR2;
|
|
stc_gpio_pdor2_field_t PDOR2_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PDOR3;
|
|
stc_gpio_pdor3_field_t PDOR3_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PDOR4;
|
|
stc_gpio_pdor4_field_t PDOR4_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PDOR5;
|
|
stc_gpio_pdor5_field_t PDOR5_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PDOR6;
|
|
stc_gpio_pdor6_field_t PDOR6_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PDOR7;
|
|
stc_gpio_pdor7_field_t PDOR7_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PDOR8;
|
|
stc_gpio_pdor8_field_t PDOR8_f;
|
|
};
|
|
__IO uint32_t PDOR9;
|
|
union {
|
|
__IO uint32_t PDORA;
|
|
stc_gpio_pdora_field_t PDORA_f;
|
|
};
|
|
__IO uint32_t PDORB;
|
|
union {
|
|
__IO uint32_t PDORC;
|
|
stc_gpio_pdorc_field_t PDORC_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PDORD;
|
|
stc_gpio_pdord_field_t PDORD_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PDORE;
|
|
stc_gpio_pdore_field_t PDORE_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PDORF;
|
|
stc_gpio_pdorf_field_t PDORF_f;
|
|
};
|
|
uint8_t RESERVED4[192];
|
|
union {
|
|
__IO uint32_t ADE;
|
|
stc_gpio_ade_field_t ADE_f;
|
|
};
|
|
uint8_t RESERVED5[124];
|
|
union {
|
|
__IO uint32_t SPSR;
|
|
stc_gpio_spsr_field_t SPSR_f;
|
|
};
|
|
uint8_t RESERVED6[124];
|
|
union {
|
|
__IO uint32_t EPFR00;
|
|
stc_gpio_epfr00_field_t EPFR00_f;
|
|
};
|
|
union {
|
|
__IO uint32_t EPFR01;
|
|
stc_gpio_epfr01_field_t EPFR01_f;
|
|
};
|
|
union {
|
|
__IO uint32_t EPFR02;
|
|
stc_gpio_epfr02_field_t EPFR02_f;
|
|
};
|
|
union {
|
|
__IO uint32_t EPFR03;
|
|
stc_gpio_epfr03_field_t EPFR03_f;
|
|
};
|
|
union {
|
|
__IO uint32_t EPFR04;
|
|
stc_gpio_epfr04_field_t EPFR04_f;
|
|
};
|
|
union {
|
|
__IO uint32_t EPFR05;
|
|
stc_gpio_epfr05_field_t EPFR05_f;
|
|
};
|
|
union {
|
|
__IO uint32_t EPFR06;
|
|
stc_gpio_epfr06_field_t EPFR06_f;
|
|
};
|
|
union {
|
|
__IO uint32_t EPFR07;
|
|
stc_gpio_epfr07_field_t EPFR07_f;
|
|
};
|
|
union {
|
|
__IO uint32_t EPFR08;
|
|
stc_gpio_epfr08_field_t EPFR08_f;
|
|
};
|
|
union {
|
|
__IO uint32_t EPFR09;
|
|
stc_gpio_epfr09_field_t EPFR09_f;
|
|
};
|
|
union {
|
|
__IO uint32_t EPFR10;
|
|
stc_gpio_epfr10_field_t EPFR10_f;
|
|
};
|
|
union {
|
|
__IO uint32_t EPFR11;
|
|
stc_gpio_epfr11_field_t EPFR11_f;
|
|
};
|
|
union {
|
|
__IO uint32_t EPFR12;
|
|
stc_gpio_epfr12_field_t EPFR12_f;
|
|
};
|
|
union {
|
|
__IO uint32_t EPFR13;
|
|
stc_gpio_epfr13_field_t EPFR13_f;
|
|
};
|
|
union {
|
|
__IO uint32_t EPFR14;
|
|
stc_gpio_epfr14_field_t EPFR14_f;
|
|
};
|
|
union {
|
|
__IO uint32_t EPFR15;
|
|
stc_gpio_epfr15_field_t EPFR15_f;
|
|
};
|
|
uint8_t RESERVED7[192];
|
|
union {
|
|
__IO uint32_t PZR0;
|
|
stc_gpio_pzr0_field_t PZR0_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PZR1;
|
|
stc_gpio_pzr1_field_t PZR1_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PZR2;
|
|
stc_gpio_pzr2_field_t PZR2_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PZR3;
|
|
stc_gpio_pzr3_field_t PZR3_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PZR4;
|
|
stc_gpio_pzr4_field_t PZR4_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PZR5;
|
|
stc_gpio_pzr5_field_t PZR5_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PZR6;
|
|
stc_gpio_pzr6_field_t PZR6_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PZR7;
|
|
stc_gpio_pzr7_field_t PZR7_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PZR8;
|
|
stc_gpio_pzr8_field_t PZR8_f;
|
|
};
|
|
__IO uint32_t PZR9;
|
|
union {
|
|
__IO uint32_t PZRA;
|
|
stc_gpio_pzra_field_t PZRA_f;
|
|
};
|
|
__IO uint32_t PZRB;
|
|
union {
|
|
__IO uint32_t PZRC;
|
|
stc_gpio_pzrc_field_t PZRC_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PZRD;
|
|
stc_gpio_pzrd_field_t PZRD_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PZRE;
|
|
stc_gpio_pzre_field_t PZRE_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PZRF;
|
|
stc_gpio_pzrf_field_t PZRF_f;
|
|
};
|
|
}FM3_GPIO_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* LVD_MODULE
|
|
******************************************************************************/
|
|
/* Low voltage detection registers */
|
|
typedef struct
|
|
{
|
|
union {
|
|
__IO uint8_t LVD_CTL;
|
|
stc_lvd_lvd_ctl_field_t LVD_CTL_f;
|
|
};
|
|
uint8_t RESERVED0[3];
|
|
union {
|
|
__IO uint8_t LVD_STR;
|
|
stc_lvd_lvd_str_field_t LVD_STR_f;
|
|
};
|
|
uint8_t RESERVED1[3];
|
|
union {
|
|
__IO uint8_t LVD_CLR;
|
|
stc_lvd_lvd_clr_field_t LVD_CLR_f;
|
|
};
|
|
uint8_t RESERVED2[3];
|
|
__IO uint32_t LVD_RLR;
|
|
union {
|
|
__IO uint8_t LVD_STR2;
|
|
stc_lvd_lvd_str2_field_t LVD_STR2_f;
|
|
};
|
|
}FM3_LVD_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* USBETHERNETCLK
|
|
******************************************************************************/
|
|
/* USB Ethernet clock registers */
|
|
typedef struct
|
|
{
|
|
union {
|
|
__IO uint8_t UCCR;
|
|
stc_usbethernetclk_uccr_field_t UCCR_f;
|
|
};
|
|
uint8_t RESERVED0[3];
|
|
union {
|
|
__IO uint8_t UPCR1;
|
|
stc_usbethernetclk_upcr1_field_t UPCR1_f;
|
|
};
|
|
uint8_t RESERVED1[3];
|
|
union {
|
|
__IO uint8_t UPCR2;
|
|
stc_usbethernetclk_upcr2_field_t UPCR2_f;
|
|
};
|
|
uint8_t RESERVED2[3];
|
|
union {
|
|
__IO uint8_t UPCR3;
|
|
stc_usbethernetclk_upcr3_field_t UPCR3_f;
|
|
};
|
|
uint8_t RESERVED3[3];
|
|
union {
|
|
__IO uint8_t UPCR4;
|
|
stc_usbethernetclk_upcr4_field_t UPCR4_f;
|
|
};
|
|
uint8_t RESERVED4[3];
|
|
union {
|
|
__IO uint8_t UP_STR;
|
|
stc_usbethernetclk_up_str_field_t UP_STR_f;
|
|
};
|
|
uint8_t RESERVED5[3];
|
|
union {
|
|
__IO uint8_t UPINT_ENR;
|
|
stc_usbethernetclk_upint_enr_field_t UPINT_ENR_f;
|
|
};
|
|
uint8_t RESERVED6[3];
|
|
union {
|
|
__IO uint8_t UPINT_CLR;
|
|
stc_usbethernetclk_upint_clr_field_t UPINT_CLR_f;
|
|
};
|
|
uint8_t RESERVED7[3];
|
|
union {
|
|
__IO uint8_t UPINT_STR;
|
|
stc_usbethernetclk_upint_str_field_t UPINT_STR_f;
|
|
};
|
|
uint8_t RESERVED8[3];
|
|
union {
|
|
__IO uint8_t UPCR5;
|
|
stc_usbethernetclk_upcr5_field_t UPCR5_f;
|
|
};
|
|
uint8_t RESERVED9[3];
|
|
union {
|
|
__IO uint8_t UPCR6;
|
|
stc_usbethernetclk_upcr6_field_t UPCR6_f;
|
|
};
|
|
uint8_t RESERVED10[3];
|
|
union {
|
|
__IO uint8_t UPCR7;
|
|
stc_usbethernetclk_upcr7_field_t UPCR7_f;
|
|
};
|
|
uint8_t RESERVED11[3];
|
|
union {
|
|
__IO uint8_t USBEN0;
|
|
stc_usbethernetclk_usben0_field_t USBEN0_f;
|
|
};
|
|
uint8_t RESERVED12[3];
|
|
union {
|
|
__IO uint8_t USBEN1;
|
|
stc_usbethernetclk_usben1_field_t USBEN1_f;
|
|
};
|
|
}FM3_USBETHERNETCLK_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* MFS03_UART_MODULE
|
|
******************************************************************************/
|
|
/* UART asynchronous channel 0 registers */
|
|
typedef struct
|
|
{
|
|
union {
|
|
__IO uint8_t SMR;
|
|
stc_mfs03_uart_smr_field_t SMR_f;
|
|
};
|
|
union {
|
|
__IO uint8_t SCR;
|
|
stc_mfs03_uart_scr_field_t SCR_f;
|
|
};
|
|
uint8_t RESERVED0[2];
|
|
union {
|
|
__IO uint8_t ESCR;
|
|
stc_mfs03_uart_escr_field_t ESCR_f;
|
|
};
|
|
union {
|
|
__IO uint8_t SSR;
|
|
stc_mfs03_uart_ssr_field_t SSR_f;
|
|
};
|
|
uint8_t RESERVED1[2];
|
|
union {
|
|
union {
|
|
__IO uint16_t RDR;
|
|
stc_mfs03_uart_rdr_field_t RDR_f;
|
|
};
|
|
union {
|
|
__IO uint16_t TDR;
|
|
stc_mfs03_uart_tdr_field_t TDR_f;
|
|
};
|
|
};
|
|
uint8_t RESERVED2[2];
|
|
union {
|
|
union {
|
|
__IO uint16_t BGR;
|
|
stc_mfs03_uart_bgr_field_t BGR_f;
|
|
};
|
|
struct {
|
|
__IO uint8_t BGR0;
|
|
union {
|
|
__IO uint8_t BGR1;
|
|
stc_mfs03_uart_bgr1_field_t BGR1_f;
|
|
};
|
|
};
|
|
};
|
|
}FM3_MFS03_UART_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* MFS03_CSIO_MODULE
|
|
******************************************************************************/
|
|
/* UART synchronous channel 0 registers */
|
|
typedef struct
|
|
{
|
|
union {
|
|
__IO uint8_t SMR;
|
|
stc_mfs03_csio_smr_field_t SMR_f;
|
|
};
|
|
union {
|
|
__IO uint8_t SCR;
|
|
stc_mfs03_csio_scr_field_t SCR_f;
|
|
};
|
|
uint8_t RESERVED0[2];
|
|
union {
|
|
__IO uint8_t ESCR;
|
|
stc_mfs03_csio_escr_field_t ESCR_f;
|
|
};
|
|
union {
|
|
__IO uint8_t SSR;
|
|
stc_mfs03_csio_ssr_field_t SSR_f;
|
|
};
|
|
uint8_t RESERVED1[2];
|
|
union {
|
|
__IO uint16_t RDR;
|
|
__IO uint16_t TDR;
|
|
};
|
|
uint8_t RESERVED2[2];
|
|
union {
|
|
__IO uint16_t BGR;
|
|
struct {
|
|
__IO uint8_t BGR0;
|
|
__IO uint8_t BGR1;
|
|
};
|
|
};
|
|
}FM3_MFS03_CSIO_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* MFS03_LIN_MODULE
|
|
******************************************************************************/
|
|
/* UART LIN channel 0 registers */
|
|
typedef struct
|
|
{
|
|
union {
|
|
__IO uint8_t SMR;
|
|
stc_mfs03_lin_smr_field_t SMR_f;
|
|
};
|
|
union {
|
|
__IO uint8_t SCR;
|
|
stc_mfs03_lin_scr_field_t SCR_f;
|
|
};
|
|
uint8_t RESERVED0[2];
|
|
union {
|
|
__IO uint8_t ESCR;
|
|
stc_mfs03_lin_escr_field_t ESCR_f;
|
|
};
|
|
union {
|
|
__IO uint8_t SSR;
|
|
stc_mfs03_lin_ssr_field_t SSR_f;
|
|
};
|
|
uint8_t RESERVED1[2];
|
|
union {
|
|
__IO uint16_t RDR;
|
|
__IO uint16_t TDR;
|
|
};
|
|
uint8_t RESERVED2[2];
|
|
union {
|
|
union {
|
|
__IO uint16_t BGR;
|
|
stc_mfs03_lin_bgr_field_t BGR_f;
|
|
};
|
|
struct {
|
|
__IO uint8_t BGR0;
|
|
union {
|
|
__IO uint8_t BGR1;
|
|
stc_mfs03_lin_bgr1_field_t BGR1_f;
|
|
};
|
|
};
|
|
};
|
|
}FM3_MFS03_LIN_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* MFS03_I2C_MODULE
|
|
******************************************************************************/
|
|
/* I2C channel 0 registers */
|
|
typedef struct
|
|
{
|
|
union {
|
|
__IO uint8_t SMR;
|
|
stc_mfs03_i2c_smr_field_t SMR_f;
|
|
};
|
|
union {
|
|
__IO uint8_t IBCR;
|
|
stc_mfs03_i2c_ibcr_field_t IBCR_f;
|
|
};
|
|
uint8_t RESERVED0[2];
|
|
union {
|
|
__IO uint8_t IBSR;
|
|
stc_mfs03_i2c_ibsr_field_t IBSR_f;
|
|
};
|
|
union {
|
|
__IO uint8_t SSR;
|
|
stc_mfs03_i2c_ssr_field_t SSR_f;
|
|
};
|
|
uint8_t RESERVED1[2];
|
|
union {
|
|
__IO uint16_t RDR;
|
|
__IO uint16_t TDR;
|
|
};
|
|
uint8_t RESERVED2[2];
|
|
union {
|
|
__IO uint16_t BGR;
|
|
struct {
|
|
__IO uint8_t BGR0;
|
|
__IO uint8_t BGR1;
|
|
};
|
|
};
|
|
uint8_t RESERVED3[2];
|
|
union {
|
|
__IO uint8_t ISBA;
|
|
stc_mfs03_i2c_isba_field_t ISBA_f;
|
|
};
|
|
union {
|
|
__IO uint8_t ISMK;
|
|
stc_mfs03_i2c_ismk_field_t ISMK_f;
|
|
};
|
|
}FM3_MFS03_I2C_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* MFS47_UART_MODULE
|
|
******************************************************************************/
|
|
/* UART asynchronous channel 4 registers */
|
|
typedef struct
|
|
{
|
|
union {
|
|
__IO uint8_t SMR;
|
|
stc_mfs47_uart_smr_field_t SMR_f;
|
|
};
|
|
union {
|
|
__IO uint8_t SCR;
|
|
stc_mfs47_uart_scr_field_t SCR_f;
|
|
};
|
|
uint8_t RESERVED0[2];
|
|
union {
|
|
__IO uint8_t ESCR;
|
|
stc_mfs47_uart_escr_field_t ESCR_f;
|
|
};
|
|
union {
|
|
__IO uint8_t SSR;
|
|
stc_mfs47_uart_ssr_field_t SSR_f;
|
|
};
|
|
uint8_t RESERVED1[2];
|
|
union {
|
|
union {
|
|
__IO uint16_t RDR;
|
|
stc_mfs47_uart_rdr_field_t RDR_f;
|
|
};
|
|
union {
|
|
__IO uint16_t TDR;
|
|
stc_mfs47_uart_tdr_field_t TDR_f;
|
|
};
|
|
};
|
|
uint8_t RESERVED2[2];
|
|
union {
|
|
union {
|
|
__IO uint16_t BGR;
|
|
stc_mfs47_uart_bgr_field_t BGR_f;
|
|
};
|
|
struct {
|
|
__IO uint8_t BGR0;
|
|
union {
|
|
__IO uint8_t BGR1;
|
|
stc_mfs47_uart_bgr1_field_t BGR1_f;
|
|
};
|
|
};
|
|
};
|
|
uint8_t RESERVED3[6];
|
|
union {
|
|
union {
|
|
__IO uint16_t FCR;
|
|
stc_mfs47_uart_fcr_field_t FCR_f;
|
|
};
|
|
struct {
|
|
union {
|
|
__IO uint8_t FCR0;
|
|
stc_mfs47_uart_fcr0_field_t FCR0_f;
|
|
};
|
|
union {
|
|
__IO uint8_t FCR1;
|
|
stc_mfs47_uart_fcr1_field_t FCR1_f;
|
|
};
|
|
};
|
|
};
|
|
uint8_t RESERVED4[2];
|
|
union {
|
|
union {
|
|
__IO uint16_t FBYTE;
|
|
stc_mfs47_uart_fbyte_field_t FBYTE_f;
|
|
};
|
|
struct {
|
|
union {
|
|
__IO uint8_t FBYTE1;
|
|
stc_mfs47_uart_fbyte1_field_t FBYTE1_f;
|
|
};
|
|
union {
|
|
__IO uint8_t FBYTE2;
|
|
stc_mfs47_uart_fbyte2_field_t FBYTE2_f;
|
|
};
|
|
};
|
|
};
|
|
}FM3_MFS47_UART_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* MFS47_CSIO_MODULE
|
|
******************************************************************************/
|
|
/* UART synchronous channel 4 registers */
|
|
typedef struct
|
|
{
|
|
union {
|
|
__IO uint8_t SMR;
|
|
stc_mfs47_csio_smr_field_t SMR_f;
|
|
};
|
|
union {
|
|
__IO uint8_t SCR;
|
|
stc_mfs47_csio_scr_field_t SCR_f;
|
|
};
|
|
uint8_t RESERVED0[2];
|
|
union {
|
|
__IO uint8_t ESCR;
|
|
stc_mfs47_csio_escr_field_t ESCR_f;
|
|
};
|
|
union {
|
|
__IO uint8_t SSR;
|
|
stc_mfs47_csio_ssr_field_t SSR_f;
|
|
};
|
|
uint8_t RESERVED1[2];
|
|
union {
|
|
__IO uint16_t RDR;
|
|
__IO uint16_t TDR;
|
|
};
|
|
uint8_t RESERVED2[2];
|
|
union {
|
|
__IO uint16_t BGR;
|
|
struct {
|
|
__IO uint8_t BGR0;
|
|
__IO uint8_t BGR1;
|
|
};
|
|
};
|
|
uint8_t RESERVED3[6];
|
|
union {
|
|
union {
|
|
__IO uint16_t FCR;
|
|
stc_mfs47_csio_fcr_field_t FCR_f;
|
|
};
|
|
struct {
|
|
union {
|
|
__IO uint8_t FCR0;
|
|
stc_mfs47_csio_fcr0_field_t FCR0_f;
|
|
};
|
|
union {
|
|
__IO uint8_t FCR1;
|
|
stc_mfs47_csio_fcr1_field_t FCR1_f;
|
|
};
|
|
};
|
|
};
|
|
uint8_t RESERVED4[2];
|
|
union {
|
|
union {
|
|
__IO uint16_t FBYTE;
|
|
stc_mfs47_csio_fbyte_field_t FBYTE_f;
|
|
};
|
|
struct {
|
|
union {
|
|
__IO uint8_t FBYTE1;
|
|
stc_mfs47_csio_fbyte1_field_t FBYTE1_f;
|
|
};
|
|
union {
|
|
__IO uint8_t FBYTE2;
|
|
stc_mfs47_csio_fbyte2_field_t FBYTE2_f;
|
|
};
|
|
};
|
|
};
|
|
}FM3_MFS47_CSIO_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* MFS47_LIN_MODULE
|
|
******************************************************************************/
|
|
/* UART LIN channel 4 registers */
|
|
typedef struct
|
|
{
|
|
union {
|
|
__IO uint8_t SMR;
|
|
stc_mfs47_lin_smr_field_t SMR_f;
|
|
};
|
|
union {
|
|
__IO uint8_t SCR;
|
|
stc_mfs47_lin_scr_field_t SCR_f;
|
|
};
|
|
uint8_t RESERVED0[2];
|
|
union {
|
|
__IO uint8_t ESCR;
|
|
stc_mfs47_lin_escr_field_t ESCR_f;
|
|
};
|
|
union {
|
|
__IO uint8_t SSR;
|
|
stc_mfs47_lin_ssr_field_t SSR_f;
|
|
};
|
|
uint8_t RESERVED1[2];
|
|
union {
|
|
__IO uint16_t RDR;
|
|
__IO uint16_t TDR;
|
|
};
|
|
uint8_t RESERVED2[2];
|
|
union {
|
|
union {
|
|
__IO uint16_t BGR;
|
|
stc_mfs47_lin_bgr_field_t BGR_f;
|
|
};
|
|
struct {
|
|
__IO uint8_t BGR0;
|
|
union {
|
|
__IO uint8_t BGR1;
|
|
stc_mfs47_lin_bgr1_field_t BGR1_f;
|
|
};
|
|
};
|
|
};
|
|
uint8_t RESERVED3[6];
|
|
union {
|
|
union {
|
|
__IO uint16_t FCR;
|
|
stc_mfs47_lin_fcr_field_t FCR_f;
|
|
};
|
|
struct {
|
|
union {
|
|
__IO uint8_t FCR0;
|
|
stc_mfs47_lin_fcr0_field_t FCR0_f;
|
|
};
|
|
union {
|
|
__IO uint8_t FCR1;
|
|
stc_mfs47_lin_fcr1_field_t FCR1_f;
|
|
};
|
|
};
|
|
};
|
|
uint8_t RESERVED4[2];
|
|
union {
|
|
union {
|
|
__IO uint16_t FBYTE;
|
|
stc_mfs47_lin_fbyte_field_t FBYTE_f;
|
|
};
|
|
struct {
|
|
union {
|
|
__IO uint8_t FBYTE1;
|
|
stc_mfs47_lin_fbyte1_field_t FBYTE1_f;
|
|
};
|
|
union {
|
|
__IO uint8_t FBYTE2;
|
|
stc_mfs47_lin_fbyte2_field_t FBYTE2_f;
|
|
};
|
|
};
|
|
};
|
|
}FM3_MFS47_LIN_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* MFS47_I2C_MODULE
|
|
******************************************************************************/
|
|
/* I2C channel 4 registers */
|
|
typedef struct
|
|
{
|
|
union {
|
|
__IO uint8_t SMR;
|
|
stc_mfs47_i2c_smr_field_t SMR_f;
|
|
};
|
|
union {
|
|
__IO uint8_t IBCR;
|
|
stc_mfs47_i2c_ibcr_field_t IBCR_f;
|
|
};
|
|
uint8_t RESERVED0[2];
|
|
union {
|
|
__IO uint8_t IBSR;
|
|
stc_mfs47_i2c_ibsr_field_t IBSR_f;
|
|
};
|
|
union {
|
|
__IO uint8_t SSR;
|
|
stc_mfs47_i2c_ssr_field_t SSR_f;
|
|
};
|
|
uint8_t RESERVED1[2];
|
|
union {
|
|
__IO uint16_t RDR;
|
|
__IO uint16_t TDR;
|
|
};
|
|
uint8_t RESERVED2[2];
|
|
union {
|
|
__IO uint16_t BGR;
|
|
struct {
|
|
__IO uint8_t BGR0;
|
|
__IO uint8_t BGR1;
|
|
};
|
|
};
|
|
uint8_t RESERVED3[2];
|
|
union {
|
|
__IO uint8_t ISBA;
|
|
stc_mfs47_i2c_isba_field_t ISBA_f;
|
|
};
|
|
union {
|
|
__IO uint8_t ISMK;
|
|
stc_mfs47_i2c_ismk_field_t ISMK_f;
|
|
};
|
|
uint8_t RESERVED4[2];
|
|
union {
|
|
union {
|
|
__IO uint16_t FCR;
|
|
stc_mfs47_i2c_fcr_field_t FCR_f;
|
|
};
|
|
struct {
|
|
union {
|
|
__IO uint8_t FCR0;
|
|
stc_mfs47_i2c_fcr0_field_t FCR0_f;
|
|
};
|
|
union {
|
|
__IO uint8_t FCR1;
|
|
stc_mfs47_i2c_fcr1_field_t FCR1_f;
|
|
};
|
|
};
|
|
};
|
|
uint8_t RESERVED5[2];
|
|
union {
|
|
union {
|
|
__IO uint16_t FBYTE;
|
|
stc_mfs47_i2c_fbyte_field_t FBYTE_f;
|
|
};
|
|
struct {
|
|
union {
|
|
__IO uint8_t FBYTE1;
|
|
stc_mfs47_i2c_fbyte1_field_t FBYTE1_f;
|
|
};
|
|
union {
|
|
__IO uint8_t FBYTE2;
|
|
stc_mfs47_i2c_fbyte2_field_t FBYTE2_f;
|
|
};
|
|
};
|
|
};
|
|
}FM3_MFS47_I2C_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* MFS_NFC_MODULE
|
|
******************************************************************************/
|
|
/* MFS_NFC_MODULE register bit fields */
|
|
typedef struct
|
|
{
|
|
union {
|
|
__IO uint16_t I2CDNF;
|
|
stc_mfs_nfc_i2cdnf_field_t I2CDNF_f;
|
|
};
|
|
}FM3_MFS_NFC_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* CRC_MODULE
|
|
******************************************************************************/
|
|
/* CRC registers */
|
|
typedef struct
|
|
{
|
|
union {
|
|
__IO uint8_t CRCCR;
|
|
stc_crc_crccr_field_t CRCCR_f;
|
|
};
|
|
uint8_t RESERVED0[3];
|
|
__IO uint32_t CRCINIT;
|
|
union {
|
|
__IO uint32_t CRCIN;
|
|
struct {
|
|
union {
|
|
__IO uint16_t CRCINL;
|
|
struct {
|
|
__IO uint8_t CRCINLL;
|
|
__IO uint8_t CRCINLH;
|
|
};
|
|
};
|
|
union {
|
|
__IO uint16_t CRCINH;
|
|
struct {
|
|
__IO uint8_t CRCINHL;
|
|
__IO uint8_t CRCINHH;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
__IO uint32_t CRCR;
|
|
}FM3_CRC_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* WC_MODULE
|
|
******************************************************************************/
|
|
/* Watch counter registers */
|
|
typedef struct
|
|
{
|
|
union {
|
|
__IO uint8_t WCRD;
|
|
stc_wc_wcrd_field_t WCRD_f;
|
|
};
|
|
union {
|
|
__IO uint8_t WCRL;
|
|
stc_wc_wcrl_field_t WCRL_f;
|
|
};
|
|
union {
|
|
__IO uint8_t WCCR;
|
|
stc_wc_wccr_field_t WCCR_f;
|
|
};
|
|
uint8_t RESERVED0[13];
|
|
union {
|
|
__IO uint16_t CLK_SEL;
|
|
stc_wc_clk_sel_field_t CLK_SEL_f;
|
|
};
|
|
uint8_t RESERVED1[2];
|
|
union {
|
|
__IO uint8_t CLK_EN;
|
|
stc_wc_clk_en_field_t CLK_EN_f;
|
|
};
|
|
}FM3_WC_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* EXBUS_MODULE
|
|
******************************************************************************/
|
|
/* External bus interface registers */
|
|
typedef struct
|
|
{
|
|
union {
|
|
__IO uint32_t MODE0;
|
|
stc_exbus_mode0_field_t MODE0_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MODE1;
|
|
stc_exbus_mode1_field_t MODE1_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MODE2;
|
|
stc_exbus_mode2_field_t MODE2_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MODE3;
|
|
stc_exbus_mode3_field_t MODE3_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MODE4;
|
|
stc_exbus_mode4_field_t MODE4_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MODE5;
|
|
stc_exbus_mode5_field_t MODE5_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MODE6;
|
|
stc_exbus_mode6_field_t MODE6_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MODE7;
|
|
stc_exbus_mode7_field_t MODE7_f;
|
|
};
|
|
union {
|
|
__IO uint32_t TIM0;
|
|
stc_exbus_tim0_field_t TIM0_f;
|
|
};
|
|
union {
|
|
__IO uint32_t TIM1;
|
|
stc_exbus_tim1_field_t TIM1_f;
|
|
};
|
|
union {
|
|
__IO uint32_t TIM2;
|
|
stc_exbus_tim2_field_t TIM2_f;
|
|
};
|
|
union {
|
|
__IO uint32_t TIM3;
|
|
stc_exbus_tim3_field_t TIM3_f;
|
|
};
|
|
union {
|
|
__IO uint32_t TIM4;
|
|
stc_exbus_tim4_field_t TIM4_f;
|
|
};
|
|
union {
|
|
__IO uint32_t TIM5;
|
|
stc_exbus_tim5_field_t TIM5_f;
|
|
};
|
|
union {
|
|
__IO uint32_t TIM6;
|
|
stc_exbus_tim6_field_t TIM6_f;
|
|
};
|
|
union {
|
|
__IO uint32_t TIM7;
|
|
stc_exbus_tim7_field_t TIM7_f;
|
|
};
|
|
union {
|
|
__IO uint32_t AREA0;
|
|
stc_exbus_area0_field_t AREA0_f;
|
|
};
|
|
union {
|
|
__IO uint32_t AREA1;
|
|
stc_exbus_area1_field_t AREA1_f;
|
|
};
|
|
union {
|
|
__IO uint32_t AREA2;
|
|
stc_exbus_area2_field_t AREA2_f;
|
|
};
|
|
union {
|
|
__IO uint32_t AREA3;
|
|
stc_exbus_area3_field_t AREA3_f;
|
|
};
|
|
union {
|
|
__IO uint32_t AREA4;
|
|
stc_exbus_area4_field_t AREA4_f;
|
|
};
|
|
union {
|
|
__IO uint32_t AREA5;
|
|
stc_exbus_area5_field_t AREA5_f;
|
|
};
|
|
union {
|
|
__IO uint32_t AREA6;
|
|
stc_exbus_area6_field_t AREA6_f;
|
|
};
|
|
union {
|
|
__IO uint32_t AREA7;
|
|
stc_exbus_area7_field_t AREA7_f;
|
|
};
|
|
union {
|
|
__IO uint16_t ATIM0;
|
|
stc_exbus_atim0_field_t ATIM0_f;
|
|
};
|
|
uint8_t RESERVED0[2];
|
|
union {
|
|
__IO uint16_t ATIM1;
|
|
stc_exbus_atim1_field_t ATIM1_f;
|
|
};
|
|
uint8_t RESERVED1[2];
|
|
union {
|
|
__IO uint16_t ATIM2;
|
|
stc_exbus_atim2_field_t ATIM2_f;
|
|
};
|
|
uint8_t RESERVED2[2];
|
|
union {
|
|
__IO uint16_t ATIM3;
|
|
stc_exbus_atim3_field_t ATIM3_f;
|
|
};
|
|
uint8_t RESERVED3[2];
|
|
union {
|
|
__IO uint16_t ATIM4;
|
|
stc_exbus_atim4_field_t ATIM4_f;
|
|
};
|
|
uint8_t RESERVED4[2];
|
|
union {
|
|
__IO uint16_t ATIM5;
|
|
stc_exbus_atim5_field_t ATIM5_f;
|
|
};
|
|
uint8_t RESERVED5[2];
|
|
union {
|
|
__IO uint16_t ATIM6;
|
|
stc_exbus_atim6_field_t ATIM6_f;
|
|
};
|
|
uint8_t RESERVED6[2];
|
|
union {
|
|
__IO uint16_t ATIM7;
|
|
stc_exbus_atim7_field_t ATIM7_f;
|
|
};
|
|
uint8_t RESERVED7[642];
|
|
union {
|
|
__IO uint8_t DCLKR;
|
|
stc_exbus_dclkr_field_t DCLKR_f;
|
|
};
|
|
}FM3_EXBUS_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* USB_MODULE
|
|
******************************************************************************/
|
|
/* USB channel 0 registers */
|
|
typedef struct
|
|
{
|
|
union {
|
|
union {
|
|
__IO uint16_t HCNT;
|
|
stc_usb_hcnt_field_t HCNT_f;
|
|
};
|
|
struct {
|
|
union {
|
|
__IO uint8_t HCNT0;
|
|
stc_usb_hcnt0_field_t HCNT0_f;
|
|
};
|
|
union {
|
|
__IO uint8_t HCNT1;
|
|
stc_usb_hcnt1_field_t HCNT1_f;
|
|
};
|
|
};
|
|
};
|
|
uint8_t RESERVED0[2];
|
|
union {
|
|
__IO uint8_t HIRQ;
|
|
stc_usb_hirq_field_t HIRQ_f;
|
|
};
|
|
union {
|
|
__IO uint8_t HERR;
|
|
stc_usb_herr_field_t HERR_f;
|
|
};
|
|
uint8_t RESERVED1[2];
|
|
union {
|
|
__IO uint8_t HSTATE;
|
|
stc_usb_hstate_field_t HSTATE_f;
|
|
};
|
|
union {
|
|
__IO uint8_t HFCOMP;
|
|
stc_usb_hfcomp_field_t HFCOMP_f;
|
|
};
|
|
uint8_t RESERVED2[2];
|
|
union {
|
|
union {
|
|
__IO uint16_t HRTIMER;
|
|
stc_usb_hrtimer_field_t HRTIMER_f;
|
|
};
|
|
struct {
|
|
union {
|
|
__IO uint8_t HRTIMER0;
|
|
stc_usb_hrtimer0_field_t HRTIMER0_f;
|
|
};
|
|
union {
|
|
__IO uint8_t HRTIMER1;
|
|
stc_usb_hrtimer1_field_t HRTIMER1_f;
|
|
};
|
|
};
|
|
};
|
|
uint8_t RESERVED3[2];
|
|
union {
|
|
__IO uint8_t HRTIMER2;
|
|
stc_usb_hrtimer2_field_t HRTIMER2_f;
|
|
};
|
|
union {
|
|
__IO uint8_t HADR;
|
|
stc_usb_hadr_field_t HADR_f;
|
|
};
|
|
uint8_t RESERVED4[2];
|
|
union {
|
|
union {
|
|
__IO uint16_t HEOF;
|
|
stc_usb_heof_field_t HEOF_f;
|
|
};
|
|
struct {
|
|
union {
|
|
__IO uint8_t HEOF0;
|
|
stc_usb_heof0_field_t HEOF0_f;
|
|
};
|
|
union {
|
|
__IO uint8_t HEOF1;
|
|
stc_usb_heof1_field_t HEOF1_f;
|
|
};
|
|
};
|
|
};
|
|
uint8_t RESERVED5[2];
|
|
union {
|
|
union {
|
|
__IO uint16_t HFRAME;
|
|
stc_usb_hframe_field_t HFRAME_f;
|
|
};
|
|
struct {
|
|
union {
|
|
__IO uint8_t HFRAME0;
|
|
stc_usb_hframe0_field_t HFRAME0_f;
|
|
};
|
|
union {
|
|
__IO uint8_t HFRAME1;
|
|
stc_usb_hframe1_field_t HFRAME1_f;
|
|
};
|
|
};
|
|
};
|
|
uint8_t RESERVED6[2];
|
|
union {
|
|
__IO uint8_t HTOKEN;
|
|
stc_usb_htoken_field_t HTOKEN_f;
|
|
};
|
|
uint8_t RESERVED7[3];
|
|
union {
|
|
__IO uint16_t UDCC;
|
|
stc_usb_udcc_field_t UDCC_f;
|
|
};
|
|
uint8_t RESERVED8[2];
|
|
union {
|
|
__IO uint16_t EP0C;
|
|
stc_usb_ep0c_field_t EP0C_f;
|
|
};
|
|
uint8_t RESERVED9[2];
|
|
union {
|
|
__IO uint16_t EP1C;
|
|
stc_usb_ep1c_field_t EP1C_f;
|
|
};
|
|
uint8_t RESERVED10[2];
|
|
union {
|
|
__IO uint16_t EP2C;
|
|
stc_usb_ep2c_field_t EP2C_f;
|
|
};
|
|
uint8_t RESERVED11[2];
|
|
union {
|
|
__IO uint16_t EP3C;
|
|
stc_usb_ep3c_field_t EP3C_f;
|
|
};
|
|
uint8_t RESERVED12[2];
|
|
union {
|
|
__IO uint16_t EP4C;
|
|
stc_usb_ep4c_field_t EP4C_f;
|
|
};
|
|
uint8_t RESERVED13[2];
|
|
union {
|
|
__IO uint16_t EP5C;
|
|
stc_usb_ep5c_field_t EP5C_f;
|
|
};
|
|
uint8_t RESERVED14[2];
|
|
union {
|
|
__IO uint16_t TMSP;
|
|
stc_usb_tmsp_field_t TMSP_f;
|
|
};
|
|
uint8_t RESERVED15[2];
|
|
union {
|
|
__IO uint8_t UDCS;
|
|
stc_usb_udcs_field_t UDCS_f;
|
|
};
|
|
union {
|
|
__IO uint8_t UDCIE;
|
|
stc_usb_udcie_field_t UDCIE_f;
|
|
};
|
|
uint8_t RESERVED16[2];
|
|
union {
|
|
__IO uint16_t EP0IS;
|
|
stc_usb_ep0is_field_t EP0IS_f;
|
|
};
|
|
uint8_t RESERVED17[2];
|
|
union {
|
|
__IO uint16_t EP0OS;
|
|
stc_usb_ep0os_field_t EP0OS_f;
|
|
};
|
|
uint8_t RESERVED18[2];
|
|
union {
|
|
__IO uint16_t EP1S;
|
|
stc_usb_ep1s_field_t EP1S_f;
|
|
};
|
|
uint8_t RESERVED19[2];
|
|
union {
|
|
__IO uint16_t EP2S;
|
|
stc_usb_ep2s_field_t EP2S_f;
|
|
};
|
|
uint8_t RESERVED20[2];
|
|
__IO uint16_t EP3S;
|
|
uint8_t RESERVED21[2];
|
|
union {
|
|
__IO uint16_t EP4S;
|
|
stc_usb_ep4s_field_t EP4S_f;
|
|
};
|
|
uint8_t RESERVED22[2];
|
|
union {
|
|
__IO uint16_t EP5S;
|
|
stc_usb_ep5s_field_t EP5S_f;
|
|
};
|
|
uint8_t RESERVED23[2];
|
|
union {
|
|
__IO uint16_t EP0DT;
|
|
struct {
|
|
__IO uint8_t EP0DTL;
|
|
__IO uint8_t EP0DTH;
|
|
};
|
|
};
|
|
uint8_t RESERVED24[2];
|
|
union {
|
|
__IO uint16_t EP1DT;
|
|
struct {
|
|
__IO uint8_t EP1DTL;
|
|
__IO uint8_t EP1DTH;
|
|
};
|
|
};
|
|
uint8_t RESERVED25[2];
|
|
union {
|
|
__IO uint16_t EP2DT;
|
|
struct {
|
|
__IO uint8_t EP2DTL;
|
|
__IO uint8_t EP2DTH;
|
|
};
|
|
};
|
|
uint8_t RESERVED26[2];
|
|
union {
|
|
__IO uint16_t EP3DT;
|
|
struct {
|
|
__IO uint8_t EP3DTL;
|
|
__IO uint8_t EP3DTH;
|
|
};
|
|
};
|
|
uint8_t RESERVED27[2];
|
|
union {
|
|
__IO uint16_t EP4DT;
|
|
struct {
|
|
__IO uint8_t EP4DTL;
|
|
__IO uint8_t EP4DTH;
|
|
};
|
|
};
|
|
uint8_t RESERVED28[2];
|
|
union {
|
|
__IO uint16_t EP5DT;
|
|
struct {
|
|
__IO uint8_t EP5DTL;
|
|
__IO uint8_t EP5DTH;
|
|
};
|
|
};
|
|
}FM3_USB_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* DMAC_MODULE
|
|
******************************************************************************/
|
|
/* DMA controller */
|
|
typedef struct
|
|
{
|
|
union {
|
|
__IO uint32_t DMACR;
|
|
stc_dmac_dmacr_field_t DMACR_f;
|
|
};
|
|
uint8_t RESERVED0[12];
|
|
union {
|
|
__IO uint32_t DMACA0;
|
|
stc_dmac_dmaca0_field_t DMACA0_f;
|
|
};
|
|
union {
|
|
__IO uint32_t DMACB0;
|
|
stc_dmac_dmacb0_field_t DMACB0_f;
|
|
};
|
|
__IO uint32_t DMACSA0;
|
|
__IO uint32_t DMACDA0;
|
|
union {
|
|
__IO uint32_t DMACA1;
|
|
stc_dmac_dmaca1_field_t DMACA1_f;
|
|
};
|
|
union {
|
|
__IO uint32_t DMACB1;
|
|
stc_dmac_dmacb1_field_t DMACB1_f;
|
|
};
|
|
__IO uint32_t DMACSA1;
|
|
__IO uint32_t DMACDA1;
|
|
union {
|
|
__IO uint32_t DMACA2;
|
|
stc_dmac_dmaca2_field_t DMACA2_f;
|
|
};
|
|
union {
|
|
__IO uint32_t DMACB2;
|
|
stc_dmac_dmacb2_field_t DMACB2_f;
|
|
};
|
|
__IO uint32_t DMACSA2;
|
|
__IO uint32_t DMACDA2;
|
|
union {
|
|
__IO uint32_t DMACA3;
|
|
stc_dmac_dmaca3_field_t DMACA3_f;
|
|
};
|
|
union {
|
|
__IO uint32_t DMACB3;
|
|
stc_dmac_dmacb3_field_t DMACB3_f;
|
|
};
|
|
__IO uint32_t DMACSA3;
|
|
__IO uint32_t DMACDA3;
|
|
union {
|
|
__IO uint32_t DMACA4;
|
|
stc_dmac_dmaca4_field_t DMACA4_f;
|
|
};
|
|
union {
|
|
__IO uint32_t DMACB4;
|
|
stc_dmac_dmacb4_field_t DMACB4_f;
|
|
};
|
|
__IO uint32_t DMACSA4;
|
|
__IO uint32_t DMACDA4;
|
|
union {
|
|
__IO uint32_t DMACA5;
|
|
stc_dmac_dmaca5_field_t DMACA5_f;
|
|
};
|
|
union {
|
|
__IO uint32_t DMACB5;
|
|
stc_dmac_dmacb5_field_t DMACB5_f;
|
|
};
|
|
__IO uint32_t DMACSA5;
|
|
__IO uint32_t DMACDA5;
|
|
union {
|
|
__IO uint32_t DMACA6;
|
|
stc_dmac_dmaca6_field_t DMACA6_f;
|
|
};
|
|
union {
|
|
__IO uint32_t DMACB6;
|
|
stc_dmac_dmacb6_field_t DMACB6_f;
|
|
};
|
|
__IO uint32_t DMACSA6;
|
|
__IO uint32_t DMACDA6;
|
|
union {
|
|
__IO uint32_t DMACA7;
|
|
stc_dmac_dmaca7_field_t DMACA7_f;
|
|
};
|
|
union {
|
|
__IO uint32_t DMACB7;
|
|
stc_dmac_dmacb7_field_t DMACB7_f;
|
|
};
|
|
__IO uint32_t DMACSA7;
|
|
__IO uint32_t DMACDA7;
|
|
}FM3_DMAC_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* ETHERNET_MAC_MODULE
|
|
******************************************************************************/
|
|
/* ETHERNET-MAC registers */
|
|
typedef struct
|
|
{
|
|
union {
|
|
__IO uint32_t MCR;
|
|
stc_ethernet_mac_mcr_field_t MCR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MFFR;
|
|
stc_ethernet_mac_mffr_field_t MFFR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MHTRH;
|
|
stc_ethernet_mac_mhtrh_field_t MHTRH_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MHTRL;
|
|
stc_ethernet_mac_mhtrl_field_t MHTRL_f;
|
|
};
|
|
union {
|
|
__IO uint32_t GAR;
|
|
stc_ethernet_mac_gar_field_t GAR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t GDR;
|
|
stc_ethernet_mac_gdr_field_t GDR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t FCR;
|
|
stc_ethernet_mac_fcr_field_t FCR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t VTR;
|
|
stc_ethernet_mac_vtr_field_t VTR_f;
|
|
};
|
|
uint8_t RESERVED0[8];
|
|
union {
|
|
__IO uint32_t RWFFR;
|
|
stc_ethernet_mac_rwffr_field_t RWFFR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PMTR;
|
|
stc_ethernet_mac_pmtr_field_t PMTR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t LPICSR;
|
|
stc_ethernet_mac_lpicsr_field_t LPICSR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t LPITCR;
|
|
stc_ethernet_mac_lpitcr_field_t LPITCR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t ISR;
|
|
stc_ethernet_mac_isr_field_t ISR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IMR;
|
|
stc_ethernet_mac_imr_field_t IMR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR0H;
|
|
stc_ethernet_mac_mar0h_field_t MAR0H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR0L;
|
|
stc_ethernet_mac_mar0l_field_t MAR0L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR1H;
|
|
stc_ethernet_mac_mar1h_field_t MAR1H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR1L;
|
|
stc_ethernet_mac_mar1l_field_t MAR1L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR2H;
|
|
stc_ethernet_mac_mar2h_field_t MAR2H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR2L;
|
|
stc_ethernet_mac_mar2l_field_t MAR2L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR3H;
|
|
stc_ethernet_mac_mar3h_field_t MAR3H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR3L;
|
|
stc_ethernet_mac_mar3l_field_t MAR3L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR4H;
|
|
stc_ethernet_mac_mar4h_field_t MAR4H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR4L;
|
|
stc_ethernet_mac_mar4l_field_t MAR4L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR5H;
|
|
stc_ethernet_mac_mar5h_field_t MAR5H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR5L;
|
|
stc_ethernet_mac_mar5l_field_t MAR5L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR6H;
|
|
stc_ethernet_mac_mar6h_field_t MAR6H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR6L;
|
|
stc_ethernet_mac_mar6l_field_t MAR6L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR7H;
|
|
stc_ethernet_mac_mar7h_field_t MAR7H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR7L;
|
|
stc_ethernet_mac_mar7l_field_t MAR7L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR8H;
|
|
stc_ethernet_mac_mar8h_field_t MAR8H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR8L;
|
|
stc_ethernet_mac_mar8l_field_t MAR8L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR9H;
|
|
stc_ethernet_mac_mar9h_field_t MAR9H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR9L;
|
|
stc_ethernet_mac_mar9l_field_t MAR9L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR10H;
|
|
stc_ethernet_mac_mar10h_field_t MAR10H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR10L;
|
|
stc_ethernet_mac_mar10l_field_t MAR10L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR11H;
|
|
stc_ethernet_mac_mar11h_field_t MAR11H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR11L;
|
|
stc_ethernet_mac_mar11l_field_t MAR11L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR12H;
|
|
stc_ethernet_mac_mar12h_field_t MAR12H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR12L;
|
|
stc_ethernet_mac_mar12l_field_t MAR12L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR13H;
|
|
stc_ethernet_mac_mar13h_field_t MAR13H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR13L;
|
|
stc_ethernet_mac_mar13l_field_t MAR13L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR14H;
|
|
stc_ethernet_mac_mar14h_field_t MAR14H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR14L;
|
|
stc_ethernet_mac_mar14l_field_t MAR14L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR15H;
|
|
stc_ethernet_mac_mar15h_field_t MAR15H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR15L;
|
|
stc_ethernet_mac_mar15l_field_t MAR15L_f;
|
|
};
|
|
uint8_t RESERVED1[24];
|
|
union {
|
|
__IO uint32_t RGSR;
|
|
stc_ethernet_mac_rgsr_field_t RGSR_f;
|
|
};
|
|
uint8_t RESERVED2[36];
|
|
__IO uint32_t mmc_cntl;
|
|
__IO uint32_t mmc_intr_rx;
|
|
__IO uint32_t mmc_intr_tx;
|
|
__IO uint32_t mmc_intr_mask_rx;
|
|
__IO uint32_t mmc_intr_mask_tx;
|
|
__IO uint32_t txoctetcount_gb;
|
|
__IO uint32_t txframecount_gb;
|
|
__IO uint32_t txbroadcastframes_g;
|
|
__IO uint32_t txmulticastframes_g;
|
|
__IO uint32_t tx64octets_gb;
|
|
__IO uint32_t tx65to127octets_gb;
|
|
__IO uint32_t tx128to255octets_gb;
|
|
__IO uint32_t tx256to511octets_gb;
|
|
__IO uint32_t tx512to1023octets_gb;
|
|
__IO uint32_t tx1024tomaxoctets_gb;
|
|
__IO uint32_t txunicastframes_gb;
|
|
__IO uint32_t txmulticastframes_gb;
|
|
__IO uint32_t txbroadcastframes_gb;
|
|
__IO uint32_t txunderflowerror;
|
|
__IO uint32_t txsinglecol_g;
|
|
__IO uint32_t txmulticol_g;
|
|
__IO uint32_t txdeferred;
|
|
__IO uint32_t txlatecol;
|
|
__IO uint32_t txexesscol;
|
|
__IO uint32_t txcarriererror;
|
|
__IO uint32_t txoctetcount_g;
|
|
__IO uint32_t txframecount_g;
|
|
__IO uint32_t txexecessdef_g;
|
|
__IO uint32_t txpauseframes;
|
|
__IO uint32_t txvlanframes_g;
|
|
uint8_t RESERVED3[8];
|
|
__IO uint32_t rxframecount_gb;
|
|
__IO uint32_t rxoctetcount_gb;
|
|
__IO uint32_t rxoctetcount_g;
|
|
__IO uint32_t rxbroadcastframes_g;
|
|
__IO uint32_t rxmulticastframes_g;
|
|
__IO uint32_t rxcrcerror;
|
|
__IO uint32_t rxallignmenterror;
|
|
__IO uint32_t rxrunterror;
|
|
__IO uint32_t rxjabbererror;
|
|
__IO uint32_t rxundersize_g;
|
|
__IO uint32_t rxoversize_g;
|
|
__IO uint32_t rx64octets_gb;
|
|
__IO uint32_t rx65to127octets_gb;
|
|
__IO uint32_t rx128to255octets_gb;
|
|
__IO uint32_t rx256to511octets_gb;
|
|
__IO uint32_t rx512to1023octets_gb;
|
|
__IO uint32_t rx1024tomaxoctets_gb;
|
|
__IO uint32_t rxunicastframes_g;
|
|
__IO uint32_t rxlengtherror;
|
|
__IO uint32_t rxoutofrangetype;
|
|
__IO uint32_t rxpauseframes;
|
|
__IO uint32_t rxfifooverflow;
|
|
__IO uint32_t rxvlanframes_gb;
|
|
__IO uint32_t rxwatchdogerror;
|
|
uint8_t RESERVED4[32];
|
|
__IO uint32_t mmc_ipc_intr_mask_rx;
|
|
uint8_t RESERVED5[4];
|
|
__IO uint32_t mmc_ipc_intr_rx;
|
|
uint8_t RESERVED6[4];
|
|
__IO uint32_t rxipv4_gd_frms;
|
|
__IO uint32_t rxipv4_hdrerr_frms;
|
|
__IO uint32_t rxipv4_nopay_frms;
|
|
__IO uint32_t rxipv4_frag_frms;
|
|
__IO uint32_t rxipv4_udsbl_frms;
|
|
__IO uint32_t rxipv6_gd_frms;
|
|
__IO uint32_t rxipv6_hdrerr_frms;
|
|
__IO uint32_t rxipv6_nopay_frms;
|
|
__IO uint32_t rxudp_gd_frms;
|
|
__IO uint32_t rxudp_err_frms;
|
|
__IO uint32_t rxtcp_gd_frms;
|
|
__IO uint32_t rxtcp_err_frms;
|
|
__IO uint32_t rxicmp_gd_frms;
|
|
__IO uint32_t rxicmp_err_frms;
|
|
uint8_t RESERVED7[8];
|
|
__IO uint32_t rxipv4_gd_octets;
|
|
__IO uint32_t rxipv4_hdrerr_octets;
|
|
__IO uint32_t rxipv4_nopay_octets;
|
|
__IO uint32_t rxipv4_frag_octets;
|
|
__IO uint32_t rxipv4_udsbl_octets;
|
|
__IO uint32_t rxipv6_gd_octets;
|
|
__IO uint32_t rxipv6_hdrerr_octets;
|
|
__IO uint32_t rxipv6_nopay_octets;
|
|
__IO uint32_t rxudp_gd_octets;
|
|
__IO uint32_t rxudp_err_octets;
|
|
__IO uint32_t rxtcp_gd_octets;
|
|
__IO uint32_t rxtcp_err_octets;
|
|
__IO uint32_t rxicmp_gd_octets;
|
|
__IO uint32_t rxicmp_err_octets;
|
|
uint8_t RESERVED8[1144];
|
|
union {
|
|
__IO uint32_t TSCR;
|
|
stc_ethernet_mac_tscr_field_t TSCR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t SSIR;
|
|
stc_ethernet_mac_ssir_field_t SSIR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t STSR;
|
|
stc_ethernet_mac_stsr_field_t STSR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t STNR;
|
|
stc_ethernet_mac_stnr_field_t STNR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t STSUR;
|
|
stc_ethernet_mac_stsur_field_t STSUR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t STNUR;
|
|
stc_ethernet_mac_stnur_field_t STNUR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t TSAR;
|
|
stc_ethernet_mac_tsar_field_t TSAR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t TTSR;
|
|
stc_ethernet_mac_ttsr_field_t TTSR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t TTNR;
|
|
stc_ethernet_mac_ttnr_field_t TTNR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t STHWSR;
|
|
stc_ethernet_mac_sthwsr_field_t STHWSR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t TSR;
|
|
stc_ethernet_mac_tsr_field_t TSR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t PPSCR;
|
|
stc_ethernet_mac_ppscr_field_t PPSCR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t ATNR;
|
|
stc_ethernet_mac_atnr_field_t ATNR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t ATSR;
|
|
stc_ethernet_mac_atsr_field_t ATSR_f;
|
|
};
|
|
uint8_t RESERVED9[200];
|
|
union {
|
|
__IO uint32_t MAR16H;
|
|
stc_ethernet_mac_mar16h_field_t MAR16H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR16L;
|
|
stc_ethernet_mac_mar16l_field_t MAR16L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR17H;
|
|
stc_ethernet_mac_mar17h_field_t MAR17H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR17L;
|
|
stc_ethernet_mac_mar17l_field_t MAR17L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR18H;
|
|
stc_ethernet_mac_mar18h_field_t MAR18H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR18L;
|
|
stc_ethernet_mac_mar18l_field_t MAR18L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR19H;
|
|
stc_ethernet_mac_mar19h_field_t MAR19H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR19L;
|
|
stc_ethernet_mac_mar19l_field_t MAR19L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR20H;
|
|
stc_ethernet_mac_mar20h_field_t MAR20H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR20L;
|
|
stc_ethernet_mac_mar20l_field_t MAR20L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR21H;
|
|
stc_ethernet_mac_mar21h_field_t MAR21H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR21L;
|
|
stc_ethernet_mac_mar21l_field_t MAR21L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR22H;
|
|
stc_ethernet_mac_mar22h_field_t MAR22H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR22L;
|
|
stc_ethernet_mac_mar22l_field_t MAR22L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR23H;
|
|
stc_ethernet_mac_mar23h_field_t MAR23H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR23L;
|
|
stc_ethernet_mac_mar23l_field_t MAR23L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR24H;
|
|
stc_ethernet_mac_mar24h_field_t MAR24H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR24L;
|
|
stc_ethernet_mac_mar24l_field_t MAR24L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR25H;
|
|
stc_ethernet_mac_mar25h_field_t MAR25H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR25L;
|
|
stc_ethernet_mac_mar25l_field_t MAR25L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR26H;
|
|
stc_ethernet_mac_mar26h_field_t MAR26H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR26L;
|
|
stc_ethernet_mac_mar26l_field_t MAR26L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR27H;
|
|
stc_ethernet_mac_mar27h_field_t MAR27H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR27L;
|
|
stc_ethernet_mac_mar27l_field_t MAR27L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR28H;
|
|
stc_ethernet_mac_mar28h_field_t MAR28H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR28L;
|
|
stc_ethernet_mac_mar28l_field_t MAR28L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR29H;
|
|
stc_ethernet_mac_mar29h_field_t MAR29H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR29L;
|
|
stc_ethernet_mac_mar29l_field_t MAR29L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR30H;
|
|
stc_ethernet_mac_mar30h_field_t MAR30H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR30L;
|
|
stc_ethernet_mac_mar30l_field_t MAR30L_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR31H;
|
|
stc_ethernet_mac_mar31h_field_t MAR31H_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MAR31L;
|
|
stc_ethernet_mac_mar31l_field_t MAR31L_f;
|
|
};
|
|
uint8_t RESERVED10[1920];
|
|
union {
|
|
__IO uint32_t BMR;
|
|
stc_ethernet_mac_bmr_field_t BMR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t TPDR;
|
|
stc_ethernet_mac_tpdr_field_t TPDR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t RPDR;
|
|
stc_ethernet_mac_rpdr_field_t RPDR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t RDLAR;
|
|
stc_ethernet_mac_rdlar_field_t RDLAR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t TDLAR;
|
|
stc_ethernet_mac_tdlar_field_t TDLAR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t SR;
|
|
stc_ethernet_mac_sr_field_t SR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t OMR;
|
|
stc_ethernet_mac_omr_field_t OMR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t IER;
|
|
stc_ethernet_mac_ier_field_t IER_f;
|
|
};
|
|
union {
|
|
__IO uint32_t MFBOCR;
|
|
stc_ethernet_mac_mfbocr_field_t MFBOCR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t RIWTR;
|
|
stc_ethernet_mac_riwtr_field_t RIWTR_f;
|
|
};
|
|
uint8_t RESERVED11[4];
|
|
union {
|
|
__IO uint32_t AHBSR;
|
|
stc_ethernet_mac_ahbsr_field_t AHBSR_f;
|
|
};
|
|
uint8_t RESERVED12[24];
|
|
union {
|
|
__IO uint32_t CHTDR;
|
|
stc_ethernet_mac_chtdr_field_t CHTDR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t CHRDR;
|
|
stc_ethernet_mac_chrdr_field_t CHRDR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t CHTBAR;
|
|
stc_ethernet_mac_chtbar_field_t CHTBAR_f;
|
|
};
|
|
union {
|
|
__IO uint32_t CHRBAR;
|
|
stc_ethernet_mac_chrbar_field_t CHRBAR_f;
|
|
};
|
|
}FM3_ETHERNET_MAC_TypeDef;
|
|
|
|
/* ETHERNET-CONTROL registers */
|
|
typedef struct
|
|
{
|
|
union {
|
|
__IO uint32_t ETH_MODE;
|
|
stc_ethernet_control_eth_mode_field_t ETH_MODE_f;
|
|
};
|
|
uint8_t RESERVED1[4];
|
|
union {
|
|
__IO uint32_t ETH_CLKG;
|
|
stc_ethernet_control_eth_clkg_field_t ETH_CLKG_f;
|
|
};
|
|
}FM3_ETHERNET_CONTROL_TypeDef;
|
|
|
|
/******************************************************************************
|
|
* Peripheral memory map
|
|
******************************************************************************/
|
|
#define FM3_FLASH_BASE (0x00000000UL) /* Flash Base */
|
|
#define FM3_PERIPH_BASE (0x40000000UL) /* Peripheral Base */
|
|
#define FM3_CM3_BASE (0xE0100000UL) /* CM3 Private */
|
|
|
|
#define FM3_FLASH_IF_BASE (FM3_PERIPH_BASE + 0x00000UL) /* Flash interface registers */
|
|
#define FM3_CRG_BASE (FM3_PERIPH_BASE + 0x10000UL) /* Clock and reset registers */
|
|
#define FM3_HWWDT_BASE (FM3_PERIPH_BASE + 0x11000UL) /* Hardware watchdog registers */
|
|
#define FM3_SWWDT_BASE (FM3_PERIPH_BASE + 0x12000UL) /* Software watchdog registers */
|
|
#define FM3_DTIM_BASE (FM3_PERIPH_BASE + 0x15000UL) /* Dual timer 1/2 registers */
|
|
#define FM3_MFT0_FRT_BASE (FM3_PERIPH_BASE + 0x20000UL) /* Multifunction Timer unit 0 Free Running Timer registers */
|
|
#define FM3_MFT0_OCU_BASE (FM3_PERIPH_BASE + 0x20000UL) /* Multifunction Timer unit 0 Output Compare Unit registers */
|
|
#define FM3_MFT0_WFG_BASE (FM3_PERIPH_BASE + 0x20000UL) /* Multifunction Timer unit 0 Waveform Generator and Noise Canceler registers */
|
|
#define FM3_MFT0_ICU_BASE (FM3_PERIPH_BASE + 0x20000UL) /* Multifunction Timer unit 0 Input Capture Unit registers */
|
|
#define FM3_MFT0_ADCMP_BASE (FM3_PERIPH_BASE + 0x20000UL) /* Multifunction Timer unit 0 ADC Start Compare Unit registers */
|
|
#define FM3_MFT1_FRT_BASE (FM3_PERIPH_BASE + 0x21000UL) /* Multifunction Timer unit 1 Free Running Timer registers */
|
|
#define FM3_MFT1_OCU_BASE (FM3_PERIPH_BASE + 0x21000UL) /* Multifunction Timer unit 1 Output Compare Unit registers */
|
|
#define FM3_MFT1_WFG_BASE (FM3_PERIPH_BASE + 0x21000UL) /* Multifunction Timer unit 1 Waveform Generator and Noise Canceler registers */
|
|
#define FM3_MFT1_ICU_BASE (FM3_PERIPH_BASE + 0x21000UL) /* Multifunction Timer unit 1 Input Capture Unit registers */
|
|
#define FM3_MFT1_ADCMP_BASE (FM3_PERIPH_BASE + 0x21000UL) /* Multifunction Timer unit 1 ADC Start Compare Unit registers */
|
|
#define FM3_MFT2_FRT_BASE (FM3_PERIPH_BASE + 0x22000UL) /* Multifunction Timer unit 2 Free Running Timer registers */
|
|
#define FM3_MFT2_OCU_BASE (FM3_PERIPH_BASE + 0x22000UL) /* Multifunction Timer unit 2 Output Compare Unit registers */
|
|
#define FM3_MFT2_WFG_BASE (FM3_PERIPH_BASE + 0x22000UL) /* Multifunction Timer unit 2 Waveform Generator and Noise Canceler registers */
|
|
#define FM3_MFT2_ICU_BASE (FM3_PERIPH_BASE + 0x22000UL) /* Multifunction Timer unit 2 Input Capture Unit registers */
|
|
#define FM3_MFT2_ADCMP_BASE (FM3_PERIPH_BASE + 0x22000UL) /* Multifunction Timer unit 2 ADC Start Compare Unit registers */
|
|
#define FM3_MFT_PPG_BASE (FM3_PERIPH_BASE + 0x24000UL) /* Multifunction Timer PPG registers */
|
|
#define FM3_BT0_PPG_BASE (FM3_PERIPH_BASE + 0x25000UL) /* Base Timer 0 PPG registers */
|
|
#define FM3_BT0_PWM_BASE (FM3_PERIPH_BASE + 0x25000UL) /* Base Timer 0 PWM registers */
|
|
#define FM3_BT0_RT_BASE (FM3_PERIPH_BASE + 0x25000UL) /* Base Timer 0 RT registers */
|
|
#define FM3_BT0_PWC_BASE (FM3_PERIPH_BASE + 0x25000UL) /* Base Timer 0 PWC registers */
|
|
#define FM3_BT1_PPG_BASE (FM3_PERIPH_BASE + 0x25040UL) /* Base Timer 1 PPG registers */
|
|
#define FM3_BT1_PWM_BASE (FM3_PERIPH_BASE + 0x25040UL) /* Base Timer 1 PWM registers */
|
|
#define FM3_BT1_RT_BASE (FM3_PERIPH_BASE + 0x25040UL) /* Base Timer 1 RT registers */
|
|
#define FM3_BT1_PWC_BASE (FM3_PERIPH_BASE + 0x25040UL) /* Base Timer 1 PWC registers */
|
|
#define FM3_BT2_PPG_BASE (FM3_PERIPH_BASE + 0x25080UL) /* Base Timer 2 PPG registers */
|
|
#define FM3_BT2_PWM_BASE (FM3_PERIPH_BASE + 0x25080UL) /* Base Timer 2 PWM registers */
|
|
#define FM3_BT2_RT_BASE (FM3_PERIPH_BASE + 0x25080UL) /* Base Timer 2 RT registers */
|
|
#define FM3_BT2_PWC_BASE (FM3_PERIPH_BASE + 0x25080UL) /* Base Timer 2 PWC registers */
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#define FM3_BT3_PPG_BASE (FM3_PERIPH_BASE + 0x250C0UL) /* Base Timer 3 PPG registers */
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#define FM3_BT3_PWM_BASE (FM3_PERIPH_BASE + 0x250C0UL) /* Base Timer 3 PWM registers */
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#define FM3_BT3_RT_BASE (FM3_PERIPH_BASE + 0x250C0UL) /* Base Timer 3 RT registers */
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#define FM3_BT3_PWC_BASE (FM3_PERIPH_BASE + 0x250C0UL) /* Base Timer 3 PWC registers */
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#define FM3_BT4_PPG_BASE (FM3_PERIPH_BASE + 0x25200UL) /* Base Timer 4 PPG registers */
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#define FM3_BT4_PWM_BASE (FM3_PERIPH_BASE + 0x25200UL) /* Base Timer 4 PWM registers */
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#define FM3_BT4_RT_BASE (FM3_PERIPH_BASE + 0x25200UL) /* Base Timer 4 RT registers */
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#define FM3_BT4_PWC_BASE (FM3_PERIPH_BASE + 0x25200UL) /* Base Timer 4 PWC registers */
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#define FM3_BT5_PPG_BASE (FM3_PERIPH_BASE + 0x25240UL) /* Base Timer 5 PPG registers */
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#define FM3_BT5_PWM_BASE (FM3_PERIPH_BASE + 0x25240UL) /* Base Timer 5 PWM registers */
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#define FM3_BT5_RT_BASE (FM3_PERIPH_BASE + 0x25240UL) /* Base Timer 5 RT registers */
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#define FM3_BT5_PWC_BASE (FM3_PERIPH_BASE + 0x25240UL) /* Base Timer 5 PWC registers */
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#define FM3_BT6_PPG_BASE (FM3_PERIPH_BASE + 0x25280UL) /* Base Timer 6 PPG registers */
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#define FM3_BT6_PWM_BASE (FM3_PERIPH_BASE + 0x25280UL) /* Base Timer 6 PWM registers */
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#define FM3_BT6_RT_BASE (FM3_PERIPH_BASE + 0x25280UL) /* Base Timer 6 RT registers */
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#define FM3_BT6_PWC_BASE (FM3_PERIPH_BASE + 0x25280UL) /* Base Timer 6 PWC registers */
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#define FM3_BT7_PPG_BASE (FM3_PERIPH_BASE + 0x252C0UL) /* Base Timer 7 PPG registers */
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#define FM3_BT7_PWM_BASE (FM3_PERIPH_BASE + 0x252C0UL) /* Base Timer 7 PWM registers */
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#define FM3_BT7_RT_BASE (FM3_PERIPH_BASE + 0x252C0UL) /* Base Timer 7 RT registers */
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#define FM3_BT7_PWC_BASE (FM3_PERIPH_BASE + 0x252C0UL) /* Base Timer 7 PWC registers */
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#define FM3_BTIOSEL03_BASE (FM3_PERIPH_BASE + 0x25100UL) /* Base Timer I/O selector channel 0 - channel 3 registers */
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#define FM3_BTIOSEL47_BASE (FM3_PERIPH_BASE + 0x25300UL) /* Base Timer I/O selector channel 4 - channel 7 registers */
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#define FM3_BT8_PPG_BASE (FM3_PERIPH_BASE + 0x25400UL) /* Base Timer 8 PPG registers */
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#define FM3_BT8_PWM_BASE (FM3_PERIPH_BASE + 0x25400UL) /* Base Timer 8 PWM registers */
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#define FM3_BT8_RT_BASE (FM3_PERIPH_BASE + 0x25400UL) /* Base Timer 8 RT registers */
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#define FM3_BT8_PWC_BASE (FM3_PERIPH_BASE + 0x25400UL) /* Base Timer 8 PWC registers */
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#define FM3_BT9_PPG_BASE (FM3_PERIPH_BASE + 0x25440UL) /* Base Timer 9 PPG registers */
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#define FM3_BT9_PWM_BASE (FM3_PERIPH_BASE + 0x25440UL) /* Base Timer 9 PWM registers */
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#define FM3_BT9_RT_BASE (FM3_PERIPH_BASE + 0x25440UL) /* Base Timer 9 RT registers */
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#define FM3_BT9_PWC_BASE (FM3_PERIPH_BASE + 0x25440UL) /* Base Timer 9 PWC registers */
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#define FM3_BT10_PPG_BASE (FM3_PERIPH_BASE + 0x25480UL) /* Base Timer 10 PPG registers */
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#define FM3_BT10_PWM_BASE (FM3_PERIPH_BASE + 0x25480UL) /* Base Timer 10 PWM registers */
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#define FM3_BT10_RT_BASE (FM3_PERIPH_BASE + 0x25480UL) /* Base Timer 10 RT registers */
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#define FM3_BT10_PWC_BASE (FM3_PERIPH_BASE + 0x25480UL) /* Base Timer 10 PWC registers */
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#define FM3_BT11_PPG_BASE (FM3_PERIPH_BASE + 0x254C0UL) /* Base Timer 11 PPG registers */
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#define FM3_BT11_PWM_BASE (FM3_PERIPH_BASE + 0x254C0UL) /* Base Timer 11 PWM registers */
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#define FM3_BT11_RT_BASE (FM3_PERIPH_BASE + 0x254C0UL) /* Base Timer 11 RT registers */
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#define FM3_BT11_PWC_BASE (FM3_PERIPH_BASE + 0x254C0UL) /* Base Timer 11 PWC registers */
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#define FM3_BT12_PPG_BASE (FM3_PERIPH_BASE + 0x25600UL) /* Base Timer 8 PPG registers */
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#define FM3_BT12_PWM_BASE (FM3_PERIPH_BASE + 0x25600UL) /* Base Timer 8 PWM registers */
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#define FM3_BT12_RT_BASE (FM3_PERIPH_BASE + 0x25600UL) /* Base Timer 8 RT registers */
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#define FM3_BT12_PWC_BASE (FM3_PERIPH_BASE + 0x25600UL) /* Base Timer 8 PWC registers */
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#define FM3_BT13_PPG_BASE (FM3_PERIPH_BASE + 0x25640UL) /* Base Timer 9 PPG registers */
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#define FM3_BT13_PWM_BASE (FM3_PERIPH_BASE + 0x25640UL) /* Base Timer 9 PWM registers */
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#define FM3_BT13_RT_BASE (FM3_PERIPH_BASE + 0x25640UL) /* Base Timer 9 RT registers */
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#define FM3_BT13_PWC_BASE (FM3_PERIPH_BASE + 0x25640UL) /* Base Timer 9 PWC registers */
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#define FM3_BT14_PPG_BASE (FM3_PERIPH_BASE + 0x25680UL) /* Base Timer 10 PPG registers */
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#define FM3_BT14_PWM_BASE (FM3_PERIPH_BASE + 0x25680UL) /* Base Timer 10 PWM registers */
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#define FM3_BT14_RT_BASE (FM3_PERIPH_BASE + 0x25680UL) /* Base Timer 10 RT registers */
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#define FM3_BT14_PWC_BASE (FM3_PERIPH_BASE + 0x25680UL) /* Base Timer 10 PWC registers */
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#define FM3_BT15_PPG_BASE (FM3_PERIPH_BASE + 0x256C0UL) /* Base Timer 11 PPG registers */
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#define FM3_BT15_PWM_BASE (FM3_PERIPH_BASE + 0x256C0UL) /* Base Timer 11 PWM registers */
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#define FM3_BT15_RT_BASE (FM3_PERIPH_BASE + 0x256C0UL) /* Base Timer 11 RT registers */
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#define FM3_BT15_PWC_BASE (FM3_PERIPH_BASE + 0x256C0UL) /* Base Timer 11 PWC registers */
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#define FM3_BTIOSEL8B_BASE (FM3_PERIPH_BASE + 0x25500UL) /* Base Timer I/O selector channel 8 - channel 11 registers */
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#define FM3_BTIOSELCF_BASE (FM3_PERIPH_BASE + 0x25700UL) /* Base Timer I/O selector channel 12 - channel 15 registers */
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#define FM3_SBSSR_BASE (FM3_PERIPH_BASE + 0x25FFCUL) /* Software based Simulation Startup (Base Timer) register */
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#define FM3_QPRC0_BASE (FM3_PERIPH_BASE + 0x26000UL) /* Quad position and revolution counter channel 0 registers */
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#define FM3_QPRC1_BASE (FM3_PERIPH_BASE + 0x26040UL) /* Quad position and revolution counter channel 1 registers */
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#define FM3_QPRC2_BASE (FM3_PERIPH_BASE + 0x26080UL) /* Quad position and revolution counter channel 2 registers */
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#define FM3_ADC0_BASE (FM3_PERIPH_BASE + 0x27000UL) /* 12-bit ADC unit 0 registers */
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#define FM3_ADC1_BASE (FM3_PERIPH_BASE + 0x27100UL) /* 12-bit ADC unit 1 registers */
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#define FM3_ADC2_BASE (FM3_PERIPH_BASE + 0x27200UL) /* 12-bit ADC unit 2 registers */
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#define FM3_CRTRIM_BASE (FM3_PERIPH_BASE + 0x2E000UL) /* CR trimming registers */
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#define FM3_EXTI_BASE (FM3_PERIPH_BASE + 0x30000UL) /* External interrupt registers */
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#define FM3_INTREQ_BASE (FM3_PERIPH_BASE + 0x31000UL) /* Interrupt request read registers */
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#define FM3_GPIO_BASE (FM3_PERIPH_BASE + 0x33000UL) /* General purpose I/O registers */
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#define FM3_LVD_BASE (FM3_PERIPH_BASE + 0x35000UL) /* Low voltage detection registers */
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#define FM3_USBETHERNETCLK_BASE (FM3_PERIPH_BASE + 0x36000UL) /* USB clock registers */
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#define FM3_MFS0_UART_BASE (FM3_PERIPH_BASE + 0x38000UL) /* UART asynchronous channel 0 registers */
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#define FM3_MFS0_CSIO_BASE (FM3_PERIPH_BASE + 0x38000UL) /* UART synchronous channel 0 registers */
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#define FM3_MFS0_LIN_BASE (FM3_PERIPH_BASE + 0x38000UL) /* UART LIN channel 0 registers */
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#define FM3_MFS0_I2C_BASE (FM3_PERIPH_BASE + 0x38000UL) /* I2C channel 0 registers */
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#define FM3_MFS1_UART_BASE (FM3_PERIPH_BASE + 0x38100UL) /* UART asynchronous channel 1 registers */
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#define FM3_MFS1_CSIO_BASE (FM3_PERIPH_BASE + 0x38100UL) /* UART synchronous channel 1 registers */
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#define FM3_MFS1_LIN_BASE (FM3_PERIPH_BASE + 0x38100UL) /* UART LIN channel 1 registers */
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#define FM3_MFS1_I2C_BASE (FM3_PERIPH_BASE + 0x38100UL) /* I2C channel 1 registers */
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#define FM3_MFS2_UART_BASE (FM3_PERIPH_BASE + 0x38200UL) /* UART asynchronous channel 2 registers */
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#define FM3_MFS2_CSIO_BASE (FM3_PERIPH_BASE + 0x38200UL) /* UART synchronous channel 2 registers */
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#define FM3_MFS2_LIN_BASE (FM3_PERIPH_BASE + 0x38200UL) /* UART LIN channel 2 registers */
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#define FM3_MFS2_I2C_BASE (FM3_PERIPH_BASE + 0x38200UL) /* I2C channel 2 registers */
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#define FM3_MFS3_UART_BASE (FM3_PERIPH_BASE + 0x38300UL) /* UART asynchronous channel 3 registers */
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#define FM3_MFS3_CSIO_BASE (FM3_PERIPH_BASE + 0x38300UL) /* UART synchronous channel 3 registers */
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#define FM3_MFS3_LIN_BASE (FM3_PERIPH_BASE + 0x38300UL) /* UART LIN channel 3 registers */
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#define FM3_MFS3_I2C_BASE (FM3_PERIPH_BASE + 0x38300UL) /* I2C channel 3 registers */
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#define FM3_MFS4_UART_BASE (FM3_PERIPH_BASE + 0x38400UL) /* UART asynchronous channel 4 registers */
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#define FM3_MFS4_CSIO_BASE (FM3_PERIPH_BASE + 0x38400UL) /* UART synchronous channel 4 registers */
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#define FM3_MFS4_LIN_BASE (FM3_PERIPH_BASE + 0x38400UL) /* UART LIN channel 4 registers */
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#define FM3_MFS4_I2C_BASE (FM3_PERIPH_BASE + 0x38400UL) /* I2C channel 4 registers */
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#define FM3_MFS5_UART_BASE (FM3_PERIPH_BASE + 0x38500UL) /* UART asynchronous channel 5 registers */
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#define FM3_MFS5_CSIO_BASE (FM3_PERIPH_BASE + 0x38500UL) /* UART synchronous channel 5 registers */
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#define FM3_MFS5_LIN_BASE (FM3_PERIPH_BASE + 0x38500UL) /* UART LIN channel 5 registers */
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#define FM3_MFS5_I2C_BASE (FM3_PERIPH_BASE + 0x38500UL) /* I2C channel 5 registers */
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#define FM3_MFS6_UART_BASE (FM3_PERIPH_BASE + 0x38600UL) /* UART asynchronous channel 6 registers */
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#define FM3_MFS6_CSIO_BASE (FM3_PERIPH_BASE + 0x38600UL) /* UART synchronous channel 6 registers */
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#define FM3_MFS6_LIN_BASE (FM3_PERIPH_BASE + 0x38600UL) /* UART LIN channel 6 registers */
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#define FM3_MFS6_I2C_BASE (FM3_PERIPH_BASE + 0x38600UL) /* I2C channel 6 registers */
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#define FM3_MFS7_UART_BASE (FM3_PERIPH_BASE + 0x38700UL) /* UART asynchronous channel 7 registers */
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#define FM3_MFS7_CSIO_BASE (FM3_PERIPH_BASE + 0x38700UL) /* UART synchronous channel 7 registers */
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#define FM3_MFS7_LIN_BASE (FM3_PERIPH_BASE + 0x38700UL) /* UART LIN channel 7 registers */
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#define FM3_MFS7_I2C_BASE (FM3_PERIPH_BASE + 0x38700UL) /* I2C channel 7 registers */
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#define FM3_MFS_NFC_BASE (FM3_PERIPH_BASE + 0x38800UL) /* MFS Noise Filter Control register */
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#define FM3_CRC_BASE (FM3_PERIPH_BASE + 0x39000UL) /* CRC registers */
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#define FM3_WC_BASE (FM3_PERIPH_BASE + 0x3A000UL) /* Watch counter registers */
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#define FM3_EXBUS_BASE (FM3_PERIPH_BASE + 0x3F000UL) /* External bus interface registers */
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#define FM3_USB0_BASE (FM3_PERIPH_BASE + 0x42100UL) /* USB channel 0 registers */
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#define FM3_USB1_BASE (FM3_PERIPH_BASE + 0x52100UL) /* USB channel 1 registers */
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#define FM3_DMAC_BASE (FM3_PERIPH_BASE + 0x60000UL) /* DMA controller */
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#define FM3_ETHERNET_MAC0_BASE (FM3_PERIPH_BASE + 0x64000UL) /* Ethernet MAC 0 registers */
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#define FM3_ETHERNET_CONTROL_BASE (FM3_PERIPH_BASE + 0x66000UL) /* Ethernet MAC control registers */
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#define FM3_ETHERNET_MAC1_BASE (FM3_PERIPH_BASE + 0x67000UL) /* Ethernet MAC 1 registers */
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/******************************************************************************
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* Peripheral declaration
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******************************************************************************/
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#define FM3_FLASH_IF ((FM3_FLASH_IF_TypeDef *)FM3_FLASH_IF_BASE)
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#define FM3_CRG ((FM3_CRG_TypeDef *)FM3_CRG_BASE)
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#define FM3_HWWDT ((FM3_HWWDT_TypeDef *)FM3_HWWDT_BASE)
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#define FM3_SWWDT ((FM3_SWWDT_TypeDef *)FM3_SWWDT_BASE)
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#define FM3_DTIM ((FM3_DTIM_TypeDef *)FM3_DTIM_BASE)
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#define FM3_MFT0_FRT ((FM3_MFT_FRT_TypeDef *)FM3_MFT0_FRT_BASE)
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#define FM3_MFT0_OCU ((FM3_MFT_OCU_TypeDef *)FM3_MFT0_OCU_BASE)
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#define FM3_MFT0_WFG ((FM3_MFT_WFG_TypeDef *)FM3_MFT0_WFG_BASE)
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#define FM3_MFT0_ICU ((FM3_MFT_ICU_TypeDef *)FM3_MFT0_ICU_BASE)
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#define FM3_MFT0_ADCMP ((FM3_MFT_ADCMP_TypeDef *)FM3_MFT0_ADCMP_BASE)
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#define FM3_MFT1_FRT ((FM3_MFT_FRT_TypeDef *)FM3_MFT1_FRT_BASE)
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#define FM3_MFT1_OCU ((FM3_MFT_OCU_TypeDef *)FM3_MFT1_OCU_BASE)
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#define FM3_MFT1_WFG ((FM3_MFT_WFG_TypeDef *)FM3_MFT1_WFG_BASE)
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#define FM3_MFT1_ICU ((FM3_MFT_ICU_TypeDef *)FM3_MFT1_ICU_BASE)
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#define FM3_MFT1_ADCMP ((FM3_MFT_ADCMP_TypeDef *)FM3_MFT1_ADCMP_BASE)
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#define FM3_MFT2_FRT ((FM3_MFT_FRT_TypeDef *)FM3_MFT2_FRT_BASE)
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#define FM3_MFT2_OCU ((FM3_MFT_OCU_TypeDef *)FM3_MFT2_OCU_BASE)
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#define FM3_MFT2_WFG ((FM3_MFT_WFG_TypeDef *)FM3_MFT2_WFG_BASE)
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#define FM3_MFT2_ICU ((FM3_MFT_ICU_TypeDef *)FM3_MFT2_ICU_BASE)
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#define FM3_MFT2_ADCMP ((FM3_MFT_ADCMP_TypeDef *)FM3_MFT2_ADCMP_BASE)
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#define FM3_MFT_PPG ((FM3_MFT_PPG_TypeDef *)FM3_MFT_PPG_BASE)
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#define FM3_BT0_PPG ((FM3_BT_PPG_TypeDef *)FM3_BT0_PPG_BASE)
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#define FM3_BT0_PWM ((FM3_BT_PWM_TypeDef *)FM3_BT0_PWM_BASE)
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#define FM3_BT0_RT ((FM3_BT_RT_TypeDef *)FM3_BT0_RT_BASE)
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#define FM3_BT0_PWC ((FM3_BT_PWC_TypeDef *)FM3_BT0_PWC_BASE)
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#define FM3_BT1_PPG ((FM3_BT_PPG_TypeDef *)FM3_BT1_PPG_BASE)
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#define FM3_BT1_PWM ((FM3_BT_PWM_TypeDef *)FM3_BT1_PWM_BASE)
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#define FM3_BT1_RT ((FM3_BT_RT_TypeDef *)FM3_BT1_RT_BASE)
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#define FM3_BT1_PWC ((FM3_BT_PWC_TypeDef *)FM3_BT1_PWC_BASE)
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#define FM3_BT2_PPG ((FM3_BT_PPG_TypeDef *)FM3_BT2_PPG_BASE)
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#define FM3_BT2_PWM ((FM3_BT_PWM_TypeDef *)FM3_BT2_PWM_BASE)
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#define FM3_BT2_RT ((FM3_BT_RT_TypeDef *)FM3_BT2_RT_BASE)
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#define FM3_BT2_PWC ((FM3_BT_PWC_TypeDef *)FM3_BT2_PWC_BASE)
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#define FM3_BT3_PPG ((FM3_BT_PPG_TypeDef *)FM3_BT3_PPG_BASE)
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#define FM3_BT3_PWM ((FM3_BT_PWM_TypeDef *)FM3_BT3_PWM_BASE)
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#define FM3_BT3_RT ((FM3_BT_RT_TypeDef *)FM3_BT3_RT_BASE)
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#define FM3_BT3_PWC ((FM3_BT_PWC_TypeDef *)FM3_BT3_PWC_BASE)
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#define FM3_BT4_PPG ((FM3_BT_PPG_TypeDef *)FM3_BT4_PPG_BASE)
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#define FM3_BT4_PWM ((FM3_BT_PWM_TypeDef *)FM3_BT4_PWM_BASE)
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#define FM3_BT4_RT ((FM3_BT_RT_TypeDef *)FM3_BT4_RT_BASE)
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#define FM3_BT4_PWC ((FM3_BT_PWC_TypeDef *)FM3_BT4_PWC_BASE)
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#define FM3_BT5_PPG ((FM3_BT_PPG_TypeDef *)FM3_BT5_PPG_BASE)
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#define FM3_BT5_PWM ((FM3_BT_PWM_TypeDef *)FM3_BT5_PWM_BASE)
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#define FM3_BT5_RT ((FM3_BT_RT_TypeDef *)FM3_BT5_RT_BASE)
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#define FM3_BT5_PWC ((FM3_BT_PWC_TypeDef *)FM3_BT5_PWC_BASE)
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#define FM3_BT6_PPG ((FM3_BT_PPG_TypeDef *)FM3_BT6_PPG_BASE)
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#define FM3_BT6_PWM ((FM3_BT_PWM_TypeDef *)FM3_BT6_PWM_BASE)
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#define FM3_BT6_RT ((FM3_BT_RT_TypeDef *)FM3_BT6_RT_BASE)
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#define FM3_BT6_PWC ((FM3_BT_PWC_TypeDef *)FM3_BT6_PWC_BASE)
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#define FM3_BT7_PPG ((FM3_BT_PPG_TypeDef *)FM3_BT7_PPG_BASE)
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#define FM3_BT7_PWM ((FM3_BT_PWM_TypeDef *)FM3_BT7_PWM_BASE)
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#define FM3_BT7_RT ((FM3_BT_RT_TypeDef *)FM3_BT7_RT_BASE)
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#define FM3_BT7_PWC ((FM3_BT_PWC_TypeDef *)FM3_BT7_PWC_BASE)
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#define FM3_BTIOSEL03 ((FM3_BTIOSEL03_TypeDef *)FM3_BTIOSEL03_BASE)
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#define FM3_BTIOSEL47 ((FM3_BTIOSEL47_TypeDef *)FM3_BTIOSEL47_BASE)
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#define FM3_BT8_PPG ((FM3_BT_PPG_TypeDef *)FM3_BT8_PPG_BASE)
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#define FM3_BT8_PWM ((FM3_BT_PWM_TypeDef *)FM3_BT8_PWM_BASE)
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#define FM3_BT8_RT ((FM3_BT_RT_TypeDef *)FM3_BT8_RT_BASE)
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#define FM3_BT8_PWC ((FM3_BT_PWC_TypeDef *)FM3_BT8_PWC_BASE)
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#define FM3_BT9_PPG ((FM3_BT_PPG_TypeDef *)FM3_BT9_PPG_BASE)
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#define FM3_BT9_PWM ((FM3_BT_PWM_TypeDef *)FM3_BT9_PWM_BASE)
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#define FM3_BT9_RT ((FM3_BT_RT_TypeDef *)FM3_BT9_RT_BASE)
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#define FM3_BT9_PWC ((FM3_BT_PWC_TypeDef *)FM3_BT9_PWC_BASE)
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#define FM3_BT10_PPG ((FM3_BT_PPG_TypeDef *)FM3_BT10_PPG_BASE)
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#define FM3_BT10_PWM ((FM3_BT_PWM_TypeDef *)FM3_BT10_PWM_BASE)
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#define FM3_BT10_RT ((FM3_BT_RT_TypeDef *)FM3_BT10_RT_BASE)
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#define FM3_BT10_PWC ((FM3_BT_PWC_TypeDef *)FM3_BT10_PWC_BASE)
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#define FM3_BT11_PPG ((FM3_BT_PPG_TypeDef *)FM3_BT11_PPG_BASE)
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#define FM3_BT11_PWM ((FM3_BT_PWM_TypeDef *)FM3_BT11_PWM_BASE)
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#define FM3_BT11_RT ((FM3_BT_RT_TypeDef *)FM3_BT11_RT_BASE)
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#define FM3_BT11_PWC ((FM3_BT_PWC_TypeDef *)FM3_BT11_PWC_BASE)
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#define FM3_BT12_PPG ((FM3_BT_PPG_TypeDef *)FM3_BT12_PPG_BASE)
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#define FM3_BT12_PWM ((FM3_BT_PWM_TypeDef *)FM3_BT12_PWM_BASE)
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#define FM3_BT12_RT ((FM3_BT_RT_TypeDef *)FM3_BT12_RT_BASE)
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#define FM3_BT12_PWC ((FM3_BT_PWC_TypeDef *)FM3_BT12_PWC_BASE)
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#define FM3_BT13_PPG ((FM3_BT_PPG_TypeDef *)FM3_BT13_PPG_BASE)
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#define FM3_BT13_PWM ((FM3_BT_PWM_TypeDef *)FM3_BT13_PWM_BASE)
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#define FM3_BT13_RT ((FM3_BT_RT_TypeDef *)FM3_BT13_RT_BASE)
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#define FM3_BT13_PWC ((FM3_BT_PWC_TypeDef *)FM3_BT13_PWC_BASE)
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#define FM3_BT14_PPG ((FM3_BT_PPG_TypeDef *)FM3_BT14_PPG_BASE)
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#define FM3_BT14_PWM ((FM3_BT_PWM_TypeDef *)FM3_BT14_PWM_BASE)
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#define FM3_BT14_RT ((FM3_BT_RT_TypeDef *)FM3_BT14_RT_BASE)
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#define FM3_BT14_PWC ((FM3_BT_PWC_TypeDef *)FM3_BT14_PWC_BASE)
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#define FM3_BT15_PPG ((FM3_BT_PPG_TypeDef *)FM3_BT15_PPG_BASE)
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|
#define FM3_BT15_PWM ((FM3_BT_PWM_TypeDef *)FM3_BT15_PWM_BASE)
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|
#define FM3_BT15_RT ((FM3_BT_RT_TypeDef *)FM3_BT15_RT_BASE)
|
|
#define FM3_BT15_PWC ((FM3_BT_PWC_TypeDef *)FM3_BT15_PWC_BASE)
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|
#define FM3_BTIOSEL8B ((FM3_BTIOSEL8B_TypeDef *)FM3_BTIOSEL8B_BASE)
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|
#define FM3_BTIOSELCF ((FM3_BTIOSELCF_TypeDef *)FM3_BTIOSELCF_BASE)
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|
#define FM3_SBSSR ((FM3_SBSSR_TypeDef *)FM3_SBSSR_BASE)
|
|
#define FM3_QPRC0 ((FM3_QPRC_TypeDef *)FM3_QPRC0_BASE)
|
|
#define FM3_QPRC1 ((FM3_QPRC_TypeDef *)FM3_QPRC1_BASE)
|
|
#define FM3_QPRC3 ((FM3_QPRC_TypeDef *)FM3_QPRC2_BASE)
|
|
#define FM3_ADC0 ((FM3_ADC_TypeDef *)FM3_ADC0_BASE)
|
|
#define FM3_ADC1 ((FM3_ADC_TypeDef *)FM3_ADC1_BASE)
|
|
#define FM3_ADC2 ((FM3_ADC_TypeDef *)FM3_ADC2_BASE)
|
|
#define FM3_CRTRIM ((FM3_CRTRIM_TypeDef *)FM3_CRTRIM_BASE)
|
|
#define FM3_EXTI ((FM3_EXTI_TypeDef *)FM3_EXTI_BASE)
|
|
#define FM3_INTREQ ((FM3_INTREQ_TypeDef *)FM3_INTREQ_BASE)
|
|
#define FM3_GPIO ((FM3_GPIO_TypeDef *)FM3_GPIO_BASE)
|
|
#define FM3_LVD ((FM3_LVD_TypeDef *)FM3_LVD_BASE)
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|
#define FM3_USBETHERNETCLK ((FM3_USBETHERNETCLK_TypeDef *)FM3_USBETHERNETCLK_BASE)
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#define FM3_MFS0_UART ((FM3_MFS03_UART_TypeDef *)FM3_MFS0_UART_BASE)
|
|
#define FM3_MFS0_CSIO ((FM3_MFS03_CSIO_TypeDef *)FM3_MFS0_CSIO_BASE)
|
|
#define FM3_MFS0_LIN ((FM3_MFS03_LIN_TypeDef *)FM3_MFS0_LIN_BASE)
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|
#define FM3_MFS0_I2C ((FM3_MFS03_I2C_TypeDef *)FM3_MFS0_I2C_BASE)
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#define FM3_MFS1_UART ((FM3_MFS03_UART_TypeDef *)FM3_MFS1_UART_BASE)
|
|
#define FM3_MFS1_CSIO ((FM3_MFS03_CSIO_TypeDef *)FM3_MFS1_CSIO_BASE)
|
|
#define FM3_MFS1_LIN ((FM3_MFS03_LIN_TypeDef *)FM3_MFS1_LIN_BASE)
|
|
#define FM3_MFS1_I2C ((FM3_MFS03_I2C_TypeDef *)FM3_MFS1_I2C_BASE)
|
|
#define FM3_MFS2_UART ((FM3_MFS03_UART_TypeDef *)FM3_MFS2_UART_BASE)
|
|
#define FM3_MFS2_CSIO ((FM3_MFS03_CSIO_TypeDef *)FM3_MFS2_CSIO_BASE)
|
|
#define FM3_MFS2_LIN ((FM3_MFS03_LIN_TypeDef *)FM3_MFS2_LIN_BASE)
|
|
#define FM3_MFS2_I2C ((FM3_MFS03_I2C_TypeDef *)FM3_MFS2_I2C_BASE)
|
|
#define FM3_MFS3_UART ((FM3_MFS03_UART_TypeDef *)FM3_MFS3_UART_BASE)
|
|
#define FM3_MFS3_CSIO ((FM3_MFS03_CSIO_TypeDef *)FM3_MFS3_CSIO_BASE)
|
|
#define FM3_MFS3_LIN ((FM3_MFS03_LIN_TypeDef *)FM3_MFS3_LIN_BASE)
|
|
#define FM3_MFS3_I2C ((FM3_MFS03_I2C_TypeDef *)FM3_MFS3_I2C_BASE)
|
|
#define FM3_MFS4_UART ((FM3_MFS47_UART_TypeDef *)FM3_MFS4_UART_BASE)
|
|
#define FM3_MFS4_CSIO ((FM3_MFS47_CSIO_TypeDef *)FM3_MFS4_CSIO_BASE)
|
|
#define FM3_MFS4_LIN ((FM3_MFS47_LIN_TypeDef *)FM3_MFS4_LIN_BASE)
|
|
#define FM3_MFS4_I2C ((FM3_MFS47_I2C_TypeDef *)FM3_MFS4_I2C_BASE)
|
|
#define FM3_MFS5_UART ((FM3_MFS47_UART_TypeDef *)FM3_MFS5_UART_BASE)
|
|
#define FM3_MFS5_CSIO ((FM3_MFS47_CSIO_TypeDef *)FM3_MFS5_CSIO_BASE)
|
|
#define FM3_MFS5_LIN ((FM3_MFS47_LIN_TypeDef *)FM3_MFS5_LIN_BASE)
|
|
#define FM3_MFS5_I2C ((FM3_MFS47_I2C_TypeDef *)FM3_MFS5_I2C_BASE)
|
|
#define FM3_MFS6_UART ((FM3_MFS47_UART_TypeDef *)FM3_MFS6_UART_BASE)
|
|
#define FM3_MFS6_CSIO ((FM3_MFS47_CSIO_TypeDef *)FM3_MFS6_CSIO_BASE)
|
|
#define FM3_MFS6_LIN ((FM3_MFS47_LIN_TypeDef *)FM3_MFS6_LIN_BASE)
|
|
#define FM3_MFS6_I2C ((FM3_MFS47_I2C_TypeDef *)FM3_MFS6_I2C_BASE)
|
|
#define FM3_MFS7_UART ((FM3_MFS47_UART_TypeDef *)FM3_MFS7_UART_BASE)
|
|
#define FM3_MFS7_CSIO ((FM3_MFS47_CSIO_TypeDef *)FM3_MFS7_CSIO_BASE)
|
|
#define FM3_MFS7_LIN ((FM3_MFS47_LIN_TypeDef *)FM3_MFS7_LIN_BASE)
|
|
#define FM3_MFS7_I2C ((FM3_MFS47_I2C_TypeDef *)FM3_MFS7_I2C_BASE)
|
|
#define FM3_MFS_NFC ((FM3_MFS_NFC_TypeDef *)FM3_MFS_NFC_BASE)
|
|
#define FM3_CRC ((FM3_CRC_TypeDef *)FM3_CRC_BASE)
|
|
#define FM3_WC ((FM3_WC_TypeDef *)FM3_WC_BASE)
|
|
#define FM3_EXBUS ((FM3_EXBUS_TypeDef *)FM3_EXBUS_BASE)
|
|
#define FM3_USB0 ((FM3_USB_TypeDef *)FM3_USB0_BASE)
|
|
#define FM3_USB1 ((FM3_USB_TypeDef *)FM3_USB1_BASE)
|
|
#define FM3_DMAC ((FM3_DMAC_TypeDef *)FM3_DMAC_BASE)
|
|
#define FM3_ETHERNET_MAC0 ((FM3_ETHERNET_MAC_TypeDef *)FM3_ETHERNET_MAC0_BASE)
|
|
#define FM3_ETHERNET_CONTROL ((FM3_ETHERNET_CONTROL_TypeDef *)FM3_ETHERNET_CONTROL_BASE)
|
|
#define FM3_ETHERNET_MAC1 ((FM3_ETHERNET_MAC_TypeDef *)FM3_ETHERNET_MAC1_BASE)
|
|
|
|
/******************************************************************************
|
|
* Peripheral Bit Band Alias declaration
|
|
******************************************************************************/
|
|
|
|
/* Flash interface registers */
|
|
#define bFM3_FLASH_IF_FASZR_ASZ0 *((volatile unsigned int*)(0x42000000UL))
|
|
#define bFM3_FLASH_IF_FASZR_ASZ1 *((volatile unsigned int*)(0x42000004UL))
|
|
#define bFM3_FLASH_IF_FRWTR_RWT0 *((volatile unsigned int*)(0x42000080UL))
|
|
#define bFM3_FLASH_IF_FRWTR_RWT1 *((volatile unsigned int*)(0x42000084UL))
|
|
#define bFM3_FLASH_IF_FSTR_RDY *((volatile unsigned int*)(0x42000100UL))
|
|
#define bFM3_FLASH_IF_FSTR_HNG *((volatile unsigned int*)(0x42000104UL))
|
|
#define bFM3_FLASH_IF_FSTR_EER *((volatile unsigned int*)(0x42000108UL))
|
|
#define bFM3_FLASH_IF_FSYNDN_SD0 *((volatile unsigned int*)(0x42000200UL))
|
|
#define bFM3_FLASH_IF_FSYNDN_SD1 *((volatile unsigned int*)(0x42000204UL))
|
|
#define bFM3_FLASH_IF_FSYNDN_SD2 *((volatile unsigned int*)(0x42000208UL))
|
|
#define bFM3_FLASH_IF_CRTRMM_TRMM0 *((volatile unsigned int*)(0x42002000UL))
|
|
#define bFM3_FLASH_IF_CRTRMM_TRMM1 *((volatile unsigned int*)(0x42002004UL))
|
|
#define bFM3_FLASH_IF_CRTRMM_TRMM2 *((volatile unsigned int*)(0x42002008UL))
|
|
#define bFM3_FLASH_IF_CRTRMM_TRMM3 *((volatile unsigned int*)(0x4200200CUL))
|
|
#define bFM3_FLASH_IF_CRTRMM_TRMM4 *((volatile unsigned int*)(0x42002010UL))
|
|
#define bFM3_FLASH_IF_CRTRMM_TRMM5 *((volatile unsigned int*)(0x42002014UL))
|
|
#define bFM3_FLASH_IF_CRTRMM_TRMM6 *((volatile unsigned int*)(0x42002018UL))
|
|
#define bFM3_FLASH_IF_CRTRMM_TRMM7 *((volatile unsigned int*)(0x4200201CUL))
|
|
#define bFM3_FLASH_IF_CRTRMM_TRMM8 *((volatile unsigned int*)(0x42002020UL))
|
|
#define bFM3_FLASH_IF_CRTRMM_TRMM9 *((volatile unsigned int*)(0x42002024UL))
|
|
|
|
/* Clock and reset registers */
|
|
#define bFM3_CRG_SCM_CTL_MOSCE *((volatile unsigned int*)(0x42200004UL))
|
|
#define bFM3_CRG_SCM_CTL_SOSCE *((volatile unsigned int*)(0x4220000CUL))
|
|
#define bFM3_CRG_SCM_CTL_PLLE *((volatile unsigned int*)(0x42200010UL))
|
|
#define bFM3_CRG_SCM_CTL_RCS0 *((volatile unsigned int*)(0x42200014UL))
|
|
#define bFM3_CRG_SCM_CTL_RCS1 *((volatile unsigned int*)(0x42200018UL))
|
|
#define bFM3_CRG_SCM_CTL_RCS2 *((volatile unsigned int*)(0x4220001CUL))
|
|
#define bFM3_CRG_SCM_STR_MORDY *((volatile unsigned int*)(0x42200084UL))
|
|
#define bFM3_CRG_SCM_STR_SORDY *((volatile unsigned int*)(0x4220008CUL))
|
|
#define bFM3_CRG_SCM_STR_PLRDY *((volatile unsigned int*)(0x42200090UL))
|
|
#define bFM3_CRG_SCM_STR_RCM0 *((volatile unsigned int*)(0x42200094UL))
|
|
#define bFM3_CRG_SCM_STR_RCM1 *((volatile unsigned int*)(0x42200098UL))
|
|
#define bFM3_CRG_SCM_STR_RCM2 *((volatile unsigned int*)(0x4220009CUL))
|
|
#define bFM3_CRG_RST_STR_PONR *((volatile unsigned int*)(0x42200180UL))
|
|
#define bFM3_CRG_RST_STR_INITX *((volatile unsigned int*)(0x42200184UL))
|
|
#define bFM3_CRG_RST_STR_SWDT *((volatile unsigned int*)(0x42200190UL))
|
|
#define bFM3_CRG_RST_STR_HWDT *((volatile unsigned int*)(0x42200194UL))
|
|
#define bFM3_CRG_RST_STR_CSVR *((volatile unsigned int*)(0x42200198UL))
|
|
#define bFM3_CRG_RST_STR_FCSR *((volatile unsigned int*)(0x4220019CUL))
|
|
#define bFM3_CRG_RST_STR_SRST *((volatile unsigned int*)(0x422001A0UL))
|
|
#define bFM3_CRG_BSC_PSR_BSR0 *((volatile unsigned int*)(0x42200200UL))
|
|
#define bFM3_CRG_BSC_PSR_BSR1 *((volatile unsigned int*)(0x42200204UL))
|
|
#define bFM3_CRG_BSC_PSR_BSR2 *((volatile unsigned int*)(0x42200208UL))
|
|
#define bFM3_CRG_APBC0_PSR_APBC00 *((volatile unsigned int*)(0x42200280UL))
|
|
#define bFM3_CRG_APBC0_PSR_APBC01 *((volatile unsigned int*)(0x42200284UL))
|
|
#define bFM3_CRG_APBC1_PSR_APBC10 *((volatile unsigned int*)(0x42200300UL))
|
|
#define bFM3_CRG_APBC1_PSR_APBC11 *((volatile unsigned int*)(0x42200304UL))
|
|
#define bFM3_CRG_APBC1_PSR_APBC1RST *((volatile unsigned int*)(0x42200310UL))
|
|
#define bFM3_CRG_APBC1_PSR_APBC1EN *((volatile unsigned int*)(0x4220031CUL))
|
|
#define bFM3_CRG_APBC2_PSR_APBC20 *((volatile unsigned int*)(0x42200380UL))
|
|
#define bFM3_CRG_APBC2_PSR_APBC21 *((volatile unsigned int*)(0x42200384UL))
|
|
#define bFM3_CRG_APBC2_PSR_APBC2RST *((volatile unsigned int*)(0x42200390UL))
|
|
#define bFM3_CRG_APBC2_PSR_APBC2EN *((volatile unsigned int*)(0x4220039CUL))
|
|
#define bFM3_CRG_SWC_PSR_SWDS0 *((volatile unsigned int*)(0x42200400UL))
|
|
#define bFM3_CRG_SWC_PSR_SWDS1 *((volatile unsigned int*)(0x42200404UL))
|
|
#define bFM3_CRG_SWC_PSR_TESTB *((volatile unsigned int*)(0x4220041CUL))
|
|
#define bFM3_CRG_TTC_PSR_TTC0 *((volatile unsigned int*)(0x42200500UL))
|
|
#define bFM3_CRG_TTC_PSR_TTC1 *((volatile unsigned int*)(0x42200504UL))
|
|
#define bFM3_CRG_CSW_TMR_MOWT0 *((volatile unsigned int*)(0x42200600UL))
|
|
#define bFM3_CRG_CSW_TMR_MOWT1 *((volatile unsigned int*)(0x42200604UL))
|
|
#define bFM3_CRG_CSW_TMR_MOWT2 *((volatile unsigned int*)(0x42200608UL))
|
|
#define bFM3_CRG_CSW_TMR_MOWT3 *((volatile unsigned int*)(0x4220060CUL))
|
|
#define bFM3_CRG_CSW_TMR_SOWT0 *((volatile unsigned int*)(0x42200610UL))
|
|
#define bFM3_CRG_CSW_TMR_SOWT1 *((volatile unsigned int*)(0x42200614UL))
|
|
#define bFM3_CRG_CSW_TMR_SOWT2 *((volatile unsigned int*)(0x42200618UL))
|
|
#define bFM3_CRG_PSW_TMR_POWT0 *((volatile unsigned int*)(0x42200680UL))
|
|
#define bFM3_CRG_PSW_TMR_POWT1 *((volatile unsigned int*)(0x42200684UL))
|
|
#define bFM3_CRG_PSW_TMR_POWT2 *((volatile unsigned int*)(0x42200688UL))
|
|
#define bFM3_CRG_PSW_TMR_PINC *((volatile unsigned int*)(0x42200690UL))
|
|
#define bFM3_CRG_PLL_CTL1_PLLM0 *((volatile unsigned int*)(0x42200700UL))
|
|
#define bFM3_CRG_PLL_CTL1_PLLM1 *((volatile unsigned int*)(0x42200704UL))
|
|
#define bFM3_CRG_PLL_CTL1_PLLM2 *((volatile unsigned int*)(0x42200708UL))
|
|
#define bFM3_CRG_PLL_CTL1_PLLM3 *((volatile unsigned int*)(0x4220070CUL))
|
|
#define bFM3_CRG_PLL_CTL1_PLLK0 *((volatile unsigned int*)(0x42200710UL))
|
|
#define bFM3_CRG_PLL_CTL1_PLLK1 *((volatile unsigned int*)(0x42200714UL))
|
|
#define bFM3_CRG_PLL_CTL1_PLLK2 *((volatile unsigned int*)(0x42200718UL))
|
|
#define bFM3_CRG_PLL_CTL1_PLLK3 *((volatile unsigned int*)(0x4220071CUL))
|
|
#define bFM3_CRG_PLL_CTL2_PLLN0 *((volatile unsigned int*)(0x42200780UL))
|
|
#define bFM3_CRG_PLL_CTL2_PLLN1 *((volatile unsigned int*)(0x42200784UL))
|
|
#define bFM3_CRG_PLL_CTL2_PLLN2 *((volatile unsigned int*)(0x42200788UL))
|
|
#define bFM3_CRG_PLL_CTL2_PLLN3 *((volatile unsigned int*)(0x4220078CUL))
|
|
#define bFM3_CRG_PLL_CTL2_PLLN4 *((volatile unsigned int*)(0x42200790UL))
|
|
#define bFM3_CRG_PLL_CTL2_PLLN5 *((volatile unsigned int*)(0x42200794UL))
|
|
#define bFM3_CRG_CSV_CTL_MCSVE *((volatile unsigned int*)(0x42200800UL))
|
|
#define bFM3_CRG_CSV_CTL_SCSVE *((volatile unsigned int*)(0x42200804UL))
|
|
#define bFM3_CRG_CSV_CTL_FCSDE *((volatile unsigned int*)(0x42200820UL))
|
|
#define bFM3_CRG_CSV_CTL_FCSRE *((volatile unsigned int*)(0x42200824UL))
|
|
#define bFM3_CRG_CSV_CTL_FCD0 *((volatile unsigned int*)(0x42200830UL))
|
|
#define bFM3_CRG_CSV_CTL_FCD1 *((volatile unsigned int*)(0x42200834UL))
|
|
#define bFM3_CRG_CSV_CTL_FCD2 *((volatile unsigned int*)(0x42200838UL))
|
|
#define bFM3_CRG_CSV_STR_MCMF *((volatile unsigned int*)(0x42200880UL))
|
|
#define bFM3_CRG_CSV_STR_SCMF *((volatile unsigned int*)(0x42200884UL))
|
|
#define bFM3_CRG_DBWDT_CTL_DPSWBE *((volatile unsigned int*)(0x42200A94UL))
|
|
#define bFM3_CRG_DBWDT_CTL_DPHWBE *((volatile unsigned int*)(0x42200A9CUL))
|
|
#define bFM3_CRG_INT_ENR_MCSE *((volatile unsigned int*)(0x42200C00UL))
|
|
#define bFM3_CRG_INT_ENR_SCSE *((volatile unsigned int*)(0x42200C04UL))
|
|
#define bFM3_CRG_INT_ENR_PCSE *((volatile unsigned int*)(0x42200C08UL))
|
|
#define bFM3_CRG_INT_ENR_FCSE *((volatile unsigned int*)(0x42200C14UL))
|
|
#define bFM3_CRG_INT_STR_MCSI *((volatile unsigned int*)(0x42200C80UL))
|
|
#define bFM3_CRG_INT_STR_SCSI *((volatile unsigned int*)(0x42200C84UL))
|
|
#define bFM3_CRG_INT_STR_PCSI *((volatile unsigned int*)(0x42200C88UL))
|
|
#define bFM3_CRG_INT_STR_FCSI *((volatile unsigned int*)(0x42200C94UL))
|
|
#define bFM3_CRG_INT_CLR_MCSC *((volatile unsigned int*)(0x42200D00UL))
|
|
#define bFM3_CRG_INT_CLR_SCSC *((volatile unsigned int*)(0x42200D04UL))
|
|
#define bFM3_CRG_INT_CLR_PCSC *((volatile unsigned int*)(0x42200D08UL))
|
|
#define bFM3_CRG_INT_CLR_FCSC *((volatile unsigned int*)(0x42200D14UL))
|
|
|
|
/* Hardware watchdog registers */
|
|
#define bFM3_HWWDT_WDG_CTL_INTEN *((volatile unsigned int*)(0x42220100UL))
|
|
#define bFM3_HWWDT_WDG_CTL_RESEN *((volatile unsigned int*)(0x42220104UL))
|
|
#define bFM3_HWWDT_WDG_RIS_RIS *((volatile unsigned int*)(0x42220200UL))
|
|
|
|
/* Software watchdog registers */
|
|
#define bFM3_SWWDT_WDOGCONTROL_INTEN *((volatile unsigned int*)(0x42240100UL))
|
|
#define bFM3_SWWDT_WDOGCONTROL_RESEN *((volatile unsigned int*)(0x42240104UL))
|
|
#define bFM3_SWWDT_WDOGRIS_RIS *((volatile unsigned int*)(0x42240200UL))
|
|
|
|
/* Dual timer 1/2 registers */
|
|
#define bFM3_DTIM_TIMER1CONTROL_ONESHOT *((volatile unsigned int*)(0x422A0100UL))
|
|
#define bFM3_DTIM_TIMER1CONTROL_TIMERSIZE *((volatile unsigned int*)(0x422A0104UL))
|
|
#define bFM3_DTIM_TIMER1CONTROL_TIMERPRE0 *((volatile unsigned int*)(0x422A0108UL))
|
|
#define bFM3_DTIM_TIMER1CONTROL_TIMERPRE1 *((volatile unsigned int*)(0x422A010CUL))
|
|
#define bFM3_DTIM_TIMER1CONTROL_INTENABLE *((volatile unsigned int*)(0x422A0114UL))
|
|
#define bFM3_DTIM_TIMER1CONTROL_TIMERMODE *((volatile unsigned int*)(0x422A0118UL))
|
|
#define bFM3_DTIM_TIMER1CONTROL_TIMEREN *((volatile unsigned int*)(0x422A011CUL))
|
|
#define bFM3_DTIM_TIMER1RIS_TIMER1RIS *((volatile unsigned int*)(0x422A0200UL))
|
|
#define bFM3_DTIM_TIMER1MIS_TIMER1MIS *((volatile unsigned int*)(0x422A0280UL))
|
|
#define bFM3_DTIM_TIMER2CONTROL_ONESHOT *((volatile unsigned int*)(0x422A0500UL))
|
|
#define bFM3_DTIM_TIMER2CONTROL_TIMERSIZE *((volatile unsigned int*)(0x422A0504UL))
|
|
#define bFM3_DTIM_TIMER2CONTROL_TIMERPRE0 *((volatile unsigned int*)(0x422A0508UL))
|
|
#define bFM3_DTIM_TIMER2CONTROL_TIMERPRE1 *((volatile unsigned int*)(0x422A050CUL))
|
|
#define bFM3_DTIM_TIMER2CONTROL_INTENABLE *((volatile unsigned int*)(0x422A0514UL))
|
|
#define bFM3_DTIM_TIMER2CONTROL_TIMERMODE *((volatile unsigned int*)(0x422A0518UL))
|
|
#define bFM3_DTIM_TIMER2CONTROL_TIMEREN *((volatile unsigned int*)(0x422A051CUL))
|
|
#define bFM3_DTIM_TIMER2RIS_TIMER2RIS *((volatile unsigned int*)(0x422A0600UL))
|
|
#define bFM3_DTIM_TIMER2MIS_TIMER2MIS *((volatile unsigned int*)(0x422A0680UL))
|
|
|
|
/* Multifunction Timer unit 0 Free Running Timer registers */
|
|
#define bFM3_MFT0_FRT_TCSA0_CLK0 *((volatile unsigned int*)(0x42400600UL))
|
|
#define bFM3_MFT0_FRT_TCSA0_CLK1 *((volatile unsigned int*)(0x42400604UL))
|
|
#define bFM3_MFT0_FRT_TCSA0_CLK2 *((volatile unsigned int*)(0x42400608UL))
|
|
#define bFM3_MFT0_FRT_TCSA0_CLK3 *((volatile unsigned int*)(0x4240060CUL))
|
|
#define bFM3_MFT0_FRT_TCSA0_SCLR *((volatile unsigned int*)(0x42400610UL))
|
|
#define bFM3_MFT0_FRT_TCSA0_MODE *((volatile unsigned int*)(0x42400614UL))
|
|
#define bFM3_MFT0_FRT_TCSA0_STOP *((volatile unsigned int*)(0x42400618UL))
|
|
#define bFM3_MFT0_FRT_TCSA0_BFE *((volatile unsigned int*)(0x4240061CUL))
|
|
#define bFM3_MFT0_FRT_TCSA0_ICRE *((volatile unsigned int*)(0x42400620UL))
|
|
#define bFM3_MFT0_FRT_TCSA0_ICLR *((volatile unsigned int*)(0x42400624UL))
|
|
#define bFM3_MFT0_FRT_TCSA0_IRQZE *((volatile unsigned int*)(0x42400634UL))
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#define bFM3_MFT0_FRT_TCSA0_IRQZF *((volatile unsigned int*)(0x42400638UL))
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#define bFM3_MFT0_FRT_TCSA0_ECKE *((volatile unsigned int*)(0x4240063CUL))
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#define bFM3_MFT0_FRT_TCSB0_AD0E *((volatile unsigned int*)(0x42400680UL))
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#define bFM3_MFT0_FRT_TCSB0_AD1E *((volatile unsigned int*)(0x42400684UL))
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#define bFM3_MFT0_FRT_TCSB0_AD2E *((volatile unsigned int*)(0x42400688UL))
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#define bFM3_MFT0_FRT_TCSA1_CLK0 *((volatile unsigned int*)(0x42400800UL))
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#define bFM3_MFT0_FRT_TCSA1_CLK1 *((volatile unsigned int*)(0x42400804UL))
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#define bFM3_MFT0_FRT_TCSA1_CLK2 *((volatile unsigned int*)(0x42400808UL))
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#define bFM3_MFT0_FRT_TCSA1_CLK3 *((volatile unsigned int*)(0x4240080CUL))
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#define bFM3_MFT0_FRT_TCSA1_SCLR *((volatile unsigned int*)(0x42400810UL))
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#define bFM3_MFT0_FRT_TCSA1_MODE *((volatile unsigned int*)(0x42400814UL))
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#define bFM3_MFT0_FRT_TCSA1_STOP *((volatile unsigned int*)(0x42400818UL))
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#define bFM3_MFT0_FRT_TCSA1_BFE *((volatile unsigned int*)(0x4240081CUL))
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#define bFM3_MFT0_FRT_TCSA1_ICRE *((volatile unsigned int*)(0x42400820UL))
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#define bFM3_MFT0_FRT_TCSA1_ICLR *((volatile unsigned int*)(0x42400824UL))
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#define bFM3_MFT0_FRT_TCSA1_IRQZE *((volatile unsigned int*)(0x42400834UL))
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#define bFM3_MFT0_FRT_TCSA1_IRQZF *((volatile unsigned int*)(0x42400838UL))
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#define bFM3_MFT0_FRT_TCSA1_ECKE *((volatile unsigned int*)(0x4240083CUL))
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#define bFM3_MFT0_FRT_TCSB1_AD0E *((volatile unsigned int*)(0x42400880UL))
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#define bFM3_MFT0_FRT_TCSB1_AD1E *((volatile unsigned int*)(0x42400884UL))
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#define bFM3_MFT0_FRT_TCSB1_AD2E *((volatile unsigned int*)(0x42400888UL))
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#define bFM3_MFT0_FRT_TCSA2_CLK0 *((volatile unsigned int*)(0x42400A00UL))
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#define bFM3_MFT0_FRT_TCSA2_CLK1 *((volatile unsigned int*)(0x42400A04UL))
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#define bFM3_MFT0_FRT_TCSA2_CLK2 *((volatile unsigned int*)(0x42400A08UL))
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#define bFM3_MFT0_FRT_TCSA2_CLK3 *((volatile unsigned int*)(0x42400A0CUL))
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#define bFM3_MFT0_FRT_TCSA2_SCLR *((volatile unsigned int*)(0x42400A10UL))
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#define bFM3_MFT0_FRT_TCSA2_MODE *((volatile unsigned int*)(0x42400A14UL))
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#define bFM3_MFT0_FRT_TCSA2_STOP *((volatile unsigned int*)(0x42400A18UL))
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#define bFM3_MFT0_FRT_TCSA2_BFE *((volatile unsigned int*)(0x42400A1CUL))
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#define bFM3_MFT0_FRT_TCSA2_ICRE *((volatile unsigned int*)(0x42400A20UL))
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#define bFM3_MFT0_FRT_TCSA2_ICLR *((volatile unsigned int*)(0x42400A24UL))
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#define bFM3_MFT0_FRT_TCSA2_IRQZE *((volatile unsigned int*)(0x42400A34UL))
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#define bFM3_MFT0_FRT_TCSA2_IRQZF *((volatile unsigned int*)(0x42400A38UL))
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#define bFM3_MFT0_FRT_TCSA2_ECKE *((volatile unsigned int*)(0x42400A3CUL))
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#define bFM3_MFT0_FRT_TCSB2_AD0E *((volatile unsigned int*)(0x42400A80UL))
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#define bFM3_MFT0_FRT_TCSB2_AD1E *((volatile unsigned int*)(0x42400A84UL))
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#define bFM3_MFT0_FRT_TCSB2_AD2E *((volatile unsigned int*)(0x42400A88UL))
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|
|
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/* Multifunction Timer unit 0 Output Compare Unit registers */
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#define bFM3_MFT0_OCU_OCSA10_CST0 *((volatile unsigned int*)(0x42400300UL))
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#define bFM3_MFT0_OCU_OCSA10_CST1 *((volatile unsigned int*)(0x42400304UL))
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#define bFM3_MFT0_OCU_OCSA10_BDIS0 *((volatile unsigned int*)(0x42400308UL))
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|
#define bFM3_MFT0_OCU_OCSA10_BDIS1 *((volatile unsigned int*)(0x4240030CUL))
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|
#define bFM3_MFT0_OCU_OCSA10_IOE0 *((volatile unsigned int*)(0x42400310UL))
|
|
#define bFM3_MFT0_OCU_OCSA10_IOE1 *((volatile unsigned int*)(0x42400314UL))
|
|
#define bFM3_MFT0_OCU_OCSA10_IOP0 *((volatile unsigned int*)(0x42400318UL))
|
|
#define bFM3_MFT0_OCU_OCSA10_IOP1 *((volatile unsigned int*)(0x4240031CUL))
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|
#define bFM3_MFT0_OCU_OCSB10_OTD0 *((volatile unsigned int*)(0x42400320UL))
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|
#define bFM3_MFT0_OCU_OCSB10_OTD1 *((volatile unsigned int*)(0x42400324UL))
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|
#define bFM3_MFT0_OCU_OCSB10_CMOD *((volatile unsigned int*)(0x42400330UL))
|
|
#define bFM3_MFT0_OCU_OCSB10_BTS0 *((volatile unsigned int*)(0x42400334UL))
|
|
#define bFM3_MFT0_OCU_OCSB10_BTS1 *((volatile unsigned int*)(0x42400338UL))
|
|
#define bFM3_MFT0_OCU_OCSA32_CST2 *((volatile unsigned int*)(0x42400380UL))
|
|
#define bFM3_MFT0_OCU_OCSA32_CST3 *((volatile unsigned int*)(0x42400384UL))
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|
#define bFM3_MFT0_OCU_OCSA32_BDIS2 *((volatile unsigned int*)(0x42400388UL))
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|
#define bFM3_MFT0_OCU_OCSA32_BDIS3 *((volatile unsigned int*)(0x4240038CUL))
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|
#define bFM3_MFT0_OCU_OCSA32_IOE2 *((volatile unsigned int*)(0x42400390UL))
|
|
#define bFM3_MFT0_OCU_OCSA32_IOE3 *((volatile unsigned int*)(0x42400394UL))
|
|
#define bFM3_MFT0_OCU_OCSA32_IOP2 *((volatile unsigned int*)(0x42400398UL))
|
|
#define bFM3_MFT0_OCU_OCSA32_IOP3 *((volatile unsigned int*)(0x4240039CUL))
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|
#define bFM3_MFT0_OCU_OCSB32_OTD2 *((volatile unsigned int*)(0x424003A0UL))
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|
#define bFM3_MFT0_OCU_OCSB32_OTD3 *((volatile unsigned int*)(0x424003A4UL))
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|
#define bFM3_MFT0_OCU_OCSB32_CMOD *((volatile unsigned int*)(0x424003B0UL))
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|
#define bFM3_MFT0_OCU_OCSB32_BTS2 *((volatile unsigned int*)(0x424003B4UL))
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|
#define bFM3_MFT0_OCU_OCSB32_BTS3 *((volatile unsigned int*)(0x424003B8UL))
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#define bFM3_MFT0_OCU_OCSA54_CST4 *((volatile unsigned int*)(0x42400400UL))
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#define bFM3_MFT0_OCU_OCSA54_CST5 *((volatile unsigned int*)(0x42400404UL))
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|
#define bFM3_MFT0_OCU_OCSA54_BDIS4 *((volatile unsigned int*)(0x42400408UL))
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|
#define bFM3_MFT0_OCU_OCSA54_BDIS5 *((volatile unsigned int*)(0x4240040CUL))
|
|
#define bFM3_MFT0_OCU_OCSA54_IOE4 *((volatile unsigned int*)(0x42400410UL))
|
|
#define bFM3_MFT0_OCU_OCSA54_IOE5 *((volatile unsigned int*)(0x42400414UL))
|
|
#define bFM3_MFT0_OCU_OCSA54_IOP4 *((volatile unsigned int*)(0x42400418UL))
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#define bFM3_MFT0_OCU_OCSA54_IOP5 *((volatile unsigned int*)(0x4240041CUL))
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#define bFM3_MFT0_OCU_OCSB54_OTD4 *((volatile unsigned int*)(0x42400420UL))
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#define bFM3_MFT0_OCU_OCSB54_OTD5 *((volatile unsigned int*)(0x42400424UL))
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#define bFM3_MFT0_OCU_OCSB54_CMOD *((volatile unsigned int*)(0x42400430UL))
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#define bFM3_MFT0_OCU_OCSB54_BTS4 *((volatile unsigned int*)(0x42400434UL))
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|
#define bFM3_MFT0_OCU_OCSB54_BTS5 *((volatile unsigned int*)(0x42400438UL))
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#define bFM3_MFT0_OCU_OCSC_MOD0 *((volatile unsigned int*)(0x424004A0UL))
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#define bFM3_MFT0_OCU_OCSC_MOD1 *((volatile unsigned int*)(0x424004A4UL))
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#define bFM3_MFT0_OCU_OCSC_MOD2 *((volatile unsigned int*)(0x424004A8UL))
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#define bFM3_MFT0_OCU_OCSC_MOD3 *((volatile unsigned int*)(0x424004ACUL))
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#define bFM3_MFT0_OCU_OCSC_MOD4 *((volatile unsigned int*)(0x424004B0UL))
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#define bFM3_MFT0_OCU_OCSC_MOD5 *((volatile unsigned int*)(0x424004B4UL))
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#define bFM3_MFT0_OCU_OCFS10_FSO00 *((volatile unsigned int*)(0x42400B00UL))
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#define bFM3_MFT0_OCU_OCFS10_FSO01 *((volatile unsigned int*)(0x42400B04UL))
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#define bFM3_MFT0_OCU_OCFS10_FSO02 *((volatile unsigned int*)(0x42400B08UL))
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#define bFM3_MFT0_OCU_OCFS10_FSO03 *((volatile unsigned int*)(0x42400B0CUL))
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#define bFM3_MFT0_OCU_OCFS10_FSO10 *((volatile unsigned int*)(0x42400B10UL))
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#define bFM3_MFT0_OCU_OCFS10_FSO11 *((volatile unsigned int*)(0x42400B14UL))
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#define bFM3_MFT0_OCU_OCFS10_FSO12 *((volatile unsigned int*)(0x42400B18UL))
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#define bFM3_MFT0_OCU_OCFS10_FSO13 *((volatile unsigned int*)(0x42400B1CUL))
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#define bFM3_MFT0_OCU_OCFS32_FSO20 *((volatile unsigned int*)(0x42400B20UL))
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#define bFM3_MFT0_OCU_OCFS32_FSO21 *((volatile unsigned int*)(0x42400B24UL))
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#define bFM3_MFT0_OCU_OCFS32_FSO22 *((volatile unsigned int*)(0x42400B28UL))
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#define bFM3_MFT0_OCU_OCFS32_FSO23 *((volatile unsigned int*)(0x42400B2CUL))
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#define bFM3_MFT0_OCU_OCFS32_FSO30 *((volatile unsigned int*)(0x42400B30UL))
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#define bFM3_MFT0_OCU_OCFS32_FSO31 *((volatile unsigned int*)(0x42400B34UL))
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#define bFM3_MFT0_OCU_OCFS32_FSO32 *((volatile unsigned int*)(0x42400B38UL))
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#define bFM3_MFT0_OCU_OCFS32_FSO33 *((volatile unsigned int*)(0x42400B3CUL))
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#define bFM3_MFT0_OCU_OCFS54_FSO40 *((volatile unsigned int*)(0x42400B80UL))
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#define bFM3_MFT0_OCU_OCFS54_FSO41 *((volatile unsigned int*)(0x42400B84UL))
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#define bFM3_MFT0_OCU_OCFS54_FSO42 *((volatile unsigned int*)(0x42400B88UL))
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#define bFM3_MFT0_OCU_OCFS54_FSO43 *((volatile unsigned int*)(0x42400B8CUL))
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#define bFM3_MFT0_OCU_OCFS54_FSO50 *((volatile unsigned int*)(0x42400B90UL))
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#define bFM3_MFT0_OCU_OCFS54_FSO51 *((volatile unsigned int*)(0x42400B94UL))
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#define bFM3_MFT0_OCU_OCFS54_FSO52 *((volatile unsigned int*)(0x42400B98UL))
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#define bFM3_MFT0_OCU_OCFS54_FSO53 *((volatile unsigned int*)(0x42400B9CUL))
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/* Multifunction Timer unit 0 Waveform Generator and Noise Canceler registers */
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#define bFM3_MFT0_WFG_WFSA10_DCK0 *((volatile unsigned int*)(0x42401180UL))
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#define bFM3_MFT0_WFG_WFSA10_DCK1 *((volatile unsigned int*)(0x42401184UL))
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#define bFM3_MFT0_WFG_WFSA10_DCK2 *((volatile unsigned int*)(0x42401188UL))
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#define bFM3_MFT0_WFG_WFSA10_TMD0 *((volatile unsigned int*)(0x4240118CUL))
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#define bFM3_MFT0_WFG_WFSA10_TMD1 *((volatile unsigned int*)(0x42401190UL))
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#define bFM3_MFT0_WFG_WFSA10_TMD2 *((volatile unsigned int*)(0x42401194UL))
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#define bFM3_MFT0_WFG_WFSA10_GTEN0 *((volatile unsigned int*)(0x42401198UL))
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#define bFM3_MFT0_WFG_WFSA10_GTEN1 *((volatile unsigned int*)(0x4240119CUL))
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#define bFM3_MFT0_WFG_WFSA10_PSEL0 *((volatile unsigned int*)(0x424011A0UL))
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#define bFM3_MFT0_WFG_WFSA10_PSEL1 *((volatile unsigned int*)(0x424011A4UL))
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#define bFM3_MFT0_WFG_WFSA10_PGEN0 *((volatile unsigned int*)(0x424011A8UL))
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#define bFM3_MFT0_WFG_WFSA10_PGEN1 *((volatile unsigned int*)(0x424011ACUL))
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#define bFM3_MFT0_WFG_WFSA10_DMOD *((volatile unsigned int*)(0x424011B0UL))
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#define bFM3_MFT0_WFG_WFSA32_DCK0 *((volatile unsigned int*)(0x42401200UL))
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#define bFM3_MFT0_WFG_WFSA32_DCK1 *((volatile unsigned int*)(0x42401204UL))
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#define bFM3_MFT0_WFG_WFSA32_DCK2 *((volatile unsigned int*)(0x42401208UL))
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#define bFM3_MFT0_WFG_WFSA32_TMD0 *((volatile unsigned int*)(0x4240120CUL))
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#define bFM3_MFT0_WFG_WFSA32_TMD1 *((volatile unsigned int*)(0x42401210UL))
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#define bFM3_MFT0_WFG_WFSA32_TMD2 *((volatile unsigned int*)(0x42401214UL))
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#define bFM3_MFT0_WFG_WFSA32_GTEN0 *((volatile unsigned int*)(0x42401218UL))
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#define bFM3_MFT0_WFG_WFSA32_GTEN1 *((volatile unsigned int*)(0x4240121CUL))
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#define bFM3_MFT0_WFG_WFSA32_PSEL0 *((volatile unsigned int*)(0x42401220UL))
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#define bFM3_MFT0_WFG_WFSA32_PSEL1 *((volatile unsigned int*)(0x42401224UL))
|
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#define bFM3_MFT0_WFG_WFSA32_PGEN0 *((volatile unsigned int*)(0x42401228UL))
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#define bFM3_MFT0_WFG_WFSA32_PGEN1 *((volatile unsigned int*)(0x4240122CUL))
|
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#define bFM3_MFT0_WFG_WFSA32_DMOD *((volatile unsigned int*)(0x42401230UL))
|
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#define bFM3_MFT0_WFG_WFSA54_DCK0 *((volatile unsigned int*)(0x42401280UL))
|
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#define bFM3_MFT0_WFG_WFSA54_DCK1 *((volatile unsigned int*)(0x42401284UL))
|
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#define bFM3_MFT0_WFG_WFSA54_DCK2 *((volatile unsigned int*)(0x42401288UL))
|
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#define bFM3_MFT0_WFG_WFSA54_TMD0 *((volatile unsigned int*)(0x4240128CUL))
|
|
#define bFM3_MFT0_WFG_WFSA54_TMD1 *((volatile unsigned int*)(0x42401290UL))
|
|
#define bFM3_MFT0_WFG_WFSA54_TMD2 *((volatile unsigned int*)(0x42401294UL))
|
|
#define bFM3_MFT0_WFG_WFSA54_GTEN0 *((volatile unsigned int*)(0x42401298UL))
|
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#define bFM3_MFT0_WFG_WFSA54_GTEN1 *((volatile unsigned int*)(0x4240129CUL))
|
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#define bFM3_MFT0_WFG_WFSA54_PSEL0 *((volatile unsigned int*)(0x424012A0UL))
|
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#define bFM3_MFT0_WFG_WFSA54_PSEL1 *((volatile unsigned int*)(0x424012A4UL))
|
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#define bFM3_MFT0_WFG_WFSA54_PGEN0 *((volatile unsigned int*)(0x424012A8UL))
|
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#define bFM3_MFT0_WFG_WFSA54_PGEN1 *((volatile unsigned int*)(0x424012ACUL))
|
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#define bFM3_MFT0_WFG_WFSA54_DMOD *((volatile unsigned int*)(0x424012B0UL))
|
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#define bFM3_MFT0_WFG_WFIR_DTIF *((volatile unsigned int*)(0x42401300UL))
|
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#define bFM3_MFT0_WFG_WFIR_DTIC *((volatile unsigned int*)(0x42401304UL))
|
|
#define bFM3_MFT0_WFG_WFIR_TMIF10 *((volatile unsigned int*)(0x42401310UL))
|
|
#define bFM3_MFT0_WFG_WFIR_TMIC10 *((volatile unsigned int*)(0x42401314UL))
|
|
#define bFM3_MFT0_WFG_WFIR_TMIE10 *((volatile unsigned int*)(0x42401318UL))
|
|
#define bFM3_MFT0_WFG_WFIR_TMIS10 *((volatile unsigned int*)(0x4240131CUL))
|
|
#define bFM3_MFT0_WFG_WFIR_TMIF32 *((volatile unsigned int*)(0x42401320UL))
|
|
#define bFM3_MFT0_WFG_WFIR_TMIC32 *((volatile unsigned int*)(0x42401324UL))
|
|
#define bFM3_MFT0_WFG_WFIR_TMIE32 *((volatile unsigned int*)(0x42401328UL))
|
|
#define bFM3_MFT0_WFG_WFIR_TMIS32 *((volatile unsigned int*)(0x4240132CUL))
|
|
#define bFM3_MFT0_WFG_WFIR_TMIF54 *((volatile unsigned int*)(0x42401330UL))
|
|
#define bFM3_MFT0_WFG_WFIR_TMIC54 *((volatile unsigned int*)(0x42401334UL))
|
|
#define bFM3_MFT0_WFG_WFIR_TMIE54 *((volatile unsigned int*)(0x42401338UL))
|
|
#define bFM3_MFT0_WFG_WFIR_TMIS54 *((volatile unsigned int*)(0x4240133CUL))
|
|
#define bFM3_MFT0_WFG_NZCL_DTIE *((volatile unsigned int*)(0x42401380UL))
|
|
#define bFM3_MFT0_WFG_NZCL_NWS0 *((volatile unsigned int*)(0x42401384UL))
|
|
#define bFM3_MFT0_WFG_NZCL_NWS1 *((volatile unsigned int*)(0x42401388UL))
|
|
#define bFM3_MFT0_WFG_NZCL_NWS2 *((volatile unsigned int*)(0x4240138CUL))
|
|
#define bFM3_MFT0_WFG_NZCL_SDTI *((volatile unsigned int*)(0x42401390UL))
|
|
|
|
/* Multifunction Timer unit 0 Input Capture Unit registers */
|
|
#define bFM3_MFT0_ICU_ICFS10_FSI00 *((volatile unsigned int*)(0x42400C00UL))
|
|
#define bFM3_MFT0_ICU_ICFS10_FSI01 *((volatile unsigned int*)(0x42400C04UL))
|
|
#define bFM3_MFT0_ICU_ICFS10_FSI02 *((volatile unsigned int*)(0x42400C08UL))
|
|
#define bFM3_MFT0_ICU_ICFS10_FSI03 *((volatile unsigned int*)(0x42400C0CUL))
|
|
#define bFM3_MFT0_ICU_ICFS10_FSI10 *((volatile unsigned int*)(0x42400C10UL))
|
|
#define bFM3_MFT0_ICU_ICFS10_FSI11 *((volatile unsigned int*)(0x42400C14UL))
|
|
#define bFM3_MFT0_ICU_ICFS10_FSI12 *((volatile unsigned int*)(0x42400C18UL))
|
|
#define bFM3_MFT0_ICU_ICFS10_FSI13 *((volatile unsigned int*)(0x42400C1CUL))
|
|
#define bFM3_MFT0_ICU_ICFS32_FSI20 *((volatile unsigned int*)(0x42400C20UL))
|
|
#define bFM3_MFT0_ICU_ICFS32_FSI21 *((volatile unsigned int*)(0x42400C24UL))
|
|
#define bFM3_MFT0_ICU_ICFS32_FSI22 *((volatile unsigned int*)(0x42400C28UL))
|
|
#define bFM3_MFT0_ICU_ICFS32_FSI23 *((volatile unsigned int*)(0x42400C2CUL))
|
|
#define bFM3_MFT0_ICU_ICFS32_FSI30 *((volatile unsigned int*)(0x42400C30UL))
|
|
#define bFM3_MFT0_ICU_ICFS32_FSI31 *((volatile unsigned int*)(0x42400C34UL))
|
|
#define bFM3_MFT0_ICU_ICFS32_FSI32 *((volatile unsigned int*)(0x42400C38UL))
|
|
#define bFM3_MFT0_ICU_ICFS32_FSI33 *((volatile unsigned int*)(0x42400C3CUL))
|
|
#define bFM3_MFT0_ICU_ICSA10_EG00 *((volatile unsigned int*)(0x42400F00UL))
|
|
#define bFM3_MFT0_ICU_ICSA10_EG01 *((volatile unsigned int*)(0x42400F04UL))
|
|
#define bFM3_MFT0_ICU_ICSA10_EG10 *((volatile unsigned int*)(0x42400F08UL))
|
|
#define bFM3_MFT0_ICU_ICSA10_EG11 *((volatile unsigned int*)(0x42400F0CUL))
|
|
#define bFM3_MFT0_ICU_ICSA10_ICE0 *((volatile unsigned int*)(0x42400F10UL))
|
|
#define bFM3_MFT0_ICU_ICSA10_ICE1 *((volatile unsigned int*)(0x42400F14UL))
|
|
#define bFM3_MFT0_ICU_ICSA10_ICP0 *((volatile unsigned int*)(0x42400F18UL))
|
|
#define bFM3_MFT0_ICU_ICSA10_ICP1 *((volatile unsigned int*)(0x42400F1CUL))
|
|
#define bFM3_MFT0_ICU_ICSB10_IEI0 *((volatile unsigned int*)(0x42400F20UL))
|
|
#define bFM3_MFT0_ICU_ICSB10_IEI1 *((volatile unsigned int*)(0x42400F24UL))
|
|
#define bFM3_MFT0_ICU_ICSA32_EG20 *((volatile unsigned int*)(0x42400F80UL))
|
|
#define bFM3_MFT0_ICU_ICSA32_EG21 *((volatile unsigned int*)(0x42400F84UL))
|
|
#define bFM3_MFT0_ICU_ICSA32_EG30 *((volatile unsigned int*)(0x42400F88UL))
|
|
#define bFM3_MFT0_ICU_ICSA32_EG31 *((volatile unsigned int*)(0x42400F8CUL))
|
|
#define bFM3_MFT0_ICU_ICSA32_ICE2 *((volatile unsigned int*)(0x42400F90UL))
|
|
#define bFM3_MFT0_ICU_ICSA32_ICE3 *((volatile unsigned int*)(0x42400F94UL))
|
|
#define bFM3_MFT0_ICU_ICSA32_ICP2 *((volatile unsigned int*)(0x42400F98UL))
|
|
#define bFM3_MFT0_ICU_ICSA32_ICP3 *((volatile unsigned int*)(0x42400F9CUL))
|
|
#define bFM3_MFT0_ICU_ICSB32_IEI2 *((volatile unsigned int*)(0x42400FA0UL))
|
|
#define bFM3_MFT0_ICU_ICSB32_IEI3 *((volatile unsigned int*)(0x42400FA4UL))
|
|
|
|
/* Multifunction Timer unit 0 ADC Start Compare Unit registers */
|
|
#define bFM3_MFT0_ADCMP_ACSB_BDIS0 *((volatile unsigned int*)(0x42401700UL))
|
|
#define bFM3_MFT0_ADCMP_ACSB_BDIS1 *((volatile unsigned int*)(0x42401704UL))
|
|
#define bFM3_MFT0_ADCMP_ACSB_BDIS2 *((volatile unsigned int*)(0x42401708UL))
|
|
#define bFM3_MFT0_ADCMP_ACSB_BTS0 *((volatile unsigned int*)(0x42401710UL))
|
|
#define bFM3_MFT0_ADCMP_ACSB_BTS1 *((volatile unsigned int*)(0x42401714UL))
|
|
#define bFM3_MFT0_ADCMP_ACSB_BTS2 *((volatile unsigned int*)(0x42401718UL))
|
|
#define bFM3_MFT0_ADCMP_ACSA_CE00 *((volatile unsigned int*)(0x42401780UL))
|
|
#define bFM3_MFT0_ADCMP_ACSA_CE01 *((volatile unsigned int*)(0x42401784UL))
|
|
#define bFM3_MFT0_ADCMP_ACSA_CE10 *((volatile unsigned int*)(0x42401788UL))
|
|
#define bFM3_MFT0_ADCMP_ACSA_CE11 *((volatile unsigned int*)(0x4240178CUL))
|
|
#define bFM3_MFT0_ADCMP_ACSA_CE20 *((volatile unsigned int*)(0x42401790UL))
|
|
#define bFM3_MFT0_ADCMP_ACSA_CE21 *((volatile unsigned int*)(0x42401794UL))
|
|
#define bFM3_MFT0_ADCMP_ACSA_SEL00 *((volatile unsigned int*)(0x424017A0UL))
|
|
#define bFM3_MFT0_ADCMP_ACSA_SEL01 *((volatile unsigned int*)(0x424017A4UL))
|
|
#define bFM3_MFT0_ADCMP_ACSA_SEL10 *((volatile unsigned int*)(0x424017A8UL))
|
|
#define bFM3_MFT0_ADCMP_ACSA_SEL11 *((volatile unsigned int*)(0x424017ACUL))
|
|
#define bFM3_MFT0_ADCMP_ACSA_SEL20 *((volatile unsigned int*)(0x424017B0UL))
|
|
#define bFM3_MFT0_ADCMP_ACSA_SEL21 *((volatile unsigned int*)(0x424017B4UL))
|
|
#define bFM3_MFT0_ADCMP_ATSA_AD0S0 *((volatile unsigned int*)(0x42401800UL))
|
|
#define bFM3_MFT0_ADCMP_ATSA_AD0S1 *((volatile unsigned int*)(0x42401804UL))
|
|
#define bFM3_MFT0_ADCMP_ATSA_AD1S0 *((volatile unsigned int*)(0x42401808UL))
|
|
#define bFM3_MFT0_ADCMP_ATSA_AD1S1 *((volatile unsigned int*)(0x4240180CUL))
|
|
#define bFM3_MFT0_ADCMP_ATSA_AD2S0 *((volatile unsigned int*)(0x42401810UL))
|
|
#define bFM3_MFT0_ADCMP_ATSA_AD2S1 *((volatile unsigned int*)(0x42401814UL))
|
|
#define bFM3_MFT0_ADCMP_ATSA_AD0P0 *((volatile unsigned int*)(0x42401820UL))
|
|
#define bFM3_MFT0_ADCMP_ATSA_AD0P1 *((volatile unsigned int*)(0x42401824UL))
|
|
#define bFM3_MFT0_ADCMP_ATSA_AD1P0 *((volatile unsigned int*)(0x42401828UL))
|
|
#define bFM3_MFT0_ADCMP_ATSA_AD1P1 *((volatile unsigned int*)(0x4240182CUL))
|
|
#define bFM3_MFT0_ADCMP_ATSA_AD2P0 *((volatile unsigned int*)(0x42401830UL))
|
|
#define bFM3_MFT0_ADCMP_ATSA_AD2P1 *((volatile unsigned int*)(0x42401834UL))
|
|
|
|
/* Multifunction Timer unit 1 Free Running Timer registers */
|
|
#define bFM3_MFT1_FRT_TCSA0_CLK0 *((volatile unsigned int*)(0x42420600UL))
|
|
#define bFM3_MFT1_FRT_TCSA0_CLK1 *((volatile unsigned int*)(0x42420604UL))
|
|
#define bFM3_MFT1_FRT_TCSA0_CLK2 *((volatile unsigned int*)(0x42420608UL))
|
|
#define bFM3_MFT1_FRT_TCSA0_CLK3 *((volatile unsigned int*)(0x4242060CUL))
|
|
#define bFM3_MFT1_FRT_TCSA0_SCLR *((volatile unsigned int*)(0x42420610UL))
|
|
#define bFM3_MFT1_FRT_TCSA0_MODE *((volatile unsigned int*)(0x42420614UL))
|
|
#define bFM3_MFT1_FRT_TCSA0_STOP *((volatile unsigned int*)(0x42420618UL))
|
|
#define bFM3_MFT1_FRT_TCSA0_BFE *((volatile unsigned int*)(0x4242061CUL))
|
|
#define bFM3_MFT1_FRT_TCSA0_ICRE *((volatile unsigned int*)(0x42420620UL))
|
|
#define bFM3_MFT1_FRT_TCSA0_ICLR *((volatile unsigned int*)(0x42420624UL))
|
|
#define bFM3_MFT1_FRT_TCSA0_IRQZE *((volatile unsigned int*)(0x42420634UL))
|
|
#define bFM3_MFT1_FRT_TCSA0_IRQZF *((volatile unsigned int*)(0x42420638UL))
|
|
#define bFM3_MFT1_FRT_TCSA0_ECKE *((volatile unsigned int*)(0x4242063CUL))
|
|
#define bFM3_MFT1_FRT_TCSB0_AD0E *((volatile unsigned int*)(0x42420680UL))
|
|
#define bFM3_MFT1_FRT_TCSB0_AD1E *((volatile unsigned int*)(0x42420684UL))
|
|
#define bFM3_MFT1_FRT_TCSB0_AD2E *((volatile unsigned int*)(0x42420688UL))
|
|
#define bFM3_MFT1_FRT_TCSA1_CLK0 *((volatile unsigned int*)(0x42420800UL))
|
|
#define bFM3_MFT1_FRT_TCSA1_CLK1 *((volatile unsigned int*)(0x42420804UL))
|
|
#define bFM3_MFT1_FRT_TCSA1_CLK2 *((volatile unsigned int*)(0x42420808UL))
|
|
#define bFM3_MFT1_FRT_TCSA1_CLK3 *((volatile unsigned int*)(0x4242080CUL))
|
|
#define bFM3_MFT1_FRT_TCSA1_SCLR *((volatile unsigned int*)(0x42420810UL))
|
|
#define bFM3_MFT1_FRT_TCSA1_MODE *((volatile unsigned int*)(0x42420814UL))
|
|
#define bFM3_MFT1_FRT_TCSA1_STOP *((volatile unsigned int*)(0x42420818UL))
|
|
#define bFM3_MFT1_FRT_TCSA1_BFE *((volatile unsigned int*)(0x4242081CUL))
|
|
#define bFM3_MFT1_FRT_TCSA1_ICRE *((volatile unsigned int*)(0x42420820UL))
|
|
#define bFM3_MFT1_FRT_TCSA1_ICLR *((volatile unsigned int*)(0x42420824UL))
|
|
#define bFM3_MFT1_FRT_TCSA1_IRQZE *((volatile unsigned int*)(0x42420834UL))
|
|
#define bFM3_MFT1_FRT_TCSA1_IRQZF *((volatile unsigned int*)(0x42420838UL))
|
|
#define bFM3_MFT1_FRT_TCSA1_ECKE *((volatile unsigned int*)(0x4242083CUL))
|
|
#define bFM3_MFT1_FRT_TCSB1_AD0E *((volatile unsigned int*)(0x42420880UL))
|
|
#define bFM3_MFT1_FRT_TCSB1_AD1E *((volatile unsigned int*)(0x42420884UL))
|
|
#define bFM3_MFT1_FRT_TCSB1_AD2E *((volatile unsigned int*)(0x42420888UL))
|
|
#define bFM3_MFT1_FRT_TCSA2_CLK0 *((volatile unsigned int*)(0x42420A00UL))
|
|
#define bFM3_MFT1_FRT_TCSA2_CLK1 *((volatile unsigned int*)(0x42420A04UL))
|
|
#define bFM3_MFT1_FRT_TCSA2_CLK2 *((volatile unsigned int*)(0x42420A08UL))
|
|
#define bFM3_MFT1_FRT_TCSA2_CLK3 *((volatile unsigned int*)(0x42420A0CUL))
|
|
#define bFM3_MFT1_FRT_TCSA2_SCLR *((volatile unsigned int*)(0x42420A10UL))
|
|
#define bFM3_MFT1_FRT_TCSA2_MODE *((volatile unsigned int*)(0x42420A14UL))
|
|
#define bFM3_MFT1_FRT_TCSA2_STOP *((volatile unsigned int*)(0x42420A18UL))
|
|
#define bFM3_MFT1_FRT_TCSA2_BFE *((volatile unsigned int*)(0x42420A1CUL))
|
|
#define bFM3_MFT1_FRT_TCSA2_ICRE *((volatile unsigned int*)(0x42420A20UL))
|
|
#define bFM3_MFT1_FRT_TCSA2_ICLR *((volatile unsigned int*)(0x42420A24UL))
|
|
#define bFM3_MFT1_FRT_TCSA2_IRQZE *((volatile unsigned int*)(0x42420A34UL))
|
|
#define bFM3_MFT1_FRT_TCSA2_IRQZF *((volatile unsigned int*)(0x42420A38UL))
|
|
#define bFM3_MFT1_FRT_TCSA2_ECKE *((volatile unsigned int*)(0x42420A3CUL))
|
|
#define bFM3_MFT1_FRT_TCSB2_AD0E *((volatile unsigned int*)(0x42420A80UL))
|
|
#define bFM3_MFT1_FRT_TCSB2_AD1E *((volatile unsigned int*)(0x42420A84UL))
|
|
#define bFM3_MFT1_FRT_TCSB2_AD2E *((volatile unsigned int*)(0x42420A88UL))
|
|
|
|
/* Multifunction Timer unit 1 Output Compare Unit registers */
|
|
#define bFM3_MFT1_OCU_OCSA10_CST0 *((volatile unsigned int*)(0x42420300UL))
|
|
#define bFM3_MFT1_OCU_OCSA10_CST1 *((volatile unsigned int*)(0x42420304UL))
|
|
#define bFM3_MFT1_OCU_OCSA10_BDIS0 *((volatile unsigned int*)(0x42420308UL))
|
|
#define bFM3_MFT1_OCU_OCSA10_BDIS1 *((volatile unsigned int*)(0x4242030CUL))
|
|
#define bFM3_MFT1_OCU_OCSA10_IOE0 *((volatile unsigned int*)(0x42420310UL))
|
|
#define bFM3_MFT1_OCU_OCSA10_IOE1 *((volatile unsigned int*)(0x42420314UL))
|
|
#define bFM3_MFT1_OCU_OCSA10_IOP0 *((volatile unsigned int*)(0x42420318UL))
|
|
#define bFM3_MFT1_OCU_OCSA10_IOP1 *((volatile unsigned int*)(0x4242031CUL))
|
|
#define bFM3_MFT1_OCU_OCSB10_OTD0 *((volatile unsigned int*)(0x42420320UL))
|
|
#define bFM3_MFT1_OCU_OCSB10_OTD1 *((volatile unsigned int*)(0x42420324UL))
|
|
#define bFM3_MFT1_OCU_OCSB10_CMOD *((volatile unsigned int*)(0x42420330UL))
|
|
#define bFM3_MFT1_OCU_OCSB10_BTS0 *((volatile unsigned int*)(0x42420334UL))
|
|
#define bFM3_MFT1_OCU_OCSB10_BTS1 *((volatile unsigned int*)(0x42420338UL))
|
|
#define bFM3_MFT1_OCU_OCSA32_CST2 *((volatile unsigned int*)(0x42420380UL))
|
|
#define bFM3_MFT1_OCU_OCSA32_CST3 *((volatile unsigned int*)(0x42420384UL))
|
|
#define bFM3_MFT1_OCU_OCSA32_BDIS2 *((volatile unsigned int*)(0x42420388UL))
|
|
#define bFM3_MFT1_OCU_OCSA32_BDIS3 *((volatile unsigned int*)(0x4242038CUL))
|
|
#define bFM3_MFT1_OCU_OCSA32_IOE2 *((volatile unsigned int*)(0x42420390UL))
|
|
#define bFM3_MFT1_OCU_OCSA32_IOE3 *((volatile unsigned int*)(0x42420394UL))
|
|
#define bFM3_MFT1_OCU_OCSA32_IOP2 *((volatile unsigned int*)(0x42420398UL))
|
|
#define bFM3_MFT1_OCU_OCSA32_IOP3 *((volatile unsigned int*)(0x4242039CUL))
|
|
#define bFM3_MFT1_OCU_OCSB32_OTD2 *((volatile unsigned int*)(0x424203A0UL))
|
|
#define bFM3_MFT1_OCU_OCSB32_OTD3 *((volatile unsigned int*)(0x424203A4UL))
|
|
#define bFM3_MFT1_OCU_OCSB32_CMOD *((volatile unsigned int*)(0x424203B0UL))
|
|
#define bFM3_MFT1_OCU_OCSB32_BTS2 *((volatile unsigned int*)(0x424203B4UL))
|
|
#define bFM3_MFT1_OCU_OCSB32_BTS3 *((volatile unsigned int*)(0x424203B8UL))
|
|
#define bFM3_MFT1_OCU_OCSA54_CST4 *((volatile unsigned int*)(0x42420400UL))
|
|
#define bFM3_MFT1_OCU_OCSA54_CST5 *((volatile unsigned int*)(0x42420404UL))
|
|
#define bFM3_MFT1_OCU_OCSA54_BDIS4 *((volatile unsigned int*)(0x42420408UL))
|
|
#define bFM3_MFT1_OCU_OCSA54_BDIS5 *((volatile unsigned int*)(0x4242040CUL))
|
|
#define bFM3_MFT1_OCU_OCSA54_IOE4 *((volatile unsigned int*)(0x42420410UL))
|
|
#define bFM3_MFT1_OCU_OCSA54_IOE5 *((volatile unsigned int*)(0x42420414UL))
|
|
#define bFM3_MFT1_OCU_OCSA54_IOP4 *((volatile unsigned int*)(0x42420418UL))
|
|
#define bFM3_MFT1_OCU_OCSA54_IOP5 *((volatile unsigned int*)(0x4242041CUL))
|
|
#define bFM3_MFT1_OCU_OCSB54_OTD4 *((volatile unsigned int*)(0x42420420UL))
|
|
#define bFM3_MFT1_OCU_OCSB54_OTD5 *((volatile unsigned int*)(0x42420424UL))
|
|
#define bFM3_MFT1_OCU_OCSB54_CMOD *((volatile unsigned int*)(0x42420430UL))
|
|
#define bFM3_MFT1_OCU_OCSB54_BTS4 *((volatile unsigned int*)(0x42420434UL))
|
|
#define bFM3_MFT1_OCU_OCSB54_BTS5 *((volatile unsigned int*)(0x42420438UL))
|
|
#define bFM3_MFT1_OCU_OCSC_MOD0 *((volatile unsigned int*)(0x424204A0UL))
|
|
#define bFM3_MFT1_OCU_OCSC_MOD1 *((volatile unsigned int*)(0x424204A4UL))
|
|
#define bFM3_MFT1_OCU_OCSC_MOD2 *((volatile unsigned int*)(0x424204A8UL))
|
|
#define bFM3_MFT1_OCU_OCSC_MOD3 *((volatile unsigned int*)(0x424204ACUL))
|
|
#define bFM3_MFT1_OCU_OCSC_MOD4 *((volatile unsigned int*)(0x424204B0UL))
|
|
#define bFM3_MFT1_OCU_OCSC_MOD5 *((volatile unsigned int*)(0x424204B4UL))
|
|
#define bFM3_MFT1_OCU_OCFS10_FSO00 *((volatile unsigned int*)(0x42420B00UL))
|
|
#define bFM3_MFT1_OCU_OCFS10_FSO01 *((volatile unsigned int*)(0x42420B04UL))
|
|
#define bFM3_MFT1_OCU_OCFS10_FSO02 *((volatile unsigned int*)(0x42420B08UL))
|
|
#define bFM3_MFT1_OCU_OCFS10_FSO03 *((volatile unsigned int*)(0x42420B0CUL))
|
|
#define bFM3_MFT1_OCU_OCFS10_FSO10 *((volatile unsigned int*)(0x42420B10UL))
|
|
#define bFM3_MFT1_OCU_OCFS10_FSO11 *((volatile unsigned int*)(0x42420B14UL))
|
|
#define bFM3_MFT1_OCU_OCFS10_FSO12 *((volatile unsigned int*)(0x42420B18UL))
|
|
#define bFM3_MFT1_OCU_OCFS10_FSO13 *((volatile unsigned int*)(0x42420B1CUL))
|
|
#define bFM3_MFT1_OCU_OCFS32_FSO20 *((volatile unsigned int*)(0x42420B20UL))
|
|
#define bFM3_MFT1_OCU_OCFS32_FSO21 *((volatile unsigned int*)(0x42420B24UL))
|
|
#define bFM3_MFT1_OCU_OCFS32_FSO22 *((volatile unsigned int*)(0x42420B28UL))
|
|
#define bFM3_MFT1_OCU_OCFS32_FSO23 *((volatile unsigned int*)(0x42420B2CUL))
|
|
#define bFM3_MFT1_OCU_OCFS32_FSO30 *((volatile unsigned int*)(0x42420B30UL))
|
|
#define bFM3_MFT1_OCU_OCFS32_FSO31 *((volatile unsigned int*)(0x42420B34UL))
|
|
#define bFM3_MFT1_OCU_OCFS32_FSO32 *((volatile unsigned int*)(0x42420B38UL))
|
|
#define bFM3_MFT1_OCU_OCFS32_FSO33 *((volatile unsigned int*)(0x42420B3CUL))
|
|
#define bFM3_MFT1_OCU_OCFS54_FSO40 *((volatile unsigned int*)(0x42420B80UL))
|
|
#define bFM3_MFT1_OCU_OCFS54_FSO41 *((volatile unsigned int*)(0x42420B84UL))
|
|
#define bFM3_MFT1_OCU_OCFS54_FSO42 *((volatile unsigned int*)(0x42420B88UL))
|
|
#define bFM3_MFT1_OCU_OCFS54_FSO43 *((volatile unsigned int*)(0x42420B8CUL))
|
|
#define bFM3_MFT1_OCU_OCFS54_FSO50 *((volatile unsigned int*)(0x42420B90UL))
|
|
#define bFM3_MFT1_OCU_OCFS54_FSO51 *((volatile unsigned int*)(0x42420B94UL))
|
|
#define bFM3_MFT1_OCU_OCFS54_FSO52 *((volatile unsigned int*)(0x42420B98UL))
|
|
#define bFM3_MFT1_OCU_OCFS54_FSO53 *((volatile unsigned int*)(0x42420B9CUL))
|
|
|
|
/* Multifunction Timer unit 1 Waveform Generator and Noise Canceler registers */
|
|
#define bFM3_MFT1_WFG_WFSA10_DCK0 *((volatile unsigned int*)(0x42421180UL))
|
|
#define bFM3_MFT1_WFG_WFSA10_DCK1 *((volatile unsigned int*)(0x42421184UL))
|
|
#define bFM3_MFT1_WFG_WFSA10_DCK2 *((volatile unsigned int*)(0x42421188UL))
|
|
#define bFM3_MFT1_WFG_WFSA10_TMD0 *((volatile unsigned int*)(0x4242118CUL))
|
|
#define bFM3_MFT1_WFG_WFSA10_TMD1 *((volatile unsigned int*)(0x42421190UL))
|
|
#define bFM3_MFT1_WFG_WFSA10_TMD2 *((volatile unsigned int*)(0x42421194UL))
|
|
#define bFM3_MFT1_WFG_WFSA10_GTEN0 *((volatile unsigned int*)(0x42421198UL))
|
|
#define bFM3_MFT1_WFG_WFSA10_GTEN1 *((volatile unsigned int*)(0x4242119CUL))
|
|
#define bFM3_MFT1_WFG_WFSA10_PSEL0 *((volatile unsigned int*)(0x424211A0UL))
|
|
#define bFM3_MFT1_WFG_WFSA10_PSEL1 *((volatile unsigned int*)(0x424211A4UL))
|
|
#define bFM3_MFT1_WFG_WFSA10_PGEN0 *((volatile unsigned int*)(0x424211A8UL))
|
|
#define bFM3_MFT1_WFG_WFSA10_PGEN1 *((volatile unsigned int*)(0x424211ACUL))
|
|
#define bFM3_MFT1_WFG_WFSA10_DMOD *((volatile unsigned int*)(0x424211B0UL))
|
|
#define bFM3_MFT1_WFG_WFSA32_DCK0 *((volatile unsigned int*)(0x42421200UL))
|
|
#define bFM3_MFT1_WFG_WFSA32_DCK1 *((volatile unsigned int*)(0x42421204UL))
|
|
#define bFM3_MFT1_WFG_WFSA32_DCK2 *((volatile unsigned int*)(0x42421208UL))
|
|
#define bFM3_MFT1_WFG_WFSA32_TMD0 *((volatile unsigned int*)(0x4242120CUL))
|
|
#define bFM3_MFT1_WFG_WFSA32_TMD1 *((volatile unsigned int*)(0x42421210UL))
|
|
#define bFM3_MFT1_WFG_WFSA32_TMD2 *((volatile unsigned int*)(0x42421214UL))
|
|
#define bFM3_MFT1_WFG_WFSA32_GTEN0 *((volatile unsigned int*)(0x42421218UL))
|
|
#define bFM3_MFT1_WFG_WFSA32_GTEN1 *((volatile unsigned int*)(0x4242121CUL))
|
|
#define bFM3_MFT1_WFG_WFSA32_PSEL0 *((volatile unsigned int*)(0x42421220UL))
|
|
#define bFM3_MFT1_WFG_WFSA32_PSEL1 *((volatile unsigned int*)(0x42421224UL))
|
|
#define bFM3_MFT1_WFG_WFSA32_PGEN0 *((volatile unsigned int*)(0x42421228UL))
|
|
#define bFM3_MFT1_WFG_WFSA32_PGEN1 *((volatile unsigned int*)(0x4242122CUL))
|
|
#define bFM3_MFT1_WFG_WFSA32_DMOD *((volatile unsigned int*)(0x42421230UL))
|
|
#define bFM3_MFT1_WFG_WFSA54_DCK0 *((volatile unsigned int*)(0x42421280UL))
|
|
#define bFM3_MFT1_WFG_WFSA54_DCK1 *((volatile unsigned int*)(0x42421284UL))
|
|
#define bFM3_MFT1_WFG_WFSA54_DCK2 *((volatile unsigned int*)(0x42421288UL))
|
|
#define bFM3_MFT1_WFG_WFSA54_TMD0 *((volatile unsigned int*)(0x4242128CUL))
|
|
#define bFM3_MFT1_WFG_WFSA54_TMD1 *((volatile unsigned int*)(0x42421290UL))
|
|
#define bFM3_MFT1_WFG_WFSA54_TMD2 *((volatile unsigned int*)(0x42421294UL))
|
|
#define bFM3_MFT1_WFG_WFSA54_GTEN0 *((volatile unsigned int*)(0x42421298UL))
|
|
#define bFM3_MFT1_WFG_WFSA54_GTEN1 *((volatile unsigned int*)(0x4242129CUL))
|
|
#define bFM3_MFT1_WFG_WFSA54_PSEL0 *((volatile unsigned int*)(0x424212A0UL))
|
|
#define bFM3_MFT1_WFG_WFSA54_PSEL1 *((volatile unsigned int*)(0x424212A4UL))
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#define bFM3_MFT1_WFG_WFSA54_PGEN0 *((volatile unsigned int*)(0x424212A8UL))
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#define bFM3_MFT1_WFG_WFSA54_PGEN1 *((volatile unsigned int*)(0x424212ACUL))
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#define bFM3_MFT1_WFG_WFSA54_DMOD *((volatile unsigned int*)(0x424212B0UL))
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#define bFM3_MFT1_WFG_WFIR_DTIF *((volatile unsigned int*)(0x42421300UL))
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#define bFM3_MFT1_WFG_WFIR_DTIC *((volatile unsigned int*)(0x42421304UL))
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#define bFM3_MFT1_WFG_WFIR_TMIF10 *((volatile unsigned int*)(0x42421310UL))
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#define bFM3_MFT1_WFG_WFIR_TMIC10 *((volatile unsigned int*)(0x42421314UL))
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#define bFM3_MFT1_WFG_WFIR_TMIE10 *((volatile unsigned int*)(0x42421318UL))
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#define bFM3_MFT1_WFG_WFIR_TMIS10 *((volatile unsigned int*)(0x4242131CUL))
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#define bFM3_MFT1_WFG_WFIR_TMIF32 *((volatile unsigned int*)(0x42421320UL))
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#define bFM3_MFT1_WFG_WFIR_TMIC32 *((volatile unsigned int*)(0x42421324UL))
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#define bFM3_MFT1_WFG_WFIR_TMIE32 *((volatile unsigned int*)(0x42421328UL))
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#define bFM3_MFT1_WFG_WFIR_TMIS32 *((volatile unsigned int*)(0x4242132CUL))
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#define bFM3_MFT1_WFG_WFIR_TMIF54 *((volatile unsigned int*)(0x42421330UL))
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#define bFM3_MFT1_WFG_WFIR_TMIC54 *((volatile unsigned int*)(0x42421334UL))
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#define bFM3_MFT1_WFG_WFIR_TMIE54 *((volatile unsigned int*)(0x42421338UL))
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#define bFM3_MFT1_WFG_WFIR_TMIS54 *((volatile unsigned int*)(0x4242133CUL))
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#define bFM3_MFT1_WFG_NZCL_DTIE *((volatile unsigned int*)(0x42421380UL))
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#define bFM3_MFT1_WFG_NZCL_NWS0 *((volatile unsigned int*)(0x42421384UL))
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#define bFM3_MFT1_WFG_NZCL_NWS1 *((volatile unsigned int*)(0x42421388UL))
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#define bFM3_MFT1_WFG_NZCL_NWS2 *((volatile unsigned int*)(0x4242138CUL))
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#define bFM3_MFT1_WFG_NZCL_SDTI *((volatile unsigned int*)(0x42421390UL))
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/* Multifunction Timer unit 1 Input Capture Unit registers */
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#define bFM3_MFT1_ICU_ICFS10_FSI00 *((volatile unsigned int*)(0x42420C00UL))
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#define bFM3_MFT1_ICU_ICFS10_FSI01 *((volatile unsigned int*)(0x42420C04UL))
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#define bFM3_MFT1_ICU_ICFS10_FSI02 *((volatile unsigned int*)(0x42420C08UL))
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#define bFM3_MFT1_ICU_ICFS10_FSI03 *((volatile unsigned int*)(0x42420C0CUL))
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#define bFM3_MFT1_ICU_ICFS10_FSI10 *((volatile unsigned int*)(0x42420C10UL))
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#define bFM3_MFT1_ICU_ICFS10_FSI11 *((volatile unsigned int*)(0x42420C14UL))
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#define bFM3_MFT1_ICU_ICFS10_FSI12 *((volatile unsigned int*)(0x42420C18UL))
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#define bFM3_MFT1_ICU_ICFS10_FSI13 *((volatile unsigned int*)(0x42420C1CUL))
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#define bFM3_MFT1_ICU_ICFS32_FSI20 *((volatile unsigned int*)(0x42420C20UL))
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#define bFM3_MFT1_ICU_ICFS32_FSI21 *((volatile unsigned int*)(0x42420C24UL))
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#define bFM3_MFT1_ICU_ICFS32_FSI22 *((volatile unsigned int*)(0x42420C28UL))
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#define bFM3_MFT1_ICU_ICFS32_FSI23 *((volatile unsigned int*)(0x42420C2CUL))
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#define bFM3_MFT1_ICU_ICFS32_FSI30 *((volatile unsigned int*)(0x42420C30UL))
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|
#define bFM3_MFT1_ICU_ICFS32_FSI31 *((volatile unsigned int*)(0x42420C34UL))
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#define bFM3_MFT1_ICU_ICFS32_FSI32 *((volatile unsigned int*)(0x42420C38UL))
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|
#define bFM3_MFT1_ICU_ICFS32_FSI33 *((volatile unsigned int*)(0x42420C3CUL))
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|
#define bFM3_MFT1_ICU_ICSA10_EG00 *((volatile unsigned int*)(0x42420F00UL))
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|
#define bFM3_MFT1_ICU_ICSA10_EG01 *((volatile unsigned int*)(0x42420F04UL))
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#define bFM3_MFT1_ICU_ICSA10_EG10 *((volatile unsigned int*)(0x42420F08UL))
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#define bFM3_MFT1_ICU_ICSA10_EG11 *((volatile unsigned int*)(0x42420F0CUL))
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|
#define bFM3_MFT1_ICU_ICSA10_ICE0 *((volatile unsigned int*)(0x42420F10UL))
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|
#define bFM3_MFT1_ICU_ICSA10_ICE1 *((volatile unsigned int*)(0x42420F14UL))
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|
#define bFM3_MFT1_ICU_ICSA10_ICP0 *((volatile unsigned int*)(0x42420F18UL))
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|
#define bFM3_MFT1_ICU_ICSA10_ICP1 *((volatile unsigned int*)(0x42420F1CUL))
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#define bFM3_MFT1_ICU_ICSB10_IEI0 *((volatile unsigned int*)(0x42420F20UL))
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|
#define bFM3_MFT1_ICU_ICSB10_IEI1 *((volatile unsigned int*)(0x42420F24UL))
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|
#define bFM3_MFT1_ICU_ICSA32_EG20 *((volatile unsigned int*)(0x42420F80UL))
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|
#define bFM3_MFT1_ICU_ICSA32_EG21 *((volatile unsigned int*)(0x42420F84UL))
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|
#define bFM3_MFT1_ICU_ICSA32_EG30 *((volatile unsigned int*)(0x42420F88UL))
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|
#define bFM3_MFT1_ICU_ICSA32_EG31 *((volatile unsigned int*)(0x42420F8CUL))
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|
#define bFM3_MFT1_ICU_ICSA32_ICE2 *((volatile unsigned int*)(0x42420F90UL))
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|
#define bFM3_MFT1_ICU_ICSA32_ICE3 *((volatile unsigned int*)(0x42420F94UL))
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|
#define bFM3_MFT1_ICU_ICSA32_ICP2 *((volatile unsigned int*)(0x42420F98UL))
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|
#define bFM3_MFT1_ICU_ICSA32_ICP3 *((volatile unsigned int*)(0x42420F9CUL))
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|
#define bFM3_MFT1_ICU_ICSB32_IEI2 *((volatile unsigned int*)(0x42420FA0UL))
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|
#define bFM3_MFT1_ICU_ICSB32_IEI3 *((volatile unsigned int*)(0x42420FA4UL))
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|
|
|
/* Multifunction Timer unit 1 ADC Start Compare Unit registers */
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#define bFM3_MFT1_ADCMP_ACSB_BDIS0 *((volatile unsigned int*)(0x42421700UL))
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|
#define bFM3_MFT1_ADCMP_ACSB_BDIS1 *((volatile unsigned int*)(0x42421704UL))
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#define bFM3_MFT1_ADCMP_ACSB_BDIS2 *((volatile unsigned int*)(0x42421708UL))
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|
#define bFM3_MFT1_ADCMP_ACSB_BTS0 *((volatile unsigned int*)(0x42421710UL))
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|
#define bFM3_MFT1_ADCMP_ACSB_BTS1 *((volatile unsigned int*)(0x42421714UL))
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|
#define bFM3_MFT1_ADCMP_ACSB_BTS2 *((volatile unsigned int*)(0x42421718UL))
|
|
#define bFM3_MFT1_ADCMP_ACSA_CE00 *((volatile unsigned int*)(0x42421780UL))
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|
#define bFM3_MFT1_ADCMP_ACSA_CE01 *((volatile unsigned int*)(0x42421784UL))
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|
#define bFM3_MFT1_ADCMP_ACSA_CE10 *((volatile unsigned int*)(0x42421788UL))
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|
#define bFM3_MFT1_ADCMP_ACSA_CE11 *((volatile unsigned int*)(0x4242178CUL))
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|
#define bFM3_MFT1_ADCMP_ACSA_CE20 *((volatile unsigned int*)(0x42421790UL))
|
|
#define bFM3_MFT1_ADCMP_ACSA_CE21 *((volatile unsigned int*)(0x42421794UL))
|
|
#define bFM3_MFT1_ADCMP_ACSA_SEL00 *((volatile unsigned int*)(0x424217A0UL))
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|
#define bFM3_MFT1_ADCMP_ACSA_SEL01 *((volatile unsigned int*)(0x424217A4UL))
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|
#define bFM3_MFT1_ADCMP_ACSA_SEL10 *((volatile unsigned int*)(0x424217A8UL))
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|
#define bFM3_MFT1_ADCMP_ACSA_SEL11 *((volatile unsigned int*)(0x424217ACUL))
|
|
#define bFM3_MFT1_ADCMP_ACSA_SEL20 *((volatile unsigned int*)(0x424217B0UL))
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|
#define bFM3_MFT1_ADCMP_ACSA_SEL21 *((volatile unsigned int*)(0x424217B4UL))
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|
#define bFM3_MFT1_ADCMP_ATSA_AD0S0 *((volatile unsigned int*)(0x42421800UL))
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|
#define bFM3_MFT1_ADCMP_ATSA_AD0S1 *((volatile unsigned int*)(0x42421804UL))
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|
#define bFM3_MFT1_ADCMP_ATSA_AD1S0 *((volatile unsigned int*)(0x42421808UL))
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#define bFM3_MFT1_ADCMP_ATSA_AD1S1 *((volatile unsigned int*)(0x4242180CUL))
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|
#define bFM3_MFT1_ADCMP_ATSA_AD2S0 *((volatile unsigned int*)(0x42421810UL))
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#define bFM3_MFT1_ADCMP_ATSA_AD2S1 *((volatile unsigned int*)(0x42421814UL))
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#define bFM3_MFT1_ADCMP_ATSA_AD0P0 *((volatile unsigned int*)(0x42421820UL))
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#define bFM3_MFT1_ADCMP_ATSA_AD0P1 *((volatile unsigned int*)(0x42421824UL))
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#define bFM3_MFT1_ADCMP_ATSA_AD1P0 *((volatile unsigned int*)(0x42421828UL))
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#define bFM3_MFT1_ADCMP_ATSA_AD1P1 *((volatile unsigned int*)(0x4242182CUL))
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#define bFM3_MFT1_ADCMP_ATSA_AD2P0 *((volatile unsigned int*)(0x42421830UL))
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#define bFM3_MFT1_ADCMP_ATSA_AD2P1 *((volatile unsigned int*)(0x42421834UL))
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/* Multifunction Timer unit 2 Free Running Timer registers */
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#define bFM3_MFT2_FRT_TCSA0_CLK0 *((volatile unsigned int*)(0x42440600UL))
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#define bFM3_MFT2_FRT_TCSA0_CLK1 *((volatile unsigned int*)(0x42440604UL))
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#define bFM3_MFT2_FRT_TCSA0_CLK2 *((volatile unsigned int*)(0x42440608UL))
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#define bFM3_MFT2_FRT_TCSA0_CLK3 *((volatile unsigned int*)(0x4244060CUL))
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#define bFM3_MFT2_FRT_TCSA0_SCLR *((volatile unsigned int*)(0x42440610UL))
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#define bFM3_MFT2_FRT_TCSA0_MODE *((volatile unsigned int*)(0x42440614UL))
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#define bFM3_MFT2_FRT_TCSA0_STOP *((volatile unsigned int*)(0x42440618UL))
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#define bFM3_MFT2_FRT_TCSA0_BFE *((volatile unsigned int*)(0x4244061CUL))
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#define bFM3_MFT2_FRT_TCSA0_ICRE *((volatile unsigned int*)(0x42440620UL))
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#define bFM3_MFT2_FRT_TCSA0_ICLR *((volatile unsigned int*)(0x42440624UL))
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#define bFM3_MFT2_FRT_TCSA0_IRQZE *((volatile unsigned int*)(0x42440634UL))
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#define bFM3_MFT2_FRT_TCSA0_IRQZF *((volatile unsigned int*)(0x42440638UL))
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#define bFM3_MFT2_FRT_TCSA0_ECKE *((volatile unsigned int*)(0x4244063CUL))
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#define bFM3_MFT2_FRT_TCSB0_AD0E *((volatile unsigned int*)(0x42440680UL))
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#define bFM3_MFT2_FRT_TCSB0_AD1E *((volatile unsigned int*)(0x42440684UL))
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#define bFM3_MFT2_FRT_TCSB0_AD2E *((volatile unsigned int*)(0x42440688UL))
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#define bFM3_MFT2_FRT_TCSA1_CLK0 *((volatile unsigned int*)(0x42440800UL))
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#define bFM3_MFT2_FRT_TCSA1_CLK1 *((volatile unsigned int*)(0x42440804UL))
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#define bFM3_MFT2_FRT_TCSA1_CLK2 *((volatile unsigned int*)(0x42440808UL))
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#define bFM3_MFT2_FRT_TCSA1_CLK3 *((volatile unsigned int*)(0x4244080CUL))
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#define bFM3_MFT2_FRT_TCSA1_SCLR *((volatile unsigned int*)(0x42440810UL))
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#define bFM3_MFT2_FRT_TCSA1_MODE *((volatile unsigned int*)(0x42440814UL))
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#define bFM3_MFT2_FRT_TCSA1_STOP *((volatile unsigned int*)(0x42440818UL))
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#define bFM3_MFT2_FRT_TCSA1_BFE *((volatile unsigned int*)(0x4244081CUL))
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#define bFM3_MFT2_FRT_TCSA1_ICRE *((volatile unsigned int*)(0x42440820UL))
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#define bFM3_MFT2_FRT_TCSA1_ICLR *((volatile unsigned int*)(0x42440824UL))
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#define bFM3_MFT2_FRT_TCSA1_IRQZE *((volatile unsigned int*)(0x42440834UL))
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#define bFM3_MFT2_FRT_TCSA1_IRQZF *((volatile unsigned int*)(0x42440838UL))
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#define bFM3_MFT2_FRT_TCSA1_ECKE *((volatile unsigned int*)(0x4244083CUL))
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#define bFM3_MFT2_FRT_TCSB1_AD0E *((volatile unsigned int*)(0x42440880UL))
|
|
#define bFM3_MFT2_FRT_TCSB1_AD1E *((volatile unsigned int*)(0x42440884UL))
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|
#define bFM3_MFT2_FRT_TCSB1_AD2E *((volatile unsigned int*)(0x42440888UL))
|
|
#define bFM3_MFT2_FRT_TCSA2_CLK0 *((volatile unsigned int*)(0x42440A00UL))
|
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#define bFM3_MFT2_FRT_TCSA2_CLK1 *((volatile unsigned int*)(0x42440A04UL))
|
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#define bFM3_MFT2_FRT_TCSA2_CLK2 *((volatile unsigned int*)(0x42440A08UL))
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#define bFM3_MFT2_FRT_TCSA2_CLK3 *((volatile unsigned int*)(0x42440A0CUL))
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|
#define bFM3_MFT2_FRT_TCSA2_SCLR *((volatile unsigned int*)(0x42440A10UL))
|
|
#define bFM3_MFT2_FRT_TCSA2_MODE *((volatile unsigned int*)(0x42440A14UL))
|
|
#define bFM3_MFT2_FRT_TCSA2_STOP *((volatile unsigned int*)(0x42440A18UL))
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|
#define bFM3_MFT2_FRT_TCSA2_BFE *((volatile unsigned int*)(0x42440A1CUL))
|
|
#define bFM3_MFT2_FRT_TCSA2_ICRE *((volatile unsigned int*)(0x42440A20UL))
|
|
#define bFM3_MFT2_FRT_TCSA2_ICLR *((volatile unsigned int*)(0x42440A24UL))
|
|
#define bFM3_MFT2_FRT_TCSA2_IRQZE *((volatile unsigned int*)(0x42440A34UL))
|
|
#define bFM3_MFT2_FRT_TCSA2_IRQZF *((volatile unsigned int*)(0x42440A38UL))
|
|
#define bFM3_MFT2_FRT_TCSA2_ECKE *((volatile unsigned int*)(0x42440A3CUL))
|
|
#define bFM3_MFT2_FRT_TCSB2_AD0E *((volatile unsigned int*)(0x42440A80UL))
|
|
#define bFM3_MFT2_FRT_TCSB2_AD1E *((volatile unsigned int*)(0x42440A84UL))
|
|
#define bFM3_MFT2_FRT_TCSB2_AD2E *((volatile unsigned int*)(0x42440A88UL))
|
|
|
|
/* Multifunction Timer unit 2 Output Compare Unit registers */
|
|
#define bFM3_MFT2_OCU_OCSA10_CST0 *((volatile unsigned int*)(0x42440300UL))
|
|
#define bFM3_MFT2_OCU_OCSA10_CST1 *((volatile unsigned int*)(0x42440304UL))
|
|
#define bFM3_MFT2_OCU_OCSA10_BDIS0 *((volatile unsigned int*)(0x42440308UL))
|
|
#define bFM3_MFT2_OCU_OCSA10_BDIS1 *((volatile unsigned int*)(0x4244030CUL))
|
|
#define bFM3_MFT2_OCU_OCSA10_IOE0 *((volatile unsigned int*)(0x42440310UL))
|
|
#define bFM3_MFT2_OCU_OCSA10_IOE1 *((volatile unsigned int*)(0x42440314UL))
|
|
#define bFM3_MFT2_OCU_OCSA10_IOP0 *((volatile unsigned int*)(0x42440318UL))
|
|
#define bFM3_MFT2_OCU_OCSA10_IOP1 *((volatile unsigned int*)(0x4244031CUL))
|
|
#define bFM3_MFT2_OCU_OCSB10_OTD0 *((volatile unsigned int*)(0x42440320UL))
|
|
#define bFM3_MFT2_OCU_OCSB10_OTD1 *((volatile unsigned int*)(0x42440324UL))
|
|
#define bFM3_MFT2_OCU_OCSB10_CMOD *((volatile unsigned int*)(0x42440330UL))
|
|
#define bFM3_MFT2_OCU_OCSB10_BTS0 *((volatile unsigned int*)(0x42440334UL))
|
|
#define bFM3_MFT2_OCU_OCSB10_BTS1 *((volatile unsigned int*)(0x42440338UL))
|
|
#define bFM3_MFT2_OCU_OCSA32_CST2 *((volatile unsigned int*)(0x42440380UL))
|
|
#define bFM3_MFT2_OCU_OCSA32_CST3 *((volatile unsigned int*)(0x42440384UL))
|
|
#define bFM3_MFT2_OCU_OCSA32_BDIS2 *((volatile unsigned int*)(0x42440388UL))
|
|
#define bFM3_MFT2_OCU_OCSA32_BDIS3 *((volatile unsigned int*)(0x4244038CUL))
|
|
#define bFM3_MFT2_OCU_OCSA32_IOE2 *((volatile unsigned int*)(0x42440390UL))
|
|
#define bFM3_MFT2_OCU_OCSA32_IOE3 *((volatile unsigned int*)(0x42440394UL))
|
|
#define bFM3_MFT2_OCU_OCSA32_IOP2 *((volatile unsigned int*)(0x42440398UL))
|
|
#define bFM3_MFT2_OCU_OCSA32_IOP3 *((volatile unsigned int*)(0x4244039CUL))
|
|
#define bFM3_MFT2_OCU_OCSB32_OTD2 *((volatile unsigned int*)(0x424403A0UL))
|
|
#define bFM3_MFT2_OCU_OCSB32_OTD3 *((volatile unsigned int*)(0x424403A4UL))
|
|
#define bFM3_MFT2_OCU_OCSB32_CMOD *((volatile unsigned int*)(0x424403B0UL))
|
|
#define bFM3_MFT2_OCU_OCSB32_BTS2 *((volatile unsigned int*)(0x424403B4UL))
|
|
#define bFM3_MFT2_OCU_OCSB32_BTS3 *((volatile unsigned int*)(0x424403B8UL))
|
|
#define bFM3_MFT2_OCU_OCSA54_CST4 *((volatile unsigned int*)(0x42440400UL))
|
|
#define bFM3_MFT2_OCU_OCSA54_CST5 *((volatile unsigned int*)(0x42440404UL))
|
|
#define bFM3_MFT2_OCU_OCSA54_BDIS4 *((volatile unsigned int*)(0x42440408UL))
|
|
#define bFM3_MFT2_OCU_OCSA54_BDIS5 *((volatile unsigned int*)(0x4244040CUL))
|
|
#define bFM3_MFT2_OCU_OCSA54_IOE4 *((volatile unsigned int*)(0x42440410UL))
|
|
#define bFM3_MFT2_OCU_OCSA54_IOE5 *((volatile unsigned int*)(0x42440414UL))
|
|
#define bFM3_MFT2_OCU_OCSA54_IOP4 *((volatile unsigned int*)(0x42440418UL))
|
|
#define bFM3_MFT2_OCU_OCSA54_IOP5 *((volatile unsigned int*)(0x4244041CUL))
|
|
#define bFM3_MFT2_OCU_OCSB54_OTD4 *((volatile unsigned int*)(0x42440420UL))
|
|
#define bFM3_MFT2_OCU_OCSB54_OTD5 *((volatile unsigned int*)(0x42440424UL))
|
|
#define bFM3_MFT2_OCU_OCSB54_CMOD *((volatile unsigned int*)(0x42440430UL))
|
|
#define bFM3_MFT2_OCU_OCSB54_BTS4 *((volatile unsigned int*)(0x42440434UL))
|
|
#define bFM3_MFT2_OCU_OCSB54_BTS5 *((volatile unsigned int*)(0x42440438UL))
|
|
#define bFM3_MFT2_OCU_OCSC_MOD0 *((volatile unsigned int*)(0x424404A0UL))
|
|
#define bFM3_MFT2_OCU_OCSC_MOD1 *((volatile unsigned int*)(0x424404A4UL))
|
|
#define bFM3_MFT2_OCU_OCSC_MOD2 *((volatile unsigned int*)(0x424404A8UL))
|
|
#define bFM3_MFT2_OCU_OCSC_MOD3 *((volatile unsigned int*)(0x424404ACUL))
|
|
#define bFM3_MFT2_OCU_OCSC_MOD4 *((volatile unsigned int*)(0x424404B0UL))
|
|
#define bFM3_MFT2_OCU_OCSC_MOD5 *((volatile unsigned int*)(0x424404B4UL))
|
|
#define bFM3_MFT2_OCU_OCFS10_FSO00 *((volatile unsigned int*)(0x42440B00UL))
|
|
#define bFM3_MFT2_OCU_OCFS10_FSO01 *((volatile unsigned int*)(0x42440B04UL))
|
|
#define bFM3_MFT2_OCU_OCFS10_FSO02 *((volatile unsigned int*)(0x42440B08UL))
|
|
#define bFM3_MFT2_OCU_OCFS10_FSO03 *((volatile unsigned int*)(0x42440B0CUL))
|
|
#define bFM3_MFT2_OCU_OCFS10_FSO10 *((volatile unsigned int*)(0x42440B10UL))
|
|
#define bFM3_MFT2_OCU_OCFS10_FSO11 *((volatile unsigned int*)(0x42440B14UL))
|
|
#define bFM3_MFT2_OCU_OCFS10_FSO12 *((volatile unsigned int*)(0x42440B18UL))
|
|
#define bFM3_MFT2_OCU_OCFS10_FSO13 *((volatile unsigned int*)(0x42440B1CUL))
|
|
#define bFM3_MFT2_OCU_OCFS32_FSO20 *((volatile unsigned int*)(0x42440B20UL))
|
|
#define bFM3_MFT2_OCU_OCFS32_FSO21 *((volatile unsigned int*)(0x42440B24UL))
|
|
#define bFM3_MFT2_OCU_OCFS32_FSO22 *((volatile unsigned int*)(0x42440B28UL))
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#define bFM3_MFT2_OCU_OCFS32_FSO23 *((volatile unsigned int*)(0x42440B2CUL))
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#define bFM3_MFT2_OCU_OCFS32_FSO30 *((volatile unsigned int*)(0x42440B30UL))
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#define bFM3_MFT2_OCU_OCFS32_FSO31 *((volatile unsigned int*)(0x42440B34UL))
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|
#define bFM3_MFT2_OCU_OCFS32_FSO32 *((volatile unsigned int*)(0x42440B38UL))
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|
#define bFM3_MFT2_OCU_OCFS32_FSO33 *((volatile unsigned int*)(0x42440B3CUL))
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#define bFM3_MFT2_OCU_OCFS54_FSO40 *((volatile unsigned int*)(0x42440B80UL))
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|
#define bFM3_MFT2_OCU_OCFS54_FSO41 *((volatile unsigned int*)(0x42440B84UL))
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|
#define bFM3_MFT2_OCU_OCFS54_FSO42 *((volatile unsigned int*)(0x42440B88UL))
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#define bFM3_MFT2_OCU_OCFS54_FSO43 *((volatile unsigned int*)(0x42440B8CUL))
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#define bFM3_MFT2_OCU_OCFS54_FSO50 *((volatile unsigned int*)(0x42440B90UL))
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|
#define bFM3_MFT2_OCU_OCFS54_FSO51 *((volatile unsigned int*)(0x42440B94UL))
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|
#define bFM3_MFT2_OCU_OCFS54_FSO52 *((volatile unsigned int*)(0x42440B98UL))
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|
#define bFM3_MFT2_OCU_OCFS54_FSO53 *((volatile unsigned int*)(0x42440B9CUL))
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|
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/* Multifunction Timer unit 2 Waveform Generator and Noise Canceler registers */
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#define bFM3_MFT2_WFG_WFSA10_DCK0 *((volatile unsigned int*)(0x42441180UL))
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|
#define bFM3_MFT2_WFG_WFSA10_DCK1 *((volatile unsigned int*)(0x42441184UL))
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|
#define bFM3_MFT2_WFG_WFSA10_DCK2 *((volatile unsigned int*)(0x42441188UL))
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|
#define bFM3_MFT2_WFG_WFSA10_TMD0 *((volatile unsigned int*)(0x4244118CUL))
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#define bFM3_MFT2_WFG_WFSA10_TMD1 *((volatile unsigned int*)(0x42441190UL))
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#define bFM3_MFT2_WFG_WFSA10_TMD2 *((volatile unsigned int*)(0x42441194UL))
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#define bFM3_MFT2_WFG_WFSA10_GTEN0 *((volatile unsigned int*)(0x42441198UL))
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#define bFM3_MFT2_WFG_WFSA10_GTEN1 *((volatile unsigned int*)(0x4244119CUL))
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#define bFM3_MFT2_WFG_WFSA10_PSEL0 *((volatile unsigned int*)(0x424411A0UL))
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#define bFM3_MFT2_WFG_WFSA10_PSEL1 *((volatile unsigned int*)(0x424411A4UL))
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#define bFM3_MFT2_WFG_WFSA10_PGEN0 *((volatile unsigned int*)(0x424411A8UL))
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|
#define bFM3_MFT2_WFG_WFSA10_PGEN1 *((volatile unsigned int*)(0x424411ACUL))
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#define bFM3_MFT2_WFG_WFSA10_DMOD *((volatile unsigned int*)(0x424411B0UL))
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#define bFM3_MFT2_WFG_WFSA32_DCK0 *((volatile unsigned int*)(0x42441200UL))
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|
#define bFM3_MFT2_WFG_WFSA32_DCK1 *((volatile unsigned int*)(0x42441204UL))
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|
#define bFM3_MFT2_WFG_WFSA32_DCK2 *((volatile unsigned int*)(0x42441208UL))
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|
#define bFM3_MFT2_WFG_WFSA32_TMD0 *((volatile unsigned int*)(0x4244120CUL))
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|
#define bFM3_MFT2_WFG_WFSA32_TMD1 *((volatile unsigned int*)(0x42441210UL))
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|
#define bFM3_MFT2_WFG_WFSA32_TMD2 *((volatile unsigned int*)(0x42441214UL))
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|
#define bFM3_MFT2_WFG_WFSA32_GTEN0 *((volatile unsigned int*)(0x42441218UL))
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|
#define bFM3_MFT2_WFG_WFSA32_GTEN1 *((volatile unsigned int*)(0x4244121CUL))
|
|
#define bFM3_MFT2_WFG_WFSA32_PSEL0 *((volatile unsigned int*)(0x42441220UL))
|
|
#define bFM3_MFT2_WFG_WFSA32_PSEL1 *((volatile unsigned int*)(0x42441224UL))
|
|
#define bFM3_MFT2_WFG_WFSA32_PGEN0 *((volatile unsigned int*)(0x42441228UL))
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#define bFM3_MFT2_WFG_WFSA32_PGEN1 *((volatile unsigned int*)(0x4244122CUL))
|
|
#define bFM3_MFT2_WFG_WFSA32_DMOD *((volatile unsigned int*)(0x42441230UL))
|
|
#define bFM3_MFT2_WFG_WFSA54_DCK0 *((volatile unsigned int*)(0x42441280UL))
|
|
#define bFM3_MFT2_WFG_WFSA54_DCK1 *((volatile unsigned int*)(0x42441284UL))
|
|
#define bFM3_MFT2_WFG_WFSA54_DCK2 *((volatile unsigned int*)(0x42441288UL))
|
|
#define bFM3_MFT2_WFG_WFSA54_TMD0 *((volatile unsigned int*)(0x4244128CUL))
|
|
#define bFM3_MFT2_WFG_WFSA54_TMD1 *((volatile unsigned int*)(0x42441290UL))
|
|
#define bFM3_MFT2_WFG_WFSA54_TMD2 *((volatile unsigned int*)(0x42441294UL))
|
|
#define bFM3_MFT2_WFG_WFSA54_GTEN0 *((volatile unsigned int*)(0x42441298UL))
|
|
#define bFM3_MFT2_WFG_WFSA54_GTEN1 *((volatile unsigned int*)(0x4244129CUL))
|
|
#define bFM3_MFT2_WFG_WFSA54_PSEL0 *((volatile unsigned int*)(0x424412A0UL))
|
|
#define bFM3_MFT2_WFG_WFSA54_PSEL1 *((volatile unsigned int*)(0x424412A4UL))
|
|
#define bFM3_MFT2_WFG_WFSA54_PGEN0 *((volatile unsigned int*)(0x424412A8UL))
|
|
#define bFM3_MFT2_WFG_WFSA54_PGEN1 *((volatile unsigned int*)(0x424412ACUL))
|
|
#define bFM3_MFT2_WFG_WFSA54_DMOD *((volatile unsigned int*)(0x424412B0UL))
|
|
#define bFM3_MFT2_WFG_WFIR_DTIF *((volatile unsigned int*)(0x42441300UL))
|
|
#define bFM3_MFT2_WFG_WFIR_DTIC *((volatile unsigned int*)(0x42441304UL))
|
|
#define bFM3_MFT2_WFG_WFIR_TMIF10 *((volatile unsigned int*)(0x42441310UL))
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|
#define bFM3_MFT2_WFG_WFIR_TMIC10 *((volatile unsigned int*)(0x42441314UL))
|
|
#define bFM3_MFT2_WFG_WFIR_TMIE10 *((volatile unsigned int*)(0x42441318UL))
|
|
#define bFM3_MFT2_WFG_WFIR_TMIS10 *((volatile unsigned int*)(0x4244131CUL))
|
|
#define bFM3_MFT2_WFG_WFIR_TMIF32 *((volatile unsigned int*)(0x42441320UL))
|
|
#define bFM3_MFT2_WFG_WFIR_TMIC32 *((volatile unsigned int*)(0x42441324UL))
|
|
#define bFM3_MFT2_WFG_WFIR_TMIE32 *((volatile unsigned int*)(0x42441328UL))
|
|
#define bFM3_MFT2_WFG_WFIR_TMIS32 *((volatile unsigned int*)(0x4244132CUL))
|
|
#define bFM3_MFT2_WFG_WFIR_TMIF54 *((volatile unsigned int*)(0x42441330UL))
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|
#define bFM3_MFT2_WFG_WFIR_TMIC54 *((volatile unsigned int*)(0x42441334UL))
|
|
#define bFM3_MFT2_WFG_WFIR_TMIE54 *((volatile unsigned int*)(0x42441338UL))
|
|
#define bFM3_MFT2_WFG_WFIR_TMIS54 *((volatile unsigned int*)(0x4244133CUL))
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|
#define bFM3_MFT2_WFG_NZCL_DTIE *((volatile unsigned int*)(0x42441380UL))
|
|
#define bFM3_MFT2_WFG_NZCL_NWS0 *((volatile unsigned int*)(0x42441384UL))
|
|
#define bFM3_MFT2_WFG_NZCL_NWS1 *((volatile unsigned int*)(0x42441388UL))
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#define bFM3_MFT2_WFG_NZCL_NWS2 *((volatile unsigned int*)(0x4244138CUL))
|
|
#define bFM3_MFT2_WFG_NZCL_SDTI *((volatile unsigned int*)(0x42441390UL))
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|
|
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/* Multifunction Timer unit 2 Input Capture Unit registers */
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#define bFM3_MFT2_ICU_ICFS10_FSI00 *((volatile unsigned int*)(0x42440C00UL))
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#define bFM3_MFT2_ICU_ICFS10_FSI01 *((volatile unsigned int*)(0x42440C04UL))
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#define bFM3_MFT2_ICU_ICFS10_FSI02 *((volatile unsigned int*)(0x42440C08UL))
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#define bFM3_MFT2_ICU_ICFS10_FSI03 *((volatile unsigned int*)(0x42440C0CUL))
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#define bFM3_MFT2_ICU_ICFS10_FSI10 *((volatile unsigned int*)(0x42440C10UL))
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|
#define bFM3_MFT2_ICU_ICFS10_FSI11 *((volatile unsigned int*)(0x42440C14UL))
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|
#define bFM3_MFT2_ICU_ICFS10_FSI12 *((volatile unsigned int*)(0x42440C18UL))
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|
#define bFM3_MFT2_ICU_ICFS10_FSI13 *((volatile unsigned int*)(0x42440C1CUL))
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#define bFM3_MFT2_ICU_ICFS32_FSI20 *((volatile unsigned int*)(0x42440C20UL))
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#define bFM3_MFT2_ICU_ICFS32_FSI21 *((volatile unsigned int*)(0x42440C24UL))
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#define bFM3_MFT2_ICU_ICFS32_FSI22 *((volatile unsigned int*)(0x42440C28UL))
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#define bFM3_MFT2_ICU_ICFS32_FSI23 *((volatile unsigned int*)(0x42440C2CUL))
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#define bFM3_MFT2_ICU_ICFS32_FSI30 *((volatile unsigned int*)(0x42440C30UL))
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#define bFM3_MFT2_ICU_ICFS32_FSI31 *((volatile unsigned int*)(0x42440C34UL))
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#define bFM3_MFT2_ICU_ICFS32_FSI32 *((volatile unsigned int*)(0x42440C38UL))
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#define bFM3_MFT2_ICU_ICFS32_FSI33 *((volatile unsigned int*)(0x42440C3CUL))
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#define bFM3_MFT2_ICU_ICSA10_EG00 *((volatile unsigned int*)(0x42440F00UL))
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#define bFM3_MFT2_ICU_ICSA10_EG01 *((volatile unsigned int*)(0x42440F04UL))
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#define bFM3_MFT2_ICU_ICSA10_EG10 *((volatile unsigned int*)(0x42440F08UL))
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#define bFM3_MFT2_ICU_ICSA10_EG11 *((volatile unsigned int*)(0x42440F0CUL))
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#define bFM3_MFT2_ICU_ICSA10_ICE0 *((volatile unsigned int*)(0x42440F10UL))
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#define bFM3_MFT2_ICU_ICSA10_ICE1 *((volatile unsigned int*)(0x42440F14UL))
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#define bFM3_MFT2_ICU_ICSA10_ICP0 *((volatile unsigned int*)(0x42440F18UL))
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#define bFM3_MFT2_ICU_ICSA10_ICP1 *((volatile unsigned int*)(0x42440F1CUL))
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#define bFM3_MFT2_ICU_ICSB10_IEI0 *((volatile unsigned int*)(0x42440F20UL))
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#define bFM3_MFT2_ICU_ICSB10_IEI1 *((volatile unsigned int*)(0x42440F24UL))
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#define bFM3_MFT2_ICU_ICSA32_EG20 *((volatile unsigned int*)(0x42440F80UL))
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#define bFM3_MFT2_ICU_ICSA32_EG21 *((volatile unsigned int*)(0x42440F84UL))
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#define bFM3_MFT2_ICU_ICSA32_EG30 *((volatile unsigned int*)(0x42440F88UL))
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#define bFM3_MFT2_ICU_ICSA32_EG31 *((volatile unsigned int*)(0x42440F8CUL))
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#define bFM3_MFT2_ICU_ICSA32_ICE2 *((volatile unsigned int*)(0x42440F90UL))
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#define bFM3_MFT2_ICU_ICSA32_ICE3 *((volatile unsigned int*)(0x42440F94UL))
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#define bFM3_MFT2_ICU_ICSA32_ICP2 *((volatile unsigned int*)(0x42440F98UL))
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#define bFM3_MFT2_ICU_ICSA32_ICP3 *((volatile unsigned int*)(0x42440F9CUL))
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#define bFM3_MFT2_ICU_ICSB32_IEI2 *((volatile unsigned int*)(0x42440FA0UL))
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#define bFM3_MFT2_ICU_ICSB32_IEI3 *((volatile unsigned int*)(0x42440FA4UL))
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/* Multifunction Timer unit 2 ADC Start Compare Unit registers */
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#define bFM3_MFT2_ADCMP_ACSB_BDIS0 *((volatile unsigned int*)(0x42441700UL))
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#define bFM3_MFT2_ADCMP_ACSB_BDIS1 *((volatile unsigned int*)(0x42441704UL))
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#define bFM3_MFT2_ADCMP_ACSB_BDIS2 *((volatile unsigned int*)(0x42441708UL))
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#define bFM3_MFT2_ADCMP_ACSB_BTS0 *((volatile unsigned int*)(0x42441710UL))
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#define bFM3_MFT2_ADCMP_ACSB_BTS1 *((volatile unsigned int*)(0x42441714UL))
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#define bFM3_MFT2_ADCMP_ACSB_BTS2 *((volatile unsigned int*)(0x42441718UL))
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#define bFM3_MFT2_ADCMP_ACSA_CE00 *((volatile unsigned int*)(0x42441780UL))
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#define bFM3_MFT2_ADCMP_ACSA_CE01 *((volatile unsigned int*)(0x42441784UL))
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#define bFM3_MFT2_ADCMP_ACSA_CE10 *((volatile unsigned int*)(0x42441788UL))
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#define bFM3_MFT2_ADCMP_ACSA_CE11 *((volatile unsigned int*)(0x4244178CUL))
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#define bFM3_MFT2_ADCMP_ACSA_CE20 *((volatile unsigned int*)(0x42441790UL))
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#define bFM3_MFT2_ADCMP_ACSA_CE21 *((volatile unsigned int*)(0x42441794UL))
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#define bFM3_MFT2_ADCMP_ACSA_SEL00 *((volatile unsigned int*)(0x424417A0UL))
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#define bFM3_MFT2_ADCMP_ACSA_SEL01 *((volatile unsigned int*)(0x424417A4UL))
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#define bFM3_MFT2_ADCMP_ACSA_SEL10 *((volatile unsigned int*)(0x424417A8UL))
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#define bFM3_MFT2_ADCMP_ACSA_SEL11 *((volatile unsigned int*)(0x424417ACUL))
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#define bFM3_MFT2_ADCMP_ACSA_SEL20 *((volatile unsigned int*)(0x424417B0UL))
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#define bFM3_MFT2_ADCMP_ACSA_SEL21 *((volatile unsigned int*)(0x424417B4UL))
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#define bFM3_MFT2_ADCMP_ATSA_AD0S0 *((volatile unsigned int*)(0x42441800UL))
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|
#define bFM3_MFT2_ADCMP_ATSA_AD0S1 *((volatile unsigned int*)(0x42441804UL))
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#define bFM3_MFT2_ADCMP_ATSA_AD1S0 *((volatile unsigned int*)(0x42441808UL))
|
|
#define bFM3_MFT2_ADCMP_ATSA_AD1S1 *((volatile unsigned int*)(0x4244180CUL))
|
|
#define bFM3_MFT2_ADCMP_ATSA_AD2S0 *((volatile unsigned int*)(0x42441810UL))
|
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#define bFM3_MFT2_ADCMP_ATSA_AD2S1 *((volatile unsigned int*)(0x42441814UL))
|
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#define bFM3_MFT2_ADCMP_ATSA_AD0P0 *((volatile unsigned int*)(0x42441820UL))
|
|
#define bFM3_MFT2_ADCMP_ATSA_AD0P1 *((volatile unsigned int*)(0x42441824UL))
|
|
#define bFM3_MFT2_ADCMP_ATSA_AD1P0 *((volatile unsigned int*)(0x42441828UL))
|
|
#define bFM3_MFT2_ADCMP_ATSA_AD1P1 *((volatile unsigned int*)(0x4244182CUL))
|
|
#define bFM3_MFT2_ADCMP_ATSA_AD2P0 *((volatile unsigned int*)(0x42441830UL))
|
|
#define bFM3_MFT2_ADCMP_ATSA_AD2P1 *((volatile unsigned int*)(0x42441834UL))
|
|
|
|
/* Multifunction Timer PPG registers */
|
|
#define bFM3_MFT_PPG_TTCR0_STR0 *((volatile unsigned int*)(0x42480020UL))
|
|
#define bFM3_MFT_PPG_TTCR0_MONI0 *((volatile unsigned int*)(0x42480024UL))
|
|
#define bFM3_MFT_PPG_TTCR0_CS00 *((volatile unsigned int*)(0x42480028UL))
|
|
#define bFM3_MFT_PPG_TTCR0_CS01 *((volatile unsigned int*)(0x4248002CUL))
|
|
#define bFM3_MFT_PPG_TTCR0_TRG0O *((volatile unsigned int*)(0x42480030UL))
|
|
#define bFM3_MFT_PPG_TTCR0_TRG2O *((volatile unsigned int*)(0x42480034UL))
|
|
#define bFM3_MFT_PPG_TTCR0_TRG4O *((volatile unsigned int*)(0x42480038UL))
|
|
#define bFM3_MFT_PPG_TTCR0_TRG6O *((volatile unsigned int*)(0x4248003CUL))
|
|
#define bFM3_MFT_PPG_TTCR1_STR1 *((volatile unsigned int*)(0x42480420UL))
|
|
#define bFM3_MFT_PPG_TTCR1_MONI1 *((volatile unsigned int*)(0x42480424UL))
|
|
#define bFM3_MFT_PPG_TTCR1_CS10 *((volatile unsigned int*)(0x42480428UL))
|
|
#define bFM3_MFT_PPG_TTCR1_CS11 *((volatile unsigned int*)(0x4248042CUL))
|
|
#define bFM3_MFT_PPG_TTCR1_TRG1O *((volatile unsigned int*)(0x42480430UL))
|
|
#define bFM3_MFT_PPG_TTCR1_TRG3O *((volatile unsigned int*)(0x42480434UL))
|
|
#define bFM3_MFT_PPG_TTCR1_TRG5O *((volatile unsigned int*)(0x42480438UL))
|
|
#define bFM3_MFT_PPG_TTCR1_TRG7O *((volatile unsigned int*)(0x4248043CUL))
|
|
#define bFM3_MFT_PPG_TTCR2_STR2 *((volatile unsigned int*)(0x42480820UL))
|
|
#define bFM3_MFT_PPG_TTCR2_MONI2 *((volatile unsigned int*)(0x42480824UL))
|
|
#define bFM3_MFT_PPG_TTCR2_CS20 *((volatile unsigned int*)(0x42480828UL))
|
|
#define bFM3_MFT_PPG_TTCR2_CS21 *((volatile unsigned int*)(0x4248082CUL))
|
|
#define bFM3_MFT_PPG_TTCR2_TRG16O *((volatile unsigned int*)(0x42480830UL))
|
|
#define bFM3_MFT_PPG_TTCR2_TRG18O *((volatile unsigned int*)(0x42480834UL))
|
|
#define bFM3_MFT_PPG_TTCR2_TRG20O *((volatile unsigned int*)(0x42480838UL))
|
|
#define bFM3_MFT_PPG_TTCR2_TRG22O *((volatile unsigned int*)(0x4248083CUL))
|
|
#define bFM3_MFT_PPG_TRG_PEN00 *((volatile unsigned int*)(0x42482000UL))
|
|
#define bFM3_MFT_PPG_TRG_PEN01 *((volatile unsigned int*)(0x42482004UL))
|
|
#define bFM3_MFT_PPG_TRG_PEN02 *((volatile unsigned int*)(0x42482008UL))
|
|
#define bFM3_MFT_PPG_TRG_PEN03 *((volatile unsigned int*)(0x4248200CUL))
|
|
#define bFM3_MFT_PPG_TRG_PEN04 *((volatile unsigned int*)(0x42482010UL))
|
|
#define bFM3_MFT_PPG_TRG_PEN05 *((volatile unsigned int*)(0x42482014UL))
|
|
#define bFM3_MFT_PPG_TRG_PEN06 *((volatile unsigned int*)(0x42482018UL))
|
|
#define bFM3_MFT_PPG_TRG_PEN07 *((volatile unsigned int*)(0x4248201CUL))
|
|
#define bFM3_MFT_PPG_TRG_PEN08 *((volatile unsigned int*)(0x42482020UL))
|
|
#define bFM3_MFT_PPG_TRG_PEN09 *((volatile unsigned int*)(0x42482024UL))
|
|
#define bFM3_MFT_PPG_TRG_PEN10 *((volatile unsigned int*)(0x42482028UL))
|
|
#define bFM3_MFT_PPG_TRG_PEN11 *((volatile unsigned int*)(0x4248202CUL))
|
|
#define bFM3_MFT_PPG_TRG_PEN12 *((volatile unsigned int*)(0x42482030UL))
|
|
#define bFM3_MFT_PPG_TRG_PEN13 *((volatile unsigned int*)(0x42482034UL))
|
|
#define bFM3_MFT_PPG_TRG_PEN14 *((volatile unsigned int*)(0x42482038UL))
|
|
#define bFM3_MFT_PPG_TRG_PEN15 *((volatile unsigned int*)(0x4248203CUL))
|
|
#define bFM3_MFT_PPG_REVC_REV00 *((volatile unsigned int*)(0x42482080UL))
|
|
#define bFM3_MFT_PPG_REVC_REV01 *((volatile unsigned int*)(0x42482084UL))
|
|
#define bFM3_MFT_PPG_REVC_REV02 *((volatile unsigned int*)(0x42482088UL))
|
|
#define bFM3_MFT_PPG_REVC_REV03 *((volatile unsigned int*)(0x4248208CUL))
|
|
#define bFM3_MFT_PPG_REVC_REV04 *((volatile unsigned int*)(0x42482090UL))
|
|
#define bFM3_MFT_PPG_REVC_REV05 *((volatile unsigned int*)(0x42482094UL))
|
|
#define bFM3_MFT_PPG_REVC_REV06 *((volatile unsigned int*)(0x42482098UL))
|
|
#define bFM3_MFT_PPG_REVC_REV07 *((volatile unsigned int*)(0x4248209CUL))
|
|
#define bFM3_MFT_PPG_REVC_REV08 *((volatile unsigned int*)(0x424820A0UL))
|
|
#define bFM3_MFT_PPG_REVC_REV09 *((volatile unsigned int*)(0x424820A4UL))
|
|
#define bFM3_MFT_PPG_REVC_REV10 *((volatile unsigned int*)(0x424820A8UL))
|
|
#define bFM3_MFT_PPG_REVC_REV11 *((volatile unsigned int*)(0x424820ACUL))
|
|
#define bFM3_MFT_PPG_REVC_REV12 *((volatile unsigned int*)(0x424820B0UL))
|
|
#define bFM3_MFT_PPG_REVC_REV13 *((volatile unsigned int*)(0x424820B4UL))
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#define bFM3_MFT_PPG_REVC_REV14 *((volatile unsigned int*)(0x424820B8UL))
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#define bFM3_MFT_PPG_REVC_REV15 *((volatile unsigned int*)(0x424820BCUL))
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#define bFM3_MFT_PPG_TRG1_PEN16 *((volatile unsigned int*)(0x42482800UL))
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#define bFM3_MFT_PPG_TRG1_PEN17 *((volatile unsigned int*)(0x42482804UL))
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#define bFM3_MFT_PPG_TRG1_PEN18 *((volatile unsigned int*)(0x42482808UL))
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#define bFM3_MFT_PPG_TRG1_PEN19 *((volatile unsigned int*)(0x4248280CUL))
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#define bFM3_MFT_PPG_TRG1_PEN20 *((volatile unsigned int*)(0x42482810UL))
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#define bFM3_MFT_PPG_TRG1_PEN21 *((volatile unsigned int*)(0x42482814UL))
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#define bFM3_MFT_PPG_TRG1_PEN22 *((volatile unsigned int*)(0x42482818UL))
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#define bFM3_MFT_PPG_TRG1_PEN23 *((volatile unsigned int*)(0x4248281CUL))
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#define bFM3_MFT_PPG_REVC1_REV16 *((volatile unsigned int*)(0x42482880UL))
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#define bFM3_MFT_PPG_REVC1_REV17 *((volatile unsigned int*)(0x42482884UL))
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#define bFM3_MFT_PPG_REVC1_REV18 *((volatile unsigned int*)(0x42482888UL))
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#define bFM3_MFT_PPG_REVC1_REV19 *((volatile unsigned int*)(0x4248288CUL))
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#define bFM3_MFT_PPG_REVC1_REV20 *((volatile unsigned int*)(0x42482890UL))
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#define bFM3_MFT_PPG_REVC1_REV21 *((volatile unsigned int*)(0x42482894UL))
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#define bFM3_MFT_PPG_REVC1_REV22 *((volatile unsigned int*)(0x42482898UL))
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#define bFM3_MFT_PPG_REVC1_REV23 *((volatile unsigned int*)(0x4248289CUL))
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#define bFM3_MFT_PPG_PPGC1_TTRG *((volatile unsigned int*)(0x42484000UL))
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#define bFM3_MFT_PPG_PPGC1_MD0 *((volatile unsigned int*)(0x42484004UL))
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#define bFM3_MFT_PPG_PPGC1_MD1 *((volatile unsigned int*)(0x42484008UL))
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#define bFM3_MFT_PPG_PPGC1_PCS0 *((volatile unsigned int*)(0x4248400CUL))
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#define bFM3_MFT_PPG_PPGC1_PCS1 *((volatile unsigned int*)(0x42484010UL))
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#define bFM3_MFT_PPG_PPGC1_INTM *((volatile unsigned int*)(0x42484014UL))
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#define bFM3_MFT_PPG_PPGC1_PUF *((volatile unsigned int*)(0x42484018UL))
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#define bFM3_MFT_PPG_PPGC1_PIE *((volatile unsigned int*)(0x4248401CUL))
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#define bFM3_MFT_PPG_PPGC0_TTRG *((volatile unsigned int*)(0x42484020UL))
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#define bFM3_MFT_PPG_PPGC0_MD0 *((volatile unsigned int*)(0x42484024UL))
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#define bFM3_MFT_PPG_PPGC0_MD1 *((volatile unsigned int*)(0x42484028UL))
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#define bFM3_MFT_PPG_PPGC0_PCS0 *((volatile unsigned int*)(0x4248402CUL))
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#define bFM3_MFT_PPG_PPGC0_PCS1 *((volatile unsigned int*)(0x42484030UL))
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#define bFM3_MFT_PPG_PPGC0_INTM *((volatile unsigned int*)(0x42484034UL))
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#define bFM3_MFT_PPG_PPGC0_PUF *((volatile unsigned int*)(0x42484038UL))
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#define bFM3_MFT_PPG_PPGC0_PIE *((volatile unsigned int*)(0x4248403CUL))
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#define bFM3_MFT_PPG_PPGC3_TTRG *((volatile unsigned int*)(0x42484080UL))
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#define bFM3_MFT_PPG_PPGC3_MD0 *((volatile unsigned int*)(0x42484084UL))
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#define bFM3_MFT_PPG_PPGC3_MD1 *((volatile unsigned int*)(0x42484088UL))
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#define bFM3_MFT_PPG_PPGC3_PCS0 *((volatile unsigned int*)(0x4248408CUL))
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#define bFM3_MFT_PPG_PPGC3_PCS1 *((volatile unsigned int*)(0x42484090UL))
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#define bFM3_MFT_PPG_PPGC3_INTM *((volatile unsigned int*)(0x42484094UL))
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#define bFM3_MFT_PPG_PPGC3_PUF *((volatile unsigned int*)(0x42484098UL))
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#define bFM3_MFT_PPG_PPGC3_PIE *((volatile unsigned int*)(0x4248409CUL))
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#define bFM3_MFT_PPG_PPGC2_TTRG *((volatile unsigned int*)(0x424840A0UL))
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#define bFM3_MFT_PPG_PPGC2_MD0 *((volatile unsigned int*)(0x424840A4UL))
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#define bFM3_MFT_PPG_PPGC2_MD1 *((volatile unsigned int*)(0x424840A8UL))
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#define bFM3_MFT_PPG_PPGC2_PCS0 *((volatile unsigned int*)(0x424840ACUL))
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#define bFM3_MFT_PPG_PPGC2_PCS1 *((volatile unsigned int*)(0x424840B0UL))
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#define bFM3_MFT_PPG_PPGC2_INTM *((volatile unsigned int*)(0x424840B4UL))
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#define bFM3_MFT_PPG_PPGC2_PUF *((volatile unsigned int*)(0x424840B8UL))
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#define bFM3_MFT_PPG_PPGC2_PIE *((volatile unsigned int*)(0x424840BCUL))
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#define bFM3_MFT_PPG_GATEC0_EDGE0 *((volatile unsigned int*)(0x42484300UL))
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#define bFM3_MFT_PPG_GATEC0_STRG0 *((volatile unsigned int*)(0x42484304UL))
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#define bFM3_MFT_PPG_GATEC0_EDGE2 *((volatile unsigned int*)(0x42484310UL))
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#define bFM3_MFT_PPG_GATEC0_STRG2 *((volatile unsigned int*)(0x42484314UL))
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#define bFM3_MFT_PPG_PPGC5_TTRG *((volatile unsigned int*)(0x42484800UL))
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#define bFM3_MFT_PPG_PPGC5_MD0 *((volatile unsigned int*)(0x42484804UL))
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#define bFM3_MFT_PPG_PPGC5_MD1 *((volatile unsigned int*)(0x42484808UL))
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#define bFM3_MFT_PPG_PPGC5_PCS0 *((volatile unsigned int*)(0x4248480CUL))
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#define bFM3_MFT_PPG_PPGC5_PCS1 *((volatile unsigned int*)(0x42484810UL))
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#define bFM3_MFT_PPG_PPGC5_INTM *((volatile unsigned int*)(0x42484814UL))
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#define bFM3_MFT_PPG_PPGC5_PUF *((volatile unsigned int*)(0x42484818UL))
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#define bFM3_MFT_PPG_PPGC5_PIE *((volatile unsigned int*)(0x4248481CUL))
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#define bFM3_MFT_PPG_PPGC4_TTRG *((volatile unsigned int*)(0x42484820UL))
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#define bFM3_MFT_PPG_PPGC4_MD0 *((volatile unsigned int*)(0x42484824UL))
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#define bFM3_MFT_PPG_PPGC4_MD1 *((volatile unsigned int*)(0x42484828UL))
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#define bFM3_MFT_PPG_PPGC4_PCS0 *((volatile unsigned int*)(0x4248482CUL))
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#define bFM3_MFT_PPG_PPGC4_PCS1 *((volatile unsigned int*)(0x42484830UL))
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#define bFM3_MFT_PPG_PPGC4_INTM *((volatile unsigned int*)(0x42484834UL))
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#define bFM3_MFT_PPG_PPGC4_PUF *((volatile unsigned int*)(0x42484838UL))
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#define bFM3_MFT_PPG_PPGC4_PIE *((volatile unsigned int*)(0x4248483CUL))
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#define bFM3_MFT_PPG_PPGC7_TTRG *((volatile unsigned int*)(0x42484880UL))
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#define bFM3_MFT_PPG_PPGC7_MD0 *((volatile unsigned int*)(0x42484884UL))
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#define bFM3_MFT_PPG_PPGC7_MD1 *((volatile unsigned int*)(0x42484888UL))
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#define bFM3_MFT_PPG_PPGC7_PCS0 *((volatile unsigned int*)(0x4248488CUL))
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#define bFM3_MFT_PPG_PPGC7_PCS1 *((volatile unsigned int*)(0x42484890UL))
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#define bFM3_MFT_PPG_PPGC7_INTM *((volatile unsigned int*)(0x42484894UL))
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#define bFM3_MFT_PPG_PPGC7_PUF *((volatile unsigned int*)(0x42484898UL))
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#define bFM3_MFT_PPG_PPGC7_PIE *((volatile unsigned int*)(0x4248489CUL))
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#define bFM3_MFT_PPG_PPGC6_TTRG *((volatile unsigned int*)(0x424848A0UL))
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#define bFM3_MFT_PPG_PPGC6_MD0 *((volatile unsigned int*)(0x424848A4UL))
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#define bFM3_MFT_PPG_PPGC6_MD1 *((volatile unsigned int*)(0x424848A8UL))
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#define bFM3_MFT_PPG_PPGC6_PCS0 *((volatile unsigned int*)(0x424848ACUL))
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#define bFM3_MFT_PPG_PPGC6_PCS1 *((volatile unsigned int*)(0x424848B0UL))
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#define bFM3_MFT_PPG_PPGC6_INTM *((volatile unsigned int*)(0x424848B4UL))
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#define bFM3_MFT_PPG_PPGC6_PUF *((volatile unsigned int*)(0x424848B8UL))
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#define bFM3_MFT_PPG_PPGC6_PIE *((volatile unsigned int*)(0x424848BCUL))
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#define bFM3_MFT_PPG_GATEC4_EDGE4 *((volatile unsigned int*)(0x42484B00UL))
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#define bFM3_MFT_PPG_GATEC4_STRG4 *((volatile unsigned int*)(0x42484B04UL))
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#define bFM3_MFT_PPG_GATEC4_EDGE6 *((volatile unsigned int*)(0x42484B10UL))
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#define bFM3_MFT_PPG_GATEC4_STRG6 *((volatile unsigned int*)(0x42484B14UL))
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#define bFM3_MFT_PPG_PPGC9_TTRG *((volatile unsigned int*)(0x42485000UL))
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#define bFM3_MFT_PPG_PPGC9_MD0 *((volatile unsigned int*)(0x42485004UL))
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#define bFM3_MFT_PPG_PPGC9_MD1 *((volatile unsigned int*)(0x42485008UL))
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#define bFM3_MFT_PPG_PPGC9_PCS0 *((volatile unsigned int*)(0x4248500CUL))
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#define bFM3_MFT_PPG_PPGC9_PCS1 *((volatile unsigned int*)(0x42485010UL))
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#define bFM3_MFT_PPG_PPGC9_INTM *((volatile unsigned int*)(0x42485014UL))
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#define bFM3_MFT_PPG_PPGC9_PUF *((volatile unsigned int*)(0x42485018UL))
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#define bFM3_MFT_PPG_PPGC9_PIE *((volatile unsigned int*)(0x4248501CUL))
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#define bFM3_MFT_PPG_PPGC8_TTRG *((volatile unsigned int*)(0x42485020UL))
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#define bFM3_MFT_PPG_PPGC8_MD0 *((volatile unsigned int*)(0x42485024UL))
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#define bFM3_MFT_PPG_PPGC8_MD1 *((volatile unsigned int*)(0x42485028UL))
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#define bFM3_MFT_PPG_PPGC8_PCS0 *((volatile unsigned int*)(0x4248502CUL))
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#define bFM3_MFT_PPG_PPGC8_PCS1 *((volatile unsigned int*)(0x42485030UL))
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#define bFM3_MFT_PPG_PPGC8_INTM *((volatile unsigned int*)(0x42485034UL))
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#define bFM3_MFT_PPG_PPGC8_PUF *((volatile unsigned int*)(0x42485038UL))
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#define bFM3_MFT_PPG_PPGC8_PIE *((volatile unsigned int*)(0x4248503CUL))
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#define bFM3_MFT_PPG_PPGC11_TTRG *((volatile unsigned int*)(0x42485080UL))
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#define bFM3_MFT_PPG_PPGC11_MD0 *((volatile unsigned int*)(0x42485084UL))
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#define bFM3_MFT_PPG_PPGC11_MD1 *((volatile unsigned int*)(0x42485088UL))
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|
#define bFM3_MFT_PPG_PPGC11_PCS0 *((volatile unsigned int*)(0x4248508CUL))
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#define bFM3_MFT_PPG_PPGC11_PCS1 *((volatile unsigned int*)(0x42485090UL))
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#define bFM3_MFT_PPG_PPGC11_INTM *((volatile unsigned int*)(0x42485094UL))
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#define bFM3_MFT_PPG_PPGC11_PUF *((volatile unsigned int*)(0x42485098UL))
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#define bFM3_MFT_PPG_PPGC11_PIE *((volatile unsigned int*)(0x4248509CUL))
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#define bFM3_MFT_PPG_PPGC10_TTRG *((volatile unsigned int*)(0x424850A0UL))
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|
#define bFM3_MFT_PPG_PPGC10_MD0 *((volatile unsigned int*)(0x424850A4UL))
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|
#define bFM3_MFT_PPG_PPGC10_MD1 *((volatile unsigned int*)(0x424850A8UL))
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|
#define bFM3_MFT_PPG_PPGC10_PCS0 *((volatile unsigned int*)(0x424850ACUL))
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|
#define bFM3_MFT_PPG_PPGC10_PCS1 *((volatile unsigned int*)(0x424850B0UL))
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|
#define bFM3_MFT_PPG_PPGC10_INTM *((volatile unsigned int*)(0x424850B4UL))
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|
#define bFM3_MFT_PPG_PPGC10_PUF *((volatile unsigned int*)(0x424850B8UL))
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|
#define bFM3_MFT_PPG_PPGC10_PIE *((volatile unsigned int*)(0x424850BCUL))
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|
#define bFM3_MFT_PPG_GATEC8_EDGE8 *((volatile unsigned int*)(0x42485300UL))
|
|
#define bFM3_MFT_PPG_GATEC8_STRG8 *((volatile unsigned int*)(0x42485304UL))
|
|
#define bFM3_MFT_PPG_GATEC8_EDGE10 *((volatile unsigned int*)(0x42485310UL))
|
|
#define bFM3_MFT_PPG_GATEC8_STRG10 *((volatile unsigned int*)(0x42485314UL))
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#define bFM3_MFT_PPG_PPGC13_TTRG *((volatile unsigned int*)(0x42485800UL))
|
|
#define bFM3_MFT_PPG_PPGC13_MD0 *((volatile unsigned int*)(0x42485804UL))
|
|
#define bFM3_MFT_PPG_PPGC13_MD1 *((volatile unsigned int*)(0x42485808UL))
|
|
#define bFM3_MFT_PPG_PPGC13_PCS0 *((volatile unsigned int*)(0x4248580CUL))
|
|
#define bFM3_MFT_PPG_PPGC13_PCS1 *((volatile unsigned int*)(0x42485810UL))
|
|
#define bFM3_MFT_PPG_PPGC13_INTM *((volatile unsigned int*)(0x42485814UL))
|
|
#define bFM3_MFT_PPG_PPGC13_PUF *((volatile unsigned int*)(0x42485818UL))
|
|
#define bFM3_MFT_PPG_PPGC13_PIE *((volatile unsigned int*)(0x4248581CUL))
|
|
#define bFM3_MFT_PPG_PPGC12_TTRG *((volatile unsigned int*)(0x42485820UL))
|
|
#define bFM3_MFT_PPG_PPGC12_MD0 *((volatile unsigned int*)(0x42485824UL))
|
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#define bFM3_MFT_PPG_PPGC12_MD1 *((volatile unsigned int*)(0x42485828UL))
|
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#define bFM3_MFT_PPG_PPGC12_PCS0 *((volatile unsigned int*)(0x4248582CUL))
|
|
#define bFM3_MFT_PPG_PPGC12_PCS1 *((volatile unsigned int*)(0x42485830UL))
|
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#define bFM3_MFT_PPG_PPGC12_INTM *((volatile unsigned int*)(0x42485834UL))
|
|
#define bFM3_MFT_PPG_PPGC12_PUF *((volatile unsigned int*)(0x42485838UL))
|
|
#define bFM3_MFT_PPG_PPGC12_PIE *((volatile unsigned int*)(0x4248583CUL))
|
|
#define bFM3_MFT_PPG_PPGC15_TTRG *((volatile unsigned int*)(0x42485880UL))
|
|
#define bFM3_MFT_PPG_PPGC15_MD0 *((volatile unsigned int*)(0x42485884UL))
|
|
#define bFM3_MFT_PPG_PPGC15_MD1 *((volatile unsigned int*)(0x42485888UL))
|
|
#define bFM3_MFT_PPG_PPGC15_PCS0 *((volatile unsigned int*)(0x4248588CUL))
|
|
#define bFM3_MFT_PPG_PPGC15_PCS1 *((volatile unsigned int*)(0x42485890UL))
|
|
#define bFM3_MFT_PPG_PPGC15_INTM *((volatile unsigned int*)(0x42485894UL))
|
|
#define bFM3_MFT_PPG_PPGC15_PUF *((volatile unsigned int*)(0x42485898UL))
|
|
#define bFM3_MFT_PPG_PPGC15_PIE *((volatile unsigned int*)(0x4248589CUL))
|
|
#define bFM3_MFT_PPG_PPGC14_TTRG *((volatile unsigned int*)(0x424858A0UL))
|
|
#define bFM3_MFT_PPG_PPGC14_MD0 *((volatile unsigned int*)(0x424858A4UL))
|
|
#define bFM3_MFT_PPG_PPGC14_MD1 *((volatile unsigned int*)(0x424858A8UL))
|
|
#define bFM3_MFT_PPG_PPGC14_PCS0 *((volatile unsigned int*)(0x424858ACUL))
|
|
#define bFM3_MFT_PPG_PPGC14_PCS1 *((volatile unsigned int*)(0x424858B0UL))
|
|
#define bFM3_MFT_PPG_PPGC14_INTM *((volatile unsigned int*)(0x424858B4UL))
|
|
#define bFM3_MFT_PPG_PPGC14_PUF *((volatile unsigned int*)(0x424858B8UL))
|
|
#define bFM3_MFT_PPG_PPGC14_PIE *((volatile unsigned int*)(0x424858BCUL))
|
|
#define bFM3_MFT_PPG_GATEC12_EDGE12 *((volatile unsigned int*)(0x42485B00UL))
|
|
#define bFM3_MFT_PPG_GATEC12_STRG12 *((volatile unsigned int*)(0x42485B04UL))
|
|
#define bFM3_MFT_PPG_GATEC12_EDGE14 *((volatile unsigned int*)(0x42485B10UL))
|
|
#define bFM3_MFT_PPG_GATEC12_STRG14 *((volatile unsigned int*)(0x42485B14UL))
|
|
#define bFM3_MFT_PPG_PPGC17_TTRG *((volatile unsigned int*)(0x42486000UL))
|
|
#define bFM3_MFT_PPG_PPGC17_MD0 *((volatile unsigned int*)(0x42486004UL))
|
|
#define bFM3_MFT_PPG_PPGC17_MD1 *((volatile unsigned int*)(0x42486008UL))
|
|
#define bFM3_MFT_PPG_PPGC17_PCS0 *((volatile unsigned int*)(0x4248600CUL))
|
|
#define bFM3_MFT_PPG_PPGC17_PCS1 *((volatile unsigned int*)(0x42486010UL))
|
|
#define bFM3_MFT_PPG_PPGC17_INTM *((volatile unsigned int*)(0x42486014UL))
|
|
#define bFM3_MFT_PPG_PPGC17_PUF *((volatile unsigned int*)(0x42486018UL))
|
|
#define bFM3_MFT_PPG_PPGC17_PIE *((volatile unsigned int*)(0x4248601CUL))
|
|
#define bFM3_MFT_PPG_PPGC16_TTRG *((volatile unsigned int*)(0x42486020UL))
|
|
#define bFM3_MFT_PPG_PPGC16_MD0 *((volatile unsigned int*)(0x42486024UL))
|
|
#define bFM3_MFT_PPG_PPGC16_MD1 *((volatile unsigned int*)(0x42486028UL))
|
|
#define bFM3_MFT_PPG_PPGC16_PCS0 *((volatile unsigned int*)(0x4248602CUL))
|
|
#define bFM3_MFT_PPG_PPGC16_PCS1 *((volatile unsigned int*)(0x42486030UL))
|
|
#define bFM3_MFT_PPG_PPGC16_INTM *((volatile unsigned int*)(0x42486034UL))
|
|
#define bFM3_MFT_PPG_PPGC16_PUF *((volatile unsigned int*)(0x42486038UL))
|
|
#define bFM3_MFT_PPG_PPGC16_PIE *((volatile unsigned int*)(0x4248603CUL))
|
|
#define bFM3_MFT_PPG_PPGC19_TTRG *((volatile unsigned int*)(0x42486080UL))
|
|
#define bFM3_MFT_PPG_PPGC19_MD0 *((volatile unsigned int*)(0x42486084UL))
|
|
#define bFM3_MFT_PPG_PPGC19_MD1 *((volatile unsigned int*)(0x42486088UL))
|
|
#define bFM3_MFT_PPG_PPGC19_PCS0 *((volatile unsigned int*)(0x4248608CUL))
|
|
#define bFM3_MFT_PPG_PPGC19_PCS1 *((volatile unsigned int*)(0x42486090UL))
|
|
#define bFM3_MFT_PPG_PPGC19_INTM *((volatile unsigned int*)(0x42486094UL))
|
|
#define bFM3_MFT_PPG_PPGC19_PUF *((volatile unsigned int*)(0x42486098UL))
|
|
#define bFM3_MFT_PPG_PPGC19_PIE *((volatile unsigned int*)(0x4248609CUL))
|
|
#define bFM3_MFT_PPG_PPGC18_TTRG *((volatile unsigned int*)(0x424860A0UL))
|
|
#define bFM3_MFT_PPG_PPGC18_MD0 *((volatile unsigned int*)(0x424860A4UL))
|
|
#define bFM3_MFT_PPG_PPGC18_MD1 *((volatile unsigned int*)(0x424860A8UL))
|
|
#define bFM3_MFT_PPG_PPGC18_PCS0 *((volatile unsigned int*)(0x424860ACUL))
|
|
#define bFM3_MFT_PPG_PPGC18_PCS1 *((volatile unsigned int*)(0x424860B0UL))
|
|
#define bFM3_MFT_PPG_PPGC18_INTM *((volatile unsigned int*)(0x424860B4UL))
|
|
#define bFM3_MFT_PPG_PPGC18_PUF *((volatile unsigned int*)(0x424860B8UL))
|
|
#define bFM3_MFT_PPG_PPGC18_PIE *((volatile unsigned int*)(0x424860BCUL))
|
|
#define bFM3_MFT_PPG_GATEC16_EDGE16 *((volatile unsigned int*)(0x42486300UL))
|
|
#define bFM3_MFT_PPG_GATEC16_STRG16 *((volatile unsigned int*)(0x42486304UL))
|
|
#define bFM3_MFT_PPG_GATEC16_EDGE18 *((volatile unsigned int*)(0x42486310UL))
|
|
#define bFM3_MFT_PPG_GATEC16_STRG18 *((volatile unsigned int*)(0x42486314UL))
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#define bFM3_MFT_PPG_PPGC21_TTRG *((volatile unsigned int*)(0x42486800UL))
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#define bFM3_MFT_PPG_PPGC21_MD0 *((volatile unsigned int*)(0x42486804UL))
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#define bFM3_MFT_PPG_PPGC21_MD1 *((volatile unsigned int*)(0x42486808UL))
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#define bFM3_MFT_PPG_PPGC21_PCS0 *((volatile unsigned int*)(0x4248680CUL))
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#define bFM3_MFT_PPG_PPGC21_PCS1 *((volatile unsigned int*)(0x42486810UL))
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#define bFM3_MFT_PPG_PPGC21_INTM *((volatile unsigned int*)(0x42486814UL))
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#define bFM3_MFT_PPG_PPGC21_PUF *((volatile unsigned int*)(0x42486818UL))
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#define bFM3_MFT_PPG_PPGC21_PIE *((volatile unsigned int*)(0x4248681CUL))
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#define bFM3_MFT_PPG_PPGC20_TTRG *((volatile unsigned int*)(0x42486820UL))
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#define bFM3_MFT_PPG_PPGC20_MD0 *((volatile unsigned int*)(0x42486824UL))
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#define bFM3_MFT_PPG_PPGC20_MD1 *((volatile unsigned int*)(0x42486828UL))
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#define bFM3_MFT_PPG_PPGC20_PCS0 *((volatile unsigned int*)(0x4248682CUL))
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#define bFM3_MFT_PPG_PPGC20_PCS1 *((volatile unsigned int*)(0x42486830UL))
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|
#define bFM3_MFT_PPG_PPGC20_INTM *((volatile unsigned int*)(0x42486834UL))
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#define bFM3_MFT_PPG_PPGC20_PUF *((volatile unsigned int*)(0x42486838UL))
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#define bFM3_MFT_PPG_PPGC20_PIE *((volatile unsigned int*)(0x4248683CUL))
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#define bFM3_MFT_PPG_PPGC23_TTRG *((volatile unsigned int*)(0x42486880UL))
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#define bFM3_MFT_PPG_PPGC23_MD0 *((volatile unsigned int*)(0x42486884UL))
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#define bFM3_MFT_PPG_PPGC23_MD1 *((volatile unsigned int*)(0x42486888UL))
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#define bFM3_MFT_PPG_PPGC23_PCS0 *((volatile unsigned int*)(0x4248688CUL))
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#define bFM3_MFT_PPG_PPGC23_PCS1 *((volatile unsigned int*)(0x42486890UL))
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#define bFM3_MFT_PPG_PPGC23_INTM *((volatile unsigned int*)(0x42486894UL))
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#define bFM3_MFT_PPG_PPGC23_PUF *((volatile unsigned int*)(0x42486898UL))
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#define bFM3_MFT_PPG_PPGC23_PIE *((volatile unsigned int*)(0x4248689CUL))
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#define bFM3_MFT_PPG_PPGC22_TTRG *((volatile unsigned int*)(0x424868A0UL))
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#define bFM3_MFT_PPG_PPGC22_MD0 *((volatile unsigned int*)(0x424868A4UL))
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#define bFM3_MFT_PPG_PPGC22_MD1 *((volatile unsigned int*)(0x424868A8UL))
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#define bFM3_MFT_PPG_PPGC22_PCS0 *((volatile unsigned int*)(0x424868ACUL))
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#define bFM3_MFT_PPG_PPGC22_PCS1 *((volatile unsigned int*)(0x424868B0UL))
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#define bFM3_MFT_PPG_PPGC22_INTM *((volatile unsigned int*)(0x424868B4UL))
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#define bFM3_MFT_PPG_PPGC22_PUF *((volatile unsigned int*)(0x424868B8UL))
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#define bFM3_MFT_PPG_PPGC22_PIE *((volatile unsigned int*)(0x424868BCUL))
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#define bFM3_MFT_PPG_GATEC20_EDGE20 *((volatile unsigned int*)(0x42486B00UL))
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#define bFM3_MFT_PPG_GATEC20_STRG20 *((volatile unsigned int*)(0x42486B04UL))
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#define bFM3_MFT_PPG_GATEC20_EDGE22 *((volatile unsigned int*)(0x42486B10UL))
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#define bFM3_MFT_PPG_GATEC20_STRG22 *((volatile unsigned int*)(0x42486B14UL))
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|
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/* Base Timer 0 PPG registers */
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#define bFM3_BT0_PPG_TMCR_STRG *((volatile unsigned int*)(0x424A0180UL))
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#define bFM3_BT0_PPG_TMCR_CTEN *((volatile unsigned int*)(0x424A0184UL))
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|
#define bFM3_BT0_PPG_TMCR_MDSE *((volatile unsigned int*)(0x424A0188UL))
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#define bFM3_BT0_PPG_TMCR_OSEL *((volatile unsigned int*)(0x424A018CUL))
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#define bFM3_BT0_PPG_TMCR_FMD0 *((volatile unsigned int*)(0x424A0190UL))
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#define bFM3_BT0_PPG_TMCR_FMD1 *((volatile unsigned int*)(0x424A0194UL))
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#define bFM3_BT0_PPG_TMCR_FMD2 *((volatile unsigned int*)(0x424A0198UL))
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|
#define bFM3_BT0_PPG_TMCR_EGS0 *((volatile unsigned int*)(0x424A01A0UL))
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#define bFM3_BT0_PPG_TMCR_EGS1 *((volatile unsigned int*)(0x424A01A4UL))
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|
#define bFM3_BT0_PPG_TMCR_PMSK *((volatile unsigned int*)(0x424A01A8UL))
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|
#define bFM3_BT0_PPG_TMCR_RTGEN *((volatile unsigned int*)(0x424A01ACUL))
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#define bFM3_BT0_PPG_TMCR_CKS0 *((volatile unsigned int*)(0x424A01B0UL))
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#define bFM3_BT0_PPG_TMCR_CKS1 *((volatile unsigned int*)(0x424A01B4UL))
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#define bFM3_BT0_PPG_TMCR_CKS2 *((volatile unsigned int*)(0x424A01B8UL))
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#define bFM3_BT0_PPG_STC_UDIR *((volatile unsigned int*)(0x424A0200UL))
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#define bFM3_BT0_PPG_STC_TGIR *((volatile unsigned int*)(0x424A0208UL))
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#define bFM3_BT0_PPG_STC_UDIE *((volatile unsigned int*)(0x424A0210UL))
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|
#define bFM3_BT0_PPG_STC_TGIE *((volatile unsigned int*)(0x424A0218UL))
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#define bFM3_BT0_PPG_TMCR2_CKS3 *((volatile unsigned int*)(0x424A0220UL))
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|
|
|
/* Base Timer 0 PWM registers */
|
|
#define bFM3_BT0_PWM_TMCR_STRG *((volatile unsigned int*)(0x424A0180UL))
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|
#define bFM3_BT0_PWM_TMCR_CTEN *((volatile unsigned int*)(0x424A0184UL))
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|
#define bFM3_BT0_PWM_TMCR_MDSE *((volatile unsigned int*)(0x424A0188UL))
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|
#define bFM3_BT0_PWM_TMCR_OSEL *((volatile unsigned int*)(0x424A018CUL))
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|
#define bFM3_BT0_PWM_TMCR_FMD0 *((volatile unsigned int*)(0x424A0190UL))
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|
#define bFM3_BT0_PWM_TMCR_FMD1 *((volatile unsigned int*)(0x424A0194UL))
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|
#define bFM3_BT0_PWM_TMCR_FMD2 *((volatile unsigned int*)(0x424A0198UL))
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|
#define bFM3_BT0_PWM_TMCR_EGS0 *((volatile unsigned int*)(0x424A01A0UL))
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|
#define bFM3_BT0_PWM_TMCR_EGS1 *((volatile unsigned int*)(0x424A01A4UL))
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#define bFM3_BT0_PWM_TMCR_PMSK *((volatile unsigned int*)(0x424A01A8UL))
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#define bFM3_BT0_PWM_TMCR_RTGEN *((volatile unsigned int*)(0x424A01ACUL))
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#define bFM3_BT0_PWM_TMCR_CKS0 *((volatile unsigned int*)(0x424A01B0UL))
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|
#define bFM3_BT0_PWM_TMCR_CKS1 *((volatile unsigned int*)(0x424A01B4UL))
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#define bFM3_BT0_PWM_TMCR_CKS2 *((volatile unsigned int*)(0x424A01B8UL))
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#define bFM3_BT0_PWM_STC_UDIR *((volatile unsigned int*)(0x424A0200UL))
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#define bFM3_BT0_PWM_STC_DTIR *((volatile unsigned int*)(0x424A0204UL))
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#define bFM3_BT0_PWM_STC_TGIR *((volatile unsigned int*)(0x424A0208UL))
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#define bFM3_BT0_PWM_STC_UDIE *((volatile unsigned int*)(0x424A0210UL))
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#define bFM3_BT0_PWM_STC_DTIE *((volatile unsigned int*)(0x424A0214UL))
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#define bFM3_BT0_PWM_STC_TGIE *((volatile unsigned int*)(0x424A0218UL))
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#define bFM3_BT0_PWM_TMCR2_CKS3 *((volatile unsigned int*)(0x424A0220UL))
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|
|
|
/* Base Timer 0 RT registers */
|
|
#define bFM3_BT0_RT_TMCR_STRG *((volatile unsigned int*)(0x424A0180UL))
|
|
#define bFM3_BT0_RT_TMCR_CTEN *((volatile unsigned int*)(0x424A0184UL))
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#define bFM3_BT0_RT_TMCR_MDSE *((volatile unsigned int*)(0x424A0188UL))
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|
#define bFM3_BT0_RT_TMCR_OSEL *((volatile unsigned int*)(0x424A018CUL))
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#define bFM3_BT0_RT_TMCR_FMD0 *((volatile unsigned int*)(0x424A0190UL))
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#define bFM3_BT0_RT_TMCR_FMD1 *((volatile unsigned int*)(0x424A0194UL))
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#define bFM3_BT0_RT_TMCR_FMD2 *((volatile unsigned int*)(0x424A0198UL))
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#define bFM3_BT0_RT_TMCR_T32 *((volatile unsigned int*)(0x424A019CUL))
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#define bFM3_BT0_RT_TMCR_EGS0 *((volatile unsigned int*)(0x424A01A0UL))
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#define bFM3_BT0_RT_TMCR_EGS1 *((volatile unsigned int*)(0x424A01A4UL))
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#define bFM3_BT0_RT_TMCR_CKS0 *((volatile unsigned int*)(0x424A01B0UL))
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#define bFM3_BT0_RT_TMCR_CKS1 *((volatile unsigned int*)(0x424A01B4UL))
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#define bFM3_BT0_RT_TMCR_CKS2 *((volatile unsigned int*)(0x424A01B8UL))
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#define bFM3_BT0_RT_STC_UDIR *((volatile unsigned int*)(0x424A0200UL))
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#define bFM3_BT0_RT_STC_TGIR *((volatile unsigned int*)(0x424A0208UL))
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#define bFM3_BT0_RT_STC_UDIE *((volatile unsigned int*)(0x424A0210UL))
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#define bFM3_BT0_RT_STC_TGIE *((volatile unsigned int*)(0x424A0218UL))
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#define bFM3_BT0_RT_TMCR2_CKS3 *((volatile unsigned int*)(0x424A0220UL))
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/* Base Timer 0 PWC registers */
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#define bFM3_BT0_PWC_TMCR_CTEN *((volatile unsigned int*)(0x424A0184UL))
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#define bFM3_BT0_PWC_TMCR_MDSE *((volatile unsigned int*)(0x424A0188UL))
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#define bFM3_BT0_PWC_TMCR_FMD0 *((volatile unsigned int*)(0x424A0190UL))
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#define bFM3_BT0_PWC_TMCR_FMD1 *((volatile unsigned int*)(0x424A0194UL))
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#define bFM3_BT0_PWC_TMCR_FMD2 *((volatile unsigned int*)(0x424A0198UL))
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#define bFM3_BT0_PWC_TMCR_T32 *((volatile unsigned int*)(0x424A019CUL))
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#define bFM3_BT0_PWC_TMCR_EGS0 *((volatile unsigned int*)(0x424A01A0UL))
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#define bFM3_BT0_PWC_TMCR_EGS1 *((volatile unsigned int*)(0x424A01A4UL))
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#define bFM3_BT0_PWC_TMCR_EGS2 *((volatile unsigned int*)(0x424A01A8UL))
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#define bFM3_BT0_PWC_TMCR_CKS0 *((volatile unsigned int*)(0x424A01B0UL))
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#define bFM3_BT0_PWC_TMCR_CKS1 *((volatile unsigned int*)(0x424A01B4UL))
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#define bFM3_BT0_PWC_TMCR_CKS2 *((volatile unsigned int*)(0x424A01B8UL))
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#define bFM3_BT0_PWC_STC_OVIR *((volatile unsigned int*)(0x424A0200UL))
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#define bFM3_BT0_PWC_STC_EDIR *((volatile unsigned int*)(0x424A0208UL))
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#define bFM3_BT0_PWC_STC_OVIE *((volatile unsigned int*)(0x424A0210UL))
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#define bFM3_BT0_PWC_STC_EDIE *((volatile unsigned int*)(0x424A0218UL))
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#define bFM3_BT0_PWC_STC_ERR *((volatile unsigned int*)(0x424A021CUL))
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#define bFM3_BT0_PWC_TMCR2_CKS3 *((volatile unsigned int*)(0x424A0220UL))
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/* Base Timer 1 PPG registers */
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#define bFM3_BT1_PPG_TMCR_STRG *((volatile unsigned int*)(0x424A0980UL))
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#define bFM3_BT1_PPG_TMCR_CTEN *((volatile unsigned int*)(0x424A0984UL))
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#define bFM3_BT1_PPG_TMCR_MDSE *((volatile unsigned int*)(0x424A0988UL))
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#define bFM3_BT1_PPG_TMCR_OSEL *((volatile unsigned int*)(0x424A098CUL))
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#define bFM3_BT1_PPG_TMCR_FMD0 *((volatile unsigned int*)(0x424A0990UL))
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#define bFM3_BT1_PPG_TMCR_FMD1 *((volatile unsigned int*)(0x424A0994UL))
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#define bFM3_BT1_PPG_TMCR_FMD2 *((volatile unsigned int*)(0x424A0998UL))
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#define bFM3_BT1_PPG_TMCR_EGS0 *((volatile unsigned int*)(0x424A09A0UL))
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#define bFM3_BT1_PPG_TMCR_EGS1 *((volatile unsigned int*)(0x424A09A4UL))
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#define bFM3_BT1_PPG_TMCR_PMSK *((volatile unsigned int*)(0x424A09A8UL))
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#define bFM3_BT1_PPG_TMCR_RTGEN *((volatile unsigned int*)(0x424A09ACUL))
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#define bFM3_BT1_PPG_TMCR_CKS0 *((volatile unsigned int*)(0x424A09B0UL))
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#define bFM3_BT1_PPG_TMCR_CKS1 *((volatile unsigned int*)(0x424A09B4UL))
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#define bFM3_BT1_PPG_TMCR_CKS2 *((volatile unsigned int*)(0x424A09B8UL))
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#define bFM3_BT1_PPG_STC_UDIR *((volatile unsigned int*)(0x424A0A00UL))
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#define bFM3_BT1_PPG_STC_TGIR *((volatile unsigned int*)(0x424A0A08UL))
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#define bFM3_BT1_PPG_STC_UDIE *((volatile unsigned int*)(0x424A0A10UL))
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#define bFM3_BT1_PPG_STC_TGIE *((volatile unsigned int*)(0x424A0A18UL))
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#define bFM3_BT1_PPG_TMCR2_CKS3 *((volatile unsigned int*)(0x424A0A20UL))
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/* Base Timer 1 PWM registers */
|
|
#define bFM3_BT1_PWM_TMCR_STRG *((volatile unsigned int*)(0x424A0980UL))
|
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#define bFM3_BT1_PWM_TMCR_CTEN *((volatile unsigned int*)(0x424A0984UL))
|
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#define bFM3_BT1_PWM_TMCR_MDSE *((volatile unsigned int*)(0x424A0988UL))
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#define bFM3_BT1_PWM_TMCR_OSEL *((volatile unsigned int*)(0x424A098CUL))
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#define bFM3_BT1_PWM_TMCR_FMD0 *((volatile unsigned int*)(0x424A0990UL))
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#define bFM3_BT1_PWM_TMCR_FMD1 *((volatile unsigned int*)(0x424A0994UL))
|
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#define bFM3_BT1_PWM_TMCR_FMD2 *((volatile unsigned int*)(0x424A0998UL))
|
|
#define bFM3_BT1_PWM_TMCR_EGS0 *((volatile unsigned int*)(0x424A09A0UL))
|
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#define bFM3_BT1_PWM_TMCR_EGS1 *((volatile unsigned int*)(0x424A09A4UL))
|
|
#define bFM3_BT1_PWM_TMCR_PMSK *((volatile unsigned int*)(0x424A09A8UL))
|
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#define bFM3_BT1_PWM_TMCR_RTGEN *((volatile unsigned int*)(0x424A09ACUL))
|
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#define bFM3_BT1_PWM_TMCR_CKS0 *((volatile unsigned int*)(0x424A09B0UL))
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#define bFM3_BT1_PWM_TMCR_CKS1 *((volatile unsigned int*)(0x424A09B4UL))
|
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#define bFM3_BT1_PWM_TMCR_CKS2 *((volatile unsigned int*)(0x424A09B8UL))
|
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#define bFM3_BT1_PWM_STC_UDIR *((volatile unsigned int*)(0x424A0A00UL))
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#define bFM3_BT1_PWM_STC_DTIR *((volatile unsigned int*)(0x424A0A04UL))
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#define bFM3_BT1_PWM_STC_TGIR *((volatile unsigned int*)(0x424A0A08UL))
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#define bFM3_BT1_PWM_STC_UDIE *((volatile unsigned int*)(0x424A0A10UL))
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#define bFM3_BT1_PWM_STC_DTIE *((volatile unsigned int*)(0x424A0A14UL))
|
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#define bFM3_BT1_PWM_STC_TGIE *((volatile unsigned int*)(0x424A0A18UL))
|
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#define bFM3_BT1_PWM_TMCR2_CKS3 *((volatile unsigned int*)(0x424A0A20UL))
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|
|
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/* Base Timer 1 RT registers */
|
|
#define bFM3_BT1_RT_TMCR_STRG *((volatile unsigned int*)(0x424A0980UL))
|
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#define bFM3_BT1_RT_TMCR_CTEN *((volatile unsigned int*)(0x424A0984UL))
|
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#define bFM3_BT1_RT_TMCR_MDSE *((volatile unsigned int*)(0x424A0988UL))
|
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#define bFM3_BT1_RT_TMCR_OSEL *((volatile unsigned int*)(0x424A098CUL))
|
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#define bFM3_BT1_RT_TMCR_FMD0 *((volatile unsigned int*)(0x424A0990UL))
|
|
#define bFM3_BT1_RT_TMCR_FMD1 *((volatile unsigned int*)(0x424A0994UL))
|
|
#define bFM3_BT1_RT_TMCR_FMD2 *((volatile unsigned int*)(0x424A0998UL))
|
|
#define bFM3_BT1_RT_TMCR_T32 *((volatile unsigned int*)(0x424A099CUL))
|
|
#define bFM3_BT1_RT_TMCR_EGS0 *((volatile unsigned int*)(0x424A09A0UL))
|
|
#define bFM3_BT1_RT_TMCR_EGS1 *((volatile unsigned int*)(0x424A09A4UL))
|
|
#define bFM3_BT1_RT_TMCR_CKS0 *((volatile unsigned int*)(0x424A09B0UL))
|
|
#define bFM3_BT1_RT_TMCR_CKS1 *((volatile unsigned int*)(0x424A09B4UL))
|
|
#define bFM3_BT1_RT_TMCR_CKS2 *((volatile unsigned int*)(0x424A09B8UL))
|
|
#define bFM3_BT1_RT_STC_UDIR *((volatile unsigned int*)(0x424A0A00UL))
|
|
#define bFM3_BT1_RT_STC_TGIR *((volatile unsigned int*)(0x424A0A08UL))
|
|
#define bFM3_BT1_RT_STC_UDIE *((volatile unsigned int*)(0x424A0A10UL))
|
|
#define bFM3_BT1_RT_STC_TGIE *((volatile unsigned int*)(0x424A0A18UL))
|
|
#define bFM3_BT1_RT_TMCR2_CKS3 *((volatile unsigned int*)(0x424A0A20UL))
|
|
|
|
/* Base Timer 1 PWC registers */
|
|
#define bFM3_BT1_PWC_TMCR_CTEN *((volatile unsigned int*)(0x424A0984UL))
|
|
#define bFM3_BT1_PWC_TMCR_MDSE *((volatile unsigned int*)(0x424A0988UL))
|
|
#define bFM3_BT1_PWC_TMCR_FMD0 *((volatile unsigned int*)(0x424A0990UL))
|
|
#define bFM3_BT1_PWC_TMCR_FMD1 *((volatile unsigned int*)(0x424A0994UL))
|
|
#define bFM3_BT1_PWC_TMCR_FMD2 *((volatile unsigned int*)(0x424A0998UL))
|
|
#define bFM3_BT1_PWC_TMCR_T32 *((volatile unsigned int*)(0x424A099CUL))
|
|
#define bFM3_BT1_PWC_TMCR_EGS0 *((volatile unsigned int*)(0x424A09A0UL))
|
|
#define bFM3_BT1_PWC_TMCR_EGS1 *((volatile unsigned int*)(0x424A09A4UL))
|
|
#define bFM3_BT1_PWC_TMCR_EGS2 *((volatile unsigned int*)(0x424A09A8UL))
|
|
#define bFM3_BT1_PWC_TMCR_CKS0 *((volatile unsigned int*)(0x424A09B0UL))
|
|
#define bFM3_BT1_PWC_TMCR_CKS1 *((volatile unsigned int*)(0x424A09B4UL))
|
|
#define bFM3_BT1_PWC_TMCR_CKS2 *((volatile unsigned int*)(0x424A09B8UL))
|
|
#define bFM3_BT1_PWC_STC_OVIR *((volatile unsigned int*)(0x424A0A00UL))
|
|
#define bFM3_BT1_PWC_STC_EDIR *((volatile unsigned int*)(0x424A0A08UL))
|
|
#define bFM3_BT1_PWC_STC_OVIE *((volatile unsigned int*)(0x424A0A10UL))
|
|
#define bFM3_BT1_PWC_STC_EDIE *((volatile unsigned int*)(0x424A0A18UL))
|
|
#define bFM3_BT1_PWC_STC_ERR *((volatile unsigned int*)(0x424A0A1CUL))
|
|
#define bFM3_BT1_PWC_TMCR2_CKS3 *((volatile unsigned int*)(0x424A0A20UL))
|
|
|
|
/* Base Timer 2 PPG registers */
|
|
#define bFM3_BT2_PPG_TMCR_STRG *((volatile unsigned int*)(0x424A1180UL))
|
|
#define bFM3_BT2_PPG_TMCR_CTEN *((volatile unsigned int*)(0x424A1184UL))
|
|
#define bFM3_BT2_PPG_TMCR_MDSE *((volatile unsigned int*)(0x424A1188UL))
|
|
#define bFM3_BT2_PPG_TMCR_OSEL *((volatile unsigned int*)(0x424A118CUL))
|
|
#define bFM3_BT2_PPG_TMCR_FMD0 *((volatile unsigned int*)(0x424A1190UL))
|
|
#define bFM3_BT2_PPG_TMCR_FMD1 *((volatile unsigned int*)(0x424A1194UL))
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#define bFM3_BT2_PPG_TMCR_FMD2 *((volatile unsigned int*)(0x424A1198UL))
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#define bFM3_BT2_PPG_TMCR_EGS0 *((volatile unsigned int*)(0x424A11A0UL))
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#define bFM3_BT2_PPG_TMCR_EGS1 *((volatile unsigned int*)(0x424A11A4UL))
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#define bFM3_BT2_PPG_TMCR_PMSK *((volatile unsigned int*)(0x424A11A8UL))
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#define bFM3_BT2_PPG_TMCR_RTGEN *((volatile unsigned int*)(0x424A11ACUL))
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#define bFM3_BT2_PPG_TMCR_CKS0 *((volatile unsigned int*)(0x424A11B0UL))
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#define bFM3_BT2_PPG_TMCR_CKS1 *((volatile unsigned int*)(0x424A11B4UL))
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#define bFM3_BT2_PPG_TMCR_CKS2 *((volatile unsigned int*)(0x424A11B8UL))
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#define bFM3_BT2_PPG_STC_UDIR *((volatile unsigned int*)(0x424A1200UL))
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#define bFM3_BT2_PPG_STC_TGIR *((volatile unsigned int*)(0x424A1208UL))
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#define bFM3_BT2_PPG_STC_UDIE *((volatile unsigned int*)(0x424A1210UL))
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#define bFM3_BT2_PPG_STC_TGIE *((volatile unsigned int*)(0x424A1218UL))
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#define bFM3_BT2_PPG_TMCR2_CKS3 *((volatile unsigned int*)(0x424A1220UL))
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/* Base Timer 2 PWM registers */
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#define bFM3_BT2_PWM_TMCR_STRG *((volatile unsigned int*)(0x424A1180UL))
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#define bFM3_BT2_PWM_TMCR_CTEN *((volatile unsigned int*)(0x424A1184UL))
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#define bFM3_BT2_PWM_TMCR_MDSE *((volatile unsigned int*)(0x424A1188UL))
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#define bFM3_BT2_PWM_TMCR_OSEL *((volatile unsigned int*)(0x424A118CUL))
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#define bFM3_BT2_PWM_TMCR_FMD0 *((volatile unsigned int*)(0x424A1190UL))
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#define bFM3_BT2_PWM_TMCR_FMD1 *((volatile unsigned int*)(0x424A1194UL))
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#define bFM3_BT2_PWM_TMCR_FMD2 *((volatile unsigned int*)(0x424A1198UL))
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#define bFM3_BT2_PWM_TMCR_EGS0 *((volatile unsigned int*)(0x424A11A0UL))
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#define bFM3_BT2_PWM_TMCR_EGS1 *((volatile unsigned int*)(0x424A11A4UL))
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#define bFM3_BT2_PWM_TMCR_PMSK *((volatile unsigned int*)(0x424A11A8UL))
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#define bFM3_BT2_PWM_TMCR_RTGEN *((volatile unsigned int*)(0x424A11ACUL))
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#define bFM3_BT2_PWM_TMCR_CKS0 *((volatile unsigned int*)(0x424A11B0UL))
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#define bFM3_BT2_PWM_TMCR_CKS1 *((volatile unsigned int*)(0x424A11B4UL))
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#define bFM3_BT2_PWM_TMCR_CKS2 *((volatile unsigned int*)(0x424A11B8UL))
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#define bFM3_BT2_PWM_STC_UDIR *((volatile unsigned int*)(0x424A1200UL))
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#define bFM3_BT2_PWM_STC_DTIR *((volatile unsigned int*)(0x424A1204UL))
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#define bFM3_BT2_PWM_STC_TGIR *((volatile unsigned int*)(0x424A1208UL))
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#define bFM3_BT2_PWM_STC_UDIE *((volatile unsigned int*)(0x424A1210UL))
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#define bFM3_BT2_PWM_STC_DTIE *((volatile unsigned int*)(0x424A1214UL))
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#define bFM3_BT2_PWM_STC_TGIE *((volatile unsigned int*)(0x424A1218UL))
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#define bFM3_BT2_PWM_TMCR2_CKS3 *((volatile unsigned int*)(0x424A1220UL))
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/* Base Timer 2 RT registers */
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#define bFM3_BT2_RT_TMCR_STRG *((volatile unsigned int*)(0x424A1180UL))
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#define bFM3_BT2_RT_TMCR_CTEN *((volatile unsigned int*)(0x424A1184UL))
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#define bFM3_BT2_RT_TMCR_MDSE *((volatile unsigned int*)(0x424A1188UL))
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#define bFM3_BT2_RT_TMCR_OSEL *((volatile unsigned int*)(0x424A118CUL))
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#define bFM3_BT2_RT_TMCR_FMD0 *((volatile unsigned int*)(0x424A1190UL))
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#define bFM3_BT2_RT_TMCR_FMD1 *((volatile unsigned int*)(0x424A1194UL))
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#define bFM3_BT2_RT_TMCR_FMD2 *((volatile unsigned int*)(0x424A1198UL))
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#define bFM3_BT2_RT_TMCR_T32 *((volatile unsigned int*)(0x424A119CUL))
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#define bFM3_BT2_RT_TMCR_EGS0 *((volatile unsigned int*)(0x424A11A0UL))
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#define bFM3_BT2_RT_TMCR_EGS1 *((volatile unsigned int*)(0x424A11A4UL))
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#define bFM3_BT2_RT_TMCR_CKS0 *((volatile unsigned int*)(0x424A11B0UL))
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#define bFM3_BT2_RT_TMCR_CKS1 *((volatile unsigned int*)(0x424A11B4UL))
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#define bFM3_BT2_RT_TMCR_CKS2 *((volatile unsigned int*)(0x424A11B8UL))
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#define bFM3_BT2_RT_STC_UDIR *((volatile unsigned int*)(0x424A1200UL))
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#define bFM3_BT2_RT_STC_TGIR *((volatile unsigned int*)(0x424A1208UL))
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#define bFM3_BT2_RT_STC_UDIE *((volatile unsigned int*)(0x424A1210UL))
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#define bFM3_BT2_RT_STC_TGIE *((volatile unsigned int*)(0x424A1218UL))
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#define bFM3_BT2_RT_TMCR2_CKS3 *((volatile unsigned int*)(0x424A1220UL))
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/* Base Timer 2 PWC registers */
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#define bFM3_BT2_PWC_TMCR_CTEN *((volatile unsigned int*)(0x424A1184UL))
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#define bFM3_BT2_PWC_TMCR_MDSE *((volatile unsigned int*)(0x424A1188UL))
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#define bFM3_BT2_PWC_TMCR_FMD0 *((volatile unsigned int*)(0x424A1190UL))
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#define bFM3_BT2_PWC_TMCR_FMD1 *((volatile unsigned int*)(0x424A1194UL))
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#define bFM3_BT2_PWC_TMCR_FMD2 *((volatile unsigned int*)(0x424A1198UL))
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#define bFM3_BT2_PWC_TMCR_T32 *((volatile unsigned int*)(0x424A119CUL))
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#define bFM3_BT2_PWC_TMCR_EGS0 *((volatile unsigned int*)(0x424A11A0UL))
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#define bFM3_BT2_PWC_TMCR_EGS1 *((volatile unsigned int*)(0x424A11A4UL))
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#define bFM3_BT2_PWC_TMCR_EGS2 *((volatile unsigned int*)(0x424A11A8UL))
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#define bFM3_BT2_PWC_TMCR_CKS0 *((volatile unsigned int*)(0x424A11B0UL))
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#define bFM3_BT2_PWC_TMCR_CKS1 *((volatile unsigned int*)(0x424A11B4UL))
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#define bFM3_BT2_PWC_TMCR_CKS2 *((volatile unsigned int*)(0x424A11B8UL))
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#define bFM3_BT2_PWC_STC_OVIR *((volatile unsigned int*)(0x424A1200UL))
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#define bFM3_BT2_PWC_STC_EDIR *((volatile unsigned int*)(0x424A1208UL))
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#define bFM3_BT2_PWC_STC_OVIE *((volatile unsigned int*)(0x424A1210UL))
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#define bFM3_BT2_PWC_STC_EDIE *((volatile unsigned int*)(0x424A1218UL))
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#define bFM3_BT2_PWC_STC_ERR *((volatile unsigned int*)(0x424A121CUL))
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#define bFM3_BT2_PWC_TMCR2_CKS3 *((volatile unsigned int*)(0x424A1220UL))
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/* Base Timer 3 PPG registers */
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#define bFM3_BT3_PPG_TMCR_STRG *((volatile unsigned int*)(0x424A1980UL))
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#define bFM3_BT3_PPG_TMCR_CTEN *((volatile unsigned int*)(0x424A1984UL))
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#define bFM3_BT3_PPG_TMCR_MDSE *((volatile unsigned int*)(0x424A1988UL))
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#define bFM3_BT3_PPG_TMCR_OSEL *((volatile unsigned int*)(0x424A198CUL))
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#define bFM3_BT3_PPG_TMCR_FMD0 *((volatile unsigned int*)(0x424A1990UL))
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#define bFM3_BT3_PPG_TMCR_FMD1 *((volatile unsigned int*)(0x424A1994UL))
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#define bFM3_BT3_PPG_TMCR_FMD2 *((volatile unsigned int*)(0x424A1998UL))
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#define bFM3_BT3_PPG_TMCR_EGS0 *((volatile unsigned int*)(0x424A19A0UL))
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#define bFM3_BT3_PPG_TMCR_EGS1 *((volatile unsigned int*)(0x424A19A4UL))
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#define bFM3_BT3_PPG_TMCR_PMSK *((volatile unsigned int*)(0x424A19A8UL))
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#define bFM3_BT3_PPG_TMCR_RTGEN *((volatile unsigned int*)(0x424A19ACUL))
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#define bFM3_BT3_PPG_TMCR_CKS0 *((volatile unsigned int*)(0x424A19B0UL))
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#define bFM3_BT3_PPG_TMCR_CKS1 *((volatile unsigned int*)(0x424A19B4UL))
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#define bFM3_BT3_PPG_TMCR_CKS2 *((volatile unsigned int*)(0x424A19B8UL))
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#define bFM3_BT3_PPG_STC_UDIR *((volatile unsigned int*)(0x424A1A00UL))
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#define bFM3_BT3_PPG_STC_TGIR *((volatile unsigned int*)(0x424A1A08UL))
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#define bFM3_BT3_PPG_STC_UDIE *((volatile unsigned int*)(0x424A1A10UL))
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#define bFM3_BT3_PPG_STC_TGIE *((volatile unsigned int*)(0x424A1A18UL))
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#define bFM3_BT3_PPG_TMCR2_CKS3 *((volatile unsigned int*)(0x424A1A20UL))
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/* Base Timer 3 PWM registers */
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#define bFM3_BT3_PWM_TMCR_STRG *((volatile unsigned int*)(0x424A1980UL))
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#define bFM3_BT3_PWM_TMCR_CTEN *((volatile unsigned int*)(0x424A1984UL))
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#define bFM3_BT3_PWM_TMCR_MDSE *((volatile unsigned int*)(0x424A1988UL))
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#define bFM3_BT3_PWM_TMCR_OSEL *((volatile unsigned int*)(0x424A198CUL))
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#define bFM3_BT3_PWM_TMCR_FMD0 *((volatile unsigned int*)(0x424A1990UL))
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#define bFM3_BT3_PWM_TMCR_FMD1 *((volatile unsigned int*)(0x424A1994UL))
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#define bFM3_BT3_PWM_TMCR_FMD2 *((volatile unsigned int*)(0x424A1998UL))
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#define bFM3_BT3_PWM_TMCR_EGS0 *((volatile unsigned int*)(0x424A19A0UL))
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#define bFM3_BT3_PWM_TMCR_EGS1 *((volatile unsigned int*)(0x424A19A4UL))
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#define bFM3_BT3_PWM_TMCR_PMSK *((volatile unsigned int*)(0x424A19A8UL))
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#define bFM3_BT3_PWM_TMCR_RTGEN *((volatile unsigned int*)(0x424A19ACUL))
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#define bFM3_BT3_PWM_TMCR_CKS0 *((volatile unsigned int*)(0x424A19B0UL))
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#define bFM3_BT3_PWM_TMCR_CKS1 *((volatile unsigned int*)(0x424A19B4UL))
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#define bFM3_BT3_PWM_TMCR_CKS2 *((volatile unsigned int*)(0x424A19B8UL))
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#define bFM3_BT3_PWM_STC_UDIR *((volatile unsigned int*)(0x424A1A00UL))
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#define bFM3_BT3_PWM_STC_DTIR *((volatile unsigned int*)(0x424A1A04UL))
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#define bFM3_BT3_PWM_STC_TGIR *((volatile unsigned int*)(0x424A1A08UL))
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#define bFM3_BT3_PWM_STC_UDIE *((volatile unsigned int*)(0x424A1A10UL))
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#define bFM3_BT3_PWM_STC_DTIE *((volatile unsigned int*)(0x424A1A14UL))
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#define bFM3_BT3_PWM_STC_TGIE *((volatile unsigned int*)(0x424A1A18UL))
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#define bFM3_BT3_PWM_TMCR2_CKS3 *((volatile unsigned int*)(0x424A1A20UL))
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/* Base Timer 3 RT registers */
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#define bFM3_BT3_RT_TMCR_STRG *((volatile unsigned int*)(0x424A1980UL))
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#define bFM3_BT3_RT_TMCR_CTEN *((volatile unsigned int*)(0x424A1984UL))
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#define bFM3_BT3_RT_TMCR_MDSE *((volatile unsigned int*)(0x424A1988UL))
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#define bFM3_BT3_RT_TMCR_OSEL *((volatile unsigned int*)(0x424A198CUL))
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#define bFM3_BT3_RT_TMCR_FMD0 *((volatile unsigned int*)(0x424A1990UL))
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#define bFM3_BT3_RT_TMCR_FMD1 *((volatile unsigned int*)(0x424A1994UL))
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#define bFM3_BT3_RT_TMCR_FMD2 *((volatile unsigned int*)(0x424A1998UL))
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#define bFM3_BT3_RT_TMCR_T32 *((volatile unsigned int*)(0x424A199CUL))
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#define bFM3_BT3_RT_TMCR_EGS0 *((volatile unsigned int*)(0x424A19A0UL))
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#define bFM3_BT3_RT_TMCR_EGS1 *((volatile unsigned int*)(0x424A19A4UL))
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#define bFM3_BT3_RT_TMCR_CKS0 *((volatile unsigned int*)(0x424A19B0UL))
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#define bFM3_BT3_RT_TMCR_CKS1 *((volatile unsigned int*)(0x424A19B4UL))
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#define bFM3_BT3_RT_TMCR_CKS2 *((volatile unsigned int*)(0x424A19B8UL))
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#define bFM3_BT3_RT_STC_UDIR *((volatile unsigned int*)(0x424A1A00UL))
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#define bFM3_BT3_RT_STC_TGIR *((volatile unsigned int*)(0x424A1A08UL))
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#define bFM3_BT3_RT_STC_UDIE *((volatile unsigned int*)(0x424A1A10UL))
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#define bFM3_BT3_RT_STC_TGIE *((volatile unsigned int*)(0x424A1A18UL))
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#define bFM3_BT3_RT_TMCR2_CKS3 *((volatile unsigned int*)(0x424A1A20UL))
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/* Base Timer 3 PWC registers */
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#define bFM3_BT3_PWC_TMCR_CTEN *((volatile unsigned int*)(0x424A1984UL))
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#define bFM3_BT3_PWC_TMCR_MDSE *((volatile unsigned int*)(0x424A1988UL))
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#define bFM3_BT3_PWC_TMCR_FMD0 *((volatile unsigned int*)(0x424A1990UL))
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#define bFM3_BT3_PWC_TMCR_FMD1 *((volatile unsigned int*)(0x424A1994UL))
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#define bFM3_BT3_PWC_TMCR_FMD2 *((volatile unsigned int*)(0x424A1998UL))
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#define bFM3_BT3_PWC_TMCR_T32 *((volatile unsigned int*)(0x424A199CUL))
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#define bFM3_BT3_PWC_TMCR_EGS0 *((volatile unsigned int*)(0x424A19A0UL))
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#define bFM3_BT3_PWC_TMCR_EGS1 *((volatile unsigned int*)(0x424A19A4UL))
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#define bFM3_BT3_PWC_TMCR_EGS2 *((volatile unsigned int*)(0x424A19A8UL))
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#define bFM3_BT3_PWC_TMCR_CKS0 *((volatile unsigned int*)(0x424A19B0UL))
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#define bFM3_BT3_PWC_TMCR_CKS1 *((volatile unsigned int*)(0x424A19B4UL))
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#define bFM3_BT3_PWC_TMCR_CKS2 *((volatile unsigned int*)(0x424A19B8UL))
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#define bFM3_BT3_PWC_STC_OVIR *((volatile unsigned int*)(0x424A1A00UL))
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#define bFM3_BT3_PWC_STC_EDIR *((volatile unsigned int*)(0x424A1A08UL))
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#define bFM3_BT3_PWC_STC_OVIE *((volatile unsigned int*)(0x424A1A10UL))
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#define bFM3_BT3_PWC_STC_EDIE *((volatile unsigned int*)(0x424A1A18UL))
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#define bFM3_BT3_PWC_STC_ERR *((volatile unsigned int*)(0x424A1A1CUL))
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#define bFM3_BT3_PWC_TMCR2_CKS3 *((volatile unsigned int*)(0x424A1A20UL))
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/* Base Timer 4 PPG registers */
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#define bFM3_BT4_PPG_TMCR_STRG *((volatile unsigned int*)(0x424A4180UL))
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#define bFM3_BT4_PPG_TMCR_CTEN *((volatile unsigned int*)(0x424A4184UL))
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#define bFM3_BT4_PPG_TMCR_MDSE *((volatile unsigned int*)(0x424A4188UL))
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#define bFM3_BT4_PPG_TMCR_OSEL *((volatile unsigned int*)(0x424A418CUL))
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#define bFM3_BT4_PPG_TMCR_FMD0 *((volatile unsigned int*)(0x424A4190UL))
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#define bFM3_BT4_PPG_TMCR_FMD1 *((volatile unsigned int*)(0x424A4194UL))
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#define bFM3_BT4_PPG_TMCR_FMD2 *((volatile unsigned int*)(0x424A4198UL))
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#define bFM3_BT4_PPG_TMCR_EGS0 *((volatile unsigned int*)(0x424A41A0UL))
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#define bFM3_BT4_PPG_TMCR_EGS1 *((volatile unsigned int*)(0x424A41A4UL))
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#define bFM3_BT4_PPG_TMCR_PMSK *((volatile unsigned int*)(0x424A41A8UL))
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#define bFM3_BT4_PPG_TMCR_RTGEN *((volatile unsigned int*)(0x424A41ACUL))
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#define bFM3_BT4_PPG_TMCR_CKS0 *((volatile unsigned int*)(0x424A41B0UL))
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#define bFM3_BT4_PPG_TMCR_CKS1 *((volatile unsigned int*)(0x424A41B4UL))
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#define bFM3_BT4_PPG_TMCR_CKS2 *((volatile unsigned int*)(0x424A41B8UL))
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#define bFM3_BT4_PPG_STC_UDIR *((volatile unsigned int*)(0x424A4200UL))
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#define bFM3_BT4_PPG_STC_TGIR *((volatile unsigned int*)(0x424A4208UL))
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#define bFM3_BT4_PPG_STC_UDIE *((volatile unsigned int*)(0x424A4210UL))
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#define bFM3_BT4_PPG_STC_TGIE *((volatile unsigned int*)(0x424A4218UL))
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#define bFM3_BT4_PPG_TMCR2_CKS3 *((volatile unsigned int*)(0x424A4220UL))
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/* Base Timer 4 PWM registers */
|
|
#define bFM3_BT4_PWM_TMCR_STRG *((volatile unsigned int*)(0x424A4180UL))
|
|
#define bFM3_BT4_PWM_TMCR_CTEN *((volatile unsigned int*)(0x424A4184UL))
|
|
#define bFM3_BT4_PWM_TMCR_MDSE *((volatile unsigned int*)(0x424A4188UL))
|
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#define bFM3_BT4_PWM_TMCR_OSEL *((volatile unsigned int*)(0x424A418CUL))
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#define bFM3_BT4_PWM_TMCR_FMD0 *((volatile unsigned int*)(0x424A4190UL))
|
|
#define bFM3_BT4_PWM_TMCR_FMD1 *((volatile unsigned int*)(0x424A4194UL))
|
|
#define bFM3_BT4_PWM_TMCR_FMD2 *((volatile unsigned int*)(0x424A4198UL))
|
|
#define bFM3_BT4_PWM_TMCR_EGS0 *((volatile unsigned int*)(0x424A41A0UL))
|
|
#define bFM3_BT4_PWM_TMCR_EGS1 *((volatile unsigned int*)(0x424A41A4UL))
|
|
#define bFM3_BT4_PWM_TMCR_PMSK *((volatile unsigned int*)(0x424A41A8UL))
|
|
#define bFM3_BT4_PWM_TMCR_RTGEN *((volatile unsigned int*)(0x424A41ACUL))
|
|
#define bFM3_BT4_PWM_TMCR_CKS0 *((volatile unsigned int*)(0x424A41B0UL))
|
|
#define bFM3_BT4_PWM_TMCR_CKS1 *((volatile unsigned int*)(0x424A41B4UL))
|
|
#define bFM3_BT4_PWM_TMCR_CKS2 *((volatile unsigned int*)(0x424A41B8UL))
|
|
#define bFM3_BT4_PWM_STC_UDIR *((volatile unsigned int*)(0x424A4200UL))
|
|
#define bFM3_BT4_PWM_STC_DTIR *((volatile unsigned int*)(0x424A4204UL))
|
|
#define bFM3_BT4_PWM_STC_TGIR *((volatile unsigned int*)(0x424A4208UL))
|
|
#define bFM3_BT4_PWM_STC_UDIE *((volatile unsigned int*)(0x424A4210UL))
|
|
#define bFM3_BT4_PWM_STC_DTIE *((volatile unsigned int*)(0x424A4214UL))
|
|
#define bFM3_BT4_PWM_STC_TGIE *((volatile unsigned int*)(0x424A4218UL))
|
|
#define bFM3_BT4_PWM_TMCR2_CKS3 *((volatile unsigned int*)(0x424A4220UL))
|
|
|
|
/* Base Timer 4 RT registers */
|
|
#define bFM3_BT4_RT_TMCR_STRG *((volatile unsigned int*)(0x424A4180UL))
|
|
#define bFM3_BT4_RT_TMCR_CTEN *((volatile unsigned int*)(0x424A4184UL))
|
|
#define bFM3_BT4_RT_TMCR_MDSE *((volatile unsigned int*)(0x424A4188UL))
|
|
#define bFM3_BT4_RT_TMCR_OSEL *((volatile unsigned int*)(0x424A418CUL))
|
|
#define bFM3_BT4_RT_TMCR_FMD0 *((volatile unsigned int*)(0x424A4190UL))
|
|
#define bFM3_BT4_RT_TMCR_FMD1 *((volatile unsigned int*)(0x424A4194UL))
|
|
#define bFM3_BT4_RT_TMCR_FMD2 *((volatile unsigned int*)(0x424A4198UL))
|
|
#define bFM3_BT4_RT_TMCR_T32 *((volatile unsigned int*)(0x424A419CUL))
|
|
#define bFM3_BT4_RT_TMCR_EGS0 *((volatile unsigned int*)(0x424A41A0UL))
|
|
#define bFM3_BT4_RT_TMCR_EGS1 *((volatile unsigned int*)(0x424A41A4UL))
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#define bFM3_BT4_RT_TMCR_CKS0 *((volatile unsigned int*)(0x424A41B0UL))
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#define bFM3_BT4_RT_TMCR_CKS1 *((volatile unsigned int*)(0x424A41B4UL))
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#define bFM3_BT4_RT_TMCR_CKS2 *((volatile unsigned int*)(0x424A41B8UL))
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#define bFM3_BT4_RT_STC_UDIR *((volatile unsigned int*)(0x424A4200UL))
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#define bFM3_BT4_RT_STC_TGIR *((volatile unsigned int*)(0x424A4208UL))
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#define bFM3_BT4_RT_STC_UDIE *((volatile unsigned int*)(0x424A4210UL))
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#define bFM3_BT4_RT_STC_TGIE *((volatile unsigned int*)(0x424A4218UL))
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#define bFM3_BT4_RT_TMCR2_CKS3 *((volatile unsigned int*)(0x424A4220UL))
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/* Base Timer 4 PWC registers */
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#define bFM3_BT4_PWC_TMCR_CTEN *((volatile unsigned int*)(0x424A4184UL))
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#define bFM3_BT4_PWC_TMCR_MDSE *((volatile unsigned int*)(0x424A4188UL))
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#define bFM3_BT4_PWC_TMCR_FMD0 *((volatile unsigned int*)(0x424A4190UL))
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#define bFM3_BT4_PWC_TMCR_FMD1 *((volatile unsigned int*)(0x424A4194UL))
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#define bFM3_BT4_PWC_TMCR_FMD2 *((volatile unsigned int*)(0x424A4198UL))
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#define bFM3_BT4_PWC_TMCR_T32 *((volatile unsigned int*)(0x424A419CUL))
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#define bFM3_BT4_PWC_TMCR_EGS0 *((volatile unsigned int*)(0x424A41A0UL))
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#define bFM3_BT4_PWC_TMCR_EGS1 *((volatile unsigned int*)(0x424A41A4UL))
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#define bFM3_BT4_PWC_TMCR_EGS2 *((volatile unsigned int*)(0x424A41A8UL))
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#define bFM3_BT4_PWC_TMCR_CKS0 *((volatile unsigned int*)(0x424A41B0UL))
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#define bFM3_BT4_PWC_TMCR_CKS1 *((volatile unsigned int*)(0x424A41B4UL))
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#define bFM3_BT4_PWC_TMCR_CKS2 *((volatile unsigned int*)(0x424A41B8UL))
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#define bFM3_BT4_PWC_STC_OVIR *((volatile unsigned int*)(0x424A4200UL))
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#define bFM3_BT4_PWC_STC_EDIR *((volatile unsigned int*)(0x424A4208UL))
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#define bFM3_BT4_PWC_STC_OVIE *((volatile unsigned int*)(0x424A4210UL))
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#define bFM3_BT4_PWC_STC_EDIE *((volatile unsigned int*)(0x424A4218UL))
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#define bFM3_BT4_PWC_STC_ERR *((volatile unsigned int*)(0x424A421CUL))
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#define bFM3_BT4_PWC_TMCR2_CKS3 *((volatile unsigned int*)(0x424A4220UL))
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/* Base Timer 5 PPG registers */
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#define bFM3_BT5_PPG_TMCR_STRG *((volatile unsigned int*)(0x424A4980UL))
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#define bFM3_BT5_PPG_TMCR_CTEN *((volatile unsigned int*)(0x424A4984UL))
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#define bFM3_BT5_PPG_TMCR_MDSE *((volatile unsigned int*)(0x424A4988UL))
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#define bFM3_BT5_PPG_TMCR_OSEL *((volatile unsigned int*)(0x424A498CUL))
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#define bFM3_BT5_PPG_TMCR_FMD0 *((volatile unsigned int*)(0x424A4990UL))
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#define bFM3_BT5_PPG_TMCR_FMD1 *((volatile unsigned int*)(0x424A4994UL))
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#define bFM3_BT5_PPG_TMCR_FMD2 *((volatile unsigned int*)(0x424A4998UL))
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#define bFM3_BT5_PPG_TMCR_EGS0 *((volatile unsigned int*)(0x424A49A0UL))
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#define bFM3_BT5_PPG_TMCR_EGS1 *((volatile unsigned int*)(0x424A49A4UL))
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#define bFM3_BT5_PPG_TMCR_PMSK *((volatile unsigned int*)(0x424A49A8UL))
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#define bFM3_BT5_PPG_TMCR_RTGEN *((volatile unsigned int*)(0x424A49ACUL))
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#define bFM3_BT5_PPG_TMCR_CKS0 *((volatile unsigned int*)(0x424A49B0UL))
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#define bFM3_BT5_PPG_TMCR_CKS1 *((volatile unsigned int*)(0x424A49B4UL))
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#define bFM3_BT5_PPG_TMCR_CKS2 *((volatile unsigned int*)(0x424A49B8UL))
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#define bFM3_BT5_PPG_STC_UDIR *((volatile unsigned int*)(0x424A4A00UL))
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#define bFM3_BT5_PPG_STC_TGIR *((volatile unsigned int*)(0x424A4A08UL))
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#define bFM3_BT5_PPG_STC_UDIE *((volatile unsigned int*)(0x424A4A10UL))
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#define bFM3_BT5_PPG_STC_TGIE *((volatile unsigned int*)(0x424A4A18UL))
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#define bFM3_BT5_PPG_TMCR2_CKS3 *((volatile unsigned int*)(0x424A4A20UL))
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/* Base Timer 5 PWM registers */
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#define bFM3_BT5_PWM_TMCR_STRG *((volatile unsigned int*)(0x424A4980UL))
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#define bFM3_BT5_PWM_TMCR_CTEN *((volatile unsigned int*)(0x424A4984UL))
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#define bFM3_BT5_PWM_TMCR_MDSE *((volatile unsigned int*)(0x424A4988UL))
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#define bFM3_BT5_PWM_TMCR_OSEL *((volatile unsigned int*)(0x424A498CUL))
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#define bFM3_BT5_PWM_TMCR_FMD0 *((volatile unsigned int*)(0x424A4990UL))
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#define bFM3_BT5_PWM_TMCR_FMD1 *((volatile unsigned int*)(0x424A4994UL))
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#define bFM3_BT5_PWM_TMCR_FMD2 *((volatile unsigned int*)(0x424A4998UL))
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#define bFM3_BT5_PWM_TMCR_EGS0 *((volatile unsigned int*)(0x424A49A0UL))
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#define bFM3_BT5_PWM_TMCR_EGS1 *((volatile unsigned int*)(0x424A49A4UL))
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#define bFM3_BT5_PWM_TMCR_PMSK *((volatile unsigned int*)(0x424A49A8UL))
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#define bFM3_BT5_PWM_TMCR_RTGEN *((volatile unsigned int*)(0x424A49ACUL))
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#define bFM3_BT5_PWM_TMCR_CKS0 *((volatile unsigned int*)(0x424A49B0UL))
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#define bFM3_BT5_PWM_TMCR_CKS1 *((volatile unsigned int*)(0x424A49B4UL))
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#define bFM3_BT5_PWM_TMCR_CKS2 *((volatile unsigned int*)(0x424A49B8UL))
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#define bFM3_BT5_PWM_STC_UDIR *((volatile unsigned int*)(0x424A4A00UL))
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#define bFM3_BT5_PWM_STC_DTIR *((volatile unsigned int*)(0x424A4A04UL))
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#define bFM3_BT5_PWM_STC_TGIR *((volatile unsigned int*)(0x424A4A08UL))
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#define bFM3_BT5_PWM_STC_UDIE *((volatile unsigned int*)(0x424A4A10UL))
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#define bFM3_BT5_PWM_STC_DTIE *((volatile unsigned int*)(0x424A4A14UL))
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#define bFM3_BT5_PWM_STC_TGIE *((volatile unsigned int*)(0x424A4A18UL))
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#define bFM3_BT5_PWM_TMCR2_CKS3 *((volatile unsigned int*)(0x424A4A20UL))
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/* Base Timer 5 RT registers */
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#define bFM3_BT5_RT_TMCR_STRG *((volatile unsigned int*)(0x424A4980UL))
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#define bFM3_BT5_RT_TMCR_CTEN *((volatile unsigned int*)(0x424A4984UL))
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#define bFM3_BT5_RT_TMCR_MDSE *((volatile unsigned int*)(0x424A4988UL))
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#define bFM3_BT5_RT_TMCR_OSEL *((volatile unsigned int*)(0x424A498CUL))
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#define bFM3_BT5_RT_TMCR_FMD0 *((volatile unsigned int*)(0x424A4990UL))
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#define bFM3_BT5_RT_TMCR_FMD1 *((volatile unsigned int*)(0x424A4994UL))
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#define bFM3_BT5_RT_TMCR_FMD2 *((volatile unsigned int*)(0x424A4998UL))
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#define bFM3_BT5_RT_TMCR_T32 *((volatile unsigned int*)(0x424A499CUL))
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#define bFM3_BT5_RT_TMCR_EGS0 *((volatile unsigned int*)(0x424A49A0UL))
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#define bFM3_BT5_RT_TMCR_EGS1 *((volatile unsigned int*)(0x424A49A4UL))
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#define bFM3_BT5_RT_TMCR_CKS0 *((volatile unsigned int*)(0x424A49B0UL))
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#define bFM3_BT5_RT_TMCR_CKS1 *((volatile unsigned int*)(0x424A49B4UL))
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#define bFM3_BT5_RT_TMCR_CKS2 *((volatile unsigned int*)(0x424A49B8UL))
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#define bFM3_BT5_RT_STC_UDIR *((volatile unsigned int*)(0x424A4A00UL))
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#define bFM3_BT5_RT_STC_TGIR *((volatile unsigned int*)(0x424A4A08UL))
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#define bFM3_BT5_RT_STC_UDIE *((volatile unsigned int*)(0x424A4A10UL))
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#define bFM3_BT5_RT_STC_TGIE *((volatile unsigned int*)(0x424A4A18UL))
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#define bFM3_BT5_RT_TMCR2_CKS3 *((volatile unsigned int*)(0x424A4A20UL))
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/* Base Timer 5 PWC registers */
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#define bFM3_BT5_PWC_TMCR_CTEN *((volatile unsigned int*)(0x424A4984UL))
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#define bFM3_BT5_PWC_TMCR_MDSE *((volatile unsigned int*)(0x424A4988UL))
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#define bFM3_BT5_PWC_TMCR_FMD0 *((volatile unsigned int*)(0x424A4990UL))
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#define bFM3_BT5_PWC_TMCR_FMD1 *((volatile unsigned int*)(0x424A4994UL))
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#define bFM3_BT5_PWC_TMCR_FMD2 *((volatile unsigned int*)(0x424A4998UL))
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#define bFM3_BT5_PWC_TMCR_T32 *((volatile unsigned int*)(0x424A499CUL))
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#define bFM3_BT5_PWC_TMCR_EGS0 *((volatile unsigned int*)(0x424A49A0UL))
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#define bFM3_BT5_PWC_TMCR_EGS1 *((volatile unsigned int*)(0x424A49A4UL))
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#define bFM3_BT5_PWC_TMCR_EGS2 *((volatile unsigned int*)(0x424A49A8UL))
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#define bFM3_BT5_PWC_TMCR_CKS0 *((volatile unsigned int*)(0x424A49B0UL))
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#define bFM3_BT5_PWC_TMCR_CKS1 *((volatile unsigned int*)(0x424A49B4UL))
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#define bFM3_BT5_PWC_TMCR_CKS2 *((volatile unsigned int*)(0x424A49B8UL))
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#define bFM3_BT5_PWC_STC_OVIR *((volatile unsigned int*)(0x424A4A00UL))
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#define bFM3_BT5_PWC_STC_EDIR *((volatile unsigned int*)(0x424A4A08UL))
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#define bFM3_BT5_PWC_STC_OVIE *((volatile unsigned int*)(0x424A4A10UL))
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#define bFM3_BT5_PWC_STC_EDIE *((volatile unsigned int*)(0x424A4A18UL))
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#define bFM3_BT5_PWC_STC_ERR *((volatile unsigned int*)(0x424A4A1CUL))
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#define bFM3_BT5_PWC_TMCR2_CKS3 *((volatile unsigned int*)(0x424A4A20UL))
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/* Base Timer 6 PPG registers */
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#define bFM3_BT6_PPG_TMCR_STRG *((volatile unsigned int*)(0x424A5180UL))
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#define bFM3_BT6_PPG_TMCR_CTEN *((volatile unsigned int*)(0x424A5184UL))
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#define bFM3_BT6_PPG_TMCR_MDSE *((volatile unsigned int*)(0x424A5188UL))
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#define bFM3_BT6_PPG_TMCR_OSEL *((volatile unsigned int*)(0x424A518CUL))
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#define bFM3_BT6_PPG_TMCR_FMD0 *((volatile unsigned int*)(0x424A5190UL))
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#define bFM3_BT6_PPG_TMCR_FMD1 *((volatile unsigned int*)(0x424A5194UL))
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#define bFM3_BT6_PPG_TMCR_FMD2 *((volatile unsigned int*)(0x424A5198UL))
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#define bFM3_BT6_PPG_TMCR_EGS0 *((volatile unsigned int*)(0x424A51A0UL))
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#define bFM3_BT6_PPG_TMCR_EGS1 *((volatile unsigned int*)(0x424A51A4UL))
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#define bFM3_BT6_PPG_TMCR_PMSK *((volatile unsigned int*)(0x424A51A8UL))
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#define bFM3_BT6_PPG_TMCR_RTGEN *((volatile unsigned int*)(0x424A51ACUL))
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#define bFM3_BT6_PPG_TMCR_CKS0 *((volatile unsigned int*)(0x424A51B0UL))
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#define bFM3_BT6_PPG_TMCR_CKS1 *((volatile unsigned int*)(0x424A51B4UL))
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#define bFM3_BT6_PPG_TMCR_CKS2 *((volatile unsigned int*)(0x424A51B8UL))
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#define bFM3_BT6_PPG_STC_UDIR *((volatile unsigned int*)(0x424A5200UL))
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#define bFM3_BT6_PPG_STC_TGIR *((volatile unsigned int*)(0x424A5208UL))
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#define bFM3_BT6_PPG_STC_UDIE *((volatile unsigned int*)(0x424A5210UL))
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#define bFM3_BT6_PPG_STC_TGIE *((volatile unsigned int*)(0x424A5218UL))
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#define bFM3_BT6_PPG_TMCR2_CKS3 *((volatile unsigned int*)(0x424A5220UL))
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/* Base Timer 6 PWM registers */
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#define bFM3_BT6_PWM_TMCR_STRG *((volatile unsigned int*)(0x424A5180UL))
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#define bFM3_BT6_PWM_TMCR_CTEN *((volatile unsigned int*)(0x424A5184UL))
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#define bFM3_BT6_PWM_TMCR_MDSE *((volatile unsigned int*)(0x424A5188UL))
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#define bFM3_BT6_PWM_TMCR_OSEL *((volatile unsigned int*)(0x424A518CUL))
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#define bFM3_BT6_PWM_TMCR_FMD0 *((volatile unsigned int*)(0x424A5190UL))
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#define bFM3_BT6_PWM_TMCR_FMD1 *((volatile unsigned int*)(0x424A5194UL))
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#define bFM3_BT6_PWM_TMCR_FMD2 *((volatile unsigned int*)(0x424A5198UL))
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#define bFM3_BT6_PWM_TMCR_EGS0 *((volatile unsigned int*)(0x424A51A0UL))
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#define bFM3_BT6_PWM_TMCR_EGS1 *((volatile unsigned int*)(0x424A51A4UL))
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#define bFM3_BT6_PWM_TMCR_PMSK *((volatile unsigned int*)(0x424A51A8UL))
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#define bFM3_BT6_PWM_TMCR_RTGEN *((volatile unsigned int*)(0x424A51ACUL))
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#define bFM3_BT6_PWM_TMCR_CKS0 *((volatile unsigned int*)(0x424A51B0UL))
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#define bFM3_BT6_PWM_TMCR_CKS1 *((volatile unsigned int*)(0x424A51B4UL))
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#define bFM3_BT6_PWM_TMCR_CKS2 *((volatile unsigned int*)(0x424A51B8UL))
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#define bFM3_BT6_PWM_STC_UDIR *((volatile unsigned int*)(0x424A5200UL))
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#define bFM3_BT6_PWM_STC_DTIR *((volatile unsigned int*)(0x424A5204UL))
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#define bFM3_BT6_PWM_STC_TGIR *((volatile unsigned int*)(0x424A5208UL))
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#define bFM3_BT6_PWM_STC_UDIE *((volatile unsigned int*)(0x424A5210UL))
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#define bFM3_BT6_PWM_STC_DTIE *((volatile unsigned int*)(0x424A5214UL))
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#define bFM3_BT6_PWM_STC_TGIE *((volatile unsigned int*)(0x424A5218UL))
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#define bFM3_BT6_PWM_TMCR2_CKS3 *((volatile unsigned int*)(0x424A5220UL))
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/* Base Timer 6 RT registers */
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#define bFM3_BT6_RT_TMCR_STRG *((volatile unsigned int*)(0x424A5180UL))
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#define bFM3_BT6_RT_TMCR_CTEN *((volatile unsigned int*)(0x424A5184UL))
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#define bFM3_BT6_RT_TMCR_MDSE *((volatile unsigned int*)(0x424A5188UL))
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#define bFM3_BT6_RT_TMCR_OSEL *((volatile unsigned int*)(0x424A518CUL))
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#define bFM3_BT6_RT_TMCR_FMD0 *((volatile unsigned int*)(0x424A5190UL))
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#define bFM3_BT6_RT_TMCR_FMD1 *((volatile unsigned int*)(0x424A5194UL))
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#define bFM3_BT6_RT_TMCR_FMD2 *((volatile unsigned int*)(0x424A5198UL))
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#define bFM3_BT6_RT_TMCR_T32 *((volatile unsigned int*)(0x424A519CUL))
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#define bFM3_BT6_RT_TMCR_EGS0 *((volatile unsigned int*)(0x424A51A0UL))
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#define bFM3_BT6_RT_TMCR_EGS1 *((volatile unsigned int*)(0x424A51A4UL))
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#define bFM3_BT6_RT_TMCR_CKS0 *((volatile unsigned int*)(0x424A51B0UL))
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#define bFM3_BT6_RT_TMCR_CKS1 *((volatile unsigned int*)(0x424A51B4UL))
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#define bFM3_BT6_RT_TMCR_CKS2 *((volatile unsigned int*)(0x424A51B8UL))
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#define bFM3_BT6_RT_STC_UDIR *((volatile unsigned int*)(0x424A5200UL))
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#define bFM3_BT6_RT_STC_TGIR *((volatile unsigned int*)(0x424A5208UL))
|
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#define bFM3_BT6_RT_STC_UDIE *((volatile unsigned int*)(0x424A5210UL))
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#define bFM3_BT6_RT_STC_TGIE *((volatile unsigned int*)(0x424A5218UL))
|
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#define bFM3_BT6_RT_TMCR2_CKS3 *((volatile unsigned int*)(0x424A5220UL))
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/* Base Timer 6 PWC registers */
|
|
#define bFM3_BT6_PWC_TMCR_CTEN *((volatile unsigned int*)(0x424A5184UL))
|
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#define bFM3_BT6_PWC_TMCR_MDSE *((volatile unsigned int*)(0x424A5188UL))
|
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#define bFM3_BT6_PWC_TMCR_FMD0 *((volatile unsigned int*)(0x424A5190UL))
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#define bFM3_BT6_PWC_TMCR_FMD1 *((volatile unsigned int*)(0x424A5194UL))
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#define bFM3_BT6_PWC_TMCR_FMD2 *((volatile unsigned int*)(0x424A5198UL))
|
|
#define bFM3_BT6_PWC_TMCR_T32 *((volatile unsigned int*)(0x424A519CUL))
|
|
#define bFM3_BT6_PWC_TMCR_EGS0 *((volatile unsigned int*)(0x424A51A0UL))
|
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#define bFM3_BT6_PWC_TMCR_EGS1 *((volatile unsigned int*)(0x424A51A4UL))
|
|
#define bFM3_BT6_PWC_TMCR_EGS2 *((volatile unsigned int*)(0x424A51A8UL))
|
|
#define bFM3_BT6_PWC_TMCR_CKS0 *((volatile unsigned int*)(0x424A51B0UL))
|
|
#define bFM3_BT6_PWC_TMCR_CKS1 *((volatile unsigned int*)(0x424A51B4UL))
|
|
#define bFM3_BT6_PWC_TMCR_CKS2 *((volatile unsigned int*)(0x424A51B8UL))
|
|
#define bFM3_BT6_PWC_STC_OVIR *((volatile unsigned int*)(0x424A5200UL))
|
|
#define bFM3_BT6_PWC_STC_EDIR *((volatile unsigned int*)(0x424A5208UL))
|
|
#define bFM3_BT6_PWC_STC_OVIE *((volatile unsigned int*)(0x424A5210UL))
|
|
#define bFM3_BT6_PWC_STC_EDIE *((volatile unsigned int*)(0x424A5218UL))
|
|
#define bFM3_BT6_PWC_STC_ERR *((volatile unsigned int*)(0x424A521CUL))
|
|
#define bFM3_BT6_PWC_TMCR2_CKS3 *((volatile unsigned int*)(0x424A5220UL))
|
|
|
|
/* Base Timer 7 PPG registers */
|
|
#define bFM3_BT7_PPG_TMCR_STRG *((volatile unsigned int*)(0x424A5980UL))
|
|
#define bFM3_BT7_PPG_TMCR_CTEN *((volatile unsigned int*)(0x424A5984UL))
|
|
#define bFM3_BT7_PPG_TMCR_MDSE *((volatile unsigned int*)(0x424A5988UL))
|
|
#define bFM3_BT7_PPG_TMCR_OSEL *((volatile unsigned int*)(0x424A598CUL))
|
|
#define bFM3_BT7_PPG_TMCR_FMD0 *((volatile unsigned int*)(0x424A5990UL))
|
|
#define bFM3_BT7_PPG_TMCR_FMD1 *((volatile unsigned int*)(0x424A5994UL))
|
|
#define bFM3_BT7_PPG_TMCR_FMD2 *((volatile unsigned int*)(0x424A5998UL))
|
|
#define bFM3_BT7_PPG_TMCR_EGS0 *((volatile unsigned int*)(0x424A59A0UL))
|
|
#define bFM3_BT7_PPG_TMCR_EGS1 *((volatile unsigned int*)(0x424A59A4UL))
|
|
#define bFM3_BT7_PPG_TMCR_PMSK *((volatile unsigned int*)(0x424A59A8UL))
|
|
#define bFM3_BT7_PPG_TMCR_RTGEN *((volatile unsigned int*)(0x424A59ACUL))
|
|
#define bFM3_BT7_PPG_TMCR_CKS0 *((volatile unsigned int*)(0x424A59B0UL))
|
|
#define bFM3_BT7_PPG_TMCR_CKS1 *((volatile unsigned int*)(0x424A59B4UL))
|
|
#define bFM3_BT7_PPG_TMCR_CKS2 *((volatile unsigned int*)(0x424A59B8UL))
|
|
#define bFM3_BT7_PPG_STC_UDIR *((volatile unsigned int*)(0x424A5A00UL))
|
|
#define bFM3_BT7_PPG_STC_TGIR *((volatile unsigned int*)(0x424A5A08UL))
|
|
#define bFM3_BT7_PPG_STC_UDIE *((volatile unsigned int*)(0x424A5A10UL))
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#define bFM3_BT7_PPG_STC_TGIE *((volatile unsigned int*)(0x424A5A18UL))
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#define bFM3_BT7_PPG_TMCR2_CKS3 *((volatile unsigned int*)(0x424A5A20UL))
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/* Base Timer 7 PWM registers */
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|
#define bFM3_BT7_PWM_TMCR_STRG *((volatile unsigned int*)(0x424A5980UL))
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#define bFM3_BT7_PWM_TMCR_CTEN *((volatile unsigned int*)(0x424A5984UL))
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#define bFM3_BT7_PWM_TMCR_MDSE *((volatile unsigned int*)(0x424A5988UL))
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#define bFM3_BT7_PWM_TMCR_OSEL *((volatile unsigned int*)(0x424A598CUL))
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#define bFM3_BT7_PWM_TMCR_FMD0 *((volatile unsigned int*)(0x424A5990UL))
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#define bFM3_BT7_PWM_TMCR_FMD1 *((volatile unsigned int*)(0x424A5994UL))
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|
#define bFM3_BT7_PWM_TMCR_FMD2 *((volatile unsigned int*)(0x424A5998UL))
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#define bFM3_BT7_PWM_TMCR_EGS0 *((volatile unsigned int*)(0x424A59A0UL))
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#define bFM3_BT7_PWM_TMCR_EGS1 *((volatile unsigned int*)(0x424A59A4UL))
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|
#define bFM3_BT7_PWM_TMCR_PMSK *((volatile unsigned int*)(0x424A59A8UL))
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|
#define bFM3_BT7_PWM_TMCR_RTGEN *((volatile unsigned int*)(0x424A59ACUL))
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#define bFM3_BT7_PWM_TMCR_CKS0 *((volatile unsigned int*)(0x424A59B0UL))
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#define bFM3_BT7_PWM_TMCR_CKS1 *((volatile unsigned int*)(0x424A59B4UL))
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#define bFM3_BT7_PWM_TMCR_CKS2 *((volatile unsigned int*)(0x424A59B8UL))
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#define bFM3_BT7_PWM_STC_UDIR *((volatile unsigned int*)(0x424A5A00UL))
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|
#define bFM3_BT7_PWM_STC_DTIR *((volatile unsigned int*)(0x424A5A04UL))
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|
#define bFM3_BT7_PWM_STC_TGIR *((volatile unsigned int*)(0x424A5A08UL))
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#define bFM3_BT7_PWM_STC_UDIE *((volatile unsigned int*)(0x424A5A10UL))
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#define bFM3_BT7_PWM_STC_DTIE *((volatile unsigned int*)(0x424A5A14UL))
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#define bFM3_BT7_PWM_STC_TGIE *((volatile unsigned int*)(0x424A5A18UL))
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#define bFM3_BT7_PWM_TMCR2_CKS3 *((volatile unsigned int*)(0x424A5A20UL))
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|
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/* Base Timer 7 RT registers */
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|
#define bFM3_BT7_RT_TMCR_STRG *((volatile unsigned int*)(0x424A5980UL))
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|
#define bFM3_BT7_RT_TMCR_CTEN *((volatile unsigned int*)(0x424A5984UL))
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#define bFM3_BT7_RT_TMCR_MDSE *((volatile unsigned int*)(0x424A5988UL))
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#define bFM3_BT7_RT_TMCR_OSEL *((volatile unsigned int*)(0x424A598CUL))
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#define bFM3_BT7_RT_TMCR_FMD0 *((volatile unsigned int*)(0x424A5990UL))
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#define bFM3_BT7_RT_TMCR_FMD1 *((volatile unsigned int*)(0x424A5994UL))
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#define bFM3_BT7_RT_TMCR_FMD2 *((volatile unsigned int*)(0x424A5998UL))
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#define bFM3_BT7_RT_TMCR_T32 *((volatile unsigned int*)(0x424A599CUL))
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#define bFM3_BT7_RT_TMCR_EGS0 *((volatile unsigned int*)(0x424A59A0UL))
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#define bFM3_BT7_RT_TMCR_EGS1 *((volatile unsigned int*)(0x424A59A4UL))
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#define bFM3_BT7_RT_TMCR_CKS0 *((volatile unsigned int*)(0x424A59B0UL))
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#define bFM3_BT7_RT_TMCR_CKS1 *((volatile unsigned int*)(0x424A59B4UL))
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#define bFM3_BT7_RT_TMCR_CKS2 *((volatile unsigned int*)(0x424A59B8UL))
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#define bFM3_BT7_RT_STC_UDIR *((volatile unsigned int*)(0x424A5A00UL))
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#define bFM3_BT7_RT_STC_TGIR *((volatile unsigned int*)(0x424A5A08UL))
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|
#define bFM3_BT7_RT_STC_UDIE *((volatile unsigned int*)(0x424A5A10UL))
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#define bFM3_BT7_RT_STC_TGIE *((volatile unsigned int*)(0x424A5A18UL))
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#define bFM3_BT7_RT_TMCR2_CKS3 *((volatile unsigned int*)(0x424A5A20UL))
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|
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/* Base Timer 7 PWC registers */
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|
#define bFM3_BT7_PWC_TMCR_CTEN *((volatile unsigned int*)(0x424A5984UL))
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|
#define bFM3_BT7_PWC_TMCR_MDSE *((volatile unsigned int*)(0x424A5988UL))
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|
#define bFM3_BT7_PWC_TMCR_FMD0 *((volatile unsigned int*)(0x424A5990UL))
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|
#define bFM3_BT7_PWC_TMCR_FMD1 *((volatile unsigned int*)(0x424A5994UL))
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|
#define bFM3_BT7_PWC_TMCR_FMD2 *((volatile unsigned int*)(0x424A5998UL))
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|
#define bFM3_BT7_PWC_TMCR_T32 *((volatile unsigned int*)(0x424A599CUL))
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|
#define bFM3_BT7_PWC_TMCR_EGS0 *((volatile unsigned int*)(0x424A59A0UL))
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|
#define bFM3_BT7_PWC_TMCR_EGS1 *((volatile unsigned int*)(0x424A59A4UL))
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|
#define bFM3_BT7_PWC_TMCR_EGS2 *((volatile unsigned int*)(0x424A59A8UL))
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|
#define bFM3_BT7_PWC_TMCR_CKS0 *((volatile unsigned int*)(0x424A59B0UL))
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|
#define bFM3_BT7_PWC_TMCR_CKS1 *((volatile unsigned int*)(0x424A59B4UL))
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|
#define bFM3_BT7_PWC_TMCR_CKS2 *((volatile unsigned int*)(0x424A59B8UL))
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|
#define bFM3_BT7_PWC_STC_OVIR *((volatile unsigned int*)(0x424A5A00UL))
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|
#define bFM3_BT7_PWC_STC_EDIR *((volatile unsigned int*)(0x424A5A08UL))
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|
#define bFM3_BT7_PWC_STC_OVIE *((volatile unsigned int*)(0x424A5A10UL))
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|
#define bFM3_BT7_PWC_STC_EDIE *((volatile unsigned int*)(0x424A5A18UL))
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|
#define bFM3_BT7_PWC_STC_ERR *((volatile unsigned int*)(0x424A5A1CUL))
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|
#define bFM3_BT7_PWC_TMCR2_CKS3 *((volatile unsigned int*)(0x424A5A20UL))
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|
|
|
/* Base Timer I/O selector channel 0 - channel 3 registers */
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|
#define bFM3_BTIOSEL03_BTSEL0123_SEL01_0 *((volatile unsigned int*)(0x424A2020UL))
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|
#define bFM3_BTIOSEL03_BTSEL0123_SEL01_1 *((volatile unsigned int*)(0x424A2024UL))
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|
#define bFM3_BTIOSEL03_BTSEL0123_SEL01_2 *((volatile unsigned int*)(0x424A2028UL))
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|
#define bFM3_BTIOSEL03_BTSEL0123_SEL01_3 *((volatile unsigned int*)(0x424A202CUL))
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|
#define bFM3_BTIOSEL03_BTSEL0123_SEL23_0 *((volatile unsigned int*)(0x424A2030UL))
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|
#define bFM3_BTIOSEL03_BTSEL0123_SEL23_1 *((volatile unsigned int*)(0x424A2034UL))
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#define bFM3_BTIOSEL03_BTSEL0123_SEL23_2 *((volatile unsigned int*)(0x424A2038UL))
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|
#define bFM3_BTIOSEL03_BTSEL0123_SEL23_3 *((volatile unsigned int*)(0x424A203CUL))
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|
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|
/* Base Timer I/O selector channel 4 - channel 7 registers */
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|
#define bFM3_BTIOSEL47_BTSEL4567_SEL45_0 *((volatile unsigned int*)(0x424A6020UL))
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|
#define bFM3_BTIOSEL47_BTSEL4567_SEL45_1 *((volatile unsigned int*)(0x424A6024UL))
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|
#define bFM3_BTIOSEL47_BTSEL4567_SEL45_2 *((volatile unsigned int*)(0x424A6028UL))
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|
#define bFM3_BTIOSEL47_BTSEL4567_SEL45_3 *((volatile unsigned int*)(0x424A602CUL))
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|
#define bFM3_BTIOSEL47_BTSEL4567_SEL67_0 *((volatile unsigned int*)(0x424A6030UL))
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|
#define bFM3_BTIOSEL47_BTSEL4567_SEL67_1 *((volatile unsigned int*)(0x424A6034UL))
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#define bFM3_BTIOSEL47_BTSEL4567_SEL67_2 *((volatile unsigned int*)(0x424A6038UL))
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#define bFM3_BTIOSEL47_BTSEL4567_SEL67_3 *((volatile unsigned int*)(0x424A603CUL))
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|
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|
/* Base Timer 8 PPG registers */
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|
#define bFM3_BT8_PPG_TMCR_STRG *((volatile unsigned int*)(0x424A8180UL))
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|
#define bFM3_BT8_PPG_TMCR_CTEN *((volatile unsigned int*)(0x424A8184UL))
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#define bFM3_BT8_PPG_TMCR_MDSE *((volatile unsigned int*)(0x424A8188UL))
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|
#define bFM3_BT8_PPG_TMCR_OSEL *((volatile unsigned int*)(0x424A818CUL))
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|
#define bFM3_BT8_PPG_TMCR_FMD0 *((volatile unsigned int*)(0x424A8190UL))
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#define bFM3_BT8_PPG_TMCR_FMD1 *((volatile unsigned int*)(0x424A8194UL))
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#define bFM3_BT8_PPG_TMCR_FMD2 *((volatile unsigned int*)(0x424A8198UL))
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#define bFM3_BT8_PPG_TMCR_EGS0 *((volatile unsigned int*)(0x424A81A0UL))
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#define bFM3_BT8_PPG_TMCR_EGS1 *((volatile unsigned int*)(0x424A81A4UL))
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#define bFM3_BT8_PPG_TMCR_PMSK *((volatile unsigned int*)(0x424A81A8UL))
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#define bFM3_BT8_PPG_TMCR_RTGEN *((volatile unsigned int*)(0x424A81ACUL))
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#define bFM3_BT8_PPG_TMCR_CKS0 *((volatile unsigned int*)(0x424A81B0UL))
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#define bFM3_BT8_PPG_TMCR_CKS1 *((volatile unsigned int*)(0x424A81B4UL))
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#define bFM3_BT8_PPG_TMCR_CKS2 *((volatile unsigned int*)(0x424A81B8UL))
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#define bFM3_BT8_PPG_STC_UDIR *((volatile unsigned int*)(0x424A8200UL))
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#define bFM3_BT8_PPG_STC_TGIR *((volatile unsigned int*)(0x424A8208UL))
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#define bFM3_BT8_PPG_STC_UDIE *((volatile unsigned int*)(0x424A8210UL))
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#define bFM3_BT8_PPG_STC_TGIE *((volatile unsigned int*)(0x424A8218UL))
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#define bFM3_BT8_PPG_TMCR2_CKS3 *((volatile unsigned int*)(0x424A8220UL))
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|
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/* Base Timer 8 PWM registers */
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#define bFM3_BT8_PWM_TMCR_STRG *((volatile unsigned int*)(0x424A8180UL))
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#define bFM3_BT8_PWM_TMCR_CTEN *((volatile unsigned int*)(0x424A8184UL))
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#define bFM3_BT8_PWM_TMCR_MDSE *((volatile unsigned int*)(0x424A8188UL))
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#define bFM3_BT8_PWM_TMCR_OSEL *((volatile unsigned int*)(0x424A818CUL))
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#define bFM3_BT8_PWM_TMCR_FMD0 *((volatile unsigned int*)(0x424A8190UL))
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#define bFM3_BT8_PWM_TMCR_FMD1 *((volatile unsigned int*)(0x424A8194UL))
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#define bFM3_BT8_PWM_TMCR_FMD2 *((volatile unsigned int*)(0x424A8198UL))
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#define bFM3_BT8_PWM_TMCR_EGS0 *((volatile unsigned int*)(0x424A81A0UL))
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#define bFM3_BT8_PWM_TMCR_EGS1 *((volatile unsigned int*)(0x424A81A4UL))
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#define bFM3_BT8_PWM_TMCR_PMSK *((volatile unsigned int*)(0x424A81A8UL))
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#define bFM3_BT8_PWM_TMCR_RTGEN *((volatile unsigned int*)(0x424A81ACUL))
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#define bFM3_BT8_PWM_TMCR_CKS0 *((volatile unsigned int*)(0x424A81B0UL))
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#define bFM3_BT8_PWM_TMCR_CKS1 *((volatile unsigned int*)(0x424A81B4UL))
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#define bFM3_BT8_PWM_TMCR_CKS2 *((volatile unsigned int*)(0x424A81B8UL))
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#define bFM3_BT8_PWM_STC_UDIR *((volatile unsigned int*)(0x424A8200UL))
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#define bFM3_BT8_PWM_STC_DTIR *((volatile unsigned int*)(0x424A8204UL))
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#define bFM3_BT8_PWM_STC_TGIR *((volatile unsigned int*)(0x424A8208UL))
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#define bFM3_BT8_PWM_STC_UDIE *((volatile unsigned int*)(0x424A8210UL))
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#define bFM3_BT8_PWM_STC_DTIE *((volatile unsigned int*)(0x424A8214UL))
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#define bFM3_BT8_PWM_STC_TGIE *((volatile unsigned int*)(0x424A8218UL))
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#define bFM3_BT8_PWM_TMCR2_CKS3 *((volatile unsigned int*)(0x424A8220UL))
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|
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/* Base Timer 8 RT registers */
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#define bFM3_BT8_RT_TMCR_STRG *((volatile unsigned int*)(0x424A8180UL))
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#define bFM3_BT8_RT_TMCR_CTEN *((volatile unsigned int*)(0x424A8184UL))
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#define bFM3_BT8_RT_TMCR_MDSE *((volatile unsigned int*)(0x424A8188UL))
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#define bFM3_BT8_RT_TMCR_OSEL *((volatile unsigned int*)(0x424A818CUL))
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#define bFM3_BT8_RT_TMCR_FMD0 *((volatile unsigned int*)(0x424A8190UL))
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#define bFM3_BT8_RT_TMCR_FMD1 *((volatile unsigned int*)(0x424A8194UL))
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#define bFM3_BT8_RT_TMCR_FMD2 *((volatile unsigned int*)(0x424A8198UL))
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#define bFM3_BT8_RT_TMCR_T32 *((volatile unsigned int*)(0x424A819CUL))
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#define bFM3_BT8_RT_TMCR_EGS0 *((volatile unsigned int*)(0x424A81A0UL))
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#define bFM3_BT8_RT_TMCR_EGS1 *((volatile unsigned int*)(0x424A81A4UL))
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#define bFM3_BT8_RT_TMCR_CKS0 *((volatile unsigned int*)(0x424A81B0UL))
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#define bFM3_BT8_RT_TMCR_CKS1 *((volatile unsigned int*)(0x424A81B4UL))
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#define bFM3_BT8_RT_TMCR_CKS2 *((volatile unsigned int*)(0x424A81B8UL))
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#define bFM3_BT8_RT_STC_UDIR *((volatile unsigned int*)(0x424A8200UL))
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#define bFM3_BT8_RT_STC_TGIR *((volatile unsigned int*)(0x424A8208UL))
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#define bFM3_BT8_RT_STC_UDIE *((volatile unsigned int*)(0x424A8210UL))
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#define bFM3_BT8_RT_STC_TGIE *((volatile unsigned int*)(0x424A8218UL))
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#define bFM3_BT8_RT_TMCR2_CKS3 *((volatile unsigned int*)(0x424A8220UL))
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|
|
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/* Base Timer 8 PWC registers */
|
|
#define bFM3_BT8_PWC_TMCR_CTEN *((volatile unsigned int*)(0x424A8184UL))
|
|
#define bFM3_BT8_PWC_TMCR_MDSE *((volatile unsigned int*)(0x424A8188UL))
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|
#define bFM3_BT8_PWC_TMCR_FMD0 *((volatile unsigned int*)(0x424A8190UL))
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#define bFM3_BT8_PWC_TMCR_FMD1 *((volatile unsigned int*)(0x424A8194UL))
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#define bFM3_BT8_PWC_TMCR_FMD2 *((volatile unsigned int*)(0x424A8198UL))
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#define bFM3_BT8_PWC_TMCR_T32 *((volatile unsigned int*)(0x424A819CUL))
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|
#define bFM3_BT8_PWC_TMCR_EGS0 *((volatile unsigned int*)(0x424A81A0UL))
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#define bFM3_BT8_PWC_TMCR_EGS1 *((volatile unsigned int*)(0x424A81A4UL))
|
|
#define bFM3_BT8_PWC_TMCR_EGS2 *((volatile unsigned int*)(0x424A81A8UL))
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#define bFM3_BT8_PWC_TMCR_CKS0 *((volatile unsigned int*)(0x424A81B0UL))
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|
#define bFM3_BT8_PWC_TMCR_CKS1 *((volatile unsigned int*)(0x424A81B4UL))
|
|
#define bFM3_BT8_PWC_TMCR_CKS2 *((volatile unsigned int*)(0x424A81B8UL))
|
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#define bFM3_BT8_PWC_STC_OVIR *((volatile unsigned int*)(0x424A8200UL))
|
|
#define bFM3_BT8_PWC_STC_EDIR *((volatile unsigned int*)(0x424A8208UL))
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#define bFM3_BT8_PWC_STC_OVIE *((volatile unsigned int*)(0x424A8210UL))
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#define bFM3_BT8_PWC_STC_EDIE *((volatile unsigned int*)(0x424A8218UL))
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|
#define bFM3_BT8_PWC_STC_ERR *((volatile unsigned int*)(0x424A821CUL))
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|
#define bFM3_BT8_PWC_TMCR2_CKS3 *((volatile unsigned int*)(0x424A8220UL))
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|
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|
/* Base Timer 9 PPG registers */
|
|
#define bFM3_BT9_PPG_TMCR_STRG *((volatile unsigned int*)(0x424A8980UL))
|
|
#define bFM3_BT9_PPG_TMCR_CTEN *((volatile unsigned int*)(0x424A8984UL))
|
|
#define bFM3_BT9_PPG_TMCR_MDSE *((volatile unsigned int*)(0x424A8988UL))
|
|
#define bFM3_BT9_PPG_TMCR_OSEL *((volatile unsigned int*)(0x424A898CUL))
|
|
#define bFM3_BT9_PPG_TMCR_FMD0 *((volatile unsigned int*)(0x424A8990UL))
|
|
#define bFM3_BT9_PPG_TMCR_FMD1 *((volatile unsigned int*)(0x424A8994UL))
|
|
#define bFM3_BT9_PPG_TMCR_FMD2 *((volatile unsigned int*)(0x424A8998UL))
|
|
#define bFM3_BT9_PPG_TMCR_EGS0 *((volatile unsigned int*)(0x424A89A0UL))
|
|
#define bFM3_BT9_PPG_TMCR_EGS1 *((volatile unsigned int*)(0x424A89A4UL))
|
|
#define bFM3_BT9_PPG_TMCR_PMSK *((volatile unsigned int*)(0x424A89A8UL))
|
|
#define bFM3_BT9_PPG_TMCR_RTGEN *((volatile unsigned int*)(0x424A89ACUL))
|
|
#define bFM3_BT9_PPG_TMCR_CKS0 *((volatile unsigned int*)(0x424A89B0UL))
|
|
#define bFM3_BT9_PPG_TMCR_CKS1 *((volatile unsigned int*)(0x424A89B4UL))
|
|
#define bFM3_BT9_PPG_TMCR_CKS2 *((volatile unsigned int*)(0x424A89B8UL))
|
|
#define bFM3_BT9_PPG_STC_UDIR *((volatile unsigned int*)(0x424A8A00UL))
|
|
#define bFM3_BT9_PPG_STC_TGIR *((volatile unsigned int*)(0x424A8A08UL))
|
|
#define bFM3_BT9_PPG_STC_UDIE *((volatile unsigned int*)(0x424A8A10UL))
|
|
#define bFM3_BT9_PPG_STC_TGIE *((volatile unsigned int*)(0x424A8A18UL))
|
|
#define bFM3_BT9_PPG_TMCR2_CKS3 *((volatile unsigned int*)(0x424A8A20UL))
|
|
|
|
/* Base Timer 9 PWM registers */
|
|
#define bFM3_BT9_PWM_TMCR_STRG *((volatile unsigned int*)(0x424A8980UL))
|
|
#define bFM3_BT9_PWM_TMCR_CTEN *((volatile unsigned int*)(0x424A8984UL))
|
|
#define bFM3_BT9_PWM_TMCR_MDSE *((volatile unsigned int*)(0x424A8988UL))
|
|
#define bFM3_BT9_PWM_TMCR_OSEL *((volatile unsigned int*)(0x424A898CUL))
|
|
#define bFM3_BT9_PWM_TMCR_FMD0 *((volatile unsigned int*)(0x424A8990UL))
|
|
#define bFM3_BT9_PWM_TMCR_FMD1 *((volatile unsigned int*)(0x424A8994UL))
|
|
#define bFM3_BT9_PWM_TMCR_FMD2 *((volatile unsigned int*)(0x424A8998UL))
|
|
#define bFM3_BT9_PWM_TMCR_EGS0 *((volatile unsigned int*)(0x424A89A0UL))
|
|
#define bFM3_BT9_PWM_TMCR_EGS1 *((volatile unsigned int*)(0x424A89A4UL))
|
|
#define bFM3_BT9_PWM_TMCR_PMSK *((volatile unsigned int*)(0x424A89A8UL))
|
|
#define bFM3_BT9_PWM_TMCR_RTGEN *((volatile unsigned int*)(0x424A89ACUL))
|
|
#define bFM3_BT9_PWM_TMCR_CKS0 *((volatile unsigned int*)(0x424A89B0UL))
|
|
#define bFM3_BT9_PWM_TMCR_CKS1 *((volatile unsigned int*)(0x424A89B4UL))
|
|
#define bFM3_BT9_PWM_TMCR_CKS2 *((volatile unsigned int*)(0x424A89B8UL))
|
|
#define bFM3_BT9_PWM_STC_UDIR *((volatile unsigned int*)(0x424A8A00UL))
|
|
#define bFM3_BT9_PWM_STC_DTIR *((volatile unsigned int*)(0x424A8A04UL))
|
|
#define bFM3_BT9_PWM_STC_TGIR *((volatile unsigned int*)(0x424A8A08UL))
|
|
#define bFM3_BT9_PWM_STC_UDIE *((volatile unsigned int*)(0x424A8A10UL))
|
|
#define bFM3_BT9_PWM_STC_DTIE *((volatile unsigned int*)(0x424A8A14UL))
|
|
#define bFM3_BT9_PWM_STC_TGIE *((volatile unsigned int*)(0x424A8A18UL))
|
|
#define bFM3_BT9_PWM_TMCR2_CKS3 *((volatile unsigned int*)(0x424A8A20UL))
|
|
|
|
/* Base Timer 9 RT registers */
|
|
#define bFM3_BT9_RT_TMCR_STRG *((volatile unsigned int*)(0x424A8980UL))
|
|
#define bFM3_BT9_RT_TMCR_CTEN *((volatile unsigned int*)(0x424A8984UL))
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#define bFM3_BT9_RT_TMCR_MDSE *((volatile unsigned int*)(0x424A8988UL))
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#define bFM3_BT9_RT_TMCR_OSEL *((volatile unsigned int*)(0x424A898CUL))
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#define bFM3_BT9_RT_TMCR_FMD0 *((volatile unsigned int*)(0x424A8990UL))
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#define bFM3_BT9_RT_TMCR_FMD1 *((volatile unsigned int*)(0x424A8994UL))
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#define bFM3_BT9_RT_TMCR_FMD2 *((volatile unsigned int*)(0x424A8998UL))
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#define bFM3_BT9_RT_TMCR_T32 *((volatile unsigned int*)(0x424A899CUL))
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#define bFM3_BT9_RT_TMCR_EGS0 *((volatile unsigned int*)(0x424A89A0UL))
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#define bFM3_BT9_RT_TMCR_EGS1 *((volatile unsigned int*)(0x424A89A4UL))
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#define bFM3_BT9_RT_TMCR_CKS0 *((volatile unsigned int*)(0x424A89B0UL))
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#define bFM3_BT9_RT_TMCR_CKS1 *((volatile unsigned int*)(0x424A89B4UL))
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#define bFM3_BT9_RT_TMCR_CKS2 *((volatile unsigned int*)(0x424A89B8UL))
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#define bFM3_BT9_RT_STC_UDIR *((volatile unsigned int*)(0x424A8A00UL))
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#define bFM3_BT9_RT_STC_TGIR *((volatile unsigned int*)(0x424A8A08UL))
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#define bFM3_BT9_RT_STC_UDIE *((volatile unsigned int*)(0x424A8A10UL))
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#define bFM3_BT9_RT_STC_TGIE *((volatile unsigned int*)(0x424A8A18UL))
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#define bFM3_BT9_RT_TMCR2_CKS3 *((volatile unsigned int*)(0x424A8A20UL))
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/* Base Timer 9 PWC registers */
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#define bFM3_BT9_PWC_TMCR_CTEN *((volatile unsigned int*)(0x424A8984UL))
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#define bFM3_BT9_PWC_TMCR_MDSE *((volatile unsigned int*)(0x424A8988UL))
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#define bFM3_BT9_PWC_TMCR_FMD0 *((volatile unsigned int*)(0x424A8990UL))
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#define bFM3_BT9_PWC_TMCR_FMD1 *((volatile unsigned int*)(0x424A8994UL))
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#define bFM3_BT9_PWC_TMCR_FMD2 *((volatile unsigned int*)(0x424A8998UL))
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#define bFM3_BT9_PWC_TMCR_T32 *((volatile unsigned int*)(0x424A899CUL))
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#define bFM3_BT9_PWC_TMCR_EGS0 *((volatile unsigned int*)(0x424A89A0UL))
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#define bFM3_BT9_PWC_TMCR_EGS1 *((volatile unsigned int*)(0x424A89A4UL))
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#define bFM3_BT9_PWC_TMCR_EGS2 *((volatile unsigned int*)(0x424A89A8UL))
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#define bFM3_BT9_PWC_TMCR_CKS0 *((volatile unsigned int*)(0x424A89B0UL))
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#define bFM3_BT9_PWC_TMCR_CKS1 *((volatile unsigned int*)(0x424A89B4UL))
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#define bFM3_BT9_PWC_TMCR_CKS2 *((volatile unsigned int*)(0x424A89B8UL))
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#define bFM3_BT9_PWC_STC_OVIR *((volatile unsigned int*)(0x424A8A00UL))
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#define bFM3_BT9_PWC_STC_EDIR *((volatile unsigned int*)(0x424A8A08UL))
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#define bFM3_BT9_PWC_STC_OVIE *((volatile unsigned int*)(0x424A8A10UL))
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#define bFM3_BT9_PWC_STC_EDIE *((volatile unsigned int*)(0x424A8A18UL))
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#define bFM3_BT9_PWC_STC_ERR *((volatile unsigned int*)(0x424A8A1CUL))
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#define bFM3_BT9_PWC_TMCR2_CKS3 *((volatile unsigned int*)(0x424A8A20UL))
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/* Base Timer 10 PPG registers */
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#define bFM3_BT10_PPG_TMCR_STRG *((volatile unsigned int*)(0x424A9180UL))
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#define bFM3_BT10_PPG_TMCR_CTEN *((volatile unsigned int*)(0x424A9184UL))
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#define bFM3_BT10_PPG_TMCR_MDSE *((volatile unsigned int*)(0x424A9188UL))
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#define bFM3_BT10_PPG_TMCR_OSEL *((volatile unsigned int*)(0x424A918CUL))
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#define bFM3_BT10_PPG_TMCR_FMD0 *((volatile unsigned int*)(0x424A9190UL))
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#define bFM3_BT10_PPG_TMCR_FMD1 *((volatile unsigned int*)(0x424A9194UL))
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#define bFM3_BT10_PPG_TMCR_FMD2 *((volatile unsigned int*)(0x424A9198UL))
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#define bFM3_BT10_PPG_TMCR_EGS0 *((volatile unsigned int*)(0x424A91A0UL))
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#define bFM3_BT10_PPG_TMCR_EGS1 *((volatile unsigned int*)(0x424A91A4UL))
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#define bFM3_BT10_PPG_TMCR_PMSK *((volatile unsigned int*)(0x424A91A8UL))
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#define bFM3_BT10_PPG_TMCR_RTGEN *((volatile unsigned int*)(0x424A91ACUL))
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#define bFM3_BT10_PPG_TMCR_CKS0 *((volatile unsigned int*)(0x424A91B0UL))
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#define bFM3_BT10_PPG_TMCR_CKS1 *((volatile unsigned int*)(0x424A91B4UL))
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#define bFM3_BT10_PPG_TMCR_CKS2 *((volatile unsigned int*)(0x424A91B8UL))
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#define bFM3_BT10_PPG_STC_UDIR *((volatile unsigned int*)(0x424A9200UL))
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#define bFM3_BT10_PPG_STC_TGIR *((volatile unsigned int*)(0x424A9208UL))
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#define bFM3_BT10_PPG_STC_UDIE *((volatile unsigned int*)(0x424A9210UL))
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#define bFM3_BT10_PPG_STC_TGIE *((volatile unsigned int*)(0x424A9218UL))
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#define bFM3_BT10_PPG_TMCR2_CKS3 *((volatile unsigned int*)(0x424A9220UL))
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/* Base Timer 10 PWM registers */
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#define bFM3_BT10_PWM_TMCR_STRG *((volatile unsigned int*)(0x424A9180UL))
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#define bFM3_BT10_PWM_TMCR_CTEN *((volatile unsigned int*)(0x424A9184UL))
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#define bFM3_BT10_PWM_TMCR_MDSE *((volatile unsigned int*)(0x424A9188UL))
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#define bFM3_BT10_PWM_TMCR_OSEL *((volatile unsigned int*)(0x424A918CUL))
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#define bFM3_BT10_PWM_TMCR_FMD0 *((volatile unsigned int*)(0x424A9190UL))
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#define bFM3_BT10_PWM_TMCR_FMD1 *((volatile unsigned int*)(0x424A9194UL))
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#define bFM3_BT10_PWM_TMCR_FMD2 *((volatile unsigned int*)(0x424A9198UL))
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#define bFM3_BT10_PWM_TMCR_EGS0 *((volatile unsigned int*)(0x424A91A0UL))
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#define bFM3_BT10_PWM_TMCR_EGS1 *((volatile unsigned int*)(0x424A91A4UL))
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#define bFM3_BT10_PWM_TMCR_PMSK *((volatile unsigned int*)(0x424A91A8UL))
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#define bFM3_BT10_PWM_TMCR_RTGEN *((volatile unsigned int*)(0x424A91ACUL))
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#define bFM3_BT10_PWM_TMCR_CKS0 *((volatile unsigned int*)(0x424A91B0UL))
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#define bFM3_BT10_PWM_TMCR_CKS1 *((volatile unsigned int*)(0x424A91B4UL))
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#define bFM3_BT10_PWM_TMCR_CKS2 *((volatile unsigned int*)(0x424A91B8UL))
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#define bFM3_BT10_PWM_STC_UDIR *((volatile unsigned int*)(0x424A9200UL))
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#define bFM3_BT10_PWM_STC_DTIR *((volatile unsigned int*)(0x424A9204UL))
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#define bFM3_BT10_PWM_STC_TGIR *((volatile unsigned int*)(0x424A9208UL))
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#define bFM3_BT10_PWM_STC_UDIE *((volatile unsigned int*)(0x424A9210UL))
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#define bFM3_BT10_PWM_STC_DTIE *((volatile unsigned int*)(0x424A9214UL))
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#define bFM3_BT10_PWM_STC_TGIE *((volatile unsigned int*)(0x424A9218UL))
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#define bFM3_BT10_PWM_TMCR2_CKS3 *((volatile unsigned int*)(0x424A9220UL))
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/* Base Timer 10 RT registers */
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#define bFM3_BT10_RT_TMCR_STRG *((volatile unsigned int*)(0x424A9180UL))
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#define bFM3_BT10_RT_TMCR_CTEN *((volatile unsigned int*)(0x424A9184UL))
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#define bFM3_BT10_RT_TMCR_MDSE *((volatile unsigned int*)(0x424A9188UL))
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#define bFM3_BT10_RT_TMCR_OSEL *((volatile unsigned int*)(0x424A918CUL))
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#define bFM3_BT10_RT_TMCR_FMD0 *((volatile unsigned int*)(0x424A9190UL))
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#define bFM3_BT10_RT_TMCR_FMD1 *((volatile unsigned int*)(0x424A9194UL))
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#define bFM3_BT10_RT_TMCR_FMD2 *((volatile unsigned int*)(0x424A9198UL))
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#define bFM3_BT10_RT_TMCR_T32 *((volatile unsigned int*)(0x424A919CUL))
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#define bFM3_BT10_RT_TMCR_EGS0 *((volatile unsigned int*)(0x424A91A0UL))
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#define bFM3_BT10_RT_TMCR_EGS1 *((volatile unsigned int*)(0x424A91A4UL))
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#define bFM3_BT10_RT_TMCR_CKS0 *((volatile unsigned int*)(0x424A91B0UL))
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#define bFM3_BT10_RT_TMCR_CKS1 *((volatile unsigned int*)(0x424A91B4UL))
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#define bFM3_BT10_RT_TMCR_CKS2 *((volatile unsigned int*)(0x424A91B8UL))
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#define bFM3_BT10_RT_STC_UDIR *((volatile unsigned int*)(0x424A9200UL))
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#define bFM3_BT10_RT_STC_TGIR *((volatile unsigned int*)(0x424A9208UL))
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#define bFM3_BT10_RT_STC_UDIE *((volatile unsigned int*)(0x424A9210UL))
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#define bFM3_BT10_RT_STC_TGIE *((volatile unsigned int*)(0x424A9218UL))
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#define bFM3_BT10_RT_TMCR2_CKS3 *((volatile unsigned int*)(0x424A9220UL))
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/* Base Timer 10 PWC registers */
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#define bFM3_BT10_PWC_TMCR_CTEN *((volatile unsigned int*)(0x424A9184UL))
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#define bFM3_BT10_PWC_TMCR_MDSE *((volatile unsigned int*)(0x424A9188UL))
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#define bFM3_BT10_PWC_TMCR_FMD0 *((volatile unsigned int*)(0x424A9190UL))
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#define bFM3_BT10_PWC_TMCR_FMD1 *((volatile unsigned int*)(0x424A9194UL))
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#define bFM3_BT10_PWC_TMCR_FMD2 *((volatile unsigned int*)(0x424A9198UL))
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#define bFM3_BT10_PWC_TMCR_T32 *((volatile unsigned int*)(0x424A919CUL))
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#define bFM3_BT10_PWC_TMCR_EGS0 *((volatile unsigned int*)(0x424A91A0UL))
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#define bFM3_BT10_PWC_TMCR_EGS1 *((volatile unsigned int*)(0x424A91A4UL))
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#define bFM3_BT10_PWC_TMCR_EGS2 *((volatile unsigned int*)(0x424A91A8UL))
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#define bFM3_BT10_PWC_TMCR_CKS0 *((volatile unsigned int*)(0x424A91B0UL))
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#define bFM3_BT10_PWC_TMCR_CKS1 *((volatile unsigned int*)(0x424A91B4UL))
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#define bFM3_BT10_PWC_TMCR_CKS2 *((volatile unsigned int*)(0x424A91B8UL))
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#define bFM3_BT10_PWC_STC_OVIR *((volatile unsigned int*)(0x424A9200UL))
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#define bFM3_BT10_PWC_STC_EDIR *((volatile unsigned int*)(0x424A9208UL))
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#define bFM3_BT10_PWC_STC_OVIE *((volatile unsigned int*)(0x424A9210UL))
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#define bFM3_BT10_PWC_STC_EDIE *((volatile unsigned int*)(0x424A9218UL))
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#define bFM3_BT10_PWC_STC_ERR *((volatile unsigned int*)(0x424A921CUL))
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#define bFM3_BT10_PWC_TMCR2_CKS3 *((volatile unsigned int*)(0x424A9220UL))
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/* Base Timer 11 PPG registers */
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#define bFM3_BT11_PPG_TMCR_STRG *((volatile unsigned int*)(0x424A9980UL))
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#define bFM3_BT11_PPG_TMCR_CTEN *((volatile unsigned int*)(0x424A9984UL))
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#define bFM3_BT11_PPG_TMCR_MDSE *((volatile unsigned int*)(0x424A9988UL))
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#define bFM3_BT11_PPG_TMCR_OSEL *((volatile unsigned int*)(0x424A998CUL))
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#define bFM3_BT11_PPG_TMCR_FMD0 *((volatile unsigned int*)(0x424A9990UL))
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#define bFM3_BT11_PPG_TMCR_FMD1 *((volatile unsigned int*)(0x424A9994UL))
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#define bFM3_BT11_PPG_TMCR_FMD2 *((volatile unsigned int*)(0x424A9998UL))
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#define bFM3_BT11_PPG_TMCR_EGS0 *((volatile unsigned int*)(0x424A99A0UL))
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#define bFM3_BT11_PPG_TMCR_EGS1 *((volatile unsigned int*)(0x424A99A4UL))
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#define bFM3_BT11_PPG_TMCR_PMSK *((volatile unsigned int*)(0x424A99A8UL))
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#define bFM3_BT11_PPG_TMCR_RTGEN *((volatile unsigned int*)(0x424A99ACUL))
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#define bFM3_BT11_PPG_TMCR_CKS0 *((volatile unsigned int*)(0x424A99B0UL))
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#define bFM3_BT11_PPG_TMCR_CKS1 *((volatile unsigned int*)(0x424A99B4UL))
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#define bFM3_BT11_PPG_TMCR_CKS2 *((volatile unsigned int*)(0x424A99B8UL))
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#define bFM3_BT11_PPG_STC_UDIR *((volatile unsigned int*)(0x424A9A00UL))
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#define bFM3_BT11_PPG_STC_TGIR *((volatile unsigned int*)(0x424A9A08UL))
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#define bFM3_BT11_PPG_STC_UDIE *((volatile unsigned int*)(0x424A9A10UL))
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#define bFM3_BT11_PPG_STC_TGIE *((volatile unsigned int*)(0x424A9A18UL))
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#define bFM3_BT11_PPG_TMCR2_CKS3 *((volatile unsigned int*)(0x424A9A20UL))
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/* Base Timer 11 PWM registers */
|
|
#define bFM3_BT11_PWM_TMCR_STRG *((volatile unsigned int*)(0x424A9980UL))
|
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#define bFM3_BT11_PWM_TMCR_CTEN *((volatile unsigned int*)(0x424A9984UL))
|
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#define bFM3_BT11_PWM_TMCR_MDSE *((volatile unsigned int*)(0x424A9988UL))
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#define bFM3_BT11_PWM_TMCR_OSEL *((volatile unsigned int*)(0x424A998CUL))
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#define bFM3_BT11_PWM_TMCR_FMD0 *((volatile unsigned int*)(0x424A9990UL))
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#define bFM3_BT11_PWM_TMCR_FMD1 *((volatile unsigned int*)(0x424A9994UL))
|
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#define bFM3_BT11_PWM_TMCR_FMD2 *((volatile unsigned int*)(0x424A9998UL))
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#define bFM3_BT11_PWM_TMCR_EGS0 *((volatile unsigned int*)(0x424A99A0UL))
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#define bFM3_BT11_PWM_TMCR_EGS1 *((volatile unsigned int*)(0x424A99A4UL))
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#define bFM3_BT11_PWM_TMCR_PMSK *((volatile unsigned int*)(0x424A99A8UL))
|
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#define bFM3_BT11_PWM_TMCR_RTGEN *((volatile unsigned int*)(0x424A99ACUL))
|
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#define bFM3_BT11_PWM_TMCR_CKS0 *((volatile unsigned int*)(0x424A99B0UL))
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#define bFM3_BT11_PWM_TMCR_CKS1 *((volatile unsigned int*)(0x424A99B4UL))
|
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#define bFM3_BT11_PWM_TMCR_CKS2 *((volatile unsigned int*)(0x424A99B8UL))
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#define bFM3_BT11_PWM_STC_UDIR *((volatile unsigned int*)(0x424A9A00UL))
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#define bFM3_BT11_PWM_STC_DTIR *((volatile unsigned int*)(0x424A9A04UL))
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#define bFM3_BT11_PWM_STC_TGIR *((volatile unsigned int*)(0x424A9A08UL))
|
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#define bFM3_BT11_PWM_STC_UDIE *((volatile unsigned int*)(0x424A9A10UL))
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#define bFM3_BT11_PWM_STC_DTIE *((volatile unsigned int*)(0x424A9A14UL))
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#define bFM3_BT11_PWM_STC_TGIE *((volatile unsigned int*)(0x424A9A18UL))
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#define bFM3_BT11_PWM_TMCR2_CKS3 *((volatile unsigned int*)(0x424A9A20UL))
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/* Base Timer 11 RT registers */
|
|
#define bFM3_BT11_RT_TMCR_STRG *((volatile unsigned int*)(0x424A9980UL))
|
|
#define bFM3_BT11_RT_TMCR_CTEN *((volatile unsigned int*)(0x424A9984UL))
|
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#define bFM3_BT11_RT_TMCR_MDSE *((volatile unsigned int*)(0x424A9988UL))
|
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#define bFM3_BT11_RT_TMCR_OSEL *((volatile unsigned int*)(0x424A998CUL))
|
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#define bFM3_BT11_RT_TMCR_FMD0 *((volatile unsigned int*)(0x424A9990UL))
|
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#define bFM3_BT11_RT_TMCR_FMD1 *((volatile unsigned int*)(0x424A9994UL))
|
|
#define bFM3_BT11_RT_TMCR_FMD2 *((volatile unsigned int*)(0x424A9998UL))
|
|
#define bFM3_BT11_RT_TMCR_T32 *((volatile unsigned int*)(0x424A999CUL))
|
|
#define bFM3_BT11_RT_TMCR_EGS0 *((volatile unsigned int*)(0x424A99A0UL))
|
|
#define bFM3_BT11_RT_TMCR_EGS1 *((volatile unsigned int*)(0x424A99A4UL))
|
|
#define bFM3_BT11_RT_TMCR_CKS0 *((volatile unsigned int*)(0x424A99B0UL))
|
|
#define bFM3_BT11_RT_TMCR_CKS1 *((volatile unsigned int*)(0x424A99B4UL))
|
|
#define bFM3_BT11_RT_TMCR_CKS2 *((volatile unsigned int*)(0x424A99B8UL))
|
|
#define bFM3_BT11_RT_STC_UDIR *((volatile unsigned int*)(0x424A9A00UL))
|
|
#define bFM3_BT11_RT_STC_TGIR *((volatile unsigned int*)(0x424A9A08UL))
|
|
#define bFM3_BT11_RT_STC_UDIE *((volatile unsigned int*)(0x424A9A10UL))
|
|
#define bFM3_BT11_RT_STC_TGIE *((volatile unsigned int*)(0x424A9A18UL))
|
|
#define bFM3_BT11_RT_TMCR2_CKS3 *((volatile unsigned int*)(0x424A9A20UL))
|
|
|
|
/* Base Timer 11 PWC registers */
|
|
#define bFM3_BT11_PWC_TMCR_CTEN *((volatile unsigned int*)(0x424A9984UL))
|
|
#define bFM3_BT11_PWC_TMCR_MDSE *((volatile unsigned int*)(0x424A9988UL))
|
|
#define bFM3_BT11_PWC_TMCR_FMD0 *((volatile unsigned int*)(0x424A9990UL))
|
|
#define bFM3_BT11_PWC_TMCR_FMD1 *((volatile unsigned int*)(0x424A9994UL))
|
|
#define bFM3_BT11_PWC_TMCR_FMD2 *((volatile unsigned int*)(0x424A9998UL))
|
|
#define bFM3_BT11_PWC_TMCR_T32 *((volatile unsigned int*)(0x424A999CUL))
|
|
#define bFM3_BT11_PWC_TMCR_EGS0 *((volatile unsigned int*)(0x424A99A0UL))
|
|
#define bFM3_BT11_PWC_TMCR_EGS1 *((volatile unsigned int*)(0x424A99A4UL))
|
|
#define bFM3_BT11_PWC_TMCR_EGS2 *((volatile unsigned int*)(0x424A99A8UL))
|
|
#define bFM3_BT11_PWC_TMCR_CKS0 *((volatile unsigned int*)(0x424A99B0UL))
|
|
#define bFM3_BT11_PWC_TMCR_CKS1 *((volatile unsigned int*)(0x424A99B4UL))
|
|
#define bFM3_BT11_PWC_TMCR_CKS2 *((volatile unsigned int*)(0x424A99B8UL))
|
|
#define bFM3_BT11_PWC_STC_OVIR *((volatile unsigned int*)(0x424A9A00UL))
|
|
#define bFM3_BT11_PWC_STC_EDIR *((volatile unsigned int*)(0x424A9A08UL))
|
|
#define bFM3_BT11_PWC_STC_OVIE *((volatile unsigned int*)(0x424A9A10UL))
|
|
#define bFM3_BT11_PWC_STC_EDIE *((volatile unsigned int*)(0x424A9A18UL))
|
|
#define bFM3_BT11_PWC_STC_ERR *((volatile unsigned int*)(0x424A9A1CUL))
|
|
#define bFM3_BT11_PWC_TMCR2_CKS3 *((volatile unsigned int*)(0x424A9A20UL))
|
|
|
|
/* Base Timer 12 PPG registers */
|
|
#define bFM3_BT12_PPG_TMCR_STRG *((volatile unsigned int*)(0x424AC180UL))
|
|
#define bFM3_BT12_PPG_TMCR_CTEN *((volatile unsigned int*)(0x424AC184UL))
|
|
#define bFM3_BT12_PPG_TMCR_MDSE *((volatile unsigned int*)(0x424AC188UL))
|
|
#define bFM3_BT12_PPG_TMCR_OSEL *((volatile unsigned int*)(0x424AC18CUL))
|
|
#define bFM3_BT12_PPG_TMCR_FMD0 *((volatile unsigned int*)(0x424AC190UL))
|
|
#define bFM3_BT12_PPG_TMCR_FMD1 *((volatile unsigned int*)(0x424AC194UL))
|
|
#define bFM3_BT12_PPG_TMCR_FMD2 *((volatile unsigned int*)(0x424AC198UL))
|
|
#define bFM3_BT12_PPG_TMCR_EGS0 *((volatile unsigned int*)(0x424AC1A0UL))
|
|
#define bFM3_BT12_PPG_TMCR_EGS1 *((volatile unsigned int*)(0x424AC1A4UL))
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|
#define bFM3_BT12_PPG_TMCR_PMSK *((volatile unsigned int*)(0x424AC1A8UL))
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#define bFM3_BT12_PPG_TMCR_RTGEN *((volatile unsigned int*)(0x424AC1ACUL))
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#define bFM3_BT12_PPG_TMCR_CKS0 *((volatile unsigned int*)(0x424AC1B0UL))
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#define bFM3_BT12_PPG_TMCR_CKS1 *((volatile unsigned int*)(0x424AC1B4UL))
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#define bFM3_BT12_PPG_TMCR_CKS2 *((volatile unsigned int*)(0x424AC1B8UL))
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#define bFM3_BT12_PPG_STC_UDIR *((volatile unsigned int*)(0x424AC200UL))
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|
#define bFM3_BT12_PPG_STC_TGIR *((volatile unsigned int*)(0x424AC208UL))
|
|
#define bFM3_BT12_PPG_STC_UDIE *((volatile unsigned int*)(0x424AC210UL))
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#define bFM3_BT12_PPG_STC_TGIE *((volatile unsigned int*)(0x424AC218UL))
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#define bFM3_BT12_PPG_TMCR2_CKS3 *((volatile unsigned int*)(0x424AC220UL))
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|
|
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/* Base Timer 12 PWM registers */
|
|
#define bFM3_BT12_PWM_TMCR_STRG *((volatile unsigned int*)(0x424AC180UL))
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|
#define bFM3_BT12_PWM_TMCR_CTEN *((volatile unsigned int*)(0x424AC184UL))
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#define bFM3_BT12_PWM_TMCR_MDSE *((volatile unsigned int*)(0x424AC188UL))
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#define bFM3_BT12_PWM_TMCR_OSEL *((volatile unsigned int*)(0x424AC18CUL))
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#define bFM3_BT12_PWM_TMCR_FMD0 *((volatile unsigned int*)(0x424AC190UL))
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|
#define bFM3_BT12_PWM_TMCR_FMD1 *((volatile unsigned int*)(0x424AC194UL))
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|
#define bFM3_BT12_PWM_TMCR_FMD2 *((volatile unsigned int*)(0x424AC198UL))
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#define bFM3_BT12_PWM_TMCR_EGS0 *((volatile unsigned int*)(0x424AC1A0UL))
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#define bFM3_BT12_PWM_TMCR_EGS1 *((volatile unsigned int*)(0x424AC1A4UL))
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#define bFM3_BT12_PWM_TMCR_PMSK *((volatile unsigned int*)(0x424AC1A8UL))
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#define bFM3_BT12_PWM_TMCR_RTGEN *((volatile unsigned int*)(0x424AC1ACUL))
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#define bFM3_BT12_PWM_TMCR_CKS0 *((volatile unsigned int*)(0x424AC1B0UL))
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#define bFM3_BT12_PWM_TMCR_CKS1 *((volatile unsigned int*)(0x424AC1B4UL))
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#define bFM3_BT12_PWM_TMCR_CKS2 *((volatile unsigned int*)(0x424AC1B8UL))
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#define bFM3_BT12_PWM_STC_UDIR *((volatile unsigned int*)(0x424AC200UL))
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#define bFM3_BT12_PWM_STC_DTIR *((volatile unsigned int*)(0x424AC204UL))
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#define bFM3_BT12_PWM_STC_TGIR *((volatile unsigned int*)(0x424AC208UL))
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#define bFM3_BT12_PWM_STC_UDIE *((volatile unsigned int*)(0x424AC210UL))
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#define bFM3_BT12_PWM_STC_DTIE *((volatile unsigned int*)(0x424AC214UL))
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#define bFM3_BT12_PWM_STC_TGIE *((volatile unsigned int*)(0x424AC218UL))
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#define bFM3_BT12_PWM_TMCR2_CKS3 *((volatile unsigned int*)(0x424AC220UL))
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/* Base Timer 12 RT registers */
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|
#define bFM3_BT12_RT_TMCR_STRG *((volatile unsigned int*)(0x424AC180UL))
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#define bFM3_BT12_RT_TMCR_CTEN *((volatile unsigned int*)(0x424AC184UL))
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#define bFM3_BT12_RT_TMCR_MDSE *((volatile unsigned int*)(0x424AC188UL))
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#define bFM3_BT12_RT_TMCR_OSEL *((volatile unsigned int*)(0x424AC18CUL))
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#define bFM3_BT12_RT_TMCR_FMD0 *((volatile unsigned int*)(0x424AC190UL))
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#define bFM3_BT12_RT_TMCR_FMD1 *((volatile unsigned int*)(0x424AC194UL))
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#define bFM3_BT12_RT_TMCR_FMD2 *((volatile unsigned int*)(0x424AC198UL))
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#define bFM3_BT12_RT_TMCR_T32 *((volatile unsigned int*)(0x424AC19CUL))
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#define bFM3_BT12_RT_TMCR_EGS0 *((volatile unsigned int*)(0x424AC1A0UL))
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#define bFM3_BT12_RT_TMCR_EGS1 *((volatile unsigned int*)(0x424AC1A4UL))
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#define bFM3_BT12_RT_TMCR_CKS0 *((volatile unsigned int*)(0x424AC1B0UL))
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|
#define bFM3_BT12_RT_TMCR_CKS1 *((volatile unsigned int*)(0x424AC1B4UL))
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#define bFM3_BT12_RT_TMCR_CKS2 *((volatile unsigned int*)(0x424AC1B8UL))
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#define bFM3_BT12_RT_STC_UDIR *((volatile unsigned int*)(0x424AC200UL))
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|
#define bFM3_BT12_RT_STC_TGIR *((volatile unsigned int*)(0x424AC208UL))
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|
#define bFM3_BT12_RT_STC_UDIE *((volatile unsigned int*)(0x424AC210UL))
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#define bFM3_BT12_RT_STC_TGIE *((volatile unsigned int*)(0x424AC218UL))
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|
#define bFM3_BT12_RT_TMCR2_CKS3 *((volatile unsigned int*)(0x424AC220UL))
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|
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/* Base Timer 12 PWC registers */
|
|
#define bFM3_BT12_PWC_TMCR_CTEN *((volatile unsigned int*)(0x424AC184UL))
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|
#define bFM3_BT12_PWC_TMCR_MDSE *((volatile unsigned int*)(0x424AC188UL))
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|
#define bFM3_BT12_PWC_TMCR_FMD0 *((volatile unsigned int*)(0x424AC190UL))
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|
#define bFM3_BT12_PWC_TMCR_FMD1 *((volatile unsigned int*)(0x424AC194UL))
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|
#define bFM3_BT12_PWC_TMCR_FMD2 *((volatile unsigned int*)(0x424AC198UL))
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|
#define bFM3_BT12_PWC_TMCR_T32 *((volatile unsigned int*)(0x424AC19CUL))
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|
#define bFM3_BT12_PWC_TMCR_EGS0 *((volatile unsigned int*)(0x424AC1A0UL))
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|
#define bFM3_BT12_PWC_TMCR_EGS1 *((volatile unsigned int*)(0x424AC1A4UL))
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|
#define bFM3_BT12_PWC_TMCR_EGS2 *((volatile unsigned int*)(0x424AC1A8UL))
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|
#define bFM3_BT12_PWC_TMCR_CKS0 *((volatile unsigned int*)(0x424AC1B0UL))
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|
#define bFM3_BT12_PWC_TMCR_CKS1 *((volatile unsigned int*)(0x424AC1B4UL))
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|
#define bFM3_BT12_PWC_TMCR_CKS2 *((volatile unsigned int*)(0x424AC1B8UL))
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|
#define bFM3_BT12_PWC_STC_OVIR *((volatile unsigned int*)(0x424AC200UL))
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|
#define bFM3_BT12_PWC_STC_EDIR *((volatile unsigned int*)(0x424AC208UL))
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|
#define bFM3_BT12_PWC_STC_OVIE *((volatile unsigned int*)(0x424AC210UL))
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|
#define bFM3_BT12_PWC_STC_EDIE *((volatile unsigned int*)(0x424AC218UL))
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|
#define bFM3_BT12_PWC_STC_ERR *((volatile unsigned int*)(0x424AC21CUL))
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|
#define bFM3_BT12_PWC_TMCR2_CKS3 *((volatile unsigned int*)(0x424AC220UL))
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|
|
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/* Base Timer 13 PPG registers */
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|
#define bFM3_BT13_PPG_TMCR_STRG *((volatile unsigned int*)(0x424AC980UL))
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|
#define bFM3_BT13_PPG_TMCR_CTEN *((volatile unsigned int*)(0x424AC984UL))
|
|
#define bFM3_BT13_PPG_TMCR_MDSE *((volatile unsigned int*)(0x424AC988UL))
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|
#define bFM3_BT13_PPG_TMCR_OSEL *((volatile unsigned int*)(0x424AC98CUL))
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|
#define bFM3_BT13_PPG_TMCR_FMD0 *((volatile unsigned int*)(0x424AC990UL))
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|
#define bFM3_BT13_PPG_TMCR_FMD1 *((volatile unsigned int*)(0x424AC994UL))
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|
#define bFM3_BT13_PPG_TMCR_FMD2 *((volatile unsigned int*)(0x424AC998UL))
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|
#define bFM3_BT13_PPG_TMCR_EGS0 *((volatile unsigned int*)(0x424AC9A0UL))
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|
#define bFM3_BT13_PPG_TMCR_EGS1 *((volatile unsigned int*)(0x424AC9A4UL))
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|
#define bFM3_BT13_PPG_TMCR_PMSK *((volatile unsigned int*)(0x424AC9A8UL))
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|
#define bFM3_BT13_PPG_TMCR_RTGEN *((volatile unsigned int*)(0x424AC9ACUL))
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|
#define bFM3_BT13_PPG_TMCR_CKS0 *((volatile unsigned int*)(0x424AC9B0UL))
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|
#define bFM3_BT13_PPG_TMCR_CKS1 *((volatile unsigned int*)(0x424AC9B4UL))
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#define bFM3_BT13_PPG_TMCR_CKS2 *((volatile unsigned int*)(0x424AC9B8UL))
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#define bFM3_BT13_PPG_STC_UDIR *((volatile unsigned int*)(0x424ACA00UL))
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#define bFM3_BT13_PPG_STC_TGIR *((volatile unsigned int*)(0x424ACA08UL))
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#define bFM3_BT13_PPG_STC_UDIE *((volatile unsigned int*)(0x424ACA10UL))
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#define bFM3_BT13_PPG_STC_TGIE *((volatile unsigned int*)(0x424ACA18UL))
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#define bFM3_BT13_PPG_TMCR2_CKS3 *((volatile unsigned int*)(0x424ACA20UL))
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|
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/* Base Timer 13 PWM registers */
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|
#define bFM3_BT13_PWM_TMCR_STRG *((volatile unsigned int*)(0x424AC980UL))
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#define bFM3_BT13_PWM_TMCR_CTEN *((volatile unsigned int*)(0x424AC984UL))
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#define bFM3_BT13_PWM_TMCR_MDSE *((volatile unsigned int*)(0x424AC988UL))
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#define bFM3_BT13_PWM_TMCR_OSEL *((volatile unsigned int*)(0x424AC98CUL))
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#define bFM3_BT13_PWM_TMCR_FMD0 *((volatile unsigned int*)(0x424AC990UL))
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#define bFM3_BT13_PWM_TMCR_FMD1 *((volatile unsigned int*)(0x424AC994UL))
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#define bFM3_BT13_PWM_TMCR_FMD2 *((volatile unsigned int*)(0x424AC998UL))
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#define bFM3_BT13_PWM_TMCR_EGS0 *((volatile unsigned int*)(0x424AC9A0UL))
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#define bFM3_BT13_PWM_TMCR_EGS1 *((volatile unsigned int*)(0x424AC9A4UL))
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#define bFM3_BT13_PWM_TMCR_PMSK *((volatile unsigned int*)(0x424AC9A8UL))
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#define bFM3_BT13_PWM_TMCR_RTGEN *((volatile unsigned int*)(0x424AC9ACUL))
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#define bFM3_BT13_PWM_TMCR_CKS0 *((volatile unsigned int*)(0x424AC9B0UL))
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#define bFM3_BT13_PWM_TMCR_CKS1 *((volatile unsigned int*)(0x424AC9B4UL))
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#define bFM3_BT13_PWM_TMCR_CKS2 *((volatile unsigned int*)(0x424AC9B8UL))
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#define bFM3_BT13_PWM_STC_UDIR *((volatile unsigned int*)(0x424ACA00UL))
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#define bFM3_BT13_PWM_STC_DTIR *((volatile unsigned int*)(0x424ACA04UL))
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#define bFM3_BT13_PWM_STC_TGIR *((volatile unsigned int*)(0x424ACA08UL))
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#define bFM3_BT13_PWM_STC_UDIE *((volatile unsigned int*)(0x424ACA10UL))
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#define bFM3_BT13_PWM_STC_DTIE *((volatile unsigned int*)(0x424ACA14UL))
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#define bFM3_BT13_PWM_STC_TGIE *((volatile unsigned int*)(0x424ACA18UL))
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#define bFM3_BT13_PWM_TMCR2_CKS3 *((volatile unsigned int*)(0x424ACA20UL))
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|
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/* Base Timer 13 RT registers */
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#define bFM3_BT13_RT_TMCR_STRG *((volatile unsigned int*)(0x424AC980UL))
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#define bFM3_BT13_RT_TMCR_CTEN *((volatile unsigned int*)(0x424AC984UL))
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#define bFM3_BT13_RT_TMCR_MDSE *((volatile unsigned int*)(0x424AC988UL))
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#define bFM3_BT13_RT_TMCR_OSEL *((volatile unsigned int*)(0x424AC98CUL))
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#define bFM3_BT13_RT_TMCR_FMD0 *((volatile unsigned int*)(0x424AC990UL))
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#define bFM3_BT13_RT_TMCR_FMD1 *((volatile unsigned int*)(0x424AC994UL))
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#define bFM3_BT13_RT_TMCR_FMD2 *((volatile unsigned int*)(0x424AC998UL))
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#define bFM3_BT13_RT_TMCR_T32 *((volatile unsigned int*)(0x424AC99CUL))
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#define bFM3_BT13_RT_TMCR_EGS0 *((volatile unsigned int*)(0x424AC9A0UL))
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#define bFM3_BT13_RT_TMCR_EGS1 *((volatile unsigned int*)(0x424AC9A4UL))
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#define bFM3_BT13_RT_TMCR_CKS0 *((volatile unsigned int*)(0x424AC9B0UL))
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#define bFM3_BT13_RT_TMCR_CKS1 *((volatile unsigned int*)(0x424AC9B4UL))
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#define bFM3_BT13_RT_TMCR_CKS2 *((volatile unsigned int*)(0x424AC9B8UL))
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#define bFM3_BT13_RT_STC_UDIR *((volatile unsigned int*)(0x424ACA00UL))
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#define bFM3_BT13_RT_STC_TGIR *((volatile unsigned int*)(0x424ACA08UL))
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#define bFM3_BT13_RT_STC_UDIE *((volatile unsigned int*)(0x424ACA10UL))
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|
#define bFM3_BT13_RT_STC_TGIE *((volatile unsigned int*)(0x424ACA18UL))
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#define bFM3_BT13_RT_TMCR2_CKS3 *((volatile unsigned int*)(0x424ACA20UL))
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|
|
|
/* Base Timer 13 PWC registers */
|
|
#define bFM3_BT13_PWC_TMCR_CTEN *((volatile unsigned int*)(0x424AC984UL))
|
|
#define bFM3_BT13_PWC_TMCR_MDSE *((volatile unsigned int*)(0x424AC988UL))
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#define bFM3_BT13_PWC_TMCR_FMD0 *((volatile unsigned int*)(0x424AC990UL))
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|
#define bFM3_BT13_PWC_TMCR_FMD1 *((volatile unsigned int*)(0x424AC994UL))
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|
#define bFM3_BT13_PWC_TMCR_FMD2 *((volatile unsigned int*)(0x424AC998UL))
|
|
#define bFM3_BT13_PWC_TMCR_T32 *((volatile unsigned int*)(0x424AC99CUL))
|
|
#define bFM3_BT13_PWC_TMCR_EGS0 *((volatile unsigned int*)(0x424AC9A0UL))
|
|
#define bFM3_BT13_PWC_TMCR_EGS1 *((volatile unsigned int*)(0x424AC9A4UL))
|
|
#define bFM3_BT13_PWC_TMCR_EGS2 *((volatile unsigned int*)(0x424AC9A8UL))
|
|
#define bFM3_BT13_PWC_TMCR_CKS0 *((volatile unsigned int*)(0x424AC9B0UL))
|
|
#define bFM3_BT13_PWC_TMCR_CKS1 *((volatile unsigned int*)(0x424AC9B4UL))
|
|
#define bFM3_BT13_PWC_TMCR_CKS2 *((volatile unsigned int*)(0x424AC9B8UL))
|
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#define bFM3_BT13_PWC_STC_OVIR *((volatile unsigned int*)(0x424ACA00UL))
|
|
#define bFM3_BT13_PWC_STC_EDIR *((volatile unsigned int*)(0x424ACA08UL))
|
|
#define bFM3_BT13_PWC_STC_OVIE *((volatile unsigned int*)(0x424ACA10UL))
|
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#define bFM3_BT13_PWC_STC_EDIE *((volatile unsigned int*)(0x424ACA18UL))
|
|
#define bFM3_BT13_PWC_STC_ERR *((volatile unsigned int*)(0x424ACA1CUL))
|
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#define bFM3_BT13_PWC_TMCR2_CKS3 *((volatile unsigned int*)(0x424ACA20UL))
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|
|
|
/* Base Timer 14 PPG registers */
|
|
#define bFM3_BT14_PPG_TMCR_STRG *((volatile unsigned int*)(0x424AD180UL))
|
|
#define bFM3_BT14_PPG_TMCR_CTEN *((volatile unsigned int*)(0x424AD184UL))
|
|
#define bFM3_BT14_PPG_TMCR_MDSE *((volatile unsigned int*)(0x424AD188UL))
|
|
#define bFM3_BT14_PPG_TMCR_OSEL *((volatile unsigned int*)(0x424AD18CUL))
|
|
#define bFM3_BT14_PPG_TMCR_FMD0 *((volatile unsigned int*)(0x424AD190UL))
|
|
#define bFM3_BT14_PPG_TMCR_FMD1 *((volatile unsigned int*)(0x424AD194UL))
|
|
#define bFM3_BT14_PPG_TMCR_FMD2 *((volatile unsigned int*)(0x424AD198UL))
|
|
#define bFM3_BT14_PPG_TMCR_EGS0 *((volatile unsigned int*)(0x424AD1A0UL))
|
|
#define bFM3_BT14_PPG_TMCR_EGS1 *((volatile unsigned int*)(0x424AD1A4UL))
|
|
#define bFM3_BT14_PPG_TMCR_PMSK *((volatile unsigned int*)(0x424AD1A8UL))
|
|
#define bFM3_BT14_PPG_TMCR_RTGEN *((volatile unsigned int*)(0x424AD1ACUL))
|
|
#define bFM3_BT14_PPG_TMCR_CKS0 *((volatile unsigned int*)(0x424AD1B0UL))
|
|
#define bFM3_BT14_PPG_TMCR_CKS1 *((volatile unsigned int*)(0x424AD1B4UL))
|
|
#define bFM3_BT14_PPG_TMCR_CKS2 *((volatile unsigned int*)(0x424AD1B8UL))
|
|
#define bFM3_BT14_PPG_STC_UDIR *((volatile unsigned int*)(0x424AD200UL))
|
|
#define bFM3_BT14_PPG_STC_TGIR *((volatile unsigned int*)(0x424AD208UL))
|
|
#define bFM3_BT14_PPG_STC_UDIE *((volatile unsigned int*)(0x424AD210UL))
|
|
#define bFM3_BT14_PPG_STC_TGIE *((volatile unsigned int*)(0x424AD218UL))
|
|
#define bFM3_BT14_PPG_TMCR2_CKS3 *((volatile unsigned int*)(0x424AD220UL))
|
|
|
|
/* Base Timer 14 PWM registers */
|
|
#define bFM3_BT14_PWM_TMCR_STRG *((volatile unsigned int*)(0x424AD180UL))
|
|
#define bFM3_BT14_PWM_TMCR_CTEN *((volatile unsigned int*)(0x424AD184UL))
|
|
#define bFM3_BT14_PWM_TMCR_MDSE *((volatile unsigned int*)(0x424AD188UL))
|
|
#define bFM3_BT14_PWM_TMCR_OSEL *((volatile unsigned int*)(0x424AD18CUL))
|
|
#define bFM3_BT14_PWM_TMCR_FMD0 *((volatile unsigned int*)(0x424AD190UL))
|
|
#define bFM3_BT14_PWM_TMCR_FMD1 *((volatile unsigned int*)(0x424AD194UL))
|
|
#define bFM3_BT14_PWM_TMCR_FMD2 *((volatile unsigned int*)(0x424AD198UL))
|
|
#define bFM3_BT14_PWM_TMCR_EGS0 *((volatile unsigned int*)(0x424AD1A0UL))
|
|
#define bFM3_BT14_PWM_TMCR_EGS1 *((volatile unsigned int*)(0x424AD1A4UL))
|
|
#define bFM3_BT14_PWM_TMCR_PMSK *((volatile unsigned int*)(0x424AD1A8UL))
|
|
#define bFM3_BT14_PWM_TMCR_RTGEN *((volatile unsigned int*)(0x424AD1ACUL))
|
|
#define bFM3_BT14_PWM_TMCR_CKS0 *((volatile unsigned int*)(0x424AD1B0UL))
|
|
#define bFM3_BT14_PWM_TMCR_CKS1 *((volatile unsigned int*)(0x424AD1B4UL))
|
|
#define bFM3_BT14_PWM_TMCR_CKS2 *((volatile unsigned int*)(0x424AD1B8UL))
|
|
#define bFM3_BT14_PWM_STC_UDIR *((volatile unsigned int*)(0x424AD200UL))
|
|
#define bFM3_BT14_PWM_STC_DTIR *((volatile unsigned int*)(0x424AD204UL))
|
|
#define bFM3_BT14_PWM_STC_TGIR *((volatile unsigned int*)(0x424AD208UL))
|
|
#define bFM3_BT14_PWM_STC_UDIE *((volatile unsigned int*)(0x424AD210UL))
|
|
#define bFM3_BT14_PWM_STC_DTIE *((volatile unsigned int*)(0x424AD214UL))
|
|
#define bFM3_BT14_PWM_STC_TGIE *((volatile unsigned int*)(0x424AD218UL))
|
|
#define bFM3_BT14_PWM_TMCR2_CKS3 *((volatile unsigned int*)(0x424AD220UL))
|
|
|
|
/* Base Timer 14 RT registers */
|
|
#define bFM3_BT14_RT_TMCR_STRG *((volatile unsigned int*)(0x424AD180UL))
|
|
#define bFM3_BT14_RT_TMCR_CTEN *((volatile unsigned int*)(0x424AD184UL))
|
|
#define bFM3_BT14_RT_TMCR_MDSE *((volatile unsigned int*)(0x424AD188UL))
|
|
#define bFM3_BT14_RT_TMCR_OSEL *((volatile unsigned int*)(0x424AD18CUL))
|
|
#define bFM3_BT14_RT_TMCR_FMD0 *((volatile unsigned int*)(0x424AD190UL))
|
|
#define bFM3_BT14_RT_TMCR_FMD1 *((volatile unsigned int*)(0x424AD194UL))
|
|
#define bFM3_BT14_RT_TMCR_FMD2 *((volatile unsigned int*)(0x424AD198UL))
|
|
#define bFM3_BT14_RT_TMCR_T32 *((volatile unsigned int*)(0x424AD19CUL))
|
|
#define bFM3_BT14_RT_TMCR_EGS0 *((volatile unsigned int*)(0x424AD1A0UL))
|
|
#define bFM3_BT14_RT_TMCR_EGS1 *((volatile unsigned int*)(0x424AD1A4UL))
|
|
#define bFM3_BT14_RT_TMCR_CKS0 *((volatile unsigned int*)(0x424AD1B0UL))
|
|
#define bFM3_BT14_RT_TMCR_CKS1 *((volatile unsigned int*)(0x424AD1B4UL))
|
|
#define bFM3_BT14_RT_TMCR_CKS2 *((volatile unsigned int*)(0x424AD1B8UL))
|
|
#define bFM3_BT14_RT_STC_UDIR *((volatile unsigned int*)(0x424AD200UL))
|
|
#define bFM3_BT14_RT_STC_TGIR *((volatile unsigned int*)(0x424AD208UL))
|
|
#define bFM3_BT14_RT_STC_UDIE *((volatile unsigned int*)(0x424AD210UL))
|
|
#define bFM3_BT14_RT_STC_TGIE *((volatile unsigned int*)(0x424AD218UL))
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#define bFM3_BT14_RT_TMCR2_CKS3 *((volatile unsigned int*)(0x424AD220UL))
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|
|
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/* Base Timer 14 PWC registers */
|
|
#define bFM3_BT14_PWC_TMCR_CTEN *((volatile unsigned int*)(0x424AD184UL))
|
|
#define bFM3_BT14_PWC_TMCR_MDSE *((volatile unsigned int*)(0x424AD188UL))
|
|
#define bFM3_BT14_PWC_TMCR_FMD0 *((volatile unsigned int*)(0x424AD190UL))
|
|
#define bFM3_BT14_PWC_TMCR_FMD1 *((volatile unsigned int*)(0x424AD194UL))
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|
#define bFM3_BT14_PWC_TMCR_FMD2 *((volatile unsigned int*)(0x424AD198UL))
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|
#define bFM3_BT14_PWC_TMCR_T32 *((volatile unsigned int*)(0x424AD19CUL))
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|
#define bFM3_BT14_PWC_TMCR_EGS0 *((volatile unsigned int*)(0x424AD1A0UL))
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|
#define bFM3_BT14_PWC_TMCR_EGS1 *((volatile unsigned int*)(0x424AD1A4UL))
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|
#define bFM3_BT14_PWC_TMCR_EGS2 *((volatile unsigned int*)(0x424AD1A8UL))
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|
#define bFM3_BT14_PWC_TMCR_CKS0 *((volatile unsigned int*)(0x424AD1B0UL))
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|
#define bFM3_BT14_PWC_TMCR_CKS1 *((volatile unsigned int*)(0x424AD1B4UL))
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#define bFM3_BT14_PWC_TMCR_CKS2 *((volatile unsigned int*)(0x424AD1B8UL))
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|
#define bFM3_BT14_PWC_STC_OVIR *((volatile unsigned int*)(0x424AD200UL))
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#define bFM3_BT14_PWC_STC_EDIR *((volatile unsigned int*)(0x424AD208UL))
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|
#define bFM3_BT14_PWC_STC_OVIE *((volatile unsigned int*)(0x424AD210UL))
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|
#define bFM3_BT14_PWC_STC_EDIE *((volatile unsigned int*)(0x424AD218UL))
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|
#define bFM3_BT14_PWC_STC_ERR *((volatile unsigned int*)(0x424AD21CUL))
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|
#define bFM3_BT14_PWC_TMCR2_CKS3 *((volatile unsigned int*)(0x424AD220UL))
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|
|
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/* Base Timer 15 PPG registers */
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#define bFM3_BT15_PPG_TMCR_STRG *((volatile unsigned int*)(0x424AD980UL))
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#define bFM3_BT15_PPG_TMCR_CTEN *((volatile unsigned int*)(0x424AD984UL))
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|
#define bFM3_BT15_PPG_TMCR_MDSE *((volatile unsigned int*)(0x424AD988UL))
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|
#define bFM3_BT15_PPG_TMCR_OSEL *((volatile unsigned int*)(0x424AD98CUL))
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|
#define bFM3_BT15_PPG_TMCR_FMD0 *((volatile unsigned int*)(0x424AD990UL))
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|
#define bFM3_BT15_PPG_TMCR_FMD1 *((volatile unsigned int*)(0x424AD994UL))
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|
#define bFM3_BT15_PPG_TMCR_FMD2 *((volatile unsigned int*)(0x424AD998UL))
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|
#define bFM3_BT15_PPG_TMCR_EGS0 *((volatile unsigned int*)(0x424AD9A0UL))
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#define bFM3_BT15_PPG_TMCR_EGS1 *((volatile unsigned int*)(0x424AD9A4UL))
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|
#define bFM3_BT15_PPG_TMCR_PMSK *((volatile unsigned int*)(0x424AD9A8UL))
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|
#define bFM3_BT15_PPG_TMCR_RTGEN *((volatile unsigned int*)(0x424AD9ACUL))
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|
#define bFM3_BT15_PPG_TMCR_CKS0 *((volatile unsigned int*)(0x424AD9B0UL))
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|
#define bFM3_BT15_PPG_TMCR_CKS1 *((volatile unsigned int*)(0x424AD9B4UL))
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|
#define bFM3_BT15_PPG_TMCR_CKS2 *((volatile unsigned int*)(0x424AD9B8UL))
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|
#define bFM3_BT15_PPG_STC_UDIR *((volatile unsigned int*)(0x424ADA00UL))
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|
#define bFM3_BT15_PPG_STC_TGIR *((volatile unsigned int*)(0x424ADA08UL))
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|
#define bFM3_BT15_PPG_STC_UDIE *((volatile unsigned int*)(0x424ADA10UL))
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|
#define bFM3_BT15_PPG_STC_TGIE *((volatile unsigned int*)(0x424ADA18UL))
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|
#define bFM3_BT15_PPG_TMCR2_CKS3 *((volatile unsigned int*)(0x424ADA20UL))
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|
|
|
/* Base Timer 15 PWM registers */
|
|
#define bFM3_BT15_PWM_TMCR_STRG *((volatile unsigned int*)(0x424AD980UL))
|
|
#define bFM3_BT15_PWM_TMCR_CTEN *((volatile unsigned int*)(0x424AD984UL))
|
|
#define bFM3_BT15_PWM_TMCR_MDSE *((volatile unsigned int*)(0x424AD988UL))
|
|
#define bFM3_BT15_PWM_TMCR_OSEL *((volatile unsigned int*)(0x424AD98CUL))
|
|
#define bFM3_BT15_PWM_TMCR_FMD0 *((volatile unsigned int*)(0x424AD990UL))
|
|
#define bFM3_BT15_PWM_TMCR_FMD1 *((volatile unsigned int*)(0x424AD994UL))
|
|
#define bFM3_BT15_PWM_TMCR_FMD2 *((volatile unsigned int*)(0x424AD998UL))
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|
#define bFM3_BT15_PWM_TMCR_EGS0 *((volatile unsigned int*)(0x424AD9A0UL))
|
|
#define bFM3_BT15_PWM_TMCR_EGS1 *((volatile unsigned int*)(0x424AD9A4UL))
|
|
#define bFM3_BT15_PWM_TMCR_PMSK *((volatile unsigned int*)(0x424AD9A8UL))
|
|
#define bFM3_BT15_PWM_TMCR_RTGEN *((volatile unsigned int*)(0x424AD9ACUL))
|
|
#define bFM3_BT15_PWM_TMCR_CKS0 *((volatile unsigned int*)(0x424AD9B0UL))
|
|
#define bFM3_BT15_PWM_TMCR_CKS1 *((volatile unsigned int*)(0x424AD9B4UL))
|
|
#define bFM3_BT15_PWM_TMCR_CKS2 *((volatile unsigned int*)(0x424AD9B8UL))
|
|
#define bFM3_BT15_PWM_STC_UDIR *((volatile unsigned int*)(0x424ADA00UL))
|
|
#define bFM3_BT15_PWM_STC_DTIR *((volatile unsigned int*)(0x424ADA04UL))
|
|
#define bFM3_BT15_PWM_STC_TGIR *((volatile unsigned int*)(0x424ADA08UL))
|
|
#define bFM3_BT15_PWM_STC_UDIE *((volatile unsigned int*)(0x424ADA10UL))
|
|
#define bFM3_BT15_PWM_STC_DTIE *((volatile unsigned int*)(0x424ADA14UL))
|
|
#define bFM3_BT15_PWM_STC_TGIE *((volatile unsigned int*)(0x424ADA18UL))
|
|
#define bFM3_BT15_PWM_TMCR2_CKS3 *((volatile unsigned int*)(0x424ADA20UL))
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|
|
|
/* Base Timer 15 RT registers */
|
|
#define bFM3_BT15_RT_TMCR_STRG *((volatile unsigned int*)(0x424AD980UL))
|
|
#define bFM3_BT15_RT_TMCR_CTEN *((volatile unsigned int*)(0x424AD984UL))
|
|
#define bFM3_BT15_RT_TMCR_MDSE *((volatile unsigned int*)(0x424AD988UL))
|
|
#define bFM3_BT15_RT_TMCR_OSEL *((volatile unsigned int*)(0x424AD98CUL))
|
|
#define bFM3_BT15_RT_TMCR_FMD0 *((volatile unsigned int*)(0x424AD990UL))
|
|
#define bFM3_BT15_RT_TMCR_FMD1 *((volatile unsigned int*)(0x424AD994UL))
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|
#define bFM3_BT15_RT_TMCR_FMD2 *((volatile unsigned int*)(0x424AD998UL))
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|
#define bFM3_BT15_RT_TMCR_T32 *((volatile unsigned int*)(0x424AD99CUL))
|
|
#define bFM3_BT15_RT_TMCR_EGS0 *((volatile unsigned int*)(0x424AD9A0UL))
|
|
#define bFM3_BT15_RT_TMCR_EGS1 *((volatile unsigned int*)(0x424AD9A4UL))
|
|
#define bFM3_BT15_RT_TMCR_CKS0 *((volatile unsigned int*)(0x424AD9B0UL))
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|
#define bFM3_BT15_RT_TMCR_CKS1 *((volatile unsigned int*)(0x424AD9B4UL))
|
|
#define bFM3_BT15_RT_TMCR_CKS2 *((volatile unsigned int*)(0x424AD9B8UL))
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|
#define bFM3_BT15_RT_STC_UDIR *((volatile unsigned int*)(0x424ADA00UL))
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|
#define bFM3_BT15_RT_STC_TGIR *((volatile unsigned int*)(0x424ADA08UL))
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|
#define bFM3_BT15_RT_STC_UDIE *((volatile unsigned int*)(0x424ADA10UL))
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|
#define bFM3_BT15_RT_STC_TGIE *((volatile unsigned int*)(0x424ADA18UL))
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|
#define bFM3_BT15_RT_TMCR2_CKS3 *((volatile unsigned int*)(0x424ADA20UL))
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|
|
|
/* Base Timer 15 PWC registers */
|
|
#define bFM3_BT15_PWC_TMCR_CTEN *((volatile unsigned int*)(0x424AD984UL))
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|
#define bFM3_BT15_PWC_TMCR_MDSE *((volatile unsigned int*)(0x424AD988UL))
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|
#define bFM3_BT15_PWC_TMCR_FMD0 *((volatile unsigned int*)(0x424AD990UL))
|
|
#define bFM3_BT15_PWC_TMCR_FMD1 *((volatile unsigned int*)(0x424AD994UL))
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|
#define bFM3_BT15_PWC_TMCR_FMD2 *((volatile unsigned int*)(0x424AD998UL))
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|
#define bFM3_BT15_PWC_TMCR_T32 *((volatile unsigned int*)(0x424AD99CUL))
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|
#define bFM3_BT15_PWC_TMCR_EGS0 *((volatile unsigned int*)(0x424AD9A0UL))
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#define bFM3_BT15_PWC_TMCR_EGS1 *((volatile unsigned int*)(0x424AD9A4UL))
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|
#define bFM3_BT15_PWC_TMCR_EGS2 *((volatile unsigned int*)(0x424AD9A8UL))
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|
#define bFM3_BT15_PWC_TMCR_CKS0 *((volatile unsigned int*)(0x424AD9B0UL))
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|
#define bFM3_BT15_PWC_TMCR_CKS1 *((volatile unsigned int*)(0x424AD9B4UL))
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|
#define bFM3_BT15_PWC_TMCR_CKS2 *((volatile unsigned int*)(0x424AD9B8UL))
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|
#define bFM3_BT15_PWC_STC_OVIR *((volatile unsigned int*)(0x424ADA00UL))
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|
#define bFM3_BT15_PWC_STC_EDIR *((volatile unsigned int*)(0x424ADA08UL))
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|
#define bFM3_BT15_PWC_STC_OVIE *((volatile unsigned int*)(0x424ADA10UL))
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#define bFM3_BT15_PWC_STC_EDIE *((volatile unsigned int*)(0x424ADA18UL))
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#define bFM3_BT15_PWC_STC_ERR *((volatile unsigned int*)(0x424ADA1CUL))
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#define bFM3_BT15_PWC_TMCR2_CKS3 *((volatile unsigned int*)(0x424ADA20UL))
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|
|
|
/* Base Timer I/O selector channel 8 - channel 11 registers */
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#define bFM3_BTIOSEL8B_BTSEL89AB_SEL89_0 *((volatile unsigned int*)(0x424AA020UL))
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#define bFM3_BTIOSEL8B_BTSEL89AB_SEL89_1 *((volatile unsigned int*)(0x424AA024UL))
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|
#define bFM3_BTIOSEL8B_BTSEL89AB_SEL89_2 *((volatile unsigned int*)(0x424AA028UL))
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|
#define bFM3_BTIOSEL8B_BTSEL89AB_SEL89_3 *((volatile unsigned int*)(0x424AA02CUL))
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#define bFM3_BTIOSEL8B_BTSEL89AB_SELAB_0 *((volatile unsigned int*)(0x424AA030UL))
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|
#define bFM3_BTIOSEL8B_BTSEL89AB_SELAB_1 *((volatile unsigned int*)(0x424AA034UL))
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|
#define bFM3_BTIOSEL8B_BTSEL89AB_SELAB_2 *((volatile unsigned int*)(0x424AA038UL))
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#define bFM3_BTIOSEL8B_BTSEL89AB_SELAB_3 *((volatile unsigned int*)(0x424AA03CUL))
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|
|
|
/* Base Timer I/O selector channel 12 - channel 15 registers */
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|
#define bFM3_BTIOSELCF_BTSELCDEF_SELCD_0 *((volatile unsigned int*)(0x424AE020UL))
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#define bFM3_BTIOSELCF_BTSELCDEF_SELCD_1 *((volatile unsigned int*)(0x424AE024UL))
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|
#define bFM3_BTIOSELCF_BTSELCDEF_SELCD_2 *((volatile unsigned int*)(0x424AE028UL))
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|
#define bFM3_BTIOSELCF_BTSELCDEF_SELCD_3 *((volatile unsigned int*)(0x424AE02CUL))
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|
#define bFM3_BTIOSELCF_BTSELCDEF_SELEF_0 *((volatile unsigned int*)(0x424AE030UL))
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|
#define bFM3_BTIOSELCF_BTSELCDEF_SELEF_1 *((volatile unsigned int*)(0x424AE034UL))
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|
#define bFM3_BTIOSELCF_BTSELCDEF_SELEF_2 *((volatile unsigned int*)(0x424AE038UL))
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#define bFM3_BTIOSELCF_BTSELCDEF_SELEF_3 *((volatile unsigned int*)(0x424AE03CUL))
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|
|
|
/* Software based Simulation Startup (Base Timer) register */
|
|
#define bFM3_SBSSR_BTSSSR_SSR0 *((volatile unsigned int*)(0x424BFF80UL))
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|
#define bFM3_SBSSR_BTSSSR_SSR1 *((volatile unsigned int*)(0x424BFF84UL))
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|
#define bFM3_SBSSR_BTSSSR_SSR2 *((volatile unsigned int*)(0x424BFF88UL))
|
|
#define bFM3_SBSSR_BTSSSR_SSR3 *((volatile unsigned int*)(0x424BFF8CUL))
|
|
#define bFM3_SBSSR_BTSSSR_SSR4 *((volatile unsigned int*)(0x424BFF90UL))
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|
#define bFM3_SBSSR_BTSSSR_SSR5 *((volatile unsigned int*)(0x424BFF94UL))
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|
#define bFM3_SBSSR_BTSSSR_SSR6 *((volatile unsigned int*)(0x424BFF98UL))
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|
#define bFM3_SBSSR_BTSSSR_SSR7 *((volatile unsigned int*)(0x424BFF9CUL))
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|
#define bFM3_SBSSR_BTSSSR_SSR8 *((volatile unsigned int*)(0x424BFFA0UL))
|
|
#define bFM3_SBSSR_BTSSSR_SSR9 *((volatile unsigned int*)(0x424BFFA4UL))
|
|
#define bFM3_SBSSR_BTSSSR_SSR10 *((volatile unsigned int*)(0x424BFFA8UL))
|
|
#define bFM3_SBSSR_BTSSSR_SSR11 *((volatile unsigned int*)(0x424BFFACUL))
|
|
#define bFM3_SBSSR_BTSSSR_SSR12 *((volatile unsigned int*)(0x424BFFB0UL))
|
|
#define bFM3_SBSSR_BTSSSR_SSR13 *((volatile unsigned int*)(0x424BFFB4UL))
|
|
#define bFM3_SBSSR_BTSSSR_SSR14 *((volatile unsigned int*)(0x424BFFB8UL))
|
|
#define bFM3_SBSSR_BTSSSR_SSR15 *((volatile unsigned int*)(0x424BFFBCUL))
|
|
|
|
/* Quad position and revolution counter channel 0 registers */
|
|
#define bFM3_QPRC0_QICR_QPCMIE *((volatile unsigned int*)(0x424C0280UL))
|
|
#define bFM3_QPRC0_QICR_QPCMF *((volatile unsigned int*)(0x424C0284UL))
|
|
#define bFM3_QPRC0_QICR_QPRCMIE *((volatile unsigned int*)(0x424C0288UL))
|
|
#define bFM3_QPRC0_QICR_QPRCMF *((volatile unsigned int*)(0x424C028CUL))
|
|
#define bFM3_QPRC0_QICR_OUZIE *((volatile unsigned int*)(0x424C0290UL))
|
|
#define bFM3_QPRC0_QICR_UFDF *((volatile unsigned int*)(0x424C0294UL))
|
|
#define bFM3_QPRC0_QICR_OFDF *((volatile unsigned int*)(0x424C0298UL))
|
|
#define bFM3_QPRC0_QICR_ZIIF *((volatile unsigned int*)(0x424C029CUL))
|
|
#define bFM3_QPRC0_QICR_CDCIE *((volatile unsigned int*)(0x424C02A0UL))
|
|
#define bFM3_QPRC0_QICR_CDCF *((volatile unsigned int*)(0x424C02A4UL))
|
|
#define bFM3_QPRC0_QICR_DIRPC *((volatile unsigned int*)(0x424C02A8UL))
|
|
#define bFM3_QPRC0_QICR_DIROU *((volatile unsigned int*)(0x424C02ACUL))
|
|
#define bFM3_QPRC0_QICR_QPCNRCMIE *((volatile unsigned int*)(0x424C02B0UL))
|
|
#define bFM3_QPRC0_QICR_QPCNRCMF *((volatile unsigned int*)(0x424C02B4UL))
|
|
#define bFM3_QPRC0_QICRL_QPCMIE *((volatile unsigned int*)(0x424C0280UL))
|
|
#define bFM3_QPRC0_QICRL_QPCMF *((volatile unsigned int*)(0x424C0284UL))
|
|
#define bFM3_QPRC0_QICRL_QPRCMIE *((volatile unsigned int*)(0x424C0288UL))
|
|
#define bFM3_QPRC0_QICRL_QPRCMF *((volatile unsigned int*)(0x424C028CUL))
|
|
#define bFM3_QPRC0_QICRL_OUZIE *((volatile unsigned int*)(0x424C0290UL))
|
|
#define bFM3_QPRC0_QICRL_UFDF *((volatile unsigned int*)(0x424C0294UL))
|
|
#define bFM3_QPRC0_QICRL_OFDF *((volatile unsigned int*)(0x424C0298UL))
|
|
#define bFM3_QPRC0_QICRL_ZIIF *((volatile unsigned int*)(0x424C029CUL))
|
|
#define bFM3_QPRC0_QICRH_CDCIE *((volatile unsigned int*)(0x424C02A0UL))
|
|
#define bFM3_QPRC0_QICRH_CDCF *((volatile unsigned int*)(0x424C02A4UL))
|
|
#define bFM3_QPRC0_QICRH_DIRPC *((volatile unsigned int*)(0x424C02A8UL))
|
|
#define bFM3_QPRC0_QICRH_DIROU *((volatile unsigned int*)(0x424C02ACUL))
|
|
#define bFM3_QPRC0_QICRH_QPCNRCMIE *((volatile unsigned int*)(0x424C02B0UL))
|
|
#define bFM3_QPRC0_QICRH_QPCNRCMF *((volatile unsigned int*)(0x424C02B4UL))
|
|
#define bFM3_QPRC0_QCR_PCM0 *((volatile unsigned int*)(0x424C0300UL))
|
|
#define bFM3_QPRC0_QCR_PCM1 *((volatile unsigned int*)(0x424C0304UL))
|
|
#define bFM3_QPRC0_QCR_RCM0 *((volatile unsigned int*)(0x424C0308UL))
|
|
#define bFM3_QPRC0_QCR_RCM1 *((volatile unsigned int*)(0x424C030CUL))
|
|
#define bFM3_QPRC0_QCR_PSTP *((volatile unsigned int*)(0x424C0310UL))
|
|
#define bFM3_QPRC0_QCR_CGSC *((volatile unsigned int*)(0x424C0314UL))
|
|
#define bFM3_QPRC0_QCR_RSEL *((volatile unsigned int*)(0x424C0318UL))
|
|
#define bFM3_QPRC0_QCR_SWAP *((volatile unsigned int*)(0x424C031CUL))
|
|
#define bFM3_QPRC0_QCR_PCRM0 *((volatile unsigned int*)(0x424C0320UL))
|
|
#define bFM3_QPRC0_QCR_PCRM1 *((volatile unsigned int*)(0x424C0324UL))
|
|
#define bFM3_QPRC0_QCR_AES0 *((volatile unsigned int*)(0x424C0328UL))
|
|
#define bFM3_QPRC0_QCR_AES1 *((volatile unsigned int*)(0x424C032CUL))
|
|
#define bFM3_QPRC0_QCR_BES0 *((volatile unsigned int*)(0x424C0330UL))
|
|
#define bFM3_QPRC0_QCR_BES1 *((volatile unsigned int*)(0x424C0334UL))
|
|
#define bFM3_QPRC0_QCR_CGE0 *((volatile unsigned int*)(0x424C0338UL))
|
|
#define bFM3_QPRC0_QCR_CGE1 *((volatile unsigned int*)(0x424C033CUL))
|
|
#define bFM3_QPRC0_QCRL_PCM0 *((volatile unsigned int*)(0x424C0300UL))
|
|
#define bFM3_QPRC0_QCRL_PCM1 *((volatile unsigned int*)(0x424C0304UL))
|
|
#define bFM3_QPRC0_QCRL_RCM0 *((volatile unsigned int*)(0x424C0308UL))
|
|
#define bFM3_QPRC0_QCRL_RCM1 *((volatile unsigned int*)(0x424C030CUL))
|
|
#define bFM3_QPRC0_QCRL_PSTP *((volatile unsigned int*)(0x424C0310UL))
|
|
#define bFM3_QPRC0_QCRL_CGSC *((volatile unsigned int*)(0x424C0314UL))
|
|
#define bFM3_QPRC0_QCRL_RSEL *((volatile unsigned int*)(0x424C0318UL))
|
|
#define bFM3_QPRC0_QCRL_SWAP *((volatile unsigned int*)(0x424C031CUL))
|
|
#define bFM3_QPRC0_QCRH_PCRM0 *((volatile unsigned int*)(0x424C0320UL))
|
|
#define bFM3_QPRC0_QCRH_PCRM1 *((volatile unsigned int*)(0x424C0324UL))
|
|
#define bFM3_QPRC0_QCRH_AES0 *((volatile unsigned int*)(0x424C0328UL))
|
|
#define bFM3_QPRC0_QCRH_AES1 *((volatile unsigned int*)(0x424C032CUL))
|
|
#define bFM3_QPRC0_QCRH_BES0 *((volatile unsigned int*)(0x424C0330UL))
|
|
#define bFM3_QPRC0_QCRH_BES1 *((volatile unsigned int*)(0x424C0334UL))
|
|
#define bFM3_QPRC0_QCRH_CGE0 *((volatile unsigned int*)(0x424C0338UL))
|
|
#define bFM3_QPRC0_QCRH_CGE1 *((volatile unsigned int*)(0x424C033CUL))
|
|
#define bFM3_QPRC0_QECR_ORNGMD *((volatile unsigned int*)(0x424C0380UL))
|
|
#define bFM3_QPRC0_QECR_ORNGF *((volatile unsigned int*)(0x424C0384UL))
|
|
#define bFM3_QPRC0_QECR_ORNGIE *((volatile unsigned int*)(0x424C0388UL))
|
|
|
|
/* Quad position and revolution counter channel 1 registers */
|
|
#define bFM3_QPRC1_QICR_QPCMIE *((volatile unsigned int*)(0x424C0A80UL))
|
|
#define bFM3_QPRC1_QICR_QPCMF *((volatile unsigned int*)(0x424C0A84UL))
|
|
#define bFM3_QPRC1_QICR_QPRCMIE *((volatile unsigned int*)(0x424C0A88UL))
|
|
#define bFM3_QPRC1_QICR_QPRCMF *((volatile unsigned int*)(0x424C0A8CUL))
|
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#define bFM3_QPRC1_QICR_OUZIE *((volatile unsigned int*)(0x424C0A90UL))
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#define bFM3_QPRC1_QICR_UFDF *((volatile unsigned int*)(0x424C0A94UL))
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#define bFM3_QPRC1_QICR_OFDF *((volatile unsigned int*)(0x424C0A98UL))
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#define bFM3_QPRC1_QICR_ZIIF *((volatile unsigned int*)(0x424C0A9CUL))
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#define bFM3_QPRC1_QICR_CDCIE *((volatile unsigned int*)(0x424C0AA0UL))
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#define bFM3_QPRC1_QICR_CDCF *((volatile unsigned int*)(0x424C0AA4UL))
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#define bFM3_QPRC1_QICR_DIRPC *((volatile unsigned int*)(0x424C0AA8UL))
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#define bFM3_QPRC1_QICR_DIROU *((volatile unsigned int*)(0x424C0AACUL))
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#define bFM3_QPRC1_QICR_QPCNRCMIE *((volatile unsigned int*)(0x424C0AB0UL))
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#define bFM3_QPRC1_QICR_QPCNRCMF *((volatile unsigned int*)(0x424C0AB4UL))
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#define bFM3_QPRC1_QICRL_QPCMIE *((volatile unsigned int*)(0x424C0A80UL))
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#define bFM3_QPRC1_QICRL_QPCMF *((volatile unsigned int*)(0x424C0A84UL))
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#define bFM3_QPRC1_QICRL_QPRCMIE *((volatile unsigned int*)(0x424C0A88UL))
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#define bFM3_QPRC1_QICRL_QPRCMF *((volatile unsigned int*)(0x424C0A8CUL))
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#define bFM3_QPRC1_QICRL_OUZIE *((volatile unsigned int*)(0x424C0A90UL))
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#define bFM3_QPRC1_QICRL_UFDF *((volatile unsigned int*)(0x424C0A94UL))
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#define bFM3_QPRC1_QICRL_OFDF *((volatile unsigned int*)(0x424C0A98UL))
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#define bFM3_QPRC1_QICRL_ZIIF *((volatile unsigned int*)(0x424C0A9CUL))
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#define bFM3_QPRC1_QICRH_CDCIE *((volatile unsigned int*)(0x424C0AA0UL))
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#define bFM3_QPRC1_QICRH_CDCF *((volatile unsigned int*)(0x424C0AA4UL))
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#define bFM3_QPRC1_QICRH_DIRPC *((volatile unsigned int*)(0x424C0AA8UL))
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#define bFM3_QPRC1_QICRH_DIROU *((volatile unsigned int*)(0x424C0AACUL))
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#define bFM3_QPRC1_QICRH_QPCNRCMIE *((volatile unsigned int*)(0x424C0AB0UL))
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#define bFM3_QPRC1_QICRH_QPCNRCMF *((volatile unsigned int*)(0x424C0AB4UL))
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#define bFM3_QPRC1_QCR_PCM0 *((volatile unsigned int*)(0x424C0B00UL))
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#define bFM3_QPRC1_QCR_PCM1 *((volatile unsigned int*)(0x424C0B04UL))
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#define bFM3_QPRC1_QCR_RCM0 *((volatile unsigned int*)(0x424C0B08UL))
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#define bFM3_QPRC1_QCR_RCM1 *((volatile unsigned int*)(0x424C0B0CUL))
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#define bFM3_QPRC1_QCR_PSTP *((volatile unsigned int*)(0x424C0B10UL))
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#define bFM3_QPRC1_QCR_CGSC *((volatile unsigned int*)(0x424C0B14UL))
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#define bFM3_QPRC1_QCR_RSEL *((volatile unsigned int*)(0x424C0B18UL))
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#define bFM3_QPRC1_QCR_SWAP *((volatile unsigned int*)(0x424C0B1CUL))
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#define bFM3_QPRC1_QCR_PCRM0 *((volatile unsigned int*)(0x424C0B20UL))
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#define bFM3_QPRC1_QCR_PCRM1 *((volatile unsigned int*)(0x424C0B24UL))
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#define bFM3_QPRC1_QCR_AES0 *((volatile unsigned int*)(0x424C0B28UL))
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#define bFM3_QPRC1_QCR_AES1 *((volatile unsigned int*)(0x424C0B2CUL))
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#define bFM3_QPRC1_QCR_BES0 *((volatile unsigned int*)(0x424C0B30UL))
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#define bFM3_QPRC1_QCR_BES1 *((volatile unsigned int*)(0x424C0B34UL))
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#define bFM3_QPRC1_QCR_CGE0 *((volatile unsigned int*)(0x424C0B38UL))
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#define bFM3_QPRC1_QCR_CGE1 *((volatile unsigned int*)(0x424C0B3CUL))
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#define bFM3_QPRC1_QCRL_PCM0 *((volatile unsigned int*)(0x424C0B00UL))
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#define bFM3_QPRC1_QCRL_PCM1 *((volatile unsigned int*)(0x424C0B04UL))
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#define bFM3_QPRC1_QCRL_RCM0 *((volatile unsigned int*)(0x424C0B08UL))
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#define bFM3_QPRC1_QCRL_RCM1 *((volatile unsigned int*)(0x424C0B0CUL))
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#define bFM3_QPRC1_QCRL_PSTP *((volatile unsigned int*)(0x424C0B10UL))
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#define bFM3_QPRC1_QCRL_CGSC *((volatile unsigned int*)(0x424C0B14UL))
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#define bFM3_QPRC1_QCRL_RSEL *((volatile unsigned int*)(0x424C0B18UL))
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#define bFM3_QPRC1_QCRL_SWAP *((volatile unsigned int*)(0x424C0B1CUL))
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#define bFM3_QPRC1_QCRH_PCRM0 *((volatile unsigned int*)(0x424C0B20UL))
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#define bFM3_QPRC1_QCRH_PCRM1 *((volatile unsigned int*)(0x424C0B24UL))
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#define bFM3_QPRC1_QCRH_AES0 *((volatile unsigned int*)(0x424C0B28UL))
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#define bFM3_QPRC1_QCRH_AES1 *((volatile unsigned int*)(0x424C0B2CUL))
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#define bFM3_QPRC1_QCRH_BES0 *((volatile unsigned int*)(0x424C0B30UL))
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#define bFM3_QPRC1_QCRH_BES1 *((volatile unsigned int*)(0x424C0B34UL))
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#define bFM3_QPRC1_QCRH_CGE0 *((volatile unsigned int*)(0x424C0B38UL))
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#define bFM3_QPRC1_QCRH_CGE1 *((volatile unsigned int*)(0x424C0B3CUL))
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#define bFM3_QPRC1_QECR_ORNGMD *((volatile unsigned int*)(0x424C0B80UL))
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#define bFM3_QPRC1_QECR_ORNGF *((volatile unsigned int*)(0x424C0B84UL))
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#define bFM3_QPRC1_QECR_ORNGIE *((volatile unsigned int*)(0x424C0B88UL))
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/* Quad position and revolution counter channel 2 registers */
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#define bFM3_QPRC2_QICR_QPCMIE *((volatile unsigned int*)(0x424C1280UL))
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#define bFM3_QPRC2_QICR_QPCMF *((volatile unsigned int*)(0x424C1284UL))
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#define bFM3_QPRC2_QICR_QPRCMIE *((volatile unsigned int*)(0x424C1288UL))
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#define bFM3_QPRC2_QICR_QPRCMF *((volatile unsigned int*)(0x424C128CUL))
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#define bFM3_QPRC2_QICR_OUZIE *((volatile unsigned int*)(0x424C1290UL))
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#define bFM3_QPRC2_QICR_UFDF *((volatile unsigned int*)(0x424C1294UL))
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#define bFM3_QPRC2_QICR_OFDF *((volatile unsigned int*)(0x424C1298UL))
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#define bFM3_QPRC2_QICR_ZIIF *((volatile unsigned int*)(0x424C129CUL))
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#define bFM3_QPRC2_QICR_CDCIE *((volatile unsigned int*)(0x424C12A0UL))
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#define bFM3_QPRC2_QICR_CDCF *((volatile unsigned int*)(0x424C12A4UL))
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#define bFM3_QPRC2_QICR_DIRPC *((volatile unsigned int*)(0x424C12A8UL))
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#define bFM3_QPRC2_QICR_DIROU *((volatile unsigned int*)(0x424C12ACUL))
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#define bFM3_QPRC2_QICR_QPCNRCMIE *((volatile unsigned int*)(0x424C12B0UL))
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#define bFM3_QPRC2_QICR_QPCNRCMF *((volatile unsigned int*)(0x424C12B4UL))
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#define bFM3_QPRC2_QICRL_QPCMIE *((volatile unsigned int*)(0x424C1280UL))
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#define bFM3_QPRC2_QICRL_QPCMF *((volatile unsigned int*)(0x424C1284UL))
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#define bFM3_QPRC2_QICRL_QPRCMIE *((volatile unsigned int*)(0x424C1288UL))
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#define bFM3_QPRC2_QICRL_QPRCMF *((volatile unsigned int*)(0x424C128CUL))
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#define bFM3_QPRC2_QICRL_OUZIE *((volatile unsigned int*)(0x424C1290UL))
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#define bFM3_QPRC2_QICRL_UFDF *((volatile unsigned int*)(0x424C1294UL))
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#define bFM3_QPRC2_QICRL_OFDF *((volatile unsigned int*)(0x424C1298UL))
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#define bFM3_QPRC2_QICRL_ZIIF *((volatile unsigned int*)(0x424C129CUL))
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#define bFM3_QPRC2_QICRH_CDCIE *((volatile unsigned int*)(0x424C12A0UL))
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#define bFM3_QPRC2_QICRH_CDCF *((volatile unsigned int*)(0x424C12A4UL))
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#define bFM3_QPRC2_QICRH_DIRPC *((volatile unsigned int*)(0x424C12A8UL))
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#define bFM3_QPRC2_QICRH_DIROU *((volatile unsigned int*)(0x424C12ACUL))
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#define bFM3_QPRC2_QICRH_QPCNRCMIE *((volatile unsigned int*)(0x424C12B0UL))
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#define bFM3_QPRC2_QICRH_QPCNRCMF *((volatile unsigned int*)(0x424C12B4UL))
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#define bFM3_QPRC2_QCR_PCM0 *((volatile unsigned int*)(0x424C1300UL))
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#define bFM3_QPRC2_QCR_PCM1 *((volatile unsigned int*)(0x424C1304UL))
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#define bFM3_QPRC2_QCR_RCM0 *((volatile unsigned int*)(0x424C1308UL))
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#define bFM3_QPRC2_QCR_RCM1 *((volatile unsigned int*)(0x424C130CUL))
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#define bFM3_QPRC2_QCR_PSTP *((volatile unsigned int*)(0x424C1310UL))
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#define bFM3_QPRC2_QCR_CGSC *((volatile unsigned int*)(0x424C1314UL))
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#define bFM3_QPRC2_QCR_RSEL *((volatile unsigned int*)(0x424C1318UL))
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#define bFM3_QPRC2_QCR_SWAP *((volatile unsigned int*)(0x424C131CUL))
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#define bFM3_QPRC2_QCR_PCRM0 *((volatile unsigned int*)(0x424C1320UL))
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#define bFM3_QPRC2_QCR_PCRM1 *((volatile unsigned int*)(0x424C1324UL))
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#define bFM3_QPRC2_QCR_AES0 *((volatile unsigned int*)(0x424C1328UL))
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#define bFM3_QPRC2_QCR_AES1 *((volatile unsigned int*)(0x424C132CUL))
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#define bFM3_QPRC2_QCR_BES0 *((volatile unsigned int*)(0x424C1330UL))
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#define bFM3_QPRC2_QCR_BES1 *((volatile unsigned int*)(0x424C1334UL))
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#define bFM3_QPRC2_QCR_CGE0 *((volatile unsigned int*)(0x424C1338UL))
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#define bFM3_QPRC2_QCR_CGE1 *((volatile unsigned int*)(0x424C133CUL))
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#define bFM3_QPRC2_QCRL_PCM0 *((volatile unsigned int*)(0x424C1300UL))
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#define bFM3_QPRC2_QCRL_PCM1 *((volatile unsigned int*)(0x424C1304UL))
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#define bFM3_QPRC2_QCRL_RCM0 *((volatile unsigned int*)(0x424C1308UL))
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#define bFM3_QPRC2_QCRL_RCM1 *((volatile unsigned int*)(0x424C130CUL))
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#define bFM3_QPRC2_QCRL_PSTP *((volatile unsigned int*)(0x424C1310UL))
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#define bFM3_QPRC2_QCRL_CGSC *((volatile unsigned int*)(0x424C1314UL))
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#define bFM3_QPRC2_QCRL_RSEL *((volatile unsigned int*)(0x424C1318UL))
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#define bFM3_QPRC2_QCRL_SWAP *((volatile unsigned int*)(0x424C131CUL))
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#define bFM3_QPRC2_QCRH_PCRM0 *((volatile unsigned int*)(0x424C1320UL))
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#define bFM3_QPRC2_QCRH_PCRM1 *((volatile unsigned int*)(0x424C1324UL))
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#define bFM3_QPRC2_QCRH_AES0 *((volatile unsigned int*)(0x424C1328UL))
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#define bFM3_QPRC2_QCRH_AES1 *((volatile unsigned int*)(0x424C132CUL))
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#define bFM3_QPRC2_QCRH_BES0 *((volatile unsigned int*)(0x424C1330UL))
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#define bFM3_QPRC2_QCRH_BES1 *((volatile unsigned int*)(0x424C1334UL))
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#define bFM3_QPRC2_QCRH_CGE0 *((volatile unsigned int*)(0x424C1338UL))
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#define bFM3_QPRC2_QCRH_CGE1 *((volatile unsigned int*)(0x424C133CUL))
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#define bFM3_QPRC2_QECR_ORNGMD *((volatile unsigned int*)(0x424C1380UL))
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#define bFM3_QPRC2_QECR_ORNGF *((volatile unsigned int*)(0x424C1384UL))
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#define bFM3_QPRC2_QECR_ORNGIE *((volatile unsigned int*)(0x424C1388UL))
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/* 12-bit ADC unit 0 registers */
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#define bFM3_ADC0_ADSR_SCS *((volatile unsigned int*)(0x424E0000UL))
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#define bFM3_ADC0_ADSR_PCS *((volatile unsigned int*)(0x424E0004UL))
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#define bFM3_ADC0_ADSR_PCNS *((volatile unsigned int*)(0x424E0008UL))
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#define bFM3_ADC0_ADSR_FDAS *((volatile unsigned int*)(0x424E0018UL))
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#define bFM3_ADC0_ADSR_ADSTP *((volatile unsigned int*)(0x424E001CUL))
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#define bFM3_ADC0_ADCR_OVRIE *((volatile unsigned int*)(0x424E0020UL))
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#define bFM3_ADC0_ADCR_CMPIE *((volatile unsigned int*)(0x424E0024UL))
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#define bFM3_ADC0_ADCR_PCIE *((volatile unsigned int*)(0x424E0028UL))
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#define bFM3_ADC0_ADCR_SCIE *((volatile unsigned int*)(0x424E002CUL))
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#define bFM3_ADC0_ADCR_CMPIF *((volatile unsigned int*)(0x424E0034UL))
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#define bFM3_ADC0_ADCR_PCIF *((volatile unsigned int*)(0x424E0038UL))
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#define bFM3_ADC0_ADCR_SCIF *((volatile unsigned int*)(0x424E003CUL))
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#define bFM3_ADC0_SFNS_SFS0 *((volatile unsigned int*)(0x424E0100UL))
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#define bFM3_ADC0_SFNS_SFS1 *((volatile unsigned int*)(0x424E0104UL))
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#define bFM3_ADC0_SFNS_SFS2 *((volatile unsigned int*)(0x424E0108UL))
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#define bFM3_ADC0_SFNS_SFS3 *((volatile unsigned int*)(0x424E010CUL))
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#define bFM3_ADC0_SCCR_SSTR *((volatile unsigned int*)(0x424E0120UL))
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#define bFM3_ADC0_SCCR_SHEN *((volatile unsigned int*)(0x424E0124UL))
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#define bFM3_ADC0_SCCR_RPT *((volatile unsigned int*)(0x424E0128UL))
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#define bFM3_ADC0_SCCR_SFCLR *((volatile unsigned int*)(0x424E0130UL))
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#define bFM3_ADC0_SCCR_SOVR *((volatile unsigned int*)(0x424E0134UL))
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#define bFM3_ADC0_SCCR_SFUL *((volatile unsigned int*)(0x424E0138UL))
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#define bFM3_ADC0_SCCR_SEMP *((volatile unsigned int*)(0x424E013CUL))
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#define bFM3_ADC0_SCFD_SC0 *((volatile unsigned int*)(0x424E0180UL))
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#define bFM3_ADC0_SCFD_SC1 *((volatile unsigned int*)(0x424E0184UL))
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#define bFM3_ADC0_SCFD_SC2 *((volatile unsigned int*)(0x424E0188UL))
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#define bFM3_ADC0_SCFD_SC3 *((volatile unsigned int*)(0x424E018CUL))
|
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#define bFM3_ADC0_SCFD_SC4 *((volatile unsigned int*)(0x424E0190UL))
|
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#define bFM3_ADC0_SCFD_RS0 *((volatile unsigned int*)(0x424E01A0UL))
|
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#define bFM3_ADC0_SCFD_RS1 *((volatile unsigned int*)(0x424E01A4UL))
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#define bFM3_ADC0_SCFD_INVL *((volatile unsigned int*)(0x424E01B0UL))
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#define bFM3_ADC0_SCFD_SD0 *((volatile unsigned int*)(0x424E01D0UL))
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#define bFM3_ADC0_SCFD_SD1 *((volatile unsigned int*)(0x424E01D4UL))
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#define bFM3_ADC0_SCFD_SD2 *((volatile unsigned int*)(0x424E01D8UL))
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#define bFM3_ADC0_SCFD_SD3 *((volatile unsigned int*)(0x424E01DCUL))
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#define bFM3_ADC0_SCFD_SD4 *((volatile unsigned int*)(0x424E01E0UL))
|
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#define bFM3_ADC0_SCFD_SD5 *((volatile unsigned int*)(0x424E01E4UL))
|
|
#define bFM3_ADC0_SCFD_SD6 *((volatile unsigned int*)(0x424E01E8UL))
|
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#define bFM3_ADC0_SCFD_SD7 *((volatile unsigned int*)(0x424E01ECUL))
|
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#define bFM3_ADC0_SCFD_SD8 *((volatile unsigned int*)(0x424E01F0UL))
|
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#define bFM3_ADC0_SCFD_SD9 *((volatile unsigned int*)(0x424E01F4UL))
|
|
#define bFM3_ADC0_SCFD_SD10 *((volatile unsigned int*)(0x424E01F8UL))
|
|
#define bFM3_ADC0_SCFD_SD11 *((volatile unsigned int*)(0x424E01FCUL))
|
|
#define bFM3_ADC0_SCFDL_SC0 *((volatile unsigned int*)(0x424E0180UL))
|
|
#define bFM3_ADC0_SCFDL_SC1 *((volatile unsigned int*)(0x424E0184UL))
|
|
#define bFM3_ADC0_SCFDL_SC2 *((volatile unsigned int*)(0x424E0188UL))
|
|
#define bFM3_ADC0_SCFDL_SC3 *((volatile unsigned int*)(0x424E018CUL))
|
|
#define bFM3_ADC0_SCFDL_SC4 *((volatile unsigned int*)(0x424E0190UL))
|
|
#define bFM3_ADC0_SCFDL_RS0 *((volatile unsigned int*)(0x424E01A0UL))
|
|
#define bFM3_ADC0_SCFDL_RS1 *((volatile unsigned int*)(0x424E01A4UL))
|
|
#define bFM3_ADC0_SCFDL_INVL *((volatile unsigned int*)(0x424E01B0UL))
|
|
#define bFM3_ADC0_SCFDH_SD0 *((volatile unsigned int*)(0x424E01D0UL))
|
|
#define bFM3_ADC0_SCFDH_SD1 *((volatile unsigned int*)(0x424E01D4UL))
|
|
#define bFM3_ADC0_SCFDH_SD2 *((volatile unsigned int*)(0x424E01D8UL))
|
|
#define bFM3_ADC0_SCFDH_SD3 *((volatile unsigned int*)(0x424E01DCUL))
|
|
#define bFM3_ADC0_SCFDH_SD4 *((volatile unsigned int*)(0x424E01E0UL))
|
|
#define bFM3_ADC0_SCFDH_SD5 *((volatile unsigned int*)(0x424E01E4UL))
|
|
#define bFM3_ADC0_SCFDH_SD6 *((volatile unsigned int*)(0x424E01E8UL))
|
|
#define bFM3_ADC0_SCFDH_SD7 *((volatile unsigned int*)(0x424E01ECUL))
|
|
#define bFM3_ADC0_SCFDH_SD8 *((volatile unsigned int*)(0x424E01F0UL))
|
|
#define bFM3_ADC0_SCFDH_SD9 *((volatile unsigned int*)(0x424E01F4UL))
|
|
#define bFM3_ADC0_SCFDH_SD10 *((volatile unsigned int*)(0x424E01F8UL))
|
|
#define bFM3_ADC0_SCFDH_SD11 *((volatile unsigned int*)(0x424E01FCUL))
|
|
#define bFM3_ADC0_SCIS23_AN16 *((volatile unsigned int*)(0x424E0200UL))
|
|
#define bFM3_ADC0_SCIS23_AN17 *((volatile unsigned int*)(0x424E0204UL))
|
|
#define bFM3_ADC0_SCIS23_AN18 *((volatile unsigned int*)(0x424E0208UL))
|
|
#define bFM3_ADC0_SCIS23_AN19 *((volatile unsigned int*)(0x424E020CUL))
|
|
#define bFM3_ADC0_SCIS23_AN20 *((volatile unsigned int*)(0x424E0210UL))
|
|
#define bFM3_ADC0_SCIS23_AN21 *((volatile unsigned int*)(0x424E0214UL))
|
|
#define bFM3_ADC0_SCIS23_AN22 *((volatile unsigned int*)(0x424E0218UL))
|
|
#define bFM3_ADC0_SCIS23_AN23 *((volatile unsigned int*)(0x424E021CUL))
|
|
#define bFM3_ADC0_SCIS23_AN24 *((volatile unsigned int*)(0x424E0220UL))
|
|
#define bFM3_ADC0_SCIS23_AN25 *((volatile unsigned int*)(0x424E0224UL))
|
|
#define bFM3_ADC0_SCIS23_AN26 *((volatile unsigned int*)(0x424E0228UL))
|
|
#define bFM3_ADC0_SCIS23_AN27 *((volatile unsigned int*)(0x424E022CUL))
|
|
#define bFM3_ADC0_SCIS23_AN28 *((volatile unsigned int*)(0x424E0230UL))
|
|
#define bFM3_ADC0_SCIS23_AN29 *((volatile unsigned int*)(0x424E0234UL))
|
|
#define bFM3_ADC0_SCIS23_AN30 *((volatile unsigned int*)(0x424E0238UL))
|
|
#define bFM3_ADC0_SCIS23_AN31 *((volatile unsigned int*)(0x424E023CUL))
|
|
#define bFM3_ADC0_SCIS2_AN16 *((volatile unsigned int*)(0x424E0200UL))
|
|
#define bFM3_ADC0_SCIS2_AN17 *((volatile unsigned int*)(0x424E0204UL))
|
|
#define bFM3_ADC0_SCIS2_AN18 *((volatile unsigned int*)(0x424E0208UL))
|
|
#define bFM3_ADC0_SCIS2_AN19 *((volatile unsigned int*)(0x424E020CUL))
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#define bFM3_ADC0_SCIS2_AN20 *((volatile unsigned int*)(0x424E0210UL))
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#define bFM3_ADC0_SCIS2_AN21 *((volatile unsigned int*)(0x424E0214UL))
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#define bFM3_ADC0_SCIS2_AN22 *((volatile unsigned int*)(0x424E0218UL))
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#define bFM3_ADC0_SCIS2_AN23 *((volatile unsigned int*)(0x424E021CUL))
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#define bFM3_ADC0_SCIS3_AN24 *((volatile unsigned int*)(0x424E0220UL))
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#define bFM3_ADC0_SCIS3_AN25 *((volatile unsigned int*)(0x424E0224UL))
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#define bFM3_ADC0_SCIS3_AN26 *((volatile unsigned int*)(0x424E0228UL))
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#define bFM3_ADC0_SCIS3_AN27 *((volatile unsigned int*)(0x424E022CUL))
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#define bFM3_ADC0_SCIS3_AN28 *((volatile unsigned int*)(0x424E0230UL))
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#define bFM3_ADC0_SCIS3_AN29 *((volatile unsigned int*)(0x424E0234UL))
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#define bFM3_ADC0_SCIS3_AN30 *((volatile unsigned int*)(0x424E0238UL))
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#define bFM3_ADC0_SCIS3_AN31 *((volatile unsigned int*)(0x424E023CUL))
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#define bFM3_ADC0_SCIS01_AN0 *((volatile unsigned int*)(0x424E0280UL))
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#define bFM3_ADC0_SCIS01_AN1 *((volatile unsigned int*)(0x424E0284UL))
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#define bFM3_ADC0_SCIS01_AN2 *((volatile unsigned int*)(0x424E0288UL))
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#define bFM3_ADC0_SCIS01_AN3 *((volatile unsigned int*)(0x424E028CUL))
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#define bFM3_ADC0_SCIS01_AN4 *((volatile unsigned int*)(0x424E0290UL))
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#define bFM3_ADC0_SCIS01_AN5 *((volatile unsigned int*)(0x424E0294UL))
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#define bFM3_ADC0_SCIS01_AN6 *((volatile unsigned int*)(0x424E0298UL))
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#define bFM3_ADC0_SCIS01_AN7 *((volatile unsigned int*)(0x424E029CUL))
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#define bFM3_ADC0_SCIS01_AN8 *((volatile unsigned int*)(0x424E02A0UL))
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#define bFM3_ADC0_SCIS01_AN9 *((volatile unsigned int*)(0x424E02A4UL))
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#define bFM3_ADC0_SCIS01_AN10 *((volatile unsigned int*)(0x424E02A8UL))
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#define bFM3_ADC0_SCIS01_AN11 *((volatile unsigned int*)(0x424E02ACUL))
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#define bFM3_ADC0_SCIS01_AN12 *((volatile unsigned int*)(0x424E02B0UL))
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#define bFM3_ADC0_SCIS01_AN13 *((volatile unsigned int*)(0x424E02B4UL))
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#define bFM3_ADC0_SCIS01_AN14 *((volatile unsigned int*)(0x424E02B8UL))
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#define bFM3_ADC0_SCIS01_AN15 *((volatile unsigned int*)(0x424E02BCUL))
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#define bFM3_ADC0_SCIS0_AN0 *((volatile unsigned int*)(0x424E0280UL))
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#define bFM3_ADC0_SCIS0_AN1 *((volatile unsigned int*)(0x424E0284UL))
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#define bFM3_ADC0_SCIS0_AN2 *((volatile unsigned int*)(0x424E0288UL))
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#define bFM3_ADC0_SCIS0_AN3 *((volatile unsigned int*)(0x424E028CUL))
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#define bFM3_ADC0_SCIS0_AN4 *((volatile unsigned int*)(0x424E0290UL))
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#define bFM3_ADC0_SCIS0_AN5 *((volatile unsigned int*)(0x424E0294UL))
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#define bFM3_ADC0_SCIS0_AN6 *((volatile unsigned int*)(0x424E0298UL))
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#define bFM3_ADC0_SCIS0_AN7 *((volatile unsigned int*)(0x424E029CUL))
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#define bFM3_ADC0_SCIS1_AN8 *((volatile unsigned int*)(0x424E02A0UL))
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#define bFM3_ADC0_SCIS1_AN9 *((volatile unsigned int*)(0x424E02A4UL))
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#define bFM3_ADC0_SCIS1_AN10 *((volatile unsigned int*)(0x424E02A8UL))
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#define bFM3_ADC0_SCIS1_AN11 *((volatile unsigned int*)(0x424E02ACUL))
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#define bFM3_ADC0_SCIS1_AN12 *((volatile unsigned int*)(0x424E02B0UL))
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#define bFM3_ADC0_SCIS1_AN13 *((volatile unsigned int*)(0x424E02B4UL))
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#define bFM3_ADC0_SCIS1_AN14 *((volatile unsigned int*)(0x424E02B8UL))
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#define bFM3_ADC0_SCIS1_AN15 *((volatile unsigned int*)(0x424E02BCUL))
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#define bFM3_ADC0_PFNS_PFS0 *((volatile unsigned int*)(0x424E0300UL))
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#define bFM3_ADC0_PFNS_PFS1 *((volatile unsigned int*)(0x424E0304UL))
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#define bFM3_ADC0_PFNS_TEST0 *((volatile unsigned int*)(0x424E0310UL))
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#define bFM3_ADC0_PFNS_TEST1 *((volatile unsigned int*)(0x424E0314UL))
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#define bFM3_ADC0_PCCR_PSTR *((volatile unsigned int*)(0x424E0320UL))
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#define bFM3_ADC0_PCCR_PHEN *((volatile unsigned int*)(0x424E0324UL))
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#define bFM3_ADC0_PCCR_PEEN *((volatile unsigned int*)(0x424E0328UL))
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#define bFM3_ADC0_PCCR_ESCE *((volatile unsigned int*)(0x424E032CUL))
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#define bFM3_ADC0_PCCR_PFCLR *((volatile unsigned int*)(0x424E0330UL))
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#define bFM3_ADC0_PCCR_POVR *((volatile unsigned int*)(0x424E0334UL))
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#define bFM3_ADC0_PCCR_PFUL *((volatile unsigned int*)(0x424E0338UL))
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#define bFM3_ADC0_PCCR_PEMP *((volatile unsigned int*)(0x424E033CUL))
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#define bFM3_ADC0_PCFD_PC0 *((volatile unsigned int*)(0x424E0380UL))
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#define bFM3_ADC0_PCFD_PC1 *((volatile unsigned int*)(0x424E0384UL))
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#define bFM3_ADC0_PCFD_PC2 *((volatile unsigned int*)(0x424E0388UL))
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#define bFM3_ADC0_PCFD_PC3 *((volatile unsigned int*)(0x424E038CUL))
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#define bFM3_ADC0_PCFD_PC4 *((volatile unsigned int*)(0x424E0390UL))
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#define bFM3_ADC0_PCFD_RS0 *((volatile unsigned int*)(0x424E03A0UL))
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#define bFM3_ADC0_PCFD_RS1 *((volatile unsigned int*)(0x424E03A4UL))
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#define bFM3_ADC0_PCFD_RS2 *((volatile unsigned int*)(0x424E03A8UL))
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#define bFM3_ADC0_PCFD_INVL *((volatile unsigned int*)(0x424E03B0UL))
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#define bFM3_ADC0_PCFD_PD0 *((volatile unsigned int*)(0x424E03D0UL))
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#define bFM3_ADC0_PCFD_PD1 *((volatile unsigned int*)(0x424E03D4UL))
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#define bFM3_ADC0_PCFD_PD2 *((volatile unsigned int*)(0x424E03D8UL))
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#define bFM3_ADC0_PCFD_PD3 *((volatile unsigned int*)(0x424E03DCUL))
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#define bFM3_ADC0_PCFD_PD4 *((volatile unsigned int*)(0x424E03E0UL))
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#define bFM3_ADC0_PCFD_PD5 *((volatile unsigned int*)(0x424E03E4UL))
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#define bFM3_ADC0_PCFD_PD6 *((volatile unsigned int*)(0x424E03E8UL))
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#define bFM3_ADC0_PCFD_PD7 *((volatile unsigned int*)(0x424E03ECUL))
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#define bFM3_ADC0_PCFD_PD8 *((volatile unsigned int*)(0x424E03F0UL))
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#define bFM3_ADC0_PCFD_PD9 *((volatile unsigned int*)(0x424E03F4UL))
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#define bFM3_ADC0_PCFD_PD10 *((volatile unsigned int*)(0x424E03F8UL))
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#define bFM3_ADC0_PCFD_PD11 *((volatile unsigned int*)(0x424E03FCUL))
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#define bFM3_ADC0_PCFDL_PC0 *((volatile unsigned int*)(0x424E0380UL))
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#define bFM3_ADC0_PCFDL_PC1 *((volatile unsigned int*)(0x424E0384UL))
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#define bFM3_ADC0_PCFDL_PC2 *((volatile unsigned int*)(0x424E0388UL))
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#define bFM3_ADC0_PCFDL_PC3 *((volatile unsigned int*)(0x424E038CUL))
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#define bFM3_ADC0_PCFDL_PC4 *((volatile unsigned int*)(0x424E0390UL))
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#define bFM3_ADC0_PCFDL_RS0 *((volatile unsigned int*)(0x424E03A0UL))
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#define bFM3_ADC0_PCFDL_RS1 *((volatile unsigned int*)(0x424E03A4UL))
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#define bFM3_ADC0_PCFDL_RS2 *((volatile unsigned int*)(0x424E03A8UL))
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#define bFM3_ADC0_PCFDL_INVL *((volatile unsigned int*)(0x424E03B0UL))
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#define bFM3_ADC0_PCFDH_PD0 *((volatile unsigned int*)(0x424E03D0UL))
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#define bFM3_ADC0_PCFDH_PD1 *((volatile unsigned int*)(0x424E03D4UL))
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#define bFM3_ADC0_PCFDH_PD2 *((volatile unsigned int*)(0x424E03D8UL))
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#define bFM3_ADC0_PCFDH_PD3 *((volatile unsigned int*)(0x424E03DCUL))
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#define bFM3_ADC0_PCFDH_PD4 *((volatile unsigned int*)(0x424E03E0UL))
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#define bFM3_ADC0_PCFDH_PD5 *((volatile unsigned int*)(0x424E03E4UL))
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#define bFM3_ADC0_PCFDH_PD6 *((volatile unsigned int*)(0x424E03E8UL))
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#define bFM3_ADC0_PCFDH_PD7 *((volatile unsigned int*)(0x424E03ECUL))
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#define bFM3_ADC0_PCFDH_PD8 *((volatile unsigned int*)(0x424E03F0UL))
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#define bFM3_ADC0_PCFDH_PD9 *((volatile unsigned int*)(0x424E03F4UL))
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#define bFM3_ADC0_PCFDH_PD10 *((volatile unsigned int*)(0x424E03F8UL))
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#define bFM3_ADC0_PCFDH_PD11 *((volatile unsigned int*)(0x424E03FCUL))
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#define bFM3_ADC0_PCIS_P1A0 *((volatile unsigned int*)(0x424E0400UL))
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#define bFM3_ADC0_PCIS_P1A1 *((volatile unsigned int*)(0x424E0404UL))
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#define bFM3_ADC0_PCIS_P1A2 *((volatile unsigned int*)(0x424E0408UL))
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#define bFM3_ADC0_PCIS_P2A0 *((volatile unsigned int*)(0x424E040CUL))
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#define bFM3_ADC0_PCIS_P2A1 *((volatile unsigned int*)(0x424E0410UL))
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#define bFM3_ADC0_PCIS_P2A2 *((volatile unsigned int*)(0x424E0414UL))
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#define bFM3_ADC0_PCIS_P2A3 *((volatile unsigned int*)(0x424E0418UL))
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#define bFM3_ADC0_PCIS_P2A4 *((volatile unsigned int*)(0x424E041CUL))
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#define bFM3_ADC0_CMPCR_CCH0 *((volatile unsigned int*)(0x424E0480UL))
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#define bFM3_ADC0_CMPCR_CCH1 *((volatile unsigned int*)(0x424E0484UL))
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#define bFM3_ADC0_CMPCR_CCH2 *((volatile unsigned int*)(0x424E0488UL))
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#define bFM3_ADC0_CMPCR_CCH3 *((volatile unsigned int*)(0x424E048CUL))
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#define bFM3_ADC0_CMPCR_CCH4 *((volatile unsigned int*)(0x424E0490UL))
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#define bFM3_ADC0_CMPCR_CMD0 *((volatile unsigned int*)(0x424E0494UL))
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#define bFM3_ADC0_CMPCR_CMD1 *((volatile unsigned int*)(0x424E0498UL))
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#define bFM3_ADC0_CMPCR_CMPEN *((volatile unsigned int*)(0x424E049CUL))
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#define bFM3_ADC0_CMPD_CMAD2 *((volatile unsigned int*)(0x424E04D8UL))
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#define bFM3_ADC0_CMPD_CMAD3 *((volatile unsigned int*)(0x424E04DCUL))
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#define bFM3_ADC0_CMPD_CMAD4 *((volatile unsigned int*)(0x424E04E0UL))
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#define bFM3_ADC0_CMPD_CMAD5 *((volatile unsigned int*)(0x424E04E4UL))
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#define bFM3_ADC0_CMPD_CMAD6 *((volatile unsigned int*)(0x424E04E8UL))
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#define bFM3_ADC0_CMPD_CMAD7 *((volatile unsigned int*)(0x424E04ECUL))
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#define bFM3_ADC0_CMPD_CMAD8 *((volatile unsigned int*)(0x424E04F0UL))
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#define bFM3_ADC0_CMPD_CMAD9 *((volatile unsigned int*)(0x424E04F4UL))
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#define bFM3_ADC0_CMPD_CMAD10 *((volatile unsigned int*)(0x424E04F8UL))
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#define bFM3_ADC0_CMPD_CMAD11 *((volatile unsigned int*)(0x424E04FCUL))
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#define bFM3_ADC0_ADSS23_TS16 *((volatile unsigned int*)(0x424E0500UL))
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#define bFM3_ADC0_ADSS23_TS17 *((volatile unsigned int*)(0x424E0504UL))
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#define bFM3_ADC0_ADSS23_TS18 *((volatile unsigned int*)(0x424E0508UL))
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#define bFM3_ADC0_ADSS23_TS19 *((volatile unsigned int*)(0x424E050CUL))
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#define bFM3_ADC0_ADSS23_TS20 *((volatile unsigned int*)(0x424E0510UL))
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#define bFM3_ADC0_ADSS23_TS21 *((volatile unsigned int*)(0x424E0514UL))
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#define bFM3_ADC0_ADSS23_TS22 *((volatile unsigned int*)(0x424E0518UL))
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#define bFM3_ADC0_ADSS23_TS23 *((volatile unsigned int*)(0x424E051CUL))
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#define bFM3_ADC0_ADSS23_TS24 *((volatile unsigned int*)(0x424E0520UL))
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#define bFM3_ADC0_ADSS23_TS25 *((volatile unsigned int*)(0x424E0524UL))
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#define bFM3_ADC0_ADSS23_TS26 *((volatile unsigned int*)(0x424E0528UL))
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#define bFM3_ADC0_ADSS23_TS27 *((volatile unsigned int*)(0x424E052CUL))
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#define bFM3_ADC0_ADSS23_TS28 *((volatile unsigned int*)(0x424E0530UL))
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#define bFM3_ADC0_ADSS23_TS29 *((volatile unsigned int*)(0x424E0534UL))
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#define bFM3_ADC0_ADSS23_TS30 *((volatile unsigned int*)(0x424E0538UL))
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#define bFM3_ADC0_ADSS23_TS31 *((volatile unsigned int*)(0x424E053CUL))
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#define bFM3_ADC0_ADSS2_TS16 *((volatile unsigned int*)(0x424E0500UL))
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#define bFM3_ADC0_ADSS2_TS17 *((volatile unsigned int*)(0x424E0504UL))
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#define bFM3_ADC0_ADSS2_TS18 *((volatile unsigned int*)(0x424E0508UL))
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#define bFM3_ADC0_ADSS2_TS19 *((volatile unsigned int*)(0x424E050CUL))
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|
#define bFM3_ADC0_ADSS2_TS20 *((volatile unsigned int*)(0x424E0510UL))
|
|
#define bFM3_ADC0_ADSS2_TS21 *((volatile unsigned int*)(0x424E0514UL))
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|
#define bFM3_ADC0_ADSS2_TS22 *((volatile unsigned int*)(0x424E0518UL))
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|
#define bFM3_ADC0_ADSS2_TS23 *((volatile unsigned int*)(0x424E051CUL))
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|
#define bFM3_ADC0_ADSS3_TS24 *((volatile unsigned int*)(0x424E0520UL))
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#define bFM3_ADC0_ADSS3_TS25 *((volatile unsigned int*)(0x424E0524UL))
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|
#define bFM3_ADC0_ADSS3_TS26 *((volatile unsigned int*)(0x424E0528UL))
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#define bFM3_ADC0_ADSS3_TS27 *((volatile unsigned int*)(0x424E052CUL))
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#define bFM3_ADC0_ADSS3_TS28 *((volatile unsigned int*)(0x424E0530UL))
|
|
#define bFM3_ADC0_ADSS3_TS29 *((volatile unsigned int*)(0x424E0534UL))
|
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#define bFM3_ADC0_ADSS3_TS30 *((volatile unsigned int*)(0x424E0538UL))
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#define bFM3_ADC0_ADSS3_TS31 *((volatile unsigned int*)(0x424E053CUL))
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#define bFM3_ADC0_ADSS01_TS0 *((volatile unsigned int*)(0x424E0580UL))
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|
#define bFM3_ADC0_ADSS01_TS1 *((volatile unsigned int*)(0x424E0584UL))
|
|
#define bFM3_ADC0_ADSS01_TS2 *((volatile unsigned int*)(0x424E0588UL))
|
|
#define bFM3_ADC0_ADSS01_TS3 *((volatile unsigned int*)(0x424E058CUL))
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#define bFM3_ADC0_ADSS01_TS4 *((volatile unsigned int*)(0x424E0590UL))
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|
#define bFM3_ADC0_ADSS01_TS5 *((volatile unsigned int*)(0x424E0594UL))
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#define bFM3_ADC0_ADSS01_TS6 *((volatile unsigned int*)(0x424E0598UL))
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|
#define bFM3_ADC0_ADSS01_TS7 *((volatile unsigned int*)(0x424E059CUL))
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|
#define bFM3_ADC0_ADSS01_TS8 *((volatile unsigned int*)(0x424E05A0UL))
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#define bFM3_ADC0_ADSS01_TS9 *((volatile unsigned int*)(0x424E05A4UL))
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|
#define bFM3_ADC0_ADSS01_TS10 *((volatile unsigned int*)(0x424E05A8UL))
|
|
#define bFM3_ADC0_ADSS01_TS11 *((volatile unsigned int*)(0x424E05ACUL))
|
|
#define bFM3_ADC0_ADSS01_TS12 *((volatile unsigned int*)(0x424E05B0UL))
|
|
#define bFM3_ADC0_ADSS01_TS13 *((volatile unsigned int*)(0x424E05B4UL))
|
|
#define bFM3_ADC0_ADSS01_TS14 *((volatile unsigned int*)(0x424E05B8UL))
|
|
#define bFM3_ADC0_ADSS01_TS15 *((volatile unsigned int*)(0x424E05BCUL))
|
|
#define bFM3_ADC0_ADSS0_TS0 *((volatile unsigned int*)(0x424E0580UL))
|
|
#define bFM3_ADC0_ADSS0_TS1 *((volatile unsigned int*)(0x424E0584UL))
|
|
#define bFM3_ADC0_ADSS0_TS2 *((volatile unsigned int*)(0x424E0588UL))
|
|
#define bFM3_ADC0_ADSS0_TS3 *((volatile unsigned int*)(0x424E058CUL))
|
|
#define bFM3_ADC0_ADSS0_TS4 *((volatile unsigned int*)(0x424E0590UL))
|
|
#define bFM3_ADC0_ADSS0_TS5 *((volatile unsigned int*)(0x424E0594UL))
|
|
#define bFM3_ADC0_ADSS0_TS6 *((volatile unsigned int*)(0x424E0598UL))
|
|
#define bFM3_ADC0_ADSS0_TS7 *((volatile unsigned int*)(0x424E059CUL))
|
|
#define bFM3_ADC0_ADSS1_TS8 *((volatile unsigned int*)(0x424E05A0UL))
|
|
#define bFM3_ADC0_ADSS1_TS9 *((volatile unsigned int*)(0x424E05A4UL))
|
|
#define bFM3_ADC0_ADSS1_TS10 *((volatile unsigned int*)(0x424E05A8UL))
|
|
#define bFM3_ADC0_ADSS1_TS11 *((volatile unsigned int*)(0x424E05ACUL))
|
|
#define bFM3_ADC0_ADSS1_TS12 *((volatile unsigned int*)(0x424E05B0UL))
|
|
#define bFM3_ADC0_ADSS1_TS13 *((volatile unsigned int*)(0x424E05B4UL))
|
|
#define bFM3_ADC0_ADSS1_TS14 *((volatile unsigned int*)(0x424E05B8UL))
|
|
#define bFM3_ADC0_ADSS1_TS15 *((volatile unsigned int*)(0x424E05BCUL))
|
|
#define bFM3_ADC0_ADST01_ST10 *((volatile unsigned int*)(0x424E0600UL))
|
|
#define bFM3_ADC0_ADST01_ST11 *((volatile unsigned int*)(0x424E0604UL))
|
|
#define bFM3_ADC0_ADST01_ST12 *((volatile unsigned int*)(0x424E0608UL))
|
|
#define bFM3_ADC0_ADST01_ST13 *((volatile unsigned int*)(0x424E060CUL))
|
|
#define bFM3_ADC0_ADST01_ST14 *((volatile unsigned int*)(0x424E0610UL))
|
|
#define bFM3_ADC0_ADST01_STX10 *((volatile unsigned int*)(0x424E0614UL))
|
|
#define bFM3_ADC0_ADST01_STX11 *((volatile unsigned int*)(0x424E0618UL))
|
|
#define bFM3_ADC0_ADST01_STX12 *((volatile unsigned int*)(0x424E061CUL))
|
|
#define bFM3_ADC0_ADST01_ST00 *((volatile unsigned int*)(0x424E0620UL))
|
|
#define bFM3_ADC0_ADST01_ST01 *((volatile unsigned int*)(0x424E0624UL))
|
|
#define bFM3_ADC0_ADST01_ST02 *((volatile unsigned int*)(0x424E0628UL))
|
|
#define bFM3_ADC0_ADST01_ST03 *((volatile unsigned int*)(0x424E062CUL))
|
|
#define bFM3_ADC0_ADST01_ST04 *((volatile unsigned int*)(0x424E0630UL))
|
|
#define bFM3_ADC0_ADST01_STX00 *((volatile unsigned int*)(0x424E0634UL))
|
|
#define bFM3_ADC0_ADST01_STX01 *((volatile unsigned int*)(0x424E0638UL))
|
|
#define bFM3_ADC0_ADST01_STX02 *((volatile unsigned int*)(0x424E063CUL))
|
|
#define bFM3_ADC0_ADST1_ST10 *((volatile unsigned int*)(0x424E0600UL))
|
|
#define bFM3_ADC0_ADST1_ST11 *((volatile unsigned int*)(0x424E0604UL))
|
|
#define bFM3_ADC0_ADST1_ST12 *((volatile unsigned int*)(0x424E0608UL))
|
|
#define bFM3_ADC0_ADST1_ST13 *((volatile unsigned int*)(0x424E060CUL))
|
|
#define bFM3_ADC0_ADST1_ST14 *((volatile unsigned int*)(0x424E0610UL))
|
|
#define bFM3_ADC0_ADST1_STX10 *((volatile unsigned int*)(0x424E0614UL))
|
|
#define bFM3_ADC0_ADST1_STX11 *((volatile unsigned int*)(0x424E0618UL))
|
|
#define bFM3_ADC0_ADST1_STX12 *((volatile unsigned int*)(0x424E061CUL))
|
|
#define bFM3_ADC0_ADST0_ST00 *((volatile unsigned int*)(0x424E0620UL))
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#define bFM3_ADC0_ADST0_ST01 *((volatile unsigned int*)(0x424E0624UL))
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#define bFM3_ADC0_ADST0_ST02 *((volatile unsigned int*)(0x424E0628UL))
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#define bFM3_ADC0_ADST0_ST03 *((volatile unsigned int*)(0x424E062CUL))
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#define bFM3_ADC0_ADST0_ST04 *((volatile unsigned int*)(0x424E0630UL))
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#define bFM3_ADC0_ADST0_STX00 *((volatile unsigned int*)(0x424E0634UL))
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#define bFM3_ADC0_ADST0_STX01 *((volatile unsigned int*)(0x424E0638UL))
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#define bFM3_ADC0_ADST0_STX02 *((volatile unsigned int*)(0x424E063CUL))
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#define bFM3_ADC0_ADCT_CT0 *((volatile unsigned int*)(0x424E0680UL))
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#define bFM3_ADC0_ADCT_CT1 *((volatile unsigned int*)(0x424E0684UL))
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#define bFM3_ADC0_ADCT_CT2 *((volatile unsigned int*)(0x424E0688UL))
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#define bFM3_ADC0_ADCT_CT3 *((volatile unsigned int*)(0x424E068CUL))
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#define bFM3_ADC0_ADCT_CT4 *((volatile unsigned int*)(0x424E0690UL))
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#define bFM3_ADC0_ADCT_CT5 *((volatile unsigned int*)(0x424E0694UL))
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#define bFM3_ADC0_ADCT_CT6 *((volatile unsigned int*)(0x424E0698UL))
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#define bFM3_ADC0_ADCT_CT7 *((volatile unsigned int*)(0x424E069CUL))
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#define bFM3_ADC0_PRTSL_PRTSL0 *((volatile unsigned int*)(0x424E0700UL))
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#define bFM3_ADC0_PRTSL_PRTSL1 *((volatile unsigned int*)(0x424E0704UL))
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#define bFM3_ADC0_PRTSL_PRTSL2 *((volatile unsigned int*)(0x424E0708UL))
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#define bFM3_ADC0_PRTSL_PRTSL3 *((volatile unsigned int*)(0x424E070CUL))
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#define bFM3_ADC0_SCTSL_SCTSL0 *((volatile unsigned int*)(0x424E0720UL))
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#define bFM3_ADC0_SCTSL_SCTSL1 *((volatile unsigned int*)(0x424E0724UL))
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#define bFM3_ADC0_SCTSL_SCTSL2 *((volatile unsigned int*)(0x424E0728UL))
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#define bFM3_ADC0_SCTSL_SCTSL3 *((volatile unsigned int*)(0x424E072CUL))
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#define bFM3_ADC0_ADCEN_ENBL *((volatile unsigned int*)(0x424E0780UL))
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#define bFM3_ADC0_ADCEN_READY *((volatile unsigned int*)(0x424E0784UL))
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#define bFM3_ADC0_ADCEN_CYCLSL0 *((volatile unsigned int*)(0x424E0790UL))
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#define bFM3_ADC0_ADCEN_CYCLSL1 *((volatile unsigned int*)(0x424E0794UL))
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/* 12-bit ADC unit 1 registers */
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#define bFM3_ADC1_ADSR_SCS *((volatile unsigned int*)(0x424E2000UL))
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#define bFM3_ADC1_ADSR_PCS *((volatile unsigned int*)(0x424E2004UL))
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#define bFM3_ADC1_ADSR_PCNS *((volatile unsigned int*)(0x424E2008UL))
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#define bFM3_ADC1_ADSR_FDAS *((volatile unsigned int*)(0x424E2018UL))
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#define bFM3_ADC1_ADSR_ADSTP *((volatile unsigned int*)(0x424E201CUL))
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#define bFM3_ADC1_ADCR_OVRIE *((volatile unsigned int*)(0x424E2020UL))
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#define bFM3_ADC1_ADCR_CMPIE *((volatile unsigned int*)(0x424E2024UL))
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#define bFM3_ADC1_ADCR_PCIE *((volatile unsigned int*)(0x424E2028UL))
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#define bFM3_ADC1_ADCR_SCIE *((volatile unsigned int*)(0x424E202CUL))
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#define bFM3_ADC1_ADCR_CMPIF *((volatile unsigned int*)(0x424E2034UL))
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#define bFM3_ADC1_ADCR_PCIF *((volatile unsigned int*)(0x424E2038UL))
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#define bFM3_ADC1_ADCR_SCIF *((volatile unsigned int*)(0x424E203CUL))
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#define bFM3_ADC1_SFNS_SFS0 *((volatile unsigned int*)(0x424E2100UL))
|
|
#define bFM3_ADC1_SFNS_SFS1 *((volatile unsigned int*)(0x424E2104UL))
|
|
#define bFM3_ADC1_SFNS_SFS2 *((volatile unsigned int*)(0x424E2108UL))
|
|
#define bFM3_ADC1_SFNS_SFS3 *((volatile unsigned int*)(0x424E210CUL))
|
|
#define bFM3_ADC1_SCCR_SSTR *((volatile unsigned int*)(0x424E2120UL))
|
|
#define bFM3_ADC1_SCCR_SHEN *((volatile unsigned int*)(0x424E2124UL))
|
|
#define bFM3_ADC1_SCCR_RPT *((volatile unsigned int*)(0x424E2128UL))
|
|
#define bFM3_ADC1_SCCR_SFCLR *((volatile unsigned int*)(0x424E2130UL))
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|
#define bFM3_ADC1_SCCR_SOVR *((volatile unsigned int*)(0x424E2134UL))
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|
#define bFM3_ADC1_SCCR_SFUL *((volatile unsigned int*)(0x424E2138UL))
|
|
#define bFM3_ADC1_SCCR_SEMP *((volatile unsigned int*)(0x424E213CUL))
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|
#define bFM3_ADC1_SCFD_SC0 *((volatile unsigned int*)(0x424E2180UL))
|
|
#define bFM3_ADC1_SCFD_SC1 *((volatile unsigned int*)(0x424E2184UL))
|
|
#define bFM3_ADC1_SCFD_SC2 *((volatile unsigned int*)(0x424E2188UL))
|
|
#define bFM3_ADC1_SCFD_SC3 *((volatile unsigned int*)(0x424E218CUL))
|
|
#define bFM3_ADC1_SCFD_SC4 *((volatile unsigned int*)(0x424E2190UL))
|
|
#define bFM3_ADC1_SCFD_RS0 *((volatile unsigned int*)(0x424E21A0UL))
|
|
#define bFM3_ADC1_SCFD_RS1 *((volatile unsigned int*)(0x424E21A4UL))
|
|
#define bFM3_ADC1_SCFD_INVL *((volatile unsigned int*)(0x424E21B0UL))
|
|
#define bFM3_ADC1_SCFD_SD0 *((volatile unsigned int*)(0x424E21D0UL))
|
|
#define bFM3_ADC1_SCFD_SD1 *((volatile unsigned int*)(0x424E21D4UL))
|
|
#define bFM3_ADC1_SCFD_SD2 *((volatile unsigned int*)(0x424E21D8UL))
|
|
#define bFM3_ADC1_SCFD_SD3 *((volatile unsigned int*)(0x424E21DCUL))
|
|
#define bFM3_ADC1_SCFD_SD4 *((volatile unsigned int*)(0x424E21E0UL))
|
|
#define bFM3_ADC1_SCFD_SD5 *((volatile unsigned int*)(0x424E21E4UL))
|
|
#define bFM3_ADC1_SCFD_SD6 *((volatile unsigned int*)(0x424E21E8UL))
|
|
#define bFM3_ADC1_SCFD_SD7 *((volatile unsigned int*)(0x424E21ECUL))
|
|
#define bFM3_ADC1_SCFD_SD8 *((volatile unsigned int*)(0x424E21F0UL))
|
|
#define bFM3_ADC1_SCFD_SD9 *((volatile unsigned int*)(0x424E21F4UL))
|
|
#define bFM3_ADC1_SCFD_SD10 *((volatile unsigned int*)(0x424E21F8UL))
|
|
#define bFM3_ADC1_SCFD_SD11 *((volatile unsigned int*)(0x424E21FCUL))
|
|
#define bFM3_ADC1_SCFDL_SC0 *((volatile unsigned int*)(0x424E2180UL))
|
|
#define bFM3_ADC1_SCFDL_SC1 *((volatile unsigned int*)(0x424E2184UL))
|
|
#define bFM3_ADC1_SCFDL_SC2 *((volatile unsigned int*)(0x424E2188UL))
|
|
#define bFM3_ADC1_SCFDL_SC3 *((volatile unsigned int*)(0x424E218CUL))
|
|
#define bFM3_ADC1_SCFDL_SC4 *((volatile unsigned int*)(0x424E2190UL))
|
|
#define bFM3_ADC1_SCFDL_RS0 *((volatile unsigned int*)(0x424E21A0UL))
|
|
#define bFM3_ADC1_SCFDL_RS1 *((volatile unsigned int*)(0x424E21A4UL))
|
|
#define bFM3_ADC1_SCFDL_INVL *((volatile unsigned int*)(0x424E21B0UL))
|
|
#define bFM3_ADC1_SCFDH_SD0 *((volatile unsigned int*)(0x424E21D0UL))
|
|
#define bFM3_ADC1_SCFDH_SD1 *((volatile unsigned int*)(0x424E21D4UL))
|
|
#define bFM3_ADC1_SCFDH_SD2 *((volatile unsigned int*)(0x424E21D8UL))
|
|
#define bFM3_ADC1_SCFDH_SD3 *((volatile unsigned int*)(0x424E21DCUL))
|
|
#define bFM3_ADC1_SCFDH_SD4 *((volatile unsigned int*)(0x424E21E0UL))
|
|
#define bFM3_ADC1_SCFDH_SD5 *((volatile unsigned int*)(0x424E21E4UL))
|
|
#define bFM3_ADC1_SCFDH_SD6 *((volatile unsigned int*)(0x424E21E8UL))
|
|
#define bFM3_ADC1_SCFDH_SD7 *((volatile unsigned int*)(0x424E21ECUL))
|
|
#define bFM3_ADC1_SCFDH_SD8 *((volatile unsigned int*)(0x424E21F0UL))
|
|
#define bFM3_ADC1_SCFDH_SD9 *((volatile unsigned int*)(0x424E21F4UL))
|
|
#define bFM3_ADC1_SCFDH_SD10 *((volatile unsigned int*)(0x424E21F8UL))
|
|
#define bFM3_ADC1_SCFDH_SD11 *((volatile unsigned int*)(0x424E21FCUL))
|
|
#define bFM3_ADC1_SCIS23_AN16 *((volatile unsigned int*)(0x424E2200UL))
|
|
#define bFM3_ADC1_SCIS23_AN17 *((volatile unsigned int*)(0x424E2204UL))
|
|
#define bFM3_ADC1_SCIS23_AN18 *((volatile unsigned int*)(0x424E2208UL))
|
|
#define bFM3_ADC1_SCIS23_AN19 *((volatile unsigned int*)(0x424E220CUL))
|
|
#define bFM3_ADC1_SCIS23_AN20 *((volatile unsigned int*)(0x424E2210UL))
|
|
#define bFM3_ADC1_SCIS23_AN21 *((volatile unsigned int*)(0x424E2214UL))
|
|
#define bFM3_ADC1_SCIS23_AN22 *((volatile unsigned int*)(0x424E2218UL))
|
|
#define bFM3_ADC1_SCIS23_AN23 *((volatile unsigned int*)(0x424E221CUL))
|
|
#define bFM3_ADC1_SCIS23_AN24 *((volatile unsigned int*)(0x424E2220UL))
|
|
#define bFM3_ADC1_SCIS23_AN25 *((volatile unsigned int*)(0x424E2224UL))
|
|
#define bFM3_ADC1_SCIS23_AN26 *((volatile unsigned int*)(0x424E2228UL))
|
|
#define bFM3_ADC1_SCIS23_AN27 *((volatile unsigned int*)(0x424E222CUL))
|
|
#define bFM3_ADC1_SCIS23_AN28 *((volatile unsigned int*)(0x424E2230UL))
|
|
#define bFM3_ADC1_SCIS23_AN29 *((volatile unsigned int*)(0x424E2234UL))
|
|
#define bFM3_ADC1_SCIS23_AN30 *((volatile unsigned int*)(0x424E2238UL))
|
|
#define bFM3_ADC1_SCIS23_AN31 *((volatile unsigned int*)(0x424E223CUL))
|
|
#define bFM3_ADC1_SCIS2_AN16 *((volatile unsigned int*)(0x424E2200UL))
|
|
#define bFM3_ADC1_SCIS2_AN17 *((volatile unsigned int*)(0x424E2204UL))
|
|
#define bFM3_ADC1_SCIS2_AN18 *((volatile unsigned int*)(0x424E2208UL))
|
|
#define bFM3_ADC1_SCIS2_AN19 *((volatile unsigned int*)(0x424E220CUL))
|
|
#define bFM3_ADC1_SCIS2_AN20 *((volatile unsigned int*)(0x424E2210UL))
|
|
#define bFM3_ADC1_SCIS2_AN21 *((volatile unsigned int*)(0x424E2214UL))
|
|
#define bFM3_ADC1_SCIS2_AN22 *((volatile unsigned int*)(0x424E2218UL))
|
|
#define bFM3_ADC1_SCIS2_AN23 *((volatile unsigned int*)(0x424E221CUL))
|
|
#define bFM3_ADC1_SCIS3_AN24 *((volatile unsigned int*)(0x424E2220UL))
|
|
#define bFM3_ADC1_SCIS3_AN25 *((volatile unsigned int*)(0x424E2224UL))
|
|
#define bFM3_ADC1_SCIS3_AN26 *((volatile unsigned int*)(0x424E2228UL))
|
|
#define bFM3_ADC1_SCIS3_AN27 *((volatile unsigned int*)(0x424E222CUL))
|
|
#define bFM3_ADC1_SCIS3_AN28 *((volatile unsigned int*)(0x424E2230UL))
|
|
#define bFM3_ADC1_SCIS3_AN29 *((volatile unsigned int*)(0x424E2234UL))
|
|
#define bFM3_ADC1_SCIS3_AN30 *((volatile unsigned int*)(0x424E2238UL))
|
|
#define bFM3_ADC1_SCIS3_AN31 *((volatile unsigned int*)(0x424E223CUL))
|
|
#define bFM3_ADC1_SCIS01_AN0 *((volatile unsigned int*)(0x424E2280UL))
|
|
#define bFM3_ADC1_SCIS01_AN1 *((volatile unsigned int*)(0x424E2284UL))
|
|
#define bFM3_ADC1_SCIS01_AN2 *((volatile unsigned int*)(0x424E2288UL))
|
|
#define bFM3_ADC1_SCIS01_AN3 *((volatile unsigned int*)(0x424E228CUL))
|
|
#define bFM3_ADC1_SCIS01_AN4 *((volatile unsigned int*)(0x424E2290UL))
|
|
#define bFM3_ADC1_SCIS01_AN5 *((volatile unsigned int*)(0x424E2294UL))
|
|
#define bFM3_ADC1_SCIS01_AN6 *((volatile unsigned int*)(0x424E2298UL))
|
|
#define bFM3_ADC1_SCIS01_AN7 *((volatile unsigned int*)(0x424E229CUL))
|
|
#define bFM3_ADC1_SCIS01_AN8 *((volatile unsigned int*)(0x424E22A0UL))
|
|
#define bFM3_ADC1_SCIS01_AN9 *((volatile unsigned int*)(0x424E22A4UL))
|
|
#define bFM3_ADC1_SCIS01_AN10 *((volatile unsigned int*)(0x424E22A8UL))
|
|
#define bFM3_ADC1_SCIS01_AN11 *((volatile unsigned int*)(0x424E22ACUL))
|
|
#define bFM3_ADC1_SCIS01_AN12 *((volatile unsigned int*)(0x424E22B0UL))
|
|
#define bFM3_ADC1_SCIS01_AN13 *((volatile unsigned int*)(0x424E22B4UL))
|
|
#define bFM3_ADC1_SCIS01_AN14 *((volatile unsigned int*)(0x424E22B8UL))
|
|
#define bFM3_ADC1_SCIS01_AN15 *((volatile unsigned int*)(0x424E22BCUL))
|
|
#define bFM3_ADC1_SCIS0_AN0 *((volatile unsigned int*)(0x424E2280UL))
|
|
#define bFM3_ADC1_SCIS0_AN1 *((volatile unsigned int*)(0x424E2284UL))
|
|
#define bFM3_ADC1_SCIS0_AN2 *((volatile unsigned int*)(0x424E2288UL))
|
|
#define bFM3_ADC1_SCIS0_AN3 *((volatile unsigned int*)(0x424E228CUL))
|
|
#define bFM3_ADC1_SCIS0_AN4 *((volatile unsigned int*)(0x424E2290UL))
|
|
#define bFM3_ADC1_SCIS0_AN5 *((volatile unsigned int*)(0x424E2294UL))
|
|
#define bFM3_ADC1_SCIS0_AN6 *((volatile unsigned int*)(0x424E2298UL))
|
|
#define bFM3_ADC1_SCIS0_AN7 *((volatile unsigned int*)(0x424E229CUL))
|
|
#define bFM3_ADC1_SCIS1_AN8 *((volatile unsigned int*)(0x424E22A0UL))
|
|
#define bFM3_ADC1_SCIS1_AN9 *((volatile unsigned int*)(0x424E22A4UL))
|
|
#define bFM3_ADC1_SCIS1_AN10 *((volatile unsigned int*)(0x424E22A8UL))
|
|
#define bFM3_ADC1_SCIS1_AN11 *((volatile unsigned int*)(0x424E22ACUL))
|
|
#define bFM3_ADC1_SCIS1_AN12 *((volatile unsigned int*)(0x424E22B0UL))
|
|
#define bFM3_ADC1_SCIS1_AN13 *((volatile unsigned int*)(0x424E22B4UL))
|
|
#define bFM3_ADC1_SCIS1_AN14 *((volatile unsigned int*)(0x424E22B8UL))
|
|
#define bFM3_ADC1_SCIS1_AN15 *((volatile unsigned int*)(0x424E22BCUL))
|
|
#define bFM3_ADC1_PFNS_PFS0 *((volatile unsigned int*)(0x424E2300UL))
|
|
#define bFM3_ADC1_PFNS_PFS1 *((volatile unsigned int*)(0x424E2304UL))
|
|
#define bFM3_ADC1_PFNS_TEST0 *((volatile unsigned int*)(0x424E2310UL))
|
|
#define bFM3_ADC1_PFNS_TEST1 *((volatile unsigned int*)(0x424E2314UL))
|
|
#define bFM3_ADC1_PCCR_PSTR *((volatile unsigned int*)(0x424E2320UL))
|
|
#define bFM3_ADC1_PCCR_PHEN *((volatile unsigned int*)(0x424E2324UL))
|
|
#define bFM3_ADC1_PCCR_PEEN *((volatile unsigned int*)(0x424E2328UL))
|
|
#define bFM3_ADC1_PCCR_ESCE *((volatile unsigned int*)(0x424E232CUL))
|
|
#define bFM3_ADC1_PCCR_PFCLR *((volatile unsigned int*)(0x424E2330UL))
|
|
#define bFM3_ADC1_PCCR_POVR *((volatile unsigned int*)(0x424E2334UL))
|
|
#define bFM3_ADC1_PCCR_PFUL *((volatile unsigned int*)(0x424E2338UL))
|
|
#define bFM3_ADC1_PCCR_PEMP *((volatile unsigned int*)(0x424E233CUL))
|
|
#define bFM3_ADC1_PCFD_PC0 *((volatile unsigned int*)(0x424E2380UL))
|
|
#define bFM3_ADC1_PCFD_PC1 *((volatile unsigned int*)(0x424E2384UL))
|
|
#define bFM3_ADC1_PCFD_PC2 *((volatile unsigned int*)(0x424E2388UL))
|
|
#define bFM3_ADC1_PCFD_PC3 *((volatile unsigned int*)(0x424E238CUL))
|
|
#define bFM3_ADC1_PCFD_PC4 *((volatile unsigned int*)(0x424E2390UL))
|
|
#define bFM3_ADC1_PCFD_RS0 *((volatile unsigned int*)(0x424E23A0UL))
|
|
#define bFM3_ADC1_PCFD_RS1 *((volatile unsigned int*)(0x424E23A4UL))
|
|
#define bFM3_ADC1_PCFD_RS2 *((volatile unsigned int*)(0x424E23A8UL))
|
|
#define bFM3_ADC1_PCFD_INVL *((volatile unsigned int*)(0x424E23B0UL))
|
|
#define bFM3_ADC1_PCFD_PD0 *((volatile unsigned int*)(0x424E23D0UL))
|
|
#define bFM3_ADC1_PCFD_PD1 *((volatile unsigned int*)(0x424E23D4UL))
|
|
#define bFM3_ADC1_PCFD_PD2 *((volatile unsigned int*)(0x424E23D8UL))
|
|
#define bFM3_ADC1_PCFD_PD3 *((volatile unsigned int*)(0x424E23DCUL))
|
|
#define bFM3_ADC1_PCFD_PD4 *((volatile unsigned int*)(0x424E23E0UL))
|
|
#define bFM3_ADC1_PCFD_PD5 *((volatile unsigned int*)(0x424E23E4UL))
|
|
#define bFM3_ADC1_PCFD_PD6 *((volatile unsigned int*)(0x424E23E8UL))
|
|
#define bFM3_ADC1_PCFD_PD7 *((volatile unsigned int*)(0x424E23ECUL))
|
|
#define bFM3_ADC1_PCFD_PD8 *((volatile unsigned int*)(0x424E23F0UL))
|
|
#define bFM3_ADC1_PCFD_PD9 *((volatile unsigned int*)(0x424E23F4UL))
|
|
#define bFM3_ADC1_PCFD_PD10 *((volatile unsigned int*)(0x424E23F8UL))
|
|
#define bFM3_ADC1_PCFD_PD11 *((volatile unsigned int*)(0x424E23FCUL))
|
|
#define bFM3_ADC1_PCFDL_PC0 *((volatile unsigned int*)(0x424E2380UL))
|
|
#define bFM3_ADC1_PCFDL_PC1 *((volatile unsigned int*)(0x424E2384UL))
|
|
#define bFM3_ADC1_PCFDL_PC2 *((volatile unsigned int*)(0x424E2388UL))
|
|
#define bFM3_ADC1_PCFDL_PC3 *((volatile unsigned int*)(0x424E238CUL))
|
|
#define bFM3_ADC1_PCFDL_PC4 *((volatile unsigned int*)(0x424E2390UL))
|
|
#define bFM3_ADC1_PCFDL_RS0 *((volatile unsigned int*)(0x424E23A0UL))
|
|
#define bFM3_ADC1_PCFDL_RS1 *((volatile unsigned int*)(0x424E23A4UL))
|
|
#define bFM3_ADC1_PCFDL_RS2 *((volatile unsigned int*)(0x424E23A8UL))
|
|
#define bFM3_ADC1_PCFDL_INVL *((volatile unsigned int*)(0x424E23B0UL))
|
|
#define bFM3_ADC1_PCFDH_PD0 *((volatile unsigned int*)(0x424E23D0UL))
|
|
#define bFM3_ADC1_PCFDH_PD1 *((volatile unsigned int*)(0x424E23D4UL))
|
|
#define bFM3_ADC1_PCFDH_PD2 *((volatile unsigned int*)(0x424E23D8UL))
|
|
#define bFM3_ADC1_PCFDH_PD3 *((volatile unsigned int*)(0x424E23DCUL))
|
|
#define bFM3_ADC1_PCFDH_PD4 *((volatile unsigned int*)(0x424E23E0UL))
|
|
#define bFM3_ADC1_PCFDH_PD5 *((volatile unsigned int*)(0x424E23E4UL))
|
|
#define bFM3_ADC1_PCFDH_PD6 *((volatile unsigned int*)(0x424E23E8UL))
|
|
#define bFM3_ADC1_PCFDH_PD7 *((volatile unsigned int*)(0x424E23ECUL))
|
|
#define bFM3_ADC1_PCFDH_PD8 *((volatile unsigned int*)(0x424E23F0UL))
|
|
#define bFM3_ADC1_PCFDH_PD9 *((volatile unsigned int*)(0x424E23F4UL))
|
|
#define bFM3_ADC1_PCFDH_PD10 *((volatile unsigned int*)(0x424E23F8UL))
|
|
#define bFM3_ADC1_PCFDH_PD11 *((volatile unsigned int*)(0x424E23FCUL))
|
|
#define bFM3_ADC1_PCIS_P1A0 *((volatile unsigned int*)(0x424E2400UL))
|
|
#define bFM3_ADC1_PCIS_P1A1 *((volatile unsigned int*)(0x424E2404UL))
|
|
#define bFM3_ADC1_PCIS_P1A2 *((volatile unsigned int*)(0x424E2408UL))
|
|
#define bFM3_ADC1_PCIS_P2A0 *((volatile unsigned int*)(0x424E240CUL))
|
|
#define bFM3_ADC1_PCIS_P2A1 *((volatile unsigned int*)(0x424E2410UL))
|
|
#define bFM3_ADC1_PCIS_P2A2 *((volatile unsigned int*)(0x424E2414UL))
|
|
#define bFM3_ADC1_PCIS_P2A3 *((volatile unsigned int*)(0x424E2418UL))
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#define bFM3_ADC1_PCIS_P2A4 *((volatile unsigned int*)(0x424E241CUL))
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#define bFM3_ADC1_CMPCR_CCH0 *((volatile unsigned int*)(0x424E2480UL))
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#define bFM3_ADC1_CMPCR_CCH1 *((volatile unsigned int*)(0x424E2484UL))
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#define bFM3_ADC1_CMPCR_CCH2 *((volatile unsigned int*)(0x424E2488UL))
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#define bFM3_ADC1_CMPCR_CCH3 *((volatile unsigned int*)(0x424E248CUL))
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#define bFM3_ADC1_CMPCR_CCH4 *((volatile unsigned int*)(0x424E2490UL))
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#define bFM3_ADC1_CMPCR_CMD0 *((volatile unsigned int*)(0x424E2494UL))
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#define bFM3_ADC1_CMPCR_CMD1 *((volatile unsigned int*)(0x424E2498UL))
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#define bFM3_ADC1_CMPCR_CMPEN *((volatile unsigned int*)(0x424E249CUL))
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#define bFM3_ADC1_CMPD_CMAD2 *((volatile unsigned int*)(0x424E24D8UL))
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#define bFM3_ADC1_CMPD_CMAD3 *((volatile unsigned int*)(0x424E24DCUL))
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#define bFM3_ADC1_CMPD_CMAD4 *((volatile unsigned int*)(0x424E24E0UL))
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#define bFM3_ADC1_CMPD_CMAD5 *((volatile unsigned int*)(0x424E24E4UL))
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#define bFM3_ADC1_CMPD_CMAD6 *((volatile unsigned int*)(0x424E24E8UL))
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#define bFM3_ADC1_CMPD_CMAD7 *((volatile unsigned int*)(0x424E24ECUL))
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#define bFM3_ADC1_CMPD_CMAD8 *((volatile unsigned int*)(0x424E24F0UL))
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#define bFM3_ADC1_CMPD_CMAD9 *((volatile unsigned int*)(0x424E24F4UL))
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#define bFM3_ADC1_CMPD_CMAD10 *((volatile unsigned int*)(0x424E24F8UL))
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#define bFM3_ADC1_CMPD_CMAD11 *((volatile unsigned int*)(0x424E24FCUL))
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#define bFM3_ADC1_ADSS23_TS16 *((volatile unsigned int*)(0x424E2500UL))
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#define bFM3_ADC1_ADSS23_TS17 *((volatile unsigned int*)(0x424E2504UL))
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#define bFM3_ADC1_ADSS23_TS18 *((volatile unsigned int*)(0x424E2508UL))
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#define bFM3_ADC1_ADSS23_TS19 *((volatile unsigned int*)(0x424E250CUL))
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#define bFM3_ADC1_ADSS23_TS20 *((volatile unsigned int*)(0x424E2510UL))
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#define bFM3_ADC1_ADSS23_TS21 *((volatile unsigned int*)(0x424E2514UL))
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#define bFM3_ADC1_ADSS23_TS22 *((volatile unsigned int*)(0x424E2518UL))
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#define bFM3_ADC1_ADSS23_TS23 *((volatile unsigned int*)(0x424E251CUL))
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#define bFM3_ADC1_ADSS23_TS24 *((volatile unsigned int*)(0x424E2520UL))
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#define bFM3_ADC1_ADSS23_TS25 *((volatile unsigned int*)(0x424E2524UL))
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#define bFM3_ADC1_ADSS23_TS26 *((volatile unsigned int*)(0x424E2528UL))
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#define bFM3_ADC1_ADSS23_TS27 *((volatile unsigned int*)(0x424E252CUL))
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#define bFM3_ADC1_ADSS23_TS28 *((volatile unsigned int*)(0x424E2530UL))
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#define bFM3_ADC1_ADSS23_TS29 *((volatile unsigned int*)(0x424E2534UL))
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#define bFM3_ADC1_ADSS23_TS30 *((volatile unsigned int*)(0x424E2538UL))
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#define bFM3_ADC1_ADSS23_TS31 *((volatile unsigned int*)(0x424E253CUL))
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#define bFM3_ADC1_ADSS2_TS16 *((volatile unsigned int*)(0x424E2500UL))
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#define bFM3_ADC1_ADSS2_TS17 *((volatile unsigned int*)(0x424E2504UL))
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#define bFM3_ADC1_ADSS2_TS18 *((volatile unsigned int*)(0x424E2508UL))
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#define bFM3_ADC1_ADSS2_TS19 *((volatile unsigned int*)(0x424E250CUL))
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#define bFM3_ADC1_ADSS2_TS20 *((volatile unsigned int*)(0x424E2510UL))
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#define bFM3_ADC1_ADSS2_TS21 *((volatile unsigned int*)(0x424E2514UL))
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#define bFM3_ADC1_ADSS2_TS22 *((volatile unsigned int*)(0x424E2518UL))
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#define bFM3_ADC1_ADSS2_TS23 *((volatile unsigned int*)(0x424E251CUL))
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#define bFM3_ADC1_ADSS3_TS24 *((volatile unsigned int*)(0x424E2520UL))
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#define bFM3_ADC1_ADSS3_TS25 *((volatile unsigned int*)(0x424E2524UL))
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#define bFM3_ADC1_ADSS3_TS26 *((volatile unsigned int*)(0x424E2528UL))
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#define bFM3_ADC1_ADSS3_TS27 *((volatile unsigned int*)(0x424E252CUL))
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#define bFM3_ADC1_ADSS3_TS28 *((volatile unsigned int*)(0x424E2530UL))
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#define bFM3_ADC1_ADSS3_TS29 *((volatile unsigned int*)(0x424E2534UL))
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#define bFM3_ADC1_ADSS3_TS30 *((volatile unsigned int*)(0x424E2538UL))
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#define bFM3_ADC1_ADSS3_TS31 *((volatile unsigned int*)(0x424E253CUL))
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#define bFM3_ADC1_ADSS01_TS0 *((volatile unsigned int*)(0x424E2580UL))
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#define bFM3_ADC1_ADSS01_TS1 *((volatile unsigned int*)(0x424E2584UL))
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#define bFM3_ADC1_ADSS01_TS2 *((volatile unsigned int*)(0x424E2588UL))
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#define bFM3_ADC1_ADSS01_TS3 *((volatile unsigned int*)(0x424E258CUL))
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|
#define bFM3_ADC1_ADSS01_TS4 *((volatile unsigned int*)(0x424E2590UL))
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|
#define bFM3_ADC1_ADSS01_TS5 *((volatile unsigned int*)(0x424E2594UL))
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|
#define bFM3_ADC1_ADSS01_TS6 *((volatile unsigned int*)(0x424E2598UL))
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|
#define bFM3_ADC1_ADSS01_TS7 *((volatile unsigned int*)(0x424E259CUL))
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|
#define bFM3_ADC1_ADSS01_TS8 *((volatile unsigned int*)(0x424E25A0UL))
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|
#define bFM3_ADC1_ADSS01_TS9 *((volatile unsigned int*)(0x424E25A4UL))
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|
#define bFM3_ADC1_ADSS01_TS10 *((volatile unsigned int*)(0x424E25A8UL))
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|
#define bFM3_ADC1_ADSS01_TS11 *((volatile unsigned int*)(0x424E25ACUL))
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|
#define bFM3_ADC1_ADSS01_TS12 *((volatile unsigned int*)(0x424E25B0UL))
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|
#define bFM3_ADC1_ADSS01_TS13 *((volatile unsigned int*)(0x424E25B4UL))
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|
#define bFM3_ADC1_ADSS01_TS14 *((volatile unsigned int*)(0x424E25B8UL))
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|
#define bFM3_ADC1_ADSS01_TS15 *((volatile unsigned int*)(0x424E25BCUL))
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|
#define bFM3_ADC1_ADSS0_TS0 *((volatile unsigned int*)(0x424E2580UL))
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|
#define bFM3_ADC1_ADSS0_TS1 *((volatile unsigned int*)(0x424E2584UL))
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|
#define bFM3_ADC1_ADSS0_TS2 *((volatile unsigned int*)(0x424E2588UL))
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|
#define bFM3_ADC1_ADSS0_TS3 *((volatile unsigned int*)(0x424E258CUL))
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|
#define bFM3_ADC1_ADSS0_TS4 *((volatile unsigned int*)(0x424E2590UL))
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|
#define bFM3_ADC1_ADSS0_TS5 *((volatile unsigned int*)(0x424E2594UL))
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|
#define bFM3_ADC1_ADSS0_TS6 *((volatile unsigned int*)(0x424E2598UL))
|
|
#define bFM3_ADC1_ADSS0_TS7 *((volatile unsigned int*)(0x424E259CUL))
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|
#define bFM3_ADC1_ADSS1_TS8 *((volatile unsigned int*)(0x424E25A0UL))
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|
#define bFM3_ADC1_ADSS1_TS9 *((volatile unsigned int*)(0x424E25A4UL))
|
|
#define bFM3_ADC1_ADSS1_TS10 *((volatile unsigned int*)(0x424E25A8UL))
|
|
#define bFM3_ADC1_ADSS1_TS11 *((volatile unsigned int*)(0x424E25ACUL))
|
|
#define bFM3_ADC1_ADSS1_TS12 *((volatile unsigned int*)(0x424E25B0UL))
|
|
#define bFM3_ADC1_ADSS1_TS13 *((volatile unsigned int*)(0x424E25B4UL))
|
|
#define bFM3_ADC1_ADSS1_TS14 *((volatile unsigned int*)(0x424E25B8UL))
|
|
#define bFM3_ADC1_ADSS1_TS15 *((volatile unsigned int*)(0x424E25BCUL))
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|
#define bFM3_ADC1_ADST01_ST10 *((volatile unsigned int*)(0x424E2600UL))
|
|
#define bFM3_ADC1_ADST01_ST11 *((volatile unsigned int*)(0x424E2604UL))
|
|
#define bFM3_ADC1_ADST01_ST12 *((volatile unsigned int*)(0x424E2608UL))
|
|
#define bFM3_ADC1_ADST01_ST13 *((volatile unsigned int*)(0x424E260CUL))
|
|
#define bFM3_ADC1_ADST01_ST14 *((volatile unsigned int*)(0x424E2610UL))
|
|
#define bFM3_ADC1_ADST01_STX10 *((volatile unsigned int*)(0x424E2614UL))
|
|
#define bFM3_ADC1_ADST01_STX11 *((volatile unsigned int*)(0x424E2618UL))
|
|
#define bFM3_ADC1_ADST01_STX12 *((volatile unsigned int*)(0x424E261CUL))
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|
#define bFM3_ADC1_ADST01_ST00 *((volatile unsigned int*)(0x424E2620UL))
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|
#define bFM3_ADC1_ADST01_ST01 *((volatile unsigned int*)(0x424E2624UL))
|
|
#define bFM3_ADC1_ADST01_ST02 *((volatile unsigned int*)(0x424E2628UL))
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|
#define bFM3_ADC1_ADST01_ST03 *((volatile unsigned int*)(0x424E262CUL))
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|
#define bFM3_ADC1_ADST01_ST04 *((volatile unsigned int*)(0x424E2630UL))
|
|
#define bFM3_ADC1_ADST01_STX00 *((volatile unsigned int*)(0x424E2634UL))
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|
#define bFM3_ADC1_ADST01_STX01 *((volatile unsigned int*)(0x424E2638UL))
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|
#define bFM3_ADC1_ADST01_STX02 *((volatile unsigned int*)(0x424E263CUL))
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|
#define bFM3_ADC1_ADST1_ST10 *((volatile unsigned int*)(0x424E2600UL))
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|
#define bFM3_ADC1_ADST1_ST11 *((volatile unsigned int*)(0x424E2604UL))
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|
#define bFM3_ADC1_ADST1_ST12 *((volatile unsigned int*)(0x424E2608UL))
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|
#define bFM3_ADC1_ADST1_ST13 *((volatile unsigned int*)(0x424E260CUL))
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|
#define bFM3_ADC1_ADST1_ST14 *((volatile unsigned int*)(0x424E2610UL))
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|
#define bFM3_ADC1_ADST1_STX10 *((volatile unsigned int*)(0x424E2614UL))
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|
#define bFM3_ADC1_ADST1_STX11 *((volatile unsigned int*)(0x424E2618UL))
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|
#define bFM3_ADC1_ADST1_STX12 *((volatile unsigned int*)(0x424E261CUL))
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#define bFM3_ADC1_ADST0_ST00 *((volatile unsigned int*)(0x424E2620UL))
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|
#define bFM3_ADC1_ADST0_ST01 *((volatile unsigned int*)(0x424E2624UL))
|
|
#define bFM3_ADC1_ADST0_ST02 *((volatile unsigned int*)(0x424E2628UL))
|
|
#define bFM3_ADC1_ADST0_ST03 *((volatile unsigned int*)(0x424E262CUL))
|
|
#define bFM3_ADC1_ADST0_ST04 *((volatile unsigned int*)(0x424E2630UL))
|
|
#define bFM3_ADC1_ADST0_STX00 *((volatile unsigned int*)(0x424E2634UL))
|
|
#define bFM3_ADC1_ADST0_STX01 *((volatile unsigned int*)(0x424E2638UL))
|
|
#define bFM3_ADC1_ADST0_STX02 *((volatile unsigned int*)(0x424E263CUL))
|
|
#define bFM3_ADC1_ADCT_CT0 *((volatile unsigned int*)(0x424E2680UL))
|
|
#define bFM3_ADC1_ADCT_CT1 *((volatile unsigned int*)(0x424E2684UL))
|
|
#define bFM3_ADC1_ADCT_CT2 *((volatile unsigned int*)(0x424E2688UL))
|
|
#define bFM3_ADC1_ADCT_CT3 *((volatile unsigned int*)(0x424E268CUL))
|
|
#define bFM3_ADC1_ADCT_CT4 *((volatile unsigned int*)(0x424E2690UL))
|
|
#define bFM3_ADC1_ADCT_CT5 *((volatile unsigned int*)(0x424E2694UL))
|
|
#define bFM3_ADC1_ADCT_CT6 *((volatile unsigned int*)(0x424E2698UL))
|
|
#define bFM3_ADC1_ADCT_CT7 *((volatile unsigned int*)(0x424E269CUL))
|
|
#define bFM3_ADC1_PRTSL_PRTSL0 *((volatile unsigned int*)(0x424E2700UL))
|
|
#define bFM3_ADC1_PRTSL_PRTSL1 *((volatile unsigned int*)(0x424E2704UL))
|
|
#define bFM3_ADC1_PRTSL_PRTSL2 *((volatile unsigned int*)(0x424E2708UL))
|
|
#define bFM3_ADC1_PRTSL_PRTSL3 *((volatile unsigned int*)(0x424E270CUL))
|
|
#define bFM3_ADC1_SCTSL_SCTSL0 *((volatile unsigned int*)(0x424E2720UL))
|
|
#define bFM3_ADC1_SCTSL_SCTSL1 *((volatile unsigned int*)(0x424E2724UL))
|
|
#define bFM3_ADC1_SCTSL_SCTSL2 *((volatile unsigned int*)(0x424E2728UL))
|
|
#define bFM3_ADC1_SCTSL_SCTSL3 *((volatile unsigned int*)(0x424E272CUL))
|
|
#define bFM3_ADC1_ADCEN_ENBL *((volatile unsigned int*)(0x424E2780UL))
|
|
#define bFM3_ADC1_ADCEN_READY *((volatile unsigned int*)(0x424E2784UL))
|
|
#define bFM3_ADC1_ADCEN_CYCLSL0 *((volatile unsigned int*)(0x424E2790UL))
|
|
#define bFM3_ADC1_ADCEN_CYCLSL1 *((volatile unsigned int*)(0x424E2794UL))
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|
|
|
/* 12-bit ADC unit 2 registers */
|
|
#define bFM3_ADC2_ADSR_SCS *((volatile unsigned int*)(0x424E4000UL))
|
|
#define bFM3_ADC2_ADSR_PCS *((volatile unsigned int*)(0x424E4004UL))
|
|
#define bFM3_ADC2_ADSR_PCNS *((volatile unsigned int*)(0x424E4008UL))
|
|
#define bFM3_ADC2_ADSR_FDAS *((volatile unsigned int*)(0x424E4018UL))
|
|
#define bFM3_ADC2_ADSR_ADSTP *((volatile unsigned int*)(0x424E401CUL))
|
|
#define bFM3_ADC2_ADCR_OVRIE *((volatile unsigned int*)(0x424E4020UL))
|
|
#define bFM3_ADC2_ADCR_CMPIE *((volatile unsigned int*)(0x424E4024UL))
|
|
#define bFM3_ADC2_ADCR_PCIE *((volatile unsigned int*)(0x424E4028UL))
|
|
#define bFM3_ADC2_ADCR_SCIE *((volatile unsigned int*)(0x424E402CUL))
|
|
#define bFM3_ADC2_ADCR_CMPIF *((volatile unsigned int*)(0x424E4034UL))
|
|
#define bFM3_ADC2_ADCR_PCIF *((volatile unsigned int*)(0x424E4038UL))
|
|
#define bFM3_ADC2_ADCR_SCIF *((volatile unsigned int*)(0x424E403CUL))
|
|
#define bFM3_ADC2_SFNS_SFS0 *((volatile unsigned int*)(0x424E4100UL))
|
|
#define bFM3_ADC2_SFNS_SFS1 *((volatile unsigned int*)(0x424E4104UL))
|
|
#define bFM3_ADC2_SFNS_SFS2 *((volatile unsigned int*)(0x424E4108UL))
|
|
#define bFM3_ADC2_SFNS_SFS3 *((volatile unsigned int*)(0x424E410CUL))
|
|
#define bFM3_ADC2_SCCR_SSTR *((volatile unsigned int*)(0x424E4120UL))
|
|
#define bFM3_ADC2_SCCR_SHEN *((volatile unsigned int*)(0x424E4124UL))
|
|
#define bFM3_ADC2_SCCR_RPT *((volatile unsigned int*)(0x424E4128UL))
|
|
#define bFM3_ADC2_SCCR_SFCLR *((volatile unsigned int*)(0x424E4130UL))
|
|
#define bFM3_ADC2_SCCR_SOVR *((volatile unsigned int*)(0x424E4134UL))
|
|
#define bFM3_ADC2_SCCR_SFUL *((volatile unsigned int*)(0x424E4138UL))
|
|
#define bFM3_ADC2_SCCR_SEMP *((volatile unsigned int*)(0x424E413CUL))
|
|
#define bFM3_ADC2_SCFD_SC0 *((volatile unsigned int*)(0x424E4180UL))
|
|
#define bFM3_ADC2_SCFD_SC1 *((volatile unsigned int*)(0x424E4184UL))
|
|
#define bFM3_ADC2_SCFD_SC2 *((volatile unsigned int*)(0x424E4188UL))
|
|
#define bFM3_ADC2_SCFD_SC3 *((volatile unsigned int*)(0x424E418CUL))
|
|
#define bFM3_ADC2_SCFD_SC4 *((volatile unsigned int*)(0x424E4190UL))
|
|
#define bFM3_ADC2_SCFD_RS0 *((volatile unsigned int*)(0x424E41A0UL))
|
|
#define bFM3_ADC2_SCFD_RS1 *((volatile unsigned int*)(0x424E41A4UL))
|
|
#define bFM3_ADC2_SCFD_INVL *((volatile unsigned int*)(0x424E41B0UL))
|
|
#define bFM3_ADC2_SCFD_SD0 *((volatile unsigned int*)(0x424E41D0UL))
|
|
#define bFM3_ADC2_SCFD_SD1 *((volatile unsigned int*)(0x424E41D4UL))
|
|
#define bFM3_ADC2_SCFD_SD2 *((volatile unsigned int*)(0x424E41D8UL))
|
|
#define bFM3_ADC2_SCFD_SD3 *((volatile unsigned int*)(0x424E41DCUL))
|
|
#define bFM3_ADC2_SCFD_SD4 *((volatile unsigned int*)(0x424E41E0UL))
|
|
#define bFM3_ADC2_SCFD_SD5 *((volatile unsigned int*)(0x424E41E4UL))
|
|
#define bFM3_ADC2_SCFD_SD6 *((volatile unsigned int*)(0x424E41E8UL))
|
|
#define bFM3_ADC2_SCFD_SD7 *((volatile unsigned int*)(0x424E41ECUL))
|
|
#define bFM3_ADC2_SCFD_SD8 *((volatile unsigned int*)(0x424E41F0UL))
|
|
#define bFM3_ADC2_SCFD_SD9 *((volatile unsigned int*)(0x424E41F4UL))
|
|
#define bFM3_ADC2_SCFD_SD10 *((volatile unsigned int*)(0x424E41F8UL))
|
|
#define bFM3_ADC2_SCFD_SD11 *((volatile unsigned int*)(0x424E41FCUL))
|
|
#define bFM3_ADC2_SCFDL_SC0 *((volatile unsigned int*)(0x424E4180UL))
|
|
#define bFM3_ADC2_SCFDL_SC1 *((volatile unsigned int*)(0x424E4184UL))
|
|
#define bFM3_ADC2_SCFDL_SC2 *((volatile unsigned int*)(0x424E4188UL))
|
|
#define bFM3_ADC2_SCFDL_SC3 *((volatile unsigned int*)(0x424E418CUL))
|
|
#define bFM3_ADC2_SCFDL_SC4 *((volatile unsigned int*)(0x424E4190UL))
|
|
#define bFM3_ADC2_SCFDL_RS0 *((volatile unsigned int*)(0x424E41A0UL))
|
|
#define bFM3_ADC2_SCFDL_RS1 *((volatile unsigned int*)(0x424E41A4UL))
|
|
#define bFM3_ADC2_SCFDL_INVL *((volatile unsigned int*)(0x424E41B0UL))
|
|
#define bFM3_ADC2_SCFDH_SD0 *((volatile unsigned int*)(0x424E41D0UL))
|
|
#define bFM3_ADC2_SCFDH_SD1 *((volatile unsigned int*)(0x424E41D4UL))
|
|
#define bFM3_ADC2_SCFDH_SD2 *((volatile unsigned int*)(0x424E41D8UL))
|
|
#define bFM3_ADC2_SCFDH_SD3 *((volatile unsigned int*)(0x424E41DCUL))
|
|
#define bFM3_ADC2_SCFDH_SD4 *((volatile unsigned int*)(0x424E41E0UL))
|
|
#define bFM3_ADC2_SCFDH_SD5 *((volatile unsigned int*)(0x424E41E4UL))
|
|
#define bFM3_ADC2_SCFDH_SD6 *((volatile unsigned int*)(0x424E41E8UL))
|
|
#define bFM3_ADC2_SCFDH_SD7 *((volatile unsigned int*)(0x424E41ECUL))
|
|
#define bFM3_ADC2_SCFDH_SD8 *((volatile unsigned int*)(0x424E41F0UL))
|
|
#define bFM3_ADC2_SCFDH_SD9 *((volatile unsigned int*)(0x424E41F4UL))
|
|
#define bFM3_ADC2_SCFDH_SD10 *((volatile unsigned int*)(0x424E41F8UL))
|
|
#define bFM3_ADC2_SCFDH_SD11 *((volatile unsigned int*)(0x424E41FCUL))
|
|
#define bFM3_ADC2_SCIS23_AN16 *((volatile unsigned int*)(0x424E4200UL))
|
|
#define bFM3_ADC2_SCIS23_AN17 *((volatile unsigned int*)(0x424E4204UL))
|
|
#define bFM3_ADC2_SCIS23_AN18 *((volatile unsigned int*)(0x424E4208UL))
|
|
#define bFM3_ADC2_SCIS23_AN19 *((volatile unsigned int*)(0x424E420CUL))
|
|
#define bFM3_ADC2_SCIS23_AN20 *((volatile unsigned int*)(0x424E4210UL))
|
|
#define bFM3_ADC2_SCIS23_AN21 *((volatile unsigned int*)(0x424E4214UL))
|
|
#define bFM3_ADC2_SCIS23_AN22 *((volatile unsigned int*)(0x424E4218UL))
|
|
#define bFM3_ADC2_SCIS23_AN23 *((volatile unsigned int*)(0x424E421CUL))
|
|
#define bFM3_ADC2_SCIS23_AN24 *((volatile unsigned int*)(0x424E4220UL))
|
|
#define bFM3_ADC2_SCIS23_AN25 *((volatile unsigned int*)(0x424E4224UL))
|
|
#define bFM3_ADC2_SCIS23_AN26 *((volatile unsigned int*)(0x424E4228UL))
|
|
#define bFM3_ADC2_SCIS23_AN27 *((volatile unsigned int*)(0x424E422CUL))
|
|
#define bFM3_ADC2_SCIS23_AN28 *((volatile unsigned int*)(0x424E4230UL))
|
|
#define bFM3_ADC2_SCIS23_AN29 *((volatile unsigned int*)(0x424E4234UL))
|
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#define bFM3_ADC2_SCIS23_AN30 *((volatile unsigned int*)(0x424E4238UL))
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#define bFM3_ADC2_SCIS23_AN31 *((volatile unsigned int*)(0x424E423CUL))
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#define bFM3_ADC2_SCIS2_AN16 *((volatile unsigned int*)(0x424E4200UL))
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#define bFM3_ADC2_SCIS2_AN17 *((volatile unsigned int*)(0x424E4204UL))
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#define bFM3_ADC2_SCIS2_AN18 *((volatile unsigned int*)(0x424E4208UL))
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#define bFM3_ADC2_SCIS2_AN19 *((volatile unsigned int*)(0x424E420CUL))
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#define bFM3_ADC2_SCIS2_AN20 *((volatile unsigned int*)(0x424E4210UL))
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#define bFM3_ADC2_SCIS2_AN21 *((volatile unsigned int*)(0x424E4214UL))
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#define bFM3_ADC2_SCIS2_AN22 *((volatile unsigned int*)(0x424E4218UL))
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#define bFM3_ADC2_SCIS2_AN23 *((volatile unsigned int*)(0x424E421CUL))
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#define bFM3_ADC2_SCIS3_AN24 *((volatile unsigned int*)(0x424E4220UL))
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#define bFM3_ADC2_SCIS3_AN25 *((volatile unsigned int*)(0x424E4224UL))
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#define bFM3_ADC2_SCIS3_AN26 *((volatile unsigned int*)(0x424E4228UL))
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#define bFM3_ADC2_SCIS3_AN27 *((volatile unsigned int*)(0x424E422CUL))
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#define bFM3_ADC2_SCIS3_AN28 *((volatile unsigned int*)(0x424E4230UL))
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#define bFM3_ADC2_SCIS3_AN29 *((volatile unsigned int*)(0x424E4234UL))
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#define bFM3_ADC2_SCIS3_AN30 *((volatile unsigned int*)(0x424E4238UL))
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#define bFM3_ADC2_SCIS3_AN31 *((volatile unsigned int*)(0x424E423CUL))
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#define bFM3_ADC2_SCIS01_AN0 *((volatile unsigned int*)(0x424E4280UL))
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#define bFM3_ADC2_SCIS01_AN1 *((volatile unsigned int*)(0x424E4284UL))
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#define bFM3_ADC2_SCIS01_AN2 *((volatile unsigned int*)(0x424E4288UL))
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#define bFM3_ADC2_SCIS01_AN3 *((volatile unsigned int*)(0x424E428CUL))
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#define bFM3_ADC2_SCIS01_AN4 *((volatile unsigned int*)(0x424E4290UL))
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#define bFM3_ADC2_SCIS01_AN5 *((volatile unsigned int*)(0x424E4294UL))
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#define bFM3_ADC2_SCIS01_AN6 *((volatile unsigned int*)(0x424E4298UL))
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#define bFM3_ADC2_SCIS01_AN7 *((volatile unsigned int*)(0x424E429CUL))
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#define bFM3_ADC2_SCIS01_AN8 *((volatile unsigned int*)(0x424E42A0UL))
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#define bFM3_ADC2_SCIS01_AN9 *((volatile unsigned int*)(0x424E42A4UL))
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#define bFM3_ADC2_SCIS01_AN10 *((volatile unsigned int*)(0x424E42A8UL))
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#define bFM3_ADC2_SCIS01_AN11 *((volatile unsigned int*)(0x424E42ACUL))
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#define bFM3_ADC2_SCIS01_AN12 *((volatile unsigned int*)(0x424E42B0UL))
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#define bFM3_ADC2_SCIS01_AN13 *((volatile unsigned int*)(0x424E42B4UL))
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#define bFM3_ADC2_SCIS01_AN14 *((volatile unsigned int*)(0x424E42B8UL))
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#define bFM3_ADC2_SCIS01_AN15 *((volatile unsigned int*)(0x424E42BCUL))
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#define bFM3_ADC2_SCIS0_AN0 *((volatile unsigned int*)(0x424E4280UL))
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#define bFM3_ADC2_SCIS0_AN1 *((volatile unsigned int*)(0x424E4284UL))
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#define bFM3_ADC2_SCIS0_AN2 *((volatile unsigned int*)(0x424E4288UL))
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#define bFM3_ADC2_SCIS0_AN3 *((volatile unsigned int*)(0x424E428CUL))
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#define bFM3_ADC2_SCIS0_AN4 *((volatile unsigned int*)(0x424E4290UL))
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#define bFM3_ADC2_SCIS0_AN5 *((volatile unsigned int*)(0x424E4294UL))
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#define bFM3_ADC2_SCIS0_AN6 *((volatile unsigned int*)(0x424E4298UL))
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#define bFM3_ADC2_SCIS0_AN7 *((volatile unsigned int*)(0x424E429CUL))
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#define bFM3_ADC2_SCIS1_AN8 *((volatile unsigned int*)(0x424E42A0UL))
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#define bFM3_ADC2_SCIS1_AN9 *((volatile unsigned int*)(0x424E42A4UL))
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#define bFM3_ADC2_SCIS1_AN10 *((volatile unsigned int*)(0x424E42A8UL))
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#define bFM3_ADC2_SCIS1_AN11 *((volatile unsigned int*)(0x424E42ACUL))
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#define bFM3_ADC2_SCIS1_AN12 *((volatile unsigned int*)(0x424E42B0UL))
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#define bFM3_ADC2_SCIS1_AN13 *((volatile unsigned int*)(0x424E42B4UL))
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#define bFM3_ADC2_SCIS1_AN14 *((volatile unsigned int*)(0x424E42B8UL))
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#define bFM3_ADC2_SCIS1_AN15 *((volatile unsigned int*)(0x424E42BCUL))
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#define bFM3_ADC2_PFNS_PFS0 *((volatile unsigned int*)(0x424E4300UL))
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#define bFM3_ADC2_PFNS_PFS1 *((volatile unsigned int*)(0x424E4304UL))
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#define bFM3_ADC2_PFNS_TEST0 *((volatile unsigned int*)(0x424E4310UL))
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#define bFM3_ADC2_PFNS_TEST1 *((volatile unsigned int*)(0x424E4314UL))
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#define bFM3_ADC2_PCCR_PSTR *((volatile unsigned int*)(0x424E4320UL))
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#define bFM3_ADC2_PCCR_PHEN *((volatile unsigned int*)(0x424E4324UL))
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#define bFM3_ADC2_PCCR_PEEN *((volatile unsigned int*)(0x424E4328UL))
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#define bFM3_ADC2_PCCR_ESCE *((volatile unsigned int*)(0x424E432CUL))
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#define bFM3_ADC2_PCCR_PFCLR *((volatile unsigned int*)(0x424E4330UL))
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#define bFM3_ADC2_PCCR_POVR *((volatile unsigned int*)(0x424E4334UL))
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|
#define bFM3_ADC2_PCCR_PFUL *((volatile unsigned int*)(0x424E4338UL))
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#define bFM3_ADC2_PCCR_PEMP *((volatile unsigned int*)(0x424E433CUL))
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|
#define bFM3_ADC2_PCFD_PC0 *((volatile unsigned int*)(0x424E4380UL))
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#define bFM3_ADC2_PCFD_PC1 *((volatile unsigned int*)(0x424E4384UL))
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#define bFM3_ADC2_PCFD_PC2 *((volatile unsigned int*)(0x424E4388UL))
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#define bFM3_ADC2_PCFD_PC3 *((volatile unsigned int*)(0x424E438CUL))
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#define bFM3_ADC2_PCFD_PC4 *((volatile unsigned int*)(0x424E4390UL))
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#define bFM3_ADC2_PCFD_RS0 *((volatile unsigned int*)(0x424E43A0UL))
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#define bFM3_ADC2_PCFD_RS1 *((volatile unsigned int*)(0x424E43A4UL))
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|
#define bFM3_ADC2_PCFD_RS2 *((volatile unsigned int*)(0x424E43A8UL))
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#define bFM3_ADC2_PCFD_INVL *((volatile unsigned int*)(0x424E43B0UL))
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#define bFM3_ADC2_PCFD_PD0 *((volatile unsigned int*)(0x424E43D0UL))
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|
#define bFM3_ADC2_PCFD_PD1 *((volatile unsigned int*)(0x424E43D4UL))
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|
#define bFM3_ADC2_PCFD_PD2 *((volatile unsigned int*)(0x424E43D8UL))
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|
#define bFM3_ADC2_PCFD_PD3 *((volatile unsigned int*)(0x424E43DCUL))
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|
#define bFM3_ADC2_PCFD_PD4 *((volatile unsigned int*)(0x424E43E0UL))
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|
#define bFM3_ADC2_PCFD_PD5 *((volatile unsigned int*)(0x424E43E4UL))
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|
#define bFM3_ADC2_PCFD_PD6 *((volatile unsigned int*)(0x424E43E8UL))
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|
#define bFM3_ADC2_PCFD_PD7 *((volatile unsigned int*)(0x424E43ECUL))
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|
#define bFM3_ADC2_PCFD_PD8 *((volatile unsigned int*)(0x424E43F0UL))
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|
#define bFM3_ADC2_PCFD_PD9 *((volatile unsigned int*)(0x424E43F4UL))
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|
#define bFM3_ADC2_PCFD_PD10 *((volatile unsigned int*)(0x424E43F8UL))
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|
#define bFM3_ADC2_PCFD_PD11 *((volatile unsigned int*)(0x424E43FCUL))
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|
#define bFM3_ADC2_PCFDL_PC0 *((volatile unsigned int*)(0x424E4380UL))
|
|
#define bFM3_ADC2_PCFDL_PC1 *((volatile unsigned int*)(0x424E4384UL))
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|
#define bFM3_ADC2_PCFDL_PC2 *((volatile unsigned int*)(0x424E4388UL))
|
|
#define bFM3_ADC2_PCFDL_PC3 *((volatile unsigned int*)(0x424E438CUL))
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|
#define bFM3_ADC2_PCFDL_PC4 *((volatile unsigned int*)(0x424E4390UL))
|
|
#define bFM3_ADC2_PCFDL_RS0 *((volatile unsigned int*)(0x424E43A0UL))
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|
#define bFM3_ADC2_PCFDL_RS1 *((volatile unsigned int*)(0x424E43A4UL))
|
|
#define bFM3_ADC2_PCFDL_RS2 *((volatile unsigned int*)(0x424E43A8UL))
|
|
#define bFM3_ADC2_PCFDL_INVL *((volatile unsigned int*)(0x424E43B0UL))
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|
#define bFM3_ADC2_PCFDH_PD0 *((volatile unsigned int*)(0x424E43D0UL))
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|
#define bFM3_ADC2_PCFDH_PD1 *((volatile unsigned int*)(0x424E43D4UL))
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|
#define bFM3_ADC2_PCFDH_PD2 *((volatile unsigned int*)(0x424E43D8UL))
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|
#define bFM3_ADC2_PCFDH_PD3 *((volatile unsigned int*)(0x424E43DCUL))
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|
#define bFM3_ADC2_PCFDH_PD4 *((volatile unsigned int*)(0x424E43E0UL))
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|
#define bFM3_ADC2_PCFDH_PD5 *((volatile unsigned int*)(0x424E43E4UL))
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|
#define bFM3_ADC2_PCFDH_PD6 *((volatile unsigned int*)(0x424E43E8UL))
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|
#define bFM3_ADC2_PCFDH_PD7 *((volatile unsigned int*)(0x424E43ECUL))
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#define bFM3_ADC2_PCFDH_PD8 *((volatile unsigned int*)(0x424E43F0UL))
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|
#define bFM3_ADC2_PCFDH_PD9 *((volatile unsigned int*)(0x424E43F4UL))
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|
#define bFM3_ADC2_PCFDH_PD10 *((volatile unsigned int*)(0x424E43F8UL))
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#define bFM3_ADC2_PCFDH_PD11 *((volatile unsigned int*)(0x424E43FCUL))
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#define bFM3_ADC2_PCIS_P1A0 *((volatile unsigned int*)(0x424E4400UL))
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#define bFM3_ADC2_PCIS_P1A1 *((volatile unsigned int*)(0x424E4404UL))
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|
#define bFM3_ADC2_PCIS_P1A2 *((volatile unsigned int*)(0x424E4408UL))
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#define bFM3_ADC2_PCIS_P2A0 *((volatile unsigned int*)(0x424E440CUL))
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|
#define bFM3_ADC2_PCIS_P2A1 *((volatile unsigned int*)(0x424E4410UL))
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|
#define bFM3_ADC2_PCIS_P2A2 *((volatile unsigned int*)(0x424E4414UL))
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|
#define bFM3_ADC2_PCIS_P2A3 *((volatile unsigned int*)(0x424E4418UL))
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|
#define bFM3_ADC2_PCIS_P2A4 *((volatile unsigned int*)(0x424E441CUL))
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|
#define bFM3_ADC2_CMPCR_CCH0 *((volatile unsigned int*)(0x424E4480UL))
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|
#define bFM3_ADC2_CMPCR_CCH1 *((volatile unsigned int*)(0x424E4484UL))
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|
#define bFM3_ADC2_CMPCR_CCH2 *((volatile unsigned int*)(0x424E4488UL))
|
|
#define bFM3_ADC2_CMPCR_CCH3 *((volatile unsigned int*)(0x424E448CUL))
|
|
#define bFM3_ADC2_CMPCR_CCH4 *((volatile unsigned int*)(0x424E4490UL))
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|
#define bFM3_ADC2_CMPCR_CMD0 *((volatile unsigned int*)(0x424E4494UL))
|
|
#define bFM3_ADC2_CMPCR_CMD1 *((volatile unsigned int*)(0x424E4498UL))
|
|
#define bFM3_ADC2_CMPCR_CMPEN *((volatile unsigned int*)(0x424E449CUL))
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|
#define bFM3_ADC2_CMPD_CMAD2 *((volatile unsigned int*)(0x424E44D8UL))
|
|
#define bFM3_ADC2_CMPD_CMAD3 *((volatile unsigned int*)(0x424E44DCUL))
|
|
#define bFM3_ADC2_CMPD_CMAD4 *((volatile unsigned int*)(0x424E44E0UL))
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|
#define bFM3_ADC2_CMPD_CMAD5 *((volatile unsigned int*)(0x424E44E4UL))
|
|
#define bFM3_ADC2_CMPD_CMAD6 *((volatile unsigned int*)(0x424E44E8UL))
|
|
#define bFM3_ADC2_CMPD_CMAD7 *((volatile unsigned int*)(0x424E44ECUL))
|
|
#define bFM3_ADC2_CMPD_CMAD8 *((volatile unsigned int*)(0x424E44F0UL))
|
|
#define bFM3_ADC2_CMPD_CMAD9 *((volatile unsigned int*)(0x424E44F4UL))
|
|
#define bFM3_ADC2_CMPD_CMAD10 *((volatile unsigned int*)(0x424E44F8UL))
|
|
#define bFM3_ADC2_CMPD_CMAD11 *((volatile unsigned int*)(0x424E44FCUL))
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|
#define bFM3_ADC2_ADSS23_TS16 *((volatile unsigned int*)(0x424E4500UL))
|
|
#define bFM3_ADC2_ADSS23_TS17 *((volatile unsigned int*)(0x424E4504UL))
|
|
#define bFM3_ADC2_ADSS23_TS18 *((volatile unsigned int*)(0x424E4508UL))
|
|
#define bFM3_ADC2_ADSS23_TS19 *((volatile unsigned int*)(0x424E450CUL))
|
|
#define bFM3_ADC2_ADSS23_TS20 *((volatile unsigned int*)(0x424E4510UL))
|
|
#define bFM3_ADC2_ADSS23_TS21 *((volatile unsigned int*)(0x424E4514UL))
|
|
#define bFM3_ADC2_ADSS23_TS22 *((volatile unsigned int*)(0x424E4518UL))
|
|
#define bFM3_ADC2_ADSS23_TS23 *((volatile unsigned int*)(0x424E451CUL))
|
|
#define bFM3_ADC2_ADSS23_TS24 *((volatile unsigned int*)(0x424E4520UL))
|
|
#define bFM3_ADC2_ADSS23_TS25 *((volatile unsigned int*)(0x424E4524UL))
|
|
#define bFM3_ADC2_ADSS23_TS26 *((volatile unsigned int*)(0x424E4528UL))
|
|
#define bFM3_ADC2_ADSS23_TS27 *((volatile unsigned int*)(0x424E452CUL))
|
|
#define bFM3_ADC2_ADSS23_TS28 *((volatile unsigned int*)(0x424E4530UL))
|
|
#define bFM3_ADC2_ADSS23_TS29 *((volatile unsigned int*)(0x424E4534UL))
|
|
#define bFM3_ADC2_ADSS23_TS30 *((volatile unsigned int*)(0x424E4538UL))
|
|
#define bFM3_ADC2_ADSS23_TS31 *((volatile unsigned int*)(0x424E453CUL))
|
|
#define bFM3_ADC2_ADSS2_TS16 *((volatile unsigned int*)(0x424E4500UL))
|
|
#define bFM3_ADC2_ADSS2_TS17 *((volatile unsigned int*)(0x424E4504UL))
|
|
#define bFM3_ADC2_ADSS2_TS18 *((volatile unsigned int*)(0x424E4508UL))
|
|
#define bFM3_ADC2_ADSS2_TS19 *((volatile unsigned int*)(0x424E450CUL))
|
|
#define bFM3_ADC2_ADSS2_TS20 *((volatile unsigned int*)(0x424E4510UL))
|
|
#define bFM3_ADC2_ADSS2_TS21 *((volatile unsigned int*)(0x424E4514UL))
|
|
#define bFM3_ADC2_ADSS2_TS22 *((volatile unsigned int*)(0x424E4518UL))
|
|
#define bFM3_ADC2_ADSS2_TS23 *((volatile unsigned int*)(0x424E451CUL))
|
|
#define bFM3_ADC2_ADSS3_TS24 *((volatile unsigned int*)(0x424E4520UL))
|
|
#define bFM3_ADC2_ADSS3_TS25 *((volatile unsigned int*)(0x424E4524UL))
|
|
#define bFM3_ADC2_ADSS3_TS26 *((volatile unsigned int*)(0x424E4528UL))
|
|
#define bFM3_ADC2_ADSS3_TS27 *((volatile unsigned int*)(0x424E452CUL))
|
|
#define bFM3_ADC2_ADSS3_TS28 *((volatile unsigned int*)(0x424E4530UL))
|
|
#define bFM3_ADC2_ADSS3_TS29 *((volatile unsigned int*)(0x424E4534UL))
|
|
#define bFM3_ADC2_ADSS3_TS30 *((volatile unsigned int*)(0x424E4538UL))
|
|
#define bFM3_ADC2_ADSS3_TS31 *((volatile unsigned int*)(0x424E453CUL))
|
|
#define bFM3_ADC2_ADSS01_TS0 *((volatile unsigned int*)(0x424E4580UL))
|
|
#define bFM3_ADC2_ADSS01_TS1 *((volatile unsigned int*)(0x424E4584UL))
|
|
#define bFM3_ADC2_ADSS01_TS2 *((volatile unsigned int*)(0x424E4588UL))
|
|
#define bFM3_ADC2_ADSS01_TS3 *((volatile unsigned int*)(0x424E458CUL))
|
|
#define bFM3_ADC2_ADSS01_TS4 *((volatile unsigned int*)(0x424E4590UL))
|
|
#define bFM3_ADC2_ADSS01_TS5 *((volatile unsigned int*)(0x424E4594UL))
|
|
#define bFM3_ADC2_ADSS01_TS6 *((volatile unsigned int*)(0x424E4598UL))
|
|
#define bFM3_ADC2_ADSS01_TS7 *((volatile unsigned int*)(0x424E459CUL))
|
|
#define bFM3_ADC2_ADSS01_TS8 *((volatile unsigned int*)(0x424E45A0UL))
|
|
#define bFM3_ADC2_ADSS01_TS9 *((volatile unsigned int*)(0x424E45A4UL))
|
|
#define bFM3_ADC2_ADSS01_TS10 *((volatile unsigned int*)(0x424E45A8UL))
|
|
#define bFM3_ADC2_ADSS01_TS11 *((volatile unsigned int*)(0x424E45ACUL))
|
|
#define bFM3_ADC2_ADSS01_TS12 *((volatile unsigned int*)(0x424E45B0UL))
|
|
#define bFM3_ADC2_ADSS01_TS13 *((volatile unsigned int*)(0x424E45B4UL))
|
|
#define bFM3_ADC2_ADSS01_TS14 *((volatile unsigned int*)(0x424E45B8UL))
|
|
#define bFM3_ADC2_ADSS01_TS15 *((volatile unsigned int*)(0x424E45BCUL))
|
|
#define bFM3_ADC2_ADSS0_TS0 *((volatile unsigned int*)(0x424E4580UL))
|
|
#define bFM3_ADC2_ADSS0_TS1 *((volatile unsigned int*)(0x424E4584UL))
|
|
#define bFM3_ADC2_ADSS0_TS2 *((volatile unsigned int*)(0x424E4588UL))
|
|
#define bFM3_ADC2_ADSS0_TS3 *((volatile unsigned int*)(0x424E458CUL))
|
|
#define bFM3_ADC2_ADSS0_TS4 *((volatile unsigned int*)(0x424E4590UL))
|
|
#define bFM3_ADC2_ADSS0_TS5 *((volatile unsigned int*)(0x424E4594UL))
|
|
#define bFM3_ADC2_ADSS0_TS6 *((volatile unsigned int*)(0x424E4598UL))
|
|
#define bFM3_ADC2_ADSS0_TS7 *((volatile unsigned int*)(0x424E459CUL))
|
|
#define bFM3_ADC2_ADSS1_TS8 *((volatile unsigned int*)(0x424E45A0UL))
|
|
#define bFM3_ADC2_ADSS1_TS9 *((volatile unsigned int*)(0x424E45A4UL))
|
|
#define bFM3_ADC2_ADSS1_TS10 *((volatile unsigned int*)(0x424E45A8UL))
|
|
#define bFM3_ADC2_ADSS1_TS11 *((volatile unsigned int*)(0x424E45ACUL))
|
|
#define bFM3_ADC2_ADSS1_TS12 *((volatile unsigned int*)(0x424E45B0UL))
|
|
#define bFM3_ADC2_ADSS1_TS13 *((volatile unsigned int*)(0x424E45B4UL))
|
|
#define bFM3_ADC2_ADSS1_TS14 *((volatile unsigned int*)(0x424E45B8UL))
|
|
#define bFM3_ADC2_ADSS1_TS15 *((volatile unsigned int*)(0x424E45BCUL))
|
|
#define bFM3_ADC2_ADST01_ST10 *((volatile unsigned int*)(0x424E4600UL))
|
|
#define bFM3_ADC2_ADST01_ST11 *((volatile unsigned int*)(0x424E4604UL))
|
|
#define bFM3_ADC2_ADST01_ST12 *((volatile unsigned int*)(0x424E4608UL))
|
|
#define bFM3_ADC2_ADST01_ST13 *((volatile unsigned int*)(0x424E460CUL))
|
|
#define bFM3_ADC2_ADST01_ST14 *((volatile unsigned int*)(0x424E4610UL))
|
|
#define bFM3_ADC2_ADST01_STX10 *((volatile unsigned int*)(0x424E4614UL))
|
|
#define bFM3_ADC2_ADST01_STX11 *((volatile unsigned int*)(0x424E4618UL))
|
|
#define bFM3_ADC2_ADST01_STX12 *((volatile unsigned int*)(0x424E461CUL))
|
|
#define bFM3_ADC2_ADST01_ST00 *((volatile unsigned int*)(0x424E4620UL))
|
|
#define bFM3_ADC2_ADST01_ST01 *((volatile unsigned int*)(0x424E4624UL))
|
|
#define bFM3_ADC2_ADST01_ST02 *((volatile unsigned int*)(0x424E4628UL))
|
|
#define bFM3_ADC2_ADST01_ST03 *((volatile unsigned int*)(0x424E462CUL))
|
|
#define bFM3_ADC2_ADST01_ST04 *((volatile unsigned int*)(0x424E4630UL))
|
|
#define bFM3_ADC2_ADST01_STX00 *((volatile unsigned int*)(0x424E4634UL))
|
|
#define bFM3_ADC2_ADST01_STX01 *((volatile unsigned int*)(0x424E4638UL))
|
|
#define bFM3_ADC2_ADST01_STX02 *((volatile unsigned int*)(0x424E463CUL))
|
|
#define bFM3_ADC2_ADST1_ST10 *((volatile unsigned int*)(0x424E4600UL))
|
|
#define bFM3_ADC2_ADST1_ST11 *((volatile unsigned int*)(0x424E4604UL))
|
|
#define bFM3_ADC2_ADST1_ST12 *((volatile unsigned int*)(0x424E4608UL))
|
|
#define bFM3_ADC2_ADST1_ST13 *((volatile unsigned int*)(0x424E460CUL))
|
|
#define bFM3_ADC2_ADST1_ST14 *((volatile unsigned int*)(0x424E4610UL))
|
|
#define bFM3_ADC2_ADST1_STX10 *((volatile unsigned int*)(0x424E4614UL))
|
|
#define bFM3_ADC2_ADST1_STX11 *((volatile unsigned int*)(0x424E4618UL))
|
|
#define bFM3_ADC2_ADST1_STX12 *((volatile unsigned int*)(0x424E461CUL))
|
|
#define bFM3_ADC2_ADST0_ST00 *((volatile unsigned int*)(0x424E4620UL))
|
|
#define bFM3_ADC2_ADST0_ST01 *((volatile unsigned int*)(0x424E4624UL))
|
|
#define bFM3_ADC2_ADST0_ST02 *((volatile unsigned int*)(0x424E4628UL))
|
|
#define bFM3_ADC2_ADST0_ST03 *((volatile unsigned int*)(0x424E462CUL))
|
|
#define bFM3_ADC2_ADST0_ST04 *((volatile unsigned int*)(0x424E4630UL))
|
|
#define bFM3_ADC2_ADST0_STX00 *((volatile unsigned int*)(0x424E4634UL))
|
|
#define bFM3_ADC2_ADST0_STX01 *((volatile unsigned int*)(0x424E4638UL))
|
|
#define bFM3_ADC2_ADST0_STX02 *((volatile unsigned int*)(0x424E463CUL))
|
|
#define bFM3_ADC2_ADCT_CT0 *((volatile unsigned int*)(0x424E4680UL))
|
|
#define bFM3_ADC2_ADCT_CT1 *((volatile unsigned int*)(0x424E4684UL))
|
|
#define bFM3_ADC2_ADCT_CT2 *((volatile unsigned int*)(0x424E4688UL))
|
|
#define bFM3_ADC2_ADCT_CT3 *((volatile unsigned int*)(0x424E468CUL))
|
|
#define bFM3_ADC2_ADCT_CT4 *((volatile unsigned int*)(0x424E4690UL))
|
|
#define bFM3_ADC2_ADCT_CT5 *((volatile unsigned int*)(0x424E4694UL))
|
|
#define bFM3_ADC2_ADCT_CT6 *((volatile unsigned int*)(0x424E4698UL))
|
|
#define bFM3_ADC2_ADCT_CT7 *((volatile unsigned int*)(0x424E469CUL))
|
|
#define bFM3_ADC2_PRTSL_PRTSL0 *((volatile unsigned int*)(0x424E4700UL))
|
|
#define bFM3_ADC2_PRTSL_PRTSL1 *((volatile unsigned int*)(0x424E4704UL))
|
|
#define bFM3_ADC2_PRTSL_PRTSL2 *((volatile unsigned int*)(0x424E4708UL))
|
|
#define bFM3_ADC2_PRTSL_PRTSL3 *((volatile unsigned int*)(0x424E470CUL))
|
|
#define bFM3_ADC2_SCTSL_SCTSL0 *((volatile unsigned int*)(0x424E4720UL))
|
|
#define bFM3_ADC2_SCTSL_SCTSL1 *((volatile unsigned int*)(0x424E4724UL))
|
|
#define bFM3_ADC2_SCTSL_SCTSL2 *((volatile unsigned int*)(0x424E4728UL))
|
|
#define bFM3_ADC2_SCTSL_SCTSL3 *((volatile unsigned int*)(0x424E472CUL))
|
|
#define bFM3_ADC2_ADCEN_ENBL *((volatile unsigned int*)(0x424E4780UL))
|
|
#define bFM3_ADC2_ADCEN_READY *((volatile unsigned int*)(0x424E4784UL))
|
|
#define bFM3_ADC2_ADCEN_CYCLSL0 *((volatile unsigned int*)(0x424E4790UL))
|
|
#define bFM3_ADC2_ADCEN_CYCLSL1 *((volatile unsigned int*)(0x424E4794UL))
|
|
|
|
/* CR trimming registers */
|
|
#define bFM3_CRTRIM_MCR_PSR_CSR0 *((volatile unsigned int*)(0x425C0000UL))
|
|
#define bFM3_CRTRIM_MCR_PSR_CSR1 *((volatile unsigned int*)(0x425C0004UL))
|
|
#define bFM3_CRTRIM_MCR_FTRM_TRD0 *((volatile unsigned int*)(0x425C0080UL))
|
|
#define bFM3_CRTRIM_MCR_FTRM_TRD1 *((volatile unsigned int*)(0x425C0084UL))
|
|
#define bFM3_CRTRIM_MCR_FTRM_TRD2 *((volatile unsigned int*)(0x425C0088UL))
|
|
#define bFM3_CRTRIM_MCR_FTRM_TRD3 *((volatile unsigned int*)(0x425C008CUL))
|
|
#define bFM3_CRTRIM_MCR_FTRM_TRD4 *((volatile unsigned int*)(0x425C0090UL))
|
|
#define bFM3_CRTRIM_MCR_FTRM_TRD5 *((volatile unsigned int*)(0x425C0094UL))
|
|
#define bFM3_CRTRIM_MCR_FTRM_TRD6 *((volatile unsigned int*)(0x425C0098UL))
|
|
#define bFM3_CRTRIM_MCR_FTRM_TRD7 *((volatile unsigned int*)(0x425C009CUL))
|
|
|
|
/* External interrupt registers */
|
|
#define bFM3_EXTI_ENIR_EN0 *((volatile unsigned int*)(0x42600000UL))
|
|
#define bFM3_EXTI_ENIR_EN1 *((volatile unsigned int*)(0x42600004UL))
|
|
#define bFM3_EXTI_ENIR_EN2 *((volatile unsigned int*)(0x42600008UL))
|
|
#define bFM3_EXTI_ENIR_EN3 *((volatile unsigned int*)(0x4260000CUL))
|
|
#define bFM3_EXTI_ENIR_EN4 *((volatile unsigned int*)(0x42600010UL))
|
|
#define bFM3_EXTI_ENIR_EN5 *((volatile unsigned int*)(0x42600014UL))
|
|
#define bFM3_EXTI_ENIR_EN6 *((volatile unsigned int*)(0x42600018UL))
|
|
#define bFM3_EXTI_ENIR_EN7 *((volatile unsigned int*)(0x4260001CUL))
|
|
#define bFM3_EXTI_ENIR_EN8 *((volatile unsigned int*)(0x42600020UL))
|
|
#define bFM3_EXTI_ENIR_EN9 *((volatile unsigned int*)(0x42600024UL))
|
|
#define bFM3_EXTI_ENIR_EN10 *((volatile unsigned int*)(0x42600028UL))
|
|
#define bFM3_EXTI_ENIR_EN11 *((volatile unsigned int*)(0x4260002CUL))
|
|
#define bFM3_EXTI_ENIR_EN12 *((volatile unsigned int*)(0x42600030UL))
|
|
#define bFM3_EXTI_ENIR_EN13 *((volatile unsigned int*)(0x42600034UL))
|
|
#define bFM3_EXTI_ENIR_EN14 *((volatile unsigned int*)(0x42600038UL))
|
|
#define bFM3_EXTI_ENIR_EN15 *((volatile unsigned int*)(0x4260003CUL))
|
|
#define bFM3_EXTI_ENIR_EN16 *((volatile unsigned int*)(0x42600040UL))
|
|
#define bFM3_EXTI_ENIR_EN17 *((volatile unsigned int*)(0x42600044UL))
|
|
#define bFM3_EXTI_ENIR_EN18 *((volatile unsigned int*)(0x42600048UL))
|
|
#define bFM3_EXTI_ENIR_EN19 *((volatile unsigned int*)(0x4260004CUL))
|
|
#define bFM3_EXTI_ENIR_EN20 *((volatile unsigned int*)(0x42600050UL))
|
|
#define bFM3_EXTI_ENIR_EN21 *((volatile unsigned int*)(0x42600054UL))
|
|
#define bFM3_EXTI_ENIR_EN22 *((volatile unsigned int*)(0x42600058UL))
|
|
#define bFM3_EXTI_ENIR_EN23 *((volatile unsigned int*)(0x4260005CUL))
|
|
#define bFM3_EXTI_ENIR_EN24 *((volatile unsigned int*)(0x42600060UL))
|
|
#define bFM3_EXTI_ENIR_EN25 *((volatile unsigned int*)(0x42600064UL))
|
|
#define bFM3_EXTI_ENIR_EN26 *((volatile unsigned int*)(0x42600068UL))
|
|
#define bFM3_EXTI_ENIR_EN27 *((volatile unsigned int*)(0x4260006CUL))
|
|
#define bFM3_EXTI_ENIR_EN28 *((volatile unsigned int*)(0x42600070UL))
|
|
#define bFM3_EXTI_ENIR_EN29 *((volatile unsigned int*)(0x42600074UL))
|
|
#define bFM3_EXTI_ENIR_EN30 *((volatile unsigned int*)(0x42600078UL))
|
|
#define bFM3_EXTI_ENIR_EN31 *((volatile unsigned int*)(0x4260007CUL))
|
|
#define bFM3_EXTI_EIRR_ER0 *((volatile unsigned int*)(0x42600080UL))
|
|
#define bFM3_EXTI_EIRR_ER1 *((volatile unsigned int*)(0x42600084UL))
|
|
#define bFM3_EXTI_EIRR_ER2 *((volatile unsigned int*)(0x42600088UL))
|
|
#define bFM3_EXTI_EIRR_ER3 *((volatile unsigned int*)(0x4260008CUL))
|
|
#define bFM3_EXTI_EIRR_ER4 *((volatile unsigned int*)(0x42600090UL))
|
|
#define bFM3_EXTI_EIRR_ER5 *((volatile unsigned int*)(0x42600094UL))
|
|
#define bFM3_EXTI_EIRR_ER6 *((volatile unsigned int*)(0x42600098UL))
|
|
#define bFM3_EXTI_EIRR_ER7 *((volatile unsigned int*)(0x4260009CUL))
|
|
#define bFM3_EXTI_EIRR_ER8 *((volatile unsigned int*)(0x426000A0UL))
|
|
#define bFM3_EXTI_EIRR_ER9 *((volatile unsigned int*)(0x426000A4UL))
|
|
#define bFM3_EXTI_EIRR_ER10 *((volatile unsigned int*)(0x426000A8UL))
|
|
#define bFM3_EXTI_EIRR_ER11 *((volatile unsigned int*)(0x426000ACUL))
|
|
#define bFM3_EXTI_EIRR_ER12 *((volatile unsigned int*)(0x426000B0UL))
|
|
#define bFM3_EXTI_EIRR_ER13 *((volatile unsigned int*)(0x426000B4UL))
|
|
#define bFM3_EXTI_EIRR_ER14 *((volatile unsigned int*)(0x426000B8UL))
|
|
#define bFM3_EXTI_EIRR_ER15 *((volatile unsigned int*)(0x426000BCUL))
|
|
#define bFM3_EXTI_EIRR_ER16 *((volatile unsigned int*)(0x426000C0UL))
|
|
#define bFM3_EXTI_EIRR_ER17 *((volatile unsigned int*)(0x426000C4UL))
|
|
#define bFM3_EXTI_EIRR_ER18 *((volatile unsigned int*)(0x426000C8UL))
|
|
#define bFM3_EXTI_EIRR_ER19 *((volatile unsigned int*)(0x426000CCUL))
|
|
#define bFM3_EXTI_EIRR_ER20 *((volatile unsigned int*)(0x426000D0UL))
|
|
#define bFM3_EXTI_EIRR_ER21 *((volatile unsigned int*)(0x426000D4UL))
|
|
#define bFM3_EXTI_EIRR_ER22 *((volatile unsigned int*)(0x426000D8UL))
|
|
#define bFM3_EXTI_EIRR_ER23 *((volatile unsigned int*)(0x426000DCUL))
|
|
#define bFM3_EXTI_EIRR_ER24 *((volatile unsigned int*)(0x426000E0UL))
|
|
#define bFM3_EXTI_EIRR_ER25 *((volatile unsigned int*)(0x426000E4UL))
|
|
#define bFM3_EXTI_EIRR_ER26 *((volatile unsigned int*)(0x426000E8UL))
|
|
#define bFM3_EXTI_EIRR_ER27 *((volatile unsigned int*)(0x426000ECUL))
|
|
#define bFM3_EXTI_EIRR_ER28 *((volatile unsigned int*)(0x426000F0UL))
|
|
#define bFM3_EXTI_EIRR_ER29 *((volatile unsigned int*)(0x426000F4UL))
|
|
#define bFM3_EXTI_EIRR_ER30 *((volatile unsigned int*)(0x426000F8UL))
|
|
#define bFM3_EXTI_EIRR_ER31 *((volatile unsigned int*)(0x426000FCUL))
|
|
#define bFM3_EXTI_EICL_ECL0 *((volatile unsigned int*)(0x42600100UL))
|
|
#define bFM3_EXTI_EICL_ECL1 *((volatile unsigned int*)(0x42600104UL))
|
|
#define bFM3_EXTI_EICL_ECL2 *((volatile unsigned int*)(0x42600108UL))
|
|
#define bFM3_EXTI_EICL_ECL3 *((volatile unsigned int*)(0x4260010CUL))
|
|
#define bFM3_EXTI_EICL_ECL4 *((volatile unsigned int*)(0x42600110UL))
|
|
#define bFM3_EXTI_EICL_ECL5 *((volatile unsigned int*)(0x42600114UL))
|
|
#define bFM3_EXTI_EICL_ECL6 *((volatile unsigned int*)(0x42600118UL))
|
|
#define bFM3_EXTI_EICL_ECL7 *((volatile unsigned int*)(0x4260011CUL))
|
|
#define bFM3_EXTI_EICL_ECL8 *((volatile unsigned int*)(0x42600120UL))
|
|
#define bFM3_EXTI_EICL_ECL9 *((volatile unsigned int*)(0x42600124UL))
|
|
#define bFM3_EXTI_EICL_ECL10 *((volatile unsigned int*)(0x42600128UL))
|
|
#define bFM3_EXTI_EICL_ECL11 *((volatile unsigned int*)(0x4260012CUL))
|
|
#define bFM3_EXTI_EICL_ECL12 *((volatile unsigned int*)(0x42600130UL))
|
|
#define bFM3_EXTI_EICL_ECL13 *((volatile unsigned int*)(0x42600134UL))
|
|
#define bFM3_EXTI_EICL_ECL14 *((volatile unsigned int*)(0x42600138UL))
|
|
#define bFM3_EXTI_EICL_ECL15 *((volatile unsigned int*)(0x4260013CUL))
|
|
#define bFM3_EXTI_EICL_ECL16 *((volatile unsigned int*)(0x42600140UL))
|
|
#define bFM3_EXTI_EICL_ECL17 *((volatile unsigned int*)(0x42600144UL))
|
|
#define bFM3_EXTI_EICL_ECL18 *((volatile unsigned int*)(0x42600148UL))
|
|
#define bFM3_EXTI_EICL_ECL19 *((volatile unsigned int*)(0x4260014CUL))
|
|
#define bFM3_EXTI_EICL_ECL20 *((volatile unsigned int*)(0x42600150UL))
|
|
#define bFM3_EXTI_EICL_ECL21 *((volatile unsigned int*)(0x42600154UL))
|
|
#define bFM3_EXTI_EICL_ECL22 *((volatile unsigned int*)(0x42600158UL))
|
|
#define bFM3_EXTI_EICL_ECL23 *((volatile unsigned int*)(0x4260015CUL))
|
|
#define bFM3_EXTI_EICL_ECL24 *((volatile unsigned int*)(0x42600160UL))
|
|
#define bFM3_EXTI_EICL_ECL25 *((volatile unsigned int*)(0x42600164UL))
|
|
#define bFM3_EXTI_EICL_ECL26 *((volatile unsigned int*)(0x42600168UL))
|
|
#define bFM3_EXTI_EICL_ECL27 *((volatile unsigned int*)(0x4260016CUL))
|
|
#define bFM3_EXTI_EICL_ECL28 *((volatile unsigned int*)(0x42600170UL))
|
|
#define bFM3_EXTI_EICL_ECL29 *((volatile unsigned int*)(0x42600174UL))
|
|
#define bFM3_EXTI_EICL_ECL30 *((volatile unsigned int*)(0x42600178UL))
|
|
#define bFM3_EXTI_EICL_ECL31 *((volatile unsigned int*)(0x4260017CUL))
|
|
#define bFM3_EXTI_ELVR_LA0 *((volatile unsigned int*)(0x42600180UL))
|
|
#define bFM3_EXTI_ELVR_LB0 *((volatile unsigned int*)(0x42600184UL))
|
|
#define bFM3_EXTI_ELVR_LA1 *((volatile unsigned int*)(0x42600188UL))
|
|
#define bFM3_EXTI_ELVR_LB1 *((volatile unsigned int*)(0x4260018CUL))
|
|
#define bFM3_EXTI_ELVR_LA2 *((volatile unsigned int*)(0x42600190UL))
|
|
#define bFM3_EXTI_ELVR_LB2 *((volatile unsigned int*)(0x42600194UL))
|
|
#define bFM3_EXTI_ELVR_LA3 *((volatile unsigned int*)(0x42600198UL))
|
|
#define bFM3_EXTI_ELVR_LB3 *((volatile unsigned int*)(0x4260019CUL))
|
|
#define bFM3_EXTI_ELVR_LA4 *((volatile unsigned int*)(0x426001A0UL))
|
|
#define bFM3_EXTI_ELVR_LB4 *((volatile unsigned int*)(0x426001A4UL))
|
|
#define bFM3_EXTI_ELVR_LA5 *((volatile unsigned int*)(0x426001A8UL))
|
|
#define bFM3_EXTI_ELVR_LB5 *((volatile unsigned int*)(0x426001ACUL))
|
|
#define bFM3_EXTI_ELVR_LA6 *((volatile unsigned int*)(0x426001B0UL))
|
|
#define bFM3_EXTI_ELVR_LB6 *((volatile unsigned int*)(0x426001B4UL))
|
|
#define bFM3_EXTI_ELVR_LA7 *((volatile unsigned int*)(0x426001B8UL))
|
|
#define bFM3_EXTI_ELVR_LB7 *((volatile unsigned int*)(0x426001BCUL))
|
|
#define bFM3_EXTI_ELVR_LA8 *((volatile unsigned int*)(0x426001C0UL))
|
|
#define bFM3_EXTI_ELVR_LB8 *((volatile unsigned int*)(0x426001C4UL))
|
|
#define bFM3_EXTI_ELVR_LA9 *((volatile unsigned int*)(0x426001C8UL))
|
|
#define bFM3_EXTI_ELVR_LB9 *((volatile unsigned int*)(0x426001CCUL))
|
|
#define bFM3_EXTI_ELVR_LA10 *((volatile unsigned int*)(0x426001D0UL))
|
|
#define bFM3_EXTI_ELVR_LB10 *((volatile unsigned int*)(0x426001D4UL))
|
|
#define bFM3_EXTI_ELVR_LA11 *((volatile unsigned int*)(0x426001D8UL))
|
|
#define bFM3_EXTI_ELVR_LB11 *((volatile unsigned int*)(0x426001DCUL))
|
|
#define bFM3_EXTI_ELVR_LA12 *((volatile unsigned int*)(0x426001E0UL))
|
|
#define bFM3_EXTI_ELVR_LB12 *((volatile unsigned int*)(0x426001E4UL))
|
|
#define bFM3_EXTI_ELVR_LA13 *((volatile unsigned int*)(0x426001E8UL))
|
|
#define bFM3_EXTI_ELVR_LB13 *((volatile unsigned int*)(0x426001ECUL))
|
|
#define bFM3_EXTI_ELVR_LA14 *((volatile unsigned int*)(0x426001F0UL))
|
|
#define bFM3_EXTI_ELVR_LB14 *((volatile unsigned int*)(0x426001F4UL))
|
|
#define bFM3_EXTI_ELVR_LA15 *((volatile unsigned int*)(0x426001F8UL))
|
|
#define bFM3_EXTI_ELVR_LB15 *((volatile unsigned int*)(0x426001FCUL))
|
|
#define bFM3_EXTI_ELVR_LA16 *((volatile unsigned int*)(0x42600200UL))
|
|
#define bFM3_EXTI_ELVR_LB16 *((volatile unsigned int*)(0x42600204UL))
|
|
#define bFM3_EXTI_ELVR_LA17 *((volatile unsigned int*)(0x42600208UL))
|
|
#define bFM3_EXTI_ELVR_LB17 *((volatile unsigned int*)(0x4260020CUL))
|
|
#define bFM3_EXTI_ELVR_LA18 *((volatile unsigned int*)(0x42600210UL))
|
|
#define bFM3_EXTI_ELVR_LB18 *((volatile unsigned int*)(0x42600214UL))
|
|
#define bFM3_EXTI_ELVR_LA19 *((volatile unsigned int*)(0x42600218UL))
|
|
#define bFM3_EXTI_ELVR_LB19 *((volatile unsigned int*)(0x4260021CUL))
|
|
#define bFM3_EXTI_ELVR_LA20 *((volatile unsigned int*)(0x42600220UL))
|
|
#define bFM3_EXTI_ELVR_LB20 *((volatile unsigned int*)(0x42600224UL))
|
|
#define bFM3_EXTI_ELVR_LA21 *((volatile unsigned int*)(0x42600228UL))
|
|
#define bFM3_EXTI_ELVR_LB21 *((volatile unsigned int*)(0x4260022CUL))
|
|
#define bFM3_EXTI_ELVR_LA22 *((volatile unsigned int*)(0x42600230UL))
|
|
#define bFM3_EXTI_ELVR_LB22 *((volatile unsigned int*)(0x42600234UL))
|
|
#define bFM3_EXTI_ELVR_LA23 *((volatile unsigned int*)(0x42600238UL))
|
|
#define bFM3_EXTI_ELVR_LB23 *((volatile unsigned int*)(0x4260023CUL))
|
|
#define bFM3_EXTI_ELVR_LA24 *((volatile unsigned int*)(0x42600240UL))
|
|
#define bFM3_EXTI_ELVR_LB24 *((volatile unsigned int*)(0x42600244UL))
|
|
#define bFM3_EXTI_ELVR_LA25 *((volatile unsigned int*)(0x42600248UL))
|
|
#define bFM3_EXTI_ELVR_LB25 *((volatile unsigned int*)(0x4260024CUL))
|
|
#define bFM3_EXTI_ELVR_LA26 *((volatile unsigned int*)(0x42600250UL))
|
|
#define bFM3_EXTI_ELVR_LB26 *((volatile unsigned int*)(0x42600254UL))
|
|
#define bFM3_EXTI_ELVR_LA27 *((volatile unsigned int*)(0x42600258UL))
|
|
#define bFM3_EXTI_ELVR_LB27 *((volatile unsigned int*)(0x4260025CUL))
|
|
#define bFM3_EXTI_ELVR_LA28 *((volatile unsigned int*)(0x42600260UL))
|
|
#define bFM3_EXTI_ELVR_LB28 *((volatile unsigned int*)(0x42600264UL))
|
|
#define bFM3_EXTI_ELVR_LA29 *((volatile unsigned int*)(0x42600268UL))
|
|
#define bFM3_EXTI_ELVR_LB29 *((volatile unsigned int*)(0x4260026CUL))
|
|
#define bFM3_EXTI_ELVR_LA30 *((volatile unsigned int*)(0x42600270UL))
|
|
#define bFM3_EXTI_ELVR_LB30 *((volatile unsigned int*)(0x42600274UL))
|
|
#define bFM3_EXTI_ELVR_LA31 *((volatile unsigned int*)(0x42600278UL))
|
|
#define bFM3_EXTI_ELVR_LB31 *((volatile unsigned int*)(0x4260027CUL))
|
|
#define bFM3_EXTI_NMIRR_NR0 *((volatile unsigned int*)(0x42600280UL))
|
|
#define bFM3_EXTI_NMICL_NCL0 *((volatile unsigned int*)(0x42600300UL))
|
|
|
|
/* Interrupt request read registers */
|
|
#define bFM3_INTREQ_DRQSEL_DRQSEL0 *((volatile unsigned int*)(0x42620000UL))
|
|
#define bFM3_INTREQ_DRQSEL_DRQSEL1 *((volatile unsigned int*)(0x42620004UL))
|
|
#define bFM3_INTREQ_DRQSEL_DRQSEL2 *((volatile unsigned int*)(0x42620008UL))
|
|
#define bFM3_INTREQ_DRQSEL_DRQSEL3 *((volatile unsigned int*)(0x4262000CUL))
|
|
#define bFM3_INTREQ_DRQSEL_DRQSEL4 *((volatile unsigned int*)(0x42620010UL))
|
|
#define bFM3_INTREQ_DRQSEL_DRQSEL5 *((volatile unsigned int*)(0x42620014UL))
|
|
#define bFM3_INTREQ_DRQSEL_DRQSEL6 *((volatile unsigned int*)(0x42620018UL))
|
|
#define bFM3_INTREQ_DRQSEL_DRQSEL7 *((volatile unsigned int*)(0x4262001CUL))
|
|
#define bFM3_INTREQ_DRQSEL_DRQSEL8 *((volatile unsigned int*)(0x42620020UL))
|
|
#define bFM3_INTREQ_DRQSEL_DRQSEL9 *((volatile unsigned int*)(0x42620024UL))
|
|
#define bFM3_INTREQ_DRQSEL_DRQSEL10 *((volatile unsigned int*)(0x42620028UL))
|
|
#define bFM3_INTREQ_DRQSEL_DRQSEL11 *((volatile unsigned int*)(0x4262002CUL))
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#define bFM3_INTREQ_DRQSEL_DRQSEL12 *((volatile unsigned int*)(0x42620030UL))
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#define bFM3_INTREQ_DRQSEL_DRQSEL13 *((volatile unsigned int*)(0x42620034UL))
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#define bFM3_INTREQ_DRQSEL_DRQSEL14 *((volatile unsigned int*)(0x42620038UL))
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#define bFM3_INTREQ_DRQSEL_DRQSEL15 *((volatile unsigned int*)(0x4262003CUL))
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#define bFM3_INTREQ_DRQSEL_DRQSEL16 *((volatile unsigned int*)(0x42620040UL))
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#define bFM3_INTREQ_DRQSEL_DRQSEL17 *((volatile unsigned int*)(0x42620044UL))
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#define bFM3_INTREQ_DRQSEL_DRQSEL18 *((volatile unsigned int*)(0x42620048UL))
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#define bFM3_INTREQ_DRQSEL_DRQSEL19 *((volatile unsigned int*)(0x4262004CUL))
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#define bFM3_INTREQ_DRQSEL_DRQSEL20 *((volatile unsigned int*)(0x42620050UL))
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#define bFM3_INTREQ_DRQSEL_DRQSEL21 *((volatile unsigned int*)(0x42620054UL))
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#define bFM3_INTREQ_DRQSEL_DRQSEL22 *((volatile unsigned int*)(0x42620058UL))
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#define bFM3_INTREQ_DRQSEL_DRQSEL23 *((volatile unsigned int*)(0x4262005CUL))
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#define bFM3_INTREQ_DRQSEL_DRQSEL24 *((volatile unsigned int*)(0x42620060UL))
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#define bFM3_INTREQ_DRQSEL_DRQSEL25 *((volatile unsigned int*)(0x42620064UL))
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#define bFM3_INTREQ_DRQSEL_DRQSEL26 *((volatile unsigned int*)(0x42620068UL))
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#define bFM3_INTREQ_DRQSEL_DRQSEL27 *((volatile unsigned int*)(0x4262006CUL))
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#define bFM3_INTREQ_DRQSEL_DRQSEL28 *((volatile unsigned int*)(0x42620070UL))
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#define bFM3_INTREQ_DRQSEL_DRQSEL29 *((volatile unsigned int*)(0x42620074UL))
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#define bFM3_INTREQ_DRQSEL_DRQSEL30 *((volatile unsigned int*)(0x42620078UL))
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#define bFM3_INTREQ_DRQSEL_DRQSEL31 *((volatile unsigned int*)(0x4262007CUL))
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#define bFM3_INTREQ_ODDPKS_ODDPKS0 *((volatile unsigned char*)(0x42620160UL))
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#define bFM3_INTREQ_ODDPKS_ODDPKS1 *((volatile unsigned char*)(0x42620164UL))
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#define bFM3_INTREQ_ODDPKS_ODDPKS2 *((volatile unsigned char*)(0x42620168UL))
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#define bFM3_INTREQ_ODDPKS_ODDPKS3 *((volatile unsigned char*)(0x4262016CUL))
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#define bFM3_INTREQ_ODDPKS_ODDPKS4 *((volatile unsigned char*)(0x42620170UL))
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#define bFM3_INTREQ_EXC02MON_NMI *((volatile unsigned int*)(0x42620200UL))
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#define bFM3_INTREQ_EXC02MON_HWINT *((volatile unsigned int*)(0x42620204UL))
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#define bFM3_INTREQ_IRQ00MON_FCSINT *((volatile unsigned int*)(0x42620280UL))
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#define bFM3_INTREQ_IRQ01MON_SWWDTINT *((volatile unsigned int*)(0x42620300UL))
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#define bFM3_INTREQ_IRQ02MON_LVDINT *((volatile unsigned int*)(0x42620380UL))
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#define bFM3_INTREQ_IRQ03MON_WAVE0INT0 *((volatile unsigned int*)(0x42620400UL))
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#define bFM3_INTREQ_IRQ03MON_WAVE0INT1 *((volatile unsigned int*)(0x42620404UL))
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#define bFM3_INTREQ_IRQ03MON_WAVE0INT2 *((volatile unsigned int*)(0x42620408UL))
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#define bFM3_INTREQ_IRQ03MON_WAVE0INT3 *((volatile unsigned int*)(0x4262040CUL))
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#define bFM3_INTREQ_IRQ03MON_WAVE1INT0 *((volatile unsigned int*)(0x42620410UL))
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#define bFM3_INTREQ_IRQ03MON_WAVE1INT1 *((volatile unsigned int*)(0x42620414UL))
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#define bFM3_INTREQ_IRQ03MON_WAVE1INT2 *((volatile unsigned int*)(0x42620418UL))
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#define bFM3_INTREQ_IRQ03MON_WAVE1INT3 *((volatile unsigned int*)(0x4262041CUL))
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#define bFM3_INTREQ_IRQ03MON_WAVE2INT0 *((volatile unsigned int*)(0x42620420UL))
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#define bFM3_INTREQ_IRQ03MON_WAVE2INT1 *((volatile unsigned int*)(0x42620424UL))
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#define bFM3_INTREQ_IRQ03MON_WAVE2INT2 *((volatile unsigned int*)(0x42620428UL))
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#define bFM3_INTREQ_IRQ03MON_WAVE2INT3 *((volatile unsigned int*)(0x4262042CUL))
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#define bFM3_INTREQ_IRQ04MON_EXTINT0 *((volatile unsigned int*)(0x42620480UL))
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#define bFM3_INTREQ_IRQ04MON_EXTINT1 *((volatile unsigned int*)(0x42620484UL))
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#define bFM3_INTREQ_IRQ04MON_EXTINT2 *((volatile unsigned int*)(0x42620488UL))
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#define bFM3_INTREQ_IRQ04MON_EXTINT3 *((volatile unsigned int*)(0x4262048CUL))
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#define bFM3_INTREQ_IRQ04MON_EXTINT4 *((volatile unsigned int*)(0x42620490UL))
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#define bFM3_INTREQ_IRQ04MON_EXTINT5 *((volatile unsigned int*)(0x42620494UL))
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#define bFM3_INTREQ_IRQ04MON_EXTINT6 *((volatile unsigned int*)(0x42620498UL))
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#define bFM3_INTREQ_IRQ04MON_EXTINT7 *((volatile unsigned int*)(0x4262049CUL))
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#define bFM3_INTREQ_IRQ05MON_EXTINT0 *((volatile unsigned int*)(0x42620500UL))
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#define bFM3_INTREQ_IRQ05MON_EXTINT1 *((volatile unsigned int*)(0x42620504UL))
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#define bFM3_INTREQ_IRQ05MON_EXTINT2 *((volatile unsigned int*)(0x42620508UL))
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#define bFM3_INTREQ_IRQ05MON_EXTINT3 *((volatile unsigned int*)(0x4262050CUL))
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#define bFM3_INTREQ_IRQ05MON_EXTINT4 *((volatile unsigned int*)(0x42620510UL))
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#define bFM3_INTREQ_IRQ05MON_EXTINT5 *((volatile unsigned int*)(0x42620514UL))
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#define bFM3_INTREQ_IRQ05MON_EXTINT6 *((volatile unsigned int*)(0x42620518UL))
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#define bFM3_INTREQ_IRQ05MON_EXTINT7 *((volatile unsigned int*)(0x4262051CUL))
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#define bFM3_INTREQ_IRQ05MON_EXTINT8 *((volatile unsigned int*)(0x42620520UL))
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#define bFM3_INTREQ_IRQ05MON_EXTINT9 *((volatile unsigned int*)(0x42620524UL))
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#define bFM3_INTREQ_IRQ05MON_EXTINT10 *((volatile unsigned int*)(0x42620528UL))
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#define bFM3_INTREQ_IRQ05MON_EXTINT11 *((volatile unsigned int*)(0x4262052CUL))
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#define bFM3_INTREQ_IRQ05MON_EXTINT12 *((volatile unsigned int*)(0x42620530UL))
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#define bFM3_INTREQ_IRQ05MON_EXTINT13 *((volatile unsigned int*)(0x42620534UL))
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#define bFM3_INTREQ_IRQ05MON_EXTINT14 *((volatile unsigned int*)(0x42620538UL))
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#define bFM3_INTREQ_IRQ05MON_EXTINT15 *((volatile unsigned int*)(0x4262053CUL))
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#define bFM3_INTREQ_IRQ05MON_EXTINT16 *((volatile unsigned int*)(0x42620540UL))
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#define bFM3_INTREQ_IRQ05MON_EXTINT17 *((volatile unsigned int*)(0x42620544UL))
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#define bFM3_INTREQ_IRQ05MON_EXTINT18 *((volatile unsigned int*)(0x42620548UL))
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#define bFM3_INTREQ_IRQ05MON_EXTINT19 *((volatile unsigned int*)(0x4262054CUL))
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#define bFM3_INTREQ_IRQ05MON_EXTINT20 *((volatile unsigned int*)(0x42620550UL))
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#define bFM3_INTREQ_IRQ05MON_EXTINT21 *((volatile unsigned int*)(0x42620554UL))
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#define bFM3_INTREQ_IRQ05MON_EXTINT22 *((volatile unsigned int*)(0x42620558UL))
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#define bFM3_INTREQ_IRQ05MON_EXTINT23 *((volatile unsigned int*)(0x4262055CUL))
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#define bFM3_INTREQ_IRQ06MON_TIMINT1 *((volatile unsigned int*)(0x42620580UL))
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#define bFM3_INTREQ_IRQ06MON_TIMINT2 *((volatile unsigned int*)(0x42620584UL))
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#define bFM3_INTREQ_IRQ06MON_QUD0INT0 *((volatile unsigned int*)(0x42620588UL))
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#define bFM3_INTREQ_IRQ06MON_QUD0INT1 *((volatile unsigned int*)(0x4262058CUL))
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#define bFM3_INTREQ_IRQ06MON_QUD0INT2 *((volatile unsigned int*)(0x42620590UL))
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#define bFM3_INTREQ_IRQ06MON_QUD0INT3 *((volatile unsigned int*)(0x42620594UL))
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#define bFM3_INTREQ_IRQ06MON_QUD0INT4 *((volatile unsigned int*)(0x42620598UL))
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#define bFM3_INTREQ_IRQ06MON_QUD0INT5 *((volatile unsigned int*)(0x4262059CUL))
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#define bFM3_INTREQ_IRQ06MON_QUD1INT0 *((volatile unsigned int*)(0x426205A0UL))
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#define bFM3_INTREQ_IRQ06MON_QUD1INT1 *((volatile unsigned int*)(0x426205A4UL))
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#define bFM3_INTREQ_IRQ06MON_QUD1INT2 *((volatile unsigned int*)(0x426205A8UL))
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#define bFM3_INTREQ_IRQ06MON_QUD1INT3 *((volatile unsigned int*)(0x426205ACUL))
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#define bFM3_INTREQ_IRQ06MON_QUD1INT4 *((volatile unsigned int*)(0x426205B0UL))
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#define bFM3_INTREQ_IRQ06MON_QUD1INT5 *((volatile unsigned int*)(0x426205B4UL))
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#define bFM3_INTREQ_IRQ06MON_QUD2INT0 *((volatile unsigned int*)(0x426205B8UL))
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#define bFM3_INTREQ_IRQ06MON_QUD2INT1 *((volatile unsigned int*)(0x426205BCUL))
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#define bFM3_INTREQ_IRQ06MON_QUD2INT2 *((volatile unsigned int*)(0x426205C0UL))
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#define bFM3_INTREQ_IRQ06MON_QUD2INT3 *((volatile unsigned int*)(0x426205C4UL))
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#define bFM3_INTREQ_IRQ06MON_QUD2INT4 *((volatile unsigned int*)(0x426205C8UL))
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#define bFM3_INTREQ_IRQ06MON_QUD2INT5 *((volatile unsigned int*)(0x426205CCUL))
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#define bFM3_INTREQ_IRQ07MON_FMSINT *((volatile unsigned int*)(0x42620600UL))
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#define bFM3_INTREQ_IRQ08MON_MFSINT0 *((volatile unsigned int*)(0x42620680UL))
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#define bFM3_INTREQ_IRQ08MON_MFSINT1 *((volatile unsigned int*)(0x42620684UL))
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#define bFM3_INTREQ_IRQ09MON_FMSINT *((volatile unsigned int*)(0x42620700UL))
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#define bFM3_INTREQ_IRQ10MON_MFSINT0 *((volatile unsigned int*)(0x42620780UL))
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#define bFM3_INTREQ_IRQ10MON_MFSINT1 *((volatile unsigned int*)(0x42620784UL))
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#define bFM3_INTREQ_IRQ11MON_FMSINT *((volatile unsigned int*)(0x42620800UL))
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#define bFM3_INTREQ_IRQ12MON_MFSINT0 *((volatile unsigned int*)(0x42620880UL))
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#define bFM3_INTREQ_IRQ12MON_MFSINT1 *((volatile unsigned int*)(0x42620884UL))
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#define bFM3_INTREQ_IRQ13MON_FMSINT *((volatile unsigned int*)(0x42620900UL))
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#define bFM3_INTREQ_IRQ14MON_MFSINT0 *((volatile unsigned int*)(0x42620980UL))
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#define bFM3_INTREQ_IRQ14MON_MFSINT1 *((volatile unsigned int*)(0x42620984UL))
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#define bFM3_INTREQ_IRQ15MON_FMSINT *((volatile unsigned int*)(0x42620A00UL))
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#define bFM3_INTREQ_IRQ16MON_MFSINT0 *((volatile unsigned int*)(0x42620A80UL))
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#define bFM3_INTREQ_IRQ16MON_MFSINT1 *((volatile unsigned int*)(0x42620A84UL))
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#define bFM3_INTREQ_IRQ17MON_FMSINT *((volatile unsigned int*)(0x42620B00UL))
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#define bFM3_INTREQ_IRQ18MON_MFSINT0 *((volatile unsigned int*)(0x42620B80UL))
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#define bFM3_INTREQ_IRQ18MON_MFSINT1 *((volatile unsigned int*)(0x42620B84UL))
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#define bFM3_INTREQ_IRQ19MON_FMSINT *((volatile unsigned int*)(0x42620C00UL))
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#define bFM3_INTREQ_IRQ20MON_MFSINT0 *((volatile unsigned int*)(0x42620C80UL))
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#define bFM3_INTREQ_IRQ20MON_MFSINT1 *((volatile unsigned int*)(0x42620C84UL))
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#define bFM3_INTREQ_IRQ21MON_FMSINT *((volatile unsigned int*)(0x42620D00UL))
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#define bFM3_INTREQ_IRQ22MON_MFSINT0 *((volatile unsigned int*)(0x42620D80UL))
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#define bFM3_INTREQ_IRQ22MON_MFSINT1 *((volatile unsigned int*)(0x42620D84UL))
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#define bFM3_INTREQ_IRQ23MON_PPGINT0 *((volatile unsigned int*)(0x42620E00UL))
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#define bFM3_INTREQ_IRQ23MON_PPGINT1 *((volatile unsigned int*)(0x42620E04UL))
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#define bFM3_INTREQ_IRQ23MON_PPGINT2 *((volatile unsigned int*)(0x42620E08UL))
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#define bFM3_INTREQ_IRQ23MON_PPGINT3 *((volatile unsigned int*)(0x42620E0CUL))
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#define bFM3_INTREQ_IRQ23MON_PPGINT4 *((volatile unsigned int*)(0x42620E10UL))
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#define bFM3_INTREQ_IRQ23MON_PPGINT5 *((volatile unsigned int*)(0x42620E14UL))
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#define bFM3_INTREQ_IRQ23MON_PPGINT6 *((volatile unsigned int*)(0x42620E18UL))
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#define bFM3_INTREQ_IRQ23MON_PPGINT7 *((volatile unsigned int*)(0x42620E1CUL))
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#define bFM3_INTREQ_IRQ23MON_PPGINT8 *((volatile unsigned int*)(0x42620E20UL))
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#define bFM3_INTREQ_IRQ24MON_MOSCINT *((volatile unsigned int*)(0x42620E80UL))
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#define bFM3_INTREQ_IRQ24MON_SOSCINT *((volatile unsigned int*)(0x42620E84UL))
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#define bFM3_INTREQ_IRQ24MON_MPLLINT *((volatile unsigned int*)(0x42620E88UL))
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#define bFM3_INTREQ_IRQ24MON_UPLLINT *((volatile unsigned int*)(0x42620E8CUL))
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#define bFM3_INTREQ_IRQ24MON_WCINT *((volatile unsigned int*)(0x42620E90UL))
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#define bFM3_INTREQ_IRQ25MON_ADCINT0 *((volatile unsigned int*)(0x42620F00UL))
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#define bFM3_INTREQ_IRQ25MON_ADCINT1 *((volatile unsigned int*)(0x42620F04UL))
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#define bFM3_INTREQ_IRQ25MON_ADCINT2 *((volatile unsigned int*)(0x42620F08UL))
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#define bFM3_INTREQ_IRQ25MON_ADCINT3 *((volatile unsigned int*)(0x42620F0CUL))
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#define bFM3_INTREQ_IRQ26MON_ADCINT0 *((volatile unsigned int*)(0x42620F80UL))
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#define bFM3_INTREQ_IRQ26MON_ADCINT1 *((volatile unsigned int*)(0x42620F84UL))
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#define bFM3_INTREQ_IRQ26MON_ADCINT2 *((volatile unsigned int*)(0x42620F88UL))
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#define bFM3_INTREQ_IRQ26MON_ADCINT3 *((volatile unsigned int*)(0x42620F8CUL))
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#define bFM3_INTREQ_IRQ27MON_ADCINT0 *((volatile unsigned int*)(0x42621000UL))
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#define bFM3_INTREQ_IRQ27MON_ADCINT1 *((volatile unsigned int*)(0x42621004UL))
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#define bFM3_INTREQ_IRQ27MON_ADCINT2 *((volatile unsigned int*)(0x42621008UL))
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#define bFM3_INTREQ_IRQ27MON_ADCINT3 *((volatile unsigned int*)(0x4262100CUL))
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#define bFM3_INTREQ_IRQ28MON_FRT0INT0 *((volatile unsigned int*)(0x42621080UL))
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#define bFM3_INTREQ_IRQ28MON_FRT0INT1 *((volatile unsigned int*)(0x42621084UL))
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#define bFM3_INTREQ_IRQ28MON_FRT0INT2 *((volatile unsigned int*)(0x42621088UL))
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#define bFM3_INTREQ_IRQ28MON_FRT0INT3 *((volatile unsigned int*)(0x4262108CUL))
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#define bFM3_INTREQ_IRQ28MON_FRT0INT4 *((volatile unsigned int*)(0x42621090UL))
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#define bFM3_INTREQ_IRQ28MON_FRT0INT5 *((volatile unsigned int*)(0x42621094UL))
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#define bFM3_INTREQ_IRQ28MON_FRT1INT0 *((volatile unsigned int*)(0x42621098UL))
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#define bFM3_INTREQ_IRQ28MON_FRT1INT1 *((volatile unsigned int*)(0x4262109CUL))
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#define bFM3_INTREQ_IRQ28MON_FRT1INT2 *((volatile unsigned int*)(0x426210A0UL))
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#define bFM3_INTREQ_IRQ28MON_FRT1INT3 *((volatile unsigned int*)(0x426210A4UL))
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#define bFM3_INTREQ_IRQ28MON_FRT1INT4 *((volatile unsigned int*)(0x426210A8UL))
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#define bFM3_INTREQ_IRQ28MON_FRT1INT5 *((volatile unsigned int*)(0x426210ACUL))
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#define bFM3_INTREQ_IRQ28MON_FRT2INT0 *((volatile unsigned int*)(0x426210B0UL))
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#define bFM3_INTREQ_IRQ28MON_FRT2INT1 *((volatile unsigned int*)(0x426210B4UL))
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#define bFM3_INTREQ_IRQ28MON_FRT2INT2 *((volatile unsigned int*)(0x426210B8UL))
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#define bFM3_INTREQ_IRQ28MON_FRT2INT3 *((volatile unsigned int*)(0x426210BCUL))
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#define bFM3_INTREQ_IRQ28MON_FRT2INT4 *((volatile unsigned int*)(0x426210C0UL))
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#define bFM3_INTREQ_IRQ28MON_FRT2INT5 *((volatile unsigned int*)(0x426210C4UL))
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#define bFM3_INTREQ_IRQ29MON_ICU0INT0 *((volatile unsigned int*)(0x42621100UL))
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#define bFM3_INTREQ_IRQ29MON_ICU0INT1 *((volatile unsigned int*)(0x42621104UL))
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#define bFM3_INTREQ_IRQ29MON_ICU0INT2 *((volatile unsigned int*)(0x42621108UL))
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#define bFM3_INTREQ_IRQ29MON_ICU0INT3 *((volatile unsigned int*)(0x4262110CUL))
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#define bFM3_INTREQ_IRQ29MON_ICU1INT0 *((volatile unsigned int*)(0x42621110UL))
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#define bFM3_INTREQ_IRQ29MON_ICU1INT1 *((volatile unsigned int*)(0x42621114UL))
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#define bFM3_INTREQ_IRQ29MON_ICU1INT2 *((volatile unsigned int*)(0x42621118UL))
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#define bFM3_INTREQ_IRQ29MON_ICU1INT3 *((volatile unsigned int*)(0x4262111CUL))
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#define bFM3_INTREQ_IRQ29MON_ICU2INT0 *((volatile unsigned int*)(0x42621120UL))
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#define bFM3_INTREQ_IRQ29MON_ICU2INT1 *((volatile unsigned int*)(0x42621124UL))
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#define bFM3_INTREQ_IRQ29MON_ICU2INT2 *((volatile unsigned int*)(0x42621128UL))
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#define bFM3_INTREQ_IRQ29MON_ICU2INT3 *((volatile unsigned int*)(0x4262112CUL))
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#define bFM3_INTREQ_IRQ30MON_OCU0INT0 *((volatile unsigned int*)(0x42621180UL))
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#define bFM3_INTREQ_IRQ30MON_OCU0INT1 *((volatile unsigned int*)(0x42621184UL))
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#define bFM3_INTREQ_IRQ30MON_OCU0INT2 *((volatile unsigned int*)(0x42621188UL))
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#define bFM3_INTREQ_IRQ30MON_OCU0INT3 *((volatile unsigned int*)(0x4262118CUL))
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#define bFM3_INTREQ_IRQ30MON_OCU0INT4 *((volatile unsigned int*)(0x42621190UL))
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#define bFM3_INTREQ_IRQ30MON_OCU0INT5 *((volatile unsigned int*)(0x42621194UL))
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#define bFM3_INTREQ_IRQ30MON_OCU1INT0 *((volatile unsigned int*)(0x42621198UL))
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#define bFM3_INTREQ_IRQ30MON_OCU1INT1 *((volatile unsigned int*)(0x4262119CUL))
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#define bFM3_INTREQ_IRQ30MON_OCU1INT2 *((volatile unsigned int*)(0x426211A0UL))
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#define bFM3_INTREQ_IRQ30MON_OCU1INT3 *((volatile unsigned int*)(0x426211A4UL))
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#define bFM3_INTREQ_IRQ30MON_OCU1INT4 *((volatile unsigned int*)(0x426211A8UL))
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#define bFM3_INTREQ_IRQ30MON_OCU1INT5 *((volatile unsigned int*)(0x426211ACUL))
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#define bFM3_INTREQ_IRQ30MON_OCU2INT0 *((volatile unsigned int*)(0x426211B0UL))
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#define bFM3_INTREQ_IRQ30MON_OCU2INT1 *((volatile unsigned int*)(0x426211B4UL))
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#define bFM3_INTREQ_IRQ30MON_OCU2INT2 *((volatile unsigned int*)(0x426211B8UL))
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#define bFM3_INTREQ_IRQ30MON_OCU2INT3 *((volatile unsigned int*)(0x426211BCUL))
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#define bFM3_INTREQ_IRQ30MON_OCU2INT4 *((volatile unsigned int*)(0x426211C0UL))
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#define bFM3_INTREQ_IRQ30MON_OCU2INT5 *((volatile unsigned int*)(0x426211C4UL))
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#define bFM3_INTREQ_IRQ31MON_BTINT0 *((volatile unsigned int*)(0x42621200UL))
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#define bFM3_INTREQ_IRQ31MON_BTINT1 *((volatile unsigned int*)(0x42621204UL))
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#define bFM3_INTREQ_IRQ31MON_BTINT2 *((volatile unsigned int*)(0x42621208UL))
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#define bFM3_INTREQ_IRQ31MON_BTINT3 *((volatile unsigned int*)(0x4262120CUL))
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#define bFM3_INTREQ_IRQ31MON_BTINT4 *((volatile unsigned int*)(0x42621210UL))
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#define bFM3_INTREQ_IRQ31MON_BTINT5 *((volatile unsigned int*)(0x42621214UL))
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#define bFM3_INTREQ_IRQ31MON_BTINT6 *((volatile unsigned int*)(0x42621218UL))
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#define bFM3_INTREQ_IRQ31MON_BTINT7 *((volatile unsigned int*)(0x4262121CUL))
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#define bFM3_INTREQ_IRQ31MON_BTINT8 *((volatile unsigned int*)(0x42621220UL))
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#define bFM3_INTREQ_IRQ31MON_BTINT9 *((volatile unsigned int*)(0x42621224UL))
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#define bFM3_INTREQ_IRQ31MON_BTINT10 *((volatile unsigned int*)(0x42621228UL))
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#define bFM3_INTREQ_IRQ31MON_BTINT11 *((volatile unsigned int*)(0x4262122CUL))
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#define bFM3_INTREQ_IRQ31MON_BTINT12 *((volatile unsigned int*)(0x42621230UL))
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#define bFM3_INTREQ_IRQ31MON_BTINT13 *((volatile unsigned int*)(0x42621234UL))
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#define bFM3_INTREQ_IRQ31MON_BTINT14 *((volatile unsigned int*)(0x42621238UL))
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#define bFM3_INTREQ_IRQ31MON_BTINT15 *((volatile unsigned int*)(0x4262123CUL))
|
|
#define bFM3_INTREQ_IRQ32MON_MAC0SBD *((volatile unsigned int*)(0x42621284UL))
|
|
#define bFM3_INTREQ_IRQ32MON_MAC0PMI *((volatile unsigned int*)(0x42621288UL))
|
|
#define bFM3_INTREQ_IRQ32MON_MAC0LPI *((volatile unsigned int*)(0x4262128CUL))
|
|
#define bFM3_INTREQ_IRQ33MON_MAC1SBD *((volatile unsigned int*)(0x42621304UL))
|
|
#define bFM3_INTREQ_IRQ33MON_MAC1PMI *((volatile unsigned int*)(0x42621308UL))
|
|
#define bFM3_INTREQ_IRQ34MON_USB0INT0 *((volatile unsigned int*)(0x42621380UL))
|
|
#define bFM3_INTREQ_IRQ34MON_USB0INT1 *((volatile unsigned int*)(0x42621384UL))
|
|
#define bFM3_INTREQ_IRQ34MON_USB0INT2 *((volatile unsigned int*)(0x42621388UL))
|
|
#define bFM3_INTREQ_IRQ34MON_USB0INT3 *((volatile unsigned int*)(0x4262138CUL))
|
|
#define bFM3_INTREQ_IRQ34MON_USB0INT4 *((volatile unsigned int*)(0x42621390UL))
|
|
#define bFM3_INTREQ_IRQ35MON_USB0INT0 *((volatile unsigned int*)(0x42621400UL))
|
|
#define bFM3_INTREQ_IRQ35MON_USB0INT1 *((volatile unsigned int*)(0x42621404UL))
|
|
#define bFM3_INTREQ_IRQ35MON_USB0INT2 *((volatile unsigned int*)(0x42621408UL))
|
|
#define bFM3_INTREQ_IRQ35MON_USB0INT3 *((volatile unsigned int*)(0x4262140CUL))
|
|
#define bFM3_INTREQ_IRQ35MON_USB0INT4 *((volatile unsigned int*)(0x42621410UL))
|
|
#define bFM3_INTREQ_IRQ35MON_USB0INT5 *((volatile unsigned int*)(0x42621414UL))
|
|
#define bFM3_INTREQ_IRQ36MON_USB1INT0 *((volatile unsigned int*)(0x42621480UL))
|
|
#define bFM3_INTREQ_IRQ36MON_USB1INT1 *((volatile unsigned int*)(0x42621484UL))
|
|
#define bFM3_INTREQ_IRQ36MON_USB1INT2 *((volatile unsigned int*)(0x42621488UL))
|
|
#define bFM3_INTREQ_IRQ36MON_USB1INT3 *((volatile unsigned int*)(0x4262148CUL))
|
|
#define bFM3_INTREQ_IRQ36MON_USB1INT4 *((volatile unsigned int*)(0x42621490UL))
|
|
#define bFM3_INTREQ_IRQ37MON_USB1INT0 *((volatile unsigned int*)(0x42621500UL))
|
|
#define bFM3_INTREQ_IRQ37MON_USB1INT1 *((volatile unsigned int*)(0x42621504UL))
|
|
#define bFM3_INTREQ_IRQ37MON_USB1INT2 *((volatile unsigned int*)(0x42621508UL))
|
|
#define bFM3_INTREQ_IRQ37MON_USB1INT3 *((volatile unsigned int*)(0x4262150CUL))
|
|
#define bFM3_INTREQ_IRQ37MON_USB1INT4 *((volatile unsigned int*)(0x42621510UL))
|
|
#define bFM3_INTREQ_IRQ37MON_USB1INT5 *((volatile unsigned int*)(0x42621514UL))
|
|
#define bFM3_INTREQ_IRQ38MON_DMAINT *((volatile unsigned int*)(0x42621580UL))
|
|
#define bFM3_INTREQ_IRQ39MON_DMAINT *((volatile unsigned int*)(0x42621600UL))
|
|
#define bFM3_INTREQ_IRQ40MON_DMAINT *((volatile unsigned int*)(0x42621680UL))
|
|
#define bFM3_INTREQ_IRQ41MON_DMAINT *((volatile unsigned int*)(0x42621700UL))
|
|
#define bFM3_INTREQ_IRQ42MON_DMAINT *((volatile unsigned int*)(0x42621780UL))
|
|
#define bFM3_INTREQ_IRQ43MON_DMAINT *((volatile unsigned int*)(0x42621800UL))
|
|
#define bFM3_INTREQ_IRQ44MON_DMAINT *((volatile unsigned int*)(0x42621880UL))
|
|
#define bFM3_INTREQ_IRQ45MON_DMAINT *((volatile unsigned int*)(0x42621900UL))
|
|
#define bFM3_INTREQ_IRQ46MON_BTINT0 *((volatile unsigned int*)(0x42621980UL))
|
|
#define bFM3_INTREQ_IRQ46MON_BTINT1 *((volatile unsigned int*)(0x42621984UL))
|
|
#define bFM3_INTREQ_IRQ46MON_BTINT2 *((volatile unsigned int*)(0x42621988UL))
|
|
#define bFM3_INTREQ_IRQ46MON_BTINT3 *((volatile unsigned int*)(0x4262198CUL))
|
|
#define bFM3_INTREQ_IRQ46MON_BTINT4 *((volatile unsigned int*)(0x42621990UL))
|
|
#define bFM3_INTREQ_IRQ46MON_BTINT5 *((volatile unsigned int*)(0x42621994UL))
|
|
#define bFM3_INTREQ_IRQ46MON_BTINT6 *((volatile unsigned int*)(0x42621998UL))
|
|
#define bFM3_INTREQ_IRQ46MON_BTINT7 *((volatile unsigned int*)(0x4262199CUL))
|
|
#define bFM3_INTREQ_IRQ46MON_BTINT8 *((volatile unsigned int*)(0x426219A0UL))
|
|
#define bFM3_INTREQ_IRQ46MON_BTINT9 *((volatile unsigned int*)(0x426219A4UL))
|
|
#define bFM3_INTREQ_IRQ46MON_BTINT10 *((volatile unsigned int*)(0x426219A8UL))
|
|
#define bFM3_INTREQ_IRQ46MON_BTINT11 *((volatile unsigned int*)(0x426219ACUL))
|
|
#define bFM3_INTREQ_IRQ46MON_BTINT12 *((volatile unsigned int*)(0x426219B0UL))
|
|
#define bFM3_INTREQ_IRQ46MON_BTINT13 *((volatile unsigned int*)(0x426219B4UL))
|
|
#define bFM3_INTREQ_IRQ46MON_BTINT14 *((volatile unsigned int*)(0x426219B8UL))
|
|
#define bFM3_INTREQ_IRQ46MON_BTINT15 *((volatile unsigned int*)(0x426219BCUL))
|
|
#define bFM3_INTREQ_DRQSEL1_DRQSEL10 *((volatile unsigned int*)(0x42624000UL))
|
|
#define bFM3_INTREQ_DRQSEL1_DRQSEL11 *((volatile unsigned int*)(0x42624004UL))
|
|
#define bFM3_INTREQ_DRQSEL1_DRQSEL12 *((volatile unsigned int*)(0x42624008UL))
|
|
#define bFM3_INTREQ_DRQSEL1_DRQSEL13 *((volatile unsigned int*)(0x4262400CUL))
|
|
#define bFM3_INTREQ_DRQSEL1_DRQSEL14 *((volatile unsigned int*)(0x42624010UL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL100 *((volatile unsigned int*)(0x42624080UL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL101 *((volatile unsigned int*)(0x42624084UL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL102 *((volatile unsigned int*)(0x42624088UL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL103 *((volatile unsigned int*)(0x4262408CUL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL110 *((volatile unsigned int*)(0x42624090UL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL111 *((volatile unsigned int*)(0x42624094UL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL112 *((volatile unsigned int*)(0x42624098UL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL113 *((volatile unsigned int*)(0x4262409CUL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL240 *((volatile unsigned int*)(0x426240A0UL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL241 *((volatile unsigned int*)(0x426240A4UL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL242 *((volatile unsigned int*)(0x426240A8UL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL243 *((volatile unsigned int*)(0x426240ACUL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL250 *((volatile unsigned int*)(0x426240B0UL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL251 *((volatile unsigned int*)(0x426240B4UL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL252 *((volatile unsigned int*)(0x426240B8UL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL253 *((volatile unsigned int*)(0x426240BCUL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL260 *((volatile unsigned int*)(0x426240C0UL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL261 *((volatile unsigned int*)(0x426240C4UL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL262 *((volatile unsigned int*)(0x426240C8UL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL263 *((volatile unsigned int*)(0x426240CCUL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL270 *((volatile unsigned int*)(0x426240D0UL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL271 *((volatile unsigned int*)(0x426240D4UL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL272 *((volatile unsigned int*)(0x426240D8UL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL273 *((volatile unsigned int*)(0x426240DCUL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL300 *((volatile unsigned int*)(0x426240E0UL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL301 *((volatile unsigned int*)(0x426240E4UL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL302 *((volatile unsigned int*)(0x426240E8UL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL303 *((volatile unsigned int*)(0x426240ECUL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL310 *((volatile unsigned int*)(0x426240F0UL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL311 *((volatile unsigned int*)(0x426240F4UL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL312 *((volatile unsigned int*)(0x426240F8UL))
|
|
#define bFM3_INTREQ_DQESEL_ESEL313 *((volatile unsigned int*)(0x426240FCUL))
|
|
#define bFM3_INTREQ_ODDPKS1_ODDPKS10 *((volatile unsigned char*)(0x426241E0UL))
|
|
#define bFM3_INTREQ_ODDPKS1_ODDPKS11 *((volatile unsigned char*)(0x426241E4UL))
|
|
#define bFM3_INTREQ_ODDPKS1_ODDPKS12 *((volatile unsigned char*)(0x426241E8UL))
|
|
#define bFM3_INTREQ_ODDPKS1_ODDPKS13 *((volatile unsigned char*)(0x426241ECUL))
|
|
#define bFM3_INTREQ_ODDPKS1_ODDPKS14 *((volatile unsigned char*)(0x426241F0UL))
|
|
|
|
/* General purpose I/O registers */
|
|
#define bFM3_GPIO_PFR0_P0 *((volatile unsigned int*)(0x42660000UL))
|
|
#define bFM3_GPIO_PFR0_P1 *((volatile unsigned int*)(0x42660004UL))
|
|
#define bFM3_GPIO_PFR0_P2 *((volatile unsigned int*)(0x42660008UL))
|
|
#define bFM3_GPIO_PFR0_P3 *((volatile unsigned int*)(0x4266000CUL))
|
|
#define bFM3_GPIO_PFR0_P4 *((volatile unsigned int*)(0x42660010UL))
|
|
#define bFM3_GPIO_PFR0_P5 *((volatile unsigned int*)(0x42660014UL))
|
|
#define bFM3_GPIO_PFR0_P6 *((volatile unsigned int*)(0x42660018UL))
|
|
#define bFM3_GPIO_PFR0_P7 *((volatile unsigned int*)(0x4266001CUL))
|
|
#define bFM3_GPIO_PFR0_P8 *((volatile unsigned int*)(0x42660020UL))
|
|
#define bFM3_GPIO_PFR0_P9 *((volatile unsigned int*)(0x42660024UL))
|
|
#define bFM3_GPIO_PFR1_P0 *((volatile unsigned int*)(0x42660080UL))
|
|
#define bFM3_GPIO_PFR1_P1 *((volatile unsigned int*)(0x42660084UL))
|
|
#define bFM3_GPIO_PFR1_P2 *((volatile unsigned int*)(0x42660088UL))
|
|
#define bFM3_GPIO_PFR1_P3 *((volatile unsigned int*)(0x4266008CUL))
|
|
#define bFM3_GPIO_PFR1_P4 *((volatile unsigned int*)(0x42660090UL))
|
|
#define bFM3_GPIO_PFR1_P5 *((volatile unsigned int*)(0x42660094UL))
|
|
#define bFM3_GPIO_PFR1_P6 *((volatile unsigned int*)(0x42660098UL))
|
|
#define bFM3_GPIO_PFR1_P7 *((volatile unsigned int*)(0x4266009CUL))
|
|
#define bFM3_GPIO_PFR1_P8 *((volatile unsigned int*)(0x426600A0UL))
|
|
#define bFM3_GPIO_PFR1_P9 *((volatile unsigned int*)(0x426600A4UL))
|
|
#define bFM3_GPIO_PFR1_PA *((volatile unsigned int*)(0x426600A8UL))
|
|
#define bFM3_GPIO_PFR1_PB *((volatile unsigned int*)(0x426600ACUL))
|
|
#define bFM3_GPIO_PFR1_PC *((volatile unsigned int*)(0x426600B0UL))
|
|
#define bFM3_GPIO_PFR1_PD *((volatile unsigned int*)(0x426600B4UL))
|
|
#define bFM3_GPIO_PFR1_PE *((volatile unsigned int*)(0x426600B8UL))
|
|
#define bFM3_GPIO_PFR1_PF *((volatile unsigned int*)(0x426600BCUL))
|
|
#define bFM3_GPIO_PFR2_P0 *((volatile unsigned int*)(0x42660100UL))
|
|
#define bFM3_GPIO_PFR2_P1 *((volatile unsigned int*)(0x42660104UL))
|
|
#define bFM3_GPIO_PFR2_P2 *((volatile unsigned int*)(0x42660108UL))
|
|
#define bFM3_GPIO_PFR2_P3 *((volatile unsigned int*)(0x4266010CUL))
|
|
#define bFM3_GPIO_PFR2_P4 *((volatile unsigned int*)(0x42660110UL))
|
|
#define bFM3_GPIO_PFR2_P5 *((volatile unsigned int*)(0x42660114UL))
|
|
#define bFM3_GPIO_PFR2_P6 *((volatile unsigned int*)(0x42660118UL))
|
|
#define bFM3_GPIO_PFR2_P7 *((volatile unsigned int*)(0x4266011CUL))
|
|
#define bFM3_GPIO_PFR2_P8 *((volatile unsigned int*)(0x42660120UL))
|
|
#define bFM3_GPIO_PFR2_P9 *((volatile unsigned int*)(0x42660124UL))
|
|
#define bFM3_GPIO_PFR3_P6 *((volatile unsigned int*)(0x42660198UL))
|
|
#define bFM3_GPIO_PFR3_P7 *((volatile unsigned int*)(0x4266019CUL))
|
|
#define bFM3_GPIO_PFR3_P8 *((volatile unsigned int*)(0x426601A0UL))
|
|
#define bFM3_GPIO_PFR3_P9 *((volatile unsigned int*)(0x426601A4UL))
|
|
#define bFM3_GPIO_PFR3_PA *((volatile unsigned int*)(0x426601A8UL))
|
|
#define bFM3_GPIO_PFR3_PB *((volatile unsigned int*)(0x426601ACUL))
|
|
#define bFM3_GPIO_PFR3_PC *((volatile unsigned int*)(0x426601B0UL))
|
|
#define bFM3_GPIO_PFR3_PD *((volatile unsigned int*)(0x426601B4UL))
|
|
#define bFM3_GPIO_PFR3_PE *((volatile unsigned int*)(0x426601B8UL))
|
|
#define bFM3_GPIO_PFR3_PF *((volatile unsigned int*)(0x426601BCUL))
|
|
#define bFM3_GPIO_PFR4_P0 *((volatile unsigned int*)(0x42660200UL))
|
|
#define bFM3_GPIO_PFR4_P1 *((volatile unsigned int*)(0x42660204UL))
|
|
#define bFM3_GPIO_PFR4_P2 *((volatile unsigned int*)(0x42660208UL))
|
|
#define bFM3_GPIO_PFR4_P3 *((volatile unsigned int*)(0x4266020CUL))
|
|
#define bFM3_GPIO_PFR4_P4 *((volatile unsigned int*)(0x42660210UL))
|
|
#define bFM3_GPIO_PFR4_P5 *((volatile unsigned int*)(0x42660214UL))
|
|
#define bFM3_GPIO_PFR4_P6 *((volatile unsigned int*)(0x42660218UL))
|
|
#define bFM3_GPIO_PFR4_P7 *((volatile unsigned int*)(0x4266021CUL))
|
|
#define bFM3_GPIO_PFR4_P8 *((volatile unsigned int*)(0x42660220UL))
|
|
#define bFM3_GPIO_PFR4_P9 *((volatile unsigned int*)(0x42660224UL))
|
|
#define bFM3_GPIO_PFR4_PA *((volatile unsigned int*)(0x42660228UL))
|
|
#define bFM3_GPIO_PFR4_PB *((volatile unsigned int*)(0x4266022CUL))
|
|
#define bFM3_GPIO_PFR4_PC *((volatile unsigned int*)(0x42660230UL))
|
|
#define bFM3_GPIO_PFR4_PD *((volatile unsigned int*)(0x42660234UL))
|
|
#define bFM3_GPIO_PFR4_PE *((volatile unsigned int*)(0x42660238UL))
|
|
#define bFM3_GPIO_PFR5_P0 *((volatile unsigned int*)(0x42660280UL))
|
|
#define bFM3_GPIO_PFR5_P1 *((volatile unsigned int*)(0x42660284UL))
|
|
#define bFM3_GPIO_PFR5_P2 *((volatile unsigned int*)(0x42660288UL))
|
|
#define bFM3_GPIO_PFR5_P3 *((volatile unsigned int*)(0x4266028CUL))
|
|
#define bFM3_GPIO_PFR5_P4 *((volatile unsigned int*)(0x42660290UL))
|
|
#define bFM3_GPIO_PFR5_P5 *((volatile unsigned int*)(0x42660294UL))
|
|
#define bFM3_GPIO_PFR5_P6 *((volatile unsigned int*)(0x42660298UL))
|
|
#define bFM3_GPIO_PFR5_P7 *((volatile unsigned int*)(0x4266029CUL))
|
|
#define bFM3_GPIO_PFR5_P8 *((volatile unsigned int*)(0x426602A0UL))
|
|
#define bFM3_GPIO_PFR5_P9 *((volatile unsigned int*)(0x426602A4UL))
|
|
#define bFM3_GPIO_PFR5_PA *((volatile unsigned int*)(0x426602A8UL))
|
|
#define bFM3_GPIO_PFR5_PB *((volatile unsigned int*)(0x426602ACUL))
|
|
#define bFM3_GPIO_PFR6_P0 *((volatile unsigned int*)(0x42660300UL))
|
|
#define bFM3_GPIO_PFR6_P1 *((volatile unsigned int*)(0x42660304UL))
|
|
#define bFM3_GPIO_PFR6_P2 *((volatile unsigned int*)(0x42660308UL))
|
|
#define bFM3_GPIO_PFR7_P0 *((volatile unsigned int*)(0x42660380UL))
|
|
#define bFM3_GPIO_PFR7_P1 *((volatile unsigned int*)(0x42660384UL))
|
|
#define bFM3_GPIO_PFR7_P2 *((volatile unsigned int*)(0x42660388UL))
|
|
#define bFM3_GPIO_PFR7_P3 *((volatile unsigned int*)(0x4266038CUL))
|
|
#define bFM3_GPIO_PFR7_P4 *((volatile unsigned int*)(0x42660390UL))
|
|
#define bFM3_GPIO_PFR7_P5 *((volatile unsigned int*)(0x42660394UL))
|
|
#define bFM3_GPIO_PFR7_P6 *((volatile unsigned int*)(0x42660398UL))
|
|
#define bFM3_GPIO_PFR7_P7 *((volatile unsigned int*)(0x4266039CUL))
|
|
#define bFM3_GPIO_PFR7_P8 *((volatile unsigned int*)(0x426603A0UL))
|
|
#define bFM3_GPIO_PFR7_P9 *((volatile unsigned int*)(0x426603A4UL))
|
|
#define bFM3_GPIO_PFR7_PA *((volatile unsigned int*)(0x426603A8UL))
|
|
#define bFM3_GPIO_PFR8_P0 *((volatile unsigned int*)(0x42660400UL))
|
|
#define bFM3_GPIO_PFR8_P1 *((volatile unsigned int*)(0x42660404UL))
|
|
#define bFM3_GPIO_PFR8_P2 *((volatile unsigned int*)(0x42660408UL))
|
|
#define bFM3_GPIO_PFR8_P3 *((volatile unsigned int*)(0x4266040CUL))
|
|
#define bFM3_GPIO_PFRA_P0 *((volatile unsigned int*)(0x42660500UL))
|
|
#define bFM3_GPIO_PFRA_P1 *((volatile unsigned int*)(0x42660504UL))
|
|
#define bFM3_GPIO_PFRA_P2 *((volatile unsigned int*)(0x42660508UL))
|
|
#define bFM3_GPIO_PFRA_P3 *((volatile unsigned int*)(0x4266050CUL))
|
|
#define bFM3_GPIO_PFRA_P4 *((volatile unsigned int*)(0x42660510UL))
|
|
#define bFM3_GPIO_PFRA_P5 *((volatile unsigned int*)(0x42660514UL))
|
|
#define bFM3_GPIO_PFRC_P0 *((volatile unsigned int*)(0x42660600UL))
|
|
#define bFM3_GPIO_PFRC_P1 *((volatile unsigned int*)(0x42660604UL))
|
|
#define bFM3_GPIO_PFRC_P2 *((volatile unsigned int*)(0x42660608UL))
|
|
#define bFM3_GPIO_PFRC_P3 *((volatile unsigned int*)(0x4266060CUL))
|
|
#define bFM3_GPIO_PFRC_P4 *((volatile unsigned int*)(0x42660610UL))
|
|
#define bFM3_GPIO_PFRC_P5 *((volatile unsigned int*)(0x42660614UL))
|
|
#define bFM3_GPIO_PFRC_P6 *((volatile unsigned int*)(0x42660618UL))
|
|
#define bFM3_GPIO_PFRC_P7 *((volatile unsigned int*)(0x4266061CUL))
|
|
#define bFM3_GPIO_PFRC_P8 *((volatile unsigned int*)(0x42660620UL))
|
|
#define bFM3_GPIO_PFRC_P9 *((volatile unsigned int*)(0x42660624UL))
|
|
#define bFM3_GPIO_PFRC_PA *((volatile unsigned int*)(0x42660628UL))
|
|
#define bFM3_GPIO_PFRC_PB *((volatile unsigned int*)(0x4266062CUL))
|
|
#define bFM3_GPIO_PFRC_PC *((volatile unsigned int*)(0x42660630UL))
|
|
#define bFM3_GPIO_PFRC_PD *((volatile unsigned int*)(0x42660634UL))
|
|
#define bFM3_GPIO_PFRC_PE *((volatile unsigned int*)(0x42660638UL))
|
|
#define bFM3_GPIO_PFRC_PF *((volatile unsigned int*)(0x4266063CUL))
|
|
#define bFM3_GPIO_PFRD_P0 *((volatile unsigned int*)(0x42660680UL))
|
|
#define bFM3_GPIO_PFRD_P1 *((volatile unsigned int*)(0x42660684UL))
|
|
#define bFM3_GPIO_PFRD_P2 *((volatile unsigned int*)(0x42660688UL))
|
|
#define bFM3_GPIO_PFRD_P3 *((volatile unsigned int*)(0x4266068CUL))
|
|
#define bFM3_GPIO_PFRE_P0 *((volatile unsigned int*)(0x42660700UL))
|
|
#define bFM3_GPIO_PFRE_P2 *((volatile unsigned int*)(0x42660708UL))
|
|
#define bFM3_GPIO_PFRE_P3 *((volatile unsigned int*)(0x4266070CUL))
|
|
#define bFM3_GPIO_PFRF_P5 *((volatile unsigned int*)(0x42660794UL))
|
|
#define bFM3_GPIO_PFRF_P6 *((volatile unsigned int*)(0x42660798UL))
|
|
#define bFM3_GPIO_PCR0_P0 *((volatile unsigned int*)(0x42662000UL))
|
|
#define bFM3_GPIO_PCR0_P1 *((volatile unsigned int*)(0x42662004UL))
|
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#define bFM3_GPIO_PCR0_P2 *((volatile unsigned int*)(0x42662008UL))
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#define bFM3_GPIO_PCR0_P3 *((volatile unsigned int*)(0x4266200CUL))
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#define bFM3_GPIO_PCR0_P4 *((volatile unsigned int*)(0x42662010UL))
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#define bFM3_GPIO_PCR0_P5 *((volatile unsigned int*)(0x42662014UL))
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#define bFM3_GPIO_PCR0_P6 *((volatile unsigned int*)(0x42662018UL))
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#define bFM3_GPIO_PCR0_P7 *((volatile unsigned int*)(0x4266201CUL))
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#define bFM3_GPIO_PCR0_P8 *((volatile unsigned int*)(0x42662020UL))
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#define bFM3_GPIO_PCR0_P9 *((volatile unsigned int*)(0x42662024UL))
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#define bFM3_GPIO_PCR1_P0 *((volatile unsigned int*)(0x42662080UL))
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#define bFM3_GPIO_PCR1_P1 *((volatile unsigned int*)(0x42662084UL))
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#define bFM3_GPIO_PCR1_P2 *((volatile unsigned int*)(0x42662088UL))
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#define bFM3_GPIO_PCR1_P3 *((volatile unsigned int*)(0x4266208CUL))
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#define bFM3_GPIO_PCR1_P4 *((volatile unsigned int*)(0x42662090UL))
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#define bFM3_GPIO_PCR1_P5 *((volatile unsigned int*)(0x42662094UL))
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#define bFM3_GPIO_PCR1_P6 *((volatile unsigned int*)(0x42662098UL))
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#define bFM3_GPIO_PCR1_P7 *((volatile unsigned int*)(0x4266209CUL))
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#define bFM3_GPIO_PCR1_P8 *((volatile unsigned int*)(0x426620A0UL))
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#define bFM3_GPIO_PCR1_P9 *((volatile unsigned int*)(0x426620A4UL))
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#define bFM3_GPIO_PCR1_PA *((volatile unsigned int*)(0x426620A8UL))
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#define bFM3_GPIO_PCR1_PB *((volatile unsigned int*)(0x426620ACUL))
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#define bFM3_GPIO_PCR1_PC *((volatile unsigned int*)(0x426620B0UL))
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#define bFM3_GPIO_PCR1_PD *((volatile unsigned int*)(0x426620B4UL))
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#define bFM3_GPIO_PCR1_PE *((volatile unsigned int*)(0x426620B8UL))
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#define bFM3_GPIO_PCR1_PF *((volatile unsigned int*)(0x426620BCUL))
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#define bFM3_GPIO_PCR2_P0 *((volatile unsigned int*)(0x42662100UL))
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#define bFM3_GPIO_PCR2_P1 *((volatile unsigned int*)(0x42662104UL))
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#define bFM3_GPIO_PCR2_P2 *((volatile unsigned int*)(0x42662108UL))
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#define bFM3_GPIO_PCR2_P3 *((volatile unsigned int*)(0x4266210CUL))
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#define bFM3_GPIO_PCR2_P4 *((volatile unsigned int*)(0x42662110UL))
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#define bFM3_GPIO_PCR2_P5 *((volatile unsigned int*)(0x42662114UL))
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#define bFM3_GPIO_PCR2_P6 *((volatile unsigned int*)(0x42662118UL))
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#define bFM3_GPIO_PCR2_P7 *((volatile unsigned int*)(0x4266211CUL))
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#define bFM3_GPIO_PCR2_P8 *((volatile unsigned int*)(0x42662120UL))
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#define bFM3_GPIO_PCR2_P9 *((volatile unsigned int*)(0x42662124UL))
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#define bFM3_GPIO_PCR3_P6 *((volatile unsigned int*)(0x42662198UL))
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#define bFM3_GPIO_PCR3_P7 *((volatile unsigned int*)(0x4266219CUL))
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#define bFM3_GPIO_PCR3_P8 *((volatile unsigned int*)(0x426621A0UL))
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#define bFM3_GPIO_PCR3_P9 *((volatile unsigned int*)(0x426621A4UL))
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#define bFM3_GPIO_PCR3_PA *((volatile unsigned int*)(0x426621A8UL))
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#define bFM3_GPIO_PCR3_PB *((volatile unsigned int*)(0x426621ACUL))
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#define bFM3_GPIO_PCR3_PC *((volatile unsigned int*)(0x426621B0UL))
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#define bFM3_GPIO_PCR3_PD *((volatile unsigned int*)(0x426621B4UL))
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#define bFM3_GPIO_PCR3_PE *((volatile unsigned int*)(0x426621B8UL))
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#define bFM3_GPIO_PCR3_PF *((volatile unsigned int*)(0x426621BCUL))
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#define bFM3_GPIO_PCR4_P0 *((volatile unsigned int*)(0x42662200UL))
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#define bFM3_GPIO_PCR4_P1 *((volatile unsigned int*)(0x42662204UL))
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#define bFM3_GPIO_PCR4_P2 *((volatile unsigned int*)(0x42662208UL))
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#define bFM3_GPIO_PCR4_P3 *((volatile unsigned int*)(0x4266220CUL))
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#define bFM3_GPIO_PCR4_P4 *((volatile unsigned int*)(0x42662210UL))
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#define bFM3_GPIO_PCR4_P5 *((volatile unsigned int*)(0x42662214UL))
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#define bFM3_GPIO_PCR4_P6 *((volatile unsigned int*)(0x42662218UL))
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#define bFM3_GPIO_PCR4_P7 *((volatile unsigned int*)(0x4266221CUL))
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#define bFM3_GPIO_PCR4_P8 *((volatile unsigned int*)(0x42662220UL))
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#define bFM3_GPIO_PCR4_P9 *((volatile unsigned int*)(0x42662224UL))
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#define bFM3_GPIO_PCR4_PA *((volatile unsigned int*)(0x42662228UL))
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#define bFM3_GPIO_PCR4_PB *((volatile unsigned int*)(0x4266222CUL))
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#define bFM3_GPIO_PCR4_PC *((volatile unsigned int*)(0x42662230UL))
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#define bFM3_GPIO_PCR4_PD *((volatile unsigned int*)(0x42662234UL))
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#define bFM3_GPIO_PCR4_PE *((volatile unsigned int*)(0x42662238UL))
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#define bFM3_GPIO_PCR5_P0 *((volatile unsigned int*)(0x42662280UL))
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#define bFM3_GPIO_PCR5_P1 *((volatile unsigned int*)(0x42662284UL))
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#define bFM3_GPIO_PCR5_P2 *((volatile unsigned int*)(0x42662288UL))
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#define bFM3_GPIO_PCR5_P3 *((volatile unsigned int*)(0x4266228CUL))
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#define bFM3_GPIO_PCR5_P4 *((volatile unsigned int*)(0x42662290UL))
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#define bFM3_GPIO_PCR5_P5 *((volatile unsigned int*)(0x42662294UL))
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#define bFM3_GPIO_PCR5_P6 *((volatile unsigned int*)(0x42662298UL))
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#define bFM3_GPIO_PCR5_P7 *((volatile unsigned int*)(0x4266229CUL))
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#define bFM3_GPIO_PCR5_P8 *((volatile unsigned int*)(0x426622A0UL))
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#define bFM3_GPIO_PCR5_P9 *((volatile unsigned int*)(0x426622A4UL))
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#define bFM3_GPIO_PCR5_PA *((volatile unsigned int*)(0x426622A8UL))
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#define bFM3_GPIO_PCR5_PB *((volatile unsigned int*)(0x426622ACUL))
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#define bFM3_GPIO_PCR6_P0 *((volatile unsigned int*)(0x42662300UL))
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#define bFM3_GPIO_PCR6_P1 *((volatile unsigned int*)(0x42662304UL))
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#define bFM3_GPIO_PCR6_P2 *((volatile unsigned int*)(0x42662308UL))
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#define bFM3_GPIO_PCR7_P0 *((volatile unsigned int*)(0x42662380UL))
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#define bFM3_GPIO_PCR7_P1 *((volatile unsigned int*)(0x42662384UL))
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#define bFM3_GPIO_PCR7_P2 *((volatile unsigned int*)(0x42662388UL))
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#define bFM3_GPIO_PCR7_P3 *((volatile unsigned int*)(0x4266238CUL))
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#define bFM3_GPIO_PCR7_P4 *((volatile unsigned int*)(0x42662390UL))
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#define bFM3_GPIO_PCR7_P5 *((volatile unsigned int*)(0x42662394UL))
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#define bFM3_GPIO_PCR7_P6 *((volatile unsigned int*)(0x42662398UL))
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#define bFM3_GPIO_PCR7_P7 *((volatile unsigned int*)(0x4266239CUL))
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#define bFM3_GPIO_PCR7_P8 *((volatile unsigned int*)(0x426623A0UL))
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#define bFM3_GPIO_PCR7_P9 *((volatile unsigned int*)(0x426623A4UL))
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#define bFM3_GPIO_PCR7_PA *((volatile unsigned int*)(0x426623A8UL))
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#define bFM3_GPIO_PCRA_P0 *((volatile unsigned int*)(0x42662500UL))
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#define bFM3_GPIO_PCRA_P1 *((volatile unsigned int*)(0x42662504UL))
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#define bFM3_GPIO_PCRA_P2 *((volatile unsigned int*)(0x42662508UL))
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#define bFM3_GPIO_PCRA_P3 *((volatile unsigned int*)(0x4266250CUL))
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#define bFM3_GPIO_PCRA_P4 *((volatile unsigned int*)(0x42662510UL))
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#define bFM3_GPIO_PCRA_P5 *((volatile unsigned int*)(0x42662514UL))
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#define bFM3_GPIO_PCRC_P0 *((volatile unsigned int*)(0x42662600UL))
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#define bFM3_GPIO_PCRC_P1 *((volatile unsigned int*)(0x42662604UL))
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#define bFM3_GPIO_PCRC_P2 *((volatile unsigned int*)(0x42662608UL))
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#define bFM3_GPIO_PCRC_P3 *((volatile unsigned int*)(0x4266260CUL))
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#define bFM3_GPIO_PCRC_P4 *((volatile unsigned int*)(0x42662610UL))
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#define bFM3_GPIO_PCRC_P5 *((volatile unsigned int*)(0x42662614UL))
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#define bFM3_GPIO_PCRC_P6 *((volatile unsigned int*)(0x42662618UL))
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#define bFM3_GPIO_PCRC_P7 *((volatile unsigned int*)(0x4266261CUL))
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#define bFM3_GPIO_PCRC_P8 *((volatile unsigned int*)(0x42662620UL))
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#define bFM3_GPIO_PCRC_P9 *((volatile unsigned int*)(0x42662624UL))
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#define bFM3_GPIO_PCRC_PA *((volatile unsigned int*)(0x42662628UL))
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#define bFM3_GPIO_PCRC_PB *((volatile unsigned int*)(0x4266262CUL))
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#define bFM3_GPIO_PCRC_PC *((volatile unsigned int*)(0x42662630UL))
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#define bFM3_GPIO_PCRC_PD *((volatile unsigned int*)(0x42662634UL))
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#define bFM3_GPIO_PCRC_PE *((volatile unsigned int*)(0x42662638UL))
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#define bFM3_GPIO_PCRC_PF *((volatile unsigned int*)(0x4266263CUL))
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#define bFM3_GPIO_PCRD_P0 *((volatile unsigned int*)(0x42662680UL))
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#define bFM3_GPIO_PCRD_P1 *((volatile unsigned int*)(0x42662684UL))
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#define bFM3_GPIO_PCRD_P2 *((volatile unsigned int*)(0x42662688UL))
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#define bFM3_GPIO_PCRD_P3 *((volatile unsigned int*)(0x4266268CUL))
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#define bFM3_GPIO_PCRE_P2 *((volatile unsigned int*)(0x42662708UL))
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#define bFM3_GPIO_PCRE_P3 *((volatile unsigned int*)(0x4266270CUL))
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#define bFM3_GPIO_DDR0_P0 *((volatile unsigned int*)(0x42664000UL))
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#define bFM3_GPIO_DDR0_P1 *((volatile unsigned int*)(0x42664004UL))
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#define bFM3_GPIO_DDR0_P2 *((volatile unsigned int*)(0x42664008UL))
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#define bFM3_GPIO_DDR0_P3 *((volatile unsigned int*)(0x4266400CUL))
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#define bFM3_GPIO_DDR0_P4 *((volatile unsigned int*)(0x42664010UL))
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#define bFM3_GPIO_DDR0_P5 *((volatile unsigned int*)(0x42664014UL))
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#define bFM3_GPIO_DDR0_P6 *((volatile unsigned int*)(0x42664018UL))
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#define bFM3_GPIO_DDR0_P7 *((volatile unsigned int*)(0x4266401CUL))
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#define bFM3_GPIO_DDR0_P8 *((volatile unsigned int*)(0x42664020UL))
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#define bFM3_GPIO_DDR0_P9 *((volatile unsigned int*)(0x42664024UL))
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#define bFM3_GPIO_DDR1_P0 *((volatile unsigned int*)(0x42664080UL))
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#define bFM3_GPIO_DDR1_P1 *((volatile unsigned int*)(0x42664084UL))
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#define bFM3_GPIO_DDR1_P2 *((volatile unsigned int*)(0x42664088UL))
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#define bFM3_GPIO_DDR1_P3 *((volatile unsigned int*)(0x4266408CUL))
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#define bFM3_GPIO_DDR1_P4 *((volatile unsigned int*)(0x42664090UL))
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#define bFM3_GPIO_DDR1_P5 *((volatile unsigned int*)(0x42664094UL))
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#define bFM3_GPIO_DDR1_P6 *((volatile unsigned int*)(0x42664098UL))
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#define bFM3_GPIO_DDR1_P7 *((volatile unsigned int*)(0x4266409CUL))
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#define bFM3_GPIO_DDR1_P8 *((volatile unsigned int*)(0x426640A0UL))
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#define bFM3_GPIO_DDR1_P9 *((volatile unsigned int*)(0x426640A4UL))
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#define bFM3_GPIO_DDR1_PA *((volatile unsigned int*)(0x426640A8UL))
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#define bFM3_GPIO_DDR1_PB *((volatile unsigned int*)(0x426640ACUL))
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#define bFM3_GPIO_DDR1_PC *((volatile unsigned int*)(0x426640B0UL))
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#define bFM3_GPIO_DDR1_PD *((volatile unsigned int*)(0x426640B4UL))
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#define bFM3_GPIO_DDR1_PE *((volatile unsigned int*)(0x426640B8UL))
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#define bFM3_GPIO_DDR1_PF *((volatile unsigned int*)(0x426640BCUL))
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#define bFM3_GPIO_DDR2_P0 *((volatile unsigned int*)(0x42664100UL))
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#define bFM3_GPIO_DDR2_P1 *((volatile unsigned int*)(0x42664104UL))
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#define bFM3_GPIO_DDR2_P2 *((volatile unsigned int*)(0x42664108UL))
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#define bFM3_GPIO_DDR2_P3 *((volatile unsigned int*)(0x4266410CUL))
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#define bFM3_GPIO_DDR2_P4 *((volatile unsigned int*)(0x42664110UL))
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#define bFM3_GPIO_DDR2_P5 *((volatile unsigned int*)(0x42664114UL))
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#define bFM3_GPIO_DDR2_P6 *((volatile unsigned int*)(0x42664118UL))
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#define bFM3_GPIO_DDR2_P7 *((volatile unsigned int*)(0x4266411CUL))
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#define bFM3_GPIO_DDR2_P8 *((volatile unsigned int*)(0x42664120UL))
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#define bFM3_GPIO_DDR2_P9 *((volatile unsigned int*)(0x42664124UL))
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#define bFM3_GPIO_DDR3_P6 *((volatile unsigned int*)(0x42664198UL))
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#define bFM3_GPIO_DDR3_P7 *((volatile unsigned int*)(0x4266419CUL))
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#define bFM3_GPIO_DDR3_P8 *((volatile unsigned int*)(0x426641A0UL))
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#define bFM3_GPIO_DDR3_P9 *((volatile unsigned int*)(0x426641A4UL))
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#define bFM3_GPIO_DDR3_PA *((volatile unsigned int*)(0x426641A8UL))
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#define bFM3_GPIO_DDR3_PB *((volatile unsigned int*)(0x426641ACUL))
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#define bFM3_GPIO_DDR3_PC *((volatile unsigned int*)(0x426641B0UL))
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#define bFM3_GPIO_DDR3_PD *((volatile unsigned int*)(0x426641B4UL))
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#define bFM3_GPIO_DDR3_PE *((volatile unsigned int*)(0x426641B8UL))
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#define bFM3_GPIO_DDR3_PF *((volatile unsigned int*)(0x426641BCUL))
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#define bFM3_GPIO_DDR4_P0 *((volatile unsigned int*)(0x42664200UL))
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#define bFM3_GPIO_DDR4_P1 *((volatile unsigned int*)(0x42664204UL))
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#define bFM3_GPIO_DDR4_P2 *((volatile unsigned int*)(0x42664208UL))
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#define bFM3_GPIO_DDR4_P3 *((volatile unsigned int*)(0x4266420CUL))
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#define bFM3_GPIO_DDR4_P4 *((volatile unsigned int*)(0x42664210UL))
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#define bFM3_GPIO_DDR4_P5 *((volatile unsigned int*)(0x42664214UL))
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#define bFM3_GPIO_DDR4_P6 *((volatile unsigned int*)(0x42664218UL))
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#define bFM3_GPIO_DDR4_P7 *((volatile unsigned int*)(0x4266421CUL))
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#define bFM3_GPIO_DDR4_P8 *((volatile unsigned int*)(0x42664220UL))
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#define bFM3_GPIO_DDR4_P9 *((volatile unsigned int*)(0x42664224UL))
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#define bFM3_GPIO_DDR4_PA *((volatile unsigned int*)(0x42664228UL))
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#define bFM3_GPIO_DDR4_PB *((volatile unsigned int*)(0x4266422CUL))
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#define bFM3_GPIO_DDR4_PC *((volatile unsigned int*)(0x42664230UL))
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#define bFM3_GPIO_DDR4_PD *((volatile unsigned int*)(0x42664234UL))
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#define bFM3_GPIO_DDR4_PE *((volatile unsigned int*)(0x42664238UL))
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#define bFM3_GPIO_DDR5_P0 *((volatile unsigned int*)(0x42664280UL))
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#define bFM3_GPIO_DDR5_P1 *((volatile unsigned int*)(0x42664284UL))
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#define bFM3_GPIO_DDR5_P2 *((volatile unsigned int*)(0x42664288UL))
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#define bFM3_GPIO_DDR5_P3 *((volatile unsigned int*)(0x4266428CUL))
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#define bFM3_GPIO_DDR5_P4 *((volatile unsigned int*)(0x42664290UL))
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#define bFM3_GPIO_DDR5_P5 *((volatile unsigned int*)(0x42664294UL))
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#define bFM3_GPIO_DDR5_P6 *((volatile unsigned int*)(0x42664298UL))
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#define bFM3_GPIO_DDR5_P7 *((volatile unsigned int*)(0x4266429CUL))
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#define bFM3_GPIO_DDR5_P8 *((volatile unsigned int*)(0x426642A0UL))
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#define bFM3_GPIO_DDR5_P9 *((volatile unsigned int*)(0x426642A4UL))
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#define bFM3_GPIO_DDR5_PA *((volatile unsigned int*)(0x426642A8UL))
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#define bFM3_GPIO_DDR5_PB *((volatile unsigned int*)(0x426642ACUL))
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#define bFM3_GPIO_DDR6_P0 *((volatile unsigned int*)(0x42664300UL))
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#define bFM3_GPIO_DDR6_P1 *((volatile unsigned int*)(0x42664304UL))
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#define bFM3_GPIO_DDR6_P2 *((volatile unsigned int*)(0x42664308UL))
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#define bFM3_GPIO_DDR7_P0 *((volatile unsigned int*)(0x42664380UL))
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#define bFM3_GPIO_DDR7_P1 *((volatile unsigned int*)(0x42664384UL))
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#define bFM3_GPIO_DDR7_P2 *((volatile unsigned int*)(0x42664388UL))
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#define bFM3_GPIO_DDR7_P3 *((volatile unsigned int*)(0x4266438CUL))
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#define bFM3_GPIO_DDR7_P4 *((volatile unsigned int*)(0x42664390UL))
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#define bFM3_GPIO_DDR7_P5 *((volatile unsigned int*)(0x42664394UL))
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#define bFM3_GPIO_DDR7_P6 *((volatile unsigned int*)(0x42664398UL))
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#define bFM3_GPIO_DDR7_P7 *((volatile unsigned int*)(0x4266439CUL))
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#define bFM3_GPIO_DDR7_P8 *((volatile unsigned int*)(0x426643A0UL))
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#define bFM3_GPIO_DDR7_P9 *((volatile unsigned int*)(0x426643A4UL))
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#define bFM3_GPIO_DDR7_PA *((volatile unsigned int*)(0x426643A8UL))
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#define bFM3_GPIO_DDR8_P0 *((volatile unsigned int*)(0x42664400UL))
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#define bFM3_GPIO_DDR8_P1 *((volatile unsigned int*)(0x42664404UL))
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#define bFM3_GPIO_DDR8_P2 *((volatile unsigned int*)(0x42664408UL))
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#define bFM3_GPIO_DDR8_P3 *((volatile unsigned int*)(0x4266440CUL))
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#define bFM3_GPIO_DDRA_P0 *((volatile unsigned int*)(0x42664500UL))
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#define bFM3_GPIO_DDRA_P1 *((volatile unsigned int*)(0x42664504UL))
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#define bFM3_GPIO_DDRA_P2 *((volatile unsigned int*)(0x42664508UL))
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#define bFM3_GPIO_DDRA_P3 *((volatile unsigned int*)(0x4266450CUL))
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#define bFM3_GPIO_DDRA_P4 *((volatile unsigned int*)(0x42664510UL))
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#define bFM3_GPIO_DDRA_P5 *((volatile unsigned int*)(0x42664514UL))
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#define bFM3_GPIO_DDRC_P0 *((volatile unsigned int*)(0x42664600UL))
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#define bFM3_GPIO_DDRC_P1 *((volatile unsigned int*)(0x42664604UL))
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#define bFM3_GPIO_DDRC_P2 *((volatile unsigned int*)(0x42664608UL))
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#define bFM3_GPIO_DDRC_P3 *((volatile unsigned int*)(0x4266460CUL))
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#define bFM3_GPIO_DDRC_P4 *((volatile unsigned int*)(0x42664610UL))
|
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#define bFM3_GPIO_DDRC_P5 *((volatile unsigned int*)(0x42664614UL))
|
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#define bFM3_GPIO_DDRC_P6 *((volatile unsigned int*)(0x42664618UL))
|
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#define bFM3_GPIO_DDRC_P7 *((volatile unsigned int*)(0x4266461CUL))
|
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#define bFM3_GPIO_DDRC_P8 *((volatile unsigned int*)(0x42664620UL))
|
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#define bFM3_GPIO_DDRC_P9 *((volatile unsigned int*)(0x42664624UL))
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#define bFM3_GPIO_DDRC_PA *((volatile unsigned int*)(0x42664628UL))
|
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#define bFM3_GPIO_DDRC_PB *((volatile unsigned int*)(0x4266462CUL))
|
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#define bFM3_GPIO_DDRC_PC *((volatile unsigned int*)(0x42664630UL))
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#define bFM3_GPIO_DDRC_PD *((volatile unsigned int*)(0x42664634UL))
|
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#define bFM3_GPIO_DDRC_PE *((volatile unsigned int*)(0x42664638UL))
|
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#define bFM3_GPIO_DDRC_PF *((volatile unsigned int*)(0x4266463CUL))
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#define bFM3_GPIO_DDRD_P0 *((volatile unsigned int*)(0x42664680UL))
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#define bFM3_GPIO_DDRD_P1 *((volatile unsigned int*)(0x42664684UL))
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#define bFM3_GPIO_DDRD_P2 *((volatile unsigned int*)(0x42664688UL))
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#define bFM3_GPIO_DDRD_P3 *((volatile unsigned int*)(0x4266468CUL))
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#define bFM3_GPIO_DDRE_P0 *((volatile unsigned int*)(0x42664700UL))
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#define bFM3_GPIO_DDRE_P2 *((volatile unsigned int*)(0x42664708UL))
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#define bFM3_GPIO_DDRE_P3 *((volatile unsigned int*)(0x4266470CUL))
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#define bFM3_GPIO_DDRF_P5 *((volatile unsigned int*)(0x42664794UL))
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#define bFM3_GPIO_DDRF_P6 *((volatile unsigned int*)(0x42664798UL))
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#define bFM3_GPIO_PDIR0_P0 *((volatile unsigned int*)(0x42666000UL))
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#define bFM3_GPIO_PDIR0_P1 *((volatile unsigned int*)(0x42666004UL))
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#define bFM3_GPIO_PDIR0_P2 *((volatile unsigned int*)(0x42666008UL))
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#define bFM3_GPIO_PDIR0_P3 *((volatile unsigned int*)(0x4266600CUL))
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#define bFM3_GPIO_PDIR0_P4 *((volatile unsigned int*)(0x42666010UL))
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#define bFM3_GPIO_PDIR0_P5 *((volatile unsigned int*)(0x42666014UL))
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#define bFM3_GPIO_PDIR0_P6 *((volatile unsigned int*)(0x42666018UL))
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#define bFM3_GPIO_PDIR0_P7 *((volatile unsigned int*)(0x4266601CUL))
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#define bFM3_GPIO_PDIR0_P8 *((volatile unsigned int*)(0x42666020UL))
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#define bFM3_GPIO_PDIR0_P9 *((volatile unsigned int*)(0x42666024UL))
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#define bFM3_GPIO_PDIR1_P0 *((volatile unsigned int*)(0x42666080UL))
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#define bFM3_GPIO_PDIR1_P1 *((volatile unsigned int*)(0x42666084UL))
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#define bFM3_GPIO_PDIR1_P2 *((volatile unsigned int*)(0x42666088UL))
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#define bFM3_GPIO_PDIR1_P3 *((volatile unsigned int*)(0x4266608CUL))
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#define bFM3_GPIO_PDIR1_P4 *((volatile unsigned int*)(0x42666090UL))
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#define bFM3_GPIO_PDIR1_P5 *((volatile unsigned int*)(0x42666094UL))
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#define bFM3_GPIO_PDIR1_P6 *((volatile unsigned int*)(0x42666098UL))
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#define bFM3_GPIO_PDIR1_P7 *((volatile unsigned int*)(0x4266609CUL))
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#define bFM3_GPIO_PDIR1_P8 *((volatile unsigned int*)(0x426660A0UL))
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#define bFM3_GPIO_PDIR1_P9 *((volatile unsigned int*)(0x426660A4UL))
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#define bFM3_GPIO_PDIR1_PA *((volatile unsigned int*)(0x426660A8UL))
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#define bFM3_GPIO_PDIR1_PB *((volatile unsigned int*)(0x426660ACUL))
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#define bFM3_GPIO_PDIR1_PC *((volatile unsigned int*)(0x426660B0UL))
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#define bFM3_GPIO_PDIR1_PD *((volatile unsigned int*)(0x426660B4UL))
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#define bFM3_GPIO_PDIR1_PE *((volatile unsigned int*)(0x426660B8UL))
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#define bFM3_GPIO_PDIR1_PF *((volatile unsigned int*)(0x426660BCUL))
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#define bFM3_GPIO_PDIR2_P0 *((volatile unsigned int*)(0x42666100UL))
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#define bFM3_GPIO_PDIR2_P1 *((volatile unsigned int*)(0x42666104UL))
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#define bFM3_GPIO_PDIR2_P2 *((volatile unsigned int*)(0x42666108UL))
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#define bFM3_GPIO_PDIR2_P3 *((volatile unsigned int*)(0x4266610CUL))
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#define bFM3_GPIO_PDIR2_P4 *((volatile unsigned int*)(0x42666110UL))
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#define bFM3_GPIO_PDIR2_P5 *((volatile unsigned int*)(0x42666114UL))
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#define bFM3_GPIO_PDIR2_P6 *((volatile unsigned int*)(0x42666118UL))
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#define bFM3_GPIO_PDIR2_P7 *((volatile unsigned int*)(0x4266611CUL))
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#define bFM3_GPIO_PDIR2_P8 *((volatile unsigned int*)(0x42666120UL))
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#define bFM3_GPIO_PDIR2_P9 *((volatile unsigned int*)(0x42666124UL))
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#define bFM3_GPIO_PDIR3_P6 *((volatile unsigned int*)(0x42666198UL))
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#define bFM3_GPIO_PDIR3_P7 *((volatile unsigned int*)(0x4266619CUL))
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#define bFM3_GPIO_PDIR3_P8 *((volatile unsigned int*)(0x426661A0UL))
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#define bFM3_GPIO_PDIR3_P9 *((volatile unsigned int*)(0x426661A4UL))
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#define bFM3_GPIO_PDIR3_PA *((volatile unsigned int*)(0x426661A8UL))
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#define bFM3_GPIO_PDIR3_PB *((volatile unsigned int*)(0x426661ACUL))
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#define bFM3_GPIO_PDIR3_PC *((volatile unsigned int*)(0x426661B0UL))
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#define bFM3_GPIO_PDIR3_PD *((volatile unsigned int*)(0x426661B4UL))
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#define bFM3_GPIO_PDIR3_PE *((volatile unsigned int*)(0x426661B8UL))
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#define bFM3_GPIO_PDIR3_PF *((volatile unsigned int*)(0x426661BCUL))
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#define bFM3_GPIO_PDIR4_P0 *((volatile unsigned int*)(0x42666200UL))
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#define bFM3_GPIO_PDIR4_P1 *((volatile unsigned int*)(0x42666204UL))
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#define bFM3_GPIO_PDIR4_P2 *((volatile unsigned int*)(0x42666208UL))
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#define bFM3_GPIO_PDIR4_P3 *((volatile unsigned int*)(0x4266620CUL))
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#define bFM3_GPIO_PDIR4_P4 *((volatile unsigned int*)(0x42666210UL))
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#define bFM3_GPIO_PDIR4_P5 *((volatile unsigned int*)(0x42666214UL))
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#define bFM3_GPIO_PDIR4_P6 *((volatile unsigned int*)(0x42666218UL))
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#define bFM3_GPIO_PDIR4_P7 *((volatile unsigned int*)(0x4266621CUL))
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#define bFM3_GPIO_PDIR4_P8 *((volatile unsigned int*)(0x42666220UL))
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#define bFM3_GPIO_PDIR4_P9 *((volatile unsigned int*)(0x42666224UL))
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#define bFM3_GPIO_PDIR4_PA *((volatile unsigned int*)(0x42666228UL))
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#define bFM3_GPIO_PDIR4_PB *((volatile unsigned int*)(0x4266622CUL))
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#define bFM3_GPIO_PDIR4_PC *((volatile unsigned int*)(0x42666230UL))
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#define bFM3_GPIO_PDIR4_PD *((volatile unsigned int*)(0x42666234UL))
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#define bFM3_GPIO_PDIR4_PE *((volatile unsigned int*)(0x42666238UL))
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#define bFM3_GPIO_PDIR5_P0 *((volatile unsigned int*)(0x42666280UL))
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#define bFM3_GPIO_PDIR5_P1 *((volatile unsigned int*)(0x42666284UL))
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#define bFM3_GPIO_PDIR5_P2 *((volatile unsigned int*)(0x42666288UL))
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#define bFM3_GPIO_PDIR5_P3 *((volatile unsigned int*)(0x4266628CUL))
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#define bFM3_GPIO_PDIR5_P4 *((volatile unsigned int*)(0x42666290UL))
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#define bFM3_GPIO_PDIR5_P5 *((volatile unsigned int*)(0x42666294UL))
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#define bFM3_GPIO_PDIR5_P6 *((volatile unsigned int*)(0x42666298UL))
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#define bFM3_GPIO_PDIR5_P7 *((volatile unsigned int*)(0x4266629CUL))
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|
#define bFM3_GPIO_PDIR5_P8 *((volatile unsigned int*)(0x426662A0UL))
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|
#define bFM3_GPIO_PDIR5_P9 *((volatile unsigned int*)(0x426662A4UL))
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|
#define bFM3_GPIO_PDIR5_PA *((volatile unsigned int*)(0x426662A8UL))
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#define bFM3_GPIO_PDIR5_PB *((volatile unsigned int*)(0x426662ACUL))
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#define bFM3_GPIO_PDIR6_P0 *((volatile unsigned int*)(0x42666300UL))
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#define bFM3_GPIO_PDIR6_P1 *((volatile unsigned int*)(0x42666304UL))
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#define bFM3_GPIO_PDIR6_P2 *((volatile unsigned int*)(0x42666308UL))
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#define bFM3_GPIO_PDIR7_P0 *((volatile unsigned int*)(0x42666380UL))
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|
#define bFM3_GPIO_PDIR7_P1 *((volatile unsigned int*)(0x42666384UL))
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|
#define bFM3_GPIO_PDIR7_P2 *((volatile unsigned int*)(0x42666388UL))
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|
#define bFM3_GPIO_PDIR7_P3 *((volatile unsigned int*)(0x4266638CUL))
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|
#define bFM3_GPIO_PDIR7_P4 *((volatile unsigned int*)(0x42666390UL))
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#define bFM3_GPIO_PDIR7_P5 *((volatile unsigned int*)(0x42666394UL))
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#define bFM3_GPIO_PDIR7_P6 *((volatile unsigned int*)(0x42666398UL))
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#define bFM3_GPIO_PDIR7_P7 *((volatile unsigned int*)(0x4266639CUL))
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|
#define bFM3_GPIO_PDIR7_P8 *((volatile unsigned int*)(0x426663A0UL))
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|
#define bFM3_GPIO_PDIR7_P9 *((volatile unsigned int*)(0x426663A4UL))
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|
#define bFM3_GPIO_PDIR7_PA *((volatile unsigned int*)(0x426663A8UL))
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|
#define bFM3_GPIO_PDIR8_P0 *((volatile unsigned int*)(0x42666400UL))
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#define bFM3_GPIO_PDIR8_P1 *((volatile unsigned int*)(0x42666404UL))
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#define bFM3_GPIO_PDIR8_P2 *((volatile unsigned int*)(0x42666408UL))
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#define bFM3_GPIO_PDIR8_P3 *((volatile unsigned int*)(0x4266640CUL))
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#define bFM3_GPIO_PDIRA_P0 *((volatile unsigned int*)(0x42666500UL))
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#define bFM3_GPIO_PDIRA_P1 *((volatile unsigned int*)(0x42666504UL))
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#define bFM3_GPIO_PDIRA_P2 *((volatile unsigned int*)(0x42666508UL))
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#define bFM3_GPIO_PDIRA_P3 *((volatile unsigned int*)(0x4266650CUL))
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#define bFM3_GPIO_PDIRA_P4 *((volatile unsigned int*)(0x42666510UL))
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#define bFM3_GPIO_PDIRA_P5 *((volatile unsigned int*)(0x42666514UL))
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#define bFM3_GPIO_PDIRC_P0 *((volatile unsigned int*)(0x42666600UL))
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#define bFM3_GPIO_PDIRC_P1 *((volatile unsigned int*)(0x42666604UL))
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#define bFM3_GPIO_PDIRC_P2 *((volatile unsigned int*)(0x42666608UL))
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#define bFM3_GPIO_PDIRC_P3 *((volatile unsigned int*)(0x4266660CUL))
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|
#define bFM3_GPIO_PDIRC_P4 *((volatile unsigned int*)(0x42666610UL))
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#define bFM3_GPIO_PDIRC_P5 *((volatile unsigned int*)(0x42666614UL))
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#define bFM3_GPIO_PDIRC_P6 *((volatile unsigned int*)(0x42666618UL))
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#define bFM3_GPIO_PDIRC_P7 *((volatile unsigned int*)(0x4266661CUL))
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#define bFM3_GPIO_PDIRC_P8 *((volatile unsigned int*)(0x42666620UL))
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#define bFM3_GPIO_PDIRC_P9 *((volatile unsigned int*)(0x42666624UL))
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#define bFM3_GPIO_PDIRC_PA *((volatile unsigned int*)(0x42666628UL))
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|
#define bFM3_GPIO_PDIRC_PB *((volatile unsigned int*)(0x4266662CUL))
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#define bFM3_GPIO_PDIRC_PC *((volatile unsigned int*)(0x42666630UL))
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|
#define bFM3_GPIO_PDIRC_PD *((volatile unsigned int*)(0x42666634UL))
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|
#define bFM3_GPIO_PDIRC_PE *((volatile unsigned int*)(0x42666638UL))
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|
#define bFM3_GPIO_PDIRC_PF *((volatile unsigned int*)(0x4266663CUL))
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#define bFM3_GPIO_PDIRD_P0 *((volatile unsigned int*)(0x42666680UL))
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|
#define bFM3_GPIO_PDIRD_P1 *((volatile unsigned int*)(0x42666684UL))
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|
#define bFM3_GPIO_PDIRD_P2 *((volatile unsigned int*)(0x42666688UL))
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|
#define bFM3_GPIO_PDIRD_P3 *((volatile unsigned int*)(0x4266668CUL))
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|
#define bFM3_GPIO_PDIRE_P0 *((volatile unsigned int*)(0x42666700UL))
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|
#define bFM3_GPIO_PDIRE_P2 *((volatile unsigned int*)(0x42666708UL))
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|
#define bFM3_GPIO_PDIRE_P3 *((volatile unsigned int*)(0x4266670CUL))
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|
#define bFM3_GPIO_PDIRF_P5 *((volatile unsigned int*)(0x42666794UL))
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|
#define bFM3_GPIO_PDIRF_P6 *((volatile unsigned int*)(0x42666798UL))
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|
#define bFM3_GPIO_PDOR0_P0 *((volatile unsigned int*)(0x42668000UL))
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|
#define bFM3_GPIO_PDOR0_P1 *((volatile unsigned int*)(0x42668004UL))
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|
#define bFM3_GPIO_PDOR0_P2 *((volatile unsigned int*)(0x42668008UL))
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|
#define bFM3_GPIO_PDOR0_P3 *((volatile unsigned int*)(0x4266800CUL))
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|
#define bFM3_GPIO_PDOR0_P4 *((volatile unsigned int*)(0x42668010UL))
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|
#define bFM3_GPIO_PDOR0_P5 *((volatile unsigned int*)(0x42668014UL))
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|
#define bFM3_GPIO_PDOR0_P6 *((volatile unsigned int*)(0x42668018UL))
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|
#define bFM3_GPIO_PDOR0_P7 *((volatile unsigned int*)(0x4266801CUL))
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|
#define bFM3_GPIO_PDOR0_P8 *((volatile unsigned int*)(0x42668020UL))
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|
#define bFM3_GPIO_PDOR0_P9 *((volatile unsigned int*)(0x42668024UL))
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|
#define bFM3_GPIO_PDOR1_P0 *((volatile unsigned int*)(0x42668080UL))
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|
#define bFM3_GPIO_PDOR1_P1 *((volatile unsigned int*)(0x42668084UL))
|
|
#define bFM3_GPIO_PDOR1_P2 *((volatile unsigned int*)(0x42668088UL))
|
|
#define bFM3_GPIO_PDOR1_P3 *((volatile unsigned int*)(0x4266808CUL))
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|
#define bFM3_GPIO_PDOR1_P4 *((volatile unsigned int*)(0x42668090UL))
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|
#define bFM3_GPIO_PDOR1_P5 *((volatile unsigned int*)(0x42668094UL))
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|
#define bFM3_GPIO_PDOR1_P6 *((volatile unsigned int*)(0x42668098UL))
|
|
#define bFM3_GPIO_PDOR1_P7 *((volatile unsigned int*)(0x4266809CUL))
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|
#define bFM3_GPIO_PDOR1_P8 *((volatile unsigned int*)(0x426680A0UL))
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|
#define bFM3_GPIO_PDOR1_P9 *((volatile unsigned int*)(0x426680A4UL))
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|
#define bFM3_GPIO_PDOR1_PA *((volatile unsigned int*)(0x426680A8UL))
|
|
#define bFM3_GPIO_PDOR1_PB *((volatile unsigned int*)(0x426680ACUL))
|
|
#define bFM3_GPIO_PDOR1_PC *((volatile unsigned int*)(0x426680B0UL))
|
|
#define bFM3_GPIO_PDOR1_PD *((volatile unsigned int*)(0x426680B4UL))
|
|
#define bFM3_GPIO_PDOR1_PE *((volatile unsigned int*)(0x426680B8UL))
|
|
#define bFM3_GPIO_PDOR1_PF *((volatile unsigned int*)(0x426680BCUL))
|
|
#define bFM3_GPIO_PDOR2_P0 *((volatile unsigned int*)(0x42668100UL))
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#define bFM3_GPIO_PDOR2_P1 *((volatile unsigned int*)(0x42668104UL))
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|
#define bFM3_GPIO_PDOR2_P2 *((volatile unsigned int*)(0x42668108UL))
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#define bFM3_GPIO_PDOR2_P3 *((volatile unsigned int*)(0x4266810CUL))
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|
#define bFM3_GPIO_PDOR2_P4 *((volatile unsigned int*)(0x42668110UL))
|
|
#define bFM3_GPIO_PDOR2_P5 *((volatile unsigned int*)(0x42668114UL))
|
|
#define bFM3_GPIO_PDOR2_P6 *((volatile unsigned int*)(0x42668118UL))
|
|
#define bFM3_GPIO_PDOR2_P7 *((volatile unsigned int*)(0x4266811CUL))
|
|
#define bFM3_GPIO_PDOR2_P8 *((volatile unsigned int*)(0x42668120UL))
|
|
#define bFM3_GPIO_PDOR2_P9 *((volatile unsigned int*)(0x42668124UL))
|
|
#define bFM3_GPIO_PDOR3_P6 *((volatile unsigned int*)(0x42668198UL))
|
|
#define bFM3_GPIO_PDOR3_P7 *((volatile unsigned int*)(0x4266819CUL))
|
|
#define bFM3_GPIO_PDOR3_P8 *((volatile unsigned int*)(0x426681A0UL))
|
|
#define bFM3_GPIO_PDOR3_P9 *((volatile unsigned int*)(0x426681A4UL))
|
|
#define bFM3_GPIO_PDOR3_PA *((volatile unsigned int*)(0x426681A8UL))
|
|
#define bFM3_GPIO_PDOR3_PB *((volatile unsigned int*)(0x426681ACUL))
|
|
#define bFM3_GPIO_PDOR3_PC *((volatile unsigned int*)(0x426681B0UL))
|
|
#define bFM3_GPIO_PDOR3_PD *((volatile unsigned int*)(0x426681B4UL))
|
|
#define bFM3_GPIO_PDOR3_PE *((volatile unsigned int*)(0x426681B8UL))
|
|
#define bFM3_GPIO_PDOR3_PF *((volatile unsigned int*)(0x426681BCUL))
|
|
#define bFM3_GPIO_PDOR4_P0 *((volatile unsigned int*)(0x42668200UL))
|
|
#define bFM3_GPIO_PDOR4_P1 *((volatile unsigned int*)(0x42668204UL))
|
|
#define bFM3_GPIO_PDOR4_P2 *((volatile unsigned int*)(0x42668208UL))
|
|
#define bFM3_GPIO_PDOR4_P3 *((volatile unsigned int*)(0x4266820CUL))
|
|
#define bFM3_GPIO_PDOR4_P4 *((volatile unsigned int*)(0x42668210UL))
|
|
#define bFM3_GPIO_PDOR4_P5 *((volatile unsigned int*)(0x42668214UL))
|
|
#define bFM3_GPIO_PDOR4_P6 *((volatile unsigned int*)(0x42668218UL))
|
|
#define bFM3_GPIO_PDOR4_P7 *((volatile unsigned int*)(0x4266821CUL))
|
|
#define bFM3_GPIO_PDOR4_P8 *((volatile unsigned int*)(0x42668220UL))
|
|
#define bFM3_GPIO_PDOR4_P9 *((volatile unsigned int*)(0x42668224UL))
|
|
#define bFM3_GPIO_PDOR4_PA *((volatile unsigned int*)(0x42668228UL))
|
|
#define bFM3_GPIO_PDOR4_PB *((volatile unsigned int*)(0x4266822CUL))
|
|
#define bFM3_GPIO_PDOR4_PC *((volatile unsigned int*)(0x42668230UL))
|
|
#define bFM3_GPIO_PDOR4_PD *((volatile unsigned int*)(0x42668234UL))
|
|
#define bFM3_GPIO_PDOR4_PE *((volatile unsigned int*)(0x42668238UL))
|
|
#define bFM3_GPIO_PDOR5_P0 *((volatile unsigned int*)(0x42668280UL))
|
|
#define bFM3_GPIO_PDOR5_P1 *((volatile unsigned int*)(0x42668284UL))
|
|
#define bFM3_GPIO_PDOR5_P2 *((volatile unsigned int*)(0x42668288UL))
|
|
#define bFM3_GPIO_PDOR5_P3 *((volatile unsigned int*)(0x4266828CUL))
|
|
#define bFM3_GPIO_PDOR5_P4 *((volatile unsigned int*)(0x42668290UL))
|
|
#define bFM3_GPIO_PDOR5_P5 *((volatile unsigned int*)(0x42668294UL))
|
|
#define bFM3_GPIO_PDOR5_P6 *((volatile unsigned int*)(0x42668298UL))
|
|
#define bFM3_GPIO_PDOR5_P7 *((volatile unsigned int*)(0x4266829CUL))
|
|
#define bFM3_GPIO_PDOR5_P8 *((volatile unsigned int*)(0x426682A0UL))
|
|
#define bFM3_GPIO_PDOR5_P9 *((volatile unsigned int*)(0x426682A4UL))
|
|
#define bFM3_GPIO_PDOR5_PA *((volatile unsigned int*)(0x426682A8UL))
|
|
#define bFM3_GPIO_PDOR5_PB *((volatile unsigned int*)(0x426682ACUL))
|
|
#define bFM3_GPIO_PDOR6_P0 *((volatile unsigned int*)(0x42668300UL))
|
|
#define bFM3_GPIO_PDOR6_P1 *((volatile unsigned int*)(0x42668304UL))
|
|
#define bFM3_GPIO_PDOR6_P2 *((volatile unsigned int*)(0x42668308UL))
|
|
#define bFM3_GPIO_PDOR7_P0 *((volatile unsigned int*)(0x42668380UL))
|
|
#define bFM3_GPIO_PDOR7_P1 *((volatile unsigned int*)(0x42668384UL))
|
|
#define bFM3_GPIO_PDOR7_P2 *((volatile unsigned int*)(0x42668388UL))
|
|
#define bFM3_GPIO_PDOR7_P3 *((volatile unsigned int*)(0x4266838CUL))
|
|
#define bFM3_GPIO_PDOR7_P4 *((volatile unsigned int*)(0x42668390UL))
|
|
#define bFM3_GPIO_PDOR7_P5 *((volatile unsigned int*)(0x42668394UL))
|
|
#define bFM3_GPIO_PDOR7_P6 *((volatile unsigned int*)(0x42668398UL))
|
|
#define bFM3_GPIO_PDOR7_P7 *((volatile unsigned int*)(0x4266839CUL))
|
|
#define bFM3_GPIO_PDOR7_P8 *((volatile unsigned int*)(0x426683A0UL))
|
|
#define bFM3_GPIO_PDOR7_P9 *((volatile unsigned int*)(0x426683A4UL))
|
|
#define bFM3_GPIO_PDOR7_PA *((volatile unsigned int*)(0x426683A8UL))
|
|
#define bFM3_GPIO_PDOR8_P0 *((volatile unsigned int*)(0x42668400UL))
|
|
#define bFM3_GPIO_PDOR8_P1 *((volatile unsigned int*)(0x42668404UL))
|
|
#define bFM3_GPIO_PDOR8_P2 *((volatile unsigned int*)(0x42668408UL))
|
|
#define bFM3_GPIO_PDOR8_P3 *((volatile unsigned int*)(0x4266840CUL))
|
|
#define bFM3_GPIO_PDORA_P0 *((volatile unsigned int*)(0x42668500UL))
|
|
#define bFM3_GPIO_PDORA_P1 *((volatile unsigned int*)(0x42668504UL))
|
|
#define bFM3_GPIO_PDORA_P2 *((volatile unsigned int*)(0x42668508UL))
|
|
#define bFM3_GPIO_PDORA_P3 *((volatile unsigned int*)(0x4266850CUL))
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#define bFM3_GPIO_PDORA_P4 *((volatile unsigned int*)(0x42668510UL))
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#define bFM3_GPIO_PDORA_P5 *((volatile unsigned int*)(0x42668514UL))
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#define bFM3_GPIO_PDORC_P0 *((volatile unsigned int*)(0x42668600UL))
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#define bFM3_GPIO_PDORC_P1 *((volatile unsigned int*)(0x42668604UL))
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#define bFM3_GPIO_PDORC_P2 *((volatile unsigned int*)(0x42668608UL))
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#define bFM3_GPIO_PDORC_P3 *((volatile unsigned int*)(0x4266860CUL))
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#define bFM3_GPIO_PDORC_P4 *((volatile unsigned int*)(0x42668610UL))
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#define bFM3_GPIO_PDORC_P5 *((volatile unsigned int*)(0x42668614UL))
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#define bFM3_GPIO_PDORC_P6 *((volatile unsigned int*)(0x42668618UL))
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#define bFM3_GPIO_PDORC_P7 *((volatile unsigned int*)(0x4266861CUL))
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#define bFM3_GPIO_PDORC_P8 *((volatile unsigned int*)(0x42668620UL))
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#define bFM3_GPIO_PDORC_P9 *((volatile unsigned int*)(0x42668624UL))
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#define bFM3_GPIO_PDORC_PA *((volatile unsigned int*)(0x42668628UL))
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#define bFM3_GPIO_PDORC_PB *((volatile unsigned int*)(0x4266862CUL))
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#define bFM3_GPIO_PDORC_PC *((volatile unsigned int*)(0x42668630UL))
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#define bFM3_GPIO_PDORC_PD *((volatile unsigned int*)(0x42668634UL))
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#define bFM3_GPIO_PDORC_PE *((volatile unsigned int*)(0x42668638UL))
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#define bFM3_GPIO_PDORC_PF *((volatile unsigned int*)(0x4266863CUL))
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#define bFM3_GPIO_PDORD_P0 *((volatile unsigned int*)(0x42668680UL))
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#define bFM3_GPIO_PDORD_P1 *((volatile unsigned int*)(0x42668684UL))
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#define bFM3_GPIO_PDORD_P2 *((volatile unsigned int*)(0x42668688UL))
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#define bFM3_GPIO_PDORD_P3 *((volatile unsigned int*)(0x4266868CUL))
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#define bFM3_GPIO_PDORE_P0 *((volatile unsigned int*)(0x42668700UL))
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#define bFM3_GPIO_PDORE_P2 *((volatile unsigned int*)(0x42668708UL))
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#define bFM3_GPIO_PDORE_P3 *((volatile unsigned int*)(0x4266870CUL))
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#define bFM3_GPIO_PDORF_P5 *((volatile unsigned int*)(0x42668794UL))
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#define bFM3_GPIO_PDORF_P6 *((volatile unsigned int*)(0x42668798UL))
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#define bFM3_GPIO_ADE_AN0 *((volatile unsigned int*)(0x4266A000UL))
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#define bFM3_GPIO_ADE_AN1 *((volatile unsigned int*)(0x4266A004UL))
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#define bFM3_GPIO_ADE_AN2 *((volatile unsigned int*)(0x4266A008UL))
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#define bFM3_GPIO_ADE_AN3 *((volatile unsigned int*)(0x4266A00CUL))
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#define bFM3_GPIO_ADE_AN4 *((volatile unsigned int*)(0x4266A010UL))
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#define bFM3_GPIO_ADE_AN5 *((volatile unsigned int*)(0x4266A014UL))
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#define bFM3_GPIO_ADE_AN6 *((volatile unsigned int*)(0x4266A018UL))
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#define bFM3_GPIO_ADE_AN7 *((volatile unsigned int*)(0x4266A01CUL))
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#define bFM3_GPIO_ADE_AN8 *((volatile unsigned int*)(0x4266A020UL))
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#define bFM3_GPIO_ADE_AN9 *((volatile unsigned int*)(0x4266A024UL))
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#define bFM3_GPIO_ADE_AN10 *((volatile unsigned int*)(0x4266A028UL))
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#define bFM3_GPIO_ADE_AN11 *((volatile unsigned int*)(0x4266A02CUL))
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#define bFM3_GPIO_ADE_AN12 *((volatile unsigned int*)(0x4266A030UL))
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#define bFM3_GPIO_ADE_AN13 *((volatile unsigned int*)(0x4266A034UL))
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#define bFM3_GPIO_ADE_AN14 *((volatile unsigned int*)(0x4266A038UL))
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#define bFM3_GPIO_ADE_AN15 *((volatile unsigned int*)(0x4266A03CUL))
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#define bFM3_GPIO_ADE_AN24 *((volatile unsigned int*)(0x4266A060UL))
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#define bFM3_GPIO_ADE_AN25 *((volatile unsigned int*)(0x4266A064UL))
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#define bFM3_GPIO_ADE_AN26 *((volatile unsigned int*)(0x4266A068UL))
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#define bFM3_GPIO_ADE_AN27 *((volatile unsigned int*)(0x4266A06CUL))
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#define bFM3_GPIO_ADE_AN28 *((volatile unsigned int*)(0x4266A070UL))
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#define bFM3_GPIO_ADE_AN29 *((volatile unsigned int*)(0x4266A074UL))
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#define bFM3_GPIO_ADE_AN30 *((volatile unsigned int*)(0x4266A078UL))
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#define bFM3_GPIO_ADE_AN31 *((volatile unsigned int*)(0x4266A07CUL))
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#define bFM3_GPIO_SPSR_SUBXC *((volatile unsigned int*)(0x4266B000UL))
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#define bFM3_GPIO_SPSR_MAINXC *((volatile unsigned int*)(0x4266B008UL))
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#define bFM3_GPIO_SPSR_USB0C *((volatile unsigned int*)(0x4266B010UL))
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#define bFM3_GPIO_SPSR_USB1C *((volatile unsigned int*)(0x4266B014UL))
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#define bFM3_GPIO_EPFR00_NMIS *((volatile unsigned int*)(0x4266C000UL))
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#define bFM3_GPIO_EPFR00_CROUTE0 *((volatile unsigned int*)(0x4266C004UL))
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#define bFM3_GPIO_EPFR00_CROUTE1 *((volatile unsigned int*)(0x4266C008UL))
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#define bFM3_GPIO_EPFR00_SUBOUTE0 *((volatile unsigned int*)(0x4266C018UL))
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#define bFM3_GPIO_EPFR00_SUBOUTE1 *((volatile unsigned int*)(0x4266C01CUL))
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#define bFM3_GPIO_EPFR00_USBP0E *((volatile unsigned int*)(0x4266C024UL))
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#define bFM3_GPIO_EPFR00_USBP1E *((volatile unsigned int*)(0x4266C034UL))
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#define bFM3_GPIO_EPFR00_JTAGEN0B *((volatile unsigned int*)(0x4266C040UL))
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#define bFM3_GPIO_EPFR00_JTAGEN1S *((volatile unsigned int*)(0x4266C044UL))
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#define bFM3_GPIO_EPFR00_TRC0E *((volatile unsigned int*)(0x4266C060UL))
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#define bFM3_GPIO_EPFR00_TRC1E *((volatile unsigned int*)(0x4266C064UL))
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#define bFM3_GPIO_EPFR01_RTO00E0 *((volatile unsigned int*)(0x4266C080UL))
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#define bFM3_GPIO_EPFR01_RTO00E1 *((volatile unsigned int*)(0x4266C084UL))
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#define bFM3_GPIO_EPFR01_RTO01E0 *((volatile unsigned int*)(0x4266C088UL))
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#define bFM3_GPIO_EPFR01_RTO01E1 *((volatile unsigned int*)(0x4266C08CUL))
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#define bFM3_GPIO_EPFR01_RTO02E0 *((volatile unsigned int*)(0x4266C090UL))
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#define bFM3_GPIO_EPFR01_RTO02E1 *((volatile unsigned int*)(0x4266C094UL))
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#define bFM3_GPIO_EPFR01_RTO03E0 *((volatile unsigned int*)(0x4266C098UL))
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#define bFM3_GPIO_EPFR01_RTO03E1 *((volatile unsigned int*)(0x4266C09CUL))
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#define bFM3_GPIO_EPFR01_RTO04E0 *((volatile unsigned int*)(0x4266C0A0UL))
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#define bFM3_GPIO_EPFR01_RTO04E1 *((volatile unsigned int*)(0x4266C0A4UL))
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#define bFM3_GPIO_EPFR01_RTO05E0 *((volatile unsigned int*)(0x4266C0A8UL))
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#define bFM3_GPIO_EPFR01_RTO05E1 *((volatile unsigned int*)(0x4266C0ACUL))
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#define bFM3_GPIO_EPFR01_DTTI0C *((volatile unsigned int*)(0x4266C0B0UL))
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#define bFM3_GPIO_EPFR01_DTTI0S0 *((volatile unsigned int*)(0x4266C0C0UL))
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#define bFM3_GPIO_EPFR01_DTTI0S1 *((volatile unsigned int*)(0x4266C0C4UL))
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#define bFM3_GPIO_EPFR01_FRCK0S0 *((volatile unsigned int*)(0x4266C0C8UL))
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#define bFM3_GPIO_EPFR01_FRCK0S1 *((volatile unsigned int*)(0x4266C0CCUL))
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#define bFM3_GPIO_EPFR01_IC00S0 *((volatile unsigned int*)(0x4266C0D0UL))
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#define bFM3_GPIO_EPFR01_IC00S1 *((volatile unsigned int*)(0x4266C0D4UL))
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#define bFM3_GPIO_EPFR01_IC00S2 *((volatile unsigned int*)(0x4266C0D8UL))
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#define bFM3_GPIO_EPFR01_IC01S0 *((volatile unsigned int*)(0x4266C0DCUL))
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#define bFM3_GPIO_EPFR01_IC01S1 *((volatile unsigned int*)(0x4266C0E0UL))
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#define bFM3_GPIO_EPFR01_IC01S2 *((volatile unsigned int*)(0x4266C0E4UL))
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#define bFM3_GPIO_EPFR01_IC02S0 *((volatile unsigned int*)(0x4266C0E8UL))
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#define bFM3_GPIO_EPFR01_IC02S1 *((volatile unsigned int*)(0x4266C0ECUL))
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#define bFM3_GPIO_EPFR01_IC02S2 *((volatile unsigned int*)(0x4266C0F0UL))
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#define bFM3_GPIO_EPFR01_IC03S0 *((volatile unsigned int*)(0x4266C0F4UL))
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#define bFM3_GPIO_EPFR01_IC03S1 *((volatile unsigned int*)(0x4266C0F8UL))
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#define bFM3_GPIO_EPFR01_IC03S2 *((volatile unsigned int*)(0x4266C0FCUL))
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#define bFM3_GPIO_EPFR02_RTO10E0 *((volatile unsigned int*)(0x4266C100UL))
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#define bFM3_GPIO_EPFR02_RTO10E1 *((volatile unsigned int*)(0x4266C104UL))
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#define bFM3_GPIO_EPFR02_RTO11E0 *((volatile unsigned int*)(0x4266C108UL))
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#define bFM3_GPIO_EPFR02_RTO11E1 *((volatile unsigned int*)(0x4266C10CUL))
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#define bFM3_GPIO_EPFR02_RTO12E0 *((volatile unsigned int*)(0x4266C110UL))
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#define bFM3_GPIO_EPFR02_RTO12E1 *((volatile unsigned int*)(0x4266C114UL))
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#define bFM3_GPIO_EPFR02_RTO13E0 *((volatile unsigned int*)(0x4266C118UL))
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#define bFM3_GPIO_EPFR02_RTO13E1 *((volatile unsigned int*)(0x4266C11CUL))
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#define bFM3_GPIO_EPFR02_RTO14E0 *((volatile unsigned int*)(0x4266C120UL))
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#define bFM3_GPIO_EPFR02_RTO14E1 *((volatile unsigned int*)(0x4266C124UL))
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#define bFM3_GPIO_EPFR02_RTO15E0 *((volatile unsigned int*)(0x4266C128UL))
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#define bFM3_GPIO_EPFR02_RTO15E1 *((volatile unsigned int*)(0x4266C12CUL))
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#define bFM3_GPIO_EPFR02_DTTI1C *((volatile unsigned int*)(0x4266C130UL))
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#define bFM3_GPIO_EPFR02_DTTI1S0 *((volatile unsigned int*)(0x4266C140UL))
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#define bFM3_GPIO_EPFR02_DTTI1S1 *((volatile unsigned int*)(0x4266C144UL))
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#define bFM3_GPIO_EPFR02_FRCK1S0 *((volatile unsigned int*)(0x4266C148UL))
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#define bFM3_GPIO_EPFR02_FRCK1S1 *((volatile unsigned int*)(0x4266C14CUL))
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#define bFM3_GPIO_EPFR02_IC10S0 *((volatile unsigned int*)(0x4266C150UL))
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#define bFM3_GPIO_EPFR02_IC10S1 *((volatile unsigned int*)(0x4266C154UL))
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#define bFM3_GPIO_EPFR02_IC10S2 *((volatile unsigned int*)(0x4266C158UL))
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#define bFM3_GPIO_EPFR02_IC11S0 *((volatile unsigned int*)(0x4266C15CUL))
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#define bFM3_GPIO_EPFR02_IC11S1 *((volatile unsigned int*)(0x4266C160UL))
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#define bFM3_GPIO_EPFR02_IC11S2 *((volatile unsigned int*)(0x4266C164UL))
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#define bFM3_GPIO_EPFR02_IC12S0 *((volatile unsigned int*)(0x4266C168UL))
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#define bFM3_GPIO_EPFR02_IC12S1 *((volatile unsigned int*)(0x4266C16CUL))
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#define bFM3_GPIO_EPFR02_IC12S2 *((volatile unsigned int*)(0x4266C170UL))
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#define bFM3_GPIO_EPFR02_IC13S0 *((volatile unsigned int*)(0x4266C174UL))
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#define bFM3_GPIO_EPFR02_IC13S1 *((volatile unsigned int*)(0x4266C178UL))
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#define bFM3_GPIO_EPFR02_IC13S2 *((volatile unsigned int*)(0x4266C17CUL))
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#define bFM3_GPIO_EPFR03_RTO20E0 *((volatile unsigned int*)(0x4266C180UL))
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#define bFM3_GPIO_EPFR03_RTO20E1 *((volatile unsigned int*)(0x4266C184UL))
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#define bFM3_GPIO_EPFR03_RTO21E0 *((volatile unsigned int*)(0x4266C188UL))
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#define bFM3_GPIO_EPFR03_RTO21E1 *((volatile unsigned int*)(0x4266C18CUL))
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#define bFM3_GPIO_EPFR03_RTO22E0 *((volatile unsigned int*)(0x4266C190UL))
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#define bFM3_GPIO_EPFR03_RTO22E1 *((volatile unsigned int*)(0x4266C194UL))
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#define bFM3_GPIO_EPFR03_RTO23E0 *((volatile unsigned int*)(0x4266C198UL))
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#define bFM3_GPIO_EPFR03_RTO23E1 *((volatile unsigned int*)(0x4266C19CUL))
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#define bFM3_GPIO_EPFR03_RTO24E0 *((volatile unsigned int*)(0x4266C1A0UL))
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#define bFM3_GPIO_EPFR03_RTO24E1 *((volatile unsigned int*)(0x4266C1A4UL))
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#define bFM3_GPIO_EPFR03_RTO25E0 *((volatile unsigned int*)(0x4266C1A8UL))
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#define bFM3_GPIO_EPFR03_RTO25E1 *((volatile unsigned int*)(0x4266C1ACUL))
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#define bFM3_GPIO_EPFR03_DTTI2C *((volatile unsigned int*)(0x4266C1B0UL))
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#define bFM3_GPIO_EPFR03_DTTI2S0 *((volatile unsigned int*)(0x4266C1C0UL))
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#define bFM3_GPIO_EPFR03_DTTI2S1 *((volatile unsigned int*)(0x4266C1C4UL))
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#define bFM3_GPIO_EPFR03_FRCK2S0 *((volatile unsigned int*)(0x4266C1C8UL))
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#define bFM3_GPIO_EPFR03_FRCK2S1 *((volatile unsigned int*)(0x4266C1CCUL))
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#define bFM3_GPIO_EPFR03_IC20S0 *((volatile unsigned int*)(0x4266C1D0UL))
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#define bFM3_GPIO_EPFR03_IC20S1 *((volatile unsigned int*)(0x4266C1D4UL))
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#define bFM3_GPIO_EPFR03_IC20S2 *((volatile unsigned int*)(0x4266C1D8UL))
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#define bFM3_GPIO_EPFR03_IC21S0 *((volatile unsigned int*)(0x4266C1DCUL))
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#define bFM3_GPIO_EPFR03_IC21S1 *((volatile unsigned int*)(0x4266C1E0UL))
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#define bFM3_GPIO_EPFR03_IC21S2 *((volatile unsigned int*)(0x4266C1E4UL))
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#define bFM3_GPIO_EPFR03_IC22S0 *((volatile unsigned int*)(0x4266C1E8UL))
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#define bFM3_GPIO_EPFR03_IC22S1 *((volatile unsigned int*)(0x4266C1ECUL))
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#define bFM3_GPIO_EPFR03_IC22S2 *((volatile unsigned int*)(0x4266C1F0UL))
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#define bFM3_GPIO_EPFR03_IC23S0 *((volatile unsigned int*)(0x4266C1F4UL))
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#define bFM3_GPIO_EPFR03_IC23S1 *((volatile unsigned int*)(0x4266C1F8UL))
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#define bFM3_GPIO_EPFR03_IC23S2 *((volatile unsigned int*)(0x4266C1FCUL))
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#define bFM3_GPIO_EPFR04_TIOA0E0 *((volatile unsigned int*)(0x4266C208UL))
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#define bFM3_GPIO_EPFR04_TIOA0E1 *((volatile unsigned int*)(0x4266C20CUL))
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#define bFM3_GPIO_EPFR04_TIOB0S0 *((volatile unsigned int*)(0x4266C210UL))
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#define bFM3_GPIO_EPFR04_TIOB0S1 *((volatile unsigned int*)(0x4266C214UL))
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#define bFM3_GPIO_EPFR04_TIOA1S0 *((volatile unsigned int*)(0x4266C220UL))
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#define bFM3_GPIO_EPFR04_TIOA1S1 *((volatile unsigned int*)(0x4266C224UL))
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#define bFM3_GPIO_EPFR04_TIOA1E0 *((volatile unsigned int*)(0x4266C228UL))
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#define bFM3_GPIO_EPFR04_TIOA1E1 *((volatile unsigned int*)(0x4266C22CUL))
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#define bFM3_GPIO_EPFR04_TIOB1S0 *((volatile unsigned int*)(0x4266C230UL))
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#define bFM3_GPIO_EPFR04_TIOB1S1 *((volatile unsigned int*)(0x4266C234UL))
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#define bFM3_GPIO_EPFR04_TIOA2E0 *((volatile unsigned int*)(0x4266C248UL))
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#define bFM3_GPIO_EPFR04_TIOA2E1 *((volatile unsigned int*)(0x4266C24CUL))
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#define bFM3_GPIO_EPFR04_TIOB2S0 *((volatile unsigned int*)(0x4266C250UL))
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#define bFM3_GPIO_EPFR04_TIOB2S1 *((volatile unsigned int*)(0x4266C254UL))
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#define bFM3_GPIO_EPFR04_TIOA3S0 *((volatile unsigned int*)(0x4266C260UL))
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#define bFM3_GPIO_EPFR04_TIOA3S1 *((volatile unsigned int*)(0x4266C264UL))
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#define bFM3_GPIO_EPFR04_TIOA3E0 *((volatile unsigned int*)(0x4266C268UL))
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#define bFM3_GPIO_EPFR04_TIOA3E1 *((volatile unsigned int*)(0x4266C26CUL))
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#define bFM3_GPIO_EPFR04_TIOB3S0 *((volatile unsigned int*)(0x4266C270UL))
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#define bFM3_GPIO_EPFR04_TIOB3S1 *((volatile unsigned int*)(0x4266C274UL))
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#define bFM3_GPIO_EPFR05_TIOA4E0 *((volatile unsigned int*)(0x4266C288UL))
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#define bFM3_GPIO_EPFR05_TIOA4E1 *((volatile unsigned int*)(0x4266C28CUL))
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#define bFM3_GPIO_EPFR05_TIOB4S0 *((volatile unsigned int*)(0x4266C290UL))
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#define bFM3_GPIO_EPFR05_TIOB4S1 *((volatile unsigned int*)(0x4266C294UL))
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#define bFM3_GPIO_EPFR05_TIOA5S0 *((volatile unsigned int*)(0x4266C2A0UL))
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#define bFM3_GPIO_EPFR05_TIOA5S1 *((volatile unsigned int*)(0x4266C2A4UL))
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#define bFM3_GPIO_EPFR05_TIOA5E0 *((volatile unsigned int*)(0x4266C2A8UL))
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#define bFM3_GPIO_EPFR05_TIOA5E1 *((volatile unsigned int*)(0x4266C2ACUL))
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#define bFM3_GPIO_EPFR05_TIOB5S0 *((volatile unsigned int*)(0x4266C2B0UL))
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#define bFM3_GPIO_EPFR05_TIOB5S1 *((volatile unsigned int*)(0x4266C2B4UL))
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#define bFM3_GPIO_EPFR05_TIOA6E0 *((volatile unsigned int*)(0x4266C2C8UL))
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#define bFM3_GPIO_EPFR05_TIOA6E1 *((volatile unsigned int*)(0x4266C2CCUL))
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#define bFM3_GPIO_EPFR05_TIOB6S0 *((volatile unsigned int*)(0x4266C2D0UL))
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#define bFM3_GPIO_EPFR05_TIOB6S1 *((volatile unsigned int*)(0x4266C2D4UL))
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#define bFM3_GPIO_EPFR05_TIOA7S0 *((volatile unsigned int*)(0x4266C2E0UL))
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#define bFM3_GPIO_EPFR05_TIOA7S1 *((volatile unsigned int*)(0x4266C2E4UL))
|
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#define bFM3_GPIO_EPFR05_TIOA7E0 *((volatile unsigned int*)(0x4266C2E8UL))
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#define bFM3_GPIO_EPFR05_TIOA7E1 *((volatile unsigned int*)(0x4266C2ECUL))
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#define bFM3_GPIO_EPFR05_TIOB7S0 *((volatile unsigned int*)(0x4266C2F0UL))
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#define bFM3_GPIO_EPFR05_TIOB7S1 *((volatile unsigned int*)(0x4266C2F4UL))
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#define bFM3_GPIO_EPFR06_EINT00S0 *((volatile unsigned int*)(0x4266C300UL))
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#define bFM3_GPIO_EPFR06_EINT00S1 *((volatile unsigned int*)(0x4266C304UL))
|
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#define bFM3_GPIO_EPFR06_EINT01S0 *((volatile unsigned int*)(0x4266C308UL))
|
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#define bFM3_GPIO_EPFR06_EINT01S1 *((volatile unsigned int*)(0x4266C30CUL))
|
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#define bFM3_GPIO_EPFR06_EINT02S0 *((volatile unsigned int*)(0x4266C310UL))
|
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#define bFM3_GPIO_EPFR06_EINT02S1 *((volatile unsigned int*)(0x4266C314UL))
|
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#define bFM3_GPIO_EPFR06_EINT03S0 *((volatile unsigned int*)(0x4266C318UL))
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#define bFM3_GPIO_EPFR06_EINT03S1 *((volatile unsigned int*)(0x4266C31CUL))
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#define bFM3_GPIO_EPFR06_EINT04S0 *((volatile unsigned int*)(0x4266C320UL))
|
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#define bFM3_GPIO_EPFR06_EINT04S1 *((volatile unsigned int*)(0x4266C324UL))
|
|
#define bFM3_GPIO_EPFR06_EINT05S0 *((volatile unsigned int*)(0x4266C328UL))
|
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#define bFM3_GPIO_EPFR06_EINT05S1 *((volatile unsigned int*)(0x4266C32CUL))
|
|
#define bFM3_GPIO_EPFR06_EINT06S0 *((volatile unsigned int*)(0x4266C330UL))
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#define bFM3_GPIO_EPFR06_EINT06S1 *((volatile unsigned int*)(0x4266C334UL))
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#define bFM3_GPIO_EPFR06_EINT07S0 *((volatile unsigned int*)(0x4266C338UL))
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#define bFM3_GPIO_EPFR06_EINT07S1 *((volatile unsigned int*)(0x4266C33CUL))
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#define bFM3_GPIO_EPFR06_EINT08S0 *((volatile unsigned int*)(0x4266C340UL))
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#define bFM3_GPIO_EPFR06_EINT08S1 *((volatile unsigned int*)(0x4266C344UL))
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#define bFM3_GPIO_EPFR06_EINT09S0 *((volatile unsigned int*)(0x4266C348UL))
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#define bFM3_GPIO_EPFR06_EINT09S1 *((volatile unsigned int*)(0x4266C34CUL))
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#define bFM3_GPIO_EPFR06_EINT10S0 *((volatile unsigned int*)(0x4266C350UL))
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#define bFM3_GPIO_EPFR06_EINT10S1 *((volatile unsigned int*)(0x4266C354UL))
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#define bFM3_GPIO_EPFR06_EINT11S0 *((volatile unsigned int*)(0x4266C358UL))
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#define bFM3_GPIO_EPFR06_EINT11S1 *((volatile unsigned int*)(0x4266C35CUL))
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#define bFM3_GPIO_EPFR06_EINT12S0 *((volatile unsigned int*)(0x4266C360UL))
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#define bFM3_GPIO_EPFR06_EINT12S1 *((volatile unsigned int*)(0x4266C364UL))
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#define bFM3_GPIO_EPFR06_EINT13S0 *((volatile unsigned int*)(0x4266C368UL))
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#define bFM3_GPIO_EPFR06_EINT13S1 *((volatile unsigned int*)(0x4266C36CUL))
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#define bFM3_GPIO_EPFR06_EINT14S0 *((volatile unsigned int*)(0x4266C370UL))
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#define bFM3_GPIO_EPFR06_EINT14S1 *((volatile unsigned int*)(0x4266C374UL))
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#define bFM3_GPIO_EPFR06_EINT15S0 *((volatile unsigned int*)(0x4266C378UL))
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#define bFM3_GPIO_EPFR06_EINT15S1 *((volatile unsigned int*)(0x4266C37CUL))
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#define bFM3_GPIO_EPFR07_SIN0S0 *((volatile unsigned int*)(0x4266C390UL))
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#define bFM3_GPIO_EPFR07_SIN0S1 *((volatile unsigned int*)(0x4266C394UL))
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#define bFM3_GPIO_EPFR07_SOT0B0 *((volatile unsigned int*)(0x4266C398UL))
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#define bFM3_GPIO_EPFR07_SOT0B1 *((volatile unsigned int*)(0x4266C39CUL))
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#define bFM3_GPIO_EPFR07_SCK0B0 *((volatile unsigned int*)(0x4266C3A0UL))
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#define bFM3_GPIO_EPFR07_SCK0B1 *((volatile unsigned int*)(0x4266C3A4UL))
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#define bFM3_GPIO_EPFR07_SIN1S0 *((volatile unsigned int*)(0x4266C3A8UL))
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#define bFM3_GPIO_EPFR07_SIN1S1 *((volatile unsigned int*)(0x4266C3ACUL))
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#define bFM3_GPIO_EPFR07_SOT1B0 *((volatile unsigned int*)(0x4266C3B0UL))
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#define bFM3_GPIO_EPFR07_SOT1B1 *((volatile unsigned int*)(0x4266C3B4UL))
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#define bFM3_GPIO_EPFR07_SCK1B0 *((volatile unsigned int*)(0x4266C3B8UL))
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#define bFM3_GPIO_EPFR07_SCK1B1 *((volatile unsigned int*)(0x4266C3BCUL))
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#define bFM3_GPIO_EPFR07_SIN2S0 *((volatile unsigned int*)(0x4266C3C0UL))
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#define bFM3_GPIO_EPFR07_SIN2S1 *((volatile unsigned int*)(0x4266C3C4UL))
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#define bFM3_GPIO_EPFR07_SOT2B0 *((volatile unsigned int*)(0x4266C3C8UL))
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#define bFM3_GPIO_EPFR07_SOT2B1 *((volatile unsigned int*)(0x4266C3CCUL))
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#define bFM3_GPIO_EPFR07_SCK2B0 *((volatile unsigned int*)(0x4266C3D0UL))
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#define bFM3_GPIO_EPFR07_SCK2B1 *((volatile unsigned int*)(0x4266C3D4UL))
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#define bFM3_GPIO_EPFR07_SIN3S0 *((volatile unsigned int*)(0x4266C3D8UL))
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#define bFM3_GPIO_EPFR07_SIN3S1 *((volatile unsigned int*)(0x4266C3DCUL))
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#define bFM3_GPIO_EPFR07_SOT3B0 *((volatile unsigned int*)(0x4266C3E0UL))
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#define bFM3_GPIO_EPFR07_SOT3B1 *((volatile unsigned int*)(0x4266C3E4UL))
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#define bFM3_GPIO_EPFR07_SCK3B0 *((volatile unsigned int*)(0x4266C3E8UL))
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#define bFM3_GPIO_EPFR07_SCK3B1 *((volatile unsigned int*)(0x4266C3ECUL))
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#define bFM3_GPIO_EPFR08_RTS4E0 *((volatile unsigned int*)(0x4266C400UL))
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#define bFM3_GPIO_EPFR08_RTS4E1 *((volatile unsigned int*)(0x4266C404UL))
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#define bFM3_GPIO_EPFR08_CTS4S0 *((volatile unsigned int*)(0x4266C408UL))
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#define bFM3_GPIO_EPFR08_CTS4S1 *((volatile unsigned int*)(0x4266C40CUL))
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#define bFM3_GPIO_EPFR08_SIN4S0 *((volatile unsigned int*)(0x4266C410UL))
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#define bFM3_GPIO_EPFR08_SIN4S1 *((volatile unsigned int*)(0x4266C414UL))
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#define bFM3_GPIO_EPFR08_SOT4B0 *((volatile unsigned int*)(0x4266C418UL))
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#define bFM3_GPIO_EPFR08_SOT4B1 *((volatile unsigned int*)(0x4266C41CUL))
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#define bFM3_GPIO_EPFR08_SCK4B0 *((volatile unsigned int*)(0x4266C420UL))
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#define bFM3_GPIO_EPFR08_SCK4B1 *((volatile unsigned int*)(0x4266C424UL))
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#define bFM3_GPIO_EPFR08_SIN5S0 *((volatile unsigned int*)(0x4266C428UL))
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#define bFM3_GPIO_EPFR08_SIN5S1 *((volatile unsigned int*)(0x4266C42CUL))
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#define bFM3_GPIO_EPFR08_SOT5B0 *((volatile unsigned int*)(0x4266C430UL))
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#define bFM3_GPIO_EPFR08_SOT5B1 *((volatile unsigned int*)(0x4266C434UL))
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#define bFM3_GPIO_EPFR08_SCK5B0 *((volatile unsigned int*)(0x4266C438UL))
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#define bFM3_GPIO_EPFR08_SCK5B1 *((volatile unsigned int*)(0x4266C43CUL))
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#define bFM3_GPIO_EPFR08_SIN6S0 *((volatile unsigned int*)(0x4266C440UL))
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#define bFM3_GPIO_EPFR08_SIN6S1 *((volatile unsigned int*)(0x4266C444UL))
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#define bFM3_GPIO_EPFR08_SOT6B0 *((volatile unsigned int*)(0x4266C448UL))
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#define bFM3_GPIO_EPFR08_SOT6B1 *((volatile unsigned int*)(0x4266C44CUL))
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#define bFM3_GPIO_EPFR08_SCK6B0 *((volatile unsigned int*)(0x4266C450UL))
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#define bFM3_GPIO_EPFR08_SCK6B1 *((volatile unsigned int*)(0x4266C454UL))
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#define bFM3_GPIO_EPFR08_SIN7S0 *((volatile unsigned int*)(0x4266C458UL))
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#define bFM3_GPIO_EPFR08_SIN7S1 *((volatile unsigned int*)(0x4266C45CUL))
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#define bFM3_GPIO_EPFR08_SOT7B0 *((volatile unsigned int*)(0x4266C460UL))
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#define bFM3_GPIO_EPFR08_SOT7B1 *((volatile unsigned int*)(0x4266C464UL))
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#define bFM3_GPIO_EPFR08_SCK7B0 *((volatile unsigned int*)(0x4266C468UL))
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#define bFM3_GPIO_EPFR08_SCK7B1 *((volatile unsigned int*)(0x4266C46CUL))
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#define bFM3_GPIO_EPFR09_QAIN0S0 *((volatile unsigned int*)(0x4266C480UL))
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#define bFM3_GPIO_EPFR09_QAIN0S1 *((volatile unsigned int*)(0x4266C484UL))
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#define bFM3_GPIO_EPFR09_QBIN0S0 *((volatile unsigned int*)(0x4266C488UL))
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#define bFM3_GPIO_EPFR09_QBIN0S1 *((volatile unsigned int*)(0x4266C48CUL))
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#define bFM3_GPIO_EPFR09_QZIN0S0 *((volatile unsigned int*)(0x4266C490UL))
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#define bFM3_GPIO_EPFR09_QZIN0S1 *((volatile unsigned int*)(0x4266C494UL))
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#define bFM3_GPIO_EPFR09_QAIN1S0 *((volatile unsigned int*)(0x4266C498UL))
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#define bFM3_GPIO_EPFR09_QAIN1S1 *((volatile unsigned int*)(0x4266C49CUL))
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#define bFM3_GPIO_EPFR09_QBIN1S0 *((volatile unsigned int*)(0x4266C4A0UL))
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#define bFM3_GPIO_EPFR09_QBIN1S1 *((volatile unsigned int*)(0x4266C4A4UL))
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#define bFM3_GPIO_EPFR09_QZIN1S0 *((volatile unsigned int*)(0x4266C4A8UL))
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#define bFM3_GPIO_EPFR09_QZIN1S1 *((volatile unsigned int*)(0x4266C4ACUL))
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#define bFM3_GPIO_EPFR09_ADTRG0S0 *((volatile unsigned int*)(0x4266C4B0UL))
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#define bFM3_GPIO_EPFR09_ADTRG0S1 *((volatile unsigned int*)(0x4266C4B4UL))
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#define bFM3_GPIO_EPFR09_ADTRG0S2 *((volatile unsigned int*)(0x4266C4B8UL))
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#define bFM3_GPIO_EPFR09_ADTRG0S3 *((volatile unsigned int*)(0x4266C4BCUL))
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#define bFM3_GPIO_EPFR09_ADTRG1S0 *((volatile unsigned int*)(0x4266C4C0UL))
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#define bFM3_GPIO_EPFR09_ADTRG1S1 *((volatile unsigned int*)(0x4266C4C4UL))
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#define bFM3_GPIO_EPFR09_ADTRG1S2 *((volatile unsigned int*)(0x4266C4C8UL))
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#define bFM3_GPIO_EPFR09_ADTRG1S3 *((volatile unsigned int*)(0x4266C4CCUL))
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#define bFM3_GPIO_EPFR09_ADTRG2S0 *((volatile unsigned int*)(0x4266C4D0UL))
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#define bFM3_GPIO_EPFR09_ADTRG2S1 *((volatile unsigned int*)(0x4266C4D4UL))
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#define bFM3_GPIO_EPFR09_ADTRG2S2 *((volatile unsigned int*)(0x4266C4D8UL))
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#define bFM3_GPIO_EPFR09_ADTRG2S3 *((volatile unsigned int*)(0x4266C4DCUL))
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#define bFM3_GPIO_EPFR10_UEDEFB *((volatile unsigned int*)(0x4266C500UL))
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#define bFM3_GPIO_EPFR10_UEDTHB *((volatile unsigned int*)(0x4266C504UL))
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#define bFM3_GPIO_EPFR10_UECLKE *((volatile unsigned int*)(0x4266C508UL))
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#define bFM3_GPIO_EPFR10_UEWEXE *((volatile unsigned int*)(0x4266C50CUL))
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#define bFM3_GPIO_EPFR10_UEDQME *((volatile unsigned int*)(0x4266C510UL))
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#define bFM3_GPIO_EPFR10_UEOEXE *((volatile unsigned int*)(0x4266C514UL))
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#define bFM3_GPIO_EPFR10_UEFLSE *((volatile unsigned int*)(0x4266C518UL))
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#define bFM3_GPIO_EPFR10_UECS1E *((volatile unsigned int*)(0x4266C51CUL))
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#define bFM3_GPIO_EPFR10_UECS2E *((volatile unsigned int*)(0x4266C520UL))
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#define bFM3_GPIO_EPFR10_UECS3E *((volatile unsigned int*)(0x4266C524UL))
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#define bFM3_GPIO_EPFR10_UECS4E *((volatile unsigned int*)(0x4266C528UL))
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#define bFM3_GPIO_EPFR10_UECS5E *((volatile unsigned int*)(0x4266C52CUL))
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#define bFM3_GPIO_EPFR10_UECS6E *((volatile unsigned int*)(0x4266C530UL))
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#define bFM3_GPIO_EPFR10_UECS7E *((volatile unsigned int*)(0x4266C534UL))
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#define bFM3_GPIO_EPFR10_UEAOOE *((volatile unsigned int*)(0x4266C538UL))
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#define bFM3_GPIO_EPFR10_UEA08E *((volatile unsigned int*)(0x4266C53CUL))
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#define bFM3_GPIO_EPFR10_UEA09E *((volatile unsigned int*)(0x4266C540UL))
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#define bFM3_GPIO_EPFR10_UEA10E *((volatile unsigned int*)(0x4266C544UL))
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#define bFM3_GPIO_EPFR10_UEA11E *((volatile unsigned int*)(0x4266C548UL))
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#define bFM3_GPIO_EPFR10_UEA12E *((volatile unsigned int*)(0x4266C54CUL))
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#define bFM3_GPIO_EPFR10_UEA13E *((volatile unsigned int*)(0x4266C550UL))
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#define bFM3_GPIO_EPFR10_UEA14E *((volatile unsigned int*)(0x4266C554UL))
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#define bFM3_GPIO_EPFR10_UEA15E *((volatile unsigned int*)(0x4266C558UL))
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#define bFM3_GPIO_EPFR10_UEA16E *((volatile unsigned int*)(0x4266C55CUL))
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#define bFM3_GPIO_EPFR10_UEA17E *((volatile unsigned int*)(0x4266C560UL))
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#define bFM3_GPIO_EPFR10_UEA18E *((volatile unsigned int*)(0x4266C564UL))
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#define bFM3_GPIO_EPFR11_UEALEE *((volatile unsigned int*)(0x4266C580UL))
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#define bFM3_GPIO_EPFR11_UECS0E *((volatile unsigned int*)(0x4266C584UL))
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#define bFM3_GPIO_EPFR11_UEA01E *((volatile unsigned int*)(0x4266C588UL))
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#define bFM3_GPIO_EPFR11_UEA02E *((volatile unsigned int*)(0x4266C58CUL))
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#define bFM3_GPIO_EPFR11_UEA03E *((volatile unsigned int*)(0x4266C590UL))
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#define bFM3_GPIO_EPFR11_UEA04E *((volatile unsigned int*)(0x4266C594UL))
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#define bFM3_GPIO_EPFR11_UEA05E *((volatile unsigned int*)(0x4266C598UL))
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#define bFM3_GPIO_EPFR11_UEA06E *((volatile unsigned int*)(0x4266C59CUL))
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#define bFM3_GPIO_EPFR11_UEA07E *((volatile unsigned int*)(0x4266C5A0UL))
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#define bFM3_GPIO_EPFR11_UED00B *((volatile unsigned int*)(0x4266C5A4UL))
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#define bFM3_GPIO_EPFR11_UED01B *((volatile unsigned int*)(0x4266C5A8UL))
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#define bFM3_GPIO_EPFR11_UED02B *((volatile unsigned int*)(0x4266C5ACUL))
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#define bFM3_GPIO_EPFR11_UED03B *((volatile unsigned int*)(0x4266C5B0UL))
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#define bFM3_GPIO_EPFR11_UED04B *((volatile unsigned int*)(0x4266C5B4UL))
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#define bFM3_GPIO_EPFR11_UED05B *((volatile unsigned int*)(0x4266C5B8UL))
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#define bFM3_GPIO_EPFR11_UED06B *((volatile unsigned int*)(0x4266C5BCUL))
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#define bFM3_GPIO_EPFR11_UED07B *((volatile unsigned int*)(0x4266C5C0UL))
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#define bFM3_GPIO_EPFR11_UED08B *((volatile unsigned int*)(0x4266C5C4UL))
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#define bFM3_GPIO_EPFR11_UED09B *((volatile unsigned int*)(0x4266C5C8UL))
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#define bFM3_GPIO_EPFR11_UED10B *((volatile unsigned int*)(0x4266C5CCUL))
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#define bFM3_GPIO_EPFR11_UED11B *((volatile unsigned int*)(0x4266C5D0UL))
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#define bFM3_GPIO_EPFR11_UED12B *((volatile unsigned int*)(0x4266C5D4UL))
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#define bFM3_GPIO_EPFR11_UED13B *((volatile unsigned int*)(0x4266C5D8UL))
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#define bFM3_GPIO_EPFR11_UED14B *((volatile unsigned int*)(0x4266C5DCUL))
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#define bFM3_GPIO_EPFR11_UED15B *((volatile unsigned int*)(0x4266C5E0UL))
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#define bFM3_GPIO_EPFR11_UERLC *((volatile unsigned int*)(0x4266C5E4UL))
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#define bFM3_GPIO_EPFR12_TIOA8E0 *((volatile unsigned int*)(0x4266C608UL))
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#define bFM3_GPIO_EPFR12_TIOA8E1 *((volatile unsigned int*)(0x4266C60CUL))
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#define bFM3_GPIO_EPFR12_TIOB8S0 *((volatile unsigned int*)(0x4266C610UL))
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#define bFM3_GPIO_EPFR12_TIOB8S1 *((volatile unsigned int*)(0x4266C614UL))
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#define bFM3_GPIO_EPFR12_TIOA9S0 *((volatile unsigned int*)(0x4266C620UL))
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#define bFM3_GPIO_EPFR12_TIOA9S1 *((volatile unsigned int*)(0x4266C624UL))
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#define bFM3_GPIO_EPFR12_TIOA9E0 *((volatile unsigned int*)(0x4266C628UL))
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#define bFM3_GPIO_EPFR12_TIOA9E1 *((volatile unsigned int*)(0x4266C62CUL))
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#define bFM3_GPIO_EPFR12_TIOB9S0 *((volatile unsigned int*)(0x4266C630UL))
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#define bFM3_GPIO_EPFR12_TIOB9S1 *((volatile unsigned int*)(0x4266C634UL))
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#define bFM3_GPIO_EPFR12_TIOA10E0 *((volatile unsigned int*)(0x4266C648UL))
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#define bFM3_GPIO_EPFR12_TIOA10E1 *((volatile unsigned int*)(0x4266C64CUL))
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#define bFM3_GPIO_EPFR12_TIOB10S0 *((volatile unsigned int*)(0x4266C650UL))
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#define bFM3_GPIO_EPFR12_TIOB10S1 *((volatile unsigned int*)(0x4266C654UL))
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#define bFM3_GPIO_EPFR12_TIOA11S0 *((volatile unsigned int*)(0x4266C660UL))
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#define bFM3_GPIO_EPFR12_TIOA11S1 *((volatile unsigned int*)(0x4266C664UL))
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#define bFM3_GPIO_EPFR12_TIOA11E0 *((volatile unsigned int*)(0x4266C668UL))
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#define bFM3_GPIO_EPFR12_TIOA11E1 *((volatile unsigned int*)(0x4266C66CUL))
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#define bFM3_GPIO_EPFR12_TIOB11S0 *((volatile unsigned int*)(0x4266C670UL))
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#define bFM3_GPIO_EPFR12_TIOB11S1 *((volatile unsigned int*)(0x4266C674UL))
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#define bFM3_GPIO_EPFR13_TIOA12E0 *((volatile unsigned int*)(0x4266C688UL))
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#define bFM3_GPIO_EPFR13_TIOA12E1 *((volatile unsigned int*)(0x4266C68CUL))
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#define bFM3_GPIO_EPFR13_TIOB12S0 *((volatile unsigned int*)(0x4266C690UL))
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#define bFM3_GPIO_EPFR13_TIOB12S1 *((volatile unsigned int*)(0x4266C694UL))
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#define bFM3_GPIO_EPFR13_TIOA13S0 *((volatile unsigned int*)(0x4266C6A0UL))
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#define bFM3_GPIO_EPFR13_TIOA13S1 *((volatile unsigned int*)(0x4266C6A4UL))
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#define bFM3_GPIO_EPFR13_TIOA13E0 *((volatile unsigned int*)(0x4266C6A8UL))
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#define bFM3_GPIO_EPFR13_TIOA13E1 *((volatile unsigned int*)(0x4266C6ACUL))
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#define bFM3_GPIO_EPFR13_TIOB13S0 *((volatile unsigned int*)(0x4266C6B0UL))
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#define bFM3_GPIO_EPFR13_TIOB13S1 *((volatile unsigned int*)(0x4266C6B4UL))
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#define bFM3_GPIO_EPFR13_TIOA14E0 *((volatile unsigned int*)(0x4266C6C8UL))
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#define bFM3_GPIO_EPFR13_TIOA14E1 *((volatile unsigned int*)(0x4266C6CCUL))
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#define bFM3_GPIO_EPFR13_TIOB14S0 *((volatile unsigned int*)(0x4266C6D0UL))
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#define bFM3_GPIO_EPFR13_TIOB14S1 *((volatile unsigned int*)(0x4266C6D4UL))
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#define bFM3_GPIO_EPFR13_TIOA15S0 *((volatile unsigned int*)(0x4266C6E0UL))
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#define bFM3_GPIO_EPFR13_TIOA15S1 *((volatile unsigned int*)(0x4266C6E4UL))
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#define bFM3_GPIO_EPFR13_TIOA15E0 *((volatile unsigned int*)(0x4266C6E8UL))
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#define bFM3_GPIO_EPFR13_TIOA15E1 *((volatile unsigned int*)(0x4266C6ECUL))
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#define bFM3_GPIO_EPFR13_TIOB15S0 *((volatile unsigned int*)(0x4266C6F0UL))
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#define bFM3_GPIO_EPFR13_TIOB15S1 *((volatile unsigned int*)(0x4266C6F4UL))
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#define bFM3_GPIO_EPFR14_QAIN2S0 *((volatile unsigned int*)(0x4266C700UL))
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#define bFM3_GPIO_EPFR14_QAIN2S1 *((volatile unsigned int*)(0x4266C704UL))
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#define bFM3_GPIO_EPFR14_QBIN2S0 *((volatile unsigned int*)(0x4266C708UL))
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#define bFM3_GPIO_EPFR14_QBIN2S1 *((volatile unsigned int*)(0x4266C70CUL))
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#define bFM3_GPIO_EPFR14_QZIN2S0 *((volatile unsigned int*)(0x4266C710UL))
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#define bFM3_GPIO_EPFR14_QZIN2S1 *((volatile unsigned int*)(0x4266C714UL))
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#define bFM3_GPIO_EPFR14_E_TD0E *((volatile unsigned int*)(0x4266C748UL))
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#define bFM3_GPIO_EPFR14_E_TD1E *((volatile unsigned int*)(0x4266C74CUL))
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#define bFM3_GPIO_EPFR14_E_TE0E *((volatile unsigned int*)(0x4266C750UL))
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#define bFM3_GPIO_EPFR14_E_TE1E *((volatile unsigned int*)(0x4266C754UL))
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#define bFM3_GPIO_EPFR14_E_MC0E *((volatile unsigned int*)(0x4266C758UL))
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#define bFM3_GPIO_EPFR14_E_MC1B *((volatile unsigned int*)(0x4266C75CUL))
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#define bFM3_GPIO_EPFR14_E_MD0B *((volatile unsigned int*)(0x4266C760UL))
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#define bFM3_GPIO_EPFR14_E_MD1B *((volatile unsigned int*)(0x4266C764UL))
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#define bFM3_GPIO_EPFR14_E_CKE *((volatile unsigned int*)(0x4266C768UL))
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|
#define bFM3_GPIO_EPFR14_E_PSE *((volatile unsigned int*)(0x4266C76CUL))
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|
#define bFM3_GPIO_EPFR14_E_SPLC0 *((volatile unsigned int*)(0x4266C770UL))
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|
#define bFM3_GPIO_EPFR14_E_SPLC1 *((volatile unsigned int*)(0x4266C774UL))
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#define bFM3_GPIO_EPFR15_EINT16S0 *((volatile unsigned int*)(0x4266C780UL))
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|
#define bFM3_GPIO_EPFR15_EINT16S1 *((volatile unsigned int*)(0x4266C784UL))
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|
#define bFM3_GPIO_EPFR15_EINT17S0 *((volatile unsigned int*)(0x4266C788UL))
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|
#define bFM3_GPIO_EPFR15_EINT17S1 *((volatile unsigned int*)(0x4266C78CUL))
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|
#define bFM3_GPIO_EPFR15_EINT18S0 *((volatile unsigned int*)(0x4266C790UL))
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|
#define bFM3_GPIO_EPFR15_EINT18S1 *((volatile unsigned int*)(0x4266C794UL))
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|
#define bFM3_GPIO_EPFR15_EINT19S0 *((volatile unsigned int*)(0x4266C798UL))
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|
#define bFM3_GPIO_EPFR15_EINT19S1 *((volatile unsigned int*)(0x4266C79CUL))
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|
#define bFM3_GPIO_EPFR15_EINT20S0 *((volatile unsigned int*)(0x4266C7A0UL))
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|
#define bFM3_GPIO_EPFR15_EINT20S1 *((volatile unsigned int*)(0x4266C7A4UL))
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|
#define bFM3_GPIO_EPFR15_EINT21S0 *((volatile unsigned int*)(0x4266C7A8UL))
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|
#define bFM3_GPIO_EPFR15_EINT21S1 *((volatile unsigned int*)(0x4266C7ACUL))
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|
#define bFM3_GPIO_EPFR15_EINT22S0 *((volatile unsigned int*)(0x4266C7B0UL))
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|
#define bFM3_GPIO_EPFR15_EINT22S1 *((volatile unsigned int*)(0x4266C7B4UL))
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|
#define bFM3_GPIO_EPFR15_EINT23S0 *((volatile unsigned int*)(0x4266C7B8UL))
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|
#define bFM3_GPIO_EPFR15_EINT23S1 *((volatile unsigned int*)(0x4266C7BCUL))
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|
#define bFM3_GPIO_EPFR15_EINT24S0 *((volatile unsigned int*)(0x4266C7C0UL))
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|
#define bFM3_GPIO_EPFR15_EINT24S1 *((volatile unsigned int*)(0x4266C7C4UL))
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|
#define bFM3_GPIO_EPFR15_EINT25S0 *((volatile unsigned int*)(0x4266C7C8UL))
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#define bFM3_GPIO_EPFR15_EINT25S1 *((volatile unsigned int*)(0x4266C7CCUL))
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|
#define bFM3_GPIO_EPFR15_EINT26S0 *((volatile unsigned int*)(0x4266C7D0UL))
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|
#define bFM3_GPIO_EPFR15_EINT26S1 *((volatile unsigned int*)(0x4266C7D4UL))
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|
#define bFM3_GPIO_EPFR15_EINT27S0 *((volatile unsigned int*)(0x4266C7D8UL))
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|
#define bFM3_GPIO_EPFR15_EINT27S1 *((volatile unsigned int*)(0x4266C7DCUL))
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|
#define bFM3_GPIO_EPFR15_EINT28S0 *((volatile unsigned int*)(0x4266C7E0UL))
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|
#define bFM3_GPIO_EPFR15_EINT28S1 *((volatile unsigned int*)(0x4266C7E4UL))
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|
#define bFM3_GPIO_EPFR15_EINT29S0 *((volatile unsigned int*)(0x4266C7E8UL))
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|
#define bFM3_GPIO_EPFR15_EINT29S1 *((volatile unsigned int*)(0x4266C7ECUL))
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|
#define bFM3_GPIO_EPFR15_EINT30S0 *((volatile unsigned int*)(0x4266C7F0UL))
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|
#define bFM3_GPIO_EPFR15_EINT30S1 *((volatile unsigned int*)(0x4266C7F4UL))
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|
#define bFM3_GPIO_EPFR15_EINT31S0 *((volatile unsigned int*)(0x4266C7F8UL))
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#define bFM3_GPIO_EPFR15_EINT31S1 *((volatile unsigned int*)(0x4266C7FCUL))
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#define bFM3_GPIO_PZR0_P0 *((volatile unsigned int*)(0x4266E000UL))
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#define bFM3_GPIO_PZR0_P1 *((volatile unsigned int*)(0x4266E004UL))
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|
#define bFM3_GPIO_PZR0_P2 *((volatile unsigned int*)(0x4266E008UL))
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|
#define bFM3_GPIO_PZR0_P3 *((volatile unsigned int*)(0x4266E00CUL))
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|
#define bFM3_GPIO_PZR0_P4 *((volatile unsigned int*)(0x4266E010UL))
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|
#define bFM3_GPIO_PZR0_P5 *((volatile unsigned int*)(0x4266E014UL))
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|
#define bFM3_GPIO_PZR0_P6 *((volatile unsigned int*)(0x4266E018UL))
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|
#define bFM3_GPIO_PZR0_P7 *((volatile unsigned int*)(0x4266E01CUL))
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|
#define bFM3_GPIO_PZR0_P8 *((volatile unsigned int*)(0x4266E020UL))
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|
#define bFM3_GPIO_PZR0_P9 *((volatile unsigned int*)(0x4266E024UL))
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|
#define bFM3_GPIO_PZR1_P0 *((volatile unsigned int*)(0x4266E080UL))
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|
#define bFM3_GPIO_PZR1_P1 *((volatile unsigned int*)(0x4266E084UL))
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|
#define bFM3_GPIO_PZR1_P2 *((volatile unsigned int*)(0x4266E088UL))
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|
#define bFM3_GPIO_PZR1_P3 *((volatile unsigned int*)(0x4266E08CUL))
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|
#define bFM3_GPIO_PZR1_P4 *((volatile unsigned int*)(0x4266E090UL))
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|
#define bFM3_GPIO_PZR1_P5 *((volatile unsigned int*)(0x4266E094UL))
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|
#define bFM3_GPIO_PZR1_P6 *((volatile unsigned int*)(0x4266E098UL))
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|
#define bFM3_GPIO_PZR1_P7 *((volatile unsigned int*)(0x4266E09CUL))
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|
#define bFM3_GPIO_PZR1_P8 *((volatile unsigned int*)(0x4266E0A0UL))
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|
#define bFM3_GPIO_PZR1_P9 *((volatile unsigned int*)(0x4266E0A4UL))
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|
#define bFM3_GPIO_PZR1_PA *((volatile unsigned int*)(0x4266E0A8UL))
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|
#define bFM3_GPIO_PZR1_PB *((volatile unsigned int*)(0x4266E0ACUL))
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|
#define bFM3_GPIO_PZR1_PC *((volatile unsigned int*)(0x4266E0B0UL))
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|
#define bFM3_GPIO_PZR1_PD *((volatile unsigned int*)(0x4266E0B4UL))
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|
#define bFM3_GPIO_PZR1_PE *((volatile unsigned int*)(0x4266E0B8UL))
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|
#define bFM3_GPIO_PZR1_PF *((volatile unsigned int*)(0x4266E0BCUL))
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|
#define bFM3_GPIO_PZR2_P0 *((volatile unsigned int*)(0x4266E100UL))
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|
#define bFM3_GPIO_PZR2_P1 *((volatile unsigned int*)(0x4266E104UL))
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|
#define bFM3_GPIO_PZR2_P2 *((volatile unsigned int*)(0x4266E108UL))
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|
#define bFM3_GPIO_PZR2_P3 *((volatile unsigned int*)(0x4266E10CUL))
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|
#define bFM3_GPIO_PZR2_P4 *((volatile unsigned int*)(0x4266E110UL))
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|
#define bFM3_GPIO_PZR2_P5 *((volatile unsigned int*)(0x4266E114UL))
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|
#define bFM3_GPIO_PZR2_P6 *((volatile unsigned int*)(0x4266E118UL))
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|
#define bFM3_GPIO_PZR2_P7 *((volatile unsigned int*)(0x4266E11CUL))
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|
#define bFM3_GPIO_PZR2_P8 *((volatile unsigned int*)(0x4266E120UL))
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|
#define bFM3_GPIO_PZR2_P9 *((volatile unsigned int*)(0x4266E124UL))
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|
#define bFM3_GPIO_PZR3_P6 *((volatile unsigned int*)(0x4266E198UL))
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|
#define bFM3_GPIO_PZR3_P7 *((volatile unsigned int*)(0x4266E19CUL))
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|
#define bFM3_GPIO_PZR3_P8 *((volatile unsigned int*)(0x4266E1A0UL))
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|
#define bFM3_GPIO_PZR3_P9 *((volatile unsigned int*)(0x4266E1A4UL))
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|
#define bFM3_GPIO_PZR3_PA *((volatile unsigned int*)(0x4266E1A8UL))
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|
#define bFM3_GPIO_PZR3_PB *((volatile unsigned int*)(0x4266E1ACUL))
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|
#define bFM3_GPIO_PZR3_PC *((volatile unsigned int*)(0x4266E1B0UL))
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|
#define bFM3_GPIO_PZR3_PD *((volatile unsigned int*)(0x4266E1B4UL))
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|
#define bFM3_GPIO_PZR3_PE *((volatile unsigned int*)(0x4266E1B8UL))
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|
#define bFM3_GPIO_PZR3_PF *((volatile unsigned int*)(0x4266E1BCUL))
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|
#define bFM3_GPIO_PZR4_P0 *((volatile unsigned int*)(0x4266E200UL))
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|
#define bFM3_GPIO_PZR4_P1 *((volatile unsigned int*)(0x4266E204UL))
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|
#define bFM3_GPIO_PZR4_P2 *((volatile unsigned int*)(0x4266E208UL))
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|
#define bFM3_GPIO_PZR4_P3 *((volatile unsigned int*)(0x4266E20CUL))
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|
#define bFM3_GPIO_PZR4_P4 *((volatile unsigned int*)(0x4266E210UL))
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|
#define bFM3_GPIO_PZR4_P5 *((volatile unsigned int*)(0x4266E214UL))
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|
#define bFM3_GPIO_PZR4_P6 *((volatile unsigned int*)(0x4266E218UL))
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|
#define bFM3_GPIO_PZR4_P7 *((volatile unsigned int*)(0x4266E21CUL))
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|
#define bFM3_GPIO_PZR4_P8 *((volatile unsigned int*)(0x4266E220UL))
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|
#define bFM3_GPIO_PZR4_P9 *((volatile unsigned int*)(0x4266E224UL))
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|
#define bFM3_GPIO_PZR4_PA *((volatile unsigned int*)(0x4266E228UL))
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|
#define bFM3_GPIO_PZR4_PB *((volatile unsigned int*)(0x4266E22CUL))
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|
#define bFM3_GPIO_PZR4_PC *((volatile unsigned int*)(0x4266E230UL))
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|
#define bFM3_GPIO_PZR4_PD *((volatile unsigned int*)(0x4266E234UL))
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|
#define bFM3_GPIO_PZR4_PE *((volatile unsigned int*)(0x4266E238UL))
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#define bFM3_GPIO_PZR5_P0 *((volatile unsigned int*)(0x4266E280UL))
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#define bFM3_GPIO_PZR5_P1 *((volatile unsigned int*)(0x4266E284UL))
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|
#define bFM3_GPIO_PZR5_P2 *((volatile unsigned int*)(0x4266E288UL))
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|
#define bFM3_GPIO_PZR5_P3 *((volatile unsigned int*)(0x4266E28CUL))
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#define bFM3_GPIO_PZR5_P4 *((volatile unsigned int*)(0x4266E290UL))
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|
#define bFM3_GPIO_PZR5_P5 *((volatile unsigned int*)(0x4266E294UL))
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|
#define bFM3_GPIO_PZR5_P6 *((volatile unsigned int*)(0x4266E298UL))
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|
#define bFM3_GPIO_PZR5_P7 *((volatile unsigned int*)(0x4266E29CUL))
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|
#define bFM3_GPIO_PZR5_P8 *((volatile unsigned int*)(0x4266E2A0UL))
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|
#define bFM3_GPIO_PZR5_P9 *((volatile unsigned int*)(0x4266E2A4UL))
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|
#define bFM3_GPIO_PZR5_PA *((volatile unsigned int*)(0x4266E2A8UL))
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|
#define bFM3_GPIO_PZR5_PB *((volatile unsigned int*)(0x4266E2ACUL))
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|
#define bFM3_GPIO_PZR6_P0 *((volatile unsigned int*)(0x4266E300UL))
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|
#define bFM3_GPIO_PZR6_P1 *((volatile unsigned int*)(0x4266E304UL))
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|
#define bFM3_GPIO_PZR6_P2 *((volatile unsigned int*)(0x4266E308UL))
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|
#define bFM3_GPIO_PZR7_P0 *((volatile unsigned int*)(0x4266E380UL))
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|
#define bFM3_GPIO_PZR7_P1 *((volatile unsigned int*)(0x4266E384UL))
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|
#define bFM3_GPIO_PZR7_P2 *((volatile unsigned int*)(0x4266E388UL))
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|
#define bFM3_GPIO_PZR7_P3 *((volatile unsigned int*)(0x4266E38CUL))
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|
#define bFM3_GPIO_PZR7_P4 *((volatile unsigned int*)(0x4266E390UL))
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|
#define bFM3_GPIO_PZR7_P5 *((volatile unsigned int*)(0x4266E394UL))
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|
#define bFM3_GPIO_PZR7_P6 *((volatile unsigned int*)(0x4266E398UL))
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|
#define bFM3_GPIO_PZR7_P7 *((volatile unsigned int*)(0x4266E39CUL))
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|
#define bFM3_GPIO_PZR7_P8 *((volatile unsigned int*)(0x4266E3A0UL))
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|
#define bFM3_GPIO_PZR7_P9 *((volatile unsigned int*)(0x4266E3A4UL))
|
|
#define bFM3_GPIO_PZR7_PA *((volatile unsigned int*)(0x4266E3A8UL))
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|
#define bFM3_GPIO_PZR8_P0 *((volatile unsigned int*)(0x4266E400UL))
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|
#define bFM3_GPIO_PZR8_P1 *((volatile unsigned int*)(0x4266E404UL))
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|
#define bFM3_GPIO_PZR8_P2 *((volatile unsigned int*)(0x4266E408UL))
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|
#define bFM3_GPIO_PZR8_P3 *((volatile unsigned int*)(0x4266E40CUL))
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|
#define bFM3_GPIO_PZRA_P0 *((volatile unsigned int*)(0x4266E500UL))
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|
#define bFM3_GPIO_PZRA_P1 *((volatile unsigned int*)(0x4266E504UL))
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|
#define bFM3_GPIO_PZRA_P2 *((volatile unsigned int*)(0x4266E508UL))
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|
#define bFM3_GPIO_PZRA_P3 *((volatile unsigned int*)(0x4266E50CUL))
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|
#define bFM3_GPIO_PZRA_P4 *((volatile unsigned int*)(0x4266E510UL))
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|
#define bFM3_GPIO_PZRA_P5 *((volatile unsigned int*)(0x4266E514UL))
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|
#define bFM3_GPIO_PZRC_P0 *((volatile unsigned int*)(0x4266E600UL))
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|
#define bFM3_GPIO_PZRC_P1 *((volatile unsigned int*)(0x4266E604UL))
|
|
#define bFM3_GPIO_PZRC_P2 *((volatile unsigned int*)(0x4266E608UL))
|
|
#define bFM3_GPIO_PZRC_P3 *((volatile unsigned int*)(0x4266E60CUL))
|
|
#define bFM3_GPIO_PZRC_P4 *((volatile unsigned int*)(0x4266E610UL))
|
|
#define bFM3_GPIO_PZRC_P5 *((volatile unsigned int*)(0x4266E614UL))
|
|
#define bFM3_GPIO_PZRC_P6 *((volatile unsigned int*)(0x4266E618UL))
|
|
#define bFM3_GPIO_PZRC_P7 *((volatile unsigned int*)(0x4266E61CUL))
|
|
#define bFM3_GPIO_PZRC_P8 *((volatile unsigned int*)(0x4266E620UL))
|
|
#define bFM3_GPIO_PZRC_P9 *((volatile unsigned int*)(0x4266E624UL))
|
|
#define bFM3_GPIO_PZRC_PA *((volatile unsigned int*)(0x4266E628UL))
|
|
#define bFM3_GPIO_PZRC_PB *((volatile unsigned int*)(0x4266E62CUL))
|
|
#define bFM3_GPIO_PZRC_PC *((volatile unsigned int*)(0x4266E630UL))
|
|
#define bFM3_GPIO_PZRC_PD *((volatile unsigned int*)(0x4266E634UL))
|
|
#define bFM3_GPIO_PZRC_PE *((volatile unsigned int*)(0x4266E638UL))
|
|
#define bFM3_GPIO_PZRC_PF *((volatile unsigned int*)(0x4266E63CUL))
|
|
#define bFM3_GPIO_PZRD_P0 *((volatile unsigned int*)(0x4266E680UL))
|
|
#define bFM3_GPIO_PZRD_P1 *((volatile unsigned int*)(0x4266E684UL))
|
|
#define bFM3_GPIO_PZRD_P2 *((volatile unsigned int*)(0x4266E688UL))
|
|
#define bFM3_GPIO_PZRD_P3 *((volatile unsigned int*)(0x4266E68CUL))
|
|
#define bFM3_GPIO_PZRE_P0 *((volatile unsigned int*)(0x4266E700UL))
|
|
#define bFM3_GPIO_PZRE_P2 *((volatile unsigned int*)(0x4266E708UL))
|
|
#define bFM3_GPIO_PZRE_P3 *((volatile unsigned int*)(0x4266E70CUL))
|
|
#define bFM3_GPIO_PZRF_P5 *((volatile unsigned int*)(0x4266E794UL))
|
|
#define bFM3_GPIO_PZRF_P6 *((volatile unsigned int*)(0x4266E798UL))
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|
|
|
/* Low voltage detection registers */
|
|
#define bFM3_LVD_LVD_CTL_SVHI0 *((volatile unsigned int*)(0x426A0008UL))
|
|
#define bFM3_LVD_LVD_CTL_SVHI1 *((volatile unsigned int*)(0x426A000CUL))
|
|
#define bFM3_LVD_LVD_CTL_SVHI2 *((volatile unsigned int*)(0x426A0010UL))
|
|
#define bFM3_LVD_LVD_CTL_SVHI3 *((volatile unsigned int*)(0x426A0014UL))
|
|
#define bFM3_LVD_LVD_CTL_LVDIE *((volatile unsigned int*)(0x426A001CUL))
|
|
#define bFM3_LVD_LVD_STR_LVDIR *((volatile unsigned int*)(0x426A009CUL))
|
|
#define bFM3_LVD_LVD_CLR_LVDCL *((volatile unsigned int*)(0x426A011CUL))
|
|
#define bFM3_LVD_LVD_STR2_LVDIRDY *((volatile unsigned int*)(0x426A021CUL))
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|
|
|
/* USB clock registers */
|
|
#define bFM3_USBETHERNETCLK_UCCR_UCEN0 *((volatile unsigned int*)(0x426C0000UL))
|
|
#define bFM3_USBETHERNETCLK_UCCR_UCSEL0 *((volatile unsigned int*)(0x426C0004UL))
|
|
#define bFM3_USBETHERNETCLK_UCCR_UCSEL1 *((volatile unsigned int*)(0x426C0008UL))
|
|
#define bFM3_USBETHERNETCLK_UCCR_UCEN1 *((volatile unsigned int*)(0x426C000CUL))
|
|
#define bFM3_USBETHERNETCLK_UCCR_ECEN *((volatile unsigned int*)(0x426C0010UL))
|
|
#define bFM3_USBETHERNETCLK_UCCR_ECSEL0 *((volatile unsigned int*)(0x426C0014UL))
|
|
#define bFM3_USBETHERNETCLK_UCCR_ECSEL1 *((volatile unsigned int*)(0x426C0018UL))
|
|
#define bFM3_USBETHERNETCLK_UPCR1_UPLLEN *((volatile unsigned int*)(0x426C0080UL))
|
|
#define bFM3_USBETHERNETCLK_UPCR1_UPINC *((volatile unsigned int*)(0x426C0084UL))
|
|
#define bFM3_USBETHERNETCLK_UPCR2_UPOWT0 *((volatile unsigned int*)(0x426C0100UL))
|
|
#define bFM3_USBETHERNETCLK_UPCR2_UPOWT1 *((volatile unsigned int*)(0x426C0104UL))
|
|
#define bFM3_USBETHERNETCLK_UPCR2_UPOWT2 *((volatile unsigned int*)(0x426C0108UL))
|
|
#define bFM3_USBETHERNETCLK_UPCR3_UPLLK0 *((volatile unsigned int*)(0x426C0180UL))
|
|
#define bFM3_USBETHERNETCLK_UPCR3_UPLLK1 *((volatile unsigned int*)(0x426C0184UL))
|
|
#define bFM3_USBETHERNETCLK_UPCR3_UPLLK2 *((volatile unsigned int*)(0x426C0188UL))
|
|
#define bFM3_USBETHERNETCLK_UPCR3_UPLLK3 *((volatile unsigned int*)(0x426C018CUL))
|
|
#define bFM3_USBETHERNETCLK_UPCR3_UPLLK4 *((volatile unsigned int*)(0x426C0190UL))
|
|
#define bFM3_USBETHERNETCLK_UPCR4_UPLLN0 *((volatile unsigned int*)(0x426C0200UL))
|
|
#define bFM3_USBETHERNETCLK_UPCR4_UPLLN1 *((volatile unsigned int*)(0x426C0204UL))
|
|
#define bFM3_USBETHERNETCLK_UPCR4_UPLLN2 *((volatile unsigned int*)(0x426C0208UL))
|
|
#define bFM3_USBETHERNETCLK_UPCR4_UPLLN3 *((volatile unsigned int*)(0x426C020CUL))
|
|
#define bFM3_USBETHERNETCLK_UPCR4_UPLLN4 *((volatile unsigned int*)(0x426C0210UL))
|
|
#define bFM3_USBETHERNETCLK_UPCR4_UPLLN5 *((volatile unsigned int*)(0x426C0214UL))
|
|
#define bFM3_USBETHERNETCLK_UPCR4_UPLLN6 *((volatile unsigned int*)(0x426C0218UL))
|
|
#define bFM3_USBETHERNETCLK_UP_STR_UPRDY *((volatile unsigned int*)(0x426C0280UL))
|
|
#define bFM3_USBETHERNETCLK_UPINT_ENR_UPCSE *((volatile unsigned int*)(0x426C0300UL))
|
|
#define bFM3_USBETHERNETCLK_UPINT_CLR_UPCSC *((volatile unsigned int*)(0x426C0380UL))
|
|
#define bFM3_USBETHERNETCLK_UPINT_STR_UPCSI *((volatile unsigned int*)(0x426C0400UL))
|
|
#define bFM3_USBETHERNETCLK_UPCR5_UPLLM0 *((volatile unsigned int*)(0x426C0480UL))
|
|
#define bFM3_USBETHERNETCLK_UPCR5_UPLLM1 *((volatile unsigned int*)(0x426C0484UL))
|
|
#define bFM3_USBETHERNETCLK_UPCR5_UPLLM2 *((volatile unsigned int*)(0x426C0488UL))
|
|
#define bFM3_USBETHERNETCLK_UPCR5_UPLLM3 *((volatile unsigned int*)(0x426C048CUL))
|
|
#define bFM3_USBETHERNETCLK_UPCR6_UBSR0 *((volatile unsigned int*)(0x426C0500UL))
|
|
#define bFM3_USBETHERNETCLK_UPCR6_UBSR1 *((volatile unsigned int*)(0x426C0504UL))
|
|
#define bFM3_USBETHERNETCLK_UPCR6_UBSR2 *((volatile unsigned int*)(0x426C0508UL))
|
|
#define bFM3_USBETHERNETCLK_UPCR6_UBSR3 *((volatile unsigned int*)(0x426C050CUL))
|
|
#define bFM3_USBETHERNETCLK_UPCR7_EPLLEN *((volatile unsigned int*)(0x426C0580UL))
|
|
#define bFM3_USBETHERNETCLK_USBEN0_USBEN0 *((volatile unsigned int*)(0x426C0600UL))
|
|
#define bFM3_USBETHERNETCLK_USBEN1_USBEN1 *((volatile unsigned int*)(0x426C0680UL))
|
|
|
|
/* UART asynchronous channel 0 registers */
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#define bFM3_MFS0_UART_SMR_SOE *((volatile unsigned int*)(0x42700000UL))
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#define bFM3_MFS0_UART_SMR_BDS *((volatile unsigned int*)(0x42700008UL))
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#define bFM3_MFS0_UART_SMR_SBL *((volatile unsigned int*)(0x4270000CUL))
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#define bFM3_MFS0_UART_SMR_WUCR *((volatile unsigned int*)(0x42700010UL))
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#define bFM3_MFS0_UART_SMR_MD0 *((volatile unsigned int*)(0x42700014UL))
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#define bFM3_MFS0_UART_SMR_MD1 *((volatile unsigned int*)(0x42700018UL))
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#define bFM3_MFS0_UART_SMR_MD2 *((volatile unsigned int*)(0x4270001CUL))
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#define bFM3_MFS0_UART_SCR_TXE *((volatile unsigned int*)(0x42700020UL))
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#define bFM3_MFS0_UART_SCR_RXE *((volatile unsigned int*)(0x42700024UL))
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#define bFM3_MFS0_UART_SCR_TBIE *((volatile unsigned int*)(0x42700028UL))
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#define bFM3_MFS0_UART_SCR_TIE *((volatile unsigned int*)(0x4270002CUL))
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#define bFM3_MFS0_UART_SCR_RIE *((volatile unsigned int*)(0x42700030UL))
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#define bFM3_MFS0_UART_SCR_UPCL *((volatile unsigned int*)(0x4270003CUL))
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#define bFM3_MFS0_UART_ESCR_L0 *((volatile unsigned int*)(0x42700080UL))
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#define bFM3_MFS0_UART_ESCR_L1 *((volatile unsigned int*)(0x42700084UL))
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#define bFM3_MFS0_UART_ESCR_L2 *((volatile unsigned int*)(0x42700088UL))
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#define bFM3_MFS0_UART_ESCR_P *((volatile unsigned int*)(0x4270008CUL))
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#define bFM3_MFS0_UART_ESCR_PEN *((volatile unsigned int*)(0x42700090UL))
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#define bFM3_MFS0_UART_ESCR_INV *((volatile unsigned int*)(0x42700094UL))
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#define bFM3_MFS0_UART_ESCR_ESBL *((volatile unsigned int*)(0x42700098UL))
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#define bFM3_MFS0_UART_ESCR_FLWEN *((volatile unsigned int*)(0x4270009CUL))
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#define bFM3_MFS0_UART_SSR_TBI *((volatile unsigned int*)(0x427000A0UL))
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#define bFM3_MFS0_UART_SSR_TDRE *((volatile unsigned int*)(0x427000A4UL))
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#define bFM3_MFS0_UART_SSR_RDRF *((volatile unsigned int*)(0x427000A8UL))
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#define bFM3_MFS0_UART_SSR_ORE *((volatile unsigned int*)(0x427000ACUL))
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#define bFM3_MFS0_UART_SSR_FRE *((volatile unsigned int*)(0x427000B0UL))
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#define bFM3_MFS0_UART_SSR_PE *((volatile unsigned int*)(0x427000B4UL))
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#define bFM3_MFS0_UART_SSR_REC *((volatile unsigned int*)(0x427000BCUL))
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#define bFM3_MFS0_UART_RDR_AD *((volatile unsigned int*)(0x42700120UL))
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#define bFM3_MFS0_UART_TDR_AD *((volatile unsigned int*)(0x42700120UL))
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#define bFM3_MFS0_UART_BGR_EXT *((volatile unsigned int*)(0x427001BCUL))
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#define bFM3_MFS0_UART_BGR1_EXT *((volatile unsigned int*)(0x427001BCUL))
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/* UART synchronous channel 0 registers */
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#define bFM3_MFS0_CSIO_SMR_SOE *((volatile unsigned int*)(0x42700000UL))
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#define bFM3_MFS0_CSIO_SMR_SCKE *((volatile unsigned int*)(0x42700004UL))
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#define bFM3_MFS0_CSIO_SMR_BDS *((volatile unsigned int*)(0x42700008UL))
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#define bFM3_MFS0_CSIO_SMR_SCINV *((volatile unsigned int*)(0x4270000CUL))
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#define bFM3_MFS0_CSIO_SMR_WUCR *((volatile unsigned int*)(0x42700010UL))
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#define bFM3_MFS0_CSIO_SMR_MD0 *((volatile unsigned int*)(0x42700014UL))
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#define bFM3_MFS0_CSIO_SMR_MD1 *((volatile unsigned int*)(0x42700018UL))
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#define bFM3_MFS0_CSIO_SMR_MD2 *((volatile unsigned int*)(0x4270001CUL))
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#define bFM3_MFS0_CSIO_SCR_TXE *((volatile unsigned int*)(0x42700020UL))
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#define bFM3_MFS0_CSIO_SCR_RXE *((volatile unsigned int*)(0x42700024UL))
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#define bFM3_MFS0_CSIO_SCR_TBIE *((volatile unsigned int*)(0x42700028UL))
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#define bFM3_MFS0_CSIO_SCR_TIE *((volatile unsigned int*)(0x4270002CUL))
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#define bFM3_MFS0_CSIO_SCR_RIE *((volatile unsigned int*)(0x42700030UL))
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#define bFM3_MFS0_CSIO_SCR_SPI *((volatile unsigned int*)(0x42700034UL))
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#define bFM3_MFS0_CSIO_SCR_MS *((volatile unsigned int*)(0x42700038UL))
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#define bFM3_MFS0_CSIO_SCR_UPCL *((volatile unsigned int*)(0x4270003CUL))
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#define bFM3_MFS0_CSIO_ESCR_L0 *((volatile unsigned int*)(0x42700080UL))
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#define bFM3_MFS0_CSIO_ESCR_L1 *((volatile unsigned int*)(0x42700084UL))
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#define bFM3_MFS0_CSIO_ESCR_L2 *((volatile unsigned int*)(0x42700088UL))
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#define bFM3_MFS0_CSIO_ESCR_WT0 *((volatile unsigned int*)(0x4270008CUL))
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#define bFM3_MFS0_CSIO_ESCR_WT1 *((volatile unsigned int*)(0x42700090UL))
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#define bFM3_MFS0_CSIO_ESCR_SOP *((volatile unsigned int*)(0x4270009CUL))
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#define bFM3_MFS0_CSIO_SSR_TBI *((volatile unsigned int*)(0x427000A0UL))
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#define bFM3_MFS0_CSIO_SSR_TDRE *((volatile unsigned int*)(0x427000A4UL))
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#define bFM3_MFS0_CSIO_SSR_RDRF *((volatile unsigned int*)(0x427000A8UL))
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#define bFM3_MFS0_CSIO_SSR_ORE *((volatile unsigned int*)(0x427000ACUL))
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#define bFM3_MFS0_CSIO_SSR_REC *((volatile unsigned int*)(0x427000BCUL))
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/* UART LIN channel 0 registers */
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#define bFM3_MFS0_LIN_SMR_SOE *((volatile unsigned int*)(0x42700000UL))
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#define bFM3_MFS0_LIN_SMR_SBL *((volatile unsigned int*)(0x4270000CUL))
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#define bFM3_MFS0_LIN_SMR_WUCR *((volatile unsigned int*)(0x42700010UL))
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#define bFM3_MFS0_LIN_SMR_MD0 *((volatile unsigned int*)(0x42700014UL))
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#define bFM3_MFS0_LIN_SMR_MD1 *((volatile unsigned int*)(0x42700018UL))
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#define bFM3_MFS0_LIN_SMR_MD2 *((volatile unsigned int*)(0x4270001CUL))
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#define bFM3_MFS0_LIN_SCR_TXE *((volatile unsigned int*)(0x42700020UL))
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#define bFM3_MFS0_LIN_SCR_RXE *((volatile unsigned int*)(0x42700024UL))
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#define bFM3_MFS0_LIN_SCR_TBIE *((volatile unsigned int*)(0x42700028UL))
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#define bFM3_MFS0_LIN_SCR_TIE *((volatile unsigned int*)(0x4270002CUL))
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#define bFM3_MFS0_LIN_SCR_RIE *((volatile unsigned int*)(0x42700030UL))
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#define bFM3_MFS0_LIN_SCR_LBR *((volatile unsigned int*)(0x42700034UL))
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#define bFM3_MFS0_LIN_SCR_MS *((volatile unsigned int*)(0x42700038UL))
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#define bFM3_MFS0_LIN_SCR_UPCL *((volatile unsigned int*)(0x4270003CUL))
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#define bFM3_MFS0_LIN_ESCR_DEL0 *((volatile unsigned int*)(0x42700080UL))
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#define bFM3_MFS0_LIN_ESCR_DEL1 *((volatile unsigned int*)(0x42700084UL))
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#define bFM3_MFS0_LIN_ESCR_LBL0 *((volatile unsigned int*)(0x42700088UL))
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#define bFM3_MFS0_LIN_ESCR_LBL1 *((volatile unsigned int*)(0x4270008CUL))
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#define bFM3_MFS0_LIN_ESCR_LBIE *((volatile unsigned int*)(0x42700090UL))
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#define bFM3_MFS0_LIN_ESCR_ESBL *((volatile unsigned int*)(0x42700098UL))
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#define bFM3_MFS0_LIN_SSR_TBI *((volatile unsigned int*)(0x427000A0UL))
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#define bFM3_MFS0_LIN_SSR_TDRE *((volatile unsigned int*)(0x427000A4UL))
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#define bFM3_MFS0_LIN_SSR_RDRF *((volatile unsigned int*)(0x427000A8UL))
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#define bFM3_MFS0_LIN_SSR_ORE *((volatile unsigned int*)(0x427000ACUL))
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#define bFM3_MFS0_LIN_SSR_FRE *((volatile unsigned int*)(0x427000B0UL))
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#define bFM3_MFS0_LIN_SSR_LBD *((volatile unsigned int*)(0x427000B4UL))
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#define bFM3_MFS0_LIN_SSR_REC *((volatile unsigned int*)(0x427000BCUL))
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#define bFM3_MFS0_LIN_BGR_EXT *((volatile unsigned int*)(0x427001BCUL))
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#define bFM3_MFS0_LIN_BGR1_EXT *((volatile unsigned int*)(0x427001BCUL))
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/* I2C channel 0 registers */
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#define bFM3_MFS0_I2C_SMR_ITST0 *((volatile unsigned int*)(0x42700000UL))
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#define bFM3_MFS0_I2C_SMR_ITST1 *((volatile unsigned int*)(0x42700004UL))
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#define bFM3_MFS0_I2C_SMR_TIE *((volatile unsigned int*)(0x42700008UL))
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#define bFM3_MFS0_I2C_SMR_RIE *((volatile unsigned int*)(0x4270000CUL))
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#define bFM3_MFS0_I2C_SMR_WUCR *((volatile unsigned int*)(0x42700010UL))
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#define bFM3_MFS0_I2C_SMR_MD0 *((volatile unsigned int*)(0x42700014UL))
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#define bFM3_MFS0_I2C_SMR_MD1 *((volatile unsigned int*)(0x42700018UL))
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#define bFM3_MFS0_I2C_SMR_MD2 *((volatile unsigned int*)(0x4270001CUL))
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#define bFM3_MFS0_I2C_IBCR_INT *((volatile unsigned int*)(0x42700020UL))
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#define bFM3_MFS0_I2C_IBCR_BER *((volatile unsigned int*)(0x42700024UL))
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#define bFM3_MFS0_I2C_IBCR_INTE *((volatile unsigned int*)(0x42700028UL))
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#define bFM3_MFS0_I2C_IBCR_CNDE *((volatile unsigned int*)(0x4270002CUL))
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#define bFM3_MFS0_I2C_IBCR_WSEL *((volatile unsigned int*)(0x42700030UL))
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#define bFM3_MFS0_I2C_IBCR_ACKE *((volatile unsigned int*)(0x42700034UL))
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#define bFM3_MFS0_I2C_IBCR_ACT *((volatile unsigned int*)(0x42700038UL))
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#define bFM3_MFS0_I2C_IBCR_SCC *((volatile unsigned int*)(0x42700038UL))
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#define bFM3_MFS0_I2C_IBCR_MSS *((volatile unsigned int*)(0x4270003CUL))
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#define bFM3_MFS0_I2C_IBSR_BB *((volatile unsigned int*)(0x42700080UL))
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#define bFM3_MFS0_I2C_IBSR_SPC *((volatile unsigned int*)(0x42700084UL))
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#define bFM3_MFS0_I2C_IBSR_RSC *((volatile unsigned int*)(0x42700088UL))
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#define bFM3_MFS0_I2C_IBSR_AL *((volatile unsigned int*)(0x4270008CUL))
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#define bFM3_MFS0_I2C_IBSR_TRX *((volatile unsigned int*)(0x42700090UL))
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#define bFM3_MFS0_I2C_IBSR_RSA *((volatile unsigned int*)(0x42700094UL))
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#define bFM3_MFS0_I2C_IBSR_RACK *((volatile unsigned int*)(0x42700098UL))
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#define bFM3_MFS0_I2C_IBSR_FBT *((volatile unsigned int*)(0x4270009CUL))
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#define bFM3_MFS0_I2C_SSR_TBI *((volatile unsigned int*)(0x427000A0UL))
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#define bFM3_MFS0_I2C_SSR_TDRE *((volatile unsigned int*)(0x427000A4UL))
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#define bFM3_MFS0_I2C_SSR_RDRF *((volatile unsigned int*)(0x427000A8UL))
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#define bFM3_MFS0_I2C_SSR_ORE *((volatile unsigned int*)(0x427000ACUL))
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#define bFM3_MFS0_I2C_SSR_TBIE *((volatile unsigned int*)(0x427000B0UL))
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#define bFM3_MFS0_I2C_SSR_DMA *((volatile unsigned int*)(0x427000B4UL))
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#define bFM3_MFS0_I2C_SSR_TSET *((volatile unsigned int*)(0x427000B8UL))
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#define bFM3_MFS0_I2C_SSR_REC *((volatile unsigned int*)(0x427000BCUL))
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#define bFM3_MFS0_I2C_ISBA_SA0 *((volatile unsigned int*)(0x42700200UL))
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#define bFM3_MFS0_I2C_ISBA_SA1 *((volatile unsigned int*)(0x42700204UL))
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#define bFM3_MFS0_I2C_ISBA_SA2 *((volatile unsigned int*)(0x42700208UL))
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#define bFM3_MFS0_I2C_ISBA_SA3 *((volatile unsigned int*)(0x4270020CUL))
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#define bFM3_MFS0_I2C_ISBA_SA4 *((volatile unsigned int*)(0x42700210UL))
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#define bFM3_MFS0_I2C_ISBA_SA5 *((volatile unsigned int*)(0x42700214UL))
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#define bFM3_MFS0_I2C_ISBA_SA6 *((volatile unsigned int*)(0x42700218UL))
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#define bFM3_MFS0_I2C_ISBA_SAEN *((volatile unsigned int*)(0x4270021CUL))
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#define bFM3_MFS0_I2C_ISMK_SM0 *((volatile unsigned int*)(0x42700220UL))
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#define bFM3_MFS0_I2C_ISMK_SM1 *((volatile unsigned int*)(0x42700224UL))
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#define bFM3_MFS0_I2C_ISMK_SM2 *((volatile unsigned int*)(0x42700228UL))
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#define bFM3_MFS0_I2C_ISMK_SM3 *((volatile unsigned int*)(0x4270022CUL))
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#define bFM3_MFS0_I2C_ISMK_SM4 *((volatile unsigned int*)(0x42700230UL))
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#define bFM3_MFS0_I2C_ISMK_SM5 *((volatile unsigned int*)(0x42700234UL))
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#define bFM3_MFS0_I2C_ISMK_SM6 *((volatile unsigned int*)(0x42700238UL))
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#define bFM3_MFS0_I2C_ISMK_EN *((volatile unsigned int*)(0x4270023CUL))
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/* UART asynchronous channel 1 registers */
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#define bFM3_MFS1_UART_SMR_SOE *((volatile unsigned int*)(0x42702000UL))
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#define bFM3_MFS1_UART_SMR_BDS *((volatile unsigned int*)(0x42702008UL))
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#define bFM3_MFS1_UART_SMR_SBL *((volatile unsigned int*)(0x4270200CUL))
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#define bFM3_MFS1_UART_SMR_WUCR *((volatile unsigned int*)(0x42702010UL))
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#define bFM3_MFS1_UART_SMR_MD0 *((volatile unsigned int*)(0x42702014UL))
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#define bFM3_MFS1_UART_SMR_MD1 *((volatile unsigned int*)(0x42702018UL))
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#define bFM3_MFS1_UART_SMR_MD2 *((volatile unsigned int*)(0x4270201CUL))
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#define bFM3_MFS1_UART_SCR_TXE *((volatile unsigned int*)(0x42702020UL))
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#define bFM3_MFS1_UART_SCR_RXE *((volatile unsigned int*)(0x42702024UL))
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#define bFM3_MFS1_UART_SCR_TBIE *((volatile unsigned int*)(0x42702028UL))
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#define bFM3_MFS1_UART_SCR_TIE *((volatile unsigned int*)(0x4270202CUL))
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#define bFM3_MFS1_UART_SCR_RIE *((volatile unsigned int*)(0x42702030UL))
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#define bFM3_MFS1_UART_SCR_UPCL *((volatile unsigned int*)(0x4270203CUL))
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#define bFM3_MFS1_UART_ESCR_L0 *((volatile unsigned int*)(0x42702080UL))
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#define bFM3_MFS1_UART_ESCR_L1 *((volatile unsigned int*)(0x42702084UL))
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#define bFM3_MFS1_UART_ESCR_L2 *((volatile unsigned int*)(0x42702088UL))
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#define bFM3_MFS1_UART_ESCR_P *((volatile unsigned int*)(0x4270208CUL))
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#define bFM3_MFS1_UART_ESCR_PEN *((volatile unsigned int*)(0x42702090UL))
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#define bFM3_MFS1_UART_ESCR_INV *((volatile unsigned int*)(0x42702094UL))
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#define bFM3_MFS1_UART_ESCR_ESBL *((volatile unsigned int*)(0x42702098UL))
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#define bFM3_MFS1_UART_ESCR_FLWEN *((volatile unsigned int*)(0x4270209CUL))
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#define bFM3_MFS1_UART_SSR_TBI *((volatile unsigned int*)(0x427020A0UL))
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#define bFM3_MFS1_UART_SSR_TDRE *((volatile unsigned int*)(0x427020A4UL))
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#define bFM3_MFS1_UART_SSR_RDRF *((volatile unsigned int*)(0x427020A8UL))
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#define bFM3_MFS1_UART_SSR_ORE *((volatile unsigned int*)(0x427020ACUL))
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#define bFM3_MFS1_UART_SSR_FRE *((volatile unsigned int*)(0x427020B0UL))
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#define bFM3_MFS1_UART_SSR_PE *((volatile unsigned int*)(0x427020B4UL))
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#define bFM3_MFS1_UART_SSR_REC *((volatile unsigned int*)(0x427020BCUL))
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#define bFM3_MFS1_UART_RDR_AD *((volatile unsigned int*)(0x42702120UL))
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#define bFM3_MFS1_UART_TDR_AD *((volatile unsigned int*)(0x42702120UL))
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#define bFM3_MFS1_UART_BGR_EXT *((volatile unsigned int*)(0x427021BCUL))
|
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#define bFM3_MFS1_UART_BGR1_EXT *((volatile unsigned int*)(0x427021BCUL))
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/* UART synchronous channel 1 registers */
|
|
#define bFM3_MFS1_CSIO_SMR_SOE *((volatile unsigned int*)(0x42702000UL))
|
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#define bFM3_MFS1_CSIO_SMR_SCKE *((volatile unsigned int*)(0x42702004UL))
|
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#define bFM3_MFS1_CSIO_SMR_BDS *((volatile unsigned int*)(0x42702008UL))
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#define bFM3_MFS1_CSIO_SMR_SCINV *((volatile unsigned int*)(0x4270200CUL))
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#define bFM3_MFS1_CSIO_SMR_WUCR *((volatile unsigned int*)(0x42702010UL))
|
|
#define bFM3_MFS1_CSIO_SMR_MD0 *((volatile unsigned int*)(0x42702014UL))
|
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#define bFM3_MFS1_CSIO_SMR_MD1 *((volatile unsigned int*)(0x42702018UL))
|
|
#define bFM3_MFS1_CSIO_SMR_MD2 *((volatile unsigned int*)(0x4270201CUL))
|
|
#define bFM3_MFS1_CSIO_SCR_TXE *((volatile unsigned int*)(0x42702020UL))
|
|
#define bFM3_MFS1_CSIO_SCR_RXE *((volatile unsigned int*)(0x42702024UL))
|
|
#define bFM3_MFS1_CSIO_SCR_TBIE *((volatile unsigned int*)(0x42702028UL))
|
|
#define bFM3_MFS1_CSIO_SCR_TIE *((volatile unsigned int*)(0x4270202CUL))
|
|
#define bFM3_MFS1_CSIO_SCR_RIE *((volatile unsigned int*)(0x42702030UL))
|
|
#define bFM3_MFS1_CSIO_SCR_SPI *((volatile unsigned int*)(0x42702034UL))
|
|
#define bFM3_MFS1_CSIO_SCR_MS *((volatile unsigned int*)(0x42702038UL))
|
|
#define bFM3_MFS1_CSIO_SCR_UPCL *((volatile unsigned int*)(0x4270203CUL))
|
|
#define bFM3_MFS1_CSIO_ESCR_L0 *((volatile unsigned int*)(0x42702080UL))
|
|
#define bFM3_MFS1_CSIO_ESCR_L1 *((volatile unsigned int*)(0x42702084UL))
|
|
#define bFM3_MFS1_CSIO_ESCR_L2 *((volatile unsigned int*)(0x42702088UL))
|
|
#define bFM3_MFS1_CSIO_ESCR_WT0 *((volatile unsigned int*)(0x4270208CUL))
|
|
#define bFM3_MFS1_CSIO_ESCR_WT1 *((volatile unsigned int*)(0x42702090UL))
|
|
#define bFM3_MFS1_CSIO_ESCR_SOP *((volatile unsigned int*)(0x4270209CUL))
|
|
#define bFM3_MFS1_CSIO_SSR_TBI *((volatile unsigned int*)(0x427020A0UL))
|
|
#define bFM3_MFS1_CSIO_SSR_TDRE *((volatile unsigned int*)(0x427020A4UL))
|
|
#define bFM3_MFS1_CSIO_SSR_RDRF *((volatile unsigned int*)(0x427020A8UL))
|
|
#define bFM3_MFS1_CSIO_SSR_ORE *((volatile unsigned int*)(0x427020ACUL))
|
|
#define bFM3_MFS1_CSIO_SSR_REC *((volatile unsigned int*)(0x427020BCUL))
|
|
|
|
/* UART LIN channel 1 registers */
|
|
#define bFM3_MFS1_LIN_SMR_SOE *((volatile unsigned int*)(0x42702000UL))
|
|
#define bFM3_MFS1_LIN_SMR_SBL *((volatile unsigned int*)(0x4270200CUL))
|
|
#define bFM3_MFS1_LIN_SMR_WUCR *((volatile unsigned int*)(0x42702010UL))
|
|
#define bFM3_MFS1_LIN_SMR_MD0 *((volatile unsigned int*)(0x42702014UL))
|
|
#define bFM3_MFS1_LIN_SMR_MD1 *((volatile unsigned int*)(0x42702018UL))
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#define bFM3_MFS1_LIN_SMR_MD2 *((volatile unsigned int*)(0x4270201CUL))
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#define bFM3_MFS1_LIN_SCR_TXE *((volatile unsigned int*)(0x42702020UL))
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#define bFM3_MFS1_LIN_SCR_RXE *((volatile unsigned int*)(0x42702024UL))
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#define bFM3_MFS1_LIN_SCR_TBIE *((volatile unsigned int*)(0x42702028UL))
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#define bFM3_MFS1_LIN_SCR_TIE *((volatile unsigned int*)(0x4270202CUL))
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#define bFM3_MFS1_LIN_SCR_RIE *((volatile unsigned int*)(0x42702030UL))
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#define bFM3_MFS1_LIN_SCR_LBR *((volatile unsigned int*)(0x42702034UL))
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#define bFM3_MFS1_LIN_SCR_MS *((volatile unsigned int*)(0x42702038UL))
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#define bFM3_MFS1_LIN_SCR_UPCL *((volatile unsigned int*)(0x4270203CUL))
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#define bFM3_MFS1_LIN_ESCR_DEL0 *((volatile unsigned int*)(0x42702080UL))
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#define bFM3_MFS1_LIN_ESCR_DEL1 *((volatile unsigned int*)(0x42702084UL))
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#define bFM3_MFS1_LIN_ESCR_LBL0 *((volatile unsigned int*)(0x42702088UL))
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#define bFM3_MFS1_LIN_ESCR_LBL1 *((volatile unsigned int*)(0x4270208CUL))
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#define bFM3_MFS1_LIN_ESCR_LBIE *((volatile unsigned int*)(0x42702090UL))
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#define bFM3_MFS1_LIN_ESCR_ESBL *((volatile unsigned int*)(0x42702098UL))
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#define bFM3_MFS1_LIN_SSR_TBI *((volatile unsigned int*)(0x427020A0UL))
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#define bFM3_MFS1_LIN_SSR_TDRE *((volatile unsigned int*)(0x427020A4UL))
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#define bFM3_MFS1_LIN_SSR_RDRF *((volatile unsigned int*)(0x427020A8UL))
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#define bFM3_MFS1_LIN_SSR_ORE *((volatile unsigned int*)(0x427020ACUL))
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#define bFM3_MFS1_LIN_SSR_FRE *((volatile unsigned int*)(0x427020B0UL))
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#define bFM3_MFS1_LIN_SSR_LBD *((volatile unsigned int*)(0x427020B4UL))
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#define bFM3_MFS1_LIN_SSR_REC *((volatile unsigned int*)(0x427020BCUL))
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#define bFM3_MFS1_LIN_BGR_EXT *((volatile unsigned int*)(0x427021BCUL))
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#define bFM3_MFS1_LIN_BGR1_EXT *((volatile unsigned int*)(0x427021BCUL))
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/* I2C channel 1 registers */
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#define bFM3_MFS1_I2C_SMR_ITST0 *((volatile unsigned int*)(0x42702000UL))
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#define bFM3_MFS1_I2C_SMR_ITST1 *((volatile unsigned int*)(0x42702004UL))
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#define bFM3_MFS1_I2C_SMR_TIE *((volatile unsigned int*)(0x42702008UL))
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#define bFM3_MFS1_I2C_SMR_RIE *((volatile unsigned int*)(0x4270200CUL))
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#define bFM3_MFS1_I2C_SMR_WUCR *((volatile unsigned int*)(0x42702010UL))
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#define bFM3_MFS1_I2C_SMR_MD0 *((volatile unsigned int*)(0x42702014UL))
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#define bFM3_MFS1_I2C_SMR_MD1 *((volatile unsigned int*)(0x42702018UL))
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#define bFM3_MFS1_I2C_SMR_MD2 *((volatile unsigned int*)(0x4270201CUL))
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#define bFM3_MFS1_I2C_IBCR_INT *((volatile unsigned int*)(0x42702020UL))
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#define bFM3_MFS1_I2C_IBCR_BER *((volatile unsigned int*)(0x42702024UL))
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#define bFM3_MFS1_I2C_IBCR_INTE *((volatile unsigned int*)(0x42702028UL))
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#define bFM3_MFS1_I2C_IBCR_CNDE *((volatile unsigned int*)(0x4270202CUL))
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#define bFM3_MFS1_I2C_IBCR_WSEL *((volatile unsigned int*)(0x42702030UL))
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#define bFM3_MFS1_I2C_IBCR_ACKE *((volatile unsigned int*)(0x42702034UL))
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#define bFM3_MFS1_I2C_IBCR_ACT *((volatile unsigned int*)(0x42702038UL))
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#define bFM3_MFS1_I2C_IBCR_SCC *((volatile unsigned int*)(0x42702038UL))
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#define bFM3_MFS1_I2C_IBCR_MSS *((volatile unsigned int*)(0x4270203CUL))
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#define bFM3_MFS1_I2C_IBSR_BB *((volatile unsigned int*)(0x42702080UL))
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#define bFM3_MFS1_I2C_IBSR_SPC *((volatile unsigned int*)(0x42702084UL))
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#define bFM3_MFS1_I2C_IBSR_RSC *((volatile unsigned int*)(0x42702088UL))
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#define bFM3_MFS1_I2C_IBSR_AL *((volatile unsigned int*)(0x4270208CUL))
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#define bFM3_MFS1_I2C_IBSR_TRX *((volatile unsigned int*)(0x42702090UL))
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#define bFM3_MFS1_I2C_IBSR_RSA *((volatile unsigned int*)(0x42702094UL))
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#define bFM3_MFS1_I2C_IBSR_RACK *((volatile unsigned int*)(0x42702098UL))
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#define bFM3_MFS1_I2C_IBSR_FBT *((volatile unsigned int*)(0x4270209CUL))
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#define bFM3_MFS1_I2C_SSR_TBI *((volatile unsigned int*)(0x427020A0UL))
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#define bFM3_MFS1_I2C_SSR_TDRE *((volatile unsigned int*)(0x427020A4UL))
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#define bFM3_MFS1_I2C_SSR_RDRF *((volatile unsigned int*)(0x427020A8UL))
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#define bFM3_MFS1_I2C_SSR_ORE *((volatile unsigned int*)(0x427020ACUL))
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#define bFM3_MFS1_I2C_SSR_TBIE *((volatile unsigned int*)(0x427020B0UL))
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#define bFM3_MFS1_I2C_SSR_DMA *((volatile unsigned int*)(0x427020B4UL))
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#define bFM3_MFS1_I2C_SSR_TSET *((volatile unsigned int*)(0x427020B8UL))
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#define bFM3_MFS1_I2C_SSR_REC *((volatile unsigned int*)(0x427020BCUL))
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#define bFM3_MFS1_I2C_ISBA_SA0 *((volatile unsigned int*)(0x42702200UL))
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#define bFM3_MFS1_I2C_ISBA_SA1 *((volatile unsigned int*)(0x42702204UL))
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#define bFM3_MFS1_I2C_ISBA_SA2 *((volatile unsigned int*)(0x42702208UL))
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#define bFM3_MFS1_I2C_ISBA_SA3 *((volatile unsigned int*)(0x4270220CUL))
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#define bFM3_MFS1_I2C_ISBA_SA4 *((volatile unsigned int*)(0x42702210UL))
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#define bFM3_MFS1_I2C_ISBA_SA5 *((volatile unsigned int*)(0x42702214UL))
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#define bFM3_MFS1_I2C_ISBA_SA6 *((volatile unsigned int*)(0x42702218UL))
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#define bFM3_MFS1_I2C_ISBA_SAEN *((volatile unsigned int*)(0x4270221CUL))
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#define bFM3_MFS1_I2C_ISMK_SM0 *((volatile unsigned int*)(0x42702220UL))
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#define bFM3_MFS1_I2C_ISMK_SM1 *((volatile unsigned int*)(0x42702224UL))
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#define bFM3_MFS1_I2C_ISMK_SM2 *((volatile unsigned int*)(0x42702228UL))
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#define bFM3_MFS1_I2C_ISMK_SM3 *((volatile unsigned int*)(0x4270222CUL))
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#define bFM3_MFS1_I2C_ISMK_SM4 *((volatile unsigned int*)(0x42702230UL))
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#define bFM3_MFS1_I2C_ISMK_SM5 *((volatile unsigned int*)(0x42702234UL))
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#define bFM3_MFS1_I2C_ISMK_SM6 *((volatile unsigned int*)(0x42702238UL))
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#define bFM3_MFS1_I2C_ISMK_EN *((volatile unsigned int*)(0x4270223CUL))
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/* UART asynchronous channel 2 registers */
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#define bFM3_MFS2_UART_SMR_SOE *((volatile unsigned int*)(0x42704000UL))
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#define bFM3_MFS2_UART_SMR_BDS *((volatile unsigned int*)(0x42704008UL))
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#define bFM3_MFS2_UART_SMR_SBL *((volatile unsigned int*)(0x4270400CUL))
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#define bFM3_MFS2_UART_SMR_WUCR *((volatile unsigned int*)(0x42704010UL))
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#define bFM3_MFS2_UART_SMR_MD0 *((volatile unsigned int*)(0x42704014UL))
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#define bFM3_MFS2_UART_SMR_MD1 *((volatile unsigned int*)(0x42704018UL))
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#define bFM3_MFS2_UART_SMR_MD2 *((volatile unsigned int*)(0x4270401CUL))
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#define bFM3_MFS2_UART_SCR_TXE *((volatile unsigned int*)(0x42704020UL))
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#define bFM3_MFS2_UART_SCR_RXE *((volatile unsigned int*)(0x42704024UL))
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#define bFM3_MFS2_UART_SCR_TBIE *((volatile unsigned int*)(0x42704028UL))
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#define bFM3_MFS2_UART_SCR_TIE *((volatile unsigned int*)(0x4270402CUL))
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#define bFM3_MFS2_UART_SCR_RIE *((volatile unsigned int*)(0x42704030UL))
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#define bFM3_MFS2_UART_SCR_UPCL *((volatile unsigned int*)(0x4270403CUL))
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#define bFM3_MFS2_UART_ESCR_L0 *((volatile unsigned int*)(0x42704080UL))
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#define bFM3_MFS2_UART_ESCR_L1 *((volatile unsigned int*)(0x42704084UL))
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#define bFM3_MFS2_UART_ESCR_L2 *((volatile unsigned int*)(0x42704088UL))
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#define bFM3_MFS2_UART_ESCR_P *((volatile unsigned int*)(0x4270408CUL))
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#define bFM3_MFS2_UART_ESCR_PEN *((volatile unsigned int*)(0x42704090UL))
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#define bFM3_MFS2_UART_ESCR_INV *((volatile unsigned int*)(0x42704094UL))
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#define bFM3_MFS2_UART_ESCR_ESBL *((volatile unsigned int*)(0x42704098UL))
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#define bFM3_MFS2_UART_ESCR_FLWEN *((volatile unsigned int*)(0x4270409CUL))
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#define bFM3_MFS2_UART_SSR_TBI *((volatile unsigned int*)(0x427040A0UL))
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#define bFM3_MFS2_UART_SSR_TDRE *((volatile unsigned int*)(0x427040A4UL))
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#define bFM3_MFS2_UART_SSR_RDRF *((volatile unsigned int*)(0x427040A8UL))
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#define bFM3_MFS2_UART_SSR_ORE *((volatile unsigned int*)(0x427040ACUL))
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#define bFM3_MFS2_UART_SSR_FRE *((volatile unsigned int*)(0x427040B0UL))
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#define bFM3_MFS2_UART_SSR_PE *((volatile unsigned int*)(0x427040B4UL))
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#define bFM3_MFS2_UART_SSR_REC *((volatile unsigned int*)(0x427040BCUL))
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#define bFM3_MFS2_UART_RDR_AD *((volatile unsigned int*)(0x42704120UL))
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#define bFM3_MFS2_UART_TDR_AD *((volatile unsigned int*)(0x42704120UL))
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#define bFM3_MFS2_UART_BGR_EXT *((volatile unsigned int*)(0x427041BCUL))
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#define bFM3_MFS2_UART_BGR1_EXT *((volatile unsigned int*)(0x427041BCUL))
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/* UART synchronous channel 2 registers */
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#define bFM3_MFS2_CSIO_SMR_SOE *((volatile unsigned int*)(0x42704000UL))
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#define bFM3_MFS2_CSIO_SMR_SCKE *((volatile unsigned int*)(0x42704004UL))
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#define bFM3_MFS2_CSIO_SMR_BDS *((volatile unsigned int*)(0x42704008UL))
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#define bFM3_MFS2_CSIO_SMR_SCINV *((volatile unsigned int*)(0x4270400CUL))
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#define bFM3_MFS2_CSIO_SMR_WUCR *((volatile unsigned int*)(0x42704010UL))
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#define bFM3_MFS2_CSIO_SMR_MD0 *((volatile unsigned int*)(0x42704014UL))
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#define bFM3_MFS2_CSIO_SMR_MD1 *((volatile unsigned int*)(0x42704018UL))
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#define bFM3_MFS2_CSIO_SMR_MD2 *((volatile unsigned int*)(0x4270401CUL))
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#define bFM3_MFS2_CSIO_SCR_TXE *((volatile unsigned int*)(0x42704020UL))
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#define bFM3_MFS2_CSIO_SCR_RXE *((volatile unsigned int*)(0x42704024UL))
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#define bFM3_MFS2_CSIO_SCR_TBIE *((volatile unsigned int*)(0x42704028UL))
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#define bFM3_MFS2_CSIO_SCR_TIE *((volatile unsigned int*)(0x4270402CUL))
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#define bFM3_MFS2_CSIO_SCR_RIE *((volatile unsigned int*)(0x42704030UL))
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#define bFM3_MFS2_CSIO_SCR_SPI *((volatile unsigned int*)(0x42704034UL))
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#define bFM3_MFS2_CSIO_SCR_MS *((volatile unsigned int*)(0x42704038UL))
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#define bFM3_MFS2_CSIO_SCR_UPCL *((volatile unsigned int*)(0x4270403CUL))
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#define bFM3_MFS2_CSIO_ESCR_L0 *((volatile unsigned int*)(0x42704080UL))
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#define bFM3_MFS2_CSIO_ESCR_L1 *((volatile unsigned int*)(0x42704084UL))
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#define bFM3_MFS2_CSIO_ESCR_L2 *((volatile unsigned int*)(0x42704088UL))
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#define bFM3_MFS2_CSIO_ESCR_WT0 *((volatile unsigned int*)(0x4270408CUL))
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#define bFM3_MFS2_CSIO_ESCR_WT1 *((volatile unsigned int*)(0x42704090UL))
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#define bFM3_MFS2_CSIO_ESCR_SOP *((volatile unsigned int*)(0x4270409CUL))
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#define bFM3_MFS2_CSIO_SSR_TBI *((volatile unsigned int*)(0x427040A0UL))
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#define bFM3_MFS2_CSIO_SSR_TDRE *((volatile unsigned int*)(0x427040A4UL))
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#define bFM3_MFS2_CSIO_SSR_RDRF *((volatile unsigned int*)(0x427040A8UL))
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#define bFM3_MFS2_CSIO_SSR_ORE *((volatile unsigned int*)(0x427040ACUL))
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#define bFM3_MFS2_CSIO_SSR_REC *((volatile unsigned int*)(0x427040BCUL))
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/* UART LIN channel 2 registers */
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#define bFM3_MFS2_LIN_SMR_SOE *((volatile unsigned int*)(0x42704000UL))
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#define bFM3_MFS2_LIN_SMR_SBL *((volatile unsigned int*)(0x4270400CUL))
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#define bFM3_MFS2_LIN_SMR_WUCR *((volatile unsigned int*)(0x42704010UL))
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#define bFM3_MFS2_LIN_SMR_MD0 *((volatile unsigned int*)(0x42704014UL))
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#define bFM3_MFS2_LIN_SMR_MD1 *((volatile unsigned int*)(0x42704018UL))
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#define bFM3_MFS2_LIN_SMR_MD2 *((volatile unsigned int*)(0x4270401CUL))
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#define bFM3_MFS2_LIN_SCR_TXE *((volatile unsigned int*)(0x42704020UL))
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#define bFM3_MFS2_LIN_SCR_RXE *((volatile unsigned int*)(0x42704024UL))
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#define bFM3_MFS2_LIN_SCR_TBIE *((volatile unsigned int*)(0x42704028UL))
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#define bFM3_MFS2_LIN_SCR_TIE *((volatile unsigned int*)(0x4270402CUL))
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#define bFM3_MFS2_LIN_SCR_RIE *((volatile unsigned int*)(0x42704030UL))
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#define bFM3_MFS2_LIN_SCR_LBR *((volatile unsigned int*)(0x42704034UL))
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#define bFM3_MFS2_LIN_SCR_MS *((volatile unsigned int*)(0x42704038UL))
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#define bFM3_MFS2_LIN_SCR_UPCL *((volatile unsigned int*)(0x4270403CUL))
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#define bFM3_MFS2_LIN_ESCR_DEL0 *((volatile unsigned int*)(0x42704080UL))
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#define bFM3_MFS2_LIN_ESCR_DEL1 *((volatile unsigned int*)(0x42704084UL))
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#define bFM3_MFS2_LIN_ESCR_LBL0 *((volatile unsigned int*)(0x42704088UL))
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#define bFM3_MFS2_LIN_ESCR_LBL1 *((volatile unsigned int*)(0x4270408CUL))
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#define bFM3_MFS2_LIN_ESCR_LBIE *((volatile unsigned int*)(0x42704090UL))
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#define bFM3_MFS2_LIN_ESCR_ESBL *((volatile unsigned int*)(0x42704098UL))
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#define bFM3_MFS2_LIN_SSR_TBI *((volatile unsigned int*)(0x427040A0UL))
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#define bFM3_MFS2_LIN_SSR_TDRE *((volatile unsigned int*)(0x427040A4UL))
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#define bFM3_MFS2_LIN_SSR_RDRF *((volatile unsigned int*)(0x427040A8UL))
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#define bFM3_MFS2_LIN_SSR_ORE *((volatile unsigned int*)(0x427040ACUL))
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#define bFM3_MFS2_LIN_SSR_FRE *((volatile unsigned int*)(0x427040B0UL))
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#define bFM3_MFS2_LIN_SSR_LBD *((volatile unsigned int*)(0x427040B4UL))
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#define bFM3_MFS2_LIN_SSR_REC *((volatile unsigned int*)(0x427040BCUL))
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#define bFM3_MFS2_LIN_BGR_EXT *((volatile unsigned int*)(0x427041BCUL))
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#define bFM3_MFS2_LIN_BGR1_EXT *((volatile unsigned int*)(0x427041BCUL))
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/* I2C channel 2 registers */
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#define bFM3_MFS2_I2C_SMR_ITST0 *((volatile unsigned int*)(0x42704000UL))
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#define bFM3_MFS2_I2C_SMR_ITST1 *((volatile unsigned int*)(0x42704004UL))
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#define bFM3_MFS2_I2C_SMR_TIE *((volatile unsigned int*)(0x42704008UL))
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#define bFM3_MFS2_I2C_SMR_RIE *((volatile unsigned int*)(0x4270400CUL))
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#define bFM3_MFS2_I2C_SMR_WUCR *((volatile unsigned int*)(0x42704010UL))
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#define bFM3_MFS2_I2C_SMR_MD0 *((volatile unsigned int*)(0x42704014UL))
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#define bFM3_MFS2_I2C_SMR_MD1 *((volatile unsigned int*)(0x42704018UL))
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#define bFM3_MFS2_I2C_SMR_MD2 *((volatile unsigned int*)(0x4270401CUL))
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#define bFM3_MFS2_I2C_IBCR_INT *((volatile unsigned int*)(0x42704020UL))
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#define bFM3_MFS2_I2C_IBCR_BER *((volatile unsigned int*)(0x42704024UL))
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#define bFM3_MFS2_I2C_IBCR_INTE *((volatile unsigned int*)(0x42704028UL))
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#define bFM3_MFS2_I2C_IBCR_CNDE *((volatile unsigned int*)(0x4270402CUL))
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#define bFM3_MFS2_I2C_IBCR_WSEL *((volatile unsigned int*)(0x42704030UL))
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#define bFM3_MFS2_I2C_IBCR_ACKE *((volatile unsigned int*)(0x42704034UL))
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#define bFM3_MFS2_I2C_IBCR_ACT *((volatile unsigned int*)(0x42704038UL))
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#define bFM3_MFS2_I2C_IBCR_SCC *((volatile unsigned int*)(0x42704038UL))
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#define bFM3_MFS2_I2C_IBCR_MSS *((volatile unsigned int*)(0x4270403CUL))
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#define bFM3_MFS2_I2C_IBSR_BB *((volatile unsigned int*)(0x42704080UL))
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#define bFM3_MFS2_I2C_IBSR_SPC *((volatile unsigned int*)(0x42704084UL))
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#define bFM3_MFS2_I2C_IBSR_RSC *((volatile unsigned int*)(0x42704088UL))
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#define bFM3_MFS2_I2C_IBSR_AL *((volatile unsigned int*)(0x4270408CUL))
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#define bFM3_MFS2_I2C_IBSR_TRX *((volatile unsigned int*)(0x42704090UL))
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#define bFM3_MFS2_I2C_IBSR_RSA *((volatile unsigned int*)(0x42704094UL))
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#define bFM3_MFS2_I2C_IBSR_RACK *((volatile unsigned int*)(0x42704098UL))
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#define bFM3_MFS2_I2C_IBSR_FBT *((volatile unsigned int*)(0x4270409CUL))
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#define bFM3_MFS2_I2C_SSR_TBI *((volatile unsigned int*)(0x427040A0UL))
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#define bFM3_MFS2_I2C_SSR_TDRE *((volatile unsigned int*)(0x427040A4UL))
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#define bFM3_MFS2_I2C_SSR_RDRF *((volatile unsigned int*)(0x427040A8UL))
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#define bFM3_MFS2_I2C_SSR_ORE *((volatile unsigned int*)(0x427040ACUL))
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#define bFM3_MFS2_I2C_SSR_TBIE *((volatile unsigned int*)(0x427040B0UL))
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#define bFM3_MFS2_I2C_SSR_DMA *((volatile unsigned int*)(0x427040B4UL))
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#define bFM3_MFS2_I2C_SSR_TSET *((volatile unsigned int*)(0x427040B8UL))
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#define bFM3_MFS2_I2C_SSR_REC *((volatile unsigned int*)(0x427040BCUL))
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#define bFM3_MFS2_I2C_ISBA_SA0 *((volatile unsigned int*)(0x42704200UL))
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#define bFM3_MFS2_I2C_ISBA_SA1 *((volatile unsigned int*)(0x42704204UL))
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#define bFM3_MFS2_I2C_ISBA_SA2 *((volatile unsigned int*)(0x42704208UL))
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#define bFM3_MFS2_I2C_ISBA_SA3 *((volatile unsigned int*)(0x4270420CUL))
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#define bFM3_MFS2_I2C_ISBA_SA4 *((volatile unsigned int*)(0x42704210UL))
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#define bFM3_MFS2_I2C_ISBA_SA5 *((volatile unsigned int*)(0x42704214UL))
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#define bFM3_MFS2_I2C_ISBA_SA6 *((volatile unsigned int*)(0x42704218UL))
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#define bFM3_MFS2_I2C_ISBA_SAEN *((volatile unsigned int*)(0x4270421CUL))
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#define bFM3_MFS2_I2C_ISMK_SM0 *((volatile unsigned int*)(0x42704220UL))
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#define bFM3_MFS2_I2C_ISMK_SM1 *((volatile unsigned int*)(0x42704224UL))
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#define bFM3_MFS2_I2C_ISMK_SM2 *((volatile unsigned int*)(0x42704228UL))
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#define bFM3_MFS2_I2C_ISMK_SM3 *((volatile unsigned int*)(0x4270422CUL))
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#define bFM3_MFS2_I2C_ISMK_SM4 *((volatile unsigned int*)(0x42704230UL))
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#define bFM3_MFS2_I2C_ISMK_SM5 *((volatile unsigned int*)(0x42704234UL))
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#define bFM3_MFS2_I2C_ISMK_SM6 *((volatile unsigned int*)(0x42704238UL))
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#define bFM3_MFS2_I2C_ISMK_EN *((volatile unsigned int*)(0x4270423CUL))
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/* UART asynchronous channel 3 registers */
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#define bFM3_MFS3_UART_SMR_SOE *((volatile unsigned int*)(0x42706000UL))
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#define bFM3_MFS3_UART_SMR_BDS *((volatile unsigned int*)(0x42706008UL))
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#define bFM3_MFS3_UART_SMR_SBL *((volatile unsigned int*)(0x4270600CUL))
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#define bFM3_MFS3_UART_SMR_WUCR *((volatile unsigned int*)(0x42706010UL))
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#define bFM3_MFS3_UART_SMR_MD0 *((volatile unsigned int*)(0x42706014UL))
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#define bFM3_MFS3_UART_SMR_MD1 *((volatile unsigned int*)(0x42706018UL))
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#define bFM3_MFS3_UART_SMR_MD2 *((volatile unsigned int*)(0x4270601CUL))
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#define bFM3_MFS3_UART_SCR_TXE *((volatile unsigned int*)(0x42706020UL))
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#define bFM3_MFS3_UART_SCR_RXE *((volatile unsigned int*)(0x42706024UL))
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#define bFM3_MFS3_UART_SCR_TBIE *((volatile unsigned int*)(0x42706028UL))
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#define bFM3_MFS3_UART_SCR_TIE *((volatile unsigned int*)(0x4270602CUL))
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#define bFM3_MFS3_UART_SCR_RIE *((volatile unsigned int*)(0x42706030UL))
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#define bFM3_MFS3_UART_SCR_UPCL *((volatile unsigned int*)(0x4270603CUL))
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#define bFM3_MFS3_UART_ESCR_L0 *((volatile unsigned int*)(0x42706080UL))
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#define bFM3_MFS3_UART_ESCR_L1 *((volatile unsigned int*)(0x42706084UL))
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#define bFM3_MFS3_UART_ESCR_L2 *((volatile unsigned int*)(0x42706088UL))
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#define bFM3_MFS3_UART_ESCR_P *((volatile unsigned int*)(0x4270608CUL))
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#define bFM3_MFS3_UART_ESCR_PEN *((volatile unsigned int*)(0x42706090UL))
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#define bFM3_MFS3_UART_ESCR_INV *((volatile unsigned int*)(0x42706094UL))
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#define bFM3_MFS3_UART_ESCR_ESBL *((volatile unsigned int*)(0x42706098UL))
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#define bFM3_MFS3_UART_ESCR_FLWEN *((volatile unsigned int*)(0x4270609CUL))
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#define bFM3_MFS3_UART_SSR_TBI *((volatile unsigned int*)(0x427060A0UL))
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#define bFM3_MFS3_UART_SSR_TDRE *((volatile unsigned int*)(0x427060A4UL))
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#define bFM3_MFS3_UART_SSR_RDRF *((volatile unsigned int*)(0x427060A8UL))
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#define bFM3_MFS3_UART_SSR_ORE *((volatile unsigned int*)(0x427060ACUL))
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#define bFM3_MFS3_UART_SSR_FRE *((volatile unsigned int*)(0x427060B0UL))
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#define bFM3_MFS3_UART_SSR_PE *((volatile unsigned int*)(0x427060B4UL))
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#define bFM3_MFS3_UART_SSR_REC *((volatile unsigned int*)(0x427060BCUL))
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#define bFM3_MFS3_UART_RDR_AD *((volatile unsigned int*)(0x42706120UL))
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#define bFM3_MFS3_UART_TDR_AD *((volatile unsigned int*)(0x42706120UL))
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#define bFM3_MFS3_UART_BGR_EXT *((volatile unsigned int*)(0x427061BCUL))
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#define bFM3_MFS3_UART_BGR1_EXT *((volatile unsigned int*)(0x427061BCUL))
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/* UART synchronous channel 3 registers */
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#define bFM3_MFS3_CSIO_SMR_SOE *((volatile unsigned int*)(0x42706000UL))
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#define bFM3_MFS3_CSIO_SMR_SCKE *((volatile unsigned int*)(0x42706004UL))
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#define bFM3_MFS3_CSIO_SMR_BDS *((volatile unsigned int*)(0x42706008UL))
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#define bFM3_MFS3_CSIO_SMR_SCINV *((volatile unsigned int*)(0x4270600CUL))
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#define bFM3_MFS3_CSIO_SMR_WUCR *((volatile unsigned int*)(0x42706010UL))
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#define bFM3_MFS3_CSIO_SMR_MD0 *((volatile unsigned int*)(0x42706014UL))
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#define bFM3_MFS3_CSIO_SMR_MD1 *((volatile unsigned int*)(0x42706018UL))
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#define bFM3_MFS3_CSIO_SMR_MD2 *((volatile unsigned int*)(0x4270601CUL))
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#define bFM3_MFS3_CSIO_SCR_TXE *((volatile unsigned int*)(0x42706020UL))
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#define bFM3_MFS3_CSIO_SCR_RXE *((volatile unsigned int*)(0x42706024UL))
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#define bFM3_MFS3_CSIO_SCR_TBIE *((volatile unsigned int*)(0x42706028UL))
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#define bFM3_MFS3_CSIO_SCR_TIE *((volatile unsigned int*)(0x4270602CUL))
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#define bFM3_MFS3_CSIO_SCR_RIE *((volatile unsigned int*)(0x42706030UL))
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#define bFM3_MFS3_CSIO_SCR_SPI *((volatile unsigned int*)(0x42706034UL))
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#define bFM3_MFS3_CSIO_SCR_MS *((volatile unsigned int*)(0x42706038UL))
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#define bFM3_MFS3_CSIO_SCR_UPCL *((volatile unsigned int*)(0x4270603CUL))
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#define bFM3_MFS3_CSIO_ESCR_L0 *((volatile unsigned int*)(0x42706080UL))
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#define bFM3_MFS3_CSIO_ESCR_L1 *((volatile unsigned int*)(0x42706084UL))
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#define bFM3_MFS3_CSIO_ESCR_L2 *((volatile unsigned int*)(0x42706088UL))
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#define bFM3_MFS3_CSIO_ESCR_WT0 *((volatile unsigned int*)(0x4270608CUL))
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|
#define bFM3_MFS3_CSIO_ESCR_WT1 *((volatile unsigned int*)(0x42706090UL))
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#define bFM3_MFS3_CSIO_ESCR_SOP *((volatile unsigned int*)(0x4270609CUL))
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#define bFM3_MFS3_CSIO_SSR_TBI *((volatile unsigned int*)(0x427060A0UL))
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#define bFM3_MFS3_CSIO_SSR_TDRE *((volatile unsigned int*)(0x427060A4UL))
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#define bFM3_MFS3_CSIO_SSR_RDRF *((volatile unsigned int*)(0x427060A8UL))
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#define bFM3_MFS3_CSIO_SSR_ORE *((volatile unsigned int*)(0x427060ACUL))
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#define bFM3_MFS3_CSIO_SSR_REC *((volatile unsigned int*)(0x427060BCUL))
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|
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/* UART LIN channel 3 registers */
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|
#define bFM3_MFS3_LIN_SMR_SOE *((volatile unsigned int*)(0x42706000UL))
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#define bFM3_MFS3_LIN_SMR_SBL *((volatile unsigned int*)(0x4270600CUL))
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|
#define bFM3_MFS3_LIN_SMR_WUCR *((volatile unsigned int*)(0x42706010UL))
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#define bFM3_MFS3_LIN_SMR_MD0 *((volatile unsigned int*)(0x42706014UL))
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#define bFM3_MFS3_LIN_SMR_MD1 *((volatile unsigned int*)(0x42706018UL))
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#define bFM3_MFS3_LIN_SMR_MD2 *((volatile unsigned int*)(0x4270601CUL))
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#define bFM3_MFS3_LIN_SCR_TXE *((volatile unsigned int*)(0x42706020UL))
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#define bFM3_MFS3_LIN_SCR_RXE *((volatile unsigned int*)(0x42706024UL))
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#define bFM3_MFS3_LIN_SCR_TBIE *((volatile unsigned int*)(0x42706028UL))
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#define bFM3_MFS3_LIN_SCR_TIE *((volatile unsigned int*)(0x4270602CUL))
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#define bFM3_MFS3_LIN_SCR_RIE *((volatile unsigned int*)(0x42706030UL))
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|
#define bFM3_MFS3_LIN_SCR_LBR *((volatile unsigned int*)(0x42706034UL))
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#define bFM3_MFS3_LIN_SCR_MS *((volatile unsigned int*)(0x42706038UL))
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#define bFM3_MFS3_LIN_SCR_UPCL *((volatile unsigned int*)(0x4270603CUL))
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|
#define bFM3_MFS3_LIN_ESCR_DEL0 *((volatile unsigned int*)(0x42706080UL))
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#define bFM3_MFS3_LIN_ESCR_DEL1 *((volatile unsigned int*)(0x42706084UL))
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#define bFM3_MFS3_LIN_ESCR_LBL0 *((volatile unsigned int*)(0x42706088UL))
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#define bFM3_MFS3_LIN_ESCR_LBL1 *((volatile unsigned int*)(0x4270608CUL))
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#define bFM3_MFS3_LIN_ESCR_LBIE *((volatile unsigned int*)(0x42706090UL))
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#define bFM3_MFS3_LIN_ESCR_ESBL *((volatile unsigned int*)(0x42706098UL))
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#define bFM3_MFS3_LIN_SSR_TBI *((volatile unsigned int*)(0x427060A0UL))
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#define bFM3_MFS3_LIN_SSR_TDRE *((volatile unsigned int*)(0x427060A4UL))
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#define bFM3_MFS3_LIN_SSR_RDRF *((volatile unsigned int*)(0x427060A8UL))
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#define bFM3_MFS3_LIN_SSR_ORE *((volatile unsigned int*)(0x427060ACUL))
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#define bFM3_MFS3_LIN_SSR_FRE *((volatile unsigned int*)(0x427060B0UL))
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#define bFM3_MFS3_LIN_SSR_LBD *((volatile unsigned int*)(0x427060B4UL))
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#define bFM3_MFS3_LIN_SSR_REC *((volatile unsigned int*)(0x427060BCUL))
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#define bFM3_MFS3_LIN_BGR_EXT *((volatile unsigned int*)(0x427061BCUL))
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#define bFM3_MFS3_LIN_BGR1_EXT *((volatile unsigned int*)(0x427061BCUL))
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/* I2C channel 3 registers */
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#define bFM3_MFS3_I2C_SMR_ITST0 *((volatile unsigned int*)(0x42706000UL))
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#define bFM3_MFS3_I2C_SMR_ITST1 *((volatile unsigned int*)(0x42706004UL))
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#define bFM3_MFS3_I2C_SMR_TIE *((volatile unsigned int*)(0x42706008UL))
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#define bFM3_MFS3_I2C_SMR_RIE *((volatile unsigned int*)(0x4270600CUL))
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#define bFM3_MFS3_I2C_SMR_WUCR *((volatile unsigned int*)(0x42706010UL))
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#define bFM3_MFS3_I2C_SMR_MD0 *((volatile unsigned int*)(0x42706014UL))
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#define bFM3_MFS3_I2C_SMR_MD1 *((volatile unsigned int*)(0x42706018UL))
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#define bFM3_MFS3_I2C_SMR_MD2 *((volatile unsigned int*)(0x4270601CUL))
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#define bFM3_MFS3_I2C_IBCR_INT *((volatile unsigned int*)(0x42706020UL))
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#define bFM3_MFS3_I2C_IBCR_BER *((volatile unsigned int*)(0x42706024UL))
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#define bFM3_MFS3_I2C_IBCR_INTE *((volatile unsigned int*)(0x42706028UL))
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#define bFM3_MFS3_I2C_IBCR_CNDE *((volatile unsigned int*)(0x4270602CUL))
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#define bFM3_MFS3_I2C_IBCR_WSEL *((volatile unsigned int*)(0x42706030UL))
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#define bFM3_MFS3_I2C_IBCR_ACKE *((volatile unsigned int*)(0x42706034UL))
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#define bFM3_MFS3_I2C_IBCR_ACT *((volatile unsigned int*)(0x42706038UL))
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#define bFM3_MFS3_I2C_IBCR_SCC *((volatile unsigned int*)(0x42706038UL))
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#define bFM3_MFS3_I2C_IBCR_MSS *((volatile unsigned int*)(0x4270603CUL))
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#define bFM3_MFS3_I2C_IBSR_BB *((volatile unsigned int*)(0x42706080UL))
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#define bFM3_MFS3_I2C_IBSR_SPC *((volatile unsigned int*)(0x42706084UL))
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#define bFM3_MFS3_I2C_IBSR_RSC *((volatile unsigned int*)(0x42706088UL))
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#define bFM3_MFS3_I2C_IBSR_AL *((volatile unsigned int*)(0x4270608CUL))
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#define bFM3_MFS3_I2C_IBSR_TRX *((volatile unsigned int*)(0x42706090UL))
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#define bFM3_MFS3_I2C_IBSR_RSA *((volatile unsigned int*)(0x42706094UL))
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#define bFM3_MFS3_I2C_IBSR_RACK *((volatile unsigned int*)(0x42706098UL))
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#define bFM3_MFS3_I2C_IBSR_FBT *((volatile unsigned int*)(0x4270609CUL))
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#define bFM3_MFS3_I2C_SSR_TBI *((volatile unsigned int*)(0x427060A0UL))
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#define bFM3_MFS3_I2C_SSR_TDRE *((volatile unsigned int*)(0x427060A4UL))
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#define bFM3_MFS3_I2C_SSR_RDRF *((volatile unsigned int*)(0x427060A8UL))
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#define bFM3_MFS3_I2C_SSR_ORE *((volatile unsigned int*)(0x427060ACUL))
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#define bFM3_MFS3_I2C_SSR_TBIE *((volatile unsigned int*)(0x427060B0UL))
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#define bFM3_MFS3_I2C_SSR_DMA *((volatile unsigned int*)(0x427060B4UL))
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#define bFM3_MFS3_I2C_SSR_TSET *((volatile unsigned int*)(0x427060B8UL))
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#define bFM3_MFS3_I2C_SSR_REC *((volatile unsigned int*)(0x427060BCUL))
|
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#define bFM3_MFS3_I2C_ISBA_SA0 *((volatile unsigned int*)(0x42706200UL))
|
|
#define bFM3_MFS3_I2C_ISBA_SA1 *((volatile unsigned int*)(0x42706204UL))
|
|
#define bFM3_MFS3_I2C_ISBA_SA2 *((volatile unsigned int*)(0x42706208UL))
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|
#define bFM3_MFS3_I2C_ISBA_SA3 *((volatile unsigned int*)(0x4270620CUL))
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#define bFM3_MFS3_I2C_ISBA_SA4 *((volatile unsigned int*)(0x42706210UL))
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|
#define bFM3_MFS3_I2C_ISBA_SA5 *((volatile unsigned int*)(0x42706214UL))
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|
#define bFM3_MFS3_I2C_ISBA_SA6 *((volatile unsigned int*)(0x42706218UL))
|
|
#define bFM3_MFS3_I2C_ISBA_SAEN *((volatile unsigned int*)(0x4270621CUL))
|
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#define bFM3_MFS3_I2C_ISMK_SM0 *((volatile unsigned int*)(0x42706220UL))
|
|
#define bFM3_MFS3_I2C_ISMK_SM1 *((volatile unsigned int*)(0x42706224UL))
|
|
#define bFM3_MFS3_I2C_ISMK_SM2 *((volatile unsigned int*)(0x42706228UL))
|
|
#define bFM3_MFS3_I2C_ISMK_SM3 *((volatile unsigned int*)(0x4270622CUL))
|
|
#define bFM3_MFS3_I2C_ISMK_SM4 *((volatile unsigned int*)(0x42706230UL))
|
|
#define bFM3_MFS3_I2C_ISMK_SM5 *((volatile unsigned int*)(0x42706234UL))
|
|
#define bFM3_MFS3_I2C_ISMK_SM6 *((volatile unsigned int*)(0x42706238UL))
|
|
#define bFM3_MFS3_I2C_ISMK_EN *((volatile unsigned int*)(0x4270623CUL))
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|
|
|
/* UART asynchronous channel 4 registers */
|
|
#define bFM3_MFS4_UART_SMR_SOE *((volatile unsigned int*)(0x42708000UL))
|
|
#define bFM3_MFS4_UART_SMR_BDS *((volatile unsigned int*)(0x42708008UL))
|
|
#define bFM3_MFS4_UART_SMR_SBL *((volatile unsigned int*)(0x4270800CUL))
|
|
#define bFM3_MFS4_UART_SMR_WUCR *((volatile unsigned int*)(0x42708010UL))
|
|
#define bFM3_MFS4_UART_SMR_MD0 *((volatile unsigned int*)(0x42708014UL))
|
|
#define bFM3_MFS4_UART_SMR_MD1 *((volatile unsigned int*)(0x42708018UL))
|
|
#define bFM3_MFS4_UART_SMR_MD2 *((volatile unsigned int*)(0x4270801CUL))
|
|
#define bFM3_MFS4_UART_SCR_TXE *((volatile unsigned int*)(0x42708020UL))
|
|
#define bFM3_MFS4_UART_SCR_RXE *((volatile unsigned int*)(0x42708024UL))
|
|
#define bFM3_MFS4_UART_SCR_TBIE *((volatile unsigned int*)(0x42708028UL))
|
|
#define bFM3_MFS4_UART_SCR_TIE *((volatile unsigned int*)(0x4270802CUL))
|
|
#define bFM3_MFS4_UART_SCR_RIE *((volatile unsigned int*)(0x42708030UL))
|
|
#define bFM3_MFS4_UART_SCR_UPCL *((volatile unsigned int*)(0x4270803CUL))
|
|
#define bFM3_MFS4_UART_ESCR_L0 *((volatile unsigned int*)(0x42708080UL))
|
|
#define bFM3_MFS4_UART_ESCR_L1 *((volatile unsigned int*)(0x42708084UL))
|
|
#define bFM3_MFS4_UART_ESCR_L2 *((volatile unsigned int*)(0x42708088UL))
|
|
#define bFM3_MFS4_UART_ESCR_P *((volatile unsigned int*)(0x4270808CUL))
|
|
#define bFM3_MFS4_UART_ESCR_PEN *((volatile unsigned int*)(0x42708090UL))
|
|
#define bFM3_MFS4_UART_ESCR_INV *((volatile unsigned int*)(0x42708094UL))
|
|
#define bFM3_MFS4_UART_ESCR_ESBL *((volatile unsigned int*)(0x42708098UL))
|
|
#define bFM3_MFS4_UART_ESCR_FLWEN *((volatile unsigned int*)(0x4270809CUL))
|
|
#define bFM3_MFS4_UART_SSR_TBI *((volatile unsigned int*)(0x427080A0UL))
|
|
#define bFM3_MFS4_UART_SSR_TDRE *((volatile unsigned int*)(0x427080A4UL))
|
|
#define bFM3_MFS4_UART_SSR_RDRF *((volatile unsigned int*)(0x427080A8UL))
|
|
#define bFM3_MFS4_UART_SSR_ORE *((volatile unsigned int*)(0x427080ACUL))
|
|
#define bFM3_MFS4_UART_SSR_FRE *((volatile unsigned int*)(0x427080B0UL))
|
|
#define bFM3_MFS4_UART_SSR_PE *((volatile unsigned int*)(0x427080B4UL))
|
|
#define bFM3_MFS4_UART_SSR_REC *((volatile unsigned int*)(0x427080BCUL))
|
|
#define bFM3_MFS4_UART_RDR_AD *((volatile unsigned int*)(0x42708120UL))
|
|
#define bFM3_MFS4_UART_TDR_AD *((volatile unsigned int*)(0x42708120UL))
|
|
#define bFM3_MFS4_UART_BGR_EXT *((volatile unsigned int*)(0x427081BCUL))
|
|
#define bFM3_MFS4_UART_BGR1_EXT *((volatile unsigned int*)(0x427081BCUL))
|
|
#define bFM3_MFS4_UART_FCR_FE1 *((volatile unsigned int*)(0x42708280UL))
|
|
#define bFM3_MFS4_UART_FCR_FE2 *((volatile unsigned int*)(0x42708284UL))
|
|
#define bFM3_MFS4_UART_FCR_FCL1 *((volatile unsigned int*)(0x42708288UL))
|
|
#define bFM3_MFS4_UART_FCR_FCL2 *((volatile unsigned int*)(0x4270828CUL))
|
|
#define bFM3_MFS4_UART_FCR_FSET *((volatile unsigned int*)(0x42708290UL))
|
|
#define bFM3_MFS4_UART_FCR_FLD *((volatile unsigned int*)(0x42708294UL))
|
|
#define bFM3_MFS4_UART_FCR_FLST *((volatile unsigned int*)(0x42708298UL))
|
|
#define bFM3_MFS4_UART_FCR_FSEL *((volatile unsigned int*)(0x427082A0UL))
|
|
#define bFM3_MFS4_UART_FCR_FTIE *((volatile unsigned int*)(0x427082A4UL))
|
|
#define bFM3_MFS4_UART_FCR_FDRQ *((volatile unsigned int*)(0x427082A8UL))
|
|
#define bFM3_MFS4_UART_FCR_FRIE *((volatile unsigned int*)(0x427082ACUL))
|
|
#define bFM3_MFS4_UART_FCR_FLSTE *((volatile unsigned int*)(0x427082B0UL))
|
|
#define bFM3_MFS4_UART_FCR_FTST0 *((volatile unsigned int*)(0x427082B8UL))
|
|
#define bFM3_MFS4_UART_FCR_FTST1 *((volatile unsigned int*)(0x427082BCUL))
|
|
#define bFM3_MFS4_UART_FCR0_FE1 *((volatile unsigned int*)(0x42708280UL))
|
|
#define bFM3_MFS4_UART_FCR0_FE2 *((volatile unsigned int*)(0x42708284UL))
|
|
#define bFM3_MFS4_UART_FCR0_FCL1 *((volatile unsigned int*)(0x42708288UL))
|
|
#define bFM3_MFS4_UART_FCR0_FCL2 *((volatile unsigned int*)(0x4270828CUL))
|
|
#define bFM3_MFS4_UART_FCR0_FSET *((volatile unsigned int*)(0x42708290UL))
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#define bFM3_MFS4_UART_FCR0_FLD *((volatile unsigned int*)(0x42708294UL))
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#define bFM3_MFS4_UART_FCR0_FLST *((volatile unsigned int*)(0x42708298UL))
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#define bFM3_MFS4_UART_FCR1_FSEL *((volatile unsigned int*)(0x427082A0UL))
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#define bFM3_MFS4_UART_FCR1_FTIE *((volatile unsigned int*)(0x427082A4UL))
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#define bFM3_MFS4_UART_FCR1_FDRQ *((volatile unsigned int*)(0x427082A8UL))
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#define bFM3_MFS4_UART_FCR1_FRIE *((volatile unsigned int*)(0x427082ACUL))
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#define bFM3_MFS4_UART_FCR1_FLSTE *((volatile unsigned int*)(0x427082B0UL))
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#define bFM3_MFS4_UART_FCR1_FTST0 *((volatile unsigned int*)(0x427082B8UL))
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#define bFM3_MFS4_UART_FCR1_FTST1 *((volatile unsigned int*)(0x427082BCUL))
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#define bFM3_MFS4_UART_FBYTE_FD0 *((volatile unsigned int*)(0x42708300UL))
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#define bFM3_MFS4_UART_FBYTE_FD1 *((volatile unsigned int*)(0x42708304UL))
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#define bFM3_MFS4_UART_FBYTE_FD2 *((volatile unsigned int*)(0x42708308UL))
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#define bFM3_MFS4_UART_FBYTE_FD3 *((volatile unsigned int*)(0x4270830CUL))
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#define bFM3_MFS4_UART_FBYTE_FD4 *((volatile unsigned int*)(0x42708310UL))
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#define bFM3_MFS4_UART_FBYTE_FD5 *((volatile unsigned int*)(0x42708314UL))
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#define bFM3_MFS4_UART_FBYTE_FD6 *((volatile unsigned int*)(0x42708318UL))
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#define bFM3_MFS4_UART_FBYTE_FD7 *((volatile unsigned int*)(0x4270831CUL))
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#define bFM3_MFS4_UART_FBYTE_FD8 *((volatile unsigned int*)(0x42708320UL))
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#define bFM3_MFS4_UART_FBYTE_FD9 *((volatile unsigned int*)(0x42708324UL))
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#define bFM3_MFS4_UART_FBYTE_FD10 *((volatile unsigned int*)(0x42708328UL))
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#define bFM3_MFS4_UART_FBYTE_FD11 *((volatile unsigned int*)(0x4270832CUL))
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#define bFM3_MFS4_UART_FBYTE_FD12 *((volatile unsigned int*)(0x42708330UL))
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#define bFM3_MFS4_UART_FBYTE_FD13 *((volatile unsigned int*)(0x42708334UL))
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#define bFM3_MFS4_UART_FBYTE_FD14 *((volatile unsigned int*)(0x42708338UL))
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#define bFM3_MFS4_UART_FBYTE_FD15 *((volatile unsigned int*)(0x4270833CUL))
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#define bFM3_MFS4_UART_FBYTE1_FD0 *((volatile unsigned int*)(0x42708300UL))
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#define bFM3_MFS4_UART_FBYTE1_FD1 *((volatile unsigned int*)(0x42708304UL))
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#define bFM3_MFS4_UART_FBYTE1_FD2 *((volatile unsigned int*)(0x42708308UL))
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#define bFM3_MFS4_UART_FBYTE1_FD3 *((volatile unsigned int*)(0x4270830CUL))
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#define bFM3_MFS4_UART_FBYTE1_FD4 *((volatile unsigned int*)(0x42708310UL))
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#define bFM3_MFS4_UART_FBYTE1_FD5 *((volatile unsigned int*)(0x42708314UL))
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#define bFM3_MFS4_UART_FBYTE1_FD6 *((volatile unsigned int*)(0x42708318UL))
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#define bFM3_MFS4_UART_FBYTE1_FD7 *((volatile unsigned int*)(0x4270831CUL))
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#define bFM3_MFS4_UART_FBYTE2_FD8 *((volatile unsigned int*)(0x42708320UL))
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#define bFM3_MFS4_UART_FBYTE2_FD9 *((volatile unsigned int*)(0x42708324UL))
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#define bFM3_MFS4_UART_FBYTE2_FD10 *((volatile unsigned int*)(0x42708328UL))
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#define bFM3_MFS4_UART_FBYTE2_FD11 *((volatile unsigned int*)(0x4270832CUL))
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#define bFM3_MFS4_UART_FBYTE2_FD12 *((volatile unsigned int*)(0x42708330UL))
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#define bFM3_MFS4_UART_FBYTE2_FD13 *((volatile unsigned int*)(0x42708334UL))
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#define bFM3_MFS4_UART_FBYTE2_FD14 *((volatile unsigned int*)(0x42708338UL))
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#define bFM3_MFS4_UART_FBYTE2_FD15 *((volatile unsigned int*)(0x4270833CUL))
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/* UART synchronous channel 4 registers */
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#define bFM3_MFS4_CSIO_SMR_SOE *((volatile unsigned int*)(0x42708000UL))
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#define bFM3_MFS4_CSIO_SMR_SCKE *((volatile unsigned int*)(0x42708004UL))
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#define bFM3_MFS4_CSIO_SMR_BDS *((volatile unsigned int*)(0x42708008UL))
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#define bFM3_MFS4_CSIO_SMR_SCINV *((volatile unsigned int*)(0x4270800CUL))
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#define bFM3_MFS4_CSIO_SMR_WUCR *((volatile unsigned int*)(0x42708010UL))
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#define bFM3_MFS4_CSIO_SMR_MD0 *((volatile unsigned int*)(0x42708014UL))
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#define bFM3_MFS4_CSIO_SMR_MD1 *((volatile unsigned int*)(0x42708018UL))
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#define bFM3_MFS4_CSIO_SMR_MD2 *((volatile unsigned int*)(0x4270801CUL))
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#define bFM3_MFS4_CSIO_SCR_TXE *((volatile unsigned int*)(0x42708020UL))
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#define bFM3_MFS4_CSIO_SCR_RXE *((volatile unsigned int*)(0x42708024UL))
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#define bFM3_MFS4_CSIO_SCR_TBIE *((volatile unsigned int*)(0x42708028UL))
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#define bFM3_MFS4_CSIO_SCR_TIE *((volatile unsigned int*)(0x4270802CUL))
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#define bFM3_MFS4_CSIO_SCR_RIE *((volatile unsigned int*)(0x42708030UL))
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#define bFM3_MFS4_CSIO_SCR_SPI *((volatile unsigned int*)(0x42708034UL))
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#define bFM3_MFS4_CSIO_SCR_MS *((volatile unsigned int*)(0x42708038UL))
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#define bFM3_MFS4_CSIO_SCR_UPCL *((volatile unsigned int*)(0x4270803CUL))
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#define bFM3_MFS4_CSIO_ESCR_L0 *((volatile unsigned int*)(0x42708080UL))
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#define bFM3_MFS4_CSIO_ESCR_L1 *((volatile unsigned int*)(0x42708084UL))
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#define bFM3_MFS4_CSIO_ESCR_L2 *((volatile unsigned int*)(0x42708088UL))
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#define bFM3_MFS4_CSIO_ESCR_WT0 *((volatile unsigned int*)(0x4270808CUL))
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#define bFM3_MFS4_CSIO_ESCR_WT1 *((volatile unsigned int*)(0x42708090UL))
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#define bFM3_MFS4_CSIO_ESCR_SOP *((volatile unsigned int*)(0x4270809CUL))
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#define bFM3_MFS4_CSIO_SSR_TBI *((volatile unsigned int*)(0x427080A0UL))
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#define bFM3_MFS4_CSIO_SSR_TDRE *((volatile unsigned int*)(0x427080A4UL))
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#define bFM3_MFS4_CSIO_SSR_RDRF *((volatile unsigned int*)(0x427080A8UL))
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#define bFM3_MFS4_CSIO_SSR_ORE *((volatile unsigned int*)(0x427080ACUL))
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#define bFM3_MFS4_CSIO_SSR_REC *((volatile unsigned int*)(0x427080BCUL))
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#define bFM3_MFS4_CSIO_FCR_FE1 *((volatile unsigned int*)(0x42708280UL))
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#define bFM3_MFS4_CSIO_FCR_FE2 *((volatile unsigned int*)(0x42708284UL))
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#define bFM3_MFS4_CSIO_FCR_FCL1 *((volatile unsigned int*)(0x42708288UL))
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#define bFM3_MFS4_CSIO_FCR_FCL2 *((volatile unsigned int*)(0x4270828CUL))
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#define bFM3_MFS4_CSIO_FCR_FSET *((volatile unsigned int*)(0x42708290UL))
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#define bFM3_MFS4_CSIO_FCR_FLD *((volatile unsigned int*)(0x42708294UL))
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#define bFM3_MFS4_CSIO_FCR_FLST *((volatile unsigned int*)(0x42708298UL))
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#define bFM3_MFS4_CSIO_FCR_FSEL *((volatile unsigned int*)(0x427082A0UL))
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#define bFM3_MFS4_CSIO_FCR_FTIE *((volatile unsigned int*)(0x427082A4UL))
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#define bFM3_MFS4_CSIO_FCR_FDRQ *((volatile unsigned int*)(0x427082A8UL))
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#define bFM3_MFS4_CSIO_FCR_FRIE *((volatile unsigned int*)(0x427082ACUL))
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#define bFM3_MFS4_CSIO_FCR_FLSTE *((volatile unsigned int*)(0x427082B0UL))
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#define bFM3_MFS4_CSIO_FCR_FTST0 *((volatile unsigned int*)(0x427082B8UL))
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#define bFM3_MFS4_CSIO_FCR_FTST1 *((volatile unsigned int*)(0x427082BCUL))
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#define bFM3_MFS4_CSIO_FCR0_FE1 *((volatile unsigned int*)(0x42708280UL))
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#define bFM3_MFS4_CSIO_FCR0_FE2 *((volatile unsigned int*)(0x42708284UL))
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#define bFM3_MFS4_CSIO_FCR0_FCL1 *((volatile unsigned int*)(0x42708288UL))
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#define bFM3_MFS4_CSIO_FCR0_FCL2 *((volatile unsigned int*)(0x4270828CUL))
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#define bFM3_MFS4_CSIO_FCR0_FSET *((volatile unsigned int*)(0x42708290UL))
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#define bFM3_MFS4_CSIO_FCR0_FLD *((volatile unsigned int*)(0x42708294UL))
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#define bFM3_MFS4_CSIO_FCR0_FLST *((volatile unsigned int*)(0x42708298UL))
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#define bFM3_MFS4_CSIO_FCR1_FSEL *((volatile unsigned int*)(0x427082A0UL))
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#define bFM3_MFS4_CSIO_FCR1_FTIE *((volatile unsigned int*)(0x427082A4UL))
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#define bFM3_MFS4_CSIO_FCR1_FDRQ *((volatile unsigned int*)(0x427082A8UL))
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#define bFM3_MFS4_CSIO_FCR1_FRIE *((volatile unsigned int*)(0x427082ACUL))
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#define bFM3_MFS4_CSIO_FCR1_FLSTE *((volatile unsigned int*)(0x427082B0UL))
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#define bFM3_MFS4_CSIO_FCR1_FTST0 *((volatile unsigned int*)(0x427082B8UL))
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#define bFM3_MFS4_CSIO_FCR1_FTST1 *((volatile unsigned int*)(0x427082BCUL))
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#define bFM3_MFS4_CSIO_FBYTE_FD0 *((volatile unsigned int*)(0x42708300UL))
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#define bFM3_MFS4_CSIO_FBYTE_FD1 *((volatile unsigned int*)(0x42708304UL))
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#define bFM3_MFS4_CSIO_FBYTE_FD2 *((volatile unsigned int*)(0x42708308UL))
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#define bFM3_MFS4_CSIO_FBYTE_FD3 *((volatile unsigned int*)(0x4270830CUL))
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#define bFM3_MFS4_CSIO_FBYTE_FD4 *((volatile unsigned int*)(0x42708310UL))
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#define bFM3_MFS4_CSIO_FBYTE_FD5 *((volatile unsigned int*)(0x42708314UL))
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#define bFM3_MFS4_CSIO_FBYTE_FD6 *((volatile unsigned int*)(0x42708318UL))
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#define bFM3_MFS4_CSIO_FBYTE_FD7 *((volatile unsigned int*)(0x4270831CUL))
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#define bFM3_MFS4_CSIO_FBYTE_FD8 *((volatile unsigned int*)(0x42708320UL))
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#define bFM3_MFS4_CSIO_FBYTE_FD9 *((volatile unsigned int*)(0x42708324UL))
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#define bFM3_MFS4_CSIO_FBYTE_FD10 *((volatile unsigned int*)(0x42708328UL))
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#define bFM3_MFS4_CSIO_FBYTE_FD11 *((volatile unsigned int*)(0x4270832CUL))
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#define bFM3_MFS4_CSIO_FBYTE_FD12 *((volatile unsigned int*)(0x42708330UL))
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#define bFM3_MFS4_CSIO_FBYTE_FD13 *((volatile unsigned int*)(0x42708334UL))
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#define bFM3_MFS4_CSIO_FBYTE_FD14 *((volatile unsigned int*)(0x42708338UL))
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#define bFM3_MFS4_CSIO_FBYTE_FD15 *((volatile unsigned int*)(0x4270833CUL))
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#define bFM3_MFS4_CSIO_FBYTE1_FD0 *((volatile unsigned int*)(0x42708300UL))
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#define bFM3_MFS4_CSIO_FBYTE1_FD1 *((volatile unsigned int*)(0x42708304UL))
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#define bFM3_MFS4_CSIO_FBYTE1_FD2 *((volatile unsigned int*)(0x42708308UL))
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#define bFM3_MFS4_CSIO_FBYTE1_FD3 *((volatile unsigned int*)(0x4270830CUL))
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#define bFM3_MFS4_CSIO_FBYTE1_FD4 *((volatile unsigned int*)(0x42708310UL))
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#define bFM3_MFS4_CSIO_FBYTE1_FD5 *((volatile unsigned int*)(0x42708314UL))
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#define bFM3_MFS4_CSIO_FBYTE1_FD6 *((volatile unsigned int*)(0x42708318UL))
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#define bFM3_MFS4_CSIO_FBYTE1_FD7 *((volatile unsigned int*)(0x4270831CUL))
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#define bFM3_MFS4_CSIO_FBYTE2_FD8 *((volatile unsigned int*)(0x42708320UL))
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#define bFM3_MFS4_CSIO_FBYTE2_FD9 *((volatile unsigned int*)(0x42708324UL))
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#define bFM3_MFS4_CSIO_FBYTE2_FD10 *((volatile unsigned int*)(0x42708328UL))
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#define bFM3_MFS4_CSIO_FBYTE2_FD11 *((volatile unsigned int*)(0x4270832CUL))
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#define bFM3_MFS4_CSIO_FBYTE2_FD12 *((volatile unsigned int*)(0x42708330UL))
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#define bFM3_MFS4_CSIO_FBYTE2_FD13 *((volatile unsigned int*)(0x42708334UL))
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#define bFM3_MFS4_CSIO_FBYTE2_FD14 *((volatile unsigned int*)(0x42708338UL))
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#define bFM3_MFS4_CSIO_FBYTE2_FD15 *((volatile unsigned int*)(0x4270833CUL))
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/* UART LIN channel 4 registers */
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#define bFM3_MFS4_LIN_SMR_SOE *((volatile unsigned int*)(0x42708000UL))
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#define bFM3_MFS4_LIN_SMR_SBL *((volatile unsigned int*)(0x4270800CUL))
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#define bFM3_MFS4_LIN_SMR_WUCR *((volatile unsigned int*)(0x42708010UL))
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#define bFM3_MFS4_LIN_SMR_MD0 *((volatile unsigned int*)(0x42708014UL))
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#define bFM3_MFS4_LIN_SMR_MD1 *((volatile unsigned int*)(0x42708018UL))
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#define bFM3_MFS4_LIN_SMR_MD2 *((volatile unsigned int*)(0x4270801CUL))
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#define bFM3_MFS4_LIN_SCR_TXE *((volatile unsigned int*)(0x42708020UL))
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#define bFM3_MFS4_LIN_SCR_RXE *((volatile unsigned int*)(0x42708024UL))
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#define bFM3_MFS4_LIN_SCR_TBIE *((volatile unsigned int*)(0x42708028UL))
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#define bFM3_MFS4_LIN_SCR_TIE *((volatile unsigned int*)(0x4270802CUL))
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#define bFM3_MFS4_LIN_SCR_RIE *((volatile unsigned int*)(0x42708030UL))
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#define bFM3_MFS4_LIN_SCR_LBR *((volatile unsigned int*)(0x42708034UL))
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#define bFM3_MFS4_LIN_SCR_MS *((volatile unsigned int*)(0x42708038UL))
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#define bFM3_MFS4_LIN_SCR_UPCL *((volatile unsigned int*)(0x4270803CUL))
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#define bFM3_MFS4_LIN_ESCR_DEL0 *((volatile unsigned int*)(0x42708080UL))
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#define bFM3_MFS4_LIN_ESCR_DEL1 *((volatile unsigned int*)(0x42708084UL))
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#define bFM3_MFS4_LIN_ESCR_LBL0 *((volatile unsigned int*)(0x42708088UL))
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#define bFM3_MFS4_LIN_ESCR_LBL1 *((volatile unsigned int*)(0x4270808CUL))
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#define bFM3_MFS4_LIN_ESCR_LBIE *((volatile unsigned int*)(0x42708090UL))
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#define bFM3_MFS4_LIN_ESCR_ESBL *((volatile unsigned int*)(0x42708098UL))
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#define bFM3_MFS4_LIN_SSR_TBI *((volatile unsigned int*)(0x427080A0UL))
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#define bFM3_MFS4_LIN_SSR_TDRE *((volatile unsigned int*)(0x427080A4UL))
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#define bFM3_MFS4_LIN_SSR_RDRF *((volatile unsigned int*)(0x427080A8UL))
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#define bFM3_MFS4_LIN_SSR_ORE *((volatile unsigned int*)(0x427080ACUL))
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#define bFM3_MFS4_LIN_SSR_FRE *((volatile unsigned int*)(0x427080B0UL))
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#define bFM3_MFS4_LIN_SSR_LBD *((volatile unsigned int*)(0x427080B4UL))
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#define bFM3_MFS4_LIN_SSR_REC *((volatile unsigned int*)(0x427080BCUL))
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#define bFM3_MFS4_LIN_BGR_EXT *((volatile unsigned int*)(0x427081BCUL))
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#define bFM3_MFS4_LIN_BGR1_EXT *((volatile unsigned int*)(0x427081BCUL))
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#define bFM3_MFS4_LIN_FCR_FE1 *((volatile unsigned int*)(0x42708280UL))
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#define bFM3_MFS4_LIN_FCR_FE2 *((volatile unsigned int*)(0x42708284UL))
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#define bFM3_MFS4_LIN_FCR_FCL1 *((volatile unsigned int*)(0x42708288UL))
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#define bFM3_MFS4_LIN_FCR_FCL2 *((volatile unsigned int*)(0x4270828CUL))
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#define bFM3_MFS4_LIN_FCR_FSET *((volatile unsigned int*)(0x42708290UL))
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#define bFM3_MFS4_LIN_FCR_FLD *((volatile unsigned int*)(0x42708294UL))
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#define bFM3_MFS4_LIN_FCR_FLST *((volatile unsigned int*)(0x42708298UL))
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#define bFM3_MFS4_LIN_FCR_FSEL *((volatile unsigned int*)(0x427082A0UL))
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#define bFM3_MFS4_LIN_FCR_FTIE *((volatile unsigned int*)(0x427082A4UL))
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#define bFM3_MFS4_LIN_FCR_FDRQ *((volatile unsigned int*)(0x427082A8UL))
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#define bFM3_MFS4_LIN_FCR_FRIE *((volatile unsigned int*)(0x427082ACUL))
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#define bFM3_MFS4_LIN_FCR_FLSTE *((volatile unsigned int*)(0x427082B0UL))
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#define bFM3_MFS4_LIN_FCR_FTST0 *((volatile unsigned int*)(0x427082B8UL))
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#define bFM3_MFS4_LIN_FCR_FTST1 *((volatile unsigned int*)(0x427082BCUL))
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#define bFM3_MFS4_LIN_FCR0_FE1 *((volatile unsigned int*)(0x42708280UL))
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#define bFM3_MFS4_LIN_FCR0_FE2 *((volatile unsigned int*)(0x42708284UL))
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#define bFM3_MFS4_LIN_FCR0_FCL1 *((volatile unsigned int*)(0x42708288UL))
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#define bFM3_MFS4_LIN_FCR0_FCL2 *((volatile unsigned int*)(0x4270828CUL))
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#define bFM3_MFS4_LIN_FCR0_FSET *((volatile unsigned int*)(0x42708290UL))
|
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#define bFM3_MFS4_LIN_FCR0_FLD *((volatile unsigned int*)(0x42708294UL))
|
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#define bFM3_MFS4_LIN_FCR0_FLST *((volatile unsigned int*)(0x42708298UL))
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#define bFM3_MFS4_LIN_FCR1_FSEL *((volatile unsigned int*)(0x427082A0UL))
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#define bFM3_MFS4_LIN_FCR1_FTIE *((volatile unsigned int*)(0x427082A4UL))
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#define bFM3_MFS4_LIN_FCR1_FDRQ *((volatile unsigned int*)(0x427082A8UL))
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#define bFM3_MFS4_LIN_FCR1_FRIE *((volatile unsigned int*)(0x427082ACUL))
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#define bFM3_MFS4_LIN_FCR1_FLSTE *((volatile unsigned int*)(0x427082B0UL))
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#define bFM3_MFS4_LIN_FCR1_FTST0 *((volatile unsigned int*)(0x427082B8UL))
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#define bFM3_MFS4_LIN_FCR1_FTST1 *((volatile unsigned int*)(0x427082BCUL))
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#define bFM3_MFS4_LIN_FBYTE_FD0 *((volatile unsigned int*)(0x42708300UL))
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#define bFM3_MFS4_LIN_FBYTE_FD1 *((volatile unsigned int*)(0x42708304UL))
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#define bFM3_MFS4_LIN_FBYTE_FD2 *((volatile unsigned int*)(0x42708308UL))
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#define bFM3_MFS4_LIN_FBYTE_FD3 *((volatile unsigned int*)(0x4270830CUL))
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#define bFM3_MFS4_LIN_FBYTE_FD4 *((volatile unsigned int*)(0x42708310UL))
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#define bFM3_MFS4_LIN_FBYTE_FD5 *((volatile unsigned int*)(0x42708314UL))
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#define bFM3_MFS4_LIN_FBYTE_FD6 *((volatile unsigned int*)(0x42708318UL))
|
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#define bFM3_MFS4_LIN_FBYTE_FD7 *((volatile unsigned int*)(0x4270831CUL))
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#define bFM3_MFS4_LIN_FBYTE_FD8 *((volatile unsigned int*)(0x42708320UL))
|
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#define bFM3_MFS4_LIN_FBYTE_FD9 *((volatile unsigned int*)(0x42708324UL))
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#define bFM3_MFS4_LIN_FBYTE_FD10 *((volatile unsigned int*)(0x42708328UL))
|
|
#define bFM3_MFS4_LIN_FBYTE_FD11 *((volatile unsigned int*)(0x4270832CUL))
|
|
#define bFM3_MFS4_LIN_FBYTE_FD12 *((volatile unsigned int*)(0x42708330UL))
|
|
#define bFM3_MFS4_LIN_FBYTE_FD13 *((volatile unsigned int*)(0x42708334UL))
|
|
#define bFM3_MFS4_LIN_FBYTE_FD14 *((volatile unsigned int*)(0x42708338UL))
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#define bFM3_MFS4_LIN_FBYTE_FD15 *((volatile unsigned int*)(0x4270833CUL))
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#define bFM3_MFS4_LIN_FBYTE1_FD0 *((volatile unsigned int*)(0x42708300UL))
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#define bFM3_MFS4_LIN_FBYTE1_FD1 *((volatile unsigned int*)(0x42708304UL))
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#define bFM3_MFS4_LIN_FBYTE1_FD2 *((volatile unsigned int*)(0x42708308UL))
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#define bFM3_MFS4_LIN_FBYTE1_FD3 *((volatile unsigned int*)(0x4270830CUL))
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#define bFM3_MFS4_LIN_FBYTE1_FD4 *((volatile unsigned int*)(0x42708310UL))
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#define bFM3_MFS4_LIN_FBYTE1_FD5 *((volatile unsigned int*)(0x42708314UL))
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#define bFM3_MFS4_LIN_FBYTE1_FD6 *((volatile unsigned int*)(0x42708318UL))
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#define bFM3_MFS4_LIN_FBYTE1_FD7 *((volatile unsigned int*)(0x4270831CUL))
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#define bFM3_MFS4_LIN_FBYTE2_FD8 *((volatile unsigned int*)(0x42708320UL))
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#define bFM3_MFS4_LIN_FBYTE2_FD9 *((volatile unsigned int*)(0x42708324UL))
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#define bFM3_MFS4_LIN_FBYTE2_FD10 *((volatile unsigned int*)(0x42708328UL))
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#define bFM3_MFS4_LIN_FBYTE2_FD11 *((volatile unsigned int*)(0x4270832CUL))
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#define bFM3_MFS4_LIN_FBYTE2_FD12 *((volatile unsigned int*)(0x42708330UL))
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#define bFM3_MFS4_LIN_FBYTE2_FD13 *((volatile unsigned int*)(0x42708334UL))
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#define bFM3_MFS4_LIN_FBYTE2_FD14 *((volatile unsigned int*)(0x42708338UL))
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#define bFM3_MFS4_LIN_FBYTE2_FD15 *((volatile unsigned int*)(0x4270833CUL))
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/* I2C channel 4 registers */
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#define bFM3_MFS4_I2C_SMR_ITST0 *((volatile unsigned int*)(0x42708000UL))
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#define bFM3_MFS4_I2C_SMR_ITST1 *((volatile unsigned int*)(0x42708004UL))
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#define bFM3_MFS4_I2C_SMR_TIE *((volatile unsigned int*)(0x42708008UL))
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#define bFM3_MFS4_I2C_SMR_RIE *((volatile unsigned int*)(0x4270800CUL))
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#define bFM3_MFS4_I2C_SMR_WUCR *((volatile unsigned int*)(0x42708010UL))
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#define bFM3_MFS4_I2C_SMR_MD0 *((volatile unsigned int*)(0x42708014UL))
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#define bFM3_MFS4_I2C_SMR_MD1 *((volatile unsigned int*)(0x42708018UL))
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#define bFM3_MFS4_I2C_SMR_MD2 *((volatile unsigned int*)(0x4270801CUL))
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#define bFM3_MFS4_I2C_IBCR_INT *((volatile unsigned int*)(0x42708020UL))
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#define bFM3_MFS4_I2C_IBCR_BER *((volatile unsigned int*)(0x42708024UL))
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#define bFM3_MFS4_I2C_IBCR_INTE *((volatile unsigned int*)(0x42708028UL))
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#define bFM3_MFS4_I2C_IBCR_CNDE *((volatile unsigned int*)(0x4270802CUL))
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#define bFM3_MFS4_I2C_IBCR_WSEL *((volatile unsigned int*)(0x42708030UL))
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#define bFM3_MFS4_I2C_IBCR_ACKE *((volatile unsigned int*)(0x42708034UL))
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#define bFM3_MFS4_I2C_IBCR_ACT *((volatile unsigned int*)(0x42708038UL))
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#define bFM3_MFS4_I2C_IBCR_SCC *((volatile unsigned int*)(0x42708038UL))
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#define bFM3_MFS4_I2C_IBCR_MSS *((volatile unsigned int*)(0x4270803CUL))
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#define bFM3_MFS4_I2C_IBSR_BB *((volatile unsigned int*)(0x42708080UL))
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#define bFM3_MFS4_I2C_IBSR_SPC *((volatile unsigned int*)(0x42708084UL))
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#define bFM3_MFS4_I2C_IBSR_RSC *((volatile unsigned int*)(0x42708088UL))
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#define bFM3_MFS4_I2C_IBSR_AL *((volatile unsigned int*)(0x4270808CUL))
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#define bFM3_MFS4_I2C_IBSR_TRX *((volatile unsigned int*)(0x42708090UL))
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#define bFM3_MFS4_I2C_IBSR_RSA *((volatile unsigned int*)(0x42708094UL))
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#define bFM3_MFS4_I2C_IBSR_RACK *((volatile unsigned int*)(0x42708098UL))
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#define bFM3_MFS4_I2C_IBSR_FBT *((volatile unsigned int*)(0x4270809CUL))
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#define bFM3_MFS4_I2C_SSR_TBI *((volatile unsigned int*)(0x427080A0UL))
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#define bFM3_MFS4_I2C_SSR_TDRE *((volatile unsigned int*)(0x427080A4UL))
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#define bFM3_MFS4_I2C_SSR_RDRF *((volatile unsigned int*)(0x427080A8UL))
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#define bFM3_MFS4_I2C_SSR_ORE *((volatile unsigned int*)(0x427080ACUL))
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#define bFM3_MFS4_I2C_SSR_TBIE *((volatile unsigned int*)(0x427080B0UL))
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#define bFM3_MFS4_I2C_SSR_DMA *((volatile unsigned int*)(0x427080B4UL))
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#define bFM3_MFS4_I2C_SSR_TSET *((volatile unsigned int*)(0x427080B8UL))
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#define bFM3_MFS4_I2C_SSR_REC *((volatile unsigned int*)(0x427080BCUL))
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#define bFM3_MFS4_I2C_ISBA_SA0 *((volatile unsigned int*)(0x42708200UL))
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#define bFM3_MFS4_I2C_ISBA_SA1 *((volatile unsigned int*)(0x42708204UL))
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#define bFM3_MFS4_I2C_ISBA_SA2 *((volatile unsigned int*)(0x42708208UL))
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#define bFM3_MFS4_I2C_ISBA_SA3 *((volatile unsigned int*)(0x4270820CUL))
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#define bFM3_MFS4_I2C_ISBA_SA4 *((volatile unsigned int*)(0x42708210UL))
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#define bFM3_MFS4_I2C_ISBA_SA5 *((volatile unsigned int*)(0x42708214UL))
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#define bFM3_MFS4_I2C_ISBA_SA6 *((volatile unsigned int*)(0x42708218UL))
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#define bFM3_MFS4_I2C_ISBA_SAEN *((volatile unsigned int*)(0x4270821CUL))
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#define bFM3_MFS4_I2C_ISMK_SM0 *((volatile unsigned int*)(0x42708220UL))
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#define bFM3_MFS4_I2C_ISMK_SM1 *((volatile unsigned int*)(0x42708224UL))
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|
#define bFM3_MFS4_I2C_ISMK_SM2 *((volatile unsigned int*)(0x42708228UL))
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|
#define bFM3_MFS4_I2C_ISMK_SM3 *((volatile unsigned int*)(0x4270822CUL))
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|
#define bFM3_MFS4_I2C_ISMK_SM4 *((volatile unsigned int*)(0x42708230UL))
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#define bFM3_MFS4_I2C_ISMK_SM5 *((volatile unsigned int*)(0x42708234UL))
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|
#define bFM3_MFS4_I2C_ISMK_SM6 *((volatile unsigned int*)(0x42708238UL))
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#define bFM3_MFS4_I2C_ISMK_EN *((volatile unsigned int*)(0x4270823CUL))
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#define bFM3_MFS4_I2C_FCR_FE1 *((volatile unsigned int*)(0x42708280UL))
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#define bFM3_MFS4_I2C_FCR_FE2 *((volatile unsigned int*)(0x42708284UL))
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#define bFM3_MFS4_I2C_FCR_FCL1 *((volatile unsigned int*)(0x42708288UL))
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|
#define bFM3_MFS4_I2C_FCR_FCL2 *((volatile unsigned int*)(0x4270828CUL))
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|
#define bFM3_MFS4_I2C_FCR_FSET *((volatile unsigned int*)(0x42708290UL))
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#define bFM3_MFS4_I2C_FCR_FLD *((volatile unsigned int*)(0x42708294UL))
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#define bFM3_MFS4_I2C_FCR_FLST *((volatile unsigned int*)(0x42708298UL))
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#define bFM3_MFS4_I2C_FCR_FSEL *((volatile unsigned int*)(0x427082A0UL))
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#define bFM3_MFS4_I2C_FCR_FTIE *((volatile unsigned int*)(0x427082A4UL))
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|
#define bFM3_MFS4_I2C_FCR_FDRQ *((volatile unsigned int*)(0x427082A8UL))
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#define bFM3_MFS4_I2C_FCR_FRIE *((volatile unsigned int*)(0x427082ACUL))
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|
#define bFM3_MFS4_I2C_FCR_FLSTE *((volatile unsigned int*)(0x427082B0UL))
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#define bFM3_MFS4_I2C_FCR_FTST0 *((volatile unsigned int*)(0x427082B8UL))
|
|
#define bFM3_MFS4_I2C_FCR_FTST1 *((volatile unsigned int*)(0x427082BCUL))
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#define bFM3_MFS4_I2C_FCR0_FE1 *((volatile unsigned int*)(0x42708280UL))
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|
#define bFM3_MFS4_I2C_FCR0_FE2 *((volatile unsigned int*)(0x42708284UL))
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|
#define bFM3_MFS4_I2C_FCR0_FCL1 *((volatile unsigned int*)(0x42708288UL))
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#define bFM3_MFS4_I2C_FCR0_FCL2 *((volatile unsigned int*)(0x4270828CUL))
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#define bFM3_MFS4_I2C_FCR0_FSET *((volatile unsigned int*)(0x42708290UL))
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#define bFM3_MFS4_I2C_FCR0_FLD *((volatile unsigned int*)(0x42708294UL))
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#define bFM3_MFS4_I2C_FCR0_FLST *((volatile unsigned int*)(0x42708298UL))
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#define bFM3_MFS4_I2C_FCR1_FSEL *((volatile unsigned int*)(0x427082A0UL))
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#define bFM3_MFS4_I2C_FCR1_FTIE *((volatile unsigned int*)(0x427082A4UL))
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#define bFM3_MFS4_I2C_FCR1_FDRQ *((volatile unsigned int*)(0x427082A8UL))
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#define bFM3_MFS4_I2C_FCR1_FRIE *((volatile unsigned int*)(0x427082ACUL))
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#define bFM3_MFS4_I2C_FCR1_FLSTE *((volatile unsigned int*)(0x427082B0UL))
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#define bFM3_MFS4_I2C_FCR1_FTST0 *((volatile unsigned int*)(0x427082B8UL))
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#define bFM3_MFS4_I2C_FCR1_FTST1 *((volatile unsigned int*)(0x427082BCUL))
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#define bFM3_MFS4_I2C_FBYTE_FD0 *((volatile unsigned int*)(0x42708300UL))
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#define bFM3_MFS4_I2C_FBYTE_FD1 *((volatile unsigned int*)(0x42708304UL))
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#define bFM3_MFS4_I2C_FBYTE_FD2 *((volatile unsigned int*)(0x42708308UL))
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#define bFM3_MFS4_I2C_FBYTE_FD3 *((volatile unsigned int*)(0x4270830CUL))
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#define bFM3_MFS4_I2C_FBYTE_FD4 *((volatile unsigned int*)(0x42708310UL))
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#define bFM3_MFS4_I2C_FBYTE_FD5 *((volatile unsigned int*)(0x42708314UL))
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#define bFM3_MFS4_I2C_FBYTE_FD6 *((volatile unsigned int*)(0x42708318UL))
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#define bFM3_MFS4_I2C_FBYTE_FD7 *((volatile unsigned int*)(0x4270831CUL))
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#define bFM3_MFS4_I2C_FBYTE_FD8 *((volatile unsigned int*)(0x42708320UL))
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#define bFM3_MFS4_I2C_FBYTE_FD9 *((volatile unsigned int*)(0x42708324UL))
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#define bFM3_MFS4_I2C_FBYTE_FD10 *((volatile unsigned int*)(0x42708328UL))
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#define bFM3_MFS4_I2C_FBYTE_FD11 *((volatile unsigned int*)(0x4270832CUL))
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#define bFM3_MFS4_I2C_FBYTE_FD12 *((volatile unsigned int*)(0x42708330UL))
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#define bFM3_MFS4_I2C_FBYTE_FD13 *((volatile unsigned int*)(0x42708334UL))
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#define bFM3_MFS4_I2C_FBYTE_FD14 *((volatile unsigned int*)(0x42708338UL))
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#define bFM3_MFS4_I2C_FBYTE_FD15 *((volatile unsigned int*)(0x4270833CUL))
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#define bFM3_MFS4_I2C_FBYTE1_FD0 *((volatile unsigned int*)(0x42708300UL))
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#define bFM3_MFS4_I2C_FBYTE1_FD1 *((volatile unsigned int*)(0x42708304UL))
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#define bFM3_MFS4_I2C_FBYTE1_FD2 *((volatile unsigned int*)(0x42708308UL))
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#define bFM3_MFS4_I2C_FBYTE1_FD3 *((volatile unsigned int*)(0x4270830CUL))
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#define bFM3_MFS4_I2C_FBYTE1_FD4 *((volatile unsigned int*)(0x42708310UL))
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#define bFM3_MFS4_I2C_FBYTE1_FD5 *((volatile unsigned int*)(0x42708314UL))
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#define bFM3_MFS4_I2C_FBYTE1_FD6 *((volatile unsigned int*)(0x42708318UL))
|
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#define bFM3_MFS4_I2C_FBYTE1_FD7 *((volatile unsigned int*)(0x4270831CUL))
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#define bFM3_MFS4_I2C_FBYTE2_FD8 *((volatile unsigned int*)(0x42708320UL))
|
|
#define bFM3_MFS4_I2C_FBYTE2_FD9 *((volatile unsigned int*)(0x42708324UL))
|
|
#define bFM3_MFS4_I2C_FBYTE2_FD10 *((volatile unsigned int*)(0x42708328UL))
|
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#define bFM3_MFS4_I2C_FBYTE2_FD11 *((volatile unsigned int*)(0x4270832CUL))
|
|
#define bFM3_MFS4_I2C_FBYTE2_FD12 *((volatile unsigned int*)(0x42708330UL))
|
|
#define bFM3_MFS4_I2C_FBYTE2_FD13 *((volatile unsigned int*)(0x42708334UL))
|
|
#define bFM3_MFS4_I2C_FBYTE2_FD14 *((volatile unsigned int*)(0x42708338UL))
|
|
#define bFM3_MFS4_I2C_FBYTE2_FD15 *((volatile unsigned int*)(0x4270833CUL))
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|
|
|
/* UART asynchronous channel 5 registers */
|
|
#define bFM3_MFS5_UART_SMR_SOE *((volatile unsigned int*)(0x4270A000UL))
|
|
#define bFM3_MFS5_UART_SMR_BDS *((volatile unsigned int*)(0x4270A008UL))
|
|
#define bFM3_MFS5_UART_SMR_SBL *((volatile unsigned int*)(0x4270A00CUL))
|
|
#define bFM3_MFS5_UART_SMR_WUCR *((volatile unsigned int*)(0x4270A010UL))
|
|
#define bFM3_MFS5_UART_SMR_MD0 *((volatile unsigned int*)(0x4270A014UL))
|
|
#define bFM3_MFS5_UART_SMR_MD1 *((volatile unsigned int*)(0x4270A018UL))
|
|
#define bFM3_MFS5_UART_SMR_MD2 *((volatile unsigned int*)(0x4270A01CUL))
|
|
#define bFM3_MFS5_UART_SCR_TXE *((volatile unsigned int*)(0x4270A020UL))
|
|
#define bFM3_MFS5_UART_SCR_RXE *((volatile unsigned int*)(0x4270A024UL))
|
|
#define bFM3_MFS5_UART_SCR_TBIE *((volatile unsigned int*)(0x4270A028UL))
|
|
#define bFM3_MFS5_UART_SCR_TIE *((volatile unsigned int*)(0x4270A02CUL))
|
|
#define bFM3_MFS5_UART_SCR_RIE *((volatile unsigned int*)(0x4270A030UL))
|
|
#define bFM3_MFS5_UART_SCR_UPCL *((volatile unsigned int*)(0x4270A03CUL))
|
|
#define bFM3_MFS5_UART_ESCR_L0 *((volatile unsigned int*)(0x4270A080UL))
|
|
#define bFM3_MFS5_UART_ESCR_L1 *((volatile unsigned int*)(0x4270A084UL))
|
|
#define bFM3_MFS5_UART_ESCR_L2 *((volatile unsigned int*)(0x4270A088UL))
|
|
#define bFM3_MFS5_UART_ESCR_P *((volatile unsigned int*)(0x4270A08CUL))
|
|
#define bFM3_MFS5_UART_ESCR_PEN *((volatile unsigned int*)(0x4270A090UL))
|
|
#define bFM3_MFS5_UART_ESCR_INV *((volatile unsigned int*)(0x4270A094UL))
|
|
#define bFM3_MFS5_UART_ESCR_ESBL *((volatile unsigned int*)(0x4270A098UL))
|
|
#define bFM3_MFS5_UART_ESCR_FLWEN *((volatile unsigned int*)(0x4270A09CUL))
|
|
#define bFM3_MFS5_UART_SSR_TBI *((volatile unsigned int*)(0x4270A0A0UL))
|
|
#define bFM3_MFS5_UART_SSR_TDRE *((volatile unsigned int*)(0x4270A0A4UL))
|
|
#define bFM3_MFS5_UART_SSR_RDRF *((volatile unsigned int*)(0x4270A0A8UL))
|
|
#define bFM3_MFS5_UART_SSR_ORE *((volatile unsigned int*)(0x4270A0ACUL))
|
|
#define bFM3_MFS5_UART_SSR_FRE *((volatile unsigned int*)(0x4270A0B0UL))
|
|
#define bFM3_MFS5_UART_SSR_PE *((volatile unsigned int*)(0x4270A0B4UL))
|
|
#define bFM3_MFS5_UART_SSR_REC *((volatile unsigned int*)(0x4270A0BCUL))
|
|
#define bFM3_MFS5_UART_RDR_AD *((volatile unsigned int*)(0x4270A120UL))
|
|
#define bFM3_MFS5_UART_TDR_AD *((volatile unsigned int*)(0x4270A120UL))
|
|
#define bFM3_MFS5_UART_BGR_EXT *((volatile unsigned int*)(0x4270A1BCUL))
|
|
#define bFM3_MFS5_UART_BGR1_EXT *((volatile unsigned int*)(0x4270A1BCUL))
|
|
#define bFM3_MFS5_UART_FCR_FE1 *((volatile unsigned int*)(0x4270A280UL))
|
|
#define bFM3_MFS5_UART_FCR_FE2 *((volatile unsigned int*)(0x4270A284UL))
|
|
#define bFM3_MFS5_UART_FCR_FCL1 *((volatile unsigned int*)(0x4270A288UL))
|
|
#define bFM3_MFS5_UART_FCR_FCL2 *((volatile unsigned int*)(0x4270A28CUL))
|
|
#define bFM3_MFS5_UART_FCR_FSET *((volatile unsigned int*)(0x4270A290UL))
|
|
#define bFM3_MFS5_UART_FCR_FLD *((volatile unsigned int*)(0x4270A294UL))
|
|
#define bFM3_MFS5_UART_FCR_FLST *((volatile unsigned int*)(0x4270A298UL))
|
|
#define bFM3_MFS5_UART_FCR_FSEL *((volatile unsigned int*)(0x4270A2A0UL))
|
|
#define bFM3_MFS5_UART_FCR_FTIE *((volatile unsigned int*)(0x4270A2A4UL))
|
|
#define bFM3_MFS5_UART_FCR_FDRQ *((volatile unsigned int*)(0x4270A2A8UL))
|
|
#define bFM3_MFS5_UART_FCR_FRIE *((volatile unsigned int*)(0x4270A2ACUL))
|
|
#define bFM3_MFS5_UART_FCR_FLSTE *((volatile unsigned int*)(0x4270A2B0UL))
|
|
#define bFM3_MFS5_UART_FCR_FTST0 *((volatile unsigned int*)(0x4270A2B8UL))
|
|
#define bFM3_MFS5_UART_FCR_FTST1 *((volatile unsigned int*)(0x4270A2BCUL))
|
|
#define bFM3_MFS5_UART_FCR0_FE1 *((volatile unsigned int*)(0x4270A280UL))
|
|
#define bFM3_MFS5_UART_FCR0_FE2 *((volatile unsigned int*)(0x4270A284UL))
|
|
#define bFM3_MFS5_UART_FCR0_FCL1 *((volatile unsigned int*)(0x4270A288UL))
|
|
#define bFM3_MFS5_UART_FCR0_FCL2 *((volatile unsigned int*)(0x4270A28CUL))
|
|
#define bFM3_MFS5_UART_FCR0_FSET *((volatile unsigned int*)(0x4270A290UL))
|
|
#define bFM3_MFS5_UART_FCR0_FLD *((volatile unsigned int*)(0x4270A294UL))
|
|
#define bFM3_MFS5_UART_FCR0_FLST *((volatile unsigned int*)(0x4270A298UL))
|
|
#define bFM3_MFS5_UART_FCR1_FSEL *((volatile unsigned int*)(0x4270A2A0UL))
|
|
#define bFM3_MFS5_UART_FCR1_FTIE *((volatile unsigned int*)(0x4270A2A4UL))
|
|
#define bFM3_MFS5_UART_FCR1_FDRQ *((volatile unsigned int*)(0x4270A2A8UL))
|
|
#define bFM3_MFS5_UART_FCR1_FRIE *((volatile unsigned int*)(0x4270A2ACUL))
|
|
#define bFM3_MFS5_UART_FCR1_FLSTE *((volatile unsigned int*)(0x4270A2B0UL))
|
|
#define bFM3_MFS5_UART_FCR1_FTST0 *((volatile unsigned int*)(0x4270A2B8UL))
|
|
#define bFM3_MFS5_UART_FCR1_FTST1 *((volatile unsigned int*)(0x4270A2BCUL))
|
|
#define bFM3_MFS5_UART_FBYTE_FD0 *((volatile unsigned int*)(0x4270A300UL))
|
|
#define bFM3_MFS5_UART_FBYTE_FD1 *((volatile unsigned int*)(0x4270A304UL))
|
|
#define bFM3_MFS5_UART_FBYTE_FD2 *((volatile unsigned int*)(0x4270A308UL))
|
|
#define bFM3_MFS5_UART_FBYTE_FD3 *((volatile unsigned int*)(0x4270A30CUL))
|
|
#define bFM3_MFS5_UART_FBYTE_FD4 *((volatile unsigned int*)(0x4270A310UL))
|
|
#define bFM3_MFS5_UART_FBYTE_FD5 *((volatile unsigned int*)(0x4270A314UL))
|
|
#define bFM3_MFS5_UART_FBYTE_FD6 *((volatile unsigned int*)(0x4270A318UL))
|
|
#define bFM3_MFS5_UART_FBYTE_FD7 *((volatile unsigned int*)(0x4270A31CUL))
|
|
#define bFM3_MFS5_UART_FBYTE_FD8 *((volatile unsigned int*)(0x4270A320UL))
|
|
#define bFM3_MFS5_UART_FBYTE_FD9 *((volatile unsigned int*)(0x4270A324UL))
|
|
#define bFM3_MFS5_UART_FBYTE_FD10 *((volatile unsigned int*)(0x4270A328UL))
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#define bFM3_MFS5_UART_FBYTE_FD11 *((volatile unsigned int*)(0x4270A32CUL))
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#define bFM3_MFS5_UART_FBYTE_FD12 *((volatile unsigned int*)(0x4270A330UL))
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#define bFM3_MFS5_UART_FBYTE_FD13 *((volatile unsigned int*)(0x4270A334UL))
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#define bFM3_MFS5_UART_FBYTE_FD14 *((volatile unsigned int*)(0x4270A338UL))
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#define bFM3_MFS5_UART_FBYTE_FD15 *((volatile unsigned int*)(0x4270A33CUL))
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#define bFM3_MFS5_UART_FBYTE1_FD0 *((volatile unsigned int*)(0x4270A300UL))
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#define bFM3_MFS5_UART_FBYTE1_FD1 *((volatile unsigned int*)(0x4270A304UL))
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#define bFM3_MFS5_UART_FBYTE1_FD2 *((volatile unsigned int*)(0x4270A308UL))
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#define bFM3_MFS5_UART_FBYTE1_FD3 *((volatile unsigned int*)(0x4270A30CUL))
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#define bFM3_MFS5_UART_FBYTE1_FD4 *((volatile unsigned int*)(0x4270A310UL))
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#define bFM3_MFS5_UART_FBYTE1_FD5 *((volatile unsigned int*)(0x4270A314UL))
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#define bFM3_MFS5_UART_FBYTE1_FD6 *((volatile unsigned int*)(0x4270A318UL))
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#define bFM3_MFS5_UART_FBYTE1_FD7 *((volatile unsigned int*)(0x4270A31CUL))
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#define bFM3_MFS5_UART_FBYTE2_FD8 *((volatile unsigned int*)(0x4270A320UL))
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#define bFM3_MFS5_UART_FBYTE2_FD9 *((volatile unsigned int*)(0x4270A324UL))
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#define bFM3_MFS5_UART_FBYTE2_FD10 *((volatile unsigned int*)(0x4270A328UL))
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#define bFM3_MFS5_UART_FBYTE2_FD11 *((volatile unsigned int*)(0x4270A32CUL))
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#define bFM3_MFS5_UART_FBYTE2_FD12 *((volatile unsigned int*)(0x4270A330UL))
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#define bFM3_MFS5_UART_FBYTE2_FD13 *((volatile unsigned int*)(0x4270A334UL))
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#define bFM3_MFS5_UART_FBYTE2_FD14 *((volatile unsigned int*)(0x4270A338UL))
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#define bFM3_MFS5_UART_FBYTE2_FD15 *((volatile unsigned int*)(0x4270A33CUL))
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/* UART synchronous channel 5 registers */
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#define bFM3_MFS5_CSIO_SMR_SOE *((volatile unsigned int*)(0x4270A000UL))
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#define bFM3_MFS5_CSIO_SMR_SCKE *((volatile unsigned int*)(0x4270A004UL))
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#define bFM3_MFS5_CSIO_SMR_BDS *((volatile unsigned int*)(0x4270A008UL))
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#define bFM3_MFS5_CSIO_SMR_SCINV *((volatile unsigned int*)(0x4270A00CUL))
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#define bFM3_MFS5_CSIO_SMR_WUCR *((volatile unsigned int*)(0x4270A010UL))
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#define bFM3_MFS5_CSIO_SMR_MD0 *((volatile unsigned int*)(0x4270A014UL))
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#define bFM3_MFS5_CSIO_SMR_MD1 *((volatile unsigned int*)(0x4270A018UL))
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#define bFM3_MFS5_CSIO_SMR_MD2 *((volatile unsigned int*)(0x4270A01CUL))
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#define bFM3_MFS5_CSIO_SCR_TXE *((volatile unsigned int*)(0x4270A020UL))
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#define bFM3_MFS5_CSIO_SCR_RXE *((volatile unsigned int*)(0x4270A024UL))
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#define bFM3_MFS5_CSIO_SCR_TBIE *((volatile unsigned int*)(0x4270A028UL))
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#define bFM3_MFS5_CSIO_SCR_TIE *((volatile unsigned int*)(0x4270A02CUL))
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#define bFM3_MFS5_CSIO_SCR_RIE *((volatile unsigned int*)(0x4270A030UL))
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#define bFM3_MFS5_CSIO_SCR_SPI *((volatile unsigned int*)(0x4270A034UL))
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#define bFM3_MFS5_CSIO_SCR_MS *((volatile unsigned int*)(0x4270A038UL))
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#define bFM3_MFS5_CSIO_SCR_UPCL *((volatile unsigned int*)(0x4270A03CUL))
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#define bFM3_MFS5_CSIO_ESCR_L0 *((volatile unsigned int*)(0x4270A080UL))
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#define bFM3_MFS5_CSIO_ESCR_L1 *((volatile unsigned int*)(0x4270A084UL))
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#define bFM3_MFS5_CSIO_ESCR_L2 *((volatile unsigned int*)(0x4270A088UL))
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#define bFM3_MFS5_CSIO_ESCR_WT0 *((volatile unsigned int*)(0x4270A08CUL))
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#define bFM3_MFS5_CSIO_ESCR_WT1 *((volatile unsigned int*)(0x4270A090UL))
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#define bFM3_MFS5_CSIO_ESCR_SOP *((volatile unsigned int*)(0x4270A09CUL))
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#define bFM3_MFS5_CSIO_SSR_TBI *((volatile unsigned int*)(0x4270A0A0UL))
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#define bFM3_MFS5_CSIO_SSR_TDRE *((volatile unsigned int*)(0x4270A0A4UL))
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#define bFM3_MFS5_CSIO_SSR_RDRF *((volatile unsigned int*)(0x4270A0A8UL))
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#define bFM3_MFS5_CSIO_SSR_ORE *((volatile unsigned int*)(0x4270A0ACUL))
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#define bFM3_MFS5_CSIO_SSR_REC *((volatile unsigned int*)(0x4270A0BCUL))
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#define bFM3_MFS5_CSIO_FCR_FE1 *((volatile unsigned int*)(0x4270A280UL))
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#define bFM3_MFS5_CSIO_FCR_FE2 *((volatile unsigned int*)(0x4270A284UL))
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#define bFM3_MFS5_CSIO_FCR_FCL1 *((volatile unsigned int*)(0x4270A288UL))
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#define bFM3_MFS5_CSIO_FCR_FCL2 *((volatile unsigned int*)(0x4270A28CUL))
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#define bFM3_MFS5_CSIO_FCR_FSET *((volatile unsigned int*)(0x4270A290UL))
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#define bFM3_MFS5_CSIO_FCR_FLD *((volatile unsigned int*)(0x4270A294UL))
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#define bFM3_MFS5_CSIO_FCR_FLST *((volatile unsigned int*)(0x4270A298UL))
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#define bFM3_MFS5_CSIO_FCR_FSEL *((volatile unsigned int*)(0x4270A2A0UL))
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#define bFM3_MFS5_CSIO_FCR_FTIE *((volatile unsigned int*)(0x4270A2A4UL))
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#define bFM3_MFS5_CSIO_FCR_FDRQ *((volatile unsigned int*)(0x4270A2A8UL))
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#define bFM3_MFS5_CSIO_FCR_FRIE *((volatile unsigned int*)(0x4270A2ACUL))
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#define bFM3_MFS5_CSIO_FCR_FLSTE *((volatile unsigned int*)(0x4270A2B0UL))
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#define bFM3_MFS5_CSIO_FCR_FTST0 *((volatile unsigned int*)(0x4270A2B8UL))
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#define bFM3_MFS5_CSIO_FCR_FTST1 *((volatile unsigned int*)(0x4270A2BCUL))
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#define bFM3_MFS5_CSIO_FCR0_FE1 *((volatile unsigned int*)(0x4270A280UL))
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#define bFM3_MFS5_CSIO_FCR0_FE2 *((volatile unsigned int*)(0x4270A284UL))
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#define bFM3_MFS5_CSIO_FCR0_FCL1 *((volatile unsigned int*)(0x4270A288UL))
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#define bFM3_MFS5_CSIO_FCR0_FCL2 *((volatile unsigned int*)(0x4270A28CUL))
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#define bFM3_MFS5_CSIO_FCR0_FSET *((volatile unsigned int*)(0x4270A290UL))
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#define bFM3_MFS5_CSIO_FCR0_FLD *((volatile unsigned int*)(0x4270A294UL))
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#define bFM3_MFS5_CSIO_FCR0_FLST *((volatile unsigned int*)(0x4270A298UL))
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#define bFM3_MFS5_CSIO_FCR1_FSEL *((volatile unsigned int*)(0x4270A2A0UL))
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#define bFM3_MFS5_CSIO_FCR1_FTIE *((volatile unsigned int*)(0x4270A2A4UL))
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#define bFM3_MFS5_CSIO_FCR1_FDRQ *((volatile unsigned int*)(0x4270A2A8UL))
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#define bFM3_MFS5_CSIO_FCR1_FRIE *((volatile unsigned int*)(0x4270A2ACUL))
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#define bFM3_MFS5_CSIO_FCR1_FLSTE *((volatile unsigned int*)(0x4270A2B0UL))
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#define bFM3_MFS5_CSIO_FCR1_FTST0 *((volatile unsigned int*)(0x4270A2B8UL))
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#define bFM3_MFS5_CSIO_FCR1_FTST1 *((volatile unsigned int*)(0x4270A2BCUL))
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#define bFM3_MFS5_CSIO_FBYTE_FD0 *((volatile unsigned int*)(0x4270A300UL))
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#define bFM3_MFS5_CSIO_FBYTE_FD1 *((volatile unsigned int*)(0x4270A304UL))
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#define bFM3_MFS5_CSIO_FBYTE_FD2 *((volatile unsigned int*)(0x4270A308UL))
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#define bFM3_MFS5_CSIO_FBYTE_FD3 *((volatile unsigned int*)(0x4270A30CUL))
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#define bFM3_MFS5_CSIO_FBYTE_FD4 *((volatile unsigned int*)(0x4270A310UL))
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#define bFM3_MFS5_CSIO_FBYTE_FD5 *((volatile unsigned int*)(0x4270A314UL))
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#define bFM3_MFS5_CSIO_FBYTE_FD6 *((volatile unsigned int*)(0x4270A318UL))
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#define bFM3_MFS5_CSIO_FBYTE_FD7 *((volatile unsigned int*)(0x4270A31CUL))
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#define bFM3_MFS5_CSIO_FBYTE_FD8 *((volatile unsigned int*)(0x4270A320UL))
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#define bFM3_MFS5_CSIO_FBYTE_FD9 *((volatile unsigned int*)(0x4270A324UL))
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#define bFM3_MFS5_CSIO_FBYTE_FD10 *((volatile unsigned int*)(0x4270A328UL))
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#define bFM3_MFS5_CSIO_FBYTE_FD11 *((volatile unsigned int*)(0x4270A32CUL))
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#define bFM3_MFS5_CSIO_FBYTE_FD12 *((volatile unsigned int*)(0x4270A330UL))
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#define bFM3_MFS5_CSIO_FBYTE_FD13 *((volatile unsigned int*)(0x4270A334UL))
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#define bFM3_MFS5_CSIO_FBYTE_FD14 *((volatile unsigned int*)(0x4270A338UL))
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#define bFM3_MFS5_CSIO_FBYTE_FD15 *((volatile unsigned int*)(0x4270A33CUL))
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#define bFM3_MFS5_CSIO_FBYTE1_FD0 *((volatile unsigned int*)(0x4270A300UL))
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#define bFM3_MFS5_CSIO_FBYTE1_FD1 *((volatile unsigned int*)(0x4270A304UL))
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#define bFM3_MFS5_CSIO_FBYTE1_FD2 *((volatile unsigned int*)(0x4270A308UL))
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#define bFM3_MFS5_CSIO_FBYTE1_FD3 *((volatile unsigned int*)(0x4270A30CUL))
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#define bFM3_MFS5_CSIO_FBYTE1_FD4 *((volatile unsigned int*)(0x4270A310UL))
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#define bFM3_MFS5_CSIO_FBYTE1_FD5 *((volatile unsigned int*)(0x4270A314UL))
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#define bFM3_MFS5_CSIO_FBYTE1_FD6 *((volatile unsigned int*)(0x4270A318UL))
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#define bFM3_MFS5_CSIO_FBYTE1_FD7 *((volatile unsigned int*)(0x4270A31CUL))
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#define bFM3_MFS5_CSIO_FBYTE2_FD8 *((volatile unsigned int*)(0x4270A320UL))
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#define bFM3_MFS5_CSIO_FBYTE2_FD9 *((volatile unsigned int*)(0x4270A324UL))
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#define bFM3_MFS5_CSIO_FBYTE2_FD10 *((volatile unsigned int*)(0x4270A328UL))
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#define bFM3_MFS5_CSIO_FBYTE2_FD11 *((volatile unsigned int*)(0x4270A32CUL))
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#define bFM3_MFS5_CSIO_FBYTE2_FD12 *((volatile unsigned int*)(0x4270A330UL))
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#define bFM3_MFS5_CSIO_FBYTE2_FD13 *((volatile unsigned int*)(0x4270A334UL))
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#define bFM3_MFS5_CSIO_FBYTE2_FD14 *((volatile unsigned int*)(0x4270A338UL))
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#define bFM3_MFS5_CSIO_FBYTE2_FD15 *((volatile unsigned int*)(0x4270A33CUL))
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/* UART LIN channel 5 registers */
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#define bFM3_MFS5_LIN_SMR_SOE *((volatile unsigned int*)(0x4270A000UL))
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#define bFM3_MFS5_LIN_SMR_SBL *((volatile unsigned int*)(0x4270A00CUL))
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#define bFM3_MFS5_LIN_SMR_WUCR *((volatile unsigned int*)(0x4270A010UL))
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#define bFM3_MFS5_LIN_SMR_MD0 *((volatile unsigned int*)(0x4270A014UL))
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#define bFM3_MFS5_LIN_SMR_MD1 *((volatile unsigned int*)(0x4270A018UL))
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#define bFM3_MFS5_LIN_SMR_MD2 *((volatile unsigned int*)(0x4270A01CUL))
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#define bFM3_MFS5_LIN_SCR_TXE *((volatile unsigned int*)(0x4270A020UL))
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#define bFM3_MFS5_LIN_SCR_RXE *((volatile unsigned int*)(0x4270A024UL))
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#define bFM3_MFS5_LIN_SCR_TBIE *((volatile unsigned int*)(0x4270A028UL))
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#define bFM3_MFS5_LIN_SCR_TIE *((volatile unsigned int*)(0x4270A02CUL))
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#define bFM3_MFS5_LIN_SCR_RIE *((volatile unsigned int*)(0x4270A030UL))
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#define bFM3_MFS5_LIN_SCR_LBR *((volatile unsigned int*)(0x4270A034UL))
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#define bFM3_MFS5_LIN_SCR_MS *((volatile unsigned int*)(0x4270A038UL))
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#define bFM3_MFS5_LIN_SCR_UPCL *((volatile unsigned int*)(0x4270A03CUL))
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#define bFM3_MFS5_LIN_ESCR_DEL0 *((volatile unsigned int*)(0x4270A080UL))
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#define bFM3_MFS5_LIN_ESCR_DEL1 *((volatile unsigned int*)(0x4270A084UL))
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#define bFM3_MFS5_LIN_ESCR_LBL0 *((volatile unsigned int*)(0x4270A088UL))
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#define bFM3_MFS5_LIN_ESCR_LBL1 *((volatile unsigned int*)(0x4270A08CUL))
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#define bFM3_MFS5_LIN_ESCR_LBIE *((volatile unsigned int*)(0x4270A090UL))
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#define bFM3_MFS5_LIN_ESCR_ESBL *((volatile unsigned int*)(0x4270A098UL))
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#define bFM3_MFS5_LIN_SSR_TBI *((volatile unsigned int*)(0x4270A0A0UL))
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#define bFM3_MFS5_LIN_SSR_TDRE *((volatile unsigned int*)(0x4270A0A4UL))
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#define bFM3_MFS5_LIN_SSR_RDRF *((volatile unsigned int*)(0x4270A0A8UL))
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#define bFM3_MFS5_LIN_SSR_ORE *((volatile unsigned int*)(0x4270A0ACUL))
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#define bFM3_MFS5_LIN_SSR_FRE *((volatile unsigned int*)(0x4270A0B0UL))
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#define bFM3_MFS5_LIN_SSR_LBD *((volatile unsigned int*)(0x4270A0B4UL))
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#define bFM3_MFS5_LIN_SSR_REC *((volatile unsigned int*)(0x4270A0BCUL))
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#define bFM3_MFS5_LIN_BGR_EXT *((volatile unsigned int*)(0x4270A1BCUL))
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#define bFM3_MFS5_LIN_BGR1_EXT *((volatile unsigned int*)(0x4270A1BCUL))
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#define bFM3_MFS5_LIN_FCR_FE1 *((volatile unsigned int*)(0x4270A280UL))
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#define bFM3_MFS5_LIN_FCR_FE2 *((volatile unsigned int*)(0x4270A284UL))
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#define bFM3_MFS5_LIN_FCR_FCL1 *((volatile unsigned int*)(0x4270A288UL))
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#define bFM3_MFS5_LIN_FCR_FCL2 *((volatile unsigned int*)(0x4270A28CUL))
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#define bFM3_MFS5_LIN_FCR_FSET *((volatile unsigned int*)(0x4270A290UL))
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#define bFM3_MFS5_LIN_FCR_FLD *((volatile unsigned int*)(0x4270A294UL))
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#define bFM3_MFS5_LIN_FCR_FLST *((volatile unsigned int*)(0x4270A298UL))
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#define bFM3_MFS5_LIN_FCR_FSEL *((volatile unsigned int*)(0x4270A2A0UL))
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#define bFM3_MFS5_LIN_FCR_FTIE *((volatile unsigned int*)(0x4270A2A4UL))
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#define bFM3_MFS5_LIN_FCR_FDRQ *((volatile unsigned int*)(0x4270A2A8UL))
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#define bFM3_MFS5_LIN_FCR_FRIE *((volatile unsigned int*)(0x4270A2ACUL))
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#define bFM3_MFS5_LIN_FCR_FLSTE *((volatile unsigned int*)(0x4270A2B0UL))
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#define bFM3_MFS5_LIN_FCR_FTST0 *((volatile unsigned int*)(0x4270A2B8UL))
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#define bFM3_MFS5_LIN_FCR_FTST1 *((volatile unsigned int*)(0x4270A2BCUL))
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#define bFM3_MFS5_LIN_FCR0_FE1 *((volatile unsigned int*)(0x4270A280UL))
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#define bFM3_MFS5_LIN_FCR0_FE2 *((volatile unsigned int*)(0x4270A284UL))
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#define bFM3_MFS5_LIN_FCR0_FCL1 *((volatile unsigned int*)(0x4270A288UL))
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#define bFM3_MFS5_LIN_FCR0_FCL2 *((volatile unsigned int*)(0x4270A28CUL))
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#define bFM3_MFS5_LIN_FCR0_FSET *((volatile unsigned int*)(0x4270A290UL))
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#define bFM3_MFS5_LIN_FCR0_FLD *((volatile unsigned int*)(0x4270A294UL))
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#define bFM3_MFS5_LIN_FCR0_FLST *((volatile unsigned int*)(0x4270A298UL))
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#define bFM3_MFS5_LIN_FCR1_FSEL *((volatile unsigned int*)(0x4270A2A0UL))
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#define bFM3_MFS5_LIN_FCR1_FTIE *((volatile unsigned int*)(0x4270A2A4UL))
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#define bFM3_MFS5_LIN_FCR1_FDRQ *((volatile unsigned int*)(0x4270A2A8UL))
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#define bFM3_MFS5_LIN_FCR1_FRIE *((volatile unsigned int*)(0x4270A2ACUL))
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#define bFM3_MFS5_LIN_FCR1_FLSTE *((volatile unsigned int*)(0x4270A2B0UL))
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#define bFM3_MFS5_LIN_FCR1_FTST0 *((volatile unsigned int*)(0x4270A2B8UL))
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#define bFM3_MFS5_LIN_FCR1_FTST1 *((volatile unsigned int*)(0x4270A2BCUL))
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#define bFM3_MFS5_LIN_FBYTE_FD0 *((volatile unsigned int*)(0x4270A300UL))
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#define bFM3_MFS5_LIN_FBYTE_FD1 *((volatile unsigned int*)(0x4270A304UL))
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#define bFM3_MFS5_LIN_FBYTE_FD2 *((volatile unsigned int*)(0x4270A308UL))
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#define bFM3_MFS5_LIN_FBYTE_FD3 *((volatile unsigned int*)(0x4270A30CUL))
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#define bFM3_MFS5_LIN_FBYTE_FD4 *((volatile unsigned int*)(0x4270A310UL))
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#define bFM3_MFS5_LIN_FBYTE_FD5 *((volatile unsigned int*)(0x4270A314UL))
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#define bFM3_MFS5_LIN_FBYTE_FD6 *((volatile unsigned int*)(0x4270A318UL))
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#define bFM3_MFS5_LIN_FBYTE_FD7 *((volatile unsigned int*)(0x4270A31CUL))
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#define bFM3_MFS5_LIN_FBYTE_FD8 *((volatile unsigned int*)(0x4270A320UL))
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#define bFM3_MFS5_LIN_FBYTE_FD9 *((volatile unsigned int*)(0x4270A324UL))
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#define bFM3_MFS5_LIN_FBYTE_FD10 *((volatile unsigned int*)(0x4270A328UL))
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#define bFM3_MFS5_LIN_FBYTE_FD11 *((volatile unsigned int*)(0x4270A32CUL))
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#define bFM3_MFS5_LIN_FBYTE_FD12 *((volatile unsigned int*)(0x4270A330UL))
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#define bFM3_MFS5_LIN_FBYTE_FD13 *((volatile unsigned int*)(0x4270A334UL))
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#define bFM3_MFS5_LIN_FBYTE_FD14 *((volatile unsigned int*)(0x4270A338UL))
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#define bFM3_MFS5_LIN_FBYTE_FD15 *((volatile unsigned int*)(0x4270A33CUL))
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#define bFM3_MFS5_LIN_FBYTE1_FD0 *((volatile unsigned int*)(0x4270A300UL))
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#define bFM3_MFS5_LIN_FBYTE1_FD1 *((volatile unsigned int*)(0x4270A304UL))
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#define bFM3_MFS5_LIN_FBYTE1_FD2 *((volatile unsigned int*)(0x4270A308UL))
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#define bFM3_MFS5_LIN_FBYTE1_FD3 *((volatile unsigned int*)(0x4270A30CUL))
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#define bFM3_MFS5_LIN_FBYTE1_FD4 *((volatile unsigned int*)(0x4270A310UL))
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#define bFM3_MFS5_LIN_FBYTE1_FD5 *((volatile unsigned int*)(0x4270A314UL))
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#define bFM3_MFS5_LIN_FBYTE1_FD6 *((volatile unsigned int*)(0x4270A318UL))
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#define bFM3_MFS5_LIN_FBYTE1_FD7 *((volatile unsigned int*)(0x4270A31CUL))
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#define bFM3_MFS5_LIN_FBYTE2_FD8 *((volatile unsigned int*)(0x4270A320UL))
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#define bFM3_MFS5_LIN_FBYTE2_FD9 *((volatile unsigned int*)(0x4270A324UL))
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#define bFM3_MFS5_LIN_FBYTE2_FD10 *((volatile unsigned int*)(0x4270A328UL))
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#define bFM3_MFS5_LIN_FBYTE2_FD11 *((volatile unsigned int*)(0x4270A32CUL))
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#define bFM3_MFS5_LIN_FBYTE2_FD12 *((volatile unsigned int*)(0x4270A330UL))
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#define bFM3_MFS5_LIN_FBYTE2_FD13 *((volatile unsigned int*)(0x4270A334UL))
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#define bFM3_MFS5_LIN_FBYTE2_FD14 *((volatile unsigned int*)(0x4270A338UL))
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#define bFM3_MFS5_LIN_FBYTE2_FD15 *((volatile unsigned int*)(0x4270A33CUL))
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/* I2C channel 5 registers */
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#define bFM3_MFS5_I2C_SMR_ITST0 *((volatile unsigned int*)(0x4270A000UL))
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#define bFM3_MFS5_I2C_SMR_ITST1 *((volatile unsigned int*)(0x4270A004UL))
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#define bFM3_MFS5_I2C_SMR_TIE *((volatile unsigned int*)(0x4270A008UL))
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#define bFM3_MFS5_I2C_SMR_RIE *((volatile unsigned int*)(0x4270A00CUL))
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#define bFM3_MFS5_I2C_SMR_WUCR *((volatile unsigned int*)(0x4270A010UL))
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#define bFM3_MFS5_I2C_SMR_MD0 *((volatile unsigned int*)(0x4270A014UL))
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#define bFM3_MFS5_I2C_SMR_MD1 *((volatile unsigned int*)(0x4270A018UL))
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#define bFM3_MFS5_I2C_SMR_MD2 *((volatile unsigned int*)(0x4270A01CUL))
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#define bFM3_MFS5_I2C_IBCR_INT *((volatile unsigned int*)(0x4270A020UL))
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#define bFM3_MFS5_I2C_IBCR_BER *((volatile unsigned int*)(0x4270A024UL))
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#define bFM3_MFS5_I2C_IBCR_INTE *((volatile unsigned int*)(0x4270A028UL))
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#define bFM3_MFS5_I2C_IBCR_CNDE *((volatile unsigned int*)(0x4270A02CUL))
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#define bFM3_MFS5_I2C_IBCR_WSEL *((volatile unsigned int*)(0x4270A030UL))
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#define bFM3_MFS5_I2C_IBCR_ACKE *((volatile unsigned int*)(0x4270A034UL))
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#define bFM3_MFS5_I2C_IBCR_ACT *((volatile unsigned int*)(0x4270A038UL))
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#define bFM3_MFS5_I2C_IBCR_SCC *((volatile unsigned int*)(0x4270A038UL))
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#define bFM3_MFS5_I2C_IBCR_MSS *((volatile unsigned int*)(0x4270A03CUL))
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#define bFM3_MFS5_I2C_IBSR_BB *((volatile unsigned int*)(0x4270A080UL))
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#define bFM3_MFS5_I2C_IBSR_SPC *((volatile unsigned int*)(0x4270A084UL))
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#define bFM3_MFS5_I2C_IBSR_RSC *((volatile unsigned int*)(0x4270A088UL))
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#define bFM3_MFS5_I2C_IBSR_AL *((volatile unsigned int*)(0x4270A08CUL))
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#define bFM3_MFS5_I2C_IBSR_TRX *((volatile unsigned int*)(0x4270A090UL))
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#define bFM3_MFS5_I2C_IBSR_RSA *((volatile unsigned int*)(0x4270A094UL))
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#define bFM3_MFS5_I2C_IBSR_RACK *((volatile unsigned int*)(0x4270A098UL))
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#define bFM3_MFS5_I2C_IBSR_FBT *((volatile unsigned int*)(0x4270A09CUL))
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#define bFM3_MFS5_I2C_SSR_TBI *((volatile unsigned int*)(0x4270A0A0UL))
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#define bFM3_MFS5_I2C_SSR_TDRE *((volatile unsigned int*)(0x4270A0A4UL))
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#define bFM3_MFS5_I2C_SSR_RDRF *((volatile unsigned int*)(0x4270A0A8UL))
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#define bFM3_MFS5_I2C_SSR_ORE *((volatile unsigned int*)(0x4270A0ACUL))
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#define bFM3_MFS5_I2C_SSR_TBIE *((volatile unsigned int*)(0x4270A0B0UL))
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#define bFM3_MFS5_I2C_SSR_DMA *((volatile unsigned int*)(0x4270A0B4UL))
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#define bFM3_MFS5_I2C_SSR_TSET *((volatile unsigned int*)(0x4270A0B8UL))
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#define bFM3_MFS5_I2C_SSR_REC *((volatile unsigned int*)(0x4270A0BCUL))
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#define bFM3_MFS5_I2C_ISBA_SA0 *((volatile unsigned int*)(0x4270A200UL))
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#define bFM3_MFS5_I2C_ISBA_SA1 *((volatile unsigned int*)(0x4270A204UL))
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#define bFM3_MFS5_I2C_ISBA_SA2 *((volatile unsigned int*)(0x4270A208UL))
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#define bFM3_MFS5_I2C_ISBA_SA3 *((volatile unsigned int*)(0x4270A20CUL))
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#define bFM3_MFS5_I2C_ISBA_SA4 *((volatile unsigned int*)(0x4270A210UL))
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#define bFM3_MFS5_I2C_ISBA_SA5 *((volatile unsigned int*)(0x4270A214UL))
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#define bFM3_MFS5_I2C_ISBA_SA6 *((volatile unsigned int*)(0x4270A218UL))
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#define bFM3_MFS5_I2C_ISBA_SAEN *((volatile unsigned int*)(0x4270A21CUL))
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#define bFM3_MFS5_I2C_ISMK_SM0 *((volatile unsigned int*)(0x4270A220UL))
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#define bFM3_MFS5_I2C_ISMK_SM1 *((volatile unsigned int*)(0x4270A224UL))
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#define bFM3_MFS5_I2C_ISMK_SM2 *((volatile unsigned int*)(0x4270A228UL))
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#define bFM3_MFS5_I2C_ISMK_SM3 *((volatile unsigned int*)(0x4270A22CUL))
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#define bFM3_MFS5_I2C_ISMK_SM4 *((volatile unsigned int*)(0x4270A230UL))
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#define bFM3_MFS5_I2C_ISMK_SM5 *((volatile unsigned int*)(0x4270A234UL))
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#define bFM3_MFS5_I2C_ISMK_SM6 *((volatile unsigned int*)(0x4270A238UL))
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#define bFM3_MFS5_I2C_ISMK_EN *((volatile unsigned int*)(0x4270A23CUL))
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#define bFM3_MFS5_I2C_FCR_FE1 *((volatile unsigned int*)(0x4270A280UL))
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#define bFM3_MFS5_I2C_FCR_FE2 *((volatile unsigned int*)(0x4270A284UL))
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#define bFM3_MFS5_I2C_FCR_FCL1 *((volatile unsigned int*)(0x4270A288UL))
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#define bFM3_MFS5_I2C_FCR_FCL2 *((volatile unsigned int*)(0x4270A28CUL))
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#define bFM3_MFS5_I2C_FCR_FSET *((volatile unsigned int*)(0x4270A290UL))
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#define bFM3_MFS5_I2C_FCR_FLD *((volatile unsigned int*)(0x4270A294UL))
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#define bFM3_MFS5_I2C_FCR_FLST *((volatile unsigned int*)(0x4270A298UL))
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#define bFM3_MFS5_I2C_FCR_FSEL *((volatile unsigned int*)(0x4270A2A0UL))
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#define bFM3_MFS5_I2C_FCR_FTIE *((volatile unsigned int*)(0x4270A2A4UL))
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#define bFM3_MFS5_I2C_FCR_FDRQ *((volatile unsigned int*)(0x4270A2A8UL))
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#define bFM3_MFS5_I2C_FCR_FRIE *((volatile unsigned int*)(0x4270A2ACUL))
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#define bFM3_MFS5_I2C_FCR_FLSTE *((volatile unsigned int*)(0x4270A2B0UL))
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#define bFM3_MFS5_I2C_FCR_FTST0 *((volatile unsigned int*)(0x4270A2B8UL))
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#define bFM3_MFS5_I2C_FCR_FTST1 *((volatile unsigned int*)(0x4270A2BCUL))
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#define bFM3_MFS5_I2C_FCR0_FE1 *((volatile unsigned int*)(0x4270A280UL))
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#define bFM3_MFS5_I2C_FCR0_FE2 *((volatile unsigned int*)(0x4270A284UL))
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#define bFM3_MFS5_I2C_FCR0_FCL1 *((volatile unsigned int*)(0x4270A288UL))
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#define bFM3_MFS5_I2C_FCR0_FCL2 *((volatile unsigned int*)(0x4270A28CUL))
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#define bFM3_MFS5_I2C_FCR0_FSET *((volatile unsigned int*)(0x4270A290UL))
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#define bFM3_MFS5_I2C_FCR0_FLD *((volatile unsigned int*)(0x4270A294UL))
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#define bFM3_MFS5_I2C_FCR0_FLST *((volatile unsigned int*)(0x4270A298UL))
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#define bFM3_MFS5_I2C_FCR1_FSEL *((volatile unsigned int*)(0x4270A2A0UL))
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#define bFM3_MFS5_I2C_FCR1_FTIE *((volatile unsigned int*)(0x4270A2A4UL))
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#define bFM3_MFS5_I2C_FCR1_FDRQ *((volatile unsigned int*)(0x4270A2A8UL))
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#define bFM3_MFS5_I2C_FCR1_FRIE *((volatile unsigned int*)(0x4270A2ACUL))
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#define bFM3_MFS5_I2C_FCR1_FLSTE *((volatile unsigned int*)(0x4270A2B0UL))
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#define bFM3_MFS5_I2C_FCR1_FTST0 *((volatile unsigned int*)(0x4270A2B8UL))
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#define bFM3_MFS5_I2C_FCR1_FTST1 *((volatile unsigned int*)(0x4270A2BCUL))
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#define bFM3_MFS5_I2C_FBYTE_FD0 *((volatile unsigned int*)(0x4270A300UL))
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#define bFM3_MFS5_I2C_FBYTE_FD1 *((volatile unsigned int*)(0x4270A304UL))
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#define bFM3_MFS5_I2C_FBYTE_FD2 *((volatile unsigned int*)(0x4270A308UL))
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#define bFM3_MFS5_I2C_FBYTE_FD3 *((volatile unsigned int*)(0x4270A30CUL))
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#define bFM3_MFS5_I2C_FBYTE_FD4 *((volatile unsigned int*)(0x4270A310UL))
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#define bFM3_MFS5_I2C_FBYTE_FD5 *((volatile unsigned int*)(0x4270A314UL))
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#define bFM3_MFS5_I2C_FBYTE_FD6 *((volatile unsigned int*)(0x4270A318UL))
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#define bFM3_MFS5_I2C_FBYTE_FD7 *((volatile unsigned int*)(0x4270A31CUL))
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#define bFM3_MFS5_I2C_FBYTE_FD8 *((volatile unsigned int*)(0x4270A320UL))
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#define bFM3_MFS5_I2C_FBYTE_FD9 *((volatile unsigned int*)(0x4270A324UL))
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#define bFM3_MFS5_I2C_FBYTE_FD10 *((volatile unsigned int*)(0x4270A328UL))
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#define bFM3_MFS5_I2C_FBYTE_FD11 *((volatile unsigned int*)(0x4270A32CUL))
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#define bFM3_MFS5_I2C_FBYTE_FD12 *((volatile unsigned int*)(0x4270A330UL))
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#define bFM3_MFS5_I2C_FBYTE_FD13 *((volatile unsigned int*)(0x4270A334UL))
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#define bFM3_MFS5_I2C_FBYTE_FD14 *((volatile unsigned int*)(0x4270A338UL))
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#define bFM3_MFS5_I2C_FBYTE_FD15 *((volatile unsigned int*)(0x4270A33CUL))
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#define bFM3_MFS5_I2C_FBYTE1_FD0 *((volatile unsigned int*)(0x4270A300UL))
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#define bFM3_MFS5_I2C_FBYTE1_FD1 *((volatile unsigned int*)(0x4270A304UL))
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#define bFM3_MFS5_I2C_FBYTE1_FD2 *((volatile unsigned int*)(0x4270A308UL))
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#define bFM3_MFS5_I2C_FBYTE1_FD3 *((volatile unsigned int*)(0x4270A30CUL))
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#define bFM3_MFS5_I2C_FBYTE1_FD4 *((volatile unsigned int*)(0x4270A310UL))
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#define bFM3_MFS5_I2C_FBYTE1_FD5 *((volatile unsigned int*)(0x4270A314UL))
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#define bFM3_MFS5_I2C_FBYTE1_FD6 *((volatile unsigned int*)(0x4270A318UL))
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#define bFM3_MFS5_I2C_FBYTE1_FD7 *((volatile unsigned int*)(0x4270A31CUL))
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#define bFM3_MFS5_I2C_FBYTE2_FD8 *((volatile unsigned int*)(0x4270A320UL))
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#define bFM3_MFS5_I2C_FBYTE2_FD9 *((volatile unsigned int*)(0x4270A324UL))
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#define bFM3_MFS5_I2C_FBYTE2_FD10 *((volatile unsigned int*)(0x4270A328UL))
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#define bFM3_MFS5_I2C_FBYTE2_FD11 *((volatile unsigned int*)(0x4270A32CUL))
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#define bFM3_MFS5_I2C_FBYTE2_FD12 *((volatile unsigned int*)(0x4270A330UL))
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#define bFM3_MFS5_I2C_FBYTE2_FD13 *((volatile unsigned int*)(0x4270A334UL))
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#define bFM3_MFS5_I2C_FBYTE2_FD14 *((volatile unsigned int*)(0x4270A338UL))
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#define bFM3_MFS5_I2C_FBYTE2_FD15 *((volatile unsigned int*)(0x4270A33CUL))
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/* UART asynchronous channel 6 registers */
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#define bFM3_MFS6_UART_SMR_SOE *((volatile unsigned int*)(0x4270C000UL))
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#define bFM3_MFS6_UART_SMR_BDS *((volatile unsigned int*)(0x4270C008UL))
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#define bFM3_MFS6_UART_SMR_SBL *((volatile unsigned int*)(0x4270C00CUL))
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#define bFM3_MFS6_UART_SMR_WUCR *((volatile unsigned int*)(0x4270C010UL))
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#define bFM3_MFS6_UART_SMR_MD0 *((volatile unsigned int*)(0x4270C014UL))
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#define bFM3_MFS6_UART_SMR_MD1 *((volatile unsigned int*)(0x4270C018UL))
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#define bFM3_MFS6_UART_SMR_MD2 *((volatile unsigned int*)(0x4270C01CUL))
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#define bFM3_MFS6_UART_SCR_TXE *((volatile unsigned int*)(0x4270C020UL))
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#define bFM3_MFS6_UART_SCR_RXE *((volatile unsigned int*)(0x4270C024UL))
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#define bFM3_MFS6_UART_SCR_TBIE *((volatile unsigned int*)(0x4270C028UL))
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#define bFM3_MFS6_UART_SCR_TIE *((volatile unsigned int*)(0x4270C02CUL))
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#define bFM3_MFS6_UART_SCR_RIE *((volatile unsigned int*)(0x4270C030UL))
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#define bFM3_MFS6_UART_SCR_UPCL *((volatile unsigned int*)(0x4270C03CUL))
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#define bFM3_MFS6_UART_ESCR_L0 *((volatile unsigned int*)(0x4270C080UL))
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#define bFM3_MFS6_UART_ESCR_L1 *((volatile unsigned int*)(0x4270C084UL))
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#define bFM3_MFS6_UART_ESCR_L2 *((volatile unsigned int*)(0x4270C088UL))
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#define bFM3_MFS6_UART_ESCR_P *((volatile unsigned int*)(0x4270C08CUL))
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#define bFM3_MFS6_UART_ESCR_PEN *((volatile unsigned int*)(0x4270C090UL))
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#define bFM3_MFS6_UART_ESCR_INV *((volatile unsigned int*)(0x4270C094UL))
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#define bFM3_MFS6_UART_ESCR_ESBL *((volatile unsigned int*)(0x4270C098UL))
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#define bFM3_MFS6_UART_ESCR_FLWEN *((volatile unsigned int*)(0x4270C09CUL))
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#define bFM3_MFS6_UART_SSR_TBI *((volatile unsigned int*)(0x4270C0A0UL))
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#define bFM3_MFS6_UART_SSR_TDRE *((volatile unsigned int*)(0x4270C0A4UL))
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#define bFM3_MFS6_UART_SSR_RDRF *((volatile unsigned int*)(0x4270C0A8UL))
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#define bFM3_MFS6_UART_SSR_ORE *((volatile unsigned int*)(0x4270C0ACUL))
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#define bFM3_MFS6_UART_SSR_FRE *((volatile unsigned int*)(0x4270C0B0UL))
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#define bFM3_MFS6_UART_SSR_PE *((volatile unsigned int*)(0x4270C0B4UL))
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#define bFM3_MFS6_UART_SSR_REC *((volatile unsigned int*)(0x4270C0BCUL))
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#define bFM3_MFS6_UART_RDR_AD *((volatile unsigned int*)(0x4270C120UL))
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#define bFM3_MFS6_UART_TDR_AD *((volatile unsigned int*)(0x4270C120UL))
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#define bFM3_MFS6_UART_BGR_EXT *((volatile unsigned int*)(0x4270C1BCUL))
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#define bFM3_MFS6_UART_BGR1_EXT *((volatile unsigned int*)(0x4270C1BCUL))
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#define bFM3_MFS6_UART_FCR_FE1 *((volatile unsigned int*)(0x4270C280UL))
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#define bFM3_MFS6_UART_FCR_FE2 *((volatile unsigned int*)(0x4270C284UL))
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#define bFM3_MFS6_UART_FCR_FCL1 *((volatile unsigned int*)(0x4270C288UL))
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#define bFM3_MFS6_UART_FCR_FCL2 *((volatile unsigned int*)(0x4270C28CUL))
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#define bFM3_MFS6_UART_FCR_FSET *((volatile unsigned int*)(0x4270C290UL))
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#define bFM3_MFS6_UART_FCR_FLD *((volatile unsigned int*)(0x4270C294UL))
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#define bFM3_MFS6_UART_FCR_FLST *((volatile unsigned int*)(0x4270C298UL))
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#define bFM3_MFS6_UART_FCR_FSEL *((volatile unsigned int*)(0x4270C2A0UL))
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#define bFM3_MFS6_UART_FCR_FTIE *((volatile unsigned int*)(0x4270C2A4UL))
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#define bFM3_MFS6_UART_FCR_FDRQ *((volatile unsigned int*)(0x4270C2A8UL))
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#define bFM3_MFS6_UART_FCR_FRIE *((volatile unsigned int*)(0x4270C2ACUL))
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#define bFM3_MFS6_UART_FCR_FLSTE *((volatile unsigned int*)(0x4270C2B0UL))
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#define bFM3_MFS6_UART_FCR_FTST0 *((volatile unsigned int*)(0x4270C2B8UL))
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#define bFM3_MFS6_UART_FCR_FTST1 *((volatile unsigned int*)(0x4270C2BCUL))
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#define bFM3_MFS6_UART_FCR0_FE1 *((volatile unsigned int*)(0x4270C280UL))
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#define bFM3_MFS6_UART_FCR0_FE2 *((volatile unsigned int*)(0x4270C284UL))
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#define bFM3_MFS6_UART_FCR0_FCL1 *((volatile unsigned int*)(0x4270C288UL))
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#define bFM3_MFS6_UART_FCR0_FCL2 *((volatile unsigned int*)(0x4270C28CUL))
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#define bFM3_MFS6_UART_FCR0_FSET *((volatile unsigned int*)(0x4270C290UL))
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#define bFM3_MFS6_UART_FCR0_FLD *((volatile unsigned int*)(0x4270C294UL))
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#define bFM3_MFS6_UART_FCR0_FLST *((volatile unsigned int*)(0x4270C298UL))
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#define bFM3_MFS6_UART_FCR1_FSEL *((volatile unsigned int*)(0x4270C2A0UL))
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#define bFM3_MFS6_UART_FCR1_FTIE *((volatile unsigned int*)(0x4270C2A4UL))
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#define bFM3_MFS6_UART_FCR1_FDRQ *((volatile unsigned int*)(0x4270C2A8UL))
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#define bFM3_MFS6_UART_FCR1_FRIE *((volatile unsigned int*)(0x4270C2ACUL))
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#define bFM3_MFS6_UART_FCR1_FLSTE *((volatile unsigned int*)(0x4270C2B0UL))
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#define bFM3_MFS6_UART_FCR1_FTST0 *((volatile unsigned int*)(0x4270C2B8UL))
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#define bFM3_MFS6_UART_FCR1_FTST1 *((volatile unsigned int*)(0x4270C2BCUL))
|
|
#define bFM3_MFS6_UART_FBYTE_FD0 *((volatile unsigned int*)(0x4270C300UL))
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#define bFM3_MFS6_UART_FBYTE_FD1 *((volatile unsigned int*)(0x4270C304UL))
|
|
#define bFM3_MFS6_UART_FBYTE_FD2 *((volatile unsigned int*)(0x4270C308UL))
|
|
#define bFM3_MFS6_UART_FBYTE_FD3 *((volatile unsigned int*)(0x4270C30CUL))
|
|
#define bFM3_MFS6_UART_FBYTE_FD4 *((volatile unsigned int*)(0x4270C310UL))
|
|
#define bFM3_MFS6_UART_FBYTE_FD5 *((volatile unsigned int*)(0x4270C314UL))
|
|
#define bFM3_MFS6_UART_FBYTE_FD6 *((volatile unsigned int*)(0x4270C318UL))
|
|
#define bFM3_MFS6_UART_FBYTE_FD7 *((volatile unsigned int*)(0x4270C31CUL))
|
|
#define bFM3_MFS6_UART_FBYTE_FD8 *((volatile unsigned int*)(0x4270C320UL))
|
|
#define bFM3_MFS6_UART_FBYTE_FD9 *((volatile unsigned int*)(0x4270C324UL))
|
|
#define bFM3_MFS6_UART_FBYTE_FD10 *((volatile unsigned int*)(0x4270C328UL))
|
|
#define bFM3_MFS6_UART_FBYTE_FD11 *((volatile unsigned int*)(0x4270C32CUL))
|
|
#define bFM3_MFS6_UART_FBYTE_FD12 *((volatile unsigned int*)(0x4270C330UL))
|
|
#define bFM3_MFS6_UART_FBYTE_FD13 *((volatile unsigned int*)(0x4270C334UL))
|
|
#define bFM3_MFS6_UART_FBYTE_FD14 *((volatile unsigned int*)(0x4270C338UL))
|
|
#define bFM3_MFS6_UART_FBYTE_FD15 *((volatile unsigned int*)(0x4270C33CUL))
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|
#define bFM3_MFS6_UART_FBYTE1_FD0 *((volatile unsigned int*)(0x4270C300UL))
|
|
#define bFM3_MFS6_UART_FBYTE1_FD1 *((volatile unsigned int*)(0x4270C304UL))
|
|
#define bFM3_MFS6_UART_FBYTE1_FD2 *((volatile unsigned int*)(0x4270C308UL))
|
|
#define bFM3_MFS6_UART_FBYTE1_FD3 *((volatile unsigned int*)(0x4270C30CUL))
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|
#define bFM3_MFS6_UART_FBYTE1_FD4 *((volatile unsigned int*)(0x4270C310UL))
|
|
#define bFM3_MFS6_UART_FBYTE1_FD5 *((volatile unsigned int*)(0x4270C314UL))
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#define bFM3_MFS6_UART_FBYTE1_FD6 *((volatile unsigned int*)(0x4270C318UL))
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#define bFM3_MFS6_UART_FBYTE1_FD7 *((volatile unsigned int*)(0x4270C31CUL))
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#define bFM3_MFS6_UART_FBYTE2_FD8 *((volatile unsigned int*)(0x4270C320UL))
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#define bFM3_MFS6_UART_FBYTE2_FD9 *((volatile unsigned int*)(0x4270C324UL))
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#define bFM3_MFS6_UART_FBYTE2_FD10 *((volatile unsigned int*)(0x4270C328UL))
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#define bFM3_MFS6_UART_FBYTE2_FD11 *((volatile unsigned int*)(0x4270C32CUL))
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#define bFM3_MFS6_UART_FBYTE2_FD12 *((volatile unsigned int*)(0x4270C330UL))
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#define bFM3_MFS6_UART_FBYTE2_FD13 *((volatile unsigned int*)(0x4270C334UL))
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#define bFM3_MFS6_UART_FBYTE2_FD14 *((volatile unsigned int*)(0x4270C338UL))
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#define bFM3_MFS6_UART_FBYTE2_FD15 *((volatile unsigned int*)(0x4270C33CUL))
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/* UART synchronous channel 6 registers */
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#define bFM3_MFS6_CSIO_SMR_SOE *((volatile unsigned int*)(0x4270C000UL))
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#define bFM3_MFS6_CSIO_SMR_SCKE *((volatile unsigned int*)(0x4270C004UL))
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#define bFM3_MFS6_CSIO_SMR_BDS *((volatile unsigned int*)(0x4270C008UL))
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#define bFM3_MFS6_CSIO_SMR_SCINV *((volatile unsigned int*)(0x4270C00CUL))
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#define bFM3_MFS6_CSIO_SMR_WUCR *((volatile unsigned int*)(0x4270C010UL))
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#define bFM3_MFS6_CSIO_SMR_MD0 *((volatile unsigned int*)(0x4270C014UL))
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#define bFM3_MFS6_CSIO_SMR_MD1 *((volatile unsigned int*)(0x4270C018UL))
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#define bFM3_MFS6_CSIO_SMR_MD2 *((volatile unsigned int*)(0x4270C01CUL))
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#define bFM3_MFS6_CSIO_SCR_TXE *((volatile unsigned int*)(0x4270C020UL))
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#define bFM3_MFS6_CSIO_SCR_RXE *((volatile unsigned int*)(0x4270C024UL))
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#define bFM3_MFS6_CSIO_SCR_TBIE *((volatile unsigned int*)(0x4270C028UL))
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#define bFM3_MFS6_CSIO_SCR_TIE *((volatile unsigned int*)(0x4270C02CUL))
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#define bFM3_MFS6_CSIO_SCR_RIE *((volatile unsigned int*)(0x4270C030UL))
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#define bFM3_MFS6_CSIO_SCR_SPI *((volatile unsigned int*)(0x4270C034UL))
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#define bFM3_MFS6_CSIO_SCR_MS *((volatile unsigned int*)(0x4270C038UL))
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#define bFM3_MFS6_CSIO_SCR_UPCL *((volatile unsigned int*)(0x4270C03CUL))
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#define bFM3_MFS6_CSIO_ESCR_L0 *((volatile unsigned int*)(0x4270C080UL))
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#define bFM3_MFS6_CSIO_ESCR_L1 *((volatile unsigned int*)(0x4270C084UL))
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#define bFM3_MFS6_CSIO_ESCR_L2 *((volatile unsigned int*)(0x4270C088UL))
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#define bFM3_MFS6_CSIO_ESCR_WT0 *((volatile unsigned int*)(0x4270C08CUL))
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#define bFM3_MFS6_CSIO_ESCR_WT1 *((volatile unsigned int*)(0x4270C090UL))
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#define bFM3_MFS6_CSIO_ESCR_SOP *((volatile unsigned int*)(0x4270C09CUL))
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#define bFM3_MFS6_CSIO_SSR_TBI *((volatile unsigned int*)(0x4270C0A0UL))
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#define bFM3_MFS6_CSIO_SSR_TDRE *((volatile unsigned int*)(0x4270C0A4UL))
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#define bFM3_MFS6_CSIO_SSR_RDRF *((volatile unsigned int*)(0x4270C0A8UL))
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#define bFM3_MFS6_CSIO_SSR_ORE *((volatile unsigned int*)(0x4270C0ACUL))
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#define bFM3_MFS6_CSIO_SSR_REC *((volatile unsigned int*)(0x4270C0BCUL))
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#define bFM3_MFS6_CSIO_FCR_FE1 *((volatile unsigned int*)(0x4270C280UL))
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#define bFM3_MFS6_CSIO_FCR_FE2 *((volatile unsigned int*)(0x4270C284UL))
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#define bFM3_MFS6_CSIO_FCR_FCL1 *((volatile unsigned int*)(0x4270C288UL))
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#define bFM3_MFS6_CSIO_FCR_FCL2 *((volatile unsigned int*)(0x4270C28CUL))
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#define bFM3_MFS6_CSIO_FCR_FSET *((volatile unsigned int*)(0x4270C290UL))
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#define bFM3_MFS6_CSIO_FCR_FLD *((volatile unsigned int*)(0x4270C294UL))
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#define bFM3_MFS6_CSIO_FCR_FLST *((volatile unsigned int*)(0x4270C298UL))
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#define bFM3_MFS6_CSIO_FCR_FSEL *((volatile unsigned int*)(0x4270C2A0UL))
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#define bFM3_MFS6_CSIO_FCR_FTIE *((volatile unsigned int*)(0x4270C2A4UL))
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#define bFM3_MFS6_CSIO_FCR_FDRQ *((volatile unsigned int*)(0x4270C2A8UL))
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#define bFM3_MFS6_CSIO_FCR_FRIE *((volatile unsigned int*)(0x4270C2ACUL))
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#define bFM3_MFS6_CSIO_FCR_FLSTE *((volatile unsigned int*)(0x4270C2B0UL))
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#define bFM3_MFS6_CSIO_FCR_FTST0 *((volatile unsigned int*)(0x4270C2B8UL))
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#define bFM3_MFS6_CSIO_FCR_FTST1 *((volatile unsigned int*)(0x4270C2BCUL))
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#define bFM3_MFS6_CSIO_FCR0_FE1 *((volatile unsigned int*)(0x4270C280UL))
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#define bFM3_MFS6_CSIO_FCR0_FE2 *((volatile unsigned int*)(0x4270C284UL))
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#define bFM3_MFS6_CSIO_FCR0_FCL1 *((volatile unsigned int*)(0x4270C288UL))
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#define bFM3_MFS6_CSIO_FCR0_FCL2 *((volatile unsigned int*)(0x4270C28CUL))
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#define bFM3_MFS6_CSIO_FCR0_FSET *((volatile unsigned int*)(0x4270C290UL))
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#define bFM3_MFS6_CSIO_FCR0_FLD *((volatile unsigned int*)(0x4270C294UL))
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#define bFM3_MFS6_CSIO_FCR0_FLST *((volatile unsigned int*)(0x4270C298UL))
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#define bFM3_MFS6_CSIO_FCR1_FSEL *((volatile unsigned int*)(0x4270C2A0UL))
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#define bFM3_MFS6_CSIO_FCR1_FTIE *((volatile unsigned int*)(0x4270C2A4UL))
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#define bFM3_MFS6_CSIO_FCR1_FDRQ *((volatile unsigned int*)(0x4270C2A8UL))
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#define bFM3_MFS6_CSIO_FCR1_FRIE *((volatile unsigned int*)(0x4270C2ACUL))
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#define bFM3_MFS6_CSIO_FCR1_FLSTE *((volatile unsigned int*)(0x4270C2B0UL))
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#define bFM3_MFS6_CSIO_FCR1_FTST0 *((volatile unsigned int*)(0x4270C2B8UL))
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#define bFM3_MFS6_CSIO_FCR1_FTST1 *((volatile unsigned int*)(0x4270C2BCUL))
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#define bFM3_MFS6_CSIO_FBYTE_FD0 *((volatile unsigned int*)(0x4270C300UL))
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#define bFM3_MFS6_CSIO_FBYTE_FD1 *((volatile unsigned int*)(0x4270C304UL))
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#define bFM3_MFS6_CSIO_FBYTE_FD2 *((volatile unsigned int*)(0x4270C308UL))
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#define bFM3_MFS6_CSIO_FBYTE_FD3 *((volatile unsigned int*)(0x4270C30CUL))
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#define bFM3_MFS6_CSIO_FBYTE_FD4 *((volatile unsigned int*)(0x4270C310UL))
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#define bFM3_MFS6_CSIO_FBYTE_FD5 *((volatile unsigned int*)(0x4270C314UL))
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#define bFM3_MFS6_CSIO_FBYTE_FD6 *((volatile unsigned int*)(0x4270C318UL))
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#define bFM3_MFS6_CSIO_FBYTE_FD7 *((volatile unsigned int*)(0x4270C31CUL))
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#define bFM3_MFS6_CSIO_FBYTE_FD8 *((volatile unsigned int*)(0x4270C320UL))
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#define bFM3_MFS6_CSIO_FBYTE_FD9 *((volatile unsigned int*)(0x4270C324UL))
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#define bFM3_MFS6_CSIO_FBYTE_FD10 *((volatile unsigned int*)(0x4270C328UL))
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#define bFM3_MFS6_CSIO_FBYTE_FD11 *((volatile unsigned int*)(0x4270C32CUL))
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#define bFM3_MFS6_CSIO_FBYTE_FD12 *((volatile unsigned int*)(0x4270C330UL))
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#define bFM3_MFS6_CSIO_FBYTE_FD13 *((volatile unsigned int*)(0x4270C334UL))
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#define bFM3_MFS6_CSIO_FBYTE_FD14 *((volatile unsigned int*)(0x4270C338UL))
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#define bFM3_MFS6_CSIO_FBYTE_FD15 *((volatile unsigned int*)(0x4270C33CUL))
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#define bFM3_MFS6_CSIO_FBYTE1_FD0 *((volatile unsigned int*)(0x4270C300UL))
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#define bFM3_MFS6_CSIO_FBYTE1_FD1 *((volatile unsigned int*)(0x4270C304UL))
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#define bFM3_MFS6_CSIO_FBYTE1_FD2 *((volatile unsigned int*)(0x4270C308UL))
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#define bFM3_MFS6_CSIO_FBYTE1_FD3 *((volatile unsigned int*)(0x4270C30CUL))
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#define bFM3_MFS6_CSIO_FBYTE1_FD4 *((volatile unsigned int*)(0x4270C310UL))
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#define bFM3_MFS6_CSIO_FBYTE1_FD5 *((volatile unsigned int*)(0x4270C314UL))
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#define bFM3_MFS6_CSIO_FBYTE1_FD6 *((volatile unsigned int*)(0x4270C318UL))
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#define bFM3_MFS6_CSIO_FBYTE1_FD7 *((volatile unsigned int*)(0x4270C31CUL))
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#define bFM3_MFS6_CSIO_FBYTE2_FD8 *((volatile unsigned int*)(0x4270C320UL))
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#define bFM3_MFS6_CSIO_FBYTE2_FD9 *((volatile unsigned int*)(0x4270C324UL))
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#define bFM3_MFS6_CSIO_FBYTE2_FD10 *((volatile unsigned int*)(0x4270C328UL))
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#define bFM3_MFS6_CSIO_FBYTE2_FD11 *((volatile unsigned int*)(0x4270C32CUL))
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#define bFM3_MFS6_CSIO_FBYTE2_FD12 *((volatile unsigned int*)(0x4270C330UL))
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#define bFM3_MFS6_CSIO_FBYTE2_FD13 *((volatile unsigned int*)(0x4270C334UL))
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#define bFM3_MFS6_CSIO_FBYTE2_FD14 *((volatile unsigned int*)(0x4270C338UL))
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#define bFM3_MFS6_CSIO_FBYTE2_FD15 *((volatile unsigned int*)(0x4270C33CUL))
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/* UART LIN channel 6 registers */
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#define bFM3_MFS6_LIN_SMR_SOE *((volatile unsigned int*)(0x4270C000UL))
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#define bFM3_MFS6_LIN_SMR_SBL *((volatile unsigned int*)(0x4270C00CUL))
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#define bFM3_MFS6_LIN_SMR_WUCR *((volatile unsigned int*)(0x4270C010UL))
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#define bFM3_MFS6_LIN_SMR_MD0 *((volatile unsigned int*)(0x4270C014UL))
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#define bFM3_MFS6_LIN_SMR_MD1 *((volatile unsigned int*)(0x4270C018UL))
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#define bFM3_MFS6_LIN_SMR_MD2 *((volatile unsigned int*)(0x4270C01CUL))
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#define bFM3_MFS6_LIN_SCR_TXE *((volatile unsigned int*)(0x4270C020UL))
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#define bFM3_MFS6_LIN_SCR_RXE *((volatile unsigned int*)(0x4270C024UL))
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#define bFM3_MFS6_LIN_SCR_TBIE *((volatile unsigned int*)(0x4270C028UL))
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#define bFM3_MFS6_LIN_SCR_TIE *((volatile unsigned int*)(0x4270C02CUL))
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#define bFM3_MFS6_LIN_SCR_RIE *((volatile unsigned int*)(0x4270C030UL))
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#define bFM3_MFS6_LIN_SCR_LBR *((volatile unsigned int*)(0x4270C034UL))
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#define bFM3_MFS6_LIN_SCR_MS *((volatile unsigned int*)(0x4270C038UL))
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#define bFM3_MFS6_LIN_SCR_UPCL *((volatile unsigned int*)(0x4270C03CUL))
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#define bFM3_MFS6_LIN_ESCR_DEL0 *((volatile unsigned int*)(0x4270C080UL))
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#define bFM3_MFS6_LIN_ESCR_DEL1 *((volatile unsigned int*)(0x4270C084UL))
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#define bFM3_MFS6_LIN_ESCR_LBL0 *((volatile unsigned int*)(0x4270C088UL))
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#define bFM3_MFS6_LIN_ESCR_LBL1 *((volatile unsigned int*)(0x4270C08CUL))
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#define bFM3_MFS6_LIN_ESCR_LBIE *((volatile unsigned int*)(0x4270C090UL))
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#define bFM3_MFS6_LIN_ESCR_ESBL *((volatile unsigned int*)(0x4270C098UL))
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#define bFM3_MFS6_LIN_SSR_TBI *((volatile unsigned int*)(0x4270C0A0UL))
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#define bFM3_MFS6_LIN_SSR_TDRE *((volatile unsigned int*)(0x4270C0A4UL))
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#define bFM3_MFS6_LIN_SSR_RDRF *((volatile unsigned int*)(0x4270C0A8UL))
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#define bFM3_MFS6_LIN_SSR_ORE *((volatile unsigned int*)(0x4270C0ACUL))
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#define bFM3_MFS6_LIN_SSR_FRE *((volatile unsigned int*)(0x4270C0B0UL))
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#define bFM3_MFS6_LIN_SSR_LBD *((volatile unsigned int*)(0x4270C0B4UL))
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#define bFM3_MFS6_LIN_SSR_REC *((volatile unsigned int*)(0x4270C0BCUL))
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#define bFM3_MFS6_LIN_BGR_EXT *((volatile unsigned int*)(0x4270C1BCUL))
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#define bFM3_MFS6_LIN_BGR1_EXT *((volatile unsigned int*)(0x4270C1BCUL))
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#define bFM3_MFS6_LIN_FCR_FE1 *((volatile unsigned int*)(0x4270C280UL))
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#define bFM3_MFS6_LIN_FCR_FE2 *((volatile unsigned int*)(0x4270C284UL))
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#define bFM3_MFS6_LIN_FCR_FCL1 *((volatile unsigned int*)(0x4270C288UL))
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#define bFM3_MFS6_LIN_FCR_FCL2 *((volatile unsigned int*)(0x4270C28CUL))
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#define bFM3_MFS6_LIN_FCR_FSET *((volatile unsigned int*)(0x4270C290UL))
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#define bFM3_MFS6_LIN_FCR_FLD *((volatile unsigned int*)(0x4270C294UL))
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#define bFM3_MFS6_LIN_FCR_FLST *((volatile unsigned int*)(0x4270C298UL))
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#define bFM3_MFS6_LIN_FCR_FSEL *((volatile unsigned int*)(0x4270C2A0UL))
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#define bFM3_MFS6_LIN_FCR_FTIE *((volatile unsigned int*)(0x4270C2A4UL))
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#define bFM3_MFS6_LIN_FCR_FDRQ *((volatile unsigned int*)(0x4270C2A8UL))
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#define bFM3_MFS6_LIN_FCR_FRIE *((volatile unsigned int*)(0x4270C2ACUL))
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#define bFM3_MFS6_LIN_FCR_FLSTE *((volatile unsigned int*)(0x4270C2B0UL))
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#define bFM3_MFS6_LIN_FCR_FTST0 *((volatile unsigned int*)(0x4270C2B8UL))
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#define bFM3_MFS6_LIN_FCR_FTST1 *((volatile unsigned int*)(0x4270C2BCUL))
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#define bFM3_MFS6_LIN_FCR0_FE1 *((volatile unsigned int*)(0x4270C280UL))
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#define bFM3_MFS6_LIN_FCR0_FE2 *((volatile unsigned int*)(0x4270C284UL))
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#define bFM3_MFS6_LIN_FCR0_FCL1 *((volatile unsigned int*)(0x4270C288UL))
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#define bFM3_MFS6_LIN_FCR0_FCL2 *((volatile unsigned int*)(0x4270C28CUL))
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#define bFM3_MFS6_LIN_FCR0_FSET *((volatile unsigned int*)(0x4270C290UL))
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#define bFM3_MFS6_LIN_FCR0_FLD *((volatile unsigned int*)(0x4270C294UL))
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#define bFM3_MFS6_LIN_FCR0_FLST *((volatile unsigned int*)(0x4270C298UL))
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#define bFM3_MFS6_LIN_FCR1_FSEL *((volatile unsigned int*)(0x4270C2A0UL))
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#define bFM3_MFS6_LIN_FCR1_FTIE *((volatile unsigned int*)(0x4270C2A4UL))
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#define bFM3_MFS6_LIN_FCR1_FDRQ *((volatile unsigned int*)(0x4270C2A8UL))
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#define bFM3_MFS6_LIN_FCR1_FRIE *((volatile unsigned int*)(0x4270C2ACUL))
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#define bFM3_MFS6_LIN_FCR1_FLSTE *((volatile unsigned int*)(0x4270C2B0UL))
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#define bFM3_MFS6_LIN_FCR1_FTST0 *((volatile unsigned int*)(0x4270C2B8UL))
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#define bFM3_MFS6_LIN_FCR1_FTST1 *((volatile unsigned int*)(0x4270C2BCUL))
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#define bFM3_MFS6_LIN_FBYTE_FD0 *((volatile unsigned int*)(0x4270C300UL))
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#define bFM3_MFS6_LIN_FBYTE_FD1 *((volatile unsigned int*)(0x4270C304UL))
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#define bFM3_MFS6_LIN_FBYTE_FD2 *((volatile unsigned int*)(0x4270C308UL))
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#define bFM3_MFS6_LIN_FBYTE_FD3 *((volatile unsigned int*)(0x4270C30CUL))
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#define bFM3_MFS6_LIN_FBYTE_FD4 *((volatile unsigned int*)(0x4270C310UL))
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#define bFM3_MFS6_LIN_FBYTE_FD5 *((volatile unsigned int*)(0x4270C314UL))
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#define bFM3_MFS6_LIN_FBYTE_FD6 *((volatile unsigned int*)(0x4270C318UL))
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#define bFM3_MFS6_LIN_FBYTE_FD7 *((volatile unsigned int*)(0x4270C31CUL))
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#define bFM3_MFS6_LIN_FBYTE_FD8 *((volatile unsigned int*)(0x4270C320UL))
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#define bFM3_MFS6_LIN_FBYTE_FD9 *((volatile unsigned int*)(0x4270C324UL))
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#define bFM3_MFS6_LIN_FBYTE_FD10 *((volatile unsigned int*)(0x4270C328UL))
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#define bFM3_MFS6_LIN_FBYTE_FD11 *((volatile unsigned int*)(0x4270C32CUL))
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#define bFM3_MFS6_LIN_FBYTE_FD12 *((volatile unsigned int*)(0x4270C330UL))
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#define bFM3_MFS6_LIN_FBYTE_FD13 *((volatile unsigned int*)(0x4270C334UL))
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#define bFM3_MFS6_LIN_FBYTE_FD14 *((volatile unsigned int*)(0x4270C338UL))
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#define bFM3_MFS6_LIN_FBYTE_FD15 *((volatile unsigned int*)(0x4270C33CUL))
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#define bFM3_MFS6_LIN_FBYTE1_FD0 *((volatile unsigned int*)(0x4270C300UL))
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#define bFM3_MFS6_LIN_FBYTE1_FD1 *((volatile unsigned int*)(0x4270C304UL))
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#define bFM3_MFS6_LIN_FBYTE1_FD2 *((volatile unsigned int*)(0x4270C308UL))
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#define bFM3_MFS6_LIN_FBYTE1_FD3 *((volatile unsigned int*)(0x4270C30CUL))
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#define bFM3_MFS6_LIN_FBYTE1_FD4 *((volatile unsigned int*)(0x4270C310UL))
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#define bFM3_MFS6_LIN_FBYTE1_FD5 *((volatile unsigned int*)(0x4270C314UL))
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#define bFM3_MFS6_LIN_FBYTE1_FD6 *((volatile unsigned int*)(0x4270C318UL))
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#define bFM3_MFS6_LIN_FBYTE1_FD7 *((volatile unsigned int*)(0x4270C31CUL))
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#define bFM3_MFS6_LIN_FBYTE2_FD8 *((volatile unsigned int*)(0x4270C320UL))
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#define bFM3_MFS6_LIN_FBYTE2_FD9 *((volatile unsigned int*)(0x4270C324UL))
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#define bFM3_MFS6_LIN_FBYTE2_FD10 *((volatile unsigned int*)(0x4270C328UL))
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#define bFM3_MFS6_LIN_FBYTE2_FD11 *((volatile unsigned int*)(0x4270C32CUL))
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#define bFM3_MFS6_LIN_FBYTE2_FD12 *((volatile unsigned int*)(0x4270C330UL))
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#define bFM3_MFS6_LIN_FBYTE2_FD13 *((volatile unsigned int*)(0x4270C334UL))
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#define bFM3_MFS6_LIN_FBYTE2_FD14 *((volatile unsigned int*)(0x4270C338UL))
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#define bFM3_MFS6_LIN_FBYTE2_FD15 *((volatile unsigned int*)(0x4270C33CUL))
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/* I2C channel 6 registers */
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#define bFM3_MFS6_I2C_SMR_ITST0 *((volatile unsigned int*)(0x4270C000UL))
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#define bFM3_MFS6_I2C_SMR_ITST1 *((volatile unsigned int*)(0x4270C004UL))
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#define bFM3_MFS6_I2C_SMR_TIE *((volatile unsigned int*)(0x4270C008UL))
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#define bFM3_MFS6_I2C_SMR_RIE *((volatile unsigned int*)(0x4270C00CUL))
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#define bFM3_MFS6_I2C_SMR_WUCR *((volatile unsigned int*)(0x4270C010UL))
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#define bFM3_MFS6_I2C_SMR_MD0 *((volatile unsigned int*)(0x4270C014UL))
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#define bFM3_MFS6_I2C_SMR_MD1 *((volatile unsigned int*)(0x4270C018UL))
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#define bFM3_MFS6_I2C_SMR_MD2 *((volatile unsigned int*)(0x4270C01CUL))
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#define bFM3_MFS6_I2C_IBCR_INT *((volatile unsigned int*)(0x4270C020UL))
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#define bFM3_MFS6_I2C_IBCR_BER *((volatile unsigned int*)(0x4270C024UL))
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#define bFM3_MFS6_I2C_IBCR_INTE *((volatile unsigned int*)(0x4270C028UL))
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#define bFM3_MFS6_I2C_IBCR_CNDE *((volatile unsigned int*)(0x4270C02CUL))
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#define bFM3_MFS6_I2C_IBCR_WSEL *((volatile unsigned int*)(0x4270C030UL))
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#define bFM3_MFS6_I2C_IBCR_ACKE *((volatile unsigned int*)(0x4270C034UL))
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#define bFM3_MFS6_I2C_IBCR_ACT *((volatile unsigned int*)(0x4270C038UL))
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#define bFM3_MFS6_I2C_IBCR_SCC *((volatile unsigned int*)(0x4270C038UL))
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#define bFM3_MFS6_I2C_IBCR_MSS *((volatile unsigned int*)(0x4270C03CUL))
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#define bFM3_MFS6_I2C_IBSR_BB *((volatile unsigned int*)(0x4270C080UL))
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#define bFM3_MFS6_I2C_IBSR_SPC *((volatile unsigned int*)(0x4270C084UL))
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#define bFM3_MFS6_I2C_IBSR_RSC *((volatile unsigned int*)(0x4270C088UL))
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#define bFM3_MFS6_I2C_IBSR_AL *((volatile unsigned int*)(0x4270C08CUL))
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#define bFM3_MFS6_I2C_IBSR_TRX *((volatile unsigned int*)(0x4270C090UL))
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#define bFM3_MFS6_I2C_IBSR_RSA *((volatile unsigned int*)(0x4270C094UL))
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#define bFM3_MFS6_I2C_IBSR_RACK *((volatile unsigned int*)(0x4270C098UL))
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#define bFM3_MFS6_I2C_IBSR_FBT *((volatile unsigned int*)(0x4270C09CUL))
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#define bFM3_MFS6_I2C_SSR_TBI *((volatile unsigned int*)(0x4270C0A0UL))
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#define bFM3_MFS6_I2C_SSR_TDRE *((volatile unsigned int*)(0x4270C0A4UL))
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#define bFM3_MFS6_I2C_SSR_RDRF *((volatile unsigned int*)(0x4270C0A8UL))
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#define bFM3_MFS6_I2C_SSR_ORE *((volatile unsigned int*)(0x4270C0ACUL))
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#define bFM3_MFS6_I2C_SSR_TBIE *((volatile unsigned int*)(0x4270C0B0UL))
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#define bFM3_MFS6_I2C_SSR_DMA *((volatile unsigned int*)(0x4270C0B4UL))
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#define bFM3_MFS6_I2C_SSR_TSET *((volatile unsigned int*)(0x4270C0B8UL))
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#define bFM3_MFS6_I2C_SSR_REC *((volatile unsigned int*)(0x4270C0BCUL))
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#define bFM3_MFS6_I2C_ISBA_SA0 *((volatile unsigned int*)(0x4270C200UL))
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#define bFM3_MFS6_I2C_ISBA_SA1 *((volatile unsigned int*)(0x4270C204UL))
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#define bFM3_MFS6_I2C_ISBA_SA2 *((volatile unsigned int*)(0x4270C208UL))
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#define bFM3_MFS6_I2C_ISBA_SA3 *((volatile unsigned int*)(0x4270C20CUL))
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#define bFM3_MFS6_I2C_ISBA_SA4 *((volatile unsigned int*)(0x4270C210UL))
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#define bFM3_MFS6_I2C_ISBA_SA5 *((volatile unsigned int*)(0x4270C214UL))
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#define bFM3_MFS6_I2C_ISBA_SA6 *((volatile unsigned int*)(0x4270C218UL))
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#define bFM3_MFS6_I2C_ISBA_SAEN *((volatile unsigned int*)(0x4270C21CUL))
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#define bFM3_MFS6_I2C_ISMK_SM0 *((volatile unsigned int*)(0x4270C220UL))
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#define bFM3_MFS6_I2C_ISMK_SM1 *((volatile unsigned int*)(0x4270C224UL))
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#define bFM3_MFS6_I2C_ISMK_SM2 *((volatile unsigned int*)(0x4270C228UL))
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#define bFM3_MFS6_I2C_ISMK_SM3 *((volatile unsigned int*)(0x4270C22CUL))
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#define bFM3_MFS6_I2C_ISMK_SM4 *((volatile unsigned int*)(0x4270C230UL))
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#define bFM3_MFS6_I2C_ISMK_SM5 *((volatile unsigned int*)(0x4270C234UL))
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#define bFM3_MFS6_I2C_ISMK_SM6 *((volatile unsigned int*)(0x4270C238UL))
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#define bFM3_MFS6_I2C_ISMK_EN *((volatile unsigned int*)(0x4270C23CUL))
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#define bFM3_MFS6_I2C_FCR_FE1 *((volatile unsigned int*)(0x4270C280UL))
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#define bFM3_MFS6_I2C_FCR_FE2 *((volatile unsigned int*)(0x4270C284UL))
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#define bFM3_MFS6_I2C_FCR_FCL1 *((volatile unsigned int*)(0x4270C288UL))
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#define bFM3_MFS6_I2C_FCR_FCL2 *((volatile unsigned int*)(0x4270C28CUL))
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#define bFM3_MFS6_I2C_FCR_FSET *((volatile unsigned int*)(0x4270C290UL))
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#define bFM3_MFS6_I2C_FCR_FLD *((volatile unsigned int*)(0x4270C294UL))
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#define bFM3_MFS6_I2C_FCR_FLST *((volatile unsigned int*)(0x4270C298UL))
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#define bFM3_MFS6_I2C_FCR_FSEL *((volatile unsigned int*)(0x4270C2A0UL))
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#define bFM3_MFS6_I2C_FCR_FTIE *((volatile unsigned int*)(0x4270C2A4UL))
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#define bFM3_MFS6_I2C_FCR_FDRQ *((volatile unsigned int*)(0x4270C2A8UL))
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#define bFM3_MFS6_I2C_FCR_FRIE *((volatile unsigned int*)(0x4270C2ACUL))
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#define bFM3_MFS6_I2C_FCR_FLSTE *((volatile unsigned int*)(0x4270C2B0UL))
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#define bFM3_MFS6_I2C_FCR_FTST0 *((volatile unsigned int*)(0x4270C2B8UL))
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#define bFM3_MFS6_I2C_FCR_FTST1 *((volatile unsigned int*)(0x4270C2BCUL))
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#define bFM3_MFS6_I2C_FCR0_FE1 *((volatile unsigned int*)(0x4270C280UL))
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#define bFM3_MFS6_I2C_FCR0_FE2 *((volatile unsigned int*)(0x4270C284UL))
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#define bFM3_MFS6_I2C_FCR0_FCL1 *((volatile unsigned int*)(0x4270C288UL))
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#define bFM3_MFS6_I2C_FCR0_FCL2 *((volatile unsigned int*)(0x4270C28CUL))
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#define bFM3_MFS6_I2C_FCR0_FSET *((volatile unsigned int*)(0x4270C290UL))
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#define bFM3_MFS6_I2C_FCR0_FLD *((volatile unsigned int*)(0x4270C294UL))
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#define bFM3_MFS6_I2C_FCR0_FLST *((volatile unsigned int*)(0x4270C298UL))
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#define bFM3_MFS6_I2C_FCR1_FSEL *((volatile unsigned int*)(0x4270C2A0UL))
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#define bFM3_MFS6_I2C_FCR1_FTIE *((volatile unsigned int*)(0x4270C2A4UL))
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#define bFM3_MFS6_I2C_FCR1_FDRQ *((volatile unsigned int*)(0x4270C2A8UL))
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#define bFM3_MFS6_I2C_FCR1_FRIE *((volatile unsigned int*)(0x4270C2ACUL))
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#define bFM3_MFS6_I2C_FCR1_FLSTE *((volatile unsigned int*)(0x4270C2B0UL))
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#define bFM3_MFS6_I2C_FCR1_FTST0 *((volatile unsigned int*)(0x4270C2B8UL))
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#define bFM3_MFS6_I2C_FCR1_FTST1 *((volatile unsigned int*)(0x4270C2BCUL))
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#define bFM3_MFS6_I2C_FBYTE_FD0 *((volatile unsigned int*)(0x4270C300UL))
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#define bFM3_MFS6_I2C_FBYTE_FD1 *((volatile unsigned int*)(0x4270C304UL))
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#define bFM3_MFS6_I2C_FBYTE_FD2 *((volatile unsigned int*)(0x4270C308UL))
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#define bFM3_MFS6_I2C_FBYTE_FD3 *((volatile unsigned int*)(0x4270C30CUL))
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#define bFM3_MFS6_I2C_FBYTE_FD4 *((volatile unsigned int*)(0x4270C310UL))
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#define bFM3_MFS6_I2C_FBYTE_FD5 *((volatile unsigned int*)(0x4270C314UL))
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#define bFM3_MFS6_I2C_FBYTE_FD6 *((volatile unsigned int*)(0x4270C318UL))
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#define bFM3_MFS6_I2C_FBYTE_FD7 *((volatile unsigned int*)(0x4270C31CUL))
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#define bFM3_MFS6_I2C_FBYTE_FD8 *((volatile unsigned int*)(0x4270C320UL))
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#define bFM3_MFS6_I2C_FBYTE_FD9 *((volatile unsigned int*)(0x4270C324UL))
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#define bFM3_MFS6_I2C_FBYTE_FD10 *((volatile unsigned int*)(0x4270C328UL))
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#define bFM3_MFS6_I2C_FBYTE_FD11 *((volatile unsigned int*)(0x4270C32CUL))
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#define bFM3_MFS6_I2C_FBYTE_FD12 *((volatile unsigned int*)(0x4270C330UL))
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#define bFM3_MFS6_I2C_FBYTE_FD13 *((volatile unsigned int*)(0x4270C334UL))
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#define bFM3_MFS6_I2C_FBYTE_FD14 *((volatile unsigned int*)(0x4270C338UL))
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#define bFM3_MFS6_I2C_FBYTE_FD15 *((volatile unsigned int*)(0x4270C33CUL))
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#define bFM3_MFS6_I2C_FBYTE1_FD0 *((volatile unsigned int*)(0x4270C300UL))
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#define bFM3_MFS6_I2C_FBYTE1_FD1 *((volatile unsigned int*)(0x4270C304UL))
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#define bFM3_MFS6_I2C_FBYTE1_FD2 *((volatile unsigned int*)(0x4270C308UL))
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#define bFM3_MFS6_I2C_FBYTE1_FD3 *((volatile unsigned int*)(0x4270C30CUL))
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#define bFM3_MFS6_I2C_FBYTE1_FD4 *((volatile unsigned int*)(0x4270C310UL))
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#define bFM3_MFS6_I2C_FBYTE1_FD5 *((volatile unsigned int*)(0x4270C314UL))
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#define bFM3_MFS6_I2C_FBYTE1_FD6 *((volatile unsigned int*)(0x4270C318UL))
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#define bFM3_MFS6_I2C_FBYTE1_FD7 *((volatile unsigned int*)(0x4270C31CUL))
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#define bFM3_MFS6_I2C_FBYTE2_FD8 *((volatile unsigned int*)(0x4270C320UL))
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#define bFM3_MFS6_I2C_FBYTE2_FD9 *((volatile unsigned int*)(0x4270C324UL))
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#define bFM3_MFS6_I2C_FBYTE2_FD10 *((volatile unsigned int*)(0x4270C328UL))
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#define bFM3_MFS6_I2C_FBYTE2_FD11 *((volatile unsigned int*)(0x4270C32CUL))
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#define bFM3_MFS6_I2C_FBYTE2_FD12 *((volatile unsigned int*)(0x4270C330UL))
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#define bFM3_MFS6_I2C_FBYTE2_FD13 *((volatile unsigned int*)(0x4270C334UL))
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#define bFM3_MFS6_I2C_FBYTE2_FD14 *((volatile unsigned int*)(0x4270C338UL))
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#define bFM3_MFS6_I2C_FBYTE2_FD15 *((volatile unsigned int*)(0x4270C33CUL))
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/* UART asynchronous channel 7 registers */
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#define bFM3_MFS7_UART_SMR_SOE *((volatile unsigned int*)(0x4270E000UL))
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#define bFM3_MFS7_UART_SMR_BDS *((volatile unsigned int*)(0x4270E008UL))
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#define bFM3_MFS7_UART_SMR_SBL *((volatile unsigned int*)(0x4270E00CUL))
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#define bFM3_MFS7_UART_SMR_WUCR *((volatile unsigned int*)(0x4270E010UL))
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#define bFM3_MFS7_UART_SMR_MD0 *((volatile unsigned int*)(0x4270E014UL))
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#define bFM3_MFS7_UART_SMR_MD1 *((volatile unsigned int*)(0x4270E018UL))
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#define bFM3_MFS7_UART_SMR_MD2 *((volatile unsigned int*)(0x4270E01CUL))
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#define bFM3_MFS7_UART_SCR_TXE *((volatile unsigned int*)(0x4270E020UL))
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#define bFM3_MFS7_UART_SCR_RXE *((volatile unsigned int*)(0x4270E024UL))
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#define bFM3_MFS7_UART_SCR_TBIE *((volatile unsigned int*)(0x4270E028UL))
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#define bFM3_MFS7_UART_SCR_TIE *((volatile unsigned int*)(0x4270E02CUL))
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#define bFM3_MFS7_UART_SCR_RIE *((volatile unsigned int*)(0x4270E030UL))
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#define bFM3_MFS7_UART_SCR_UPCL *((volatile unsigned int*)(0x4270E03CUL))
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#define bFM3_MFS7_UART_ESCR_L0 *((volatile unsigned int*)(0x4270E080UL))
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#define bFM3_MFS7_UART_ESCR_L1 *((volatile unsigned int*)(0x4270E084UL))
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#define bFM3_MFS7_UART_ESCR_L2 *((volatile unsigned int*)(0x4270E088UL))
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#define bFM3_MFS7_UART_ESCR_P *((volatile unsigned int*)(0x4270E08CUL))
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#define bFM3_MFS7_UART_ESCR_PEN *((volatile unsigned int*)(0x4270E090UL))
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#define bFM3_MFS7_UART_ESCR_INV *((volatile unsigned int*)(0x4270E094UL))
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#define bFM3_MFS7_UART_ESCR_ESBL *((volatile unsigned int*)(0x4270E098UL))
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#define bFM3_MFS7_UART_ESCR_FLWEN *((volatile unsigned int*)(0x4270E09CUL))
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#define bFM3_MFS7_UART_SSR_TBI *((volatile unsigned int*)(0x4270E0A0UL))
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#define bFM3_MFS7_UART_SSR_TDRE *((volatile unsigned int*)(0x4270E0A4UL))
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#define bFM3_MFS7_UART_SSR_RDRF *((volatile unsigned int*)(0x4270E0A8UL))
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#define bFM3_MFS7_UART_SSR_ORE *((volatile unsigned int*)(0x4270E0ACUL))
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#define bFM3_MFS7_UART_SSR_FRE *((volatile unsigned int*)(0x4270E0B0UL))
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#define bFM3_MFS7_UART_SSR_PE *((volatile unsigned int*)(0x4270E0B4UL))
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#define bFM3_MFS7_UART_SSR_REC *((volatile unsigned int*)(0x4270E0BCUL))
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#define bFM3_MFS7_UART_RDR_AD *((volatile unsigned int*)(0x4270E120UL))
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#define bFM3_MFS7_UART_TDR_AD *((volatile unsigned int*)(0x4270E120UL))
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#define bFM3_MFS7_UART_BGR_EXT *((volatile unsigned int*)(0x4270E1BCUL))
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#define bFM3_MFS7_UART_BGR1_EXT *((volatile unsigned int*)(0x4270E1BCUL))
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#define bFM3_MFS7_UART_FCR_FE1 *((volatile unsigned int*)(0x4270E280UL))
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#define bFM3_MFS7_UART_FCR_FE2 *((volatile unsigned int*)(0x4270E284UL))
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#define bFM3_MFS7_UART_FCR_FCL1 *((volatile unsigned int*)(0x4270E288UL))
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#define bFM3_MFS7_UART_FCR_FCL2 *((volatile unsigned int*)(0x4270E28CUL))
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#define bFM3_MFS7_UART_FCR_FSET *((volatile unsigned int*)(0x4270E290UL))
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#define bFM3_MFS7_UART_FCR_FLD *((volatile unsigned int*)(0x4270E294UL))
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#define bFM3_MFS7_UART_FCR_FLST *((volatile unsigned int*)(0x4270E298UL))
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#define bFM3_MFS7_UART_FCR_FSEL *((volatile unsigned int*)(0x4270E2A0UL))
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#define bFM3_MFS7_UART_FCR_FTIE *((volatile unsigned int*)(0x4270E2A4UL))
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#define bFM3_MFS7_UART_FCR_FDRQ *((volatile unsigned int*)(0x4270E2A8UL))
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#define bFM3_MFS7_UART_FCR_FRIE *((volatile unsigned int*)(0x4270E2ACUL))
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#define bFM3_MFS7_UART_FCR_FLSTE *((volatile unsigned int*)(0x4270E2B0UL))
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#define bFM3_MFS7_UART_FCR_FTST0 *((volatile unsigned int*)(0x4270E2B8UL))
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#define bFM3_MFS7_UART_FCR_FTST1 *((volatile unsigned int*)(0x4270E2BCUL))
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#define bFM3_MFS7_UART_FCR0_FE1 *((volatile unsigned int*)(0x4270E280UL))
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#define bFM3_MFS7_UART_FCR0_FE2 *((volatile unsigned int*)(0x4270E284UL))
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#define bFM3_MFS7_UART_FCR0_FCL1 *((volatile unsigned int*)(0x4270E288UL))
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#define bFM3_MFS7_UART_FCR0_FCL2 *((volatile unsigned int*)(0x4270E28CUL))
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#define bFM3_MFS7_UART_FCR0_FSET *((volatile unsigned int*)(0x4270E290UL))
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#define bFM3_MFS7_UART_FCR0_FLD *((volatile unsigned int*)(0x4270E294UL))
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#define bFM3_MFS7_UART_FCR0_FLST *((volatile unsigned int*)(0x4270E298UL))
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#define bFM3_MFS7_UART_FCR1_FSEL *((volatile unsigned int*)(0x4270E2A0UL))
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#define bFM3_MFS7_UART_FCR1_FTIE *((volatile unsigned int*)(0x4270E2A4UL))
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#define bFM3_MFS7_UART_FCR1_FDRQ *((volatile unsigned int*)(0x4270E2A8UL))
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#define bFM3_MFS7_UART_FCR1_FRIE *((volatile unsigned int*)(0x4270E2ACUL))
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#define bFM3_MFS7_UART_FCR1_FLSTE *((volatile unsigned int*)(0x4270E2B0UL))
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#define bFM3_MFS7_UART_FCR1_FTST0 *((volatile unsigned int*)(0x4270E2B8UL))
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#define bFM3_MFS7_UART_FCR1_FTST1 *((volatile unsigned int*)(0x4270E2BCUL))
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#define bFM3_MFS7_UART_FBYTE_FD0 *((volatile unsigned int*)(0x4270E300UL))
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#define bFM3_MFS7_UART_FBYTE_FD1 *((volatile unsigned int*)(0x4270E304UL))
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#define bFM3_MFS7_UART_FBYTE_FD2 *((volatile unsigned int*)(0x4270E308UL))
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#define bFM3_MFS7_UART_FBYTE_FD3 *((volatile unsigned int*)(0x4270E30CUL))
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#define bFM3_MFS7_UART_FBYTE_FD4 *((volatile unsigned int*)(0x4270E310UL))
|
|
#define bFM3_MFS7_UART_FBYTE_FD5 *((volatile unsigned int*)(0x4270E314UL))
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#define bFM3_MFS7_UART_FBYTE_FD6 *((volatile unsigned int*)(0x4270E318UL))
|
|
#define bFM3_MFS7_UART_FBYTE_FD7 *((volatile unsigned int*)(0x4270E31CUL))
|
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#define bFM3_MFS7_UART_FBYTE_FD8 *((volatile unsigned int*)(0x4270E320UL))
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|
#define bFM3_MFS7_UART_FBYTE_FD9 *((volatile unsigned int*)(0x4270E324UL))
|
|
#define bFM3_MFS7_UART_FBYTE_FD10 *((volatile unsigned int*)(0x4270E328UL))
|
|
#define bFM3_MFS7_UART_FBYTE_FD11 *((volatile unsigned int*)(0x4270E32CUL))
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|
#define bFM3_MFS7_UART_FBYTE_FD12 *((volatile unsigned int*)(0x4270E330UL))
|
|
#define bFM3_MFS7_UART_FBYTE_FD13 *((volatile unsigned int*)(0x4270E334UL))
|
|
#define bFM3_MFS7_UART_FBYTE_FD14 *((volatile unsigned int*)(0x4270E338UL))
|
|
#define bFM3_MFS7_UART_FBYTE_FD15 *((volatile unsigned int*)(0x4270E33CUL))
|
|
#define bFM3_MFS7_UART_FBYTE1_FD0 *((volatile unsigned int*)(0x4270E300UL))
|
|
#define bFM3_MFS7_UART_FBYTE1_FD1 *((volatile unsigned int*)(0x4270E304UL))
|
|
#define bFM3_MFS7_UART_FBYTE1_FD2 *((volatile unsigned int*)(0x4270E308UL))
|
|
#define bFM3_MFS7_UART_FBYTE1_FD3 *((volatile unsigned int*)(0x4270E30CUL))
|
|
#define bFM3_MFS7_UART_FBYTE1_FD4 *((volatile unsigned int*)(0x4270E310UL))
|
|
#define bFM3_MFS7_UART_FBYTE1_FD5 *((volatile unsigned int*)(0x4270E314UL))
|
|
#define bFM3_MFS7_UART_FBYTE1_FD6 *((volatile unsigned int*)(0x4270E318UL))
|
|
#define bFM3_MFS7_UART_FBYTE1_FD7 *((volatile unsigned int*)(0x4270E31CUL))
|
|
#define bFM3_MFS7_UART_FBYTE2_FD8 *((volatile unsigned int*)(0x4270E320UL))
|
|
#define bFM3_MFS7_UART_FBYTE2_FD9 *((volatile unsigned int*)(0x4270E324UL))
|
|
#define bFM3_MFS7_UART_FBYTE2_FD10 *((volatile unsigned int*)(0x4270E328UL))
|
|
#define bFM3_MFS7_UART_FBYTE2_FD11 *((volatile unsigned int*)(0x4270E32CUL))
|
|
#define bFM3_MFS7_UART_FBYTE2_FD12 *((volatile unsigned int*)(0x4270E330UL))
|
|
#define bFM3_MFS7_UART_FBYTE2_FD13 *((volatile unsigned int*)(0x4270E334UL))
|
|
#define bFM3_MFS7_UART_FBYTE2_FD14 *((volatile unsigned int*)(0x4270E338UL))
|
|
#define bFM3_MFS7_UART_FBYTE2_FD15 *((volatile unsigned int*)(0x4270E33CUL))
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|
|
|
/* UART synchronous channel 7 registers */
|
|
#define bFM3_MFS7_CSIO_SMR_SOE *((volatile unsigned int*)(0x4270E000UL))
|
|
#define bFM3_MFS7_CSIO_SMR_SCKE *((volatile unsigned int*)(0x4270E004UL))
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#define bFM3_MFS7_CSIO_SMR_BDS *((volatile unsigned int*)(0x4270E008UL))
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#define bFM3_MFS7_CSIO_SMR_SCINV *((volatile unsigned int*)(0x4270E00CUL))
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#define bFM3_MFS7_CSIO_SMR_WUCR *((volatile unsigned int*)(0x4270E010UL))
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#define bFM3_MFS7_CSIO_SMR_MD0 *((volatile unsigned int*)(0x4270E014UL))
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#define bFM3_MFS7_CSIO_SMR_MD1 *((volatile unsigned int*)(0x4270E018UL))
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#define bFM3_MFS7_CSIO_SMR_MD2 *((volatile unsigned int*)(0x4270E01CUL))
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#define bFM3_MFS7_CSIO_SCR_TXE *((volatile unsigned int*)(0x4270E020UL))
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#define bFM3_MFS7_CSIO_SCR_RXE *((volatile unsigned int*)(0x4270E024UL))
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#define bFM3_MFS7_CSIO_SCR_TBIE *((volatile unsigned int*)(0x4270E028UL))
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#define bFM3_MFS7_CSIO_SCR_TIE *((volatile unsigned int*)(0x4270E02CUL))
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#define bFM3_MFS7_CSIO_SCR_RIE *((volatile unsigned int*)(0x4270E030UL))
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#define bFM3_MFS7_CSIO_SCR_SPI *((volatile unsigned int*)(0x4270E034UL))
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#define bFM3_MFS7_CSIO_SCR_MS *((volatile unsigned int*)(0x4270E038UL))
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#define bFM3_MFS7_CSIO_SCR_UPCL *((volatile unsigned int*)(0x4270E03CUL))
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#define bFM3_MFS7_CSIO_ESCR_L0 *((volatile unsigned int*)(0x4270E080UL))
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#define bFM3_MFS7_CSIO_ESCR_L1 *((volatile unsigned int*)(0x4270E084UL))
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#define bFM3_MFS7_CSIO_ESCR_L2 *((volatile unsigned int*)(0x4270E088UL))
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#define bFM3_MFS7_CSIO_ESCR_WT0 *((volatile unsigned int*)(0x4270E08CUL))
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#define bFM3_MFS7_CSIO_ESCR_WT1 *((volatile unsigned int*)(0x4270E090UL))
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#define bFM3_MFS7_CSIO_ESCR_SOP *((volatile unsigned int*)(0x4270E09CUL))
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#define bFM3_MFS7_CSIO_SSR_TBI *((volatile unsigned int*)(0x4270E0A0UL))
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#define bFM3_MFS7_CSIO_SSR_TDRE *((volatile unsigned int*)(0x4270E0A4UL))
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#define bFM3_MFS7_CSIO_SSR_RDRF *((volatile unsigned int*)(0x4270E0A8UL))
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#define bFM3_MFS7_CSIO_SSR_ORE *((volatile unsigned int*)(0x4270E0ACUL))
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#define bFM3_MFS7_CSIO_SSR_REC *((volatile unsigned int*)(0x4270E0BCUL))
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#define bFM3_MFS7_CSIO_FCR_FE1 *((volatile unsigned int*)(0x4270E280UL))
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#define bFM3_MFS7_CSIO_FCR_FE2 *((volatile unsigned int*)(0x4270E284UL))
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#define bFM3_MFS7_CSIO_FCR_FCL1 *((volatile unsigned int*)(0x4270E288UL))
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#define bFM3_MFS7_CSIO_FCR_FCL2 *((volatile unsigned int*)(0x4270E28CUL))
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#define bFM3_MFS7_CSIO_FCR_FSET *((volatile unsigned int*)(0x4270E290UL))
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#define bFM3_MFS7_CSIO_FCR_FLD *((volatile unsigned int*)(0x4270E294UL))
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#define bFM3_MFS7_CSIO_FCR_FLST *((volatile unsigned int*)(0x4270E298UL))
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#define bFM3_MFS7_CSIO_FCR_FSEL *((volatile unsigned int*)(0x4270E2A0UL))
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#define bFM3_MFS7_CSIO_FCR_FTIE *((volatile unsigned int*)(0x4270E2A4UL))
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#define bFM3_MFS7_CSIO_FCR_FDRQ *((volatile unsigned int*)(0x4270E2A8UL))
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#define bFM3_MFS7_CSIO_FCR_FRIE *((volatile unsigned int*)(0x4270E2ACUL))
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#define bFM3_MFS7_CSIO_FCR_FLSTE *((volatile unsigned int*)(0x4270E2B0UL))
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#define bFM3_MFS7_CSIO_FCR_FTST0 *((volatile unsigned int*)(0x4270E2B8UL))
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#define bFM3_MFS7_CSIO_FCR_FTST1 *((volatile unsigned int*)(0x4270E2BCUL))
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#define bFM3_MFS7_CSIO_FCR0_FE1 *((volatile unsigned int*)(0x4270E280UL))
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#define bFM3_MFS7_CSIO_FCR0_FE2 *((volatile unsigned int*)(0x4270E284UL))
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#define bFM3_MFS7_CSIO_FCR0_FCL1 *((volatile unsigned int*)(0x4270E288UL))
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#define bFM3_MFS7_CSIO_FCR0_FCL2 *((volatile unsigned int*)(0x4270E28CUL))
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#define bFM3_MFS7_CSIO_FCR0_FSET *((volatile unsigned int*)(0x4270E290UL))
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#define bFM3_MFS7_CSIO_FCR0_FLD *((volatile unsigned int*)(0x4270E294UL))
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#define bFM3_MFS7_CSIO_FCR0_FLST *((volatile unsigned int*)(0x4270E298UL))
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#define bFM3_MFS7_CSIO_FCR1_FSEL *((volatile unsigned int*)(0x4270E2A0UL))
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#define bFM3_MFS7_CSIO_FCR1_FTIE *((volatile unsigned int*)(0x4270E2A4UL))
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#define bFM3_MFS7_CSIO_FCR1_FDRQ *((volatile unsigned int*)(0x4270E2A8UL))
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#define bFM3_MFS7_CSIO_FCR1_FRIE *((volatile unsigned int*)(0x4270E2ACUL))
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#define bFM3_MFS7_CSIO_FCR1_FLSTE *((volatile unsigned int*)(0x4270E2B0UL))
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#define bFM3_MFS7_CSIO_FCR1_FTST0 *((volatile unsigned int*)(0x4270E2B8UL))
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#define bFM3_MFS7_CSIO_FCR1_FTST1 *((volatile unsigned int*)(0x4270E2BCUL))
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#define bFM3_MFS7_CSIO_FBYTE_FD0 *((volatile unsigned int*)(0x4270E300UL))
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#define bFM3_MFS7_CSIO_FBYTE_FD1 *((volatile unsigned int*)(0x4270E304UL))
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#define bFM3_MFS7_CSIO_FBYTE_FD2 *((volatile unsigned int*)(0x4270E308UL))
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#define bFM3_MFS7_CSIO_FBYTE_FD3 *((volatile unsigned int*)(0x4270E30CUL))
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#define bFM3_MFS7_CSIO_FBYTE_FD4 *((volatile unsigned int*)(0x4270E310UL))
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#define bFM3_MFS7_CSIO_FBYTE_FD5 *((volatile unsigned int*)(0x4270E314UL))
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#define bFM3_MFS7_CSIO_FBYTE_FD6 *((volatile unsigned int*)(0x4270E318UL))
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#define bFM3_MFS7_CSIO_FBYTE_FD7 *((volatile unsigned int*)(0x4270E31CUL))
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#define bFM3_MFS7_CSIO_FBYTE_FD8 *((volatile unsigned int*)(0x4270E320UL))
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#define bFM3_MFS7_CSIO_FBYTE_FD9 *((volatile unsigned int*)(0x4270E324UL))
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#define bFM3_MFS7_CSIO_FBYTE_FD10 *((volatile unsigned int*)(0x4270E328UL))
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#define bFM3_MFS7_CSIO_FBYTE_FD11 *((volatile unsigned int*)(0x4270E32CUL))
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#define bFM3_MFS7_CSIO_FBYTE_FD12 *((volatile unsigned int*)(0x4270E330UL))
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#define bFM3_MFS7_CSIO_FBYTE_FD13 *((volatile unsigned int*)(0x4270E334UL))
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#define bFM3_MFS7_CSIO_FBYTE_FD14 *((volatile unsigned int*)(0x4270E338UL))
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#define bFM3_MFS7_CSIO_FBYTE_FD15 *((volatile unsigned int*)(0x4270E33CUL))
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#define bFM3_MFS7_CSIO_FBYTE1_FD0 *((volatile unsigned int*)(0x4270E300UL))
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#define bFM3_MFS7_CSIO_FBYTE1_FD1 *((volatile unsigned int*)(0x4270E304UL))
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#define bFM3_MFS7_CSIO_FBYTE1_FD2 *((volatile unsigned int*)(0x4270E308UL))
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#define bFM3_MFS7_CSIO_FBYTE1_FD3 *((volatile unsigned int*)(0x4270E30CUL))
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#define bFM3_MFS7_CSIO_FBYTE1_FD4 *((volatile unsigned int*)(0x4270E310UL))
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#define bFM3_MFS7_CSIO_FBYTE1_FD5 *((volatile unsigned int*)(0x4270E314UL))
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#define bFM3_MFS7_CSIO_FBYTE1_FD6 *((volatile unsigned int*)(0x4270E318UL))
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#define bFM3_MFS7_CSIO_FBYTE1_FD7 *((volatile unsigned int*)(0x4270E31CUL))
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#define bFM3_MFS7_CSIO_FBYTE2_FD8 *((volatile unsigned int*)(0x4270E320UL))
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#define bFM3_MFS7_CSIO_FBYTE2_FD9 *((volatile unsigned int*)(0x4270E324UL))
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#define bFM3_MFS7_CSIO_FBYTE2_FD10 *((volatile unsigned int*)(0x4270E328UL))
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#define bFM3_MFS7_CSIO_FBYTE2_FD11 *((volatile unsigned int*)(0x4270E32CUL))
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#define bFM3_MFS7_CSIO_FBYTE2_FD12 *((volatile unsigned int*)(0x4270E330UL))
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#define bFM3_MFS7_CSIO_FBYTE2_FD13 *((volatile unsigned int*)(0x4270E334UL))
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#define bFM3_MFS7_CSIO_FBYTE2_FD14 *((volatile unsigned int*)(0x4270E338UL))
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#define bFM3_MFS7_CSIO_FBYTE2_FD15 *((volatile unsigned int*)(0x4270E33CUL))
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/* UART LIN channel 7 registers */
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#define bFM3_MFS7_LIN_SMR_SOE *((volatile unsigned int*)(0x4270E000UL))
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#define bFM3_MFS7_LIN_SMR_SBL *((volatile unsigned int*)(0x4270E00CUL))
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#define bFM3_MFS7_LIN_SMR_WUCR *((volatile unsigned int*)(0x4270E010UL))
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#define bFM3_MFS7_LIN_SMR_MD0 *((volatile unsigned int*)(0x4270E014UL))
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#define bFM3_MFS7_LIN_SMR_MD1 *((volatile unsigned int*)(0x4270E018UL))
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#define bFM3_MFS7_LIN_SMR_MD2 *((volatile unsigned int*)(0x4270E01CUL))
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#define bFM3_MFS7_LIN_SCR_TXE *((volatile unsigned int*)(0x4270E020UL))
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#define bFM3_MFS7_LIN_SCR_RXE *((volatile unsigned int*)(0x4270E024UL))
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#define bFM3_MFS7_LIN_SCR_TBIE *((volatile unsigned int*)(0x4270E028UL))
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#define bFM3_MFS7_LIN_SCR_TIE *((volatile unsigned int*)(0x4270E02CUL))
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#define bFM3_MFS7_LIN_SCR_RIE *((volatile unsigned int*)(0x4270E030UL))
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#define bFM3_MFS7_LIN_SCR_LBR *((volatile unsigned int*)(0x4270E034UL))
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#define bFM3_MFS7_LIN_SCR_MS *((volatile unsigned int*)(0x4270E038UL))
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#define bFM3_MFS7_LIN_SCR_UPCL *((volatile unsigned int*)(0x4270E03CUL))
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#define bFM3_MFS7_LIN_ESCR_DEL0 *((volatile unsigned int*)(0x4270E080UL))
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#define bFM3_MFS7_LIN_ESCR_DEL1 *((volatile unsigned int*)(0x4270E084UL))
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#define bFM3_MFS7_LIN_ESCR_LBL0 *((volatile unsigned int*)(0x4270E088UL))
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#define bFM3_MFS7_LIN_ESCR_LBL1 *((volatile unsigned int*)(0x4270E08CUL))
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#define bFM3_MFS7_LIN_ESCR_LBIE *((volatile unsigned int*)(0x4270E090UL))
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#define bFM3_MFS7_LIN_ESCR_ESBL *((volatile unsigned int*)(0x4270E098UL))
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#define bFM3_MFS7_LIN_SSR_TBI *((volatile unsigned int*)(0x4270E0A0UL))
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#define bFM3_MFS7_LIN_SSR_TDRE *((volatile unsigned int*)(0x4270E0A4UL))
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#define bFM3_MFS7_LIN_SSR_RDRF *((volatile unsigned int*)(0x4270E0A8UL))
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#define bFM3_MFS7_LIN_SSR_ORE *((volatile unsigned int*)(0x4270E0ACUL))
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#define bFM3_MFS7_LIN_SSR_FRE *((volatile unsigned int*)(0x4270E0B0UL))
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#define bFM3_MFS7_LIN_SSR_LBD *((volatile unsigned int*)(0x4270E0B4UL))
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#define bFM3_MFS7_LIN_SSR_REC *((volatile unsigned int*)(0x4270E0BCUL))
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#define bFM3_MFS7_LIN_BGR_EXT *((volatile unsigned int*)(0x4270E1BCUL))
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#define bFM3_MFS7_LIN_BGR1_EXT *((volatile unsigned int*)(0x4270E1BCUL))
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#define bFM3_MFS7_LIN_FCR_FE1 *((volatile unsigned int*)(0x4270E280UL))
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#define bFM3_MFS7_LIN_FCR_FE2 *((volatile unsigned int*)(0x4270E284UL))
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#define bFM3_MFS7_LIN_FCR_FCL1 *((volatile unsigned int*)(0x4270E288UL))
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#define bFM3_MFS7_LIN_FCR_FCL2 *((volatile unsigned int*)(0x4270E28CUL))
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#define bFM3_MFS7_LIN_FCR_FSET *((volatile unsigned int*)(0x4270E290UL))
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#define bFM3_MFS7_LIN_FCR_FLD *((volatile unsigned int*)(0x4270E294UL))
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#define bFM3_MFS7_LIN_FCR_FLST *((volatile unsigned int*)(0x4270E298UL))
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#define bFM3_MFS7_LIN_FCR_FSEL *((volatile unsigned int*)(0x4270E2A0UL))
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#define bFM3_MFS7_LIN_FCR_FTIE *((volatile unsigned int*)(0x4270E2A4UL))
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#define bFM3_MFS7_LIN_FCR_FDRQ *((volatile unsigned int*)(0x4270E2A8UL))
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#define bFM3_MFS7_LIN_FCR_FRIE *((volatile unsigned int*)(0x4270E2ACUL))
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#define bFM3_MFS7_LIN_FCR_FLSTE *((volatile unsigned int*)(0x4270E2B0UL))
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#define bFM3_MFS7_LIN_FCR_FTST0 *((volatile unsigned int*)(0x4270E2B8UL))
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#define bFM3_MFS7_LIN_FCR_FTST1 *((volatile unsigned int*)(0x4270E2BCUL))
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#define bFM3_MFS7_LIN_FCR0_FE1 *((volatile unsigned int*)(0x4270E280UL))
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#define bFM3_MFS7_LIN_FCR0_FE2 *((volatile unsigned int*)(0x4270E284UL))
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#define bFM3_MFS7_LIN_FCR0_FCL1 *((volatile unsigned int*)(0x4270E288UL))
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#define bFM3_MFS7_LIN_FCR0_FCL2 *((volatile unsigned int*)(0x4270E28CUL))
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#define bFM3_MFS7_LIN_FCR0_FSET *((volatile unsigned int*)(0x4270E290UL))
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#define bFM3_MFS7_LIN_FCR0_FLD *((volatile unsigned int*)(0x4270E294UL))
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#define bFM3_MFS7_LIN_FCR0_FLST *((volatile unsigned int*)(0x4270E298UL))
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#define bFM3_MFS7_LIN_FCR1_FSEL *((volatile unsigned int*)(0x4270E2A0UL))
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#define bFM3_MFS7_LIN_FCR1_FTIE *((volatile unsigned int*)(0x4270E2A4UL))
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#define bFM3_MFS7_LIN_FCR1_FDRQ *((volatile unsigned int*)(0x4270E2A8UL))
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#define bFM3_MFS7_LIN_FCR1_FRIE *((volatile unsigned int*)(0x4270E2ACUL))
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#define bFM3_MFS7_LIN_FCR1_FLSTE *((volatile unsigned int*)(0x4270E2B0UL))
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#define bFM3_MFS7_LIN_FCR1_FTST0 *((volatile unsigned int*)(0x4270E2B8UL))
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#define bFM3_MFS7_LIN_FCR1_FTST1 *((volatile unsigned int*)(0x4270E2BCUL))
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#define bFM3_MFS7_LIN_FBYTE_FD0 *((volatile unsigned int*)(0x4270E300UL))
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#define bFM3_MFS7_LIN_FBYTE_FD1 *((volatile unsigned int*)(0x4270E304UL))
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#define bFM3_MFS7_LIN_FBYTE_FD2 *((volatile unsigned int*)(0x4270E308UL))
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#define bFM3_MFS7_LIN_FBYTE_FD3 *((volatile unsigned int*)(0x4270E30CUL))
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#define bFM3_MFS7_LIN_FBYTE_FD4 *((volatile unsigned int*)(0x4270E310UL))
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#define bFM3_MFS7_LIN_FBYTE_FD5 *((volatile unsigned int*)(0x4270E314UL))
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#define bFM3_MFS7_LIN_FBYTE_FD6 *((volatile unsigned int*)(0x4270E318UL))
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#define bFM3_MFS7_LIN_FBYTE_FD7 *((volatile unsigned int*)(0x4270E31CUL))
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#define bFM3_MFS7_LIN_FBYTE_FD8 *((volatile unsigned int*)(0x4270E320UL))
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#define bFM3_MFS7_LIN_FBYTE_FD9 *((volatile unsigned int*)(0x4270E324UL))
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#define bFM3_MFS7_LIN_FBYTE_FD10 *((volatile unsigned int*)(0x4270E328UL))
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#define bFM3_MFS7_LIN_FBYTE_FD11 *((volatile unsigned int*)(0x4270E32CUL))
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#define bFM3_MFS7_LIN_FBYTE_FD12 *((volatile unsigned int*)(0x4270E330UL))
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#define bFM3_MFS7_LIN_FBYTE_FD13 *((volatile unsigned int*)(0x4270E334UL))
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#define bFM3_MFS7_LIN_FBYTE_FD14 *((volatile unsigned int*)(0x4270E338UL))
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#define bFM3_MFS7_LIN_FBYTE_FD15 *((volatile unsigned int*)(0x4270E33CUL))
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#define bFM3_MFS7_LIN_FBYTE1_FD0 *((volatile unsigned int*)(0x4270E300UL))
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#define bFM3_MFS7_LIN_FBYTE1_FD1 *((volatile unsigned int*)(0x4270E304UL))
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#define bFM3_MFS7_LIN_FBYTE1_FD2 *((volatile unsigned int*)(0x4270E308UL))
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#define bFM3_MFS7_LIN_FBYTE1_FD3 *((volatile unsigned int*)(0x4270E30CUL))
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#define bFM3_MFS7_LIN_FBYTE1_FD4 *((volatile unsigned int*)(0x4270E310UL))
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#define bFM3_MFS7_LIN_FBYTE1_FD5 *((volatile unsigned int*)(0x4270E314UL))
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#define bFM3_MFS7_LIN_FBYTE1_FD6 *((volatile unsigned int*)(0x4270E318UL))
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#define bFM3_MFS7_LIN_FBYTE1_FD7 *((volatile unsigned int*)(0x4270E31CUL))
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#define bFM3_MFS7_LIN_FBYTE2_FD8 *((volatile unsigned int*)(0x4270E320UL))
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#define bFM3_MFS7_LIN_FBYTE2_FD9 *((volatile unsigned int*)(0x4270E324UL))
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#define bFM3_MFS7_LIN_FBYTE2_FD10 *((volatile unsigned int*)(0x4270E328UL))
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#define bFM3_MFS7_LIN_FBYTE2_FD11 *((volatile unsigned int*)(0x4270E32CUL))
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#define bFM3_MFS7_LIN_FBYTE2_FD12 *((volatile unsigned int*)(0x4270E330UL))
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#define bFM3_MFS7_LIN_FBYTE2_FD13 *((volatile unsigned int*)(0x4270E334UL))
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#define bFM3_MFS7_LIN_FBYTE2_FD14 *((volatile unsigned int*)(0x4270E338UL))
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#define bFM3_MFS7_LIN_FBYTE2_FD15 *((volatile unsigned int*)(0x4270E33CUL))
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/* I2C channel 7 registers */
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#define bFM3_MFS7_I2C_SMR_ITST0 *((volatile unsigned int*)(0x4270E000UL))
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#define bFM3_MFS7_I2C_SMR_ITST1 *((volatile unsigned int*)(0x4270E004UL))
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#define bFM3_MFS7_I2C_SMR_TIE *((volatile unsigned int*)(0x4270E008UL))
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#define bFM3_MFS7_I2C_SMR_RIE *((volatile unsigned int*)(0x4270E00CUL))
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#define bFM3_MFS7_I2C_SMR_WUCR *((volatile unsigned int*)(0x4270E010UL))
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#define bFM3_MFS7_I2C_SMR_MD0 *((volatile unsigned int*)(0x4270E014UL))
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#define bFM3_MFS7_I2C_SMR_MD1 *((volatile unsigned int*)(0x4270E018UL))
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#define bFM3_MFS7_I2C_SMR_MD2 *((volatile unsigned int*)(0x4270E01CUL))
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#define bFM3_MFS7_I2C_IBCR_INT *((volatile unsigned int*)(0x4270E020UL))
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#define bFM3_MFS7_I2C_IBCR_BER *((volatile unsigned int*)(0x4270E024UL))
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#define bFM3_MFS7_I2C_IBCR_INTE *((volatile unsigned int*)(0x4270E028UL))
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#define bFM3_MFS7_I2C_IBCR_CNDE *((volatile unsigned int*)(0x4270E02CUL))
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#define bFM3_MFS7_I2C_IBCR_WSEL *((volatile unsigned int*)(0x4270E030UL))
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#define bFM3_MFS7_I2C_IBCR_ACKE *((volatile unsigned int*)(0x4270E034UL))
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#define bFM3_MFS7_I2C_IBCR_ACT *((volatile unsigned int*)(0x4270E038UL))
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#define bFM3_MFS7_I2C_IBCR_SCC *((volatile unsigned int*)(0x4270E038UL))
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#define bFM3_MFS7_I2C_IBCR_MSS *((volatile unsigned int*)(0x4270E03CUL))
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#define bFM3_MFS7_I2C_IBSR_BB *((volatile unsigned int*)(0x4270E080UL))
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#define bFM3_MFS7_I2C_IBSR_SPC *((volatile unsigned int*)(0x4270E084UL))
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#define bFM3_MFS7_I2C_IBSR_RSC *((volatile unsigned int*)(0x4270E088UL))
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#define bFM3_MFS7_I2C_IBSR_AL *((volatile unsigned int*)(0x4270E08CUL))
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#define bFM3_MFS7_I2C_IBSR_TRX *((volatile unsigned int*)(0x4270E090UL))
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#define bFM3_MFS7_I2C_IBSR_RSA *((volatile unsigned int*)(0x4270E094UL))
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#define bFM3_MFS7_I2C_IBSR_RACK *((volatile unsigned int*)(0x4270E098UL))
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#define bFM3_MFS7_I2C_IBSR_FBT *((volatile unsigned int*)(0x4270E09CUL))
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#define bFM3_MFS7_I2C_SSR_TBI *((volatile unsigned int*)(0x4270E0A0UL))
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#define bFM3_MFS7_I2C_SSR_TDRE *((volatile unsigned int*)(0x4270E0A4UL))
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#define bFM3_MFS7_I2C_SSR_RDRF *((volatile unsigned int*)(0x4270E0A8UL))
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#define bFM3_MFS7_I2C_SSR_ORE *((volatile unsigned int*)(0x4270E0ACUL))
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#define bFM3_MFS7_I2C_SSR_TBIE *((volatile unsigned int*)(0x4270E0B0UL))
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#define bFM3_MFS7_I2C_SSR_DMA *((volatile unsigned int*)(0x4270E0B4UL))
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#define bFM3_MFS7_I2C_SSR_TSET *((volatile unsigned int*)(0x4270E0B8UL))
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#define bFM3_MFS7_I2C_SSR_REC *((volatile unsigned int*)(0x4270E0BCUL))
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#define bFM3_MFS7_I2C_ISBA_SA0 *((volatile unsigned int*)(0x4270E200UL))
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#define bFM3_MFS7_I2C_ISBA_SA1 *((volatile unsigned int*)(0x4270E204UL))
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#define bFM3_MFS7_I2C_ISBA_SA2 *((volatile unsigned int*)(0x4270E208UL))
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#define bFM3_MFS7_I2C_ISBA_SA3 *((volatile unsigned int*)(0x4270E20CUL))
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|
#define bFM3_MFS7_I2C_ISBA_SA4 *((volatile unsigned int*)(0x4270E210UL))
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#define bFM3_MFS7_I2C_ISBA_SA5 *((volatile unsigned int*)(0x4270E214UL))
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#define bFM3_MFS7_I2C_ISBA_SA6 *((volatile unsigned int*)(0x4270E218UL))
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#define bFM3_MFS7_I2C_ISBA_SAEN *((volatile unsigned int*)(0x4270E21CUL))
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#define bFM3_MFS7_I2C_ISMK_SM0 *((volatile unsigned int*)(0x4270E220UL))
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#define bFM3_MFS7_I2C_ISMK_SM1 *((volatile unsigned int*)(0x4270E224UL))
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#define bFM3_MFS7_I2C_ISMK_SM2 *((volatile unsigned int*)(0x4270E228UL))
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|
#define bFM3_MFS7_I2C_ISMK_SM3 *((volatile unsigned int*)(0x4270E22CUL))
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#define bFM3_MFS7_I2C_ISMK_SM4 *((volatile unsigned int*)(0x4270E230UL))
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|
#define bFM3_MFS7_I2C_ISMK_SM5 *((volatile unsigned int*)(0x4270E234UL))
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|
#define bFM3_MFS7_I2C_ISMK_SM6 *((volatile unsigned int*)(0x4270E238UL))
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#define bFM3_MFS7_I2C_ISMK_EN *((volatile unsigned int*)(0x4270E23CUL))
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#define bFM3_MFS7_I2C_FCR_FE1 *((volatile unsigned int*)(0x4270E280UL))
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#define bFM3_MFS7_I2C_FCR_FE2 *((volatile unsigned int*)(0x4270E284UL))
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#define bFM3_MFS7_I2C_FCR_FCL1 *((volatile unsigned int*)(0x4270E288UL))
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#define bFM3_MFS7_I2C_FCR_FCL2 *((volatile unsigned int*)(0x4270E28CUL))
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#define bFM3_MFS7_I2C_FCR_FSET *((volatile unsigned int*)(0x4270E290UL))
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#define bFM3_MFS7_I2C_FCR_FLD *((volatile unsigned int*)(0x4270E294UL))
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#define bFM3_MFS7_I2C_FCR_FLST *((volatile unsigned int*)(0x4270E298UL))
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#define bFM3_MFS7_I2C_FCR_FSEL *((volatile unsigned int*)(0x4270E2A0UL))
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|
#define bFM3_MFS7_I2C_FCR_FTIE *((volatile unsigned int*)(0x4270E2A4UL))
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#define bFM3_MFS7_I2C_FCR_FDRQ *((volatile unsigned int*)(0x4270E2A8UL))
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#define bFM3_MFS7_I2C_FCR_FRIE *((volatile unsigned int*)(0x4270E2ACUL))
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|
#define bFM3_MFS7_I2C_FCR_FLSTE *((volatile unsigned int*)(0x4270E2B0UL))
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|
#define bFM3_MFS7_I2C_FCR_FTST0 *((volatile unsigned int*)(0x4270E2B8UL))
|
|
#define bFM3_MFS7_I2C_FCR_FTST1 *((volatile unsigned int*)(0x4270E2BCUL))
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|
#define bFM3_MFS7_I2C_FCR0_FE1 *((volatile unsigned int*)(0x4270E280UL))
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|
#define bFM3_MFS7_I2C_FCR0_FE2 *((volatile unsigned int*)(0x4270E284UL))
|
|
#define bFM3_MFS7_I2C_FCR0_FCL1 *((volatile unsigned int*)(0x4270E288UL))
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|
#define bFM3_MFS7_I2C_FCR0_FCL2 *((volatile unsigned int*)(0x4270E28CUL))
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|
#define bFM3_MFS7_I2C_FCR0_FSET *((volatile unsigned int*)(0x4270E290UL))
|
|
#define bFM3_MFS7_I2C_FCR0_FLD *((volatile unsigned int*)(0x4270E294UL))
|
|
#define bFM3_MFS7_I2C_FCR0_FLST *((volatile unsigned int*)(0x4270E298UL))
|
|
#define bFM3_MFS7_I2C_FCR1_FSEL *((volatile unsigned int*)(0x4270E2A0UL))
|
|
#define bFM3_MFS7_I2C_FCR1_FTIE *((volatile unsigned int*)(0x4270E2A4UL))
|
|
#define bFM3_MFS7_I2C_FCR1_FDRQ *((volatile unsigned int*)(0x4270E2A8UL))
|
|
#define bFM3_MFS7_I2C_FCR1_FRIE *((volatile unsigned int*)(0x4270E2ACUL))
|
|
#define bFM3_MFS7_I2C_FCR1_FLSTE *((volatile unsigned int*)(0x4270E2B0UL))
|
|
#define bFM3_MFS7_I2C_FCR1_FTST0 *((volatile unsigned int*)(0x4270E2B8UL))
|
|
#define bFM3_MFS7_I2C_FCR1_FTST1 *((volatile unsigned int*)(0x4270E2BCUL))
|
|
#define bFM3_MFS7_I2C_FBYTE_FD0 *((volatile unsigned int*)(0x4270E300UL))
|
|
#define bFM3_MFS7_I2C_FBYTE_FD1 *((volatile unsigned int*)(0x4270E304UL))
|
|
#define bFM3_MFS7_I2C_FBYTE_FD2 *((volatile unsigned int*)(0x4270E308UL))
|
|
#define bFM3_MFS7_I2C_FBYTE_FD3 *((volatile unsigned int*)(0x4270E30CUL))
|
|
#define bFM3_MFS7_I2C_FBYTE_FD4 *((volatile unsigned int*)(0x4270E310UL))
|
|
#define bFM3_MFS7_I2C_FBYTE_FD5 *((volatile unsigned int*)(0x4270E314UL))
|
|
#define bFM3_MFS7_I2C_FBYTE_FD6 *((volatile unsigned int*)(0x4270E318UL))
|
|
#define bFM3_MFS7_I2C_FBYTE_FD7 *((volatile unsigned int*)(0x4270E31CUL))
|
|
#define bFM3_MFS7_I2C_FBYTE_FD8 *((volatile unsigned int*)(0x4270E320UL))
|
|
#define bFM3_MFS7_I2C_FBYTE_FD9 *((volatile unsigned int*)(0x4270E324UL))
|
|
#define bFM3_MFS7_I2C_FBYTE_FD10 *((volatile unsigned int*)(0x4270E328UL))
|
|
#define bFM3_MFS7_I2C_FBYTE_FD11 *((volatile unsigned int*)(0x4270E32CUL))
|
|
#define bFM3_MFS7_I2C_FBYTE_FD12 *((volatile unsigned int*)(0x4270E330UL))
|
|
#define bFM3_MFS7_I2C_FBYTE_FD13 *((volatile unsigned int*)(0x4270E334UL))
|
|
#define bFM3_MFS7_I2C_FBYTE_FD14 *((volatile unsigned int*)(0x4270E338UL))
|
|
#define bFM3_MFS7_I2C_FBYTE_FD15 *((volatile unsigned int*)(0x4270E33CUL))
|
|
#define bFM3_MFS7_I2C_FBYTE1_FD0 *((volatile unsigned int*)(0x4270E300UL))
|
|
#define bFM3_MFS7_I2C_FBYTE1_FD1 *((volatile unsigned int*)(0x4270E304UL))
|
|
#define bFM3_MFS7_I2C_FBYTE1_FD2 *((volatile unsigned int*)(0x4270E308UL))
|
|
#define bFM3_MFS7_I2C_FBYTE1_FD3 *((volatile unsigned int*)(0x4270E30CUL))
|
|
#define bFM3_MFS7_I2C_FBYTE1_FD4 *((volatile unsigned int*)(0x4270E310UL))
|
|
#define bFM3_MFS7_I2C_FBYTE1_FD5 *((volatile unsigned int*)(0x4270E314UL))
|
|
#define bFM3_MFS7_I2C_FBYTE1_FD6 *((volatile unsigned int*)(0x4270E318UL))
|
|
#define bFM3_MFS7_I2C_FBYTE1_FD7 *((volatile unsigned int*)(0x4270E31CUL))
|
|
#define bFM3_MFS7_I2C_FBYTE2_FD8 *((volatile unsigned int*)(0x4270E320UL))
|
|
#define bFM3_MFS7_I2C_FBYTE2_FD9 *((volatile unsigned int*)(0x4270E324UL))
|
|
#define bFM3_MFS7_I2C_FBYTE2_FD10 *((volatile unsigned int*)(0x4270E328UL))
|
|
#define bFM3_MFS7_I2C_FBYTE2_FD11 *((volatile unsigned int*)(0x4270E32CUL))
|
|
#define bFM3_MFS7_I2C_FBYTE2_FD12 *((volatile unsigned int*)(0x4270E330UL))
|
|
#define bFM3_MFS7_I2C_FBYTE2_FD13 *((volatile unsigned int*)(0x4270E334UL))
|
|
#define bFM3_MFS7_I2C_FBYTE2_FD14 *((volatile unsigned int*)(0x4270E338UL))
|
|
#define bFM3_MFS7_I2C_FBYTE2_FD15 *((volatile unsigned int*)(0x4270E33CUL))
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|
|
|
/* MFS Noise Filter Control registers */
|
|
#define bFM3_MFS_NFC_I2CDNF_I2CDNF00 *((volatile unsigned int*)(0x42710000UL))
|
|
#define bFM3_MFS_NFC_I2CDNF_I2CDNF01 *((volatile unsigned int*)(0x42710004UL))
|
|
#define bFM3_MFS_NFC_I2CDNF_I2CDNF10 *((volatile unsigned int*)(0x42710008UL))
|
|
#define bFM3_MFS_NFC_I2CDNF_I2CDNF11 *((volatile unsigned int*)(0x4271000CUL))
|
|
#define bFM3_MFS_NFC_I2CDNF_I2CDNF20 *((volatile unsigned int*)(0x42710010UL))
|
|
#define bFM3_MFS_NFC_I2CDNF_I2CDNF21 *((volatile unsigned int*)(0x42710014UL))
|
|
#define bFM3_MFS_NFC_I2CDNF_I2CDNF30 *((volatile unsigned int*)(0x42710018UL))
|
|
#define bFM3_MFS_NFC_I2CDNF_I2CDNF31 *((volatile unsigned int*)(0x4271001CUL))
|
|
#define bFM3_MFS_NFC_I2CDNF_I2CDNF40 *((volatile unsigned int*)(0x42710020UL))
|
|
#define bFM3_MFS_NFC_I2CDNF_I2CDNF41 *((volatile unsigned int*)(0x42710024UL))
|
|
#define bFM3_MFS_NFC_I2CDNF_I2CDNF50 *((volatile unsigned int*)(0x42710028UL))
|
|
#define bFM3_MFS_NFC_I2CDNF_I2CDNF51 *((volatile unsigned int*)(0x4271002CUL))
|
|
#define bFM3_MFS_NFC_I2CDNF_I2CDNF60 *((volatile unsigned int*)(0x42710030UL))
|
|
#define bFM3_MFS_NFC_I2CDNF_I2CDNF61 *((volatile unsigned int*)(0x42710034UL))
|
|
#define bFM3_MFS_NFC_I2CDNF_I2CDNF70 *((volatile unsigned int*)(0x42710038UL))
|
|
#define bFM3_MFS_NFC_I2CDNF_I2CDNF71 *((volatile unsigned int*)(0x4271003CUL))
|
|
|
|
/* CRC registers */
|
|
#define bFM3_CRC_CRCCR_INIT *((volatile unsigned int*)(0x42720000UL))
|
|
#define bFM3_CRC_CRCCR_CRC32 *((volatile unsigned int*)(0x42720004UL))
|
|
#define bFM3_CRC_CRCCR_LTLEND *((volatile unsigned int*)(0x42720008UL))
|
|
#define bFM3_CRC_CRCCR_LSBFST *((volatile unsigned int*)(0x4272000CUL))
|
|
#define bFM3_CRC_CRCCR_CRCLTE *((volatile unsigned int*)(0x42720010UL))
|
|
#define bFM3_CRC_CRCCR_CRCLSF *((volatile unsigned int*)(0x42720014UL))
|
|
#define bFM3_CRC_CRCCR_FXOR *((volatile unsigned int*)(0x42720018UL))
|
|
|
|
/* Watch counter registers */
|
|
#define bFM3_WC_WCRD_CTR0 *((volatile unsigned int*)(0x42740000UL))
|
|
#define bFM3_WC_WCRD_CTR1 *((volatile unsigned int*)(0x42740004UL))
|
|
#define bFM3_WC_WCRD_CTR2 *((volatile unsigned int*)(0x42740008UL))
|
|
#define bFM3_WC_WCRD_CTR3 *((volatile unsigned int*)(0x4274000CUL))
|
|
#define bFM3_WC_WCRD_CTR4 *((volatile unsigned int*)(0x42740010UL))
|
|
#define bFM3_WC_WCRD_CTR5 *((volatile unsigned int*)(0x42740014UL))
|
|
#define bFM3_WC_WCRL_RLC0 *((volatile unsigned int*)(0x42740020UL))
|
|
#define bFM3_WC_WCRL_RLC1 *((volatile unsigned int*)(0x42740024UL))
|
|
#define bFM3_WC_WCRL_RLC2 *((volatile unsigned int*)(0x42740028UL))
|
|
#define bFM3_WC_WCRL_RLC3 *((volatile unsigned int*)(0x4274002CUL))
|
|
#define bFM3_WC_WCRL_RLC4 *((volatile unsigned int*)(0x42740030UL))
|
|
#define bFM3_WC_WCRL_RLC5 *((volatile unsigned int*)(0x42740034UL))
|
|
#define bFM3_WC_WCCR_WCIF *((volatile unsigned int*)(0x42740040UL))
|
|
#define bFM3_WC_WCCR_WCIE *((volatile unsigned int*)(0x42740044UL))
|
|
#define bFM3_WC_WCCR_CS0 *((volatile unsigned int*)(0x42740048UL))
|
|
#define bFM3_WC_WCCR_CS1 *((volatile unsigned int*)(0x4274004CUL))
|
|
#define bFM3_WC_WCCR_WCOP *((volatile unsigned int*)(0x42740058UL))
|
|
#define bFM3_WC_WCCR_WCEN *((volatile unsigned int*)(0x4274005CUL))
|
|
#define bFM3_WC_CLK_SEL_SEL_IN *((volatile unsigned int*)(0x42740200UL))
|
|
#define bFM3_WC_CLK_SEL_SEL_OUT *((volatile unsigned int*)(0x42740220UL))
|
|
#define bFM3_WC_CLK_EN_CLK_EN *((volatile unsigned int*)(0x42740280UL))
|
|
#define bFM3_WC_CLK_EN_CLK_EN_R *((volatile unsigned int*)(0x42740284UL))
|
|
|
|
/* External bus interface registers */
|
|
#define bFM3_EXBUS_MODE0_WDTH0 *((volatile unsigned int*)(0x427E0000UL))
|
|
#define bFM3_EXBUS_MODE0_WDTH1 *((volatile unsigned int*)(0x427E0004UL))
|
|
#define bFM3_EXBUS_MODE0_RBMON *((volatile unsigned int*)(0x427E0008UL))
|
|
#define bFM3_EXBUS_MODE0_WEOFF *((volatile unsigned int*)(0x427E000CUL))
|
|
#define bFM3_EXBUS_MODE0_NAND *((volatile unsigned int*)(0x427E0210UL))
|
|
#define bFM3_EXBUS_MODE0_PAGE *((volatile unsigned int*)(0x427E0014UL))
|
|
#define bFM3_EXBUS_MODE0_RDY *((volatile unsigned int*)(0x427E0018UL))
|
|
#define bFM3_EXBUS_MODE0_SHRTDOUT *((volatile unsigned int*)(0x427E001CUL))
|
|
#define bFM3_EXBUS_MODE0_MPXMODE *((volatile unsigned int*)(0x427E0020UL))
|
|
#define bFM3_EXBUS_MODE0_ALEINV *((volatile unsigned int*)(0x427E0024UL))
|
|
#define bFM3_EXBUS_MODE0_MPXDOFF *((volatile unsigned int*)(0x427E002CUL))
|
|
#define bFM3_EXBUS_MODE0_MPXCSOF *((volatile unsigned int*)(0x427E0030UL))
|
|
#define bFM3_EXBUS_MODE0_MOEXEUP *((volatile unsigned int*)(0x427E0034UL))
|
|
#define bFM3_EXBUS_MODE1_WDTH0 *((volatile unsigned int*)(0x427E0080UL))
|
|
#define bFM3_EXBUS_MODE1_WDTH1 *((volatile unsigned int*)(0x427E0084UL))
|
|
#define bFM3_EXBUS_MODE1_RBMON *((volatile unsigned int*)(0x427E0088UL))
|
|
#define bFM3_EXBUS_MODE1_WEOFF *((volatile unsigned int*)(0x427E008CUL))
|
|
#define bFM3_EXBUS_MODE1_NAND *((volatile unsigned int*)(0x427E0090UL))
|
|
#define bFM3_EXBUS_MODE1_PAGE *((volatile unsigned int*)(0x427E0094UL))
|
|
#define bFM3_EXBUS_MODE1_RDY *((volatile unsigned int*)(0x427E0098UL))
|
|
#define bFM3_EXBUS_MODE1_SHRTDOUT *((volatile unsigned int*)(0x427E009CUL))
|
|
#define bFM3_EXBUS_MODE1_MPXMODE *((volatile unsigned int*)(0x427E00A0UL))
|
|
#define bFM3_EXBUS_MODE1_ALEINV *((volatile unsigned int*)(0x427E00A4UL))
|
|
#define bFM3_EXBUS_MODE1_MPXDOFF *((volatile unsigned int*)(0x427E00ACUL))
|
|
#define bFM3_EXBUS_MODE1_MPXCSOF *((volatile unsigned int*)(0x427E00B0UL))
|
|
#define bFM3_EXBUS_MODE1_MOEXEUP *((volatile unsigned int*)(0x427E00B4UL))
|
|
#define bFM3_EXBUS_MODE2_WDTH0 *((volatile unsigned int*)(0x427E0100UL))
|
|
#define bFM3_EXBUS_MODE2_WDTH1 *((volatile unsigned int*)(0x427E0104UL))
|
|
#define bFM3_EXBUS_MODE2_RBMON *((volatile unsigned int*)(0x427E0108UL))
|
|
#define bFM3_EXBUS_MODE2_WEOFF *((volatile unsigned int*)(0x427E010CUL))
|
|
#define bFM3_EXBUS_MODE2_NAND *((volatile unsigned int*)(0x427E0110UL))
|
|
#define bFM3_EXBUS_MODE2_PAGE *((volatile unsigned int*)(0x427E0114UL))
|
|
#define bFM3_EXBUS_MODE2_RDY *((volatile unsigned int*)(0x427E0118UL))
|
|
#define bFM3_EXBUS_MODE2_SHRTDOUT *((volatile unsigned int*)(0x427E011CUL))
|
|
#define bFM3_EXBUS_MODE2_MPXMODE *((volatile unsigned int*)(0x427E0120UL))
|
|
#define bFM3_EXBUS_MODE2_ALEINV *((volatile unsigned int*)(0x427E0124UL))
|
|
#define bFM3_EXBUS_MODE2_MPXDOFF *((volatile unsigned int*)(0x427E012CUL))
|
|
#define bFM3_EXBUS_MODE2_MPXCSOF *((volatile unsigned int*)(0x427E0130UL))
|
|
#define bFM3_EXBUS_MODE2_MOEXEUP *((volatile unsigned int*)(0x427E0134UL))
|
|
#define bFM3_EXBUS_MODE3_WDTH0 *((volatile unsigned int*)(0x427E0180UL))
|
|
#define bFM3_EXBUS_MODE3_WDTH1 *((volatile unsigned int*)(0x427E0184UL))
|
|
#define bFM3_EXBUS_MODE3_RBMON *((volatile unsigned int*)(0x427E0188UL))
|
|
#define bFM3_EXBUS_MODE3_WEOFF *((volatile unsigned int*)(0x427E018CUL))
|
|
#define bFM3_EXBUS_MODE3_NAND *((volatile unsigned int*)(0x427E0190UL))
|
|
#define bFM3_EXBUS_MODE3_PAGE *((volatile unsigned int*)(0x427E0194UL))
|
|
#define bFM3_EXBUS_MODE3_RDY *((volatile unsigned int*)(0x427E0198UL))
|
|
#define bFM3_EXBUS_MODE3_SHRTDOUT *((volatile unsigned int*)(0x427E019CUL))
|
|
#define bFM3_EXBUS_MODE3_MPXMODE *((volatile unsigned int*)(0x427E01A0UL))
|
|
#define bFM3_EXBUS_MODE3_ALEINV *((volatile unsigned int*)(0x427E01A4UL))
|
|
#define bFM3_EXBUS_MODE3_MPXDOFF *((volatile unsigned int*)(0x427E01ACUL))
|
|
#define bFM3_EXBUS_MODE3_MPXCSOF *((volatile unsigned int*)(0x427E01B0UL))
|
|
#define bFM3_EXBUS_MODE3_MOEXEUP *((volatile unsigned int*)(0x427E01B4UL))
|
|
#define bFM3_EXBUS_MODE4_WDTH0 *((volatile unsigned int*)(0x427E0200UL))
|
|
#define bFM3_EXBUS_MODE4_WDTH1 *((volatile unsigned int*)(0x427E0204UL))
|
|
#define bFM3_EXBUS_MODE4_RBMON *((volatile unsigned int*)(0x427E0208UL))
|
|
#define bFM3_EXBUS_MODE4_WEOFF *((volatile unsigned int*)(0x427E020CUL))
|
|
#define bFM3_EXBUS_MODE4_NAND *((volatile unsigned int*)(0x427E0210UL))
|
|
#define bFM3_EXBUS_MODE4_PAGE *((volatile unsigned int*)(0x427E0214UL))
|
|
#define bFM3_EXBUS_MODE4_RDY *((volatile unsigned int*)(0x427E0218UL))
|
|
#define bFM3_EXBUS_MODE4_SHRTDOUT *((volatile unsigned int*)(0x427E021CUL))
|
|
#define bFM3_EXBUS_MODE4_MPXMODE *((volatile unsigned int*)(0x427E0220UL))
|
|
#define bFM3_EXBUS_MODE4_ALEINV *((volatile unsigned int*)(0x427E0224UL))
|
|
#define bFM3_EXBUS_MODE4_MPXDOFF *((volatile unsigned int*)(0x427E022CUL))
|
|
#define bFM3_EXBUS_MODE4_MPXCSOF *((volatile unsigned int*)(0x427E0230UL))
|
|
#define bFM3_EXBUS_MODE4_MOEXEUP *((volatile unsigned int*)(0x427E0234UL))
|
|
#define bFM3_EXBUS_MODE5_WDTH0 *((volatile unsigned int*)(0x427E0280UL))
|
|
#define bFM3_EXBUS_MODE5_WDTH1 *((volatile unsigned int*)(0x427E0284UL))
|
|
#define bFM3_EXBUS_MODE5_RBMON *((volatile unsigned int*)(0x427E0288UL))
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#define bFM3_EXBUS_MODE5_WEOFF *((volatile unsigned int*)(0x427E028CUL))
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#define bFM3_EXBUS_MODE5_NAND *((volatile unsigned int*)(0x427E0290UL))
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#define bFM3_EXBUS_MODE5_PAGE *((volatile unsigned int*)(0x427E0294UL))
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#define bFM3_EXBUS_MODE5_RDY *((volatile unsigned int*)(0x427E0298UL))
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#define bFM3_EXBUS_MODE5_SHRTDOUT *((volatile unsigned int*)(0x427E029CUL))
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#define bFM3_EXBUS_MODE5_MPXMODE *((volatile unsigned int*)(0x427E02A0UL))
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#define bFM3_EXBUS_MODE5_ALEINV *((volatile unsigned int*)(0x427E02A4UL))
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#define bFM3_EXBUS_MODE5_MPXDOFF *((volatile unsigned int*)(0x427E02ACUL))
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#define bFM3_EXBUS_MODE5_MPXCSOF *((volatile unsigned int*)(0x427E02B0UL))
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#define bFM3_EXBUS_MODE5_MOEXEUP *((volatile unsigned int*)(0x427E02B4UL))
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#define bFM3_EXBUS_MODE6_WDTH0 *((volatile unsigned int*)(0x427E0300UL))
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#define bFM3_EXBUS_MODE6_WDTH1 *((volatile unsigned int*)(0x427E0304UL))
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#define bFM3_EXBUS_MODE6_RBMON *((volatile unsigned int*)(0x427E0308UL))
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#define bFM3_EXBUS_MODE6_WEOFF *((volatile unsigned int*)(0x427E030CUL))
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#define bFM3_EXBUS_MODE6_NAND *((volatile unsigned int*)(0x427E0310UL))
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#define bFM3_EXBUS_MODE6_PAGE *((volatile unsigned int*)(0x427E0314UL))
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#define bFM3_EXBUS_MODE6_RDY *((volatile unsigned int*)(0x427E0318UL))
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#define bFM3_EXBUS_MODE6_SHRTDOUT *((volatile unsigned int*)(0x427E031CUL))
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#define bFM3_EXBUS_MODE6_MPXMODE *((volatile unsigned int*)(0x427E0320UL))
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#define bFM3_EXBUS_MODE6_ALEINV *((volatile unsigned int*)(0x427E0324UL))
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#define bFM3_EXBUS_MODE6_MPXDOFF *((volatile unsigned int*)(0x427E032CUL))
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#define bFM3_EXBUS_MODE6_MPXCSOF *((volatile unsigned int*)(0x427E0330UL))
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#define bFM3_EXBUS_MODE6_MOEXEUP *((volatile unsigned int*)(0x427E0334UL))
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#define bFM3_EXBUS_MODE7_WDTH0 *((volatile unsigned int*)(0x427E0380UL))
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#define bFM3_EXBUS_MODE7_WDTH1 *((volatile unsigned int*)(0x427E0384UL))
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#define bFM3_EXBUS_MODE7_RBMON *((volatile unsigned int*)(0x427E0388UL))
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#define bFM3_EXBUS_MODE7_WEOFF *((volatile unsigned int*)(0x427E038CUL))
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#define bFM3_EXBUS_MODE7_NAND *((volatile unsigned int*)(0x427E0390UL))
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#define bFM3_EXBUS_MODE7_PAGE *((volatile unsigned int*)(0x427E0394UL))
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#define bFM3_EXBUS_MODE7_RDY *((volatile unsigned int*)(0x427E0398UL))
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#define bFM3_EXBUS_MODE7_SHRTDOUT *((volatile unsigned int*)(0x427E039CUL))
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#define bFM3_EXBUS_MODE7_MPXMODE *((volatile unsigned int*)(0x427E03A0UL))
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#define bFM3_EXBUS_MODE7_ALEINV *((volatile unsigned int*)(0x427E03A4UL))
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#define bFM3_EXBUS_MODE7_MPXDOFF *((volatile unsigned int*)(0x427E03ACUL))
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#define bFM3_EXBUS_MODE7_MPXCSOF *((volatile unsigned int*)(0x427E03B0UL))
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#define bFM3_EXBUS_MODE7_MOEXEUP *((volatile unsigned int*)(0x427E03B4UL))
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#define bFM3_EXBUS_TIM0_RACC0 *((volatile unsigned int*)(0x427E0400UL))
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#define bFM3_EXBUS_TIM0_RACC1 *((volatile unsigned int*)(0x427E0404UL))
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#define bFM3_EXBUS_TIM0_RACC2 *((volatile unsigned int*)(0x427E0408UL))
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#define bFM3_EXBUS_TIM0_RACC3 *((volatile unsigned int*)(0x427E040CUL))
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#define bFM3_EXBUS_TIM0_RADC0 *((volatile unsigned int*)(0x427E0410UL))
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#define bFM3_EXBUS_TIM0_RADC1 *((volatile unsigned int*)(0x427E0414UL))
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#define bFM3_EXBUS_TIM0_RADC2 *((volatile unsigned int*)(0x427E0418UL))
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#define bFM3_EXBUS_TIM0_RADC3 *((volatile unsigned int*)(0x427E041CUL))
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#define bFM3_EXBUS_TIM0_FRADC0 *((volatile unsigned int*)(0x427E0420UL))
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#define bFM3_EXBUS_TIM0_FRADC1 *((volatile unsigned int*)(0x427E0424UL))
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#define bFM3_EXBUS_TIM0_FRADC2 *((volatile unsigned int*)(0x427E0428UL))
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#define bFM3_EXBUS_TIM0_FRADC3 *((volatile unsigned int*)(0x427E042CUL))
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#define bFM3_EXBUS_TIM0_RIDLC0 *((volatile unsigned int*)(0x427E0430UL))
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#define bFM3_EXBUS_TIM0_RIDLC1 *((volatile unsigned int*)(0x427E0434UL))
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#define bFM3_EXBUS_TIM0_RIDLC2 *((volatile unsigned int*)(0x427E0438UL))
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#define bFM3_EXBUS_TIM0_RIDLC3 *((volatile unsigned int*)(0x427E043CUL))
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#define bFM3_EXBUS_TIM0_WACC0 *((volatile unsigned int*)(0x427E0440UL))
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#define bFM3_EXBUS_TIM0_WACC1 *((volatile unsigned int*)(0x427E0444UL))
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#define bFM3_EXBUS_TIM0_WACC2 *((volatile unsigned int*)(0x427E0448UL))
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#define bFM3_EXBUS_TIM0_WACC3 *((volatile unsigned int*)(0x427E044CUL))
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#define bFM3_EXBUS_TIM0_WADC0 *((volatile unsigned int*)(0x427E0450UL))
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#define bFM3_EXBUS_TIM0_WADC1 *((volatile unsigned int*)(0x427E0454UL))
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#define bFM3_EXBUS_TIM0_WADC2 *((volatile unsigned int*)(0x427E0458UL))
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#define bFM3_EXBUS_TIM0_WADC3 *((volatile unsigned int*)(0x427E045CUL))
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#define bFM3_EXBUS_TIM0_WWEC0 *((volatile unsigned int*)(0x427E0460UL))
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#define bFM3_EXBUS_TIM0_WWEC1 *((volatile unsigned int*)(0x427E0464UL))
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#define bFM3_EXBUS_TIM0_WWEC2 *((volatile unsigned int*)(0x427E0468UL))
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#define bFM3_EXBUS_TIM0_WWEC3 *((volatile unsigned int*)(0x427E046CUL))
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#define bFM3_EXBUS_TIM0_WIDLC0 *((volatile unsigned int*)(0x427E0470UL))
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#define bFM3_EXBUS_TIM0_WIDLC1 *((volatile unsigned int*)(0x427E0474UL))
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#define bFM3_EXBUS_TIM0_WIDLC2 *((volatile unsigned int*)(0x427E0478UL))
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#define bFM3_EXBUS_TIM0_WIDLC3 *((volatile unsigned int*)(0x427E047CUL))
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#define bFM3_EXBUS_TIM1_RACC0 *((volatile unsigned int*)(0x427E0480UL))
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#define bFM3_EXBUS_TIM1_RACC1 *((volatile unsigned int*)(0x427E0484UL))
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#define bFM3_EXBUS_TIM1_RACC2 *((volatile unsigned int*)(0x427E0488UL))
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|
#define bFM3_EXBUS_TIM1_RACC3 *((volatile unsigned int*)(0x427E048CUL))
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|
#define bFM3_EXBUS_TIM1_RADC0 *((volatile unsigned int*)(0x427E0490UL))
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#define bFM3_EXBUS_TIM1_RADC1 *((volatile unsigned int*)(0x427E0494UL))
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|
#define bFM3_EXBUS_TIM1_RADC2 *((volatile unsigned int*)(0x427E0498UL))
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#define bFM3_EXBUS_TIM1_RADC3 *((volatile unsigned int*)(0x427E049CUL))
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#define bFM3_EXBUS_TIM1_FRADC0 *((volatile unsigned int*)(0x427E04A0UL))
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|
#define bFM3_EXBUS_TIM1_FRADC1 *((volatile unsigned int*)(0x427E04A4UL))
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|
#define bFM3_EXBUS_TIM1_FRADC2 *((volatile unsigned int*)(0x427E04A8UL))
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|
#define bFM3_EXBUS_TIM1_FRADC3 *((volatile unsigned int*)(0x427E04ACUL))
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|
#define bFM3_EXBUS_TIM1_RIDLC0 *((volatile unsigned int*)(0x427E04B0UL))
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|
#define bFM3_EXBUS_TIM1_RIDLC1 *((volatile unsigned int*)(0x427E04B4UL))
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|
#define bFM3_EXBUS_TIM1_RIDLC2 *((volatile unsigned int*)(0x427E04B8UL))
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|
#define bFM3_EXBUS_TIM1_RIDLC3 *((volatile unsigned int*)(0x427E04BCUL))
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|
#define bFM3_EXBUS_TIM1_WACC0 *((volatile unsigned int*)(0x427E04C0UL))
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|
#define bFM3_EXBUS_TIM1_WACC1 *((volatile unsigned int*)(0x427E04C4UL))
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|
#define bFM3_EXBUS_TIM1_WACC2 *((volatile unsigned int*)(0x427E04C8UL))
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|
#define bFM3_EXBUS_TIM1_WACC3 *((volatile unsigned int*)(0x427E04CCUL))
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|
#define bFM3_EXBUS_TIM1_WADC0 *((volatile unsigned int*)(0x427E04D0UL))
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#define bFM3_EXBUS_TIM1_WADC1 *((volatile unsigned int*)(0x427E04D4UL))
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#define bFM3_EXBUS_TIM1_WADC2 *((volatile unsigned int*)(0x427E04D8UL))
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#define bFM3_EXBUS_TIM1_WADC3 *((volatile unsigned int*)(0x427E04DCUL))
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#define bFM3_EXBUS_TIM1_WWEC0 *((volatile unsigned int*)(0x427E04E0UL))
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#define bFM3_EXBUS_TIM1_WWEC1 *((volatile unsigned int*)(0x427E04E4UL))
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#define bFM3_EXBUS_TIM1_WWEC2 *((volatile unsigned int*)(0x427E04E8UL))
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#define bFM3_EXBUS_TIM1_WWEC3 *((volatile unsigned int*)(0x427E04ECUL))
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#define bFM3_EXBUS_TIM1_WIDLC0 *((volatile unsigned int*)(0x427E04F0UL))
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#define bFM3_EXBUS_TIM1_WIDLC1 *((volatile unsigned int*)(0x427E04F4UL))
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#define bFM3_EXBUS_TIM1_WIDLC2 *((volatile unsigned int*)(0x427E04F8UL))
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#define bFM3_EXBUS_TIM1_WIDLC3 *((volatile unsigned int*)(0x427E04FCUL))
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#define bFM3_EXBUS_TIM2_RACC0 *((volatile unsigned int*)(0x427E0500UL))
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#define bFM3_EXBUS_TIM2_RACC1 *((volatile unsigned int*)(0x427E0504UL))
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#define bFM3_EXBUS_TIM2_RACC2 *((volatile unsigned int*)(0x427E0508UL))
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#define bFM3_EXBUS_TIM2_RACC3 *((volatile unsigned int*)(0x427E050CUL))
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#define bFM3_EXBUS_TIM2_RADC0 *((volatile unsigned int*)(0x427E0510UL))
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#define bFM3_EXBUS_TIM2_RADC1 *((volatile unsigned int*)(0x427E0514UL))
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#define bFM3_EXBUS_TIM2_RADC2 *((volatile unsigned int*)(0x427E0518UL))
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#define bFM3_EXBUS_TIM2_RADC3 *((volatile unsigned int*)(0x427E051CUL))
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#define bFM3_EXBUS_TIM2_FRADC0 *((volatile unsigned int*)(0x427E0520UL))
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#define bFM3_EXBUS_TIM2_FRADC1 *((volatile unsigned int*)(0x427E0524UL))
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|
#define bFM3_EXBUS_TIM2_FRADC2 *((volatile unsigned int*)(0x427E0528UL))
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|
#define bFM3_EXBUS_TIM2_FRADC3 *((volatile unsigned int*)(0x427E052CUL))
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|
#define bFM3_EXBUS_TIM2_RIDLC0 *((volatile unsigned int*)(0x427E0530UL))
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#define bFM3_EXBUS_TIM2_RIDLC1 *((volatile unsigned int*)(0x427E0534UL))
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|
#define bFM3_EXBUS_TIM2_RIDLC2 *((volatile unsigned int*)(0x427E0538UL))
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|
#define bFM3_EXBUS_TIM2_RIDLC3 *((volatile unsigned int*)(0x427E053CUL))
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|
#define bFM3_EXBUS_TIM2_WACC0 *((volatile unsigned int*)(0x427E0540UL))
|
|
#define bFM3_EXBUS_TIM2_WACC1 *((volatile unsigned int*)(0x427E0544UL))
|
|
#define bFM3_EXBUS_TIM2_WACC2 *((volatile unsigned int*)(0x427E0548UL))
|
|
#define bFM3_EXBUS_TIM2_WACC3 *((volatile unsigned int*)(0x427E054CUL))
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|
#define bFM3_EXBUS_TIM2_WADC0 *((volatile unsigned int*)(0x427E0550UL))
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#define bFM3_EXBUS_TIM2_WADC1 *((volatile unsigned int*)(0x427E0554UL))
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|
#define bFM3_EXBUS_TIM2_WADC2 *((volatile unsigned int*)(0x427E0558UL))
|
|
#define bFM3_EXBUS_TIM2_WADC3 *((volatile unsigned int*)(0x427E055CUL))
|
|
#define bFM3_EXBUS_TIM2_WWEC0 *((volatile unsigned int*)(0x427E0560UL))
|
|
#define bFM3_EXBUS_TIM2_WWEC1 *((volatile unsigned int*)(0x427E0564UL))
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|
#define bFM3_EXBUS_TIM2_WWEC2 *((volatile unsigned int*)(0x427E0568UL))
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|
#define bFM3_EXBUS_TIM2_WWEC3 *((volatile unsigned int*)(0x427E056CUL))
|
|
#define bFM3_EXBUS_TIM2_WIDLC0 *((volatile unsigned int*)(0x427E0570UL))
|
|
#define bFM3_EXBUS_TIM2_WIDLC1 *((volatile unsigned int*)(0x427E0574UL))
|
|
#define bFM3_EXBUS_TIM2_WIDLC2 *((volatile unsigned int*)(0x427E0578UL))
|
|
#define bFM3_EXBUS_TIM2_WIDLC3 *((volatile unsigned int*)(0x427E057CUL))
|
|
#define bFM3_EXBUS_TIM3_RACC0 *((volatile unsigned int*)(0x427E0580UL))
|
|
#define bFM3_EXBUS_TIM3_RACC1 *((volatile unsigned int*)(0x427E0584UL))
|
|
#define bFM3_EXBUS_TIM3_RACC2 *((volatile unsigned int*)(0x427E0588UL))
|
|
#define bFM3_EXBUS_TIM3_RACC3 *((volatile unsigned int*)(0x427E058CUL))
|
|
#define bFM3_EXBUS_TIM3_RADC0 *((volatile unsigned int*)(0x427E0590UL))
|
|
#define bFM3_EXBUS_TIM3_RADC1 *((volatile unsigned int*)(0x427E0594UL))
|
|
#define bFM3_EXBUS_TIM3_RADC2 *((volatile unsigned int*)(0x427E0598UL))
|
|
#define bFM3_EXBUS_TIM3_RADC3 *((volatile unsigned int*)(0x427E059CUL))
|
|
#define bFM3_EXBUS_TIM3_FRADC0 *((volatile unsigned int*)(0x427E05A0UL))
|
|
#define bFM3_EXBUS_TIM3_FRADC1 *((volatile unsigned int*)(0x427E05A4UL))
|
|
#define bFM3_EXBUS_TIM3_FRADC2 *((volatile unsigned int*)(0x427E05A8UL))
|
|
#define bFM3_EXBUS_TIM3_FRADC3 *((volatile unsigned int*)(0x427E05ACUL))
|
|
#define bFM3_EXBUS_TIM3_RIDLC0 *((volatile unsigned int*)(0x427E05B0UL))
|
|
#define bFM3_EXBUS_TIM3_RIDLC1 *((volatile unsigned int*)(0x427E05B4UL))
|
|
#define bFM3_EXBUS_TIM3_RIDLC2 *((volatile unsigned int*)(0x427E05B8UL))
|
|
#define bFM3_EXBUS_TIM3_RIDLC3 *((volatile unsigned int*)(0x427E05BCUL))
|
|
#define bFM3_EXBUS_TIM3_WACC0 *((volatile unsigned int*)(0x427E05C0UL))
|
|
#define bFM3_EXBUS_TIM3_WACC1 *((volatile unsigned int*)(0x427E05C4UL))
|
|
#define bFM3_EXBUS_TIM3_WACC2 *((volatile unsigned int*)(0x427E05C8UL))
|
|
#define bFM3_EXBUS_TIM3_WACC3 *((volatile unsigned int*)(0x427E05CCUL))
|
|
#define bFM3_EXBUS_TIM3_WADC0 *((volatile unsigned int*)(0x427E05D0UL))
|
|
#define bFM3_EXBUS_TIM3_WADC1 *((volatile unsigned int*)(0x427E05D4UL))
|
|
#define bFM3_EXBUS_TIM3_WADC2 *((volatile unsigned int*)(0x427E05D8UL))
|
|
#define bFM3_EXBUS_TIM3_WADC3 *((volatile unsigned int*)(0x427E05DCUL))
|
|
#define bFM3_EXBUS_TIM3_WWEC0 *((volatile unsigned int*)(0x427E05E0UL))
|
|
#define bFM3_EXBUS_TIM3_WWEC1 *((volatile unsigned int*)(0x427E05E4UL))
|
|
#define bFM3_EXBUS_TIM3_WWEC2 *((volatile unsigned int*)(0x427E05E8UL))
|
|
#define bFM3_EXBUS_TIM3_WWEC3 *((volatile unsigned int*)(0x427E05ECUL))
|
|
#define bFM3_EXBUS_TIM3_WIDLC0 *((volatile unsigned int*)(0x427E05F0UL))
|
|
#define bFM3_EXBUS_TIM3_WIDLC1 *((volatile unsigned int*)(0x427E05F4UL))
|
|
#define bFM3_EXBUS_TIM3_WIDLC2 *((volatile unsigned int*)(0x427E05F8UL))
|
|
#define bFM3_EXBUS_TIM3_WIDLC3 *((volatile unsigned int*)(0x427E05FCUL))
|
|
#define bFM3_EXBUS_TIM4_RACC0 *((volatile unsigned int*)(0x427E0600UL))
|
|
#define bFM3_EXBUS_TIM4_RACC1 *((volatile unsigned int*)(0x427E0604UL))
|
|
#define bFM3_EXBUS_TIM4_RACC2 *((volatile unsigned int*)(0x427E0608UL))
|
|
#define bFM3_EXBUS_TIM4_RACC3 *((volatile unsigned int*)(0x427E060CUL))
|
|
#define bFM3_EXBUS_TIM4_RADC0 *((volatile unsigned int*)(0x427E0610UL))
|
|
#define bFM3_EXBUS_TIM4_RADC1 *((volatile unsigned int*)(0x427E0614UL))
|
|
#define bFM3_EXBUS_TIM4_RADC2 *((volatile unsigned int*)(0x427E0618UL))
|
|
#define bFM3_EXBUS_TIM4_RADC3 *((volatile unsigned int*)(0x427E061CUL))
|
|
#define bFM3_EXBUS_TIM4_FRADC0 *((volatile unsigned int*)(0x427E0620UL))
|
|
#define bFM3_EXBUS_TIM4_FRADC1 *((volatile unsigned int*)(0x427E0624UL))
|
|
#define bFM3_EXBUS_TIM4_FRADC2 *((volatile unsigned int*)(0x427E0628UL))
|
|
#define bFM3_EXBUS_TIM4_FRADC3 *((volatile unsigned int*)(0x427E062CUL))
|
|
#define bFM3_EXBUS_TIM4_RIDLC0 *((volatile unsigned int*)(0x427E0630UL))
|
|
#define bFM3_EXBUS_TIM4_RIDLC1 *((volatile unsigned int*)(0x427E0634UL))
|
|
#define bFM3_EXBUS_TIM4_RIDLC2 *((volatile unsigned int*)(0x427E0638UL))
|
|
#define bFM3_EXBUS_TIM4_RIDLC3 *((volatile unsigned int*)(0x427E063CUL))
|
|
#define bFM3_EXBUS_TIM4_WACC0 *((volatile unsigned int*)(0x427E0640UL))
|
|
#define bFM3_EXBUS_TIM4_WACC1 *((volatile unsigned int*)(0x427E0644UL))
|
|
#define bFM3_EXBUS_TIM4_WACC2 *((volatile unsigned int*)(0x427E0648UL))
|
|
#define bFM3_EXBUS_TIM4_WACC3 *((volatile unsigned int*)(0x427E064CUL))
|
|
#define bFM3_EXBUS_TIM4_WADC0 *((volatile unsigned int*)(0x427E0650UL))
|
|
#define bFM3_EXBUS_TIM4_WADC1 *((volatile unsigned int*)(0x427E0654UL))
|
|
#define bFM3_EXBUS_TIM4_WADC2 *((volatile unsigned int*)(0x427E0658UL))
|
|
#define bFM3_EXBUS_TIM4_WADC3 *((volatile unsigned int*)(0x427E065CUL))
|
|
#define bFM3_EXBUS_TIM4_WWEC0 *((volatile unsigned int*)(0x427E0660UL))
|
|
#define bFM3_EXBUS_TIM4_WWEC1 *((volatile unsigned int*)(0x427E0664UL))
|
|
#define bFM3_EXBUS_TIM4_WWEC2 *((volatile unsigned int*)(0x427E0668UL))
|
|
#define bFM3_EXBUS_TIM4_WWEC3 *((volatile unsigned int*)(0x427E066CUL))
|
|
#define bFM3_EXBUS_TIM4_WIDLC0 *((volatile unsigned int*)(0x427E0670UL))
|
|
#define bFM3_EXBUS_TIM4_WIDLC1 *((volatile unsigned int*)(0x427E0674UL))
|
|
#define bFM3_EXBUS_TIM4_WIDLC2 *((volatile unsigned int*)(0x427E0678UL))
|
|
#define bFM3_EXBUS_TIM4_WIDLC3 *((volatile unsigned int*)(0x427E067CUL))
|
|
#define bFM3_EXBUS_TIM5_RACC0 *((volatile unsigned int*)(0x427E0680UL))
|
|
#define bFM3_EXBUS_TIM5_RACC1 *((volatile unsigned int*)(0x427E0684UL))
|
|
#define bFM3_EXBUS_TIM5_RACC2 *((volatile unsigned int*)(0x427E0688UL))
|
|
#define bFM3_EXBUS_TIM5_RACC3 *((volatile unsigned int*)(0x427E068CUL))
|
|
#define bFM3_EXBUS_TIM5_RADC0 *((volatile unsigned int*)(0x427E0690UL))
|
|
#define bFM3_EXBUS_TIM5_RADC1 *((volatile unsigned int*)(0x427E0694UL))
|
|
#define bFM3_EXBUS_TIM5_RADC2 *((volatile unsigned int*)(0x427E0698UL))
|
|
#define bFM3_EXBUS_TIM5_RADC3 *((volatile unsigned int*)(0x427E069CUL))
|
|
#define bFM3_EXBUS_TIM5_FRADC0 *((volatile unsigned int*)(0x427E06A0UL))
|
|
#define bFM3_EXBUS_TIM5_FRADC1 *((volatile unsigned int*)(0x427E06A4UL))
|
|
#define bFM3_EXBUS_TIM5_FRADC2 *((volatile unsigned int*)(0x427E06A8UL))
|
|
#define bFM3_EXBUS_TIM5_FRADC3 *((volatile unsigned int*)(0x427E06ACUL))
|
|
#define bFM3_EXBUS_TIM5_RIDLC0 *((volatile unsigned int*)(0x427E06B0UL))
|
|
#define bFM3_EXBUS_TIM5_RIDLC1 *((volatile unsigned int*)(0x427E06B4UL))
|
|
#define bFM3_EXBUS_TIM5_RIDLC2 *((volatile unsigned int*)(0x427E06B8UL))
|
|
#define bFM3_EXBUS_TIM5_RIDLC3 *((volatile unsigned int*)(0x427E06BCUL))
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#define bFM3_EXBUS_TIM5_WACC0 *((volatile unsigned int*)(0x427E06C0UL))
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#define bFM3_EXBUS_TIM5_WACC1 *((volatile unsigned int*)(0x427E06C4UL))
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#define bFM3_EXBUS_TIM5_WACC2 *((volatile unsigned int*)(0x427E06C8UL))
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#define bFM3_EXBUS_TIM5_WACC3 *((volatile unsigned int*)(0x427E06CCUL))
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#define bFM3_EXBUS_TIM5_WADC0 *((volatile unsigned int*)(0x427E06D0UL))
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#define bFM3_EXBUS_TIM5_WADC1 *((volatile unsigned int*)(0x427E06D4UL))
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#define bFM3_EXBUS_TIM5_WADC2 *((volatile unsigned int*)(0x427E06D8UL))
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#define bFM3_EXBUS_TIM5_WADC3 *((volatile unsigned int*)(0x427E06DCUL))
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#define bFM3_EXBUS_TIM5_WWEC0 *((volatile unsigned int*)(0x427E06E0UL))
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#define bFM3_EXBUS_TIM5_WWEC1 *((volatile unsigned int*)(0x427E06E4UL))
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#define bFM3_EXBUS_TIM5_WWEC2 *((volatile unsigned int*)(0x427E06E8UL))
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#define bFM3_EXBUS_TIM5_WWEC3 *((volatile unsigned int*)(0x427E06ECUL))
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#define bFM3_EXBUS_TIM5_WIDLC0 *((volatile unsigned int*)(0x427E06F0UL))
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#define bFM3_EXBUS_TIM5_WIDLC1 *((volatile unsigned int*)(0x427E06F4UL))
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#define bFM3_EXBUS_TIM5_WIDLC2 *((volatile unsigned int*)(0x427E06F8UL))
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#define bFM3_EXBUS_TIM5_WIDLC3 *((volatile unsigned int*)(0x427E06FCUL))
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#define bFM3_EXBUS_TIM6_RACC0 *((volatile unsigned int*)(0x427E0700UL))
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#define bFM3_EXBUS_TIM6_RACC1 *((volatile unsigned int*)(0x427E0704UL))
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#define bFM3_EXBUS_TIM6_RACC2 *((volatile unsigned int*)(0x427E0708UL))
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#define bFM3_EXBUS_TIM6_RACC3 *((volatile unsigned int*)(0x427E070CUL))
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#define bFM3_EXBUS_TIM6_RADC0 *((volatile unsigned int*)(0x427E0710UL))
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#define bFM3_EXBUS_TIM6_RADC1 *((volatile unsigned int*)(0x427E0714UL))
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#define bFM3_EXBUS_TIM6_RADC2 *((volatile unsigned int*)(0x427E0718UL))
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#define bFM3_EXBUS_TIM6_RADC3 *((volatile unsigned int*)(0x427E071CUL))
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#define bFM3_EXBUS_TIM6_FRADC0 *((volatile unsigned int*)(0x427E0720UL))
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#define bFM3_EXBUS_TIM6_FRADC1 *((volatile unsigned int*)(0x427E0724UL))
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#define bFM3_EXBUS_TIM6_FRADC2 *((volatile unsigned int*)(0x427E0728UL))
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#define bFM3_EXBUS_TIM6_FRADC3 *((volatile unsigned int*)(0x427E072CUL))
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#define bFM3_EXBUS_TIM6_RIDLC0 *((volatile unsigned int*)(0x427E0730UL))
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#define bFM3_EXBUS_TIM6_RIDLC1 *((volatile unsigned int*)(0x427E0734UL))
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#define bFM3_EXBUS_TIM6_RIDLC2 *((volatile unsigned int*)(0x427E0738UL))
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#define bFM3_EXBUS_TIM6_RIDLC3 *((volatile unsigned int*)(0x427E073CUL))
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#define bFM3_EXBUS_TIM6_WACC0 *((volatile unsigned int*)(0x427E0740UL))
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#define bFM3_EXBUS_TIM6_WACC1 *((volatile unsigned int*)(0x427E0744UL))
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#define bFM3_EXBUS_TIM6_WACC2 *((volatile unsigned int*)(0x427E0748UL))
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#define bFM3_EXBUS_TIM6_WACC3 *((volatile unsigned int*)(0x427E074CUL))
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#define bFM3_EXBUS_TIM6_WADC0 *((volatile unsigned int*)(0x427E0750UL))
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#define bFM3_EXBUS_TIM6_WADC1 *((volatile unsigned int*)(0x427E0754UL))
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#define bFM3_EXBUS_TIM6_WADC2 *((volatile unsigned int*)(0x427E0758UL))
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#define bFM3_EXBUS_TIM6_WADC3 *((volatile unsigned int*)(0x427E075CUL))
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#define bFM3_EXBUS_TIM6_WWEC0 *((volatile unsigned int*)(0x427E0760UL))
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#define bFM3_EXBUS_TIM6_WWEC1 *((volatile unsigned int*)(0x427E0764UL))
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#define bFM3_EXBUS_TIM6_WWEC2 *((volatile unsigned int*)(0x427E0768UL))
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#define bFM3_EXBUS_TIM6_WWEC3 *((volatile unsigned int*)(0x427E076CUL))
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#define bFM3_EXBUS_TIM6_WIDLC0 *((volatile unsigned int*)(0x427E0770UL))
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#define bFM3_EXBUS_TIM6_WIDLC1 *((volatile unsigned int*)(0x427E0774UL))
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#define bFM3_EXBUS_TIM6_WIDLC2 *((volatile unsigned int*)(0x427E0778UL))
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#define bFM3_EXBUS_TIM6_WIDLC3 *((volatile unsigned int*)(0x427E077CUL))
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#define bFM3_EXBUS_TIM7_RACC0 *((volatile unsigned int*)(0x427E0780UL))
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#define bFM3_EXBUS_TIM7_RACC1 *((volatile unsigned int*)(0x427E0784UL))
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#define bFM3_EXBUS_TIM7_RACC2 *((volatile unsigned int*)(0x427E0788UL))
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#define bFM3_EXBUS_TIM7_RACC3 *((volatile unsigned int*)(0x427E078CUL))
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#define bFM3_EXBUS_TIM7_RADC0 *((volatile unsigned int*)(0x427E0790UL))
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#define bFM3_EXBUS_TIM7_RADC1 *((volatile unsigned int*)(0x427E0794UL))
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#define bFM3_EXBUS_TIM7_RADC2 *((volatile unsigned int*)(0x427E0798UL))
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#define bFM3_EXBUS_TIM7_RADC3 *((volatile unsigned int*)(0x427E079CUL))
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#define bFM3_EXBUS_TIM7_FRADC0 *((volatile unsigned int*)(0x427E07A0UL))
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#define bFM3_EXBUS_TIM7_FRADC1 *((volatile unsigned int*)(0x427E07A4UL))
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#define bFM3_EXBUS_TIM7_FRADC2 *((volatile unsigned int*)(0x427E07A8UL))
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#define bFM3_EXBUS_TIM7_FRADC3 *((volatile unsigned int*)(0x427E07ACUL))
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#define bFM3_EXBUS_TIM7_RIDLC0 *((volatile unsigned int*)(0x427E07B0UL))
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#define bFM3_EXBUS_TIM7_RIDLC1 *((volatile unsigned int*)(0x427E07B4UL))
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#define bFM3_EXBUS_TIM7_RIDLC2 *((volatile unsigned int*)(0x427E07B8UL))
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#define bFM3_EXBUS_TIM7_RIDLC3 *((volatile unsigned int*)(0x427E07BCUL))
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#define bFM3_EXBUS_TIM7_WACC0 *((volatile unsigned int*)(0x427E07C0UL))
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#define bFM3_EXBUS_TIM7_WACC1 *((volatile unsigned int*)(0x427E07C4UL))
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#define bFM3_EXBUS_TIM7_WACC2 *((volatile unsigned int*)(0x427E07C8UL))
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#define bFM3_EXBUS_TIM7_WACC3 *((volatile unsigned int*)(0x427E07CCUL))
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#define bFM3_EXBUS_TIM7_WADC0 *((volatile unsigned int*)(0x427E07D0UL))
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#define bFM3_EXBUS_TIM7_WADC1 *((volatile unsigned int*)(0x427E07D4UL))
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#define bFM3_EXBUS_TIM7_WADC2 *((volatile unsigned int*)(0x427E07D8UL))
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#define bFM3_EXBUS_TIM7_WADC3 *((volatile unsigned int*)(0x427E07DCUL))
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#define bFM3_EXBUS_TIM7_WWEC0 *((volatile unsigned int*)(0x427E07E0UL))
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#define bFM3_EXBUS_TIM7_WWEC1 *((volatile unsigned int*)(0x427E07E4UL))
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#define bFM3_EXBUS_TIM7_WWEC2 *((volatile unsigned int*)(0x427E07E8UL))
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#define bFM3_EXBUS_TIM7_WWEC3 *((volatile unsigned int*)(0x427E07ECUL))
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#define bFM3_EXBUS_TIM7_WIDLC0 *((volatile unsigned int*)(0x427E07F0UL))
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#define bFM3_EXBUS_TIM7_WIDLC1 *((volatile unsigned int*)(0x427E07F4UL))
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#define bFM3_EXBUS_TIM7_WIDLC2 *((volatile unsigned int*)(0x427E07F8UL))
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#define bFM3_EXBUS_TIM7_WIDLC3 *((volatile unsigned int*)(0x427E07FCUL))
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#define bFM3_EXBUS_AREA0_ADDR0 *((volatile unsigned int*)(0x427E0800UL))
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#define bFM3_EXBUS_AREA0_ADDR1 *((volatile unsigned int*)(0x427E0804UL))
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#define bFM3_EXBUS_AREA0_ADDR2 *((volatile unsigned int*)(0x427E0808UL))
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#define bFM3_EXBUS_AREA0_ADDR3 *((volatile unsigned int*)(0x427E080CUL))
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#define bFM3_EXBUS_AREA0_ADDR4 *((volatile unsigned int*)(0x427E0810UL))
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#define bFM3_EXBUS_AREA0_ADDR5 *((volatile unsigned int*)(0x427E0814UL))
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#define bFM3_EXBUS_AREA0_ADDR6 *((volatile unsigned int*)(0x427E0818UL))
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#define bFM3_EXBUS_AREA0_ADDR7 *((volatile unsigned int*)(0x427E081CUL))
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#define bFM3_EXBUS_AREA0_MASK0 *((volatile unsigned int*)(0x427E0840UL))
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#define bFM3_EXBUS_AREA0_MASK1 *((volatile unsigned int*)(0x427E0844UL))
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#define bFM3_EXBUS_AREA0_MASK2 *((volatile unsigned int*)(0x427E0848UL))
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#define bFM3_EXBUS_AREA0_MASK3 *((volatile unsigned int*)(0x427E084CUL))
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#define bFM3_EXBUS_AREA0_MASK4 *((volatile unsigned int*)(0x427E0850UL))
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#define bFM3_EXBUS_AREA0_MASK5 *((volatile unsigned int*)(0x427E0854UL))
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#define bFM3_EXBUS_AREA0_MASK6 *((volatile unsigned int*)(0x427E0858UL))
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#define bFM3_EXBUS_AREA1_ADDR0 *((volatile unsigned int*)(0x427E0880UL))
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#define bFM3_EXBUS_AREA1_ADDR1 *((volatile unsigned int*)(0x427E0884UL))
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#define bFM3_EXBUS_AREA1_ADDR2 *((volatile unsigned int*)(0x427E0888UL))
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#define bFM3_EXBUS_AREA1_ADDR3 *((volatile unsigned int*)(0x427E088CUL))
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#define bFM3_EXBUS_AREA1_ADDR4 *((volatile unsigned int*)(0x427E0890UL))
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#define bFM3_EXBUS_AREA1_ADDR5 *((volatile unsigned int*)(0x427E0894UL))
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#define bFM3_EXBUS_AREA1_ADDR6 *((volatile unsigned int*)(0x427E0898UL))
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#define bFM3_EXBUS_AREA1_ADDR7 *((volatile unsigned int*)(0x427E089CUL))
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#define bFM3_EXBUS_AREA1_MASK0 *((volatile unsigned int*)(0x427E08C0UL))
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#define bFM3_EXBUS_AREA1_MASK1 *((volatile unsigned int*)(0x427E08C4UL))
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#define bFM3_EXBUS_AREA1_MASK2 *((volatile unsigned int*)(0x427E08C8UL))
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#define bFM3_EXBUS_AREA1_MASK3 *((volatile unsigned int*)(0x427E08CCUL))
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#define bFM3_EXBUS_AREA1_MASK4 *((volatile unsigned int*)(0x427E08D0UL))
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#define bFM3_EXBUS_AREA1_MASK5 *((volatile unsigned int*)(0x427E08D4UL))
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#define bFM3_EXBUS_AREA1_MASK6 *((volatile unsigned int*)(0x427E08D8UL))
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#define bFM3_EXBUS_AREA2_ADDR0 *((volatile unsigned int*)(0x427E0900UL))
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#define bFM3_EXBUS_AREA2_ADDR1 *((volatile unsigned int*)(0x427E0904UL))
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#define bFM3_EXBUS_AREA2_ADDR2 *((volatile unsigned int*)(0x427E0908UL))
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#define bFM3_EXBUS_AREA2_ADDR3 *((volatile unsigned int*)(0x427E090CUL))
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#define bFM3_EXBUS_AREA2_ADDR4 *((volatile unsigned int*)(0x427E0910UL))
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#define bFM3_EXBUS_AREA2_ADDR5 *((volatile unsigned int*)(0x427E0914UL))
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#define bFM3_EXBUS_AREA2_ADDR6 *((volatile unsigned int*)(0x427E0918UL))
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#define bFM3_EXBUS_AREA2_ADDR7 *((volatile unsigned int*)(0x427E091CUL))
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#define bFM3_EXBUS_AREA2_MASK0 *((volatile unsigned int*)(0x427E0940UL))
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#define bFM3_EXBUS_AREA2_MASK1 *((volatile unsigned int*)(0x427E0944UL))
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#define bFM3_EXBUS_AREA2_MASK2 *((volatile unsigned int*)(0x427E0948UL))
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#define bFM3_EXBUS_AREA2_MASK3 *((volatile unsigned int*)(0x427E094CUL))
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#define bFM3_EXBUS_AREA2_MASK4 *((volatile unsigned int*)(0x427E0950UL))
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#define bFM3_EXBUS_AREA2_MASK5 *((volatile unsigned int*)(0x427E0954UL))
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#define bFM3_EXBUS_AREA2_MASK6 *((volatile unsigned int*)(0x427E0958UL))
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#define bFM3_EXBUS_AREA3_ADDR0 *((volatile unsigned int*)(0x427E0980UL))
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#define bFM3_EXBUS_AREA3_ADDR1 *((volatile unsigned int*)(0x427E0984UL))
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#define bFM3_EXBUS_AREA3_ADDR2 *((volatile unsigned int*)(0x427E0988UL))
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#define bFM3_EXBUS_AREA3_ADDR3 *((volatile unsigned int*)(0x427E098CUL))
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#define bFM3_EXBUS_AREA3_ADDR4 *((volatile unsigned int*)(0x427E0990UL))
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#define bFM3_EXBUS_AREA3_ADDR5 *((volatile unsigned int*)(0x427E0994UL))
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#define bFM3_EXBUS_AREA3_ADDR6 *((volatile unsigned int*)(0x427E0998UL))
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#define bFM3_EXBUS_AREA3_ADDR7 *((volatile unsigned int*)(0x427E099CUL))
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#define bFM3_EXBUS_AREA3_MASK0 *((volatile unsigned int*)(0x427E09C0UL))
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#define bFM3_EXBUS_AREA3_MASK1 *((volatile unsigned int*)(0x427E09C4UL))
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#define bFM3_EXBUS_AREA3_MASK2 *((volatile unsigned int*)(0x427E09C8UL))
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#define bFM3_EXBUS_AREA3_MASK3 *((volatile unsigned int*)(0x427E09CCUL))
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#define bFM3_EXBUS_AREA3_MASK4 *((volatile unsigned int*)(0x427E09D0UL))
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#define bFM3_EXBUS_AREA3_MASK5 *((volatile unsigned int*)(0x427E09D4UL))
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#define bFM3_EXBUS_AREA3_MASK6 *((volatile unsigned int*)(0x427E09D8UL))
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#define bFM3_EXBUS_AREA4_ADDR0 *((volatile unsigned int*)(0x427E0A00UL))
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#define bFM3_EXBUS_AREA4_ADDR1 *((volatile unsigned int*)(0x427E0A04UL))
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#define bFM3_EXBUS_AREA4_ADDR2 *((volatile unsigned int*)(0x427E0A08UL))
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#define bFM3_EXBUS_AREA4_ADDR3 *((volatile unsigned int*)(0x427E0A0CUL))
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#define bFM3_EXBUS_AREA4_ADDR4 *((volatile unsigned int*)(0x427E0A10UL))
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#define bFM3_EXBUS_AREA4_ADDR5 *((volatile unsigned int*)(0x427E0A14UL))
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#define bFM3_EXBUS_AREA4_ADDR6 *((volatile unsigned int*)(0x427E0A18UL))
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#define bFM3_EXBUS_AREA4_ADDR7 *((volatile unsigned int*)(0x427E0A1CUL))
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#define bFM3_EXBUS_AREA4_MASK0 *((volatile unsigned int*)(0x427E0A40UL))
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#define bFM3_EXBUS_AREA4_MASK1 *((volatile unsigned int*)(0x427E0A44UL))
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#define bFM3_EXBUS_AREA4_MASK2 *((volatile unsigned int*)(0x427E0A48UL))
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#define bFM3_EXBUS_AREA4_MASK3 *((volatile unsigned int*)(0x427E0A4CUL))
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#define bFM3_EXBUS_AREA4_MASK4 *((volatile unsigned int*)(0x427E0A50UL))
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#define bFM3_EXBUS_AREA4_MASK5 *((volatile unsigned int*)(0x427E0A54UL))
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#define bFM3_EXBUS_AREA4_MASK6 *((volatile unsigned int*)(0x427E0A58UL))
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#define bFM3_EXBUS_AREA5_ADDR0 *((volatile unsigned int*)(0x427E0A80UL))
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#define bFM3_EXBUS_AREA5_ADDR1 *((volatile unsigned int*)(0x427E0A84UL))
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#define bFM3_EXBUS_AREA5_ADDR2 *((volatile unsigned int*)(0x427E0A88UL))
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#define bFM3_EXBUS_AREA5_ADDR3 *((volatile unsigned int*)(0x427E0A8CUL))
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#define bFM3_EXBUS_AREA5_ADDR4 *((volatile unsigned int*)(0x427E0A90UL))
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#define bFM3_EXBUS_AREA5_ADDR5 *((volatile unsigned int*)(0x427E0A94UL))
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#define bFM3_EXBUS_AREA5_ADDR6 *((volatile unsigned int*)(0x427E0A98UL))
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#define bFM3_EXBUS_AREA5_ADDR7 *((volatile unsigned int*)(0x427E0A9CUL))
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#define bFM3_EXBUS_AREA5_MASK0 *((volatile unsigned int*)(0x427E0AC0UL))
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#define bFM3_EXBUS_AREA5_MASK1 *((volatile unsigned int*)(0x427E0AC4UL))
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#define bFM3_EXBUS_AREA5_MASK2 *((volatile unsigned int*)(0x427E0AC8UL))
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#define bFM3_EXBUS_AREA5_MASK3 *((volatile unsigned int*)(0x427E0ACCUL))
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#define bFM3_EXBUS_AREA5_MASK4 *((volatile unsigned int*)(0x427E0AD0UL))
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#define bFM3_EXBUS_AREA5_MASK5 *((volatile unsigned int*)(0x427E0AD4UL))
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#define bFM3_EXBUS_AREA5_MASK6 *((volatile unsigned int*)(0x427E0AD8UL))
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#define bFM3_EXBUS_AREA6_ADDR0 *((volatile unsigned int*)(0x427E0B00UL))
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#define bFM3_EXBUS_AREA6_ADDR1 *((volatile unsigned int*)(0x427E0B04UL))
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#define bFM3_EXBUS_AREA6_ADDR2 *((volatile unsigned int*)(0x427E0B08UL))
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#define bFM3_EXBUS_AREA6_ADDR3 *((volatile unsigned int*)(0x427E0B0CUL))
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#define bFM3_EXBUS_AREA6_ADDR4 *((volatile unsigned int*)(0x427E0B10UL))
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#define bFM3_EXBUS_AREA6_ADDR5 *((volatile unsigned int*)(0x427E0B14UL))
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#define bFM3_EXBUS_AREA6_ADDR6 *((volatile unsigned int*)(0x427E0B18UL))
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#define bFM3_EXBUS_AREA6_ADDR7 *((volatile unsigned int*)(0x427E0B1CUL))
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#define bFM3_EXBUS_AREA6_MASK0 *((volatile unsigned int*)(0x427E0B40UL))
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#define bFM3_EXBUS_AREA6_MASK1 *((volatile unsigned int*)(0x427E0B44UL))
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#define bFM3_EXBUS_AREA6_MASK2 *((volatile unsigned int*)(0x427E0B48UL))
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#define bFM3_EXBUS_AREA6_MASK3 *((volatile unsigned int*)(0x427E0B4CUL))
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#define bFM3_EXBUS_AREA6_MASK4 *((volatile unsigned int*)(0x427E0B50UL))
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#define bFM3_EXBUS_AREA6_MASK5 *((volatile unsigned int*)(0x427E0B54UL))
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#define bFM3_EXBUS_AREA6_MASK6 *((volatile unsigned int*)(0x427E0B58UL))
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#define bFM3_EXBUS_AREA7_ADDR0 *((volatile unsigned int*)(0x427E0B80UL))
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#define bFM3_EXBUS_AREA7_ADDR1 *((volatile unsigned int*)(0x427E0B84UL))
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#define bFM3_EXBUS_AREA7_ADDR2 *((volatile unsigned int*)(0x427E0B88UL))
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#define bFM3_EXBUS_AREA7_ADDR3 *((volatile unsigned int*)(0x427E0B8CUL))
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#define bFM3_EXBUS_AREA7_ADDR4 *((volatile unsigned int*)(0x427E0B90UL))
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#define bFM3_EXBUS_AREA7_ADDR5 *((volatile unsigned int*)(0x427E0B94UL))
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#define bFM3_EXBUS_AREA7_ADDR6 *((volatile unsigned int*)(0x427E0B98UL))
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#define bFM3_EXBUS_AREA7_ADDR7 *((volatile unsigned int*)(0x427E0B9CUL))
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#define bFM3_EXBUS_AREA7_MASK0 *((volatile unsigned int*)(0x427E0BC0UL))
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#define bFM3_EXBUS_AREA7_MASK1 *((volatile unsigned int*)(0x427E0BC4UL))
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#define bFM3_EXBUS_AREA7_MASK2 *((volatile unsigned int*)(0x427E0BC8UL))
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#define bFM3_EXBUS_AREA7_MASK3 *((volatile unsigned int*)(0x427E0BCCUL))
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#define bFM3_EXBUS_AREA7_MASK4 *((volatile unsigned int*)(0x427E0BD0UL))
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#define bFM3_EXBUS_AREA7_MASK5 *((volatile unsigned int*)(0x427E0BD4UL))
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#define bFM3_EXBUS_AREA7_MASK6 *((volatile unsigned int*)(0x427E0BD8UL))
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#define bFM3_EXBUS_ATIM0_ALC0 *((volatile unsigned int*)(0x427E0C00UL))
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#define bFM3_EXBUS_ATIM0_ALC1 *((volatile unsigned int*)(0x427E0C04UL))
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#define bFM3_EXBUS_ATIM0_ALC2 *((volatile unsigned int*)(0x427E0C08UL))
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#define bFM3_EXBUS_ATIM0_ALC3 *((volatile unsigned int*)(0x427E0C0CUL))
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#define bFM3_EXBUS_ATIM0_ALES0 *((volatile unsigned int*)(0x427E0C10UL))
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#define bFM3_EXBUS_ATIM0_ALES1 *((volatile unsigned int*)(0x427E0C14UL))
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#define bFM3_EXBUS_ATIM0_ALES2 *((volatile unsigned int*)(0x427E0C18UL))
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#define bFM3_EXBUS_ATIM0_ALES3 *((volatile unsigned int*)(0x427E0C1CUL))
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#define bFM3_EXBUS_ATIM0_ALEW0 *((volatile unsigned int*)(0x427E0C20UL))
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#define bFM3_EXBUS_ATIM0_ALEW1 *((volatile unsigned int*)(0x427E0C24UL))
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#define bFM3_EXBUS_ATIM0_ALEW2 *((volatile unsigned int*)(0x427E0C28UL))
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#define bFM3_EXBUS_ATIM0_ALEW3 *((volatile unsigned int*)(0x427E0C2CUL))
|
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#define bFM3_EXBUS_ATIM1_ALC0 *((volatile unsigned int*)(0x427E0C80UL))
|
|
#define bFM3_EXBUS_ATIM1_ALC1 *((volatile unsigned int*)(0x427E0C84UL))
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#define bFM3_EXBUS_ATIM1_ALC2 *((volatile unsigned int*)(0x427E0C88UL))
|
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#define bFM3_EXBUS_ATIM1_ALC3 *((volatile unsigned int*)(0x427E0C8CUL))
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#define bFM3_EXBUS_ATIM1_ALES0 *((volatile unsigned int*)(0x427E0C90UL))
|
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#define bFM3_EXBUS_ATIM1_ALES1 *((volatile unsigned int*)(0x427E0C94UL))
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#define bFM3_EXBUS_ATIM1_ALES2 *((volatile unsigned int*)(0x427E0C98UL))
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|
#define bFM3_EXBUS_ATIM1_ALES3 *((volatile unsigned int*)(0x427E0C9CUL))
|
|
#define bFM3_EXBUS_ATIM1_ALEW0 *((volatile unsigned int*)(0x427E0CA0UL))
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|
#define bFM3_EXBUS_ATIM1_ALEW1 *((volatile unsigned int*)(0x427E0CA4UL))
|
|
#define bFM3_EXBUS_ATIM1_ALEW2 *((volatile unsigned int*)(0x427E0CA8UL))
|
|
#define bFM3_EXBUS_ATIM1_ALEW3 *((volatile unsigned int*)(0x427E0CACUL))
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|
#define bFM3_EXBUS_ATIM2_ALC0 *((volatile unsigned int*)(0x427E0D00UL))
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#define bFM3_EXBUS_ATIM2_ALC1 *((volatile unsigned int*)(0x427E0D04UL))
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|
#define bFM3_EXBUS_ATIM2_ALC2 *((volatile unsigned int*)(0x427E0D08UL))
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#define bFM3_EXBUS_ATIM2_ALC3 *((volatile unsigned int*)(0x427E0D0CUL))
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|
#define bFM3_EXBUS_ATIM2_ALES0 *((volatile unsigned int*)(0x427E0D10UL))
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|
#define bFM3_EXBUS_ATIM2_ALES1 *((volatile unsigned int*)(0x427E0D14UL))
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|
#define bFM3_EXBUS_ATIM2_ALES2 *((volatile unsigned int*)(0x427E0D18UL))
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#define bFM3_EXBUS_ATIM2_ALES3 *((volatile unsigned int*)(0x427E0D1CUL))
|
|
#define bFM3_EXBUS_ATIM2_ALEW0 *((volatile unsigned int*)(0x427E0D20UL))
|
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#define bFM3_EXBUS_ATIM2_ALEW1 *((volatile unsigned int*)(0x427E0D24UL))
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#define bFM3_EXBUS_ATIM2_ALEW2 *((volatile unsigned int*)(0x427E0D28UL))
|
|
#define bFM3_EXBUS_ATIM2_ALEW3 *((volatile unsigned int*)(0x427E0D2CUL))
|
|
#define bFM3_EXBUS_ATIM3_ALC0 *((volatile unsigned int*)(0x427E0D80UL))
|
|
#define bFM3_EXBUS_ATIM3_ALC1 *((volatile unsigned int*)(0x427E0D84UL))
|
|
#define bFM3_EXBUS_ATIM3_ALC2 *((volatile unsigned int*)(0x427E0D88UL))
|
|
#define bFM3_EXBUS_ATIM3_ALC3 *((volatile unsigned int*)(0x427E0D8CUL))
|
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#define bFM3_EXBUS_ATIM3_ALES0 *((volatile unsigned int*)(0x427E0D90UL))
|
|
#define bFM3_EXBUS_ATIM3_ALES1 *((volatile unsigned int*)(0x427E0D94UL))
|
|
#define bFM3_EXBUS_ATIM3_ALES2 *((volatile unsigned int*)(0x427E0D98UL))
|
|
#define bFM3_EXBUS_ATIM3_ALES3 *((volatile unsigned int*)(0x427E0D9CUL))
|
|
#define bFM3_EXBUS_ATIM3_ALEW0 *((volatile unsigned int*)(0x427E0DA0UL))
|
|
#define bFM3_EXBUS_ATIM3_ALEW1 *((volatile unsigned int*)(0x427E0DA4UL))
|
|
#define bFM3_EXBUS_ATIM3_ALEW2 *((volatile unsigned int*)(0x427E0DA8UL))
|
|
#define bFM3_EXBUS_ATIM3_ALEW3 *((volatile unsigned int*)(0x427E0DACUL))
|
|
#define bFM3_EXBUS_ATIM4_ALC0 *((volatile unsigned int*)(0x427E0E00UL))
|
|
#define bFM3_EXBUS_ATIM4_ALC1 *((volatile unsigned int*)(0x427E0E04UL))
|
|
#define bFM3_EXBUS_ATIM4_ALC2 *((volatile unsigned int*)(0x427E0E08UL))
|
|
#define bFM3_EXBUS_ATIM4_ALC3 *((volatile unsigned int*)(0x427E0E0CUL))
|
|
#define bFM3_EXBUS_ATIM4_ALES0 *((volatile unsigned int*)(0x427E0E10UL))
|
|
#define bFM3_EXBUS_ATIM4_ALES1 *((volatile unsigned int*)(0x427E0E14UL))
|
|
#define bFM3_EXBUS_ATIM4_ALES2 *((volatile unsigned int*)(0x427E0E18UL))
|
|
#define bFM3_EXBUS_ATIM4_ALES3 *((volatile unsigned int*)(0x427E0E1CUL))
|
|
#define bFM3_EXBUS_ATIM4_ALEW0 *((volatile unsigned int*)(0x427E0E20UL))
|
|
#define bFM3_EXBUS_ATIM4_ALEW1 *((volatile unsigned int*)(0x427E0E24UL))
|
|
#define bFM3_EXBUS_ATIM4_ALEW2 *((volatile unsigned int*)(0x427E0E28UL))
|
|
#define bFM3_EXBUS_ATIM4_ALEW3 *((volatile unsigned int*)(0x427E0E2CUL))
|
|
#define bFM3_EXBUS_ATIM5_ALC0 *((volatile unsigned int*)(0x427E0E80UL))
|
|
#define bFM3_EXBUS_ATIM5_ALC1 *((volatile unsigned int*)(0x427E0E84UL))
|
|
#define bFM3_EXBUS_ATIM5_ALC2 *((volatile unsigned int*)(0x427E0E88UL))
|
|
#define bFM3_EXBUS_ATIM5_ALC3 *((volatile unsigned int*)(0x427E0E8CUL))
|
|
#define bFM3_EXBUS_ATIM5_ALES0 *((volatile unsigned int*)(0x427E0E90UL))
|
|
#define bFM3_EXBUS_ATIM5_ALES1 *((volatile unsigned int*)(0x427E0E94UL))
|
|
#define bFM3_EXBUS_ATIM5_ALES2 *((volatile unsigned int*)(0x427E0E98UL))
|
|
#define bFM3_EXBUS_ATIM5_ALES3 *((volatile unsigned int*)(0x427E0E9CUL))
|
|
#define bFM3_EXBUS_ATIM5_ALEW0 *((volatile unsigned int*)(0x427E0EA0UL))
|
|
#define bFM3_EXBUS_ATIM5_ALEW1 *((volatile unsigned int*)(0x427E0EA4UL))
|
|
#define bFM3_EXBUS_ATIM5_ALEW2 *((volatile unsigned int*)(0x427E0EA8UL))
|
|
#define bFM3_EXBUS_ATIM5_ALEW3 *((volatile unsigned int*)(0x427E0EACUL))
|
|
#define bFM3_EXBUS_ATIM6_ALC0 *((volatile unsigned int*)(0x427E0F00UL))
|
|
#define bFM3_EXBUS_ATIM6_ALC1 *((volatile unsigned int*)(0x427E0F04UL))
|
|
#define bFM3_EXBUS_ATIM6_ALC2 *((volatile unsigned int*)(0x427E0F08UL))
|
|
#define bFM3_EXBUS_ATIM6_ALC3 *((volatile unsigned int*)(0x427E0F0CUL))
|
|
#define bFM3_EXBUS_ATIM6_ALES0 *((volatile unsigned int*)(0x427E0F10UL))
|
|
#define bFM3_EXBUS_ATIM6_ALES1 *((volatile unsigned int*)(0x427E0F14UL))
|
|
#define bFM3_EXBUS_ATIM6_ALES2 *((volatile unsigned int*)(0x427E0F18UL))
|
|
#define bFM3_EXBUS_ATIM6_ALES3 *((volatile unsigned int*)(0x427E0F1CUL))
|
|
#define bFM3_EXBUS_ATIM6_ALEW0 *((volatile unsigned int*)(0x427E0F20UL))
|
|
#define bFM3_EXBUS_ATIM6_ALEW1 *((volatile unsigned int*)(0x427E0F24UL))
|
|
#define bFM3_EXBUS_ATIM6_ALEW2 *((volatile unsigned int*)(0x427E0F28UL))
|
|
#define bFM3_EXBUS_ATIM6_ALEW3 *((volatile unsigned int*)(0x427E0F2CUL))
|
|
#define bFM3_EXBUS_ATIM7_ALC0 *((volatile unsigned int*)(0x427E0F80UL))
|
|
#define bFM3_EXBUS_ATIM7_ALC1 *((volatile unsigned int*)(0x427E0F84UL))
|
|
#define bFM3_EXBUS_ATIM7_ALC2 *((volatile unsigned int*)(0x427E0F88UL))
|
|
#define bFM3_EXBUS_ATIM7_ALC3 *((volatile unsigned int*)(0x427E0F8CUL))
|
|
#define bFM3_EXBUS_ATIM7_ALES0 *((volatile unsigned int*)(0x427E0F90UL))
|
|
#define bFM3_EXBUS_ATIM7_ALES1 *((volatile unsigned int*)(0x427E0F94UL))
|
|
#define bFM3_EXBUS_ATIM7_ALES2 *((volatile unsigned int*)(0x427E0F98UL))
|
|
#define bFM3_EXBUS_ATIM7_ALES3 *((volatile unsigned int*)(0x427E0F9CUL))
|
|
#define bFM3_EXBUS_ATIM7_ALEW0 *((volatile unsigned int*)(0x427E0FA0UL))
|
|
#define bFM3_EXBUS_ATIM7_ALEW1 *((volatile unsigned int*)(0x427E0FA4UL))
|
|
#define bFM3_EXBUS_ATIM7_ALEW2 *((volatile unsigned int*)(0x427E0FA8UL))
|
|
#define bFM3_EXBUS_ATIM7_ALEW3 *((volatile unsigned int*)(0x427E0FACUL))
|
|
#define bFM3_EXBUS_DCLKR_MDIV0 *((volatile unsigned int*)(0x427E6000UL))
|
|
#define bFM3_EXBUS_DCLKR_MDIV1 *((volatile unsigned int*)(0x427E6004UL))
|
|
#define bFM3_EXBUS_DCLKR_MDIV2 *((volatile unsigned int*)(0x427E6008UL))
|
|
#define bFM3_EXBUS_DCLKR_MDIV3 *((volatile unsigned int*)(0x427E600CUL))
|
|
#define bFM3_EXBUS_DCLKR_MCLKON *((volatile unsigned int*)(0x427E6010UL))
|
|
|
|
/* USB channel 0 registers */
|
|
#define bFM3_USB0_HCNT_HOST *((volatile unsigned int*)(0x42842000UL))
|
|
#define bFM3_USB0_HCNT_URST *((volatile unsigned int*)(0x42842004UL))
|
|
#define bFM3_USB0_HCNT_SOFIRE *((volatile unsigned int*)(0x42842008UL))
|
|
#define bFM3_USB0_HCNT_DIRE *((volatile unsigned int*)(0x4284200CUL))
|
|
#define bFM3_USB0_HCNT_CNNIRE *((volatile unsigned int*)(0x42842010UL))
|
|
#define bFM3_USB0_HCNT_CMPIRE *((volatile unsigned int*)(0x42842014UL))
|
|
#define bFM3_USB0_HCNT_URIRE *((volatile unsigned int*)(0x42842018UL))
|
|
#define bFM3_USB0_HCNT_RWKIRE *((volatile unsigned int*)(0x4284201CUL))
|
|
#define bFM3_USB0_HCNT_RETRY *((volatile unsigned int*)(0x42842020UL))
|
|
#define bFM3_USB0_HCNT_CANCEL *((volatile unsigned int*)(0x42842024UL))
|
|
#define bFM3_USB0_HCNT_SOFSTEP *((volatile unsigned int*)(0x42842028UL))
|
|
#define bFM3_USB0_HCNT0_HOST *((volatile unsigned int*)(0x42842000UL))
|
|
#define bFM3_USB0_HCNT0_URST *((volatile unsigned int*)(0x42842004UL))
|
|
#define bFM3_USB0_HCNT0_SOFIRE *((volatile unsigned int*)(0x42842008UL))
|
|
#define bFM3_USB0_HCNT0_DIRE *((volatile unsigned int*)(0x4284200CUL))
|
|
#define bFM3_USB0_HCNT0_CNNIRE *((volatile unsigned int*)(0x42842010UL))
|
|
#define bFM3_USB0_HCNT0_CMPIRE *((volatile unsigned int*)(0x42842014UL))
|
|
#define bFM3_USB0_HCNT0_URIRE *((volatile unsigned int*)(0x42842018UL))
|
|
#define bFM3_USB0_HCNT0_RWKIRE *((volatile unsigned int*)(0x4284201CUL))
|
|
#define bFM3_USB0_HCNT1_RETRY *((volatile unsigned int*)(0x42842020UL))
|
|
#define bFM3_USB0_HCNT1_CANCEL *((volatile unsigned int*)(0x42842024UL))
|
|
#define bFM3_USB0_HCNT1_SOFSTEP *((volatile unsigned int*)(0x42842028UL))
|
|
#define bFM3_USB0_HIRQ_SOFIRQ *((volatile unsigned int*)(0x42842080UL))
|
|
#define bFM3_USB0_HIRQ_DIRQ *((volatile unsigned int*)(0x42842084UL))
|
|
#define bFM3_USB0_HIRQ_CNNIRQ *((volatile unsigned int*)(0x42842088UL))
|
|
#define bFM3_USB0_HIRQ_CMPIRQ *((volatile unsigned int*)(0x4284208CUL))
|
|
#define bFM3_USB0_HIRQ_URIRQ *((volatile unsigned int*)(0x42842090UL))
|
|
#define bFM3_USB0_HIRQ_RWKIRQ *((volatile unsigned int*)(0x42842094UL))
|
|
#define bFM3_USB0_HIRQ_TCAN *((volatile unsigned int*)(0x4284209CUL))
|
|
#define bFM3_USB0_HERR_HS0 *((volatile unsigned int*)(0x428420A0UL))
|
|
#define bFM3_USB0_HERR_HS1 *((volatile unsigned int*)(0x428420A4UL))
|
|
#define bFM3_USB0_HERR_STUFF *((volatile unsigned int*)(0x428420A8UL))
|
|
#define bFM3_USB0_HERR_TGERR *((volatile unsigned int*)(0x428420ACUL))
|
|
#define bFM3_USB0_HERR_CRC *((volatile unsigned int*)(0x428420B0UL))
|
|
#define bFM3_USB0_HERR_TOUT *((volatile unsigned int*)(0x428420B4UL))
|
|
#define bFM3_USB0_HERR_RERR *((volatile unsigned int*)(0x428420B8UL))
|
|
#define bFM3_USB0_HERR_LSTOF *((volatile unsigned int*)(0x428420BCUL))
|
|
#define bFM3_USB0_HSTATE_CSTAT *((volatile unsigned int*)(0x42842100UL))
|
|
#define bFM3_USB0_HSTATE_TMODE *((volatile unsigned int*)(0x42842104UL))
|
|
#define bFM3_USB0_HSTATE_SUSP *((volatile unsigned int*)(0x42842108UL))
|
|
#define bFM3_USB0_HSTATE_SOFBUSY *((volatile unsigned int*)(0x4284210CUL))
|
|
#define bFM3_USB0_HSTATE_CLKSEL *((volatile unsigned int*)(0x42842110UL))
|
|
#define bFM3_USB0_HSTATE_ALIVE *((volatile unsigned int*)(0x42842114UL))
|
|
#define bFM3_USB0_HFCOMP_FRAMECOMP0 *((volatile unsigned int*)(0x42842120UL))
|
|
#define bFM3_USB0_HFCOMP_FRAMECOMP1 *((volatile unsigned int*)(0x42842124UL))
|
|
#define bFM3_USB0_HFCOMP_FRAMECOMP2 *((volatile unsigned int*)(0x42842128UL))
|
|
#define bFM3_USB0_HFCOMP_FRAMECOMP3 *((volatile unsigned int*)(0x4284212CUL))
|
|
#define bFM3_USB0_HFCOMP_FRAMECOMP4 *((volatile unsigned int*)(0x42842130UL))
|
|
#define bFM3_USB0_HFCOMP_FRAMECOMP5 *((volatile unsigned int*)(0x42842134UL))
|
|
#define bFM3_USB0_HFCOMP_FRAMECOMP6 *((volatile unsigned int*)(0x42842138UL))
|
|
#define bFM3_USB0_HFCOMP_FRAMECOMP7 *((volatile unsigned int*)(0x4284213CUL))
|
|
#define bFM3_USB0_HRTIMER_RTIMER0 *((volatile unsigned int*)(0x42842180UL))
|
|
#define bFM3_USB0_HRTIMER_RTIMER1 *((volatile unsigned int*)(0x42842184UL))
|
|
#define bFM3_USB0_HRTIMER_RTIMER2 *((volatile unsigned int*)(0x42842188UL))
|
|
#define bFM3_USB0_HRTIMER_RTIMER3 *((volatile unsigned int*)(0x4284218CUL))
|
|
#define bFM3_USB0_HRTIMER_RTIMER4 *((volatile unsigned int*)(0x42842190UL))
|
|
#define bFM3_USB0_HRTIMER_RTIMER5 *((volatile unsigned int*)(0x42842194UL))
|
|
#define bFM3_USB0_HRTIMER_RTIMER6 *((volatile unsigned int*)(0x42842198UL))
|
|
#define bFM3_USB0_HRTIMER_RTIMER7 *((volatile unsigned int*)(0x4284219CUL))
|
|
#define bFM3_USB0_HRTIMER_RTIMER8 *((volatile unsigned int*)(0x428421A0UL))
|
|
#define bFM3_USB0_HRTIMER_RTIMER9 *((volatile unsigned int*)(0x428421A4UL))
|
|
#define bFM3_USB0_HRTIMER_RTIMER10 *((volatile unsigned int*)(0x428421A8UL))
|
|
#define bFM3_USB0_HRTIMER_RTIMER11 *((volatile unsigned int*)(0x428421ACUL))
|
|
#define bFM3_USB0_HRTIMER_RTIMER12 *((volatile unsigned int*)(0x428421B0UL))
|
|
#define bFM3_USB0_HRTIMER_RTIMER13 *((volatile unsigned int*)(0x428421B4UL))
|
|
#define bFM3_USB0_HRTIMER_RTIMER14 *((volatile unsigned int*)(0x428421B8UL))
|
|
#define bFM3_USB0_HRTIMER_RTIMER15 *((volatile unsigned int*)(0x428421BCUL))
|
|
#define bFM3_USB0_HRTIMER0_RTIMER00 *((volatile unsigned int*)(0x42842180UL))
|
|
#define bFM3_USB0_HRTIMER0_RTIMER01 *((volatile unsigned int*)(0x42842184UL))
|
|
#define bFM3_USB0_HRTIMER0_RTIMER02 *((volatile unsigned int*)(0x42842188UL))
|
|
#define bFM3_USB0_HRTIMER0_RTIMER03 *((volatile unsigned int*)(0x4284218CUL))
|
|
#define bFM3_USB0_HRTIMER0_RTIMER04 *((volatile unsigned int*)(0x42842190UL))
|
|
#define bFM3_USB0_HRTIMER0_RTIMER05 *((volatile unsigned int*)(0x42842194UL))
|
|
#define bFM3_USB0_HRTIMER0_RTIMER06 *((volatile unsigned int*)(0x42842198UL))
|
|
#define bFM3_USB0_HRTIMER0_RTIMER07 *((volatile unsigned int*)(0x4284219CUL))
|
|
#define bFM3_USB0_HRTIMER1_RTIMER10 *((volatile unsigned int*)(0x428421A0UL))
|
|
#define bFM3_USB0_HRTIMER1_RTIMER11 *((volatile unsigned int*)(0x428421A4UL))
|
|
#define bFM3_USB0_HRTIMER1_RTIMER12 *((volatile unsigned int*)(0x428421A8UL))
|
|
#define bFM3_USB0_HRTIMER1_RTIMER13 *((volatile unsigned int*)(0x428421ACUL))
|
|
#define bFM3_USB0_HRTIMER1_RTIMER14 *((volatile unsigned int*)(0x428421B0UL))
|
|
#define bFM3_USB0_HRTIMER1_RTIMER15 *((volatile unsigned int*)(0x428421B4UL))
|
|
#define bFM3_USB0_HRTIMER1_RTIMER16 *((volatile unsigned int*)(0x428421B8UL))
|
|
#define bFM3_USB0_HRTIMER1_RTIMER17 *((volatile unsigned int*)(0x428421BCUL))
|
|
#define bFM3_USB0_HRTIMER2_RTIMER20 *((volatile unsigned int*)(0x42842200UL))
|
|
#define bFM3_USB0_HRTIMER2_RTIMER21 *((volatile unsigned int*)(0x42842204UL))
|
|
#define bFM3_USB0_HRTIMER2_RTIMER22 *((volatile unsigned int*)(0x42842208UL))
|
|
#define bFM3_USB0_HADR_ADDRESS0 *((volatile unsigned int*)(0x42842220UL))
|
|
#define bFM3_USB0_HADR_ADDRESS1 *((volatile unsigned int*)(0x42842224UL))
|
|
#define bFM3_USB0_HADR_ADDRESS2 *((volatile unsigned int*)(0x42842228UL))
|
|
#define bFM3_USB0_HADR_ADDRESS3 *((volatile unsigned int*)(0x4284222CUL))
|
|
#define bFM3_USB0_HADR_ADDRESS4 *((volatile unsigned int*)(0x42842230UL))
|
|
#define bFM3_USB0_HADR_ADDRESS5 *((volatile unsigned int*)(0x42842234UL))
|
|
#define bFM3_USB0_HADR_ADDRESS6 *((volatile unsigned int*)(0x42842238UL))
|
|
#define bFM3_USB0_HEOF_EOF0 *((volatile unsigned int*)(0x42842280UL))
|
|
#define bFM3_USB0_HEOF_EOF1 *((volatile unsigned int*)(0x42842284UL))
|
|
#define bFM3_USB0_HEOF_EOF2 *((volatile unsigned int*)(0x42842288UL))
|
|
#define bFM3_USB0_HEOF_EOF3 *((volatile unsigned int*)(0x4284228CUL))
|
|
#define bFM3_USB0_HEOF_EOF4 *((volatile unsigned int*)(0x42842290UL))
|
|
#define bFM3_USB0_HEOF_EOF5 *((volatile unsigned int*)(0x42842294UL))
|
|
#define bFM3_USB0_HEOF_EOF6 *((volatile unsigned int*)(0x42842298UL))
|
|
#define bFM3_USB0_HEOF_EOF7 *((volatile unsigned int*)(0x4284229CUL))
|
|
#define bFM3_USB0_HEOF_EOF8 *((volatile unsigned int*)(0x428422A0UL))
|
|
#define bFM3_USB0_HEOF_EOF9 *((volatile unsigned int*)(0x428422A4UL))
|
|
#define bFM3_USB0_HEOF_EOF10 *((volatile unsigned int*)(0x428422A8UL))
|
|
#define bFM3_USB0_HEOF_EOF11 *((volatile unsigned int*)(0x428422ACUL))
|
|
#define bFM3_USB0_HEOF_EOF12 *((volatile unsigned int*)(0x428422B0UL))
|
|
#define bFM3_USB0_HEOF_EOF13 *((volatile unsigned int*)(0x428422B4UL))
|
|
#define bFM3_USB0_HEOF_EOF14 *((volatile unsigned int*)(0x428422B8UL))
|
|
#define bFM3_USB0_HEOF_EOF15 *((volatile unsigned int*)(0x428422BCUL))
|
|
#define bFM3_USB0_HEOF0_EOF00 *((volatile unsigned int*)(0x42842280UL))
|
|
#define bFM3_USB0_HEOF0_EOF01 *((volatile unsigned int*)(0x42842284UL))
|
|
#define bFM3_USB0_HEOF0_EOF02 *((volatile unsigned int*)(0x42842288UL))
|
|
#define bFM3_USB0_HEOF0_EOF03 *((volatile unsigned int*)(0x4284228CUL))
|
|
#define bFM3_USB0_HEOF0_EOF04 *((volatile unsigned int*)(0x42842290UL))
|
|
#define bFM3_USB0_HEOF0_EOF05 *((volatile unsigned int*)(0x42842294UL))
|
|
#define bFM3_USB0_HEOF0_EOF06 *((volatile unsigned int*)(0x42842298UL))
|
|
#define bFM3_USB0_HEOF0_EOF07 *((volatile unsigned int*)(0x4284229CUL))
|
|
#define bFM3_USB0_HEOF1_EOF10 *((volatile unsigned int*)(0x428422A0UL))
|
|
#define bFM3_USB0_HEOF1_EOF11 *((volatile unsigned int*)(0x428422A4UL))
|
|
#define bFM3_USB0_HEOF1_EOF12 *((volatile unsigned int*)(0x428422A8UL))
|
|
#define bFM3_USB0_HEOF1_EOF13 *((volatile unsigned int*)(0x428422ACUL))
|
|
#define bFM3_USB0_HEOF1_EOF14 *((volatile unsigned int*)(0x428422B0UL))
|
|
#define bFM3_USB0_HEOF1_EOF15 *((volatile unsigned int*)(0x428422B4UL))
|
|
#define bFM3_USB0_HFRAME_FRAME0 *((volatile unsigned int*)(0x42842300UL))
|
|
#define bFM3_USB0_HFRAME_FRAME1 *((volatile unsigned int*)(0x42842304UL))
|
|
#define bFM3_USB0_HFRAME_FRAME2 *((volatile unsigned int*)(0x42842308UL))
|
|
#define bFM3_USB0_HFRAME_FRAME3 *((volatile unsigned int*)(0x4284230CUL))
|
|
#define bFM3_USB0_HFRAME_FRAME4 *((volatile unsigned int*)(0x42842310UL))
|
|
#define bFM3_USB0_HFRAME_FRAME5 *((volatile unsigned int*)(0x42842314UL))
|
|
#define bFM3_USB0_HFRAME_FRAME6 *((volatile unsigned int*)(0x42842318UL))
|
|
#define bFM3_USB0_HFRAME_FRAME7 *((volatile unsigned int*)(0x4284231CUL))
|
|
#define bFM3_USB0_HFRAME_FRAME8 *((volatile unsigned int*)(0x42842320UL))
|
|
#define bFM3_USB0_HFRAME_FRAME9 *((volatile unsigned int*)(0x42842324UL))
|
|
#define bFM3_USB0_HFRAME_FRAME10 *((volatile unsigned int*)(0x42842328UL))
|
|
#define bFM3_USB0_HFRAME0_FRAME00 *((volatile unsigned int*)(0x42842300UL))
|
|
#define bFM3_USB0_HFRAME0_FRAME01 *((volatile unsigned int*)(0x42842304UL))
|
|
#define bFM3_USB0_HFRAME0_FRAME02 *((volatile unsigned int*)(0x42842308UL))
|
|
#define bFM3_USB0_HFRAME0_FRAME03 *((volatile unsigned int*)(0x4284230CUL))
|
|
#define bFM3_USB0_HFRAME0_FRAME04 *((volatile unsigned int*)(0x42842310UL))
|
|
#define bFM3_USB0_HFRAME0_FRAME05 *((volatile unsigned int*)(0x42842314UL))
|
|
#define bFM3_USB0_HFRAME0_FRAME06 *((volatile unsigned int*)(0x42842318UL))
|
|
#define bFM3_USB0_HFRAME0_FRAME07 *((volatile unsigned int*)(0x4284231CUL))
|
|
#define bFM3_USB0_HFRAME1_FRAME10 *((volatile unsigned int*)(0x42842320UL))
|
|
#define bFM3_USB0_HFRAME1_FRAME11 *((volatile unsigned int*)(0x42842324UL))
|
|
#define bFM3_USB0_HFRAME1_FRAME12 *((volatile unsigned int*)(0x42842328UL))
|
|
#define bFM3_USB0_HFRAME1_FRAME13 *((volatile unsigned int*)(0x4284232CUL))
|
|
#define bFM3_USB0_HTOKEN_ENDPT0 *((volatile unsigned int*)(0x42842380UL))
|
|
#define bFM3_USB0_HTOKEN_ENDPT1 *((volatile unsigned int*)(0x42842384UL))
|
|
#define bFM3_USB0_HTOKEN_ENDPT2 *((volatile unsigned int*)(0x42842388UL))
|
|
#define bFM3_USB0_HTOKEN_ENDPT3 *((volatile unsigned int*)(0x4284238CUL))
|
|
#define bFM3_USB0_HTOKEN_TKNEN0 *((volatile unsigned int*)(0x42842390UL))
|
|
#define bFM3_USB0_HTOKEN_TKNEN1 *((volatile unsigned int*)(0x42842394UL))
|
|
#define bFM3_USB0_HTOKEN_TKNEN2 *((volatile unsigned int*)(0x42842398UL))
|
|
#define bFM3_USB0_HTOKEN_TGGL *((volatile unsigned int*)(0x4284239CUL))
|
|
#define bFM3_USB0_UDCC_PWC *((volatile unsigned int*)(0x42842400UL))
|
|
#define bFM3_USB0_UDCC_RFBK *((volatile unsigned int*)(0x42842404UL))
|
|
#define bFM3_USB0_UDCC_STALCLREN *((volatile unsigned int*)(0x4284240CUL))
|
|
#define bFM3_USB0_UDCC_USTP *((volatile unsigned int*)(0x42842410UL))
|
|
#define bFM3_USB0_UDCC_HCONX *((volatile unsigned int*)(0x42842414UL))
|
|
#define bFM3_USB0_UDCC_RESUM *((volatile unsigned int*)(0x42842418UL))
|
|
#define bFM3_USB0_UDCC_RST *((volatile unsigned int*)(0x4284241CUL))
|
|
#define bFM3_USB0_EP0C_PKS00 *((volatile unsigned int*)(0x42842480UL))
|
|
#define bFM3_USB0_EP0C_PKS01 *((volatile unsigned int*)(0x42842484UL))
|
|
#define bFM3_USB0_EP0C_PKS02 *((volatile unsigned int*)(0x42842488UL))
|
|
#define bFM3_USB0_EP0C_PKS03 *((volatile unsigned int*)(0x4284248CUL))
|
|
#define bFM3_USB0_EP0C_PKS04 *((volatile unsigned int*)(0x42842490UL))
|
|
#define bFM3_USB0_EP0C_PKS05 *((volatile unsigned int*)(0x42842494UL))
|
|
#define bFM3_USB0_EP0C_PKS06 *((volatile unsigned int*)(0x42842498UL))
|
|
#define bFM3_USB0_EP0C_STAL *((volatile unsigned int*)(0x428424A4UL))
|
|
#define bFM3_USB0_EP1C_PKS10 *((volatile unsigned int*)(0x42842500UL))
|
|
#define bFM3_USB0_EP1C_PKS11 *((volatile unsigned int*)(0x42842504UL))
|
|
#define bFM3_USB0_EP1C_PKS12 *((volatile unsigned int*)(0x42842508UL))
|
|
#define bFM3_USB0_EP1C_PKS13 *((volatile unsigned int*)(0x4284250CUL))
|
|
#define bFM3_USB0_EP1C_PKS14 *((volatile unsigned int*)(0x42842510UL))
|
|
#define bFM3_USB0_EP1C_PKS15 *((volatile unsigned int*)(0x42842514UL))
|
|
#define bFM3_USB0_EP1C_PKS16 *((volatile unsigned int*)(0x42842518UL))
|
|
#define bFM3_USB0_EP1C_PKS17 *((volatile unsigned int*)(0x4284251CUL))
|
|
#define bFM3_USB0_EP1C_PKS18 *((volatile unsigned int*)(0x42842520UL))
|
|
#define bFM3_USB0_EP1C_STAL *((volatile unsigned int*)(0x42842524UL))
|
|
#define bFM3_USB0_EP1C_NULE *((volatile unsigned int*)(0x42842528UL))
|
|
#define bFM3_USB0_EP1C_DMAE *((volatile unsigned int*)(0x4284252CUL))
|
|
#define bFM3_USB0_EP1C_DIR *((volatile unsigned int*)(0x42842530UL))
|
|
#define bFM3_USB0_EP1C_TYPE0 *((volatile unsigned int*)(0x42842534UL))
|
|
#define bFM3_USB0_EP1C_TYPE1 *((volatile unsigned int*)(0x42842538UL))
|
|
#define bFM3_USB0_EP1C_EPEN *((volatile unsigned int*)(0x4284253CUL))
|
|
#define bFM3_USB0_EP2C_PKS20 *((volatile unsigned int*)(0x42842580UL))
|
|
#define bFM3_USB0_EP2C_PKS21 *((volatile unsigned int*)(0x42842584UL))
|
|
#define bFM3_USB0_EP2C_PKS22 *((volatile unsigned int*)(0x42842588UL))
|
|
#define bFM3_USB0_EP2C_PKS23 *((volatile unsigned int*)(0x4284258CUL))
|
|
#define bFM3_USB0_EP2C_PKS24 *((volatile unsigned int*)(0x42842590UL))
|
|
#define bFM3_USB0_EP2C_PKS25 *((volatile unsigned int*)(0x42842594UL))
|
|
#define bFM3_USB0_EP2C_PKS26 *((volatile unsigned int*)(0x42842598UL))
|
|
#define bFM3_USB0_EP2C_STAL *((volatile unsigned int*)(0x428425A4UL))
|
|
#define bFM3_USB0_EP2C_NULE *((volatile unsigned int*)(0x428425A8UL))
|
|
#define bFM3_USB0_EP2C_DMAE *((volatile unsigned int*)(0x428425ACUL))
|
|
#define bFM3_USB0_EP2C_DIR *((volatile unsigned int*)(0x428425B0UL))
|
|
#define bFM3_USB0_EP2C_TYPE0 *((volatile unsigned int*)(0x428425B4UL))
|
|
#define bFM3_USB0_EP2C_TYPE1 *((volatile unsigned int*)(0x428425B8UL))
|
|
#define bFM3_USB0_EP2C_EPEN *((volatile unsigned int*)(0x428425BCUL))
|
|
#define bFM3_USB0_EP3C_PKS30 *((volatile unsigned int*)(0x42842600UL))
|
|
#define bFM3_USB0_EP3C_PKS31 *((volatile unsigned int*)(0x42842604UL))
|
|
#define bFM3_USB0_EP3C_PKS32 *((volatile unsigned int*)(0x42842608UL))
|
|
#define bFM3_USB0_EP3C_PKS33 *((volatile unsigned int*)(0x4284260CUL))
|
|
#define bFM3_USB0_EP3C_PKS34 *((volatile unsigned int*)(0x42842610UL))
|
|
#define bFM3_USB0_EP3C_PKS35 *((volatile unsigned int*)(0x42842614UL))
|
|
#define bFM3_USB0_EP3C_PKS36 *((volatile unsigned int*)(0x42842618UL))
|
|
#define bFM3_USB0_EP3C_STAL *((volatile unsigned int*)(0x42842624UL))
|
|
#define bFM3_USB0_EP3C_NULE *((volatile unsigned int*)(0x42842628UL))
|
|
#define bFM3_USB0_EP3C_DMAE *((volatile unsigned int*)(0x4284262CUL))
|
|
#define bFM3_USB0_EP3C_DIR *((volatile unsigned int*)(0x42842630UL))
|
|
#define bFM3_USB0_EP3C_TYPE0 *((volatile unsigned int*)(0x42842634UL))
|
|
#define bFM3_USB0_EP3C_TYPE1 *((volatile unsigned int*)(0x42842638UL))
|
|
#define bFM3_USB0_EP3C_EPEN *((volatile unsigned int*)(0x4284263CUL))
|
|
#define bFM3_USB0_EP4C_PKS40 *((volatile unsigned int*)(0x42842680UL))
|
|
#define bFM3_USB0_EP4C_PKS41 *((volatile unsigned int*)(0x42842684UL))
|
|
#define bFM3_USB0_EP4C_PKS42 *((volatile unsigned int*)(0x42842688UL))
|
|
#define bFM3_USB0_EP4C_PKS43 *((volatile unsigned int*)(0x4284268CUL))
|
|
#define bFM3_USB0_EP4C_PKS44 *((volatile unsigned int*)(0x42842690UL))
|
|
#define bFM3_USB0_EP4C_PKS45 *((volatile unsigned int*)(0x42842694UL))
|
|
#define bFM3_USB0_EP4C_PKS46 *((volatile unsigned int*)(0x42842698UL))
|
|
#define bFM3_USB0_EP4C_STAL *((volatile unsigned int*)(0x428426A4UL))
|
|
#define bFM3_USB0_EP4C_NULE *((volatile unsigned int*)(0x428426A8UL))
|
|
#define bFM3_USB0_EP4C_DMAE *((volatile unsigned int*)(0x428426ACUL))
|
|
#define bFM3_USB0_EP4C_DIR *((volatile unsigned int*)(0x428426B0UL))
|
|
#define bFM3_USB0_EP4C_TYPE0 *((volatile unsigned int*)(0x428426B4UL))
|
|
#define bFM3_USB0_EP4C_TYPE1 *((volatile unsigned int*)(0x428426B8UL))
|
|
#define bFM3_USB0_EP4C_EPEN *((volatile unsigned int*)(0x428426BCUL))
|
|
#define bFM3_USB0_EP5C_PKS50 *((volatile unsigned int*)(0x42842700UL))
|
|
#define bFM3_USB0_EP5C_PKS51 *((volatile unsigned int*)(0x42842704UL))
|
|
#define bFM3_USB0_EP5C_PKS52 *((volatile unsigned int*)(0x42842708UL))
|
|
#define bFM3_USB0_EP5C_PKS53 *((volatile unsigned int*)(0x4284270CUL))
|
|
#define bFM3_USB0_EP5C_PKS54 *((volatile unsigned int*)(0x42842710UL))
|
|
#define bFM3_USB0_EP5C_PKS55 *((volatile unsigned int*)(0x42842714UL))
|
|
#define bFM3_USB0_EP5C_PKS56 *((volatile unsigned int*)(0x42842718UL))
|
|
#define bFM3_USB0_EP5C_STAL *((volatile unsigned int*)(0x42842724UL))
|
|
#define bFM3_USB0_EP5C_NULE *((volatile unsigned int*)(0x42842728UL))
|
|
#define bFM3_USB0_EP5C_DMAE *((volatile unsigned int*)(0x4284272CUL))
|
|
#define bFM3_USB0_EP5C_DIR *((volatile unsigned int*)(0x42842730UL))
|
|
#define bFM3_USB0_EP5C_TYPE0 *((volatile unsigned int*)(0x42842734UL))
|
|
#define bFM3_USB0_EP5C_TYPE1 *((volatile unsigned int*)(0x42842738UL))
|
|
#define bFM3_USB0_EP5C_EPEN *((volatile unsigned int*)(0x4284273CUL))
|
|
#define bFM3_USB0_TMSP_TMSP0 *((volatile unsigned int*)(0x42842780UL))
|
|
#define bFM3_USB0_TMSP_TMSP1 *((volatile unsigned int*)(0x42842784UL))
|
|
#define bFM3_USB0_TMSP_TMSP2 *((volatile unsigned int*)(0x42842788UL))
|
|
#define bFM3_USB0_TMSP_TMSP3 *((volatile unsigned int*)(0x4284278CUL))
|
|
#define bFM3_USB0_TMSP_TMSP4 *((volatile unsigned int*)(0x42842790UL))
|
|
#define bFM3_USB0_TMSP_TMSP5 *((volatile unsigned int*)(0x42842794UL))
|
|
#define bFM3_USB0_TMSP_TMSP6 *((volatile unsigned int*)(0x42842798UL))
|
|
#define bFM3_USB0_TMSP_TMSP7 *((volatile unsigned int*)(0x4284279CUL))
|
|
#define bFM3_USB0_TMSP_TMSP8 *((volatile unsigned int*)(0x428427A0UL))
|
|
#define bFM3_USB0_TMSP_TMSP9 *((volatile unsigned int*)(0x428427A4UL))
|
|
#define bFM3_USB0_TMSP_TMSP10 *((volatile unsigned int*)(0x428427A8UL))
|
|
#define bFM3_USB0_UDCS_CONF *((volatile unsigned int*)(0x42842800UL))
|
|
#define bFM3_USB0_UDCS_SETP *((volatile unsigned int*)(0x42842804UL))
|
|
#define bFM3_USB0_UDCS_WKUP *((volatile unsigned int*)(0x42842808UL))
|
|
#define bFM3_USB0_UDCS_BRST *((volatile unsigned int*)(0x4284280CUL))
|
|
#define bFM3_USB0_UDCS_SOF *((volatile unsigned int*)(0x42842810UL))
|
|
#define bFM3_USB0_UDCS_SUSP *((volatile unsigned int*)(0x42842814UL))
|
|
#define bFM3_USB0_UDCIE_CONFIE *((volatile unsigned int*)(0x42842820UL))
|
|
#define bFM3_USB0_UDCIE_CONFN *((volatile unsigned int*)(0x42842824UL))
|
|
#define bFM3_USB0_UDCIE_WKUPIE *((volatile unsigned int*)(0x42842828UL))
|
|
#define bFM3_USB0_UDCIE_BRSTIE *((volatile unsigned int*)(0x4284282CUL))
|
|
#define bFM3_USB0_UDCIE_SOFIE *((volatile unsigned int*)(0x42842830UL))
|
|
#define bFM3_USB0_UDCIE_SUSPIE *((volatile unsigned int*)(0x42842834UL))
|
|
#define bFM3_USB0_EP0IS_DRQI *((volatile unsigned int*)(0x428428A8UL))
|
|
#define bFM3_USB0_EP0IS_DRQIIE *((volatile unsigned int*)(0x428428B8UL))
|
|
#define bFM3_USB0_EP0IS_BFINI *((volatile unsigned int*)(0x428428BCUL))
|
|
#define bFM3_USB0_EP0OS_SIZE0 *((volatile unsigned int*)(0x42842900UL))
|
|
#define bFM3_USB0_EP0OS_SIZE1 *((volatile unsigned int*)(0x42842904UL))
|
|
#define bFM3_USB0_EP0OS_SIZE2 *((volatile unsigned int*)(0x42842908UL))
|
|
#define bFM3_USB0_EP0OS_SIZE3 *((volatile unsigned int*)(0x4284290CUL))
|
|
#define bFM3_USB0_EP0OS_SIZE4 *((volatile unsigned int*)(0x42842910UL))
|
|
#define bFM3_USB0_EP0OS_SIZE5 *((volatile unsigned int*)(0x42842914UL))
|
|
#define bFM3_USB0_EP0OS_SIZE6 *((volatile unsigned int*)(0x42842918UL))
|
|
#define bFM3_USB0_EP0OS_SPK *((volatile unsigned int*)(0x42842924UL))
|
|
#define bFM3_USB0_EP0OS_DRQO *((volatile unsigned int*)(0x42842928UL))
|
|
#define bFM3_USB0_EP0OS_SPKIE *((volatile unsigned int*)(0x42842934UL))
|
|
#define bFM3_USB0_EP0OS_DRQOIE *((volatile unsigned int*)(0x42842938UL))
|
|
#define bFM3_USB0_EP0OS_BFINI *((volatile unsigned int*)(0x4284293CUL))
|
|
#define bFM3_USB0_EP1S_SIZE10 *((volatile unsigned int*)(0x42842980UL))
|
|
#define bFM3_USB0_EP1S_SIZE11 *((volatile unsigned int*)(0x42842984UL))
|
|
#define bFM3_USB0_EP1S_SIZE12 *((volatile unsigned int*)(0x42842988UL))
|
|
#define bFM3_USB0_EP1S_SIZE13 *((volatile unsigned int*)(0x4284298CUL))
|
|
#define bFM3_USB0_EP1S_SIZE14 *((volatile unsigned int*)(0x42842990UL))
|
|
#define bFM3_USB0_EP1S_SIZE15 *((volatile unsigned int*)(0x42842994UL))
|
|
#define bFM3_USB0_EP1S_SIZE16 *((volatile unsigned int*)(0x42842998UL))
|
|
#define bFM3_USB0_EP1S_SIZE17 *((volatile unsigned int*)(0x4284299CUL))
|
|
#define bFM3_USB0_EP1S_SIZE18 *((volatile unsigned int*)(0x428429A0UL))
|
|
#define bFM3_USB0_EP1S_SPK *((volatile unsigned int*)(0x428429A4UL))
|
|
#define bFM3_USB0_EP1S_DRQ *((volatile unsigned int*)(0x428429A8UL))
|
|
#define bFM3_USB0_EP1S_BUSY *((volatile unsigned int*)(0x428429ACUL))
|
|
#define bFM3_USB0_EP1S_SPKIE *((volatile unsigned int*)(0x428429B4UL))
|
|
#define bFM3_USB0_EP1S_DRQIE *((volatile unsigned int*)(0x428429B8UL))
|
|
#define bFM3_USB0_EP1S_BFINI *((volatile unsigned int*)(0x428429BCUL))
|
|
#define bFM3_USB0_EP2S_SIZE20 *((volatile unsigned int*)(0x42842A00UL))
|
|
#define bFM3_USB0_EP2S_SIZE21 *((volatile unsigned int*)(0x42842A04UL))
|
|
#define bFM3_USB0_EP2S_SIZE22 *((volatile unsigned int*)(0x42842A08UL))
|
|
#define bFM3_USB0_EP2S_SIZE23 *((volatile unsigned int*)(0x42842A0CUL))
|
|
#define bFM3_USB0_EP2S_SIZE24 *((volatile unsigned int*)(0x42842A10UL))
|
|
#define bFM3_USB0_EP2S_SIZE25 *((volatile unsigned int*)(0x42842A14UL))
|
|
#define bFM3_USB0_EP2S_SIZE26 *((volatile unsigned int*)(0x42842A18UL))
|
|
#define bFM3_USB0_EP2S_SPK *((volatile unsigned int*)(0x42842A24UL))
|
|
#define bFM3_USB0_EP2S_DRQ *((volatile unsigned int*)(0x42842A28UL))
|
|
#define bFM3_USB0_EP2S_BUSY *((volatile unsigned int*)(0x42842A2CUL))
|
|
#define bFM3_USB0_EP2S_SPKIE *((volatile unsigned int*)(0x42842A34UL))
|
|
#define bFM3_USB0_EP2S_DRQIE *((volatile unsigned int*)(0x42842A38UL))
|
|
#define bFM3_USB0_EP2S_BFINI *((volatile unsigned int*)(0x42842A3CUL))
|
|
#define bFM3_USB0_EP3S_SIZE30 *((volatile unsigned int*)(0x42842A80UL))
|
|
#define bFM3_USB0_EP3S_SIZE31 *((volatile unsigned int*)(0x42842A84UL))
|
|
#define bFM3_USB0_EP3S_SIZE32 *((volatile unsigned int*)(0x42842A88UL))
|
|
#define bFM3_USB0_EP3S_SIZE33 *((volatile unsigned int*)(0x42842A8CUL))
|
|
#define bFM3_USB0_EP3S_SIZE34 *((volatile unsigned int*)(0x42842A90UL))
|
|
#define bFM3_USB0_EP3S_SIZE35 *((volatile unsigned int*)(0x42842A94UL))
|
|
#define bFM3_USB0_EP3S_SIZE36 *((volatile unsigned int*)(0x42842A98UL))
|
|
#define bFM3_USB0_EP3S_SPK *((volatile unsigned int*)(0x42842AA4UL))
|
|
#define bFM3_USB0_EP3S_DRQ *((volatile unsigned int*)(0x42842AA8UL))
|
|
#define bFM3_USB0_EP3S_BUSY *((volatile unsigned int*)(0x42842AACUL))
|
|
#define bFM3_USB0_EP3S_SPKIE *((volatile unsigned int*)(0x42842AB4UL))
|
|
#define bFM3_USB0_EP3S_DRQIE *((volatile unsigned int*)(0x42842AB8UL))
|
|
#define bFM3_USB0_EP3S_BFINI *((volatile unsigned int*)(0x42842ABCUL))
|
|
#define bFM3_USB0_EP4S_SIZE40 *((volatile unsigned int*)(0x42842B00UL))
|
|
#define bFM3_USB0_EP4S_SIZE41 *((volatile unsigned int*)(0x42842B04UL))
|
|
#define bFM3_USB0_EP4S_SIZE42 *((volatile unsigned int*)(0x42842B08UL))
|
|
#define bFM3_USB0_EP4S_SIZE43 *((volatile unsigned int*)(0x42842B0CUL))
|
|
#define bFM3_USB0_EP4S_SIZE44 *((volatile unsigned int*)(0x42842B10UL))
|
|
#define bFM3_USB0_EP4S_SIZE45 *((volatile unsigned int*)(0x42842B14UL))
|
|
#define bFM3_USB0_EP4S_SIZE46 *((volatile unsigned int*)(0x42842B18UL))
|
|
#define bFM3_USB0_EP4S_SPK *((volatile unsigned int*)(0x42842B24UL))
|
|
#define bFM3_USB0_EP4S_DRQ *((volatile unsigned int*)(0x42842B28UL))
|
|
#define bFM3_USB0_EP4S_BUSY *((volatile unsigned int*)(0x42842B2CUL))
|
|
#define bFM3_USB0_EP4S_SPKIE *((volatile unsigned int*)(0x42842B34UL))
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|
#define bFM3_USB0_EP4S_DRQIE *((volatile unsigned int*)(0x42842B38UL))
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|
#define bFM3_USB0_EP4S_BFINI *((volatile unsigned int*)(0x42842B3CUL))
|
|
#define bFM3_USB0_EP5S_SIZE50 *((volatile unsigned int*)(0x42842B80UL))
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|
#define bFM3_USB0_EP5S_SIZE51 *((volatile unsigned int*)(0x42842B84UL))
|
|
#define bFM3_USB0_EP5S_SIZE52 *((volatile unsigned int*)(0x42842B88UL))
|
|
#define bFM3_USB0_EP5S_SIZE53 *((volatile unsigned int*)(0x42842B8CUL))
|
|
#define bFM3_USB0_EP5S_SIZE54 *((volatile unsigned int*)(0x42842B90UL))
|
|
#define bFM3_USB0_EP5S_SIZE55 *((volatile unsigned int*)(0x42842B94UL))
|
|
#define bFM3_USB0_EP5S_SIZE56 *((volatile unsigned int*)(0x42842B98UL))
|
|
#define bFM3_USB0_EP5S_SPK *((volatile unsigned int*)(0x42842BA4UL))
|
|
#define bFM3_USB0_EP5S_DRQ *((volatile unsigned int*)(0x42842BA8UL))
|
|
#define bFM3_USB0_EP5S_BUSY *((volatile unsigned int*)(0x42842BACUL))
|
|
#define bFM3_USB0_EP5S_SPKIE *((volatile unsigned int*)(0x42842BB4UL))
|
|
#define bFM3_USB0_EP5S_DRQIE *((volatile unsigned int*)(0x42842BB8UL))
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|
#define bFM3_USB0_EP5S_BFINI *((volatile unsigned int*)(0x42842BBCUL))
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|
|
|
/* USB channel 1 registers */
|
|
#define bFM3_USB1_HCNT_HOST *((volatile unsigned int*)(0x42A42000UL))
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|
#define bFM3_USB1_HCNT_URST *((volatile unsigned int*)(0x42A42004UL))
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|
#define bFM3_USB1_HCNT_SOFIRE *((volatile unsigned int*)(0x42A42008UL))
|
|
#define bFM3_USB1_HCNT_DIRE *((volatile unsigned int*)(0x42A4200CUL))
|
|
#define bFM3_USB1_HCNT_CNNIRE *((volatile unsigned int*)(0x42A42010UL))
|
|
#define bFM3_USB1_HCNT_CMPIRE *((volatile unsigned int*)(0x42A42014UL))
|
|
#define bFM3_USB1_HCNT_URIRE *((volatile unsigned int*)(0x42A42018UL))
|
|
#define bFM3_USB1_HCNT_RWKIRE *((volatile unsigned int*)(0x42A4201CUL))
|
|
#define bFM3_USB1_HCNT_RETRY *((volatile unsigned int*)(0x42A42020UL))
|
|
#define bFM3_USB1_HCNT_CANCEL *((volatile unsigned int*)(0x42A42024UL))
|
|
#define bFM3_USB1_HCNT_SOFSTEP *((volatile unsigned int*)(0x42A42028UL))
|
|
#define bFM3_USB1_HCNT0_HOST *((volatile unsigned int*)(0x42A42000UL))
|
|
#define bFM3_USB1_HCNT0_URST *((volatile unsigned int*)(0x42A42004UL))
|
|
#define bFM3_USB1_HCNT0_SOFIRE *((volatile unsigned int*)(0x42A42008UL))
|
|
#define bFM3_USB1_HCNT0_DIRE *((volatile unsigned int*)(0x42A4200CUL))
|
|
#define bFM3_USB1_HCNT0_CNNIRE *((volatile unsigned int*)(0x42A42010UL))
|
|
#define bFM3_USB1_HCNT0_CMPIRE *((volatile unsigned int*)(0x42A42014UL))
|
|
#define bFM3_USB1_HCNT0_URIRE *((volatile unsigned int*)(0x42A42018UL))
|
|
#define bFM3_USB1_HCNT0_RWKIRE *((volatile unsigned int*)(0x42A4201CUL))
|
|
#define bFM3_USB1_HCNT1_RETRY *((volatile unsigned int*)(0x42A42020UL))
|
|
#define bFM3_USB1_HCNT1_CANCEL *((volatile unsigned int*)(0x42A42024UL))
|
|
#define bFM3_USB1_HCNT1_SOFSTEP *((volatile unsigned int*)(0x42A42028UL))
|
|
#define bFM3_USB1_HIRQ_SOFIRQ *((volatile unsigned int*)(0x42A42080UL))
|
|
#define bFM3_USB1_HIRQ_DIRQ *((volatile unsigned int*)(0x42A42084UL))
|
|
#define bFM3_USB1_HIRQ_CNNIRQ *((volatile unsigned int*)(0x42A42088UL))
|
|
#define bFM3_USB1_HIRQ_CMPIRQ *((volatile unsigned int*)(0x42A4208CUL))
|
|
#define bFM3_USB1_HIRQ_URIRQ *((volatile unsigned int*)(0x42A42090UL))
|
|
#define bFM3_USB1_HIRQ_RWKIRQ *((volatile unsigned int*)(0x42A42094UL))
|
|
#define bFM3_USB1_HIRQ_TCAN *((volatile unsigned int*)(0x42A4209CUL))
|
|
#define bFM3_USB1_HERR_HS0 *((volatile unsigned int*)(0x42A420A0UL))
|
|
#define bFM3_USB1_HERR_HS1 *((volatile unsigned int*)(0x42A420A4UL))
|
|
#define bFM3_USB1_HERR_STUFF *((volatile unsigned int*)(0x42A420A8UL))
|
|
#define bFM3_USB1_HERR_TGERR *((volatile unsigned int*)(0x42A420ACUL))
|
|
#define bFM3_USB1_HERR_CRC *((volatile unsigned int*)(0x42A420B0UL))
|
|
#define bFM3_USB1_HERR_TOUT *((volatile unsigned int*)(0x42A420B4UL))
|
|
#define bFM3_USB1_HERR_RERR *((volatile unsigned int*)(0x42A420B8UL))
|
|
#define bFM3_USB1_HERR_LSTOF *((volatile unsigned int*)(0x42A420BCUL))
|
|
#define bFM3_USB1_HSTATE_CSTAT *((volatile unsigned int*)(0x42A42100UL))
|
|
#define bFM3_USB1_HSTATE_TMODE *((volatile unsigned int*)(0x42A42104UL))
|
|
#define bFM3_USB1_HSTATE_SUSP *((volatile unsigned int*)(0x42A42108UL))
|
|
#define bFM3_USB1_HSTATE_SOFBUSY *((volatile unsigned int*)(0x42A4210CUL))
|
|
#define bFM3_USB1_HSTATE_CLKSEL *((volatile unsigned int*)(0x42A42110UL))
|
|
#define bFM3_USB1_HSTATE_ALIVE *((volatile unsigned int*)(0x42A42114UL))
|
|
#define bFM3_USB1_HFCOMP_FRAMECOMP0 *((volatile unsigned int*)(0x42A42120UL))
|
|
#define bFM3_USB1_HFCOMP_FRAMECOMP1 *((volatile unsigned int*)(0x42A42124UL))
|
|
#define bFM3_USB1_HFCOMP_FRAMECOMP2 *((volatile unsigned int*)(0x42A42128UL))
|
|
#define bFM3_USB1_HFCOMP_FRAMECOMP3 *((volatile unsigned int*)(0x42A4212CUL))
|
|
#define bFM3_USB1_HFCOMP_FRAMECOMP4 *((volatile unsigned int*)(0x42A42130UL))
|
|
#define bFM3_USB1_HFCOMP_FRAMECOMP5 *((volatile unsigned int*)(0x42A42134UL))
|
|
#define bFM3_USB1_HFCOMP_FRAMECOMP6 *((volatile unsigned int*)(0x42A42138UL))
|
|
#define bFM3_USB1_HFCOMP_FRAMECOMP7 *((volatile unsigned int*)(0x42A4213CUL))
|
|
#define bFM3_USB1_HRTIMER_RTIMER0 *((volatile unsigned int*)(0x42A42180UL))
|
|
#define bFM3_USB1_HRTIMER_RTIMER1 *((volatile unsigned int*)(0x42A42184UL))
|
|
#define bFM3_USB1_HRTIMER_RTIMER2 *((volatile unsigned int*)(0x42A42188UL))
|
|
#define bFM3_USB1_HRTIMER_RTIMER3 *((volatile unsigned int*)(0x42A4218CUL))
|
|
#define bFM3_USB1_HRTIMER_RTIMER4 *((volatile unsigned int*)(0x42A42190UL))
|
|
#define bFM3_USB1_HRTIMER_RTIMER5 *((volatile unsigned int*)(0x42A42194UL))
|
|
#define bFM3_USB1_HRTIMER_RTIMER6 *((volatile unsigned int*)(0x42A42198UL))
|
|
#define bFM3_USB1_HRTIMER_RTIMER7 *((volatile unsigned int*)(0x42A4219CUL))
|
|
#define bFM3_USB1_HRTIMER_RTIMER8 *((volatile unsigned int*)(0x42A421A0UL))
|
|
#define bFM3_USB1_HRTIMER_RTIMER9 *((volatile unsigned int*)(0x42A421A4UL))
|
|
#define bFM3_USB1_HRTIMER_RTIMER10 *((volatile unsigned int*)(0x42A421A8UL))
|
|
#define bFM3_USB1_HRTIMER_RTIMER11 *((volatile unsigned int*)(0x42A421ACUL))
|
|
#define bFM3_USB1_HRTIMER_RTIMER12 *((volatile unsigned int*)(0x42A421B0UL))
|
|
#define bFM3_USB1_HRTIMER_RTIMER13 *((volatile unsigned int*)(0x42A421B4UL))
|
|
#define bFM3_USB1_HRTIMER_RTIMER14 *((volatile unsigned int*)(0x42A421B8UL))
|
|
#define bFM3_USB1_HRTIMER_RTIMER15 *((volatile unsigned int*)(0x42A421BCUL))
|
|
#define bFM3_USB1_HRTIMER0_RTIMER00 *((volatile unsigned int*)(0x42A42180UL))
|
|
#define bFM3_USB1_HRTIMER0_RTIMER01 *((volatile unsigned int*)(0x42A42184UL))
|
|
#define bFM3_USB1_HRTIMER0_RTIMER02 *((volatile unsigned int*)(0x42A42188UL))
|
|
#define bFM3_USB1_HRTIMER0_RTIMER03 *((volatile unsigned int*)(0x42A4218CUL))
|
|
#define bFM3_USB1_HRTIMER0_RTIMER04 *((volatile unsigned int*)(0x42A42190UL))
|
|
#define bFM3_USB1_HRTIMER0_RTIMER05 *((volatile unsigned int*)(0x42A42194UL))
|
|
#define bFM3_USB1_HRTIMER0_RTIMER06 *((volatile unsigned int*)(0x42A42198UL))
|
|
#define bFM3_USB1_HRTIMER0_RTIMER07 *((volatile unsigned int*)(0x42A4219CUL))
|
|
#define bFM3_USB1_HRTIMER1_RTIMER10 *((volatile unsigned int*)(0x42A421A0UL))
|
|
#define bFM3_USB1_HRTIMER1_RTIMER11 *((volatile unsigned int*)(0x42A421A4UL))
|
|
#define bFM3_USB1_HRTIMER1_RTIMER12 *((volatile unsigned int*)(0x42A421A8UL))
|
|
#define bFM3_USB1_HRTIMER1_RTIMER13 *((volatile unsigned int*)(0x42A421ACUL))
|
|
#define bFM3_USB1_HRTIMER1_RTIMER14 *((volatile unsigned int*)(0x42A421B0UL))
|
|
#define bFM3_USB1_HRTIMER1_RTIMER15 *((volatile unsigned int*)(0x42A421B4UL))
|
|
#define bFM3_USB1_HRTIMER1_RTIMER16 *((volatile unsigned int*)(0x42A421B8UL))
|
|
#define bFM3_USB1_HRTIMER1_RTIMER17 *((volatile unsigned int*)(0x42A421BCUL))
|
|
#define bFM3_USB1_HRTIMER2_RTIMER20 *((volatile unsigned int*)(0x42A42200UL))
|
|
#define bFM3_USB1_HRTIMER2_RTIMER21 *((volatile unsigned int*)(0x42A42204UL))
|
|
#define bFM3_USB1_HRTIMER2_RTIMER22 *((volatile unsigned int*)(0x42A42208UL))
|
|
#define bFM3_USB1_HADR_ADDRESS0 *((volatile unsigned int*)(0x42A42220UL))
|
|
#define bFM3_USB1_HADR_ADDRESS1 *((volatile unsigned int*)(0x42A42224UL))
|
|
#define bFM3_USB1_HADR_ADDRESS2 *((volatile unsigned int*)(0x42A42228UL))
|
|
#define bFM3_USB1_HADR_ADDRESS3 *((volatile unsigned int*)(0x42A4222CUL))
|
|
#define bFM3_USB1_HADR_ADDRESS4 *((volatile unsigned int*)(0x42A42230UL))
|
|
#define bFM3_USB1_HADR_ADDRESS5 *((volatile unsigned int*)(0x42A42234UL))
|
|
#define bFM3_USB1_HADR_ADDRESS6 *((volatile unsigned int*)(0x42A42238UL))
|
|
#define bFM3_USB1_HEOF_EOF0 *((volatile unsigned int*)(0x42A42280UL))
|
|
#define bFM3_USB1_HEOF_EOF1 *((volatile unsigned int*)(0x42A42284UL))
|
|
#define bFM3_USB1_HEOF_EOF2 *((volatile unsigned int*)(0x42A42288UL))
|
|
#define bFM3_USB1_HEOF_EOF3 *((volatile unsigned int*)(0x42A4228CUL))
|
|
#define bFM3_USB1_HEOF_EOF4 *((volatile unsigned int*)(0x42A42290UL))
|
|
#define bFM3_USB1_HEOF_EOF5 *((volatile unsigned int*)(0x42A42294UL))
|
|
#define bFM3_USB1_HEOF_EOF6 *((volatile unsigned int*)(0x42A42298UL))
|
|
#define bFM3_USB1_HEOF_EOF7 *((volatile unsigned int*)(0x42A4229CUL))
|
|
#define bFM3_USB1_HEOF_EOF8 *((volatile unsigned int*)(0x42A422A0UL))
|
|
#define bFM3_USB1_HEOF_EOF9 *((volatile unsigned int*)(0x42A422A4UL))
|
|
#define bFM3_USB1_HEOF_EOF10 *((volatile unsigned int*)(0x42A422A8UL))
|
|
#define bFM3_USB1_HEOF_EOF11 *((volatile unsigned int*)(0x42A422ACUL))
|
|
#define bFM3_USB1_HEOF_EOF12 *((volatile unsigned int*)(0x42A422B0UL))
|
|
#define bFM3_USB1_HEOF_EOF13 *((volatile unsigned int*)(0x42A422B4UL))
|
|
#define bFM3_USB1_HEOF_EOF14 *((volatile unsigned int*)(0x42A422B8UL))
|
|
#define bFM3_USB1_HEOF_EOF15 *((volatile unsigned int*)(0x42A422BCUL))
|
|
#define bFM3_USB1_HEOF0_EOF00 *((volatile unsigned int*)(0x42A42280UL))
|
|
#define bFM3_USB1_HEOF0_EOF01 *((volatile unsigned int*)(0x42A42284UL))
|
|
#define bFM3_USB1_HEOF0_EOF02 *((volatile unsigned int*)(0x42A42288UL))
|
|
#define bFM3_USB1_HEOF0_EOF03 *((volatile unsigned int*)(0x42A4228CUL))
|
|
#define bFM3_USB1_HEOF0_EOF04 *((volatile unsigned int*)(0x42A42290UL))
|
|
#define bFM3_USB1_HEOF0_EOF05 *((volatile unsigned int*)(0x42A42294UL))
|
|
#define bFM3_USB1_HEOF0_EOF06 *((volatile unsigned int*)(0x42A42298UL))
|
|
#define bFM3_USB1_HEOF0_EOF07 *((volatile unsigned int*)(0x42A4229CUL))
|
|
#define bFM3_USB1_HEOF1_EOF10 *((volatile unsigned int*)(0x42A422A0UL))
|
|
#define bFM3_USB1_HEOF1_EOF11 *((volatile unsigned int*)(0x42A422A4UL))
|
|
#define bFM3_USB1_HEOF1_EOF12 *((volatile unsigned int*)(0x42A422A8UL))
|
|
#define bFM3_USB1_HEOF1_EOF13 *((volatile unsigned int*)(0x42A422ACUL))
|
|
#define bFM3_USB1_HEOF1_EOF14 *((volatile unsigned int*)(0x42A422B0UL))
|
|
#define bFM3_USB1_HEOF1_EOF15 *((volatile unsigned int*)(0x42A422B4UL))
|
|
#define bFM3_USB1_HFRAME_FRAME0 *((volatile unsigned int*)(0x42A42300UL))
|
|
#define bFM3_USB1_HFRAME_FRAME1 *((volatile unsigned int*)(0x42A42304UL))
|
|
#define bFM3_USB1_HFRAME_FRAME2 *((volatile unsigned int*)(0x42A42308UL))
|
|
#define bFM3_USB1_HFRAME_FRAME3 *((volatile unsigned int*)(0x42A4230CUL))
|
|
#define bFM3_USB1_HFRAME_FRAME4 *((volatile unsigned int*)(0x42A42310UL))
|
|
#define bFM3_USB1_HFRAME_FRAME5 *((volatile unsigned int*)(0x42A42314UL))
|
|
#define bFM3_USB1_HFRAME_FRAME6 *((volatile unsigned int*)(0x42A42318UL))
|
|
#define bFM3_USB1_HFRAME_FRAME7 *((volatile unsigned int*)(0x42A4231CUL))
|
|
#define bFM3_USB1_HFRAME_FRAME8 *((volatile unsigned int*)(0x42A42320UL))
|
|
#define bFM3_USB1_HFRAME_FRAME9 *((volatile unsigned int*)(0x42A42324UL))
|
|
#define bFM3_USB1_HFRAME_FRAME10 *((volatile unsigned int*)(0x42A42328UL))
|
|
#define bFM3_USB1_HFRAME0_FRAME00 *((volatile unsigned int*)(0x42A42300UL))
|
|
#define bFM3_USB1_HFRAME0_FRAME01 *((volatile unsigned int*)(0x42A42304UL))
|
|
#define bFM3_USB1_HFRAME0_FRAME02 *((volatile unsigned int*)(0x42A42308UL))
|
|
#define bFM3_USB1_HFRAME0_FRAME03 *((volatile unsigned int*)(0x42A4230CUL))
|
|
#define bFM3_USB1_HFRAME0_FRAME04 *((volatile unsigned int*)(0x42A42310UL))
|
|
#define bFM3_USB1_HFRAME0_FRAME05 *((volatile unsigned int*)(0x42A42314UL))
|
|
#define bFM3_USB1_HFRAME0_FRAME06 *((volatile unsigned int*)(0x42A42318UL))
|
|
#define bFM3_USB1_HFRAME0_FRAME07 *((volatile unsigned int*)(0x42A4231CUL))
|
|
#define bFM3_USB1_HFRAME1_FRAME10 *((volatile unsigned int*)(0x42A42320UL))
|
|
#define bFM3_USB1_HFRAME1_FRAME11 *((volatile unsigned int*)(0x42A42324UL))
|
|
#define bFM3_USB1_HFRAME1_FRAME12 *((volatile unsigned int*)(0x42A42328UL))
|
|
#define bFM3_USB1_HFRAME1_FRAME13 *((volatile unsigned int*)(0x42A4232CUL))
|
|
#define bFM3_USB1_HTOKEN_ENDPT0 *((volatile unsigned int*)(0x42A42380UL))
|
|
#define bFM3_USB1_HTOKEN_ENDPT1 *((volatile unsigned int*)(0x42A42384UL))
|
|
#define bFM3_USB1_HTOKEN_ENDPT2 *((volatile unsigned int*)(0x42A42388UL))
|
|
#define bFM3_USB1_HTOKEN_ENDPT3 *((volatile unsigned int*)(0x42A4238CUL))
|
|
#define bFM3_USB1_HTOKEN_TKNEN0 *((volatile unsigned int*)(0x42A42390UL))
|
|
#define bFM3_USB1_HTOKEN_TKNEN1 *((volatile unsigned int*)(0x42A42394UL))
|
|
#define bFM3_USB1_HTOKEN_TKNEN2 *((volatile unsigned int*)(0x42A42398UL))
|
|
#define bFM3_USB1_HTOKEN_TGGL *((volatile unsigned int*)(0x42A4239CUL))
|
|
#define bFM3_USB1_UDCC_PWC *((volatile unsigned int*)(0x42A42400UL))
|
|
#define bFM3_USB1_UDCC_RFBK *((volatile unsigned int*)(0x42A42404UL))
|
|
#define bFM3_USB1_UDCC_STALCLREN *((volatile unsigned int*)(0x42A4240CUL))
|
|
#define bFM3_USB1_UDCC_USTP *((volatile unsigned int*)(0x42A42410UL))
|
|
#define bFM3_USB1_UDCC_HCONX *((volatile unsigned int*)(0x42A42414UL))
|
|
#define bFM3_USB1_UDCC_RESUM *((volatile unsigned int*)(0x42A42418UL))
|
|
#define bFM3_USB1_UDCC_RST *((volatile unsigned int*)(0x42A4241CUL))
|
|
#define bFM3_USB1_EP0C_PKS00 *((volatile unsigned int*)(0x42A42480UL))
|
|
#define bFM3_USB1_EP0C_PKS01 *((volatile unsigned int*)(0x42A42484UL))
|
|
#define bFM3_USB1_EP0C_PKS02 *((volatile unsigned int*)(0x42A42488UL))
|
|
#define bFM3_USB1_EP0C_PKS03 *((volatile unsigned int*)(0x42A4248CUL))
|
|
#define bFM3_USB1_EP0C_PKS04 *((volatile unsigned int*)(0x42A42490UL))
|
|
#define bFM3_USB1_EP0C_PKS05 *((volatile unsigned int*)(0x42A42494UL))
|
|
#define bFM3_USB1_EP0C_PKS06 *((volatile unsigned int*)(0x42A42498UL))
|
|
#define bFM3_USB1_EP0C_STAL *((volatile unsigned int*)(0x42A424A4UL))
|
|
#define bFM3_USB1_EP1C_PKS10 *((volatile unsigned int*)(0x42A42500UL))
|
|
#define bFM3_USB1_EP1C_PKS11 *((volatile unsigned int*)(0x42A42504UL))
|
|
#define bFM3_USB1_EP1C_PKS12 *((volatile unsigned int*)(0x42A42508UL))
|
|
#define bFM3_USB1_EP1C_PKS13 *((volatile unsigned int*)(0x42A4250CUL))
|
|
#define bFM3_USB1_EP1C_PKS14 *((volatile unsigned int*)(0x42A42510UL))
|
|
#define bFM3_USB1_EP1C_PKS15 *((volatile unsigned int*)(0x42A42514UL))
|
|
#define bFM3_USB1_EP1C_PKS16 *((volatile unsigned int*)(0x42A42518UL))
|
|
#define bFM3_USB1_EP1C_PKS17 *((volatile unsigned int*)(0x42A4251CUL))
|
|
#define bFM3_USB1_EP1C_PKS18 *((volatile unsigned int*)(0x42A42520UL))
|
|
#define bFM3_USB1_EP1C_STAL *((volatile unsigned int*)(0x42A42524UL))
|
|
#define bFM3_USB1_EP1C_NULE *((volatile unsigned int*)(0x42A42528UL))
|
|
#define bFM3_USB1_EP1C_DMAE *((volatile unsigned int*)(0x42A4252CUL))
|
|
#define bFM3_USB1_EP1C_DIR *((volatile unsigned int*)(0x42A42530UL))
|
|
#define bFM3_USB1_EP1C_TYPE0 *((volatile unsigned int*)(0x42A42534UL))
|
|
#define bFM3_USB1_EP1C_TYPE1 *((volatile unsigned int*)(0x42A42538UL))
|
|
#define bFM3_USB1_EP1C_EPEN *((volatile unsigned int*)(0x42A4253CUL))
|
|
#define bFM3_USB1_EP2C_PKS20 *((volatile unsigned int*)(0x42A42580UL))
|
|
#define bFM3_USB1_EP2C_PKS21 *((volatile unsigned int*)(0x42A42584UL))
|
|
#define bFM3_USB1_EP2C_PKS22 *((volatile unsigned int*)(0x42A42588UL))
|
|
#define bFM3_USB1_EP2C_PKS23 *((volatile unsigned int*)(0x42A4258CUL))
|
|
#define bFM3_USB1_EP2C_PKS24 *((volatile unsigned int*)(0x42A42590UL))
|
|
#define bFM3_USB1_EP2C_PKS25 *((volatile unsigned int*)(0x42A42594UL))
|
|
#define bFM3_USB1_EP2C_PKS26 *((volatile unsigned int*)(0x42A42598UL))
|
|
#define bFM3_USB1_EP2C_STAL *((volatile unsigned int*)(0x42A425A4UL))
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#define bFM3_USB1_EP2C_NULE *((volatile unsigned int*)(0x42A425A8UL))
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|
#define bFM3_USB1_EP2C_DMAE *((volatile unsigned int*)(0x42A425ACUL))
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|
#define bFM3_USB1_EP2C_DIR *((volatile unsigned int*)(0x42A425B0UL))
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|
#define bFM3_USB1_EP2C_TYPE0 *((volatile unsigned int*)(0x42A425B4UL))
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#define bFM3_USB1_EP2C_TYPE1 *((volatile unsigned int*)(0x42A425B8UL))
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#define bFM3_USB1_EP2C_EPEN *((volatile unsigned int*)(0x42A425BCUL))
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#define bFM3_USB1_EP3C_PKS30 *((volatile unsigned int*)(0x42A42600UL))
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#define bFM3_USB1_EP3C_PKS31 *((volatile unsigned int*)(0x42A42604UL))
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|
#define bFM3_USB1_EP3C_PKS32 *((volatile unsigned int*)(0x42A42608UL))
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|
#define bFM3_USB1_EP3C_PKS33 *((volatile unsigned int*)(0x42A4260CUL))
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#define bFM3_USB1_EP3C_PKS34 *((volatile unsigned int*)(0x42A42610UL))
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|
#define bFM3_USB1_EP3C_PKS35 *((volatile unsigned int*)(0x42A42614UL))
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|
#define bFM3_USB1_EP3C_PKS36 *((volatile unsigned int*)(0x42A42618UL))
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|
#define bFM3_USB1_EP3C_STAL *((volatile unsigned int*)(0x42A42624UL))
|
|
#define bFM3_USB1_EP3C_NULE *((volatile unsigned int*)(0x42A42628UL))
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|
#define bFM3_USB1_EP3C_DMAE *((volatile unsigned int*)(0x42A4262CUL))
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|
#define bFM3_USB1_EP3C_DIR *((volatile unsigned int*)(0x42A42630UL))
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|
#define bFM3_USB1_EP3C_TYPE0 *((volatile unsigned int*)(0x42A42634UL))
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|
#define bFM3_USB1_EP3C_TYPE1 *((volatile unsigned int*)(0x42A42638UL))
|
|
#define bFM3_USB1_EP3C_EPEN *((volatile unsigned int*)(0x42A4263CUL))
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#define bFM3_USB1_EP4C_PKS40 *((volatile unsigned int*)(0x42A42680UL))
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|
#define bFM3_USB1_EP4C_PKS41 *((volatile unsigned int*)(0x42A42684UL))
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|
#define bFM3_USB1_EP4C_PKS42 *((volatile unsigned int*)(0x42A42688UL))
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|
#define bFM3_USB1_EP4C_PKS43 *((volatile unsigned int*)(0x42A4268CUL))
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|
#define bFM3_USB1_EP4C_PKS44 *((volatile unsigned int*)(0x42A42690UL))
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|
#define bFM3_USB1_EP4C_PKS45 *((volatile unsigned int*)(0x42A42694UL))
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|
#define bFM3_USB1_EP4C_PKS46 *((volatile unsigned int*)(0x42A42698UL))
|
|
#define bFM3_USB1_EP4C_STAL *((volatile unsigned int*)(0x42A426A4UL))
|
|
#define bFM3_USB1_EP4C_NULE *((volatile unsigned int*)(0x42A426A8UL))
|
|
#define bFM3_USB1_EP4C_DMAE *((volatile unsigned int*)(0x42A426ACUL))
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|
#define bFM3_USB1_EP4C_DIR *((volatile unsigned int*)(0x42A426B0UL))
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|
#define bFM3_USB1_EP4C_TYPE0 *((volatile unsigned int*)(0x42A426B4UL))
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|
#define bFM3_USB1_EP4C_TYPE1 *((volatile unsigned int*)(0x42A426B8UL))
|
|
#define bFM3_USB1_EP4C_EPEN *((volatile unsigned int*)(0x42A426BCUL))
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|
#define bFM3_USB1_EP5C_PKS50 *((volatile unsigned int*)(0x42A42700UL))
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|
#define bFM3_USB1_EP5C_PKS51 *((volatile unsigned int*)(0x42A42704UL))
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|
#define bFM3_USB1_EP5C_PKS52 *((volatile unsigned int*)(0x42A42708UL))
|
|
#define bFM3_USB1_EP5C_PKS53 *((volatile unsigned int*)(0x42A4270CUL))
|
|
#define bFM3_USB1_EP5C_PKS54 *((volatile unsigned int*)(0x42A42710UL))
|
|
#define bFM3_USB1_EP5C_PKS55 *((volatile unsigned int*)(0x42A42714UL))
|
|
#define bFM3_USB1_EP5C_PKS56 *((volatile unsigned int*)(0x42A42718UL))
|
|
#define bFM3_USB1_EP5C_STAL *((volatile unsigned int*)(0x42A42724UL))
|
|
#define bFM3_USB1_EP5C_NULE *((volatile unsigned int*)(0x42A42728UL))
|
|
#define bFM3_USB1_EP5C_DMAE *((volatile unsigned int*)(0x42A4272CUL))
|
|
#define bFM3_USB1_EP5C_DIR *((volatile unsigned int*)(0x42A42730UL))
|
|
#define bFM3_USB1_EP5C_TYPE0 *((volatile unsigned int*)(0x42A42734UL))
|
|
#define bFM3_USB1_EP5C_TYPE1 *((volatile unsigned int*)(0x42A42738UL))
|
|
#define bFM3_USB1_EP5C_EPEN *((volatile unsigned int*)(0x42A4273CUL))
|
|
#define bFM3_USB1_TMSP_TMSP0 *((volatile unsigned int*)(0x42A42780UL))
|
|
#define bFM3_USB1_TMSP_TMSP1 *((volatile unsigned int*)(0x42A42784UL))
|
|
#define bFM3_USB1_TMSP_TMSP2 *((volatile unsigned int*)(0x42A42788UL))
|
|
#define bFM3_USB1_TMSP_TMSP3 *((volatile unsigned int*)(0x42A4278CUL))
|
|
#define bFM3_USB1_TMSP_TMSP4 *((volatile unsigned int*)(0x42A42790UL))
|
|
#define bFM3_USB1_TMSP_TMSP5 *((volatile unsigned int*)(0x42A42794UL))
|
|
#define bFM3_USB1_TMSP_TMSP6 *((volatile unsigned int*)(0x42A42798UL))
|
|
#define bFM3_USB1_TMSP_TMSP7 *((volatile unsigned int*)(0x42A4279CUL))
|
|
#define bFM3_USB1_TMSP_TMSP8 *((volatile unsigned int*)(0x42A427A0UL))
|
|
#define bFM3_USB1_TMSP_TMSP9 *((volatile unsigned int*)(0x42A427A4UL))
|
|
#define bFM3_USB1_TMSP_TMSP10 *((volatile unsigned int*)(0x42A427A8UL))
|
|
#define bFM3_USB1_UDCS_CONF *((volatile unsigned int*)(0x42A42800UL))
|
|
#define bFM3_USB1_UDCS_SETP *((volatile unsigned int*)(0x42A42804UL))
|
|
#define bFM3_USB1_UDCS_WKUP *((volatile unsigned int*)(0x42A42808UL))
|
|
#define bFM3_USB1_UDCS_BRST *((volatile unsigned int*)(0x42A4280CUL))
|
|
#define bFM3_USB1_UDCS_SOF *((volatile unsigned int*)(0x42A42810UL))
|
|
#define bFM3_USB1_UDCS_SUSP *((volatile unsigned int*)(0x42A42814UL))
|
|
#define bFM3_USB1_UDCIE_CONFIE *((volatile unsigned int*)(0x42A42820UL))
|
|
#define bFM3_USB1_UDCIE_CONFN *((volatile unsigned int*)(0x42A42824UL))
|
|
#define bFM3_USB1_UDCIE_WKUPIE *((volatile unsigned int*)(0x42A42828UL))
|
|
#define bFM3_USB1_UDCIE_BRSTIE *((volatile unsigned int*)(0x42A4282CUL))
|
|
#define bFM3_USB1_UDCIE_SOFIE *((volatile unsigned int*)(0x42A42830UL))
|
|
#define bFM3_USB1_UDCIE_SUSPIE *((volatile unsigned int*)(0x42A42834UL))
|
|
#define bFM3_USB1_EP0IS_DRQI *((volatile unsigned int*)(0x42A428A8UL))
|
|
#define bFM3_USB1_EP0IS_DRQIIE *((volatile unsigned int*)(0x42A428B8UL))
|
|
#define bFM3_USB1_EP0IS_BFINI *((volatile unsigned int*)(0x42A428BCUL))
|
|
#define bFM3_USB1_EP0OS_SIZE0 *((volatile unsigned int*)(0x42A42900UL))
|
|
#define bFM3_USB1_EP0OS_SIZE1 *((volatile unsigned int*)(0x42A42904UL))
|
|
#define bFM3_USB1_EP0OS_SIZE2 *((volatile unsigned int*)(0x42A42908UL))
|
|
#define bFM3_USB1_EP0OS_SIZE3 *((volatile unsigned int*)(0x42A4290CUL))
|
|
#define bFM3_USB1_EP0OS_SIZE4 *((volatile unsigned int*)(0x42A42910UL))
|
|
#define bFM3_USB1_EP0OS_SIZE5 *((volatile unsigned int*)(0x42A42914UL))
|
|
#define bFM3_USB1_EP0OS_SIZE6 *((volatile unsigned int*)(0x42A42918UL))
|
|
#define bFM3_USB1_EP0OS_SPK *((volatile unsigned int*)(0x42A42924UL))
|
|
#define bFM3_USB1_EP0OS_DRQO *((volatile unsigned int*)(0x42A42928UL))
|
|
#define bFM3_USB1_EP0OS_SPKIE *((volatile unsigned int*)(0x42A42934UL))
|
|
#define bFM3_USB1_EP0OS_DRQOIE *((volatile unsigned int*)(0x42A42938UL))
|
|
#define bFM3_USB1_EP0OS_BFINI *((volatile unsigned int*)(0x42A4293CUL))
|
|
#define bFM3_USB1_EP1S_SIZE10 *((volatile unsigned int*)(0x42A42980UL))
|
|
#define bFM3_USB1_EP1S_SIZE11 *((volatile unsigned int*)(0x42A42984UL))
|
|
#define bFM3_USB1_EP1S_SIZE12 *((volatile unsigned int*)(0x42A42988UL))
|
|
#define bFM3_USB1_EP1S_SIZE13 *((volatile unsigned int*)(0x42A4298CUL))
|
|
#define bFM3_USB1_EP1S_SIZE14 *((volatile unsigned int*)(0x42A42990UL))
|
|
#define bFM3_USB1_EP1S_SIZE15 *((volatile unsigned int*)(0x42A42994UL))
|
|
#define bFM3_USB1_EP1S_SIZE16 *((volatile unsigned int*)(0x42A42998UL))
|
|
#define bFM3_USB1_EP1S_SIZE17 *((volatile unsigned int*)(0x42A4299CUL))
|
|
#define bFM3_USB1_EP1S_SIZE18 *((volatile unsigned int*)(0x42A429A0UL))
|
|
#define bFM3_USB1_EP1S_SPK *((volatile unsigned int*)(0x42A429A4UL))
|
|
#define bFM3_USB1_EP1S_DRQ *((volatile unsigned int*)(0x42A429A8UL))
|
|
#define bFM3_USB1_EP1S_BUSY *((volatile unsigned int*)(0x42A429ACUL))
|
|
#define bFM3_USB1_EP1S_SPKIE *((volatile unsigned int*)(0x42A429B4UL))
|
|
#define bFM3_USB1_EP1S_DRQIE *((volatile unsigned int*)(0x42A429B8UL))
|
|
#define bFM3_USB1_EP1S_BFINI *((volatile unsigned int*)(0x42A429BCUL))
|
|
#define bFM3_USB1_EP2S_SIZE20 *((volatile unsigned int*)(0x42A42A00UL))
|
|
#define bFM3_USB1_EP2S_SIZE21 *((volatile unsigned int*)(0x42A42A04UL))
|
|
#define bFM3_USB1_EP2S_SIZE22 *((volatile unsigned int*)(0x42A42A08UL))
|
|
#define bFM3_USB1_EP2S_SIZE23 *((volatile unsigned int*)(0x42A42A0CUL))
|
|
#define bFM3_USB1_EP2S_SIZE24 *((volatile unsigned int*)(0x42A42A10UL))
|
|
#define bFM3_USB1_EP2S_SIZE25 *((volatile unsigned int*)(0x42A42A14UL))
|
|
#define bFM3_USB1_EP2S_SIZE26 *((volatile unsigned int*)(0x42A42A18UL))
|
|
#define bFM3_USB1_EP2S_SPK *((volatile unsigned int*)(0x42A42A24UL))
|
|
#define bFM3_USB1_EP2S_DRQ *((volatile unsigned int*)(0x42A42A28UL))
|
|
#define bFM3_USB1_EP2S_BUSY *((volatile unsigned int*)(0x42A42A2CUL))
|
|
#define bFM3_USB1_EP2S_SPKIE *((volatile unsigned int*)(0x42A42A34UL))
|
|
#define bFM3_USB1_EP2S_DRQIE *((volatile unsigned int*)(0x42A42A38UL))
|
|
#define bFM3_USB1_EP2S_BFINI *((volatile unsigned int*)(0x42A42A3CUL))
|
|
#define bFM3_USB1_EP3S_SIZE30 *((volatile unsigned int*)(0x42A42A80UL))
|
|
#define bFM3_USB1_EP3S_SIZE31 *((volatile unsigned int*)(0x42A42A84UL))
|
|
#define bFM3_USB1_EP3S_SIZE32 *((volatile unsigned int*)(0x42A42A88UL))
|
|
#define bFM3_USB1_EP3S_SIZE33 *((volatile unsigned int*)(0x42A42A8CUL))
|
|
#define bFM3_USB1_EP3S_SIZE34 *((volatile unsigned int*)(0x42A42A90UL))
|
|
#define bFM3_USB1_EP3S_SIZE35 *((volatile unsigned int*)(0x42A42A94UL))
|
|
#define bFM3_USB1_EP3S_SIZE36 *((volatile unsigned int*)(0x42A42A98UL))
|
|
#define bFM3_USB1_EP3S_SPK *((volatile unsigned int*)(0x42A42AA4UL))
|
|
#define bFM3_USB1_EP3S_DRQ *((volatile unsigned int*)(0x42A42AA8UL))
|
|
#define bFM3_USB1_EP3S_BUSY *((volatile unsigned int*)(0x42A42AACUL))
|
|
#define bFM3_USB1_EP3S_SPKIE *((volatile unsigned int*)(0x42A42AB4UL))
|
|
#define bFM3_USB1_EP3S_DRQIE *((volatile unsigned int*)(0x42A42AB8UL))
|
|
#define bFM3_USB1_EP3S_BFINI *((volatile unsigned int*)(0x42A42ABCUL))
|
|
#define bFM3_USB1_EP4S_SIZE40 *((volatile unsigned int*)(0x42A42B00UL))
|
|
#define bFM3_USB1_EP4S_SIZE41 *((volatile unsigned int*)(0x42A42B04UL))
|
|
#define bFM3_USB1_EP4S_SIZE42 *((volatile unsigned int*)(0x42A42B08UL))
|
|
#define bFM3_USB1_EP4S_SIZE43 *((volatile unsigned int*)(0x42A42B0CUL))
|
|
#define bFM3_USB1_EP4S_SIZE44 *((volatile unsigned int*)(0x42A42B10UL))
|
|
#define bFM3_USB1_EP4S_SIZE45 *((volatile unsigned int*)(0x42A42B14UL))
|
|
#define bFM3_USB1_EP4S_SIZE46 *((volatile unsigned int*)(0x42A42B18UL))
|
|
#define bFM3_USB1_EP4S_SPK *((volatile unsigned int*)(0x42A42B24UL))
|
|
#define bFM3_USB1_EP4S_DRQ *((volatile unsigned int*)(0x42A42B28UL))
|
|
#define bFM3_USB1_EP4S_BUSY *((volatile unsigned int*)(0x42A42B2CUL))
|
|
#define bFM3_USB1_EP4S_SPKIE *((volatile unsigned int*)(0x42A42B34UL))
|
|
#define bFM3_USB1_EP4S_DRQIE *((volatile unsigned int*)(0x42A42B38UL))
|
|
#define bFM3_USB1_EP4S_BFINI *((volatile unsigned int*)(0x42A42B3CUL))
|
|
#define bFM3_USB1_EP5S_SIZE50 *((volatile unsigned int*)(0x42A42B80UL))
|
|
#define bFM3_USB1_EP5S_SIZE51 *((volatile unsigned int*)(0x42A42B84UL))
|
|
#define bFM3_USB1_EP5S_SIZE52 *((volatile unsigned int*)(0x42A42B88UL))
|
|
#define bFM3_USB1_EP5S_SIZE53 *((volatile unsigned int*)(0x42A42B8CUL))
|
|
#define bFM3_USB1_EP5S_SIZE54 *((volatile unsigned int*)(0x42A42B90UL))
|
|
#define bFM3_USB1_EP5S_SIZE55 *((volatile unsigned int*)(0x42A42B94UL))
|
|
#define bFM3_USB1_EP5S_SIZE56 *((volatile unsigned int*)(0x42A42B98UL))
|
|
#define bFM3_USB1_EP5S_SPK *((volatile unsigned int*)(0x42A42BA4UL))
|
|
#define bFM3_USB1_EP5S_DRQ *((volatile unsigned int*)(0x42A42BA8UL))
|
|
#define bFM3_USB1_EP5S_BUSY *((volatile unsigned int*)(0x42A42BACUL))
|
|
#define bFM3_USB1_EP5S_SPKIE *((volatile unsigned int*)(0x42A42BB4UL))
|
|
#define bFM3_USB1_EP5S_DRQIE *((volatile unsigned int*)(0x42A42BB8UL))
|
|
#define bFM3_USB1_EP5S_BFINI *((volatile unsigned int*)(0x42A42BBCUL))
|
|
|
|
/* DMA controller */
|
|
#define bFM3_DMAC_DMACR_DH0 *((volatile unsigned int*)(0x42C00060UL))
|
|
#define bFM3_DMAC_DMACR_DH1 *((volatile unsigned int*)(0x42C00064UL))
|
|
#define bFM3_DMAC_DMACR_DH2 *((volatile unsigned int*)(0x42C00068UL))
|
|
#define bFM3_DMAC_DMACR_DH3 *((volatile unsigned int*)(0x42C0006CUL))
|
|
#define bFM3_DMAC_DMACR_PR *((volatile unsigned int*)(0x42C00070UL))
|
|
#define bFM3_DMAC_DMACR_DS *((volatile unsigned int*)(0x42C00078UL))
|
|
#define bFM3_DMAC_DMACR_DE *((volatile unsigned int*)(0x42C0007CUL))
|
|
#define bFM3_DMAC_DMACA0_TC0 *((volatile unsigned int*)(0x42C00200UL))
|
|
#define bFM3_DMAC_DMACA0_TC1 *((volatile unsigned int*)(0x42C00204UL))
|
|
#define bFM3_DMAC_DMACA0_TC2 *((volatile unsigned int*)(0x42C00208UL))
|
|
#define bFM3_DMAC_DMACA0_TC3 *((volatile unsigned int*)(0x42C0020CUL))
|
|
#define bFM3_DMAC_DMACA0_TC4 *((volatile unsigned int*)(0x42C00210UL))
|
|
#define bFM3_DMAC_DMACA0_TC5 *((volatile unsigned int*)(0x42C00214UL))
|
|
#define bFM3_DMAC_DMACA0_TC6 *((volatile unsigned int*)(0x42C00218UL))
|
|
#define bFM3_DMAC_DMACA0_TC7 *((volatile unsigned int*)(0x42C0021CUL))
|
|
#define bFM3_DMAC_DMACA0_TC8 *((volatile unsigned int*)(0x42C00220UL))
|
|
#define bFM3_DMAC_DMACA0_TC9 *((volatile unsigned int*)(0x42C00224UL))
|
|
#define bFM3_DMAC_DMACA0_TC10 *((volatile unsigned int*)(0x42C00228UL))
|
|
#define bFM3_DMAC_DMACA0_TC11 *((volatile unsigned int*)(0x42C0022CUL))
|
|
#define bFM3_DMAC_DMACA0_TC12 *((volatile unsigned int*)(0x42C00230UL))
|
|
#define bFM3_DMAC_DMACA0_TC13 *((volatile unsigned int*)(0x42C00234UL))
|
|
#define bFM3_DMAC_DMACA0_TC14 *((volatile unsigned int*)(0x42C00238UL))
|
|
#define bFM3_DMAC_DMACA0_TC15 *((volatile unsigned int*)(0x42C0023CUL))
|
|
#define bFM3_DMAC_DMACA0_BC0 *((volatile unsigned int*)(0x42C00240UL))
|
|
#define bFM3_DMAC_DMACA0_BC1 *((volatile unsigned int*)(0x42C00244UL))
|
|
#define bFM3_DMAC_DMACA0_BC2 *((volatile unsigned int*)(0x42C00248UL))
|
|
#define bFM3_DMAC_DMACA0_BC3 *((volatile unsigned int*)(0x42C0024CUL))
|
|
#define bFM3_DMAC_DMACA0_IS0 *((volatile unsigned int*)(0x42C0025CUL))
|
|
#define bFM3_DMAC_DMACA0_IS1 *((volatile unsigned int*)(0x42C00260UL))
|
|
#define bFM3_DMAC_DMACA0_IS2 *((volatile unsigned int*)(0x42C00264UL))
|
|
#define bFM3_DMAC_DMACA0_IS3 *((volatile unsigned int*)(0x42C00268UL))
|
|
#define bFM3_DMAC_DMACA0_IS4 *((volatile unsigned int*)(0x42C0026CUL))
|
|
#define bFM3_DMAC_DMACA0_IS5 *((volatile unsigned int*)(0x42C00270UL))
|
|
#define bFM3_DMAC_DMACA0_ST *((volatile unsigned int*)(0x42C00274UL))
|
|
#define bFM3_DMAC_DMACA0_PB *((volatile unsigned int*)(0x42C00278UL))
|
|
#define bFM3_DMAC_DMACA0_EB *((volatile unsigned int*)(0x42C0027CUL))
|
|
#define bFM3_DMAC_DMACB0_EM *((volatile unsigned int*)(0x42C00280UL))
|
|
#define bFM3_DMAC_DMACB0_SS0 *((volatile unsigned int*)(0x42C002C0UL))
|
|
#define bFM3_DMAC_DMACB0_SS1 *((volatile unsigned int*)(0x42C002C4UL))
|
|
#define bFM3_DMAC_DMACB0_SS2 *((volatile unsigned int*)(0x42C002C8UL))
|
|
#define bFM3_DMAC_DMACB0_CI *((volatile unsigned int*)(0x42C002CCUL))
|
|
#define bFM3_DMAC_DMACB0_EI *((volatile unsigned int*)(0x42C002D0UL))
|
|
#define bFM3_DMAC_DMACB0_RD *((volatile unsigned int*)(0x42C002D4UL))
|
|
#define bFM3_DMAC_DMACB0_RS *((volatile unsigned int*)(0x42C002D8UL))
|
|
#define bFM3_DMAC_DMACB0_RC *((volatile unsigned int*)(0x42C002DCUL))
|
|
#define bFM3_DMAC_DMACB0_FD *((volatile unsigned int*)(0x42C002E0UL))
|
|
#define bFM3_DMAC_DMACB0_FS *((volatile unsigned int*)(0x42C002E4UL))
|
|
#define bFM3_DMAC_DMACB0_TW0 *((volatile unsigned int*)(0x42C002E8UL))
|
|
#define bFM3_DMAC_DMACB0_TW1 *((volatile unsigned int*)(0x42C002ECUL))
|
|
#define bFM3_DMAC_DMACB0_MS0 *((volatile unsigned int*)(0x42C002F0UL))
|
|
#define bFM3_DMAC_DMACB0_MS1 *((volatile unsigned int*)(0x42C002F4UL))
|
|
#define bFM3_DMAC_DMACA1_TC0 *((volatile unsigned int*)(0x42C00400UL))
|
|
#define bFM3_DMAC_DMACA1_TC1 *((volatile unsigned int*)(0x42C00404UL))
|
|
#define bFM3_DMAC_DMACA1_TC2 *((volatile unsigned int*)(0x42C00408UL))
|
|
#define bFM3_DMAC_DMACA1_TC3 *((volatile unsigned int*)(0x42C0040CUL))
|
|
#define bFM3_DMAC_DMACA1_TC4 *((volatile unsigned int*)(0x42C00410UL))
|
|
#define bFM3_DMAC_DMACA1_TC5 *((volatile unsigned int*)(0x42C00414UL))
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#define bFM3_DMAC_DMACA1_TC6 *((volatile unsigned int*)(0x42C00418UL))
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#define bFM3_DMAC_DMACA1_TC7 *((volatile unsigned int*)(0x42C0041CUL))
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#define bFM3_DMAC_DMACA1_TC8 *((volatile unsigned int*)(0x42C00420UL))
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#define bFM3_DMAC_DMACA1_TC9 *((volatile unsigned int*)(0x42C00424UL))
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#define bFM3_DMAC_DMACA1_TC10 *((volatile unsigned int*)(0x42C00428UL))
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#define bFM3_DMAC_DMACA1_TC11 *((volatile unsigned int*)(0x42C0042CUL))
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#define bFM3_DMAC_DMACA1_TC12 *((volatile unsigned int*)(0x42C00430UL))
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#define bFM3_DMAC_DMACA1_TC13 *((volatile unsigned int*)(0x42C00434UL))
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#define bFM3_DMAC_DMACA1_TC14 *((volatile unsigned int*)(0x42C00438UL))
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#define bFM3_DMAC_DMACA1_TC15 *((volatile unsigned int*)(0x42C0043CUL))
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#define bFM3_DMAC_DMACA1_BC0 *((volatile unsigned int*)(0x42C00440UL))
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#define bFM3_DMAC_DMACA1_BC1 *((volatile unsigned int*)(0x42C00444UL))
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#define bFM3_DMAC_DMACA1_BC2 *((volatile unsigned int*)(0x42C00448UL))
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#define bFM3_DMAC_DMACA1_BC3 *((volatile unsigned int*)(0x42C0044CUL))
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#define bFM3_DMAC_DMACA1_IS0 *((volatile unsigned int*)(0x42C0045CUL))
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#define bFM3_DMAC_DMACA1_IS1 *((volatile unsigned int*)(0x42C00460UL))
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#define bFM3_DMAC_DMACA1_IS2 *((volatile unsigned int*)(0x42C00464UL))
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#define bFM3_DMAC_DMACA1_IS3 *((volatile unsigned int*)(0x42C00468UL))
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#define bFM3_DMAC_DMACA1_IS4 *((volatile unsigned int*)(0x42C0046CUL))
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#define bFM3_DMAC_DMACA1_IS5 *((volatile unsigned int*)(0x42C00470UL))
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#define bFM3_DMAC_DMACA1_ST *((volatile unsigned int*)(0x42C00474UL))
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#define bFM3_DMAC_DMACA1_PB *((volatile unsigned int*)(0x42C00478UL))
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#define bFM3_DMAC_DMACA1_EB *((volatile unsigned int*)(0x42C0047CUL))
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#define bFM3_DMAC_DMACB1_EM *((volatile unsigned int*)(0x42C00480UL))
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#define bFM3_DMAC_DMACB1_SS0 *((volatile unsigned int*)(0x42C004C0UL))
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#define bFM3_DMAC_DMACB1_SS1 *((volatile unsigned int*)(0x42C004C4UL))
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#define bFM3_DMAC_DMACB1_SS2 *((volatile unsigned int*)(0x42C004C8UL))
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#define bFM3_DMAC_DMACB1_CI *((volatile unsigned int*)(0x42C004CCUL))
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#define bFM3_DMAC_DMACB1_EI *((volatile unsigned int*)(0x42C004D0UL))
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#define bFM3_DMAC_DMACB1_RD *((volatile unsigned int*)(0x42C004D4UL))
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#define bFM3_DMAC_DMACB1_RS *((volatile unsigned int*)(0x42C004D8UL))
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#define bFM3_DMAC_DMACB1_RC *((volatile unsigned int*)(0x42C004DCUL))
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#define bFM3_DMAC_DMACB1_FD *((volatile unsigned int*)(0x42C004E0UL))
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#define bFM3_DMAC_DMACB1_FS *((volatile unsigned int*)(0x42C004E4UL))
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#define bFM3_DMAC_DMACB1_TW0 *((volatile unsigned int*)(0x42C004E8UL))
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#define bFM3_DMAC_DMACB1_TW1 *((volatile unsigned int*)(0x42C004ECUL))
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#define bFM3_DMAC_DMACB1_MS0 *((volatile unsigned int*)(0x42C004F0UL))
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#define bFM3_DMAC_DMACB1_MS1 *((volatile unsigned int*)(0x42C004F4UL))
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#define bFM3_DMAC_DMACA2_TC0 *((volatile unsigned int*)(0x42C00600UL))
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#define bFM3_DMAC_DMACA2_TC1 *((volatile unsigned int*)(0x42C00604UL))
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#define bFM3_DMAC_DMACA2_TC2 *((volatile unsigned int*)(0x42C00608UL))
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#define bFM3_DMAC_DMACA2_TC3 *((volatile unsigned int*)(0x42C0060CUL))
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#define bFM3_DMAC_DMACA2_TC4 *((volatile unsigned int*)(0x42C00610UL))
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#define bFM3_DMAC_DMACA2_TC5 *((volatile unsigned int*)(0x42C00614UL))
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#define bFM3_DMAC_DMACA2_TC6 *((volatile unsigned int*)(0x42C00618UL))
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#define bFM3_DMAC_DMACA2_TC7 *((volatile unsigned int*)(0x42C0061CUL))
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#define bFM3_DMAC_DMACA2_TC8 *((volatile unsigned int*)(0x42C00620UL))
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#define bFM3_DMAC_DMACA2_TC9 *((volatile unsigned int*)(0x42C00624UL))
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#define bFM3_DMAC_DMACA2_TC10 *((volatile unsigned int*)(0x42C00628UL))
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#define bFM3_DMAC_DMACA2_TC11 *((volatile unsigned int*)(0x42C0062CUL))
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#define bFM3_DMAC_DMACA2_TC12 *((volatile unsigned int*)(0x42C00630UL))
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#define bFM3_DMAC_DMACA2_TC13 *((volatile unsigned int*)(0x42C00634UL))
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#define bFM3_DMAC_DMACA2_TC14 *((volatile unsigned int*)(0x42C00638UL))
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#define bFM3_DMAC_DMACA2_TC15 *((volatile unsigned int*)(0x42C0063CUL))
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#define bFM3_DMAC_DMACA2_BC0 *((volatile unsigned int*)(0x42C00640UL))
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#define bFM3_DMAC_DMACA2_BC1 *((volatile unsigned int*)(0x42C00644UL))
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#define bFM3_DMAC_DMACA2_BC2 *((volatile unsigned int*)(0x42C00648UL))
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#define bFM3_DMAC_DMACA2_BC3 *((volatile unsigned int*)(0x42C0064CUL))
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#define bFM3_DMAC_DMACA2_IS0 *((volatile unsigned int*)(0x42C0065CUL))
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#define bFM3_DMAC_DMACA2_IS1 *((volatile unsigned int*)(0x42C00660UL))
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#define bFM3_DMAC_DMACA2_IS2 *((volatile unsigned int*)(0x42C00664UL))
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#define bFM3_DMAC_DMACA2_IS3 *((volatile unsigned int*)(0x42C00668UL))
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#define bFM3_DMAC_DMACA2_IS4 *((volatile unsigned int*)(0x42C0066CUL))
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#define bFM3_DMAC_DMACA2_IS5 *((volatile unsigned int*)(0x42C00670UL))
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#define bFM3_DMAC_DMACA2_ST *((volatile unsigned int*)(0x42C00674UL))
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#define bFM3_DMAC_DMACA2_PB *((volatile unsigned int*)(0x42C00678UL))
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#define bFM3_DMAC_DMACA2_EB *((volatile unsigned int*)(0x42C0067CUL))
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#define bFM3_DMAC_DMACB2_EM *((volatile unsigned int*)(0x42C00680UL))
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#define bFM3_DMAC_DMACB2_SS0 *((volatile unsigned int*)(0x42C006C0UL))
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#define bFM3_DMAC_DMACB2_SS1 *((volatile unsigned int*)(0x42C006C4UL))
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#define bFM3_DMAC_DMACB2_SS2 *((volatile unsigned int*)(0x42C006C8UL))
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#define bFM3_DMAC_DMACB2_CI *((volatile unsigned int*)(0x42C006CCUL))
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#define bFM3_DMAC_DMACB2_EI *((volatile unsigned int*)(0x42C006D0UL))
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#define bFM3_DMAC_DMACB2_RD *((volatile unsigned int*)(0x42C006D4UL))
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#define bFM3_DMAC_DMACB2_RS *((volatile unsigned int*)(0x42C006D8UL))
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#define bFM3_DMAC_DMACB2_RC *((volatile unsigned int*)(0x42C006DCUL))
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#define bFM3_DMAC_DMACB2_FD *((volatile unsigned int*)(0x42C006E0UL))
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#define bFM3_DMAC_DMACB2_FS *((volatile unsigned int*)(0x42C006E4UL))
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#define bFM3_DMAC_DMACB2_TW0 *((volatile unsigned int*)(0x42C006E8UL))
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#define bFM3_DMAC_DMACB2_TW1 *((volatile unsigned int*)(0x42C006ECUL))
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#define bFM3_DMAC_DMACB2_MS0 *((volatile unsigned int*)(0x42C006F0UL))
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#define bFM3_DMAC_DMACB2_MS1 *((volatile unsigned int*)(0x42C006F4UL))
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#define bFM3_DMAC_DMACA3_TC0 *((volatile unsigned int*)(0x42C00800UL))
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#define bFM3_DMAC_DMACA3_TC1 *((volatile unsigned int*)(0x42C00804UL))
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#define bFM3_DMAC_DMACA3_TC2 *((volatile unsigned int*)(0x42C00808UL))
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#define bFM3_DMAC_DMACA3_TC3 *((volatile unsigned int*)(0x42C0080CUL))
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#define bFM3_DMAC_DMACA3_TC4 *((volatile unsigned int*)(0x42C00810UL))
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#define bFM3_DMAC_DMACA3_TC5 *((volatile unsigned int*)(0x42C00814UL))
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#define bFM3_DMAC_DMACA3_TC6 *((volatile unsigned int*)(0x42C00818UL))
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|
#define bFM3_DMAC_DMACA3_TC7 *((volatile unsigned int*)(0x42C0081CUL))
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#define bFM3_DMAC_DMACA3_TC8 *((volatile unsigned int*)(0x42C00820UL))
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#define bFM3_DMAC_DMACA3_TC9 *((volatile unsigned int*)(0x42C00824UL))
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#define bFM3_DMAC_DMACA3_TC10 *((volatile unsigned int*)(0x42C00828UL))
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#define bFM3_DMAC_DMACA3_TC11 *((volatile unsigned int*)(0x42C0082CUL))
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#define bFM3_DMAC_DMACA3_TC12 *((volatile unsigned int*)(0x42C00830UL))
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#define bFM3_DMAC_DMACA3_TC13 *((volatile unsigned int*)(0x42C00834UL))
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#define bFM3_DMAC_DMACA3_TC14 *((volatile unsigned int*)(0x42C00838UL))
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#define bFM3_DMAC_DMACA3_TC15 *((volatile unsigned int*)(0x42C0083CUL))
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#define bFM3_DMAC_DMACA3_BC0 *((volatile unsigned int*)(0x42C00840UL))
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#define bFM3_DMAC_DMACA3_BC1 *((volatile unsigned int*)(0x42C00844UL))
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#define bFM3_DMAC_DMACA3_BC2 *((volatile unsigned int*)(0x42C00848UL))
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#define bFM3_DMAC_DMACA3_BC3 *((volatile unsigned int*)(0x42C0084CUL))
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#define bFM3_DMAC_DMACA3_IS0 *((volatile unsigned int*)(0x42C0085CUL))
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#define bFM3_DMAC_DMACA3_IS1 *((volatile unsigned int*)(0x42C00860UL))
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#define bFM3_DMAC_DMACA3_IS2 *((volatile unsigned int*)(0x42C00864UL))
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#define bFM3_DMAC_DMACA3_IS3 *((volatile unsigned int*)(0x42C00868UL))
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#define bFM3_DMAC_DMACA3_IS4 *((volatile unsigned int*)(0x42C0086CUL))
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#define bFM3_DMAC_DMACA3_IS5 *((volatile unsigned int*)(0x42C00870UL))
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#define bFM3_DMAC_DMACA3_ST *((volatile unsigned int*)(0x42C00874UL))
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#define bFM3_DMAC_DMACA3_PB *((volatile unsigned int*)(0x42C00878UL))
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#define bFM3_DMAC_DMACA3_EB *((volatile unsigned int*)(0x42C0087CUL))
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|
#define bFM3_DMAC_DMACB3_EM *((volatile unsigned int*)(0x42C00880UL))
|
|
#define bFM3_DMAC_DMACB3_SS0 *((volatile unsigned int*)(0x42C008C0UL))
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|
#define bFM3_DMAC_DMACB3_SS1 *((volatile unsigned int*)(0x42C008C4UL))
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|
#define bFM3_DMAC_DMACB3_SS2 *((volatile unsigned int*)(0x42C008C8UL))
|
|
#define bFM3_DMAC_DMACB3_CI *((volatile unsigned int*)(0x42C008CCUL))
|
|
#define bFM3_DMAC_DMACB3_EI *((volatile unsigned int*)(0x42C008D0UL))
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|
#define bFM3_DMAC_DMACB3_RD *((volatile unsigned int*)(0x42C008D4UL))
|
|
#define bFM3_DMAC_DMACB3_RS *((volatile unsigned int*)(0x42C008D8UL))
|
|
#define bFM3_DMAC_DMACB3_RC *((volatile unsigned int*)(0x42C008DCUL))
|
|
#define bFM3_DMAC_DMACB3_FD *((volatile unsigned int*)(0x42C008E0UL))
|
|
#define bFM3_DMAC_DMACB3_FS *((volatile unsigned int*)(0x42C008E4UL))
|
|
#define bFM3_DMAC_DMACB3_TW0 *((volatile unsigned int*)(0x42C008E8UL))
|
|
#define bFM3_DMAC_DMACB3_TW1 *((volatile unsigned int*)(0x42C008ECUL))
|
|
#define bFM3_DMAC_DMACB3_MS0 *((volatile unsigned int*)(0x42C008F0UL))
|
|
#define bFM3_DMAC_DMACB3_MS1 *((volatile unsigned int*)(0x42C008F4UL))
|
|
#define bFM3_DMAC_DMACA4_TC0 *((volatile unsigned int*)(0x42C00A00UL))
|
|
#define bFM3_DMAC_DMACA4_TC1 *((volatile unsigned int*)(0x42C00A04UL))
|
|
#define bFM3_DMAC_DMACA4_TC2 *((volatile unsigned int*)(0x42C00A08UL))
|
|
#define bFM3_DMAC_DMACA4_TC3 *((volatile unsigned int*)(0x42C00A0CUL))
|
|
#define bFM3_DMAC_DMACA4_TC4 *((volatile unsigned int*)(0x42C00A10UL))
|
|
#define bFM3_DMAC_DMACA4_TC5 *((volatile unsigned int*)(0x42C00A14UL))
|
|
#define bFM3_DMAC_DMACA4_TC6 *((volatile unsigned int*)(0x42C00A18UL))
|
|
#define bFM3_DMAC_DMACA4_TC7 *((volatile unsigned int*)(0x42C00A1CUL))
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|
#define bFM3_DMAC_DMACA4_TC8 *((volatile unsigned int*)(0x42C00A20UL))
|
|
#define bFM3_DMAC_DMACA4_TC9 *((volatile unsigned int*)(0x42C00A24UL))
|
|
#define bFM3_DMAC_DMACA4_TC10 *((volatile unsigned int*)(0x42C00A28UL))
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|
#define bFM3_DMAC_DMACA4_TC11 *((volatile unsigned int*)(0x42C00A2CUL))
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|
#define bFM3_DMAC_DMACA4_TC12 *((volatile unsigned int*)(0x42C00A30UL))
|
|
#define bFM3_DMAC_DMACA4_TC13 *((volatile unsigned int*)(0x42C00A34UL))
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|
#define bFM3_DMAC_DMACA4_TC14 *((volatile unsigned int*)(0x42C00A38UL))
|
|
#define bFM3_DMAC_DMACA4_TC15 *((volatile unsigned int*)(0x42C00A3CUL))
|
|
#define bFM3_DMAC_DMACA4_BC0 *((volatile unsigned int*)(0x42C00A40UL))
|
|
#define bFM3_DMAC_DMACA4_BC1 *((volatile unsigned int*)(0x42C00A44UL))
|
|
#define bFM3_DMAC_DMACA4_BC2 *((volatile unsigned int*)(0x42C00A48UL))
|
|
#define bFM3_DMAC_DMACA4_BC3 *((volatile unsigned int*)(0x42C00A4CUL))
|
|
#define bFM3_DMAC_DMACA4_IS0 *((volatile unsigned int*)(0x42C00A5CUL))
|
|
#define bFM3_DMAC_DMACA4_IS1 *((volatile unsigned int*)(0x42C00A60UL))
|
|
#define bFM3_DMAC_DMACA4_IS2 *((volatile unsigned int*)(0x42C00A64UL))
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|
#define bFM3_DMAC_DMACA4_IS3 *((volatile unsigned int*)(0x42C00A68UL))
|
|
#define bFM3_DMAC_DMACA4_IS4 *((volatile unsigned int*)(0x42C00A6CUL))
|
|
#define bFM3_DMAC_DMACA4_IS5 *((volatile unsigned int*)(0x42C00A70UL))
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|
#define bFM3_DMAC_DMACA4_ST *((volatile unsigned int*)(0x42C00A74UL))
|
|
#define bFM3_DMAC_DMACA4_PB *((volatile unsigned int*)(0x42C00A78UL))
|
|
#define bFM3_DMAC_DMACA4_EB *((volatile unsigned int*)(0x42C00A7CUL))
|
|
#define bFM3_DMAC_DMACB4_EM *((volatile unsigned int*)(0x42C00A80UL))
|
|
#define bFM3_DMAC_DMACB4_SS0 *((volatile unsigned int*)(0x42C00AC0UL))
|
|
#define bFM3_DMAC_DMACB4_SS1 *((volatile unsigned int*)(0x42C00AC4UL))
|
|
#define bFM3_DMAC_DMACB4_SS2 *((volatile unsigned int*)(0x42C00AC8UL))
|
|
#define bFM3_DMAC_DMACB4_CI *((volatile unsigned int*)(0x42C00ACCUL))
|
|
#define bFM3_DMAC_DMACB4_EI *((volatile unsigned int*)(0x42C00AD0UL))
|
|
#define bFM3_DMAC_DMACB4_RD *((volatile unsigned int*)(0x42C00AD4UL))
|
|
#define bFM3_DMAC_DMACB4_RS *((volatile unsigned int*)(0x42C00AD8UL))
|
|
#define bFM3_DMAC_DMACB4_RC *((volatile unsigned int*)(0x42C00ADCUL))
|
|
#define bFM3_DMAC_DMACB4_FD *((volatile unsigned int*)(0x42C00AE0UL))
|
|
#define bFM3_DMAC_DMACB4_FS *((volatile unsigned int*)(0x42C00AE4UL))
|
|
#define bFM3_DMAC_DMACB4_TW0 *((volatile unsigned int*)(0x42C00AE8UL))
|
|
#define bFM3_DMAC_DMACB4_TW1 *((volatile unsigned int*)(0x42C00AECUL))
|
|
#define bFM3_DMAC_DMACB4_MS0 *((volatile unsigned int*)(0x42C00AF0UL))
|
|
#define bFM3_DMAC_DMACB4_MS1 *((volatile unsigned int*)(0x42C00AF4UL))
|
|
#define bFM3_DMAC_DMACA5_TC0 *((volatile unsigned int*)(0x42C00C00UL))
|
|
#define bFM3_DMAC_DMACA5_TC1 *((volatile unsigned int*)(0x42C00C04UL))
|
|
#define bFM3_DMAC_DMACA5_TC2 *((volatile unsigned int*)(0x42C00C08UL))
|
|
#define bFM3_DMAC_DMACA5_TC3 *((volatile unsigned int*)(0x42C00C0CUL))
|
|
#define bFM3_DMAC_DMACA5_TC4 *((volatile unsigned int*)(0x42C00C10UL))
|
|
#define bFM3_DMAC_DMACA5_TC5 *((volatile unsigned int*)(0x42C00C14UL))
|
|
#define bFM3_DMAC_DMACA5_TC6 *((volatile unsigned int*)(0x42C00C18UL))
|
|
#define bFM3_DMAC_DMACA5_TC7 *((volatile unsigned int*)(0x42C00C1CUL))
|
|
#define bFM3_DMAC_DMACA5_TC8 *((volatile unsigned int*)(0x42C00C20UL))
|
|
#define bFM3_DMAC_DMACA5_TC9 *((volatile unsigned int*)(0x42C00C24UL))
|
|
#define bFM3_DMAC_DMACA5_TC10 *((volatile unsigned int*)(0x42C00C28UL))
|
|
#define bFM3_DMAC_DMACA5_TC11 *((volatile unsigned int*)(0x42C00C2CUL))
|
|
#define bFM3_DMAC_DMACA5_TC12 *((volatile unsigned int*)(0x42C00C30UL))
|
|
#define bFM3_DMAC_DMACA5_TC13 *((volatile unsigned int*)(0x42C00C34UL))
|
|
#define bFM3_DMAC_DMACA5_TC14 *((volatile unsigned int*)(0x42C00C38UL))
|
|
#define bFM3_DMAC_DMACA5_TC15 *((volatile unsigned int*)(0x42C00C3CUL))
|
|
#define bFM3_DMAC_DMACA5_BC0 *((volatile unsigned int*)(0x42C00C40UL))
|
|
#define bFM3_DMAC_DMACA5_BC1 *((volatile unsigned int*)(0x42C00C44UL))
|
|
#define bFM3_DMAC_DMACA5_BC2 *((volatile unsigned int*)(0x42C00C48UL))
|
|
#define bFM3_DMAC_DMACA5_BC3 *((volatile unsigned int*)(0x42C00C4CUL))
|
|
#define bFM3_DMAC_DMACA5_IS0 *((volatile unsigned int*)(0x42C00C5CUL))
|
|
#define bFM3_DMAC_DMACA5_IS1 *((volatile unsigned int*)(0x42C00C60UL))
|
|
#define bFM3_DMAC_DMACA5_IS2 *((volatile unsigned int*)(0x42C00C64UL))
|
|
#define bFM3_DMAC_DMACA5_IS3 *((volatile unsigned int*)(0x42C00C68UL))
|
|
#define bFM3_DMAC_DMACA5_IS4 *((volatile unsigned int*)(0x42C00C6CUL))
|
|
#define bFM3_DMAC_DMACA5_IS5 *((volatile unsigned int*)(0x42C00C70UL))
|
|
#define bFM3_DMAC_DMACA5_ST *((volatile unsigned int*)(0x42C00C74UL))
|
|
#define bFM3_DMAC_DMACA5_PB *((volatile unsigned int*)(0x42C00C78UL))
|
|
#define bFM3_DMAC_DMACA5_EB *((volatile unsigned int*)(0x42C00C7CUL))
|
|
#define bFM3_DMAC_DMACB5_EM *((volatile unsigned int*)(0x42C00C80UL))
|
|
#define bFM3_DMAC_DMACB5_SS0 *((volatile unsigned int*)(0x42C00CC0UL))
|
|
#define bFM3_DMAC_DMACB5_SS1 *((volatile unsigned int*)(0x42C00CC4UL))
|
|
#define bFM3_DMAC_DMACB5_SS2 *((volatile unsigned int*)(0x42C00CC8UL))
|
|
#define bFM3_DMAC_DMACB5_CI *((volatile unsigned int*)(0x42C00CCCUL))
|
|
#define bFM3_DMAC_DMACB5_EI *((volatile unsigned int*)(0x42C00CD0UL))
|
|
#define bFM3_DMAC_DMACB5_RD *((volatile unsigned int*)(0x42C00CD4UL))
|
|
#define bFM3_DMAC_DMACB5_RS *((volatile unsigned int*)(0x42C00CD8UL))
|
|
#define bFM3_DMAC_DMACB5_RC *((volatile unsigned int*)(0x42C00CDCUL))
|
|
#define bFM3_DMAC_DMACB5_FD *((volatile unsigned int*)(0x42C00CE0UL))
|
|
#define bFM3_DMAC_DMACB5_FS *((volatile unsigned int*)(0x42C00CE4UL))
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#define bFM3_DMAC_DMACB5_TW0 *((volatile unsigned int*)(0x42C00CE8UL))
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#define bFM3_DMAC_DMACB5_TW1 *((volatile unsigned int*)(0x42C00CECUL))
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#define bFM3_DMAC_DMACB5_MS0 *((volatile unsigned int*)(0x42C00CF0UL))
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#define bFM3_DMAC_DMACB5_MS1 *((volatile unsigned int*)(0x42C00CF4UL))
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#define bFM3_DMAC_DMACA6_TC0 *((volatile unsigned int*)(0x42C00E00UL))
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#define bFM3_DMAC_DMACA6_TC1 *((volatile unsigned int*)(0x42C00E04UL))
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#define bFM3_DMAC_DMACA6_TC2 *((volatile unsigned int*)(0x42C00E08UL))
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#define bFM3_DMAC_DMACA6_TC3 *((volatile unsigned int*)(0x42C00E0CUL))
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#define bFM3_DMAC_DMACA6_TC4 *((volatile unsigned int*)(0x42C00E10UL))
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#define bFM3_DMAC_DMACA6_TC5 *((volatile unsigned int*)(0x42C00E14UL))
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#define bFM3_DMAC_DMACA6_TC6 *((volatile unsigned int*)(0x42C00E18UL))
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#define bFM3_DMAC_DMACA6_TC7 *((volatile unsigned int*)(0x42C00E1CUL))
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#define bFM3_DMAC_DMACA6_TC8 *((volatile unsigned int*)(0x42C00E20UL))
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#define bFM3_DMAC_DMACA6_TC9 *((volatile unsigned int*)(0x42C00E24UL))
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#define bFM3_DMAC_DMACA6_TC10 *((volatile unsigned int*)(0x42C00E28UL))
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#define bFM3_DMAC_DMACA6_TC11 *((volatile unsigned int*)(0x42C00E2CUL))
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#define bFM3_DMAC_DMACA6_TC12 *((volatile unsigned int*)(0x42C00E30UL))
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#define bFM3_DMAC_DMACA6_TC13 *((volatile unsigned int*)(0x42C00E34UL))
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#define bFM3_DMAC_DMACA6_TC14 *((volatile unsigned int*)(0x42C00E38UL))
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#define bFM3_DMAC_DMACA6_TC15 *((volatile unsigned int*)(0x42C00E3CUL))
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#define bFM3_DMAC_DMACA6_BC0 *((volatile unsigned int*)(0x42C00E40UL))
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#define bFM3_DMAC_DMACA6_BC1 *((volatile unsigned int*)(0x42C00E44UL))
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#define bFM3_DMAC_DMACA6_BC2 *((volatile unsigned int*)(0x42C00E48UL))
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#define bFM3_DMAC_DMACA6_BC3 *((volatile unsigned int*)(0x42C00E4CUL))
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#define bFM3_DMAC_DMACA6_IS0 *((volatile unsigned int*)(0x42C00E5CUL))
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#define bFM3_DMAC_DMACA6_IS1 *((volatile unsigned int*)(0x42C00E60UL))
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#define bFM3_DMAC_DMACA6_IS2 *((volatile unsigned int*)(0x42C00E64UL))
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#define bFM3_DMAC_DMACA6_IS3 *((volatile unsigned int*)(0x42C00E68UL))
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#define bFM3_DMAC_DMACA6_IS4 *((volatile unsigned int*)(0x42C00E6CUL))
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#define bFM3_DMAC_DMACA6_IS5 *((volatile unsigned int*)(0x42C00E70UL))
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#define bFM3_DMAC_DMACA6_ST *((volatile unsigned int*)(0x42C00E74UL))
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#define bFM3_DMAC_DMACA6_PB *((volatile unsigned int*)(0x42C00E78UL))
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#define bFM3_DMAC_DMACA6_EB *((volatile unsigned int*)(0x42C00E7CUL))
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#define bFM3_DMAC_DMACB6_EM *((volatile unsigned int*)(0x42C00E80UL))
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#define bFM3_DMAC_DMACB6_SS0 *((volatile unsigned int*)(0x42C00EC0UL))
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#define bFM3_DMAC_DMACB6_SS1 *((volatile unsigned int*)(0x42C00EC4UL))
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#define bFM3_DMAC_DMACB6_SS2 *((volatile unsigned int*)(0x42C00EC8UL))
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#define bFM3_DMAC_DMACB6_CI *((volatile unsigned int*)(0x42C00ECCUL))
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#define bFM3_DMAC_DMACB6_EI *((volatile unsigned int*)(0x42C00ED0UL))
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#define bFM3_DMAC_DMACB6_RD *((volatile unsigned int*)(0x42C00ED4UL))
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#define bFM3_DMAC_DMACB6_RS *((volatile unsigned int*)(0x42C00ED8UL))
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#define bFM3_DMAC_DMACB6_RC *((volatile unsigned int*)(0x42C00EDCUL))
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#define bFM3_DMAC_DMACB6_FD *((volatile unsigned int*)(0x42C00EE0UL))
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#define bFM3_DMAC_DMACB6_FS *((volatile unsigned int*)(0x42C00EE4UL))
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#define bFM3_DMAC_DMACB6_TW0 *((volatile unsigned int*)(0x42C00EE8UL))
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#define bFM3_DMAC_DMACB6_TW1 *((volatile unsigned int*)(0x42C00EECUL))
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#define bFM3_DMAC_DMACB6_MS0 *((volatile unsigned int*)(0x42C00EF0UL))
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#define bFM3_DMAC_DMACB6_MS1 *((volatile unsigned int*)(0x42C00EF4UL))
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#define bFM3_DMAC_DMACA7_TC0 *((volatile unsigned int*)(0x42C01000UL))
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#define bFM3_DMAC_DMACA7_TC1 *((volatile unsigned int*)(0x42C01004UL))
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#define bFM3_DMAC_DMACA7_TC2 *((volatile unsigned int*)(0x42C01008UL))
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#define bFM3_DMAC_DMACA7_TC3 *((volatile unsigned int*)(0x42C0100CUL))
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#define bFM3_DMAC_DMACA7_TC4 *((volatile unsigned int*)(0x42C01010UL))
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#define bFM3_DMAC_DMACA7_TC5 *((volatile unsigned int*)(0x42C01014UL))
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#define bFM3_DMAC_DMACA7_TC6 *((volatile unsigned int*)(0x42C01018UL))
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#define bFM3_DMAC_DMACA7_TC7 *((volatile unsigned int*)(0x42C0101CUL))
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#define bFM3_DMAC_DMACA7_TC8 *((volatile unsigned int*)(0x42C01020UL))
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#define bFM3_DMAC_DMACA7_TC9 *((volatile unsigned int*)(0x42C01024UL))
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#define bFM3_DMAC_DMACA7_TC10 *((volatile unsigned int*)(0x42C01028UL))
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#define bFM3_DMAC_DMACA7_TC11 *((volatile unsigned int*)(0x42C0102CUL))
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#define bFM3_DMAC_DMACA7_TC12 *((volatile unsigned int*)(0x42C01030UL))
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#define bFM3_DMAC_DMACA7_TC13 *((volatile unsigned int*)(0x42C01034UL))
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#define bFM3_DMAC_DMACA7_TC14 *((volatile unsigned int*)(0x42C01038UL))
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#define bFM3_DMAC_DMACA7_TC15 *((volatile unsigned int*)(0x42C0103CUL))
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#define bFM3_DMAC_DMACA7_BC0 *((volatile unsigned int*)(0x42C01040UL))
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#define bFM3_DMAC_DMACA7_BC1 *((volatile unsigned int*)(0x42C01044UL))
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#define bFM3_DMAC_DMACA7_BC2 *((volatile unsigned int*)(0x42C01048UL))
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#define bFM3_DMAC_DMACA7_BC3 *((volatile unsigned int*)(0x42C0104CUL))
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#define bFM3_DMAC_DMACA7_IS0 *((volatile unsigned int*)(0x42C0105CUL))
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#define bFM3_DMAC_DMACA7_IS1 *((volatile unsigned int*)(0x42C01060UL))
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#define bFM3_DMAC_DMACA7_IS2 *((volatile unsigned int*)(0x42C01064UL))
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#define bFM3_DMAC_DMACA7_IS3 *((volatile unsigned int*)(0x42C01068UL))
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#define bFM3_DMAC_DMACA7_IS4 *((volatile unsigned int*)(0x42C0106CUL))
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#define bFM3_DMAC_DMACA7_IS5 *((volatile unsigned int*)(0x42C01070UL))
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#define bFM3_DMAC_DMACA7_ST *((volatile unsigned int*)(0x42C01074UL))
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#define bFM3_DMAC_DMACA7_PB *((volatile unsigned int*)(0x42C01078UL))
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#define bFM3_DMAC_DMACA7_EB *((volatile unsigned int*)(0x42C0107CUL))
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#define bFM3_DMAC_DMACB7_EM *((volatile unsigned int*)(0x42C01080UL))
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#define bFM3_DMAC_DMACB7_SS0 *((volatile unsigned int*)(0x42C010C0UL))
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#define bFM3_DMAC_DMACB7_SS1 *((volatile unsigned int*)(0x42C010C4UL))
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#define bFM3_DMAC_DMACB7_SS2 *((volatile unsigned int*)(0x42C010C8UL))
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#define bFM3_DMAC_DMACB7_CI *((volatile unsigned int*)(0x42C010CCUL))
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#define bFM3_DMAC_DMACB7_EI *((volatile unsigned int*)(0x42C010D0UL))
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#define bFM3_DMAC_DMACB7_RD *((volatile unsigned int*)(0x42C010D4UL))
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#define bFM3_DMAC_DMACB7_RS *((volatile unsigned int*)(0x42C010D8UL))
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#define bFM3_DMAC_DMACB7_RC *((volatile unsigned int*)(0x42C010DCUL))
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#define bFM3_DMAC_DMACB7_FD *((volatile unsigned int*)(0x42C010E0UL))
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#define bFM3_DMAC_DMACB7_FS *((volatile unsigned int*)(0x42C010E4UL))
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#define bFM3_DMAC_DMACB7_TW0 *((volatile unsigned int*)(0x42C010E8UL))
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#define bFM3_DMAC_DMACB7_TW1 *((volatile unsigned int*)(0x42C010ECUL))
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#define bFM3_DMAC_DMACB7_MS0 *((volatile unsigned int*)(0x42C010F0UL))
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#define bFM3_DMAC_DMACB7_MS1 *((volatile unsigned int*)(0x42C010F4UL))
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/* ETHERNET-MAC0 registers*/
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#define bFM3_ETHERNET_MAC0_MCR_RE *((volatile unsigned int*)(0x42C80008UL))
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#define bFM3_ETHERNET_MAC0_MCR_TE *((volatile unsigned int*)(0x42C8000CUL))
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#define bFM3_ETHERNET_MAC0_MCR_DC *((volatile unsigned int*)(0x42C80010UL))
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#define bFM3_ETHERNET_MAC0_MCR_BL0 *((volatile unsigned int*)(0x42C80014UL))
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#define bFM3_ETHERNET_MAC0_MCR_BL1 *((volatile unsigned int*)(0x42C80018UL))
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#define bFM3_ETHERNET_MAC0_MCR_ACS *((volatile unsigned int*)(0x42C8001CUL))
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#define bFM3_ETHERNET_MAC0_MCR_LUD *((volatile unsigned int*)(0x42C80020UL))
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#define bFM3_ETHERNET_MAC0_MCR_DR *((volatile unsigned int*)(0x42C80024UL))
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#define bFM3_ETHERNET_MAC0_MCR_IPC *((volatile unsigned int*)(0x42C80028UL))
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#define bFM3_ETHERNET_MAC0_MCR_DM *((volatile unsigned int*)(0x42C8002CUL))
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#define bFM3_ETHERNET_MAC0_MCR_LM *((volatile unsigned int*)(0x42C80030UL))
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#define bFM3_ETHERNET_MAC0_MCR_DO *((volatile unsigned int*)(0x42C80034UL))
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#define bFM3_ETHERNET_MAC0_MCR_FES *((volatile unsigned int*)(0x42C80038UL))
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#define bFM3_ETHERNET_MAC0_MCR_PS *((volatile unsigned int*)(0x42C8003CUL))
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#define bFM3_ETHERNET_MAC0_MCR_DCRS *((volatile unsigned int*)(0x42C80040UL))
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#define bFM3_ETHERNET_MAC0_MCR_IFG0 *((volatile unsigned int*)(0x42C80044UL))
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#define bFM3_ETHERNET_MAC0_MCR_IFG1 *((volatile unsigned int*)(0x42C80048UL))
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#define bFM3_ETHERNET_MAC0_MCR_IFG2 *((volatile unsigned int*)(0x42C8004CUL))
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#define bFM3_ETHERNET_MAC0_MCR_JE *((volatile unsigned int*)(0x42C80050UL))
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#define bFM3_ETHERNET_MAC0_MCR_BE *((volatile unsigned int*)(0x42C80054UL))
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#define bFM3_ETHERNET_MAC0_MCR_JD *((volatile unsigned int*)(0x42C80058UL))
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#define bFM3_ETHERNET_MAC0_MCR_WD *((volatile unsigned int*)(0x42C8005CUL))
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#define bFM3_ETHERNET_MAC0_MCR_TC *((volatile unsigned int*)(0x42C80060UL))
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#define bFM3_ETHERNET_MAC0_MCR_CST *((volatile unsigned int*)(0x42C80064UL))
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#define bFM3_ETHERNET_MAC0_MFFR_PR *((volatile unsigned int*)(0x42C80080UL))
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#define bFM3_ETHERNET_MAC0_MFFR_HUC *((volatile unsigned int*)(0x42C80084UL))
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#define bFM3_ETHERNET_MAC0_MFFR_HMC *((volatile unsigned int*)(0x42C80088UL))
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#define bFM3_ETHERNET_MAC0_MFFR_DAIF *((volatile unsigned int*)(0x42C8008CUL))
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#define bFM3_ETHERNET_MAC0_MFFR_PM *((volatile unsigned int*)(0x42C80090UL))
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#define bFM3_ETHERNET_MAC0_MFFR_DB *((volatile unsigned int*)(0x42C80094UL))
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#define bFM3_ETHERNET_MAC0_MFFR_PCF0 *((volatile unsigned int*)(0x42C80098UL))
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#define bFM3_ETHERNET_MAC0_MFFR_PCF1 *((volatile unsigned int*)(0x42C8009CUL))
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#define bFM3_ETHERNET_MAC0_MFFR_SAIF *((volatile unsigned int*)(0x42C800A0UL))
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#define bFM3_ETHERNET_MAC0_MFFR_SAF *((volatile unsigned int*)(0x42C800A4UL))
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#define bFM3_ETHERNET_MAC0_MFFR_HPF *((volatile unsigned int*)(0x42C800A8UL))
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#define bFM3_ETHERNET_MAC0_MFFR_RA *((volatile unsigned int*)(0x42C800FCUL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH0 *((volatile unsigned int*)(0x42C80100UL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH1 *((volatile unsigned int*)(0x42C80104UL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH2 *((volatile unsigned int*)(0x42C80108UL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH3 *((volatile unsigned int*)(0x42C8010CUL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH4 *((volatile unsigned int*)(0x42C80110UL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH5 *((volatile unsigned int*)(0x42C80114UL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH6 *((volatile unsigned int*)(0x42C80118UL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH7 *((volatile unsigned int*)(0x42C8011CUL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH8 *((volatile unsigned int*)(0x42C80120UL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH9 *((volatile unsigned int*)(0x42C80124UL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH10 *((volatile unsigned int*)(0x42C80128UL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH11 *((volatile unsigned int*)(0x42C8012CUL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH12 *((volatile unsigned int*)(0x42C80130UL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH13 *((volatile unsigned int*)(0x42C80134UL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH14 *((volatile unsigned int*)(0x42C80138UL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH15 *((volatile unsigned int*)(0x42C8013CUL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH16 *((volatile unsigned int*)(0x42C80140UL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH17 *((volatile unsigned int*)(0x42C80144UL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH18 *((volatile unsigned int*)(0x42C80148UL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH19 *((volatile unsigned int*)(0x42C8014CUL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH20 *((volatile unsigned int*)(0x42C80150UL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH21 *((volatile unsigned int*)(0x42C80154UL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH22 *((volatile unsigned int*)(0x42C80158UL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH23 *((volatile unsigned int*)(0x42C8015CUL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH24 *((volatile unsigned int*)(0x42C80160UL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH25 *((volatile unsigned int*)(0x42C80164UL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH26 *((volatile unsigned int*)(0x42C80168UL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH27 *((volatile unsigned int*)(0x42C8016CUL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH28 *((volatile unsigned int*)(0x42C80170UL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH29 *((volatile unsigned int*)(0x42C80174UL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH30 *((volatile unsigned int*)(0x42C80178UL))
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#define bFM3_ETHERNET_MAC0_MHTRH_HTH31 *((volatile unsigned int*)(0x42C8017CUL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL0 *((volatile unsigned int*)(0x42C80180UL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL1 *((volatile unsigned int*)(0x42C80184UL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL2 *((volatile unsigned int*)(0x42C80188UL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL3 *((volatile unsigned int*)(0x42C8018CUL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL4 *((volatile unsigned int*)(0x42C80190UL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL5 *((volatile unsigned int*)(0x42C80194UL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL6 *((volatile unsigned int*)(0x42C80198UL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL7 *((volatile unsigned int*)(0x42C8019CUL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL8 *((volatile unsigned int*)(0x42C801A0UL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL9 *((volatile unsigned int*)(0x42C801A4UL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL10 *((volatile unsigned int*)(0x42C801A8UL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL11 *((volatile unsigned int*)(0x42C801ACUL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL12 *((volatile unsigned int*)(0x42C801B0UL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL13 *((volatile unsigned int*)(0x42C801B4UL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL14 *((volatile unsigned int*)(0x42C801B8UL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL15 *((volatile unsigned int*)(0x42C801BCUL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL16 *((volatile unsigned int*)(0x42C801C0UL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL17 *((volatile unsigned int*)(0x42C801C4UL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL18 *((volatile unsigned int*)(0x42C801C8UL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL19 *((volatile unsigned int*)(0x42C801CCUL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL20 *((volatile unsigned int*)(0x42C801D0UL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL21 *((volatile unsigned int*)(0x42C801D4UL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL22 *((volatile unsigned int*)(0x42C801D8UL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL23 *((volatile unsigned int*)(0x42C801DCUL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL24 *((volatile unsigned int*)(0x42C801E0UL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL25 *((volatile unsigned int*)(0x42C801E4UL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL26 *((volatile unsigned int*)(0x42C801E8UL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL27 *((volatile unsigned int*)(0x42C801ECUL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL28 *((volatile unsigned int*)(0x42C801F0UL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL29 *((volatile unsigned int*)(0x42C801F4UL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL30 *((volatile unsigned int*)(0x42C801F8UL))
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#define bFM3_ETHERNET_MAC0_MHTRL_HTL31 *((volatile unsigned int*)(0x42C801FCUL))
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#define bFM3_ETHERNET_MAC0_GAR_GB *((volatile unsigned int*)(0x42C80200UL))
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#define bFM3_ETHERNET_MAC0_GAR_GW *((volatile unsigned int*)(0x42C80204UL))
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#define bFM3_ETHERNET_MAC0_GAR_CR0 *((volatile unsigned int*)(0x42C80208UL))
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#define bFM3_ETHERNET_MAC0_GAR_CR1 *((volatile unsigned int*)(0x42C8020CUL))
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#define bFM3_ETHERNET_MAC0_GAR_CR2 *((volatile unsigned int*)(0x42C80210UL))
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#define bFM3_ETHERNET_MAC0_GAR_CR3 *((volatile unsigned int*)(0x42C80214UL))
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#define bFM3_ETHERNET_MAC0_GAR_GR0 *((volatile unsigned int*)(0x42C80218UL))
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#define bFM3_ETHERNET_MAC0_GAR_GR1 *((volatile unsigned int*)(0x42C8021CUL))
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#define bFM3_ETHERNET_MAC0_GAR_GR2 *((volatile unsigned int*)(0x42C80220UL))
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#define bFM3_ETHERNET_MAC0_GAR_GR3 *((volatile unsigned int*)(0x42C80224UL))
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#define bFM3_ETHERNET_MAC0_GAR_GR4 *((volatile unsigned int*)(0x42C80228UL))
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#define bFM3_ETHERNET_MAC0_GAR_PA0 *((volatile unsigned int*)(0x42C8022CUL))
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#define bFM3_ETHERNET_MAC0_GAR_PA1 *((volatile unsigned int*)(0x42C80230UL))
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#define bFM3_ETHERNET_MAC0_GAR_PA2 *((volatile unsigned int*)(0x42C80234UL))
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#define bFM3_ETHERNET_MAC0_GAR_PA3 *((volatile unsigned int*)(0x42C80238UL))
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#define bFM3_ETHERNET_MAC0_GAR_PA4 *((volatile unsigned int*)(0x42C8023CUL))
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#define bFM3_ETHERNET_MAC0_GDR_GD0 *((volatile unsigned int*)(0x42C80280UL))
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#define bFM3_ETHERNET_MAC0_GDR_GD1 *((volatile unsigned int*)(0x42C80284UL))
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#define bFM3_ETHERNET_MAC0_GDR_GD2 *((volatile unsigned int*)(0x42C80288UL))
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#define bFM3_ETHERNET_MAC0_GDR_GD3 *((volatile unsigned int*)(0x42C8028CUL))
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#define bFM3_ETHERNET_MAC0_GDR_GD4 *((volatile unsigned int*)(0x42C80290UL))
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#define bFM3_ETHERNET_MAC0_GDR_GD5 *((volatile unsigned int*)(0x42C80294UL))
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#define bFM3_ETHERNET_MAC0_GDR_GD6 *((volatile unsigned int*)(0x42C80298UL))
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#define bFM3_ETHERNET_MAC0_GDR_GD7 *((volatile unsigned int*)(0x42C8029CUL))
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|
#define bFM3_ETHERNET_MAC0_GDR_GD8 *((volatile unsigned int*)(0x42C802A0UL))
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#define bFM3_ETHERNET_MAC0_GDR_GD9 *((volatile unsigned int*)(0x42C802A4UL))
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#define bFM3_ETHERNET_MAC0_GDR_GD10 *((volatile unsigned int*)(0x42C802A8UL))
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#define bFM3_ETHERNET_MAC0_GDR_GD11 *((volatile unsigned int*)(0x42C802ACUL))
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|
#define bFM3_ETHERNET_MAC0_GDR_GD12 *((volatile unsigned int*)(0x42C802B0UL))
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|
#define bFM3_ETHERNET_MAC0_GDR_GD13 *((volatile unsigned int*)(0x42C802B4UL))
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|
#define bFM3_ETHERNET_MAC0_GDR_GD14 *((volatile unsigned int*)(0x42C802B8UL))
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|
#define bFM3_ETHERNET_MAC0_GDR_GD15 *((volatile unsigned int*)(0x42C802BCUL))
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#define bFM3_ETHERNET_MAC0_FCR_FCB_BPA *((volatile unsigned int*)(0x42C80300UL))
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|
#define bFM3_ETHERNET_MAC0_FCR_TFE *((volatile unsigned int*)(0x42C80304UL))
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|
#define bFM3_ETHERNET_MAC0_FCR_RFE *((volatile unsigned int*)(0x42C80308UL))
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|
#define bFM3_ETHERNET_MAC0_FCR_UP *((volatile unsigned int*)(0x42C8030CUL))
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|
#define bFM3_ETHERNET_MAC0_FCR_PLT0 *((volatile unsigned int*)(0x42C80310UL))
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|
#define bFM3_ETHERNET_MAC0_FCR_PLT1 *((volatile unsigned int*)(0x42C80314UL))
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|
#define bFM3_ETHERNET_MAC0_FCR_DZPQ *((volatile unsigned int*)(0x42C8031CUL))
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|
#define bFM3_ETHERNET_MAC0_FCR_PT0 *((volatile unsigned int*)(0x42C80340UL))
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|
#define bFM3_ETHERNET_MAC0_FCR_PT1 *((volatile unsigned int*)(0x42C80344UL))
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|
#define bFM3_ETHERNET_MAC0_FCR_PT2 *((volatile unsigned int*)(0x42C80348UL))
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|
#define bFM3_ETHERNET_MAC0_FCR_PT3 *((volatile unsigned int*)(0x42C8034CUL))
|
|
#define bFM3_ETHERNET_MAC0_FCR_PT4 *((volatile unsigned int*)(0x42C80350UL))
|
|
#define bFM3_ETHERNET_MAC0_FCR_PT5 *((volatile unsigned int*)(0x42C80354UL))
|
|
#define bFM3_ETHERNET_MAC0_FCR_PT6 *((volatile unsigned int*)(0x42C80358UL))
|
|
#define bFM3_ETHERNET_MAC0_FCR_PT7 *((volatile unsigned int*)(0x42C8035CUL))
|
|
#define bFM3_ETHERNET_MAC0_FCR_PT8 *((volatile unsigned int*)(0x42C80360UL))
|
|
#define bFM3_ETHERNET_MAC0_FCR_PT9 *((volatile unsigned int*)(0x42C80364UL))
|
|
#define bFM3_ETHERNET_MAC0_FCR_PT10 *((volatile unsigned int*)(0x42C80368UL))
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|
#define bFM3_ETHERNET_MAC0_FCR_PT11 *((volatile unsigned int*)(0x42C8036CUL))
|
|
#define bFM3_ETHERNET_MAC0_FCR_PT12 *((volatile unsigned int*)(0x42C80370UL))
|
|
#define bFM3_ETHERNET_MAC0_FCR_PT13 *((volatile unsigned int*)(0x42C80374UL))
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|
#define bFM3_ETHERNET_MAC0_FCR_PT14 *((volatile unsigned int*)(0x42C80378UL))
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|
#define bFM3_ETHERNET_MAC0_FCR_PT15 *((volatile unsigned int*)(0x42C8037CUL))
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|
#define bFM3_ETHERNET_MAC0_VTR_VL0 *((volatile unsigned int*)(0x42C80380UL))
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|
#define bFM3_ETHERNET_MAC0_VTR_VL1 *((volatile unsigned int*)(0x42C80384UL))
|
|
#define bFM3_ETHERNET_MAC0_VTR_VL2 *((volatile unsigned int*)(0x42C80388UL))
|
|
#define bFM3_ETHERNET_MAC0_VTR_VL3 *((volatile unsigned int*)(0x42C8038CUL))
|
|
#define bFM3_ETHERNET_MAC0_VTR_VL4 *((volatile unsigned int*)(0x42C80390UL))
|
|
#define bFM3_ETHERNET_MAC0_VTR_VL5 *((volatile unsigned int*)(0x42C80394UL))
|
|
#define bFM3_ETHERNET_MAC0_VTR_VL6 *((volatile unsigned int*)(0x42C80398UL))
|
|
#define bFM3_ETHERNET_MAC0_VTR_VL7 *((volatile unsigned int*)(0x42C8039CUL))
|
|
#define bFM3_ETHERNET_MAC0_VTR_VL8 *((volatile unsigned int*)(0x42C803A0UL))
|
|
#define bFM3_ETHERNET_MAC0_VTR_VL9 *((volatile unsigned int*)(0x42C803A4UL))
|
|
#define bFM3_ETHERNET_MAC0_VTR_VL10 *((volatile unsigned int*)(0x42C803A8UL))
|
|
#define bFM3_ETHERNET_MAC0_VTR_VL11 *((volatile unsigned int*)(0x42C803ACUL))
|
|
#define bFM3_ETHERNET_MAC0_VTR_VL12 *((volatile unsigned int*)(0x42C803B0UL))
|
|
#define bFM3_ETHERNET_MAC0_VTR_VL13 *((volatile unsigned int*)(0x42C803B4UL))
|
|
#define bFM3_ETHERNET_MAC0_VTR_VL14 *((volatile unsigned int*)(0x42C803B8UL))
|
|
#define bFM3_ETHERNET_MAC0_VTR_VL15 *((volatile unsigned int*)(0x42C803BCUL))
|
|
#define bFM3_ETHERNET_MAC0_VTR_ETV *((volatile unsigned int*)(0x42C803C0UL))
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|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR0 *((volatile unsigned int*)(0x42C80500UL))
|
|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR1 *((volatile unsigned int*)(0x42C80504UL))
|
|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR2 *((volatile unsigned int*)(0x42C80508UL))
|
|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR3 *((volatile unsigned int*)(0x42C8050CUL))
|
|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR4 *((volatile unsigned int*)(0x42C80510UL))
|
|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR5 *((volatile unsigned int*)(0x42C80514UL))
|
|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR6 *((volatile unsigned int*)(0x42C80518UL))
|
|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR7 *((volatile unsigned int*)(0x42C8051CUL))
|
|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR8 *((volatile unsigned int*)(0x42C80520UL))
|
|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR9 *((volatile unsigned int*)(0x42C80524UL))
|
|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR10 *((volatile unsigned int*)(0x42C80528UL))
|
|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR11 *((volatile unsigned int*)(0x42C8052CUL))
|
|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR12 *((volatile unsigned int*)(0x42C80530UL))
|
|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR13 *((volatile unsigned int*)(0x42C80534UL))
|
|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR14 *((volatile unsigned int*)(0x42C80538UL))
|
|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR15 *((volatile unsigned int*)(0x42C8053CUL))
|
|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR16 *((volatile unsigned int*)(0x42C80540UL))
|
|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR17 *((volatile unsigned int*)(0x42C80544UL))
|
|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR18 *((volatile unsigned int*)(0x42C80548UL))
|
|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR19 *((volatile unsigned int*)(0x42C8054CUL))
|
|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR20 *((volatile unsigned int*)(0x42C80550UL))
|
|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR21 *((volatile unsigned int*)(0x42C80554UL))
|
|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR22 *((volatile unsigned int*)(0x42C80558UL))
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|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR23 *((volatile unsigned int*)(0x42C8055CUL))
|
|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR24 *((volatile unsigned int*)(0x42C80560UL))
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|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR25 *((volatile unsigned int*)(0x42C80564UL))
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|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR26 *((volatile unsigned int*)(0x42C80568UL))
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|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR27 *((volatile unsigned int*)(0x42C8056CUL))
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|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR28 *((volatile unsigned int*)(0x42C80570UL))
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|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR29 *((volatile unsigned int*)(0x42C80574UL))
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|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR30 *((volatile unsigned int*)(0x42C80578UL))
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|
#define bFM3_ETHERNET_MAC0_RWFFR_RWFFR31 *((volatile unsigned int*)(0x42C8057CUL))
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#define bFM3_ETHERNET_MAC0_PMTR_PD *((volatile unsigned int*)(0x42C80580UL))
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|
#define bFM3_ETHERNET_MAC0_PMTR_MPE *((volatile unsigned int*)(0x42C80584UL))
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|
#define bFM3_ETHERNET_MAC0_PMTR_WFE *((volatile unsigned int*)(0x42C80588UL))
|
|
#define bFM3_ETHERNET_MAC0_PMTR_MPR *((volatile unsigned int*)(0x42C80594UL))
|
|
#define bFM3_ETHERNET_MAC0_PMTR_WPR *((volatile unsigned int*)(0x42C80598UL))
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|
#define bFM3_ETHERNET_MAC0_PMTR_GU *((volatile unsigned int*)(0x42C805A4UL))
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|
#define bFM3_ETHERNET_MAC0_PMTR_RWFFRPR *((volatile unsigned int*)(0x42C805FCUL))
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|
#define bFM3_ETHERNET_MAC0_LPICSR_TLPIEN *((volatile unsigned int*)(0x42C80600UL))
|
|
#define bFM3_ETHERNET_MAC0_LPICSR_TLPIEX *((volatile unsigned int*)(0x42C80604UL))
|
|
#define bFM3_ETHERNET_MAC0_LPICSR_RLPIEN *((volatile unsigned int*)(0x42C80608UL))
|
|
#define bFM3_ETHERNET_MAC0_LPICSR_RLPIEX *((volatile unsigned int*)(0x42C8060CUL))
|
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#define bFM3_ETHERNET_MAC0_LPICSR_TLPIST *((volatile unsigned int*)(0x42C80620UL))
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|
#define bFM3_ETHERNET_MAC0_LPICSR_RLPIST *((volatile unsigned int*)(0x42C80624UL))
|
|
#define bFM3_ETHERNET_MAC0_LPICSR_LPIEN *((volatile unsigned int*)(0x42C80640UL))
|
|
#define bFM3_ETHERNET_MAC0_LPICSR_PLS *((volatile unsigned int*)(0x42C80644UL))
|
|
#define bFM3_ETHERNET_MAC0_LPICSR_PLSEN *((volatile unsigned int*)(0x42C80648UL))
|
|
#define bFM3_ETHERNET_MAC0_LPICSR_LPITXA *((volatile unsigned int*)(0x42C8064CUL))
|
|
#define bFM3_ETHERNET_MAC0_LPITCR_TWT0 *((volatile unsigned int*)(0x42C80680UL))
|
|
#define bFM3_ETHERNET_MAC0_LPITCR_TWT1 *((volatile unsigned int*)(0x42C80684UL))
|
|
#define bFM3_ETHERNET_MAC0_LPITCR_TWT2 *((volatile unsigned int*)(0x42C80688UL))
|
|
#define bFM3_ETHERNET_MAC0_LPITCR_TWT3 *((volatile unsigned int*)(0x42C8068CUL))
|
|
#define bFM3_ETHERNET_MAC0_LPITCR_TWT4 *((volatile unsigned int*)(0x42C80690UL))
|
|
#define bFM3_ETHERNET_MAC0_LPITCR_TWT5 *((volatile unsigned int*)(0x42C80694UL))
|
|
#define bFM3_ETHERNET_MAC0_LPITCR_TWT6 *((volatile unsigned int*)(0x42C80698UL))
|
|
#define bFM3_ETHERNET_MAC0_LPITCR_TWT7 *((volatile unsigned int*)(0x42C8069CUL))
|
|
#define bFM3_ETHERNET_MAC0_LPITCR_TWT8 *((volatile unsigned int*)(0x42C806A0UL))
|
|
#define bFM3_ETHERNET_MAC0_LPITCR_TWT9 *((volatile unsigned int*)(0x42C806A4UL))
|
|
#define bFM3_ETHERNET_MAC0_LPITCR_TWT10 *((volatile unsigned int*)(0x42C806A8UL))
|
|
#define bFM3_ETHERNET_MAC0_LPITCR_TWT11 *((volatile unsigned int*)(0x42C806ACUL))
|
|
#define bFM3_ETHERNET_MAC0_LPITCR_TWT12 *((volatile unsigned int*)(0x42C806B0UL))
|
|
#define bFM3_ETHERNET_MAC0_LPITCR_TWT13 *((volatile unsigned int*)(0x42C806B4UL))
|
|
#define bFM3_ETHERNET_MAC0_LPITCR_TWT14 *((volatile unsigned int*)(0x42C806B8UL))
|
|
#define bFM3_ETHERNET_MAC0_LPITCR_TWT15 *((volatile unsigned int*)(0x42C806BCUL))
|
|
#define bFM3_ETHERNET_MAC0_LPITCR_LIT0 *((volatile unsigned int*)(0x42C806C0UL))
|
|
#define bFM3_ETHERNET_MAC0_LPITCR_LIT1 *((volatile unsigned int*)(0x42C806C4UL))
|
|
#define bFM3_ETHERNET_MAC0_LPITCR_LIT2 *((volatile unsigned int*)(0x42C806C8UL))
|
|
#define bFM3_ETHERNET_MAC0_LPITCR_LIT3 *((volatile unsigned int*)(0x42C806CCUL))
|
|
#define bFM3_ETHERNET_MAC0_LPITCR_LIT4 *((volatile unsigned int*)(0x42C806D0UL))
|
|
#define bFM3_ETHERNET_MAC0_LPITCR_LIT5 *((volatile unsigned int*)(0x42C806D4UL))
|
|
#define bFM3_ETHERNET_MAC0_LPITCR_LIT6 *((volatile unsigned int*)(0x42C806D8UL))
|
|
#define bFM3_ETHERNET_MAC0_LPITCR_LIT7 *((volatile unsigned int*)(0x42C806DCUL))
|
|
#define bFM3_ETHERNET_MAC0_LPITCR_LIT8 *((volatile unsigned int*)(0x42C806E0UL))
|
|
#define bFM3_ETHERNET_MAC0_LPITCR_LIT9 *((volatile unsigned int*)(0x42C806E4UL))
|
|
#define bFM3_ETHERNET_MAC0_ISR_RGIS *((volatile unsigned int*)(0x42C80700UL))
|
|
#define bFM3_ETHERNET_MAC0_ISR_PIS *((volatile unsigned int*)(0x42C8070CUL))
|
|
#define bFM3_ETHERNET_MAC0_ISR_MIS *((volatile unsigned int*)(0x42C80710UL))
|
|
#define bFM3_ETHERNET_MAC0_ISR_RIS *((volatile unsigned int*)(0x42C80714UL))
|
|
#define bFM3_ETHERNET_MAC0_ISR_TIS *((volatile unsigned int*)(0x42C80718UL))
|
|
#define bFM3_ETHERNET_MAC0_ISR_COIS *((volatile unsigned int*)(0x42C8071CUL))
|
|
#define bFM3_ETHERNET_MAC0_ISR_TSIS *((volatile unsigned int*)(0x42C80724UL))
|
|
#define bFM3_ETHERNET_MAC0_ISR_LPIIS *((volatile unsigned int*)(0x42C80728UL))
|
|
#define bFM3_ETHERNET_MAC0_IMR_RGIM *((volatile unsigned int*)(0x42C80780UL))
|
|
#define bFM3_ETHERNET_MAC0_IMR_PIM *((volatile unsigned int*)(0x42C8078CUL))
|
|
#define bFM3_ETHERNET_MAC0_IMR_TSIM *((volatile unsigned int*)(0x42C80794UL))
|
|
#define bFM3_ETHERNET_MAC0_IMR_LPIIM *((volatile unsigned int*)(0x42C80798UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0H_A32 *((volatile unsigned int*)(0x42C80800UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0H_A33 *((volatile unsigned int*)(0x42C80804UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0H_A34 *((volatile unsigned int*)(0x42C80808UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0H_A35 *((volatile unsigned int*)(0x42C8080CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0H_A36 *((volatile unsigned int*)(0x42C80810UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0H_A37 *((volatile unsigned int*)(0x42C80814UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0H_A38 *((volatile unsigned int*)(0x42C80818UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0H_A39 *((volatile unsigned int*)(0x42C8081CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0H_A40 *((volatile unsigned int*)(0x42C80820UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0H_A41 *((volatile unsigned int*)(0x42C80824UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0H_A42 *((volatile unsigned int*)(0x42C80828UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0H_A43 *((volatile unsigned int*)(0x42C8082CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0H_A44 *((volatile unsigned int*)(0x42C80830UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0H_A45 *((volatile unsigned int*)(0x42C80834UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0H_A46 *((volatile unsigned int*)(0x42C80838UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0H_A47 *((volatile unsigned int*)(0x42C8083CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0H_MO *((volatile unsigned int*)(0x42C8087CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0L_A0 *((volatile unsigned int*)(0x42C80880UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0L_A1 *((volatile unsigned int*)(0x42C80884UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0L_A2 *((volatile unsigned int*)(0x42C80888UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0L_A3 *((volatile unsigned int*)(0x42C8088CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0L_A4 *((volatile unsigned int*)(0x42C80890UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0L_A5 *((volatile unsigned int*)(0x42C80894UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0L_A6 *((volatile unsigned int*)(0x42C80898UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0L_A7 *((volatile unsigned int*)(0x42C8089CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0L_A8 *((volatile unsigned int*)(0x42C808A0UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0L_A9 *((volatile unsigned int*)(0x42C808A4UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0L_A10 *((volatile unsigned int*)(0x42C808A8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0L_A11 *((volatile unsigned int*)(0x42C808ACUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0L_A12 *((volatile unsigned int*)(0x42C808B0UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0L_A13 *((volatile unsigned int*)(0x42C808B4UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0L_A14 *((volatile unsigned int*)(0x42C808B8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0L_A15 *((volatile unsigned int*)(0x42C808BCUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0L_A16 *((volatile unsigned int*)(0x42C808C0UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0L_A17 *((volatile unsigned int*)(0x42C808C4UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0L_A18 *((volatile unsigned int*)(0x42C808C8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0L_A19 *((volatile unsigned int*)(0x42C808CCUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0L_A20 *((volatile unsigned int*)(0x42C808D0UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR0L_A21 *((volatile unsigned int*)(0x42C808D4UL))
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#define bFM3_ETHERNET_MAC0_MAR0L_A22 *((volatile unsigned int*)(0x42C808D8UL))
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#define bFM3_ETHERNET_MAC0_MAR0L_A23 *((volatile unsigned int*)(0x42C808DCUL))
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#define bFM3_ETHERNET_MAC0_MAR0L_A24 *((volatile unsigned int*)(0x42C808E0UL))
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#define bFM3_ETHERNET_MAC0_MAR0L_A25 *((volatile unsigned int*)(0x42C808E4UL))
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#define bFM3_ETHERNET_MAC0_MAR0L_A26 *((volatile unsigned int*)(0x42C808E8UL))
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#define bFM3_ETHERNET_MAC0_MAR0L_A27 *((volatile unsigned int*)(0x42C808ECUL))
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#define bFM3_ETHERNET_MAC0_MAR0L_A28 *((volatile unsigned int*)(0x42C808F0UL))
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#define bFM3_ETHERNET_MAC0_MAR0L_A29 *((volatile unsigned int*)(0x42C808F4UL))
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#define bFM3_ETHERNET_MAC0_MAR0L_A30 *((volatile unsigned int*)(0x42C808F8UL))
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#define bFM3_ETHERNET_MAC0_MAR0L_A31 *((volatile unsigned int*)(0x42C808FCUL))
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#define bFM3_ETHERNET_MAC0_MAR1H_A32 *((volatile unsigned int*)(0x42C80900UL))
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#define bFM3_ETHERNET_MAC0_MAR1H_A33 *((volatile unsigned int*)(0x42C80904UL))
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#define bFM3_ETHERNET_MAC0_MAR1H_A34 *((volatile unsigned int*)(0x42C80908UL))
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#define bFM3_ETHERNET_MAC0_MAR1H_A35 *((volatile unsigned int*)(0x42C8090CUL))
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#define bFM3_ETHERNET_MAC0_MAR1H_A36 *((volatile unsigned int*)(0x42C80910UL))
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#define bFM3_ETHERNET_MAC0_MAR1H_A37 *((volatile unsigned int*)(0x42C80914UL))
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#define bFM3_ETHERNET_MAC0_MAR1H_A38 *((volatile unsigned int*)(0x42C80918UL))
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#define bFM3_ETHERNET_MAC0_MAR1H_A39 *((volatile unsigned int*)(0x42C8091CUL))
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#define bFM3_ETHERNET_MAC0_MAR1H_A40 *((volatile unsigned int*)(0x42C80920UL))
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#define bFM3_ETHERNET_MAC0_MAR1H_A41 *((volatile unsigned int*)(0x42C80924UL))
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#define bFM3_ETHERNET_MAC0_MAR1H_A42 *((volatile unsigned int*)(0x42C80928UL))
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#define bFM3_ETHERNET_MAC0_MAR1H_A43 *((volatile unsigned int*)(0x42C8092CUL))
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#define bFM3_ETHERNET_MAC0_MAR1H_A44 *((volatile unsigned int*)(0x42C80930UL))
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#define bFM3_ETHERNET_MAC0_MAR1H_A45 *((volatile unsigned int*)(0x42C80934UL))
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#define bFM3_ETHERNET_MAC0_MAR1H_A46 *((volatile unsigned int*)(0x42C80938UL))
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#define bFM3_ETHERNET_MAC0_MAR1H_A47 *((volatile unsigned int*)(0x42C8093CUL))
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#define bFM3_ETHERNET_MAC0_MAR1H_MBC0 *((volatile unsigned int*)(0x42C80960UL))
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#define bFM3_ETHERNET_MAC0_MAR1H_MBC1 *((volatile unsigned int*)(0x42C80964UL))
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#define bFM3_ETHERNET_MAC0_MAR1H_MBC2 *((volatile unsigned int*)(0x42C80968UL))
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#define bFM3_ETHERNET_MAC0_MAR1H_MBC3 *((volatile unsigned int*)(0x42C8096CUL))
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#define bFM3_ETHERNET_MAC0_MAR1H_MBC4 *((volatile unsigned int*)(0x42C80970UL))
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#define bFM3_ETHERNET_MAC0_MAR1H_MBC5 *((volatile unsigned int*)(0x42C80974UL))
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#define bFM3_ETHERNET_MAC0_MAR1H_SA *((volatile unsigned int*)(0x42C80978UL))
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#define bFM3_ETHERNET_MAC0_MAR1H_AE *((volatile unsigned int*)(0x42C8097CUL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A0 *((volatile unsigned int*)(0x42C80980UL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A1 *((volatile unsigned int*)(0x42C80984UL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A2 *((volatile unsigned int*)(0x42C80988UL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A3 *((volatile unsigned int*)(0x42C8098CUL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A4 *((volatile unsigned int*)(0x42C80990UL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A5 *((volatile unsigned int*)(0x42C80994UL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A6 *((volatile unsigned int*)(0x42C80998UL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A7 *((volatile unsigned int*)(0x42C8099CUL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A8 *((volatile unsigned int*)(0x42C809A0UL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A9 *((volatile unsigned int*)(0x42C809A4UL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A10 *((volatile unsigned int*)(0x42C809A8UL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A11 *((volatile unsigned int*)(0x42C809ACUL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A12 *((volatile unsigned int*)(0x42C809B0UL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A13 *((volatile unsigned int*)(0x42C809B4UL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A14 *((volatile unsigned int*)(0x42C809B8UL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A15 *((volatile unsigned int*)(0x42C809BCUL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A16 *((volatile unsigned int*)(0x42C809C0UL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A17 *((volatile unsigned int*)(0x42C809C4UL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A18 *((volatile unsigned int*)(0x42C809C8UL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A19 *((volatile unsigned int*)(0x42C809CCUL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A20 *((volatile unsigned int*)(0x42C809D0UL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A21 *((volatile unsigned int*)(0x42C809D4UL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A22 *((volatile unsigned int*)(0x42C809D8UL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A23 *((volatile unsigned int*)(0x42C809DCUL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A24 *((volatile unsigned int*)(0x42C809E0UL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A25 *((volatile unsigned int*)(0x42C809E4UL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A26 *((volatile unsigned int*)(0x42C809E8UL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A27 *((volatile unsigned int*)(0x42C809ECUL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A28 *((volatile unsigned int*)(0x42C809F0UL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A29 *((volatile unsigned int*)(0x42C809F4UL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A30 *((volatile unsigned int*)(0x42C809F8UL))
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#define bFM3_ETHERNET_MAC0_MAR1L_A31 *((volatile unsigned int*)(0x42C809FCUL))
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#define bFM3_ETHERNET_MAC0_MAR2H_A32 *((volatile unsigned int*)(0x42C80A00UL))
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#define bFM3_ETHERNET_MAC0_MAR2H_A33 *((volatile unsigned int*)(0x42C80A04UL))
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#define bFM3_ETHERNET_MAC0_MAR2H_A34 *((volatile unsigned int*)(0x42C80A08UL))
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#define bFM3_ETHERNET_MAC0_MAR2H_A35 *((volatile unsigned int*)(0x42C80A0CUL))
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#define bFM3_ETHERNET_MAC0_MAR2H_A36 *((volatile unsigned int*)(0x42C80A10UL))
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#define bFM3_ETHERNET_MAC0_MAR2H_A37 *((volatile unsigned int*)(0x42C80A14UL))
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#define bFM3_ETHERNET_MAC0_MAR2H_A38 *((volatile unsigned int*)(0x42C80A18UL))
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#define bFM3_ETHERNET_MAC0_MAR2H_A39 *((volatile unsigned int*)(0x42C80A1CUL))
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#define bFM3_ETHERNET_MAC0_MAR2H_A40 *((volatile unsigned int*)(0x42C80A20UL))
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#define bFM3_ETHERNET_MAC0_MAR2H_A41 *((volatile unsigned int*)(0x42C80A24UL))
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#define bFM3_ETHERNET_MAC0_MAR2H_A42 *((volatile unsigned int*)(0x42C80A28UL))
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#define bFM3_ETHERNET_MAC0_MAR2H_A43 *((volatile unsigned int*)(0x42C80A2CUL))
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#define bFM3_ETHERNET_MAC0_MAR2H_A44 *((volatile unsigned int*)(0x42C80A30UL))
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#define bFM3_ETHERNET_MAC0_MAR2H_A45 *((volatile unsigned int*)(0x42C80A34UL))
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#define bFM3_ETHERNET_MAC0_MAR2H_A46 *((volatile unsigned int*)(0x42C80A38UL))
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#define bFM3_ETHERNET_MAC0_MAR2H_A47 *((volatile unsigned int*)(0x42C80A3CUL))
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#define bFM3_ETHERNET_MAC0_MAR2H_MBC0 *((volatile unsigned int*)(0x42C80A60UL))
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#define bFM3_ETHERNET_MAC0_MAR2H_MBC1 *((volatile unsigned int*)(0x42C80A64UL))
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#define bFM3_ETHERNET_MAC0_MAR2H_MBC2 *((volatile unsigned int*)(0x42C80A68UL))
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#define bFM3_ETHERNET_MAC0_MAR2H_MBC3 *((volatile unsigned int*)(0x42C80A6CUL))
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#define bFM3_ETHERNET_MAC0_MAR2H_MBC4 *((volatile unsigned int*)(0x42C80A70UL))
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#define bFM3_ETHERNET_MAC0_MAR2H_MBC5 *((volatile unsigned int*)(0x42C80A74UL))
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#define bFM3_ETHERNET_MAC0_MAR2H_SA *((volatile unsigned int*)(0x42C80A78UL))
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#define bFM3_ETHERNET_MAC0_MAR2H_AE *((volatile unsigned int*)(0x42C80A7CUL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A0 *((volatile unsigned int*)(0x42C80A80UL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A1 *((volatile unsigned int*)(0x42C80A84UL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A2 *((volatile unsigned int*)(0x42C80A88UL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A3 *((volatile unsigned int*)(0x42C80A8CUL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A4 *((volatile unsigned int*)(0x42C80A90UL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A5 *((volatile unsigned int*)(0x42C80A94UL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A6 *((volatile unsigned int*)(0x42C80A98UL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A7 *((volatile unsigned int*)(0x42C80A9CUL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A8 *((volatile unsigned int*)(0x42C80AA0UL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A9 *((volatile unsigned int*)(0x42C80AA4UL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A10 *((volatile unsigned int*)(0x42C80AA8UL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A11 *((volatile unsigned int*)(0x42C80AACUL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A12 *((volatile unsigned int*)(0x42C80AB0UL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A13 *((volatile unsigned int*)(0x42C80AB4UL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A14 *((volatile unsigned int*)(0x42C80AB8UL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A15 *((volatile unsigned int*)(0x42C80ABCUL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A16 *((volatile unsigned int*)(0x42C80AC0UL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A17 *((volatile unsigned int*)(0x42C80AC4UL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A18 *((volatile unsigned int*)(0x42C80AC8UL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A19 *((volatile unsigned int*)(0x42C80ACCUL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A20 *((volatile unsigned int*)(0x42C80AD0UL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A21 *((volatile unsigned int*)(0x42C80AD4UL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A22 *((volatile unsigned int*)(0x42C80AD8UL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A23 *((volatile unsigned int*)(0x42C80ADCUL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A24 *((volatile unsigned int*)(0x42C80AE0UL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A25 *((volatile unsigned int*)(0x42C80AE4UL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A26 *((volatile unsigned int*)(0x42C80AE8UL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A27 *((volatile unsigned int*)(0x42C80AECUL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A28 *((volatile unsigned int*)(0x42C80AF0UL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A29 *((volatile unsigned int*)(0x42C80AF4UL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A30 *((volatile unsigned int*)(0x42C80AF8UL))
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#define bFM3_ETHERNET_MAC0_MAR2L_A31 *((volatile unsigned int*)(0x42C80AFCUL))
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#define bFM3_ETHERNET_MAC0_MAR3H_A32 *((volatile unsigned int*)(0x42C80B00UL))
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#define bFM3_ETHERNET_MAC0_MAR3H_A33 *((volatile unsigned int*)(0x42C80B04UL))
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#define bFM3_ETHERNET_MAC0_MAR3H_A34 *((volatile unsigned int*)(0x42C80B08UL))
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#define bFM3_ETHERNET_MAC0_MAR3H_A35 *((volatile unsigned int*)(0x42C80B0CUL))
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#define bFM3_ETHERNET_MAC0_MAR3H_A36 *((volatile unsigned int*)(0x42C80B10UL))
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#define bFM3_ETHERNET_MAC0_MAR3H_A37 *((volatile unsigned int*)(0x42C80B14UL))
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#define bFM3_ETHERNET_MAC0_MAR3H_A38 *((volatile unsigned int*)(0x42C80B18UL))
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#define bFM3_ETHERNET_MAC0_MAR3H_A39 *((volatile unsigned int*)(0x42C80B1CUL))
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#define bFM3_ETHERNET_MAC0_MAR3H_A40 *((volatile unsigned int*)(0x42C80B20UL))
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#define bFM3_ETHERNET_MAC0_MAR3H_A41 *((volatile unsigned int*)(0x42C80B24UL))
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#define bFM3_ETHERNET_MAC0_MAR3H_A42 *((volatile unsigned int*)(0x42C80B28UL))
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#define bFM3_ETHERNET_MAC0_MAR3H_A43 *((volatile unsigned int*)(0x42C80B2CUL))
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#define bFM3_ETHERNET_MAC0_MAR3H_A44 *((volatile unsigned int*)(0x42C80B30UL))
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#define bFM3_ETHERNET_MAC0_MAR3H_A45 *((volatile unsigned int*)(0x42C80B34UL))
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#define bFM3_ETHERNET_MAC0_MAR3H_A46 *((volatile unsigned int*)(0x42C80B38UL))
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#define bFM3_ETHERNET_MAC0_MAR3H_A47 *((volatile unsigned int*)(0x42C80B3CUL))
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#define bFM3_ETHERNET_MAC0_MAR3H_MBC0 *((volatile unsigned int*)(0x42C80B60UL))
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#define bFM3_ETHERNET_MAC0_MAR3H_MBC1 *((volatile unsigned int*)(0x42C80B64UL))
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#define bFM3_ETHERNET_MAC0_MAR3H_MBC2 *((volatile unsigned int*)(0x42C80B68UL))
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#define bFM3_ETHERNET_MAC0_MAR3H_MBC3 *((volatile unsigned int*)(0x42C80B6CUL))
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#define bFM3_ETHERNET_MAC0_MAR3H_MBC4 *((volatile unsigned int*)(0x42C80B70UL))
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#define bFM3_ETHERNET_MAC0_MAR3H_MBC5 *((volatile unsigned int*)(0x42C80B74UL))
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#define bFM3_ETHERNET_MAC0_MAR3H_SA *((volatile unsigned int*)(0x42C80B78UL))
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#define bFM3_ETHERNET_MAC0_MAR3H_AE *((volatile unsigned int*)(0x42C80B7CUL))
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#define bFM3_ETHERNET_MAC0_MAR3L_A0 *((volatile unsigned int*)(0x42C80B80UL))
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#define bFM3_ETHERNET_MAC0_MAR3L_A1 *((volatile unsigned int*)(0x42C80B84UL))
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#define bFM3_ETHERNET_MAC0_MAR3L_A2 *((volatile unsigned int*)(0x42C80B88UL))
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#define bFM3_ETHERNET_MAC0_MAR3L_A3 *((volatile unsigned int*)(0x42C80B8CUL))
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#define bFM3_ETHERNET_MAC0_MAR3L_A4 *((volatile unsigned int*)(0x42C80B90UL))
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#define bFM3_ETHERNET_MAC0_MAR3L_A5 *((volatile unsigned int*)(0x42C80B94UL))
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#define bFM3_ETHERNET_MAC0_MAR3L_A6 *((volatile unsigned int*)(0x42C80B98UL))
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#define bFM3_ETHERNET_MAC0_MAR3L_A7 *((volatile unsigned int*)(0x42C80B9CUL))
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|
#define bFM3_ETHERNET_MAC0_MAR3L_A8 *((volatile unsigned int*)(0x42C80BA0UL))
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|
#define bFM3_ETHERNET_MAC0_MAR3L_A9 *((volatile unsigned int*)(0x42C80BA4UL))
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|
#define bFM3_ETHERNET_MAC0_MAR3L_A10 *((volatile unsigned int*)(0x42C80BA8UL))
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|
#define bFM3_ETHERNET_MAC0_MAR3L_A11 *((volatile unsigned int*)(0x42C80BACUL))
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|
#define bFM3_ETHERNET_MAC0_MAR3L_A12 *((volatile unsigned int*)(0x42C80BB0UL))
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|
#define bFM3_ETHERNET_MAC0_MAR3L_A13 *((volatile unsigned int*)(0x42C80BB4UL))
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|
#define bFM3_ETHERNET_MAC0_MAR3L_A14 *((volatile unsigned int*)(0x42C80BB8UL))
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|
#define bFM3_ETHERNET_MAC0_MAR3L_A15 *((volatile unsigned int*)(0x42C80BBCUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR3L_A16 *((volatile unsigned int*)(0x42C80BC0UL))
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|
#define bFM3_ETHERNET_MAC0_MAR3L_A17 *((volatile unsigned int*)(0x42C80BC4UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR3L_A18 *((volatile unsigned int*)(0x42C80BC8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR3L_A19 *((volatile unsigned int*)(0x42C80BCCUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR3L_A20 *((volatile unsigned int*)(0x42C80BD0UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR3L_A21 *((volatile unsigned int*)(0x42C80BD4UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR3L_A22 *((volatile unsigned int*)(0x42C80BD8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR3L_A23 *((volatile unsigned int*)(0x42C80BDCUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR3L_A24 *((volatile unsigned int*)(0x42C80BE0UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR3L_A25 *((volatile unsigned int*)(0x42C80BE4UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR3L_A26 *((volatile unsigned int*)(0x42C80BE8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR3L_A27 *((volatile unsigned int*)(0x42C80BECUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR3L_A28 *((volatile unsigned int*)(0x42C80BF0UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR3L_A29 *((volatile unsigned int*)(0x42C80BF4UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR3L_A30 *((volatile unsigned int*)(0x42C80BF8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR3L_A31 *((volatile unsigned int*)(0x42C80BFCUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR4H_A32 *((volatile unsigned int*)(0x42C80C00UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR4H_A33 *((volatile unsigned int*)(0x42C80C04UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR4H_A34 *((volatile unsigned int*)(0x42C80C08UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR4H_A35 *((volatile unsigned int*)(0x42C80C0CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR4H_A36 *((volatile unsigned int*)(0x42C80C10UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR4H_A37 *((volatile unsigned int*)(0x42C80C14UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR4H_A38 *((volatile unsigned int*)(0x42C80C18UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR4H_A39 *((volatile unsigned int*)(0x42C80C1CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR4H_A40 *((volatile unsigned int*)(0x42C80C20UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR4H_A41 *((volatile unsigned int*)(0x42C80C24UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR4H_A42 *((volatile unsigned int*)(0x42C80C28UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR4H_A43 *((volatile unsigned int*)(0x42C80C2CUL))
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#define bFM3_ETHERNET_MAC0_MAR4H_A44 *((volatile unsigned int*)(0x42C80C30UL))
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#define bFM3_ETHERNET_MAC0_MAR4H_A45 *((volatile unsigned int*)(0x42C80C34UL))
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#define bFM3_ETHERNET_MAC0_MAR4H_A46 *((volatile unsigned int*)(0x42C80C38UL))
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#define bFM3_ETHERNET_MAC0_MAR4H_A47 *((volatile unsigned int*)(0x42C80C3CUL))
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#define bFM3_ETHERNET_MAC0_MAR4H_MBC0 *((volatile unsigned int*)(0x42C80C60UL))
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#define bFM3_ETHERNET_MAC0_MAR4H_MBC1 *((volatile unsigned int*)(0x42C80C64UL))
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#define bFM3_ETHERNET_MAC0_MAR4H_MBC2 *((volatile unsigned int*)(0x42C80C68UL))
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#define bFM3_ETHERNET_MAC0_MAR4H_MBC3 *((volatile unsigned int*)(0x42C80C6CUL))
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#define bFM3_ETHERNET_MAC0_MAR4H_MBC4 *((volatile unsigned int*)(0x42C80C70UL))
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#define bFM3_ETHERNET_MAC0_MAR4H_MBC5 *((volatile unsigned int*)(0x42C80C74UL))
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#define bFM3_ETHERNET_MAC0_MAR4H_SA *((volatile unsigned int*)(0x42C80C78UL))
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#define bFM3_ETHERNET_MAC0_MAR4H_AE *((volatile unsigned int*)(0x42C80C7CUL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A0 *((volatile unsigned int*)(0x42C80C80UL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A1 *((volatile unsigned int*)(0x42C80C84UL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A2 *((volatile unsigned int*)(0x42C80C88UL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A3 *((volatile unsigned int*)(0x42C80C8CUL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A4 *((volatile unsigned int*)(0x42C80C90UL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A5 *((volatile unsigned int*)(0x42C80C94UL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A6 *((volatile unsigned int*)(0x42C80C98UL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A7 *((volatile unsigned int*)(0x42C80C9CUL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A8 *((volatile unsigned int*)(0x42C80CA0UL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A9 *((volatile unsigned int*)(0x42C80CA4UL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A10 *((volatile unsigned int*)(0x42C80CA8UL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A11 *((volatile unsigned int*)(0x42C80CACUL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A12 *((volatile unsigned int*)(0x42C80CB0UL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A13 *((volatile unsigned int*)(0x42C80CB4UL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A14 *((volatile unsigned int*)(0x42C80CB8UL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A15 *((volatile unsigned int*)(0x42C80CBCUL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A16 *((volatile unsigned int*)(0x42C80CC0UL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A17 *((volatile unsigned int*)(0x42C80CC4UL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A18 *((volatile unsigned int*)(0x42C80CC8UL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A19 *((volatile unsigned int*)(0x42C80CCCUL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A20 *((volatile unsigned int*)(0x42C80CD0UL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A21 *((volatile unsigned int*)(0x42C80CD4UL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A22 *((volatile unsigned int*)(0x42C80CD8UL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A23 *((volatile unsigned int*)(0x42C80CDCUL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A24 *((volatile unsigned int*)(0x42C80CE0UL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A25 *((volatile unsigned int*)(0x42C80CE4UL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A26 *((volatile unsigned int*)(0x42C80CE8UL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A27 *((volatile unsigned int*)(0x42C80CECUL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A28 *((volatile unsigned int*)(0x42C80CF0UL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A29 *((volatile unsigned int*)(0x42C80CF4UL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A30 *((volatile unsigned int*)(0x42C80CF8UL))
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#define bFM3_ETHERNET_MAC0_MAR4L_A31 *((volatile unsigned int*)(0x42C80CFCUL))
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#define bFM3_ETHERNET_MAC0_MAR5H_A32 *((volatile unsigned int*)(0x42C80D00UL))
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#define bFM3_ETHERNET_MAC0_MAR5H_A33 *((volatile unsigned int*)(0x42C80D04UL))
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#define bFM3_ETHERNET_MAC0_MAR5H_A34 *((volatile unsigned int*)(0x42C80D08UL))
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#define bFM3_ETHERNET_MAC0_MAR5H_A35 *((volatile unsigned int*)(0x42C80D0CUL))
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#define bFM3_ETHERNET_MAC0_MAR5H_A36 *((volatile unsigned int*)(0x42C80D10UL))
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#define bFM3_ETHERNET_MAC0_MAR5H_A37 *((volatile unsigned int*)(0x42C80D14UL))
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#define bFM3_ETHERNET_MAC0_MAR5H_A38 *((volatile unsigned int*)(0x42C80D18UL))
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#define bFM3_ETHERNET_MAC0_MAR5H_A39 *((volatile unsigned int*)(0x42C80D1CUL))
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#define bFM3_ETHERNET_MAC0_MAR5H_A40 *((volatile unsigned int*)(0x42C80D20UL))
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#define bFM3_ETHERNET_MAC0_MAR5H_A41 *((volatile unsigned int*)(0x42C80D24UL))
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#define bFM3_ETHERNET_MAC0_MAR5H_A42 *((volatile unsigned int*)(0x42C80D28UL))
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#define bFM3_ETHERNET_MAC0_MAR5H_A43 *((volatile unsigned int*)(0x42C80D2CUL))
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#define bFM3_ETHERNET_MAC0_MAR5H_A44 *((volatile unsigned int*)(0x42C80D30UL))
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#define bFM3_ETHERNET_MAC0_MAR5H_A45 *((volatile unsigned int*)(0x42C80D34UL))
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#define bFM3_ETHERNET_MAC0_MAR5H_A46 *((volatile unsigned int*)(0x42C80D38UL))
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#define bFM3_ETHERNET_MAC0_MAR5H_A47 *((volatile unsigned int*)(0x42C80D3CUL))
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#define bFM3_ETHERNET_MAC0_MAR5H_MBC0 *((volatile unsigned int*)(0x42C80D60UL))
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|
#define bFM3_ETHERNET_MAC0_MAR5H_MBC1 *((volatile unsigned int*)(0x42C80D64UL))
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|
#define bFM3_ETHERNET_MAC0_MAR5H_MBC2 *((volatile unsigned int*)(0x42C80D68UL))
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|
#define bFM3_ETHERNET_MAC0_MAR5H_MBC3 *((volatile unsigned int*)(0x42C80D6CUL))
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|
#define bFM3_ETHERNET_MAC0_MAR5H_MBC4 *((volatile unsigned int*)(0x42C80D70UL))
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|
#define bFM3_ETHERNET_MAC0_MAR5H_MBC5 *((volatile unsigned int*)(0x42C80D74UL))
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|
#define bFM3_ETHERNET_MAC0_MAR5H_SA *((volatile unsigned int*)(0x42C80D78UL))
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|
#define bFM3_ETHERNET_MAC0_MAR5H_AE *((volatile unsigned int*)(0x42C80D7CUL))
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#define bFM3_ETHERNET_MAC0_MAR5L_A0 *((volatile unsigned int*)(0x42C80D80UL))
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|
#define bFM3_ETHERNET_MAC0_MAR5L_A1 *((volatile unsigned int*)(0x42C80D84UL))
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|
#define bFM3_ETHERNET_MAC0_MAR5L_A2 *((volatile unsigned int*)(0x42C80D88UL))
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|
#define bFM3_ETHERNET_MAC0_MAR5L_A3 *((volatile unsigned int*)(0x42C80D8CUL))
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#define bFM3_ETHERNET_MAC0_MAR5L_A4 *((volatile unsigned int*)(0x42C80D90UL))
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|
#define bFM3_ETHERNET_MAC0_MAR5L_A5 *((volatile unsigned int*)(0x42C80D94UL))
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|
#define bFM3_ETHERNET_MAC0_MAR5L_A6 *((volatile unsigned int*)(0x42C80D98UL))
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|
#define bFM3_ETHERNET_MAC0_MAR5L_A7 *((volatile unsigned int*)(0x42C80D9CUL))
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#define bFM3_ETHERNET_MAC0_MAR5L_A8 *((volatile unsigned int*)(0x42C80DA0UL))
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#define bFM3_ETHERNET_MAC0_MAR5L_A9 *((volatile unsigned int*)(0x42C80DA4UL))
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#define bFM3_ETHERNET_MAC0_MAR5L_A10 *((volatile unsigned int*)(0x42C80DA8UL))
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#define bFM3_ETHERNET_MAC0_MAR5L_A11 *((volatile unsigned int*)(0x42C80DACUL))
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#define bFM3_ETHERNET_MAC0_MAR5L_A12 *((volatile unsigned int*)(0x42C80DB0UL))
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#define bFM3_ETHERNET_MAC0_MAR5L_A13 *((volatile unsigned int*)(0x42C80DB4UL))
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#define bFM3_ETHERNET_MAC0_MAR5L_A14 *((volatile unsigned int*)(0x42C80DB8UL))
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#define bFM3_ETHERNET_MAC0_MAR5L_A15 *((volatile unsigned int*)(0x42C80DBCUL))
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#define bFM3_ETHERNET_MAC0_MAR5L_A16 *((volatile unsigned int*)(0x42C80DC0UL))
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#define bFM3_ETHERNET_MAC0_MAR5L_A17 *((volatile unsigned int*)(0x42C80DC4UL))
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#define bFM3_ETHERNET_MAC0_MAR5L_A18 *((volatile unsigned int*)(0x42C80DC8UL))
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#define bFM3_ETHERNET_MAC0_MAR5L_A19 *((volatile unsigned int*)(0x42C80DCCUL))
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#define bFM3_ETHERNET_MAC0_MAR5L_A20 *((volatile unsigned int*)(0x42C80DD0UL))
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#define bFM3_ETHERNET_MAC0_MAR5L_A21 *((volatile unsigned int*)(0x42C80DD4UL))
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#define bFM3_ETHERNET_MAC0_MAR5L_A22 *((volatile unsigned int*)(0x42C80DD8UL))
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#define bFM3_ETHERNET_MAC0_MAR5L_A23 *((volatile unsigned int*)(0x42C80DDCUL))
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#define bFM3_ETHERNET_MAC0_MAR5L_A24 *((volatile unsigned int*)(0x42C80DE0UL))
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#define bFM3_ETHERNET_MAC0_MAR5L_A25 *((volatile unsigned int*)(0x42C80DE4UL))
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#define bFM3_ETHERNET_MAC0_MAR5L_A26 *((volatile unsigned int*)(0x42C80DE8UL))
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#define bFM3_ETHERNET_MAC0_MAR5L_A27 *((volatile unsigned int*)(0x42C80DECUL))
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#define bFM3_ETHERNET_MAC0_MAR5L_A28 *((volatile unsigned int*)(0x42C80DF0UL))
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#define bFM3_ETHERNET_MAC0_MAR5L_A29 *((volatile unsigned int*)(0x42C80DF4UL))
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#define bFM3_ETHERNET_MAC0_MAR5L_A30 *((volatile unsigned int*)(0x42C80DF8UL))
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#define bFM3_ETHERNET_MAC0_MAR5L_A31 *((volatile unsigned int*)(0x42C80DFCUL))
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#define bFM3_ETHERNET_MAC0_MAR6H_A32 *((volatile unsigned int*)(0x42C80E00UL))
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#define bFM3_ETHERNET_MAC0_MAR6H_A33 *((volatile unsigned int*)(0x42C80E04UL))
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#define bFM3_ETHERNET_MAC0_MAR6H_A34 *((volatile unsigned int*)(0x42C80E08UL))
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#define bFM3_ETHERNET_MAC0_MAR6H_A35 *((volatile unsigned int*)(0x42C80E0CUL))
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#define bFM3_ETHERNET_MAC0_MAR6H_A36 *((volatile unsigned int*)(0x42C80E10UL))
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#define bFM3_ETHERNET_MAC0_MAR6H_A37 *((volatile unsigned int*)(0x42C80E14UL))
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#define bFM3_ETHERNET_MAC0_MAR6H_A38 *((volatile unsigned int*)(0x42C80E18UL))
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#define bFM3_ETHERNET_MAC0_MAR6H_A39 *((volatile unsigned int*)(0x42C80E1CUL))
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#define bFM3_ETHERNET_MAC0_MAR6H_A40 *((volatile unsigned int*)(0x42C80E20UL))
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#define bFM3_ETHERNET_MAC0_MAR6H_A41 *((volatile unsigned int*)(0x42C80E24UL))
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#define bFM3_ETHERNET_MAC0_MAR6H_A42 *((volatile unsigned int*)(0x42C80E28UL))
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#define bFM3_ETHERNET_MAC0_MAR6H_A43 *((volatile unsigned int*)(0x42C80E2CUL))
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#define bFM3_ETHERNET_MAC0_MAR6H_A44 *((volatile unsigned int*)(0x42C80E30UL))
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#define bFM3_ETHERNET_MAC0_MAR6H_A45 *((volatile unsigned int*)(0x42C80E34UL))
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#define bFM3_ETHERNET_MAC0_MAR6H_A46 *((volatile unsigned int*)(0x42C80E38UL))
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#define bFM3_ETHERNET_MAC0_MAR6H_A47 *((volatile unsigned int*)(0x42C80E3CUL))
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#define bFM3_ETHERNET_MAC0_MAR6H_MBC0 *((volatile unsigned int*)(0x42C80E60UL))
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#define bFM3_ETHERNET_MAC0_MAR6H_MBC1 *((volatile unsigned int*)(0x42C80E64UL))
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#define bFM3_ETHERNET_MAC0_MAR6H_MBC2 *((volatile unsigned int*)(0x42C80E68UL))
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#define bFM3_ETHERNET_MAC0_MAR6H_MBC3 *((volatile unsigned int*)(0x42C80E6CUL))
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#define bFM3_ETHERNET_MAC0_MAR6H_MBC4 *((volatile unsigned int*)(0x42C80E70UL))
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#define bFM3_ETHERNET_MAC0_MAR6H_MBC5 *((volatile unsigned int*)(0x42C80E74UL))
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#define bFM3_ETHERNET_MAC0_MAR6H_SA *((volatile unsigned int*)(0x42C80E78UL))
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#define bFM3_ETHERNET_MAC0_MAR6H_AE *((volatile unsigned int*)(0x42C80E7CUL))
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#define bFM3_ETHERNET_MAC0_MAR6L_A0 *((volatile unsigned int*)(0x42C80E80UL))
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#define bFM3_ETHERNET_MAC0_MAR6L_A1 *((volatile unsigned int*)(0x42C80E84UL))
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#define bFM3_ETHERNET_MAC0_MAR6L_A2 *((volatile unsigned int*)(0x42C80E88UL))
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#define bFM3_ETHERNET_MAC0_MAR6L_A3 *((volatile unsigned int*)(0x42C80E8CUL))
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#define bFM3_ETHERNET_MAC0_MAR6L_A4 *((volatile unsigned int*)(0x42C80E90UL))
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#define bFM3_ETHERNET_MAC0_MAR6L_A5 *((volatile unsigned int*)(0x42C80E94UL))
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#define bFM3_ETHERNET_MAC0_MAR6L_A6 *((volatile unsigned int*)(0x42C80E98UL))
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#define bFM3_ETHERNET_MAC0_MAR6L_A7 *((volatile unsigned int*)(0x42C80E9CUL))
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#define bFM3_ETHERNET_MAC0_MAR6L_A8 *((volatile unsigned int*)(0x42C80EA0UL))
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#define bFM3_ETHERNET_MAC0_MAR6L_A9 *((volatile unsigned int*)(0x42C80EA4UL))
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#define bFM3_ETHERNET_MAC0_MAR6L_A10 *((volatile unsigned int*)(0x42C80EA8UL))
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#define bFM3_ETHERNET_MAC0_MAR6L_A11 *((volatile unsigned int*)(0x42C80EACUL))
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#define bFM3_ETHERNET_MAC0_MAR6L_A12 *((volatile unsigned int*)(0x42C80EB0UL))
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#define bFM3_ETHERNET_MAC0_MAR6L_A13 *((volatile unsigned int*)(0x42C80EB4UL))
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#define bFM3_ETHERNET_MAC0_MAR6L_A14 *((volatile unsigned int*)(0x42C80EB8UL))
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#define bFM3_ETHERNET_MAC0_MAR6L_A15 *((volatile unsigned int*)(0x42C80EBCUL))
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#define bFM3_ETHERNET_MAC0_MAR6L_A16 *((volatile unsigned int*)(0x42C80EC0UL))
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|
#define bFM3_ETHERNET_MAC0_MAR6L_A17 *((volatile unsigned int*)(0x42C80EC4UL))
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#define bFM3_ETHERNET_MAC0_MAR6L_A18 *((volatile unsigned int*)(0x42C80EC8UL))
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#define bFM3_ETHERNET_MAC0_MAR6L_A19 *((volatile unsigned int*)(0x42C80ECCUL))
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#define bFM3_ETHERNET_MAC0_MAR6L_A20 *((volatile unsigned int*)(0x42C80ED0UL))
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#define bFM3_ETHERNET_MAC0_MAR6L_A21 *((volatile unsigned int*)(0x42C80ED4UL))
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#define bFM3_ETHERNET_MAC0_MAR6L_A22 *((volatile unsigned int*)(0x42C80ED8UL))
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|
#define bFM3_ETHERNET_MAC0_MAR6L_A23 *((volatile unsigned int*)(0x42C80EDCUL))
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#define bFM3_ETHERNET_MAC0_MAR6L_A24 *((volatile unsigned int*)(0x42C80EE0UL))
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#define bFM3_ETHERNET_MAC0_MAR6L_A25 *((volatile unsigned int*)(0x42C80EE4UL))
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#define bFM3_ETHERNET_MAC0_MAR6L_A26 *((volatile unsigned int*)(0x42C80EE8UL))
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|
#define bFM3_ETHERNET_MAC0_MAR6L_A27 *((volatile unsigned int*)(0x42C80EECUL))
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|
#define bFM3_ETHERNET_MAC0_MAR6L_A28 *((volatile unsigned int*)(0x42C80EF0UL))
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|
#define bFM3_ETHERNET_MAC0_MAR6L_A29 *((volatile unsigned int*)(0x42C80EF4UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR6L_A30 *((volatile unsigned int*)(0x42C80EF8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR6L_A31 *((volatile unsigned int*)(0x42C80EFCUL))
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|
#define bFM3_ETHERNET_MAC0_MAR7H_A32 *((volatile unsigned int*)(0x42C80F00UL))
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|
#define bFM3_ETHERNET_MAC0_MAR7H_A33 *((volatile unsigned int*)(0x42C80F04UL))
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|
#define bFM3_ETHERNET_MAC0_MAR7H_A34 *((volatile unsigned int*)(0x42C80F08UL))
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|
#define bFM3_ETHERNET_MAC0_MAR7H_A35 *((volatile unsigned int*)(0x42C80F0CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7H_A36 *((volatile unsigned int*)(0x42C80F10UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7H_A37 *((volatile unsigned int*)(0x42C80F14UL))
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|
#define bFM3_ETHERNET_MAC0_MAR7H_A38 *((volatile unsigned int*)(0x42C80F18UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7H_A39 *((volatile unsigned int*)(0x42C80F1CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7H_A40 *((volatile unsigned int*)(0x42C80F20UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7H_A41 *((volatile unsigned int*)(0x42C80F24UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7H_A42 *((volatile unsigned int*)(0x42C80F28UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7H_A43 *((volatile unsigned int*)(0x42C80F2CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7H_A44 *((volatile unsigned int*)(0x42C80F30UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7H_A45 *((volatile unsigned int*)(0x42C80F34UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7H_A46 *((volatile unsigned int*)(0x42C80F38UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7H_A47 *((volatile unsigned int*)(0x42C80F3CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7H_MBC0 *((volatile unsigned int*)(0x42C80F60UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7H_MBC1 *((volatile unsigned int*)(0x42C80F64UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7H_MBC2 *((volatile unsigned int*)(0x42C80F68UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7H_MBC3 *((volatile unsigned int*)(0x42C80F6CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7H_MBC4 *((volatile unsigned int*)(0x42C80F70UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7H_MBC5 *((volatile unsigned int*)(0x42C80F74UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7H_SA *((volatile unsigned int*)(0x42C80F78UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7H_AE *((volatile unsigned int*)(0x42C80F7CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7L_A0 *((volatile unsigned int*)(0x42C80F80UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7L_A1 *((volatile unsigned int*)(0x42C80F84UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7L_A2 *((volatile unsigned int*)(0x42C80F88UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7L_A3 *((volatile unsigned int*)(0x42C80F8CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7L_A4 *((volatile unsigned int*)(0x42C80F90UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7L_A5 *((volatile unsigned int*)(0x42C80F94UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7L_A6 *((volatile unsigned int*)(0x42C80F98UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7L_A7 *((volatile unsigned int*)(0x42C80F9CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR7L_A8 *((volatile unsigned int*)(0x42C80FA0UL))
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#define bFM3_ETHERNET_MAC0_MAR7L_A9 *((volatile unsigned int*)(0x42C80FA4UL))
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#define bFM3_ETHERNET_MAC0_MAR7L_A10 *((volatile unsigned int*)(0x42C80FA8UL))
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#define bFM3_ETHERNET_MAC0_MAR7L_A11 *((volatile unsigned int*)(0x42C80FACUL))
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#define bFM3_ETHERNET_MAC0_MAR7L_A12 *((volatile unsigned int*)(0x42C80FB0UL))
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#define bFM3_ETHERNET_MAC0_MAR7L_A13 *((volatile unsigned int*)(0x42C80FB4UL))
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#define bFM3_ETHERNET_MAC0_MAR7L_A14 *((volatile unsigned int*)(0x42C80FB8UL))
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#define bFM3_ETHERNET_MAC0_MAR7L_A15 *((volatile unsigned int*)(0x42C80FBCUL))
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#define bFM3_ETHERNET_MAC0_MAR7L_A16 *((volatile unsigned int*)(0x42C80FC0UL))
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#define bFM3_ETHERNET_MAC0_MAR7L_A17 *((volatile unsigned int*)(0x42C80FC4UL))
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#define bFM3_ETHERNET_MAC0_MAR7L_A18 *((volatile unsigned int*)(0x42C80FC8UL))
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#define bFM3_ETHERNET_MAC0_MAR7L_A19 *((volatile unsigned int*)(0x42C80FCCUL))
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#define bFM3_ETHERNET_MAC0_MAR7L_A20 *((volatile unsigned int*)(0x42C80FD0UL))
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#define bFM3_ETHERNET_MAC0_MAR7L_A21 *((volatile unsigned int*)(0x42C80FD4UL))
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#define bFM3_ETHERNET_MAC0_MAR7L_A22 *((volatile unsigned int*)(0x42C80FD8UL))
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#define bFM3_ETHERNET_MAC0_MAR7L_A23 *((volatile unsigned int*)(0x42C80FDCUL))
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#define bFM3_ETHERNET_MAC0_MAR7L_A24 *((volatile unsigned int*)(0x42C80FE0UL))
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#define bFM3_ETHERNET_MAC0_MAR7L_A25 *((volatile unsigned int*)(0x42C80FE4UL))
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#define bFM3_ETHERNET_MAC0_MAR7L_A26 *((volatile unsigned int*)(0x42C80FE8UL))
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#define bFM3_ETHERNET_MAC0_MAR7L_A27 *((volatile unsigned int*)(0x42C80FECUL))
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#define bFM3_ETHERNET_MAC0_MAR7L_A28 *((volatile unsigned int*)(0x42C80FF0UL))
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#define bFM3_ETHERNET_MAC0_MAR7L_A29 *((volatile unsigned int*)(0x42C80FF4UL))
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#define bFM3_ETHERNET_MAC0_MAR7L_A30 *((volatile unsigned int*)(0x42C80FF8UL))
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#define bFM3_ETHERNET_MAC0_MAR7L_A31 *((volatile unsigned int*)(0x42C80FFCUL))
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#define bFM3_ETHERNET_MAC0_MAR8H_A32 *((volatile unsigned int*)(0x42C81000UL))
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#define bFM3_ETHERNET_MAC0_MAR8H_A33 *((volatile unsigned int*)(0x42C81004UL))
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#define bFM3_ETHERNET_MAC0_MAR8H_A34 *((volatile unsigned int*)(0x42C81008UL))
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#define bFM3_ETHERNET_MAC0_MAR8H_A35 *((volatile unsigned int*)(0x42C8100CUL))
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#define bFM3_ETHERNET_MAC0_MAR8H_A36 *((volatile unsigned int*)(0x42C81010UL))
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#define bFM3_ETHERNET_MAC0_MAR8H_A37 *((volatile unsigned int*)(0x42C81014UL))
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#define bFM3_ETHERNET_MAC0_MAR8H_A38 *((volatile unsigned int*)(0x42C81018UL))
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#define bFM3_ETHERNET_MAC0_MAR8H_A39 *((volatile unsigned int*)(0x42C8101CUL))
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#define bFM3_ETHERNET_MAC0_MAR8H_A40 *((volatile unsigned int*)(0x42C81020UL))
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#define bFM3_ETHERNET_MAC0_MAR8H_A41 *((volatile unsigned int*)(0x42C81024UL))
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#define bFM3_ETHERNET_MAC0_MAR8H_A42 *((volatile unsigned int*)(0x42C81028UL))
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#define bFM3_ETHERNET_MAC0_MAR8H_A43 *((volatile unsigned int*)(0x42C8102CUL))
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#define bFM3_ETHERNET_MAC0_MAR8H_A44 *((volatile unsigned int*)(0x42C81030UL))
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#define bFM3_ETHERNET_MAC0_MAR8H_A45 *((volatile unsigned int*)(0x42C81034UL))
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#define bFM3_ETHERNET_MAC0_MAR8H_A46 *((volatile unsigned int*)(0x42C81038UL))
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#define bFM3_ETHERNET_MAC0_MAR8H_A47 *((volatile unsigned int*)(0x42C8103CUL))
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#define bFM3_ETHERNET_MAC0_MAR8H_MBC0 *((volatile unsigned int*)(0x42C81060UL))
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#define bFM3_ETHERNET_MAC0_MAR8H_MBC1 *((volatile unsigned int*)(0x42C81064UL))
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#define bFM3_ETHERNET_MAC0_MAR8H_MBC2 *((volatile unsigned int*)(0x42C81068UL))
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#define bFM3_ETHERNET_MAC0_MAR8H_MBC3 *((volatile unsigned int*)(0x42C8106CUL))
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#define bFM3_ETHERNET_MAC0_MAR8H_MBC4 *((volatile unsigned int*)(0x42C81070UL))
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#define bFM3_ETHERNET_MAC0_MAR8H_MBC5 *((volatile unsigned int*)(0x42C81074UL))
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#define bFM3_ETHERNET_MAC0_MAR8H_SA *((volatile unsigned int*)(0x42C81078UL))
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#define bFM3_ETHERNET_MAC0_MAR8H_AE *((volatile unsigned int*)(0x42C8107CUL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A0 *((volatile unsigned int*)(0x42C81080UL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A1 *((volatile unsigned int*)(0x42C81084UL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A2 *((volatile unsigned int*)(0x42C81088UL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A3 *((volatile unsigned int*)(0x42C8108CUL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A4 *((volatile unsigned int*)(0x42C81090UL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A5 *((volatile unsigned int*)(0x42C81094UL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A6 *((volatile unsigned int*)(0x42C81098UL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A7 *((volatile unsigned int*)(0x42C8109CUL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A8 *((volatile unsigned int*)(0x42C810A0UL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A9 *((volatile unsigned int*)(0x42C810A4UL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A10 *((volatile unsigned int*)(0x42C810A8UL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A11 *((volatile unsigned int*)(0x42C810ACUL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A12 *((volatile unsigned int*)(0x42C810B0UL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A13 *((volatile unsigned int*)(0x42C810B4UL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A14 *((volatile unsigned int*)(0x42C810B8UL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A15 *((volatile unsigned int*)(0x42C810BCUL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A16 *((volatile unsigned int*)(0x42C810C0UL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A17 *((volatile unsigned int*)(0x42C810C4UL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A18 *((volatile unsigned int*)(0x42C810C8UL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A19 *((volatile unsigned int*)(0x42C810CCUL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A20 *((volatile unsigned int*)(0x42C810D0UL))
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|
#define bFM3_ETHERNET_MAC0_MAR8L_A21 *((volatile unsigned int*)(0x42C810D4UL))
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|
#define bFM3_ETHERNET_MAC0_MAR8L_A22 *((volatile unsigned int*)(0x42C810D8UL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A23 *((volatile unsigned int*)(0x42C810DCUL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A24 *((volatile unsigned int*)(0x42C810E0UL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A25 *((volatile unsigned int*)(0x42C810E4UL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A26 *((volatile unsigned int*)(0x42C810E8UL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A27 *((volatile unsigned int*)(0x42C810ECUL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A28 *((volatile unsigned int*)(0x42C810F0UL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A29 *((volatile unsigned int*)(0x42C810F4UL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A30 *((volatile unsigned int*)(0x42C810F8UL))
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#define bFM3_ETHERNET_MAC0_MAR8L_A31 *((volatile unsigned int*)(0x42C810FCUL))
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#define bFM3_ETHERNET_MAC0_MAR9H_A32 *((volatile unsigned int*)(0x42C81100UL))
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#define bFM3_ETHERNET_MAC0_MAR9H_A33 *((volatile unsigned int*)(0x42C81104UL))
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#define bFM3_ETHERNET_MAC0_MAR9H_A34 *((volatile unsigned int*)(0x42C81108UL))
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#define bFM3_ETHERNET_MAC0_MAR9H_A35 *((volatile unsigned int*)(0x42C8110CUL))
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#define bFM3_ETHERNET_MAC0_MAR9H_A36 *((volatile unsigned int*)(0x42C81110UL))
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#define bFM3_ETHERNET_MAC0_MAR9H_A37 *((volatile unsigned int*)(0x42C81114UL))
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#define bFM3_ETHERNET_MAC0_MAR9H_A38 *((volatile unsigned int*)(0x42C81118UL))
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#define bFM3_ETHERNET_MAC0_MAR9H_A39 *((volatile unsigned int*)(0x42C8111CUL))
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#define bFM3_ETHERNET_MAC0_MAR9H_A40 *((volatile unsigned int*)(0x42C81120UL))
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#define bFM3_ETHERNET_MAC0_MAR9H_A41 *((volatile unsigned int*)(0x42C81124UL))
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#define bFM3_ETHERNET_MAC0_MAR9H_A42 *((volatile unsigned int*)(0x42C81128UL))
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#define bFM3_ETHERNET_MAC0_MAR9H_A43 *((volatile unsigned int*)(0x42C8112CUL))
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#define bFM3_ETHERNET_MAC0_MAR9H_A44 *((volatile unsigned int*)(0x42C81130UL))
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#define bFM3_ETHERNET_MAC0_MAR9H_A45 *((volatile unsigned int*)(0x42C81134UL))
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#define bFM3_ETHERNET_MAC0_MAR9H_A46 *((volatile unsigned int*)(0x42C81138UL))
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#define bFM3_ETHERNET_MAC0_MAR9H_A47 *((volatile unsigned int*)(0x42C8113CUL))
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#define bFM3_ETHERNET_MAC0_MAR9H_MBC0 *((volatile unsigned int*)(0x42C81160UL))
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#define bFM3_ETHERNET_MAC0_MAR9H_MBC1 *((volatile unsigned int*)(0x42C81164UL))
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#define bFM3_ETHERNET_MAC0_MAR9H_MBC2 *((volatile unsigned int*)(0x42C81168UL))
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#define bFM3_ETHERNET_MAC0_MAR9H_MBC3 *((volatile unsigned int*)(0x42C8116CUL))
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#define bFM3_ETHERNET_MAC0_MAR9H_MBC4 *((volatile unsigned int*)(0x42C81170UL))
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#define bFM3_ETHERNET_MAC0_MAR9H_MBC5 *((volatile unsigned int*)(0x42C81174UL))
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#define bFM3_ETHERNET_MAC0_MAR9H_SA *((volatile unsigned int*)(0x42C81178UL))
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#define bFM3_ETHERNET_MAC0_MAR9H_AE *((volatile unsigned int*)(0x42C8117CUL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A0 *((volatile unsigned int*)(0x42C81180UL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A1 *((volatile unsigned int*)(0x42C81184UL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A2 *((volatile unsigned int*)(0x42C81188UL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A3 *((volatile unsigned int*)(0x42C8118CUL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A4 *((volatile unsigned int*)(0x42C81190UL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A5 *((volatile unsigned int*)(0x42C81194UL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A6 *((volatile unsigned int*)(0x42C81198UL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A7 *((volatile unsigned int*)(0x42C8119CUL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A8 *((volatile unsigned int*)(0x42C811A0UL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A9 *((volatile unsigned int*)(0x42C811A4UL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A10 *((volatile unsigned int*)(0x42C811A8UL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A11 *((volatile unsigned int*)(0x42C811ACUL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A12 *((volatile unsigned int*)(0x42C811B0UL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A13 *((volatile unsigned int*)(0x42C811B4UL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A14 *((volatile unsigned int*)(0x42C811B8UL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A15 *((volatile unsigned int*)(0x42C811BCUL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A16 *((volatile unsigned int*)(0x42C811C0UL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A17 *((volatile unsigned int*)(0x42C811C4UL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A18 *((volatile unsigned int*)(0x42C811C8UL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A19 *((volatile unsigned int*)(0x42C811CCUL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A20 *((volatile unsigned int*)(0x42C811D0UL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A21 *((volatile unsigned int*)(0x42C811D4UL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A22 *((volatile unsigned int*)(0x42C811D8UL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A23 *((volatile unsigned int*)(0x42C811DCUL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A24 *((volatile unsigned int*)(0x42C811E0UL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A25 *((volatile unsigned int*)(0x42C811E4UL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A26 *((volatile unsigned int*)(0x42C811E8UL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A27 *((volatile unsigned int*)(0x42C811ECUL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A28 *((volatile unsigned int*)(0x42C811F0UL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A29 *((volatile unsigned int*)(0x42C811F4UL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A30 *((volatile unsigned int*)(0x42C811F8UL))
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#define bFM3_ETHERNET_MAC0_MAR9L_A31 *((volatile unsigned int*)(0x42C811FCUL))
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#define bFM3_ETHERNET_MAC0_MAR10H_A32 *((volatile unsigned int*)(0x42C81200UL))
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#define bFM3_ETHERNET_MAC0_MAR10H_A33 *((volatile unsigned int*)(0x42C81204UL))
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#define bFM3_ETHERNET_MAC0_MAR10H_A34 *((volatile unsigned int*)(0x42C81208UL))
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#define bFM3_ETHERNET_MAC0_MAR10H_A35 *((volatile unsigned int*)(0x42C8120CUL))
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#define bFM3_ETHERNET_MAC0_MAR10H_A36 *((volatile unsigned int*)(0x42C81210UL))
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#define bFM3_ETHERNET_MAC0_MAR10H_A37 *((volatile unsigned int*)(0x42C81214UL))
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#define bFM3_ETHERNET_MAC0_MAR10H_A38 *((volatile unsigned int*)(0x42C81218UL))
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#define bFM3_ETHERNET_MAC0_MAR10H_A39 *((volatile unsigned int*)(0x42C8121CUL))
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#define bFM3_ETHERNET_MAC0_MAR10H_A40 *((volatile unsigned int*)(0x42C81220UL))
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#define bFM3_ETHERNET_MAC0_MAR10H_A41 *((volatile unsigned int*)(0x42C81224UL))
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#define bFM3_ETHERNET_MAC0_MAR10H_A42 *((volatile unsigned int*)(0x42C81228UL))
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#define bFM3_ETHERNET_MAC0_MAR10H_A43 *((volatile unsigned int*)(0x42C8122CUL))
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#define bFM3_ETHERNET_MAC0_MAR10H_A44 *((volatile unsigned int*)(0x42C81230UL))
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#define bFM3_ETHERNET_MAC0_MAR10H_A45 *((volatile unsigned int*)(0x42C81234UL))
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#define bFM3_ETHERNET_MAC0_MAR10H_A46 *((volatile unsigned int*)(0x42C81238UL))
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#define bFM3_ETHERNET_MAC0_MAR10H_A47 *((volatile unsigned int*)(0x42C8123CUL))
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#define bFM3_ETHERNET_MAC0_MAR10H_MBC0 *((volatile unsigned int*)(0x42C81260UL))
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#define bFM3_ETHERNET_MAC0_MAR10H_MBC1 *((volatile unsigned int*)(0x42C81264UL))
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#define bFM3_ETHERNET_MAC0_MAR10H_MBC2 *((volatile unsigned int*)(0x42C81268UL))
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|
#define bFM3_ETHERNET_MAC0_MAR10H_MBC3 *((volatile unsigned int*)(0x42C8126CUL))
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|
#define bFM3_ETHERNET_MAC0_MAR10H_MBC4 *((volatile unsigned int*)(0x42C81270UL))
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|
#define bFM3_ETHERNET_MAC0_MAR10H_MBC5 *((volatile unsigned int*)(0x42C81274UL))
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|
#define bFM3_ETHERNET_MAC0_MAR10H_SA *((volatile unsigned int*)(0x42C81278UL))
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#define bFM3_ETHERNET_MAC0_MAR10H_AE *((volatile unsigned int*)(0x42C8127CUL))
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|
#define bFM3_ETHERNET_MAC0_MAR10L_A0 *((volatile unsigned int*)(0x42C81280UL))
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#define bFM3_ETHERNET_MAC0_MAR10L_A1 *((volatile unsigned int*)(0x42C81284UL))
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|
#define bFM3_ETHERNET_MAC0_MAR10L_A2 *((volatile unsigned int*)(0x42C81288UL))
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|
#define bFM3_ETHERNET_MAC0_MAR10L_A3 *((volatile unsigned int*)(0x42C8128CUL))
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|
#define bFM3_ETHERNET_MAC0_MAR10L_A4 *((volatile unsigned int*)(0x42C81290UL))
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|
#define bFM3_ETHERNET_MAC0_MAR10L_A5 *((volatile unsigned int*)(0x42C81294UL))
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|
#define bFM3_ETHERNET_MAC0_MAR10L_A6 *((volatile unsigned int*)(0x42C81298UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR10L_A7 *((volatile unsigned int*)(0x42C8129CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR10L_A8 *((volatile unsigned int*)(0x42C812A0UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR10L_A9 *((volatile unsigned int*)(0x42C812A4UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR10L_A10 *((volatile unsigned int*)(0x42C812A8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR10L_A11 *((volatile unsigned int*)(0x42C812ACUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR10L_A12 *((volatile unsigned int*)(0x42C812B0UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR10L_A13 *((volatile unsigned int*)(0x42C812B4UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR10L_A14 *((volatile unsigned int*)(0x42C812B8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR10L_A15 *((volatile unsigned int*)(0x42C812BCUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR10L_A16 *((volatile unsigned int*)(0x42C812C0UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR10L_A17 *((volatile unsigned int*)(0x42C812C4UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR10L_A18 *((volatile unsigned int*)(0x42C812C8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR10L_A19 *((volatile unsigned int*)(0x42C812CCUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR10L_A20 *((volatile unsigned int*)(0x42C812D0UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR10L_A21 *((volatile unsigned int*)(0x42C812D4UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR10L_A22 *((volatile unsigned int*)(0x42C812D8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR10L_A23 *((volatile unsigned int*)(0x42C812DCUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR10L_A24 *((volatile unsigned int*)(0x42C812E0UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR10L_A25 *((volatile unsigned int*)(0x42C812E4UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR10L_A26 *((volatile unsigned int*)(0x42C812E8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR10L_A27 *((volatile unsigned int*)(0x42C812ECUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR10L_A28 *((volatile unsigned int*)(0x42C812F0UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR10L_A29 *((volatile unsigned int*)(0x42C812F4UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR10L_A30 *((volatile unsigned int*)(0x42C812F8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR10L_A31 *((volatile unsigned int*)(0x42C812FCUL))
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#define bFM3_ETHERNET_MAC0_MAR11H_A32 *((volatile unsigned int*)(0x42C81300UL))
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#define bFM3_ETHERNET_MAC0_MAR11H_A33 *((volatile unsigned int*)(0x42C81304UL))
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#define bFM3_ETHERNET_MAC0_MAR11H_A34 *((volatile unsigned int*)(0x42C81308UL))
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#define bFM3_ETHERNET_MAC0_MAR11H_A35 *((volatile unsigned int*)(0x42C8130CUL))
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#define bFM3_ETHERNET_MAC0_MAR11H_A36 *((volatile unsigned int*)(0x42C81310UL))
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#define bFM3_ETHERNET_MAC0_MAR11H_A37 *((volatile unsigned int*)(0x42C81314UL))
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#define bFM3_ETHERNET_MAC0_MAR11H_A38 *((volatile unsigned int*)(0x42C81318UL))
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#define bFM3_ETHERNET_MAC0_MAR11H_A39 *((volatile unsigned int*)(0x42C8131CUL))
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#define bFM3_ETHERNET_MAC0_MAR11H_A40 *((volatile unsigned int*)(0x42C81320UL))
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#define bFM3_ETHERNET_MAC0_MAR11H_A41 *((volatile unsigned int*)(0x42C81324UL))
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#define bFM3_ETHERNET_MAC0_MAR11H_A42 *((volatile unsigned int*)(0x42C81328UL))
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#define bFM3_ETHERNET_MAC0_MAR11H_A43 *((volatile unsigned int*)(0x42C8132CUL))
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#define bFM3_ETHERNET_MAC0_MAR11H_A44 *((volatile unsigned int*)(0x42C81330UL))
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#define bFM3_ETHERNET_MAC0_MAR11H_A45 *((volatile unsigned int*)(0x42C81334UL))
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#define bFM3_ETHERNET_MAC0_MAR11H_A46 *((volatile unsigned int*)(0x42C81338UL))
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#define bFM3_ETHERNET_MAC0_MAR11H_A47 *((volatile unsigned int*)(0x42C8133CUL))
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#define bFM3_ETHERNET_MAC0_MAR11H_MBC0 *((volatile unsigned int*)(0x42C81360UL))
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#define bFM3_ETHERNET_MAC0_MAR11H_MBC1 *((volatile unsigned int*)(0x42C81364UL))
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#define bFM3_ETHERNET_MAC0_MAR11H_MBC2 *((volatile unsigned int*)(0x42C81368UL))
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#define bFM3_ETHERNET_MAC0_MAR11H_MBC3 *((volatile unsigned int*)(0x42C8136CUL))
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#define bFM3_ETHERNET_MAC0_MAR11H_MBC4 *((volatile unsigned int*)(0x42C81370UL))
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#define bFM3_ETHERNET_MAC0_MAR11H_MBC5 *((volatile unsigned int*)(0x42C81374UL))
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#define bFM3_ETHERNET_MAC0_MAR11H_SA *((volatile unsigned int*)(0x42C81378UL))
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#define bFM3_ETHERNET_MAC0_MAR11H_AE *((volatile unsigned int*)(0x42C8137CUL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A0 *((volatile unsigned int*)(0x42C81380UL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A1 *((volatile unsigned int*)(0x42C81384UL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A2 *((volatile unsigned int*)(0x42C81388UL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A3 *((volatile unsigned int*)(0x42C8138CUL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A4 *((volatile unsigned int*)(0x42C81390UL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A5 *((volatile unsigned int*)(0x42C81394UL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A6 *((volatile unsigned int*)(0x42C81398UL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A7 *((volatile unsigned int*)(0x42C8139CUL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A8 *((volatile unsigned int*)(0x42C813A0UL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A9 *((volatile unsigned int*)(0x42C813A4UL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A10 *((volatile unsigned int*)(0x42C813A8UL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A11 *((volatile unsigned int*)(0x42C813ACUL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A12 *((volatile unsigned int*)(0x42C813B0UL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A13 *((volatile unsigned int*)(0x42C813B4UL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A14 *((volatile unsigned int*)(0x42C813B8UL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A15 *((volatile unsigned int*)(0x42C813BCUL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A16 *((volatile unsigned int*)(0x42C813C0UL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A17 *((volatile unsigned int*)(0x42C813C4UL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A18 *((volatile unsigned int*)(0x42C813C8UL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A19 *((volatile unsigned int*)(0x42C813CCUL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A20 *((volatile unsigned int*)(0x42C813D0UL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A21 *((volatile unsigned int*)(0x42C813D4UL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A22 *((volatile unsigned int*)(0x42C813D8UL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A23 *((volatile unsigned int*)(0x42C813DCUL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A24 *((volatile unsigned int*)(0x42C813E0UL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A25 *((volatile unsigned int*)(0x42C813E4UL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A26 *((volatile unsigned int*)(0x42C813E8UL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A27 *((volatile unsigned int*)(0x42C813ECUL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A28 *((volatile unsigned int*)(0x42C813F0UL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A29 *((volatile unsigned int*)(0x42C813F4UL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A30 *((volatile unsigned int*)(0x42C813F8UL))
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#define bFM3_ETHERNET_MAC0_MAR11L_A31 *((volatile unsigned int*)(0x42C813FCUL))
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#define bFM3_ETHERNET_MAC0_MAR12H_A32 *((volatile unsigned int*)(0x42C81400UL))
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#define bFM3_ETHERNET_MAC0_MAR12H_A33 *((volatile unsigned int*)(0x42C81404UL))
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#define bFM3_ETHERNET_MAC0_MAR12H_A34 *((volatile unsigned int*)(0x42C81408UL))
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#define bFM3_ETHERNET_MAC0_MAR12H_A35 *((volatile unsigned int*)(0x42C8140CUL))
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#define bFM3_ETHERNET_MAC0_MAR12H_A36 *((volatile unsigned int*)(0x42C81410UL))
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#define bFM3_ETHERNET_MAC0_MAR12H_A37 *((volatile unsigned int*)(0x42C81414UL))
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|
#define bFM3_ETHERNET_MAC0_MAR12H_A38 *((volatile unsigned int*)(0x42C81418UL))
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#define bFM3_ETHERNET_MAC0_MAR12H_A39 *((volatile unsigned int*)(0x42C8141CUL))
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|
#define bFM3_ETHERNET_MAC0_MAR12H_A40 *((volatile unsigned int*)(0x42C81420UL))
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|
#define bFM3_ETHERNET_MAC0_MAR12H_A41 *((volatile unsigned int*)(0x42C81424UL))
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|
#define bFM3_ETHERNET_MAC0_MAR12H_A42 *((volatile unsigned int*)(0x42C81428UL))
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|
#define bFM3_ETHERNET_MAC0_MAR12H_A43 *((volatile unsigned int*)(0x42C8142CUL))
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|
#define bFM3_ETHERNET_MAC0_MAR12H_A44 *((volatile unsigned int*)(0x42C81430UL))
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|
#define bFM3_ETHERNET_MAC0_MAR12H_A45 *((volatile unsigned int*)(0x42C81434UL))
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#define bFM3_ETHERNET_MAC0_MAR12H_A46 *((volatile unsigned int*)(0x42C81438UL))
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|
#define bFM3_ETHERNET_MAC0_MAR12H_A47 *((volatile unsigned int*)(0x42C8143CUL))
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|
#define bFM3_ETHERNET_MAC0_MAR12H_MBC0 *((volatile unsigned int*)(0x42C81460UL))
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|
#define bFM3_ETHERNET_MAC0_MAR12H_MBC1 *((volatile unsigned int*)(0x42C81464UL))
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|
#define bFM3_ETHERNET_MAC0_MAR12H_MBC2 *((volatile unsigned int*)(0x42C81468UL))
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|
#define bFM3_ETHERNET_MAC0_MAR12H_MBC3 *((volatile unsigned int*)(0x42C8146CUL))
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|
#define bFM3_ETHERNET_MAC0_MAR12H_MBC4 *((volatile unsigned int*)(0x42C81470UL))
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|
#define bFM3_ETHERNET_MAC0_MAR12H_MBC5 *((volatile unsigned int*)(0x42C81474UL))
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|
#define bFM3_ETHERNET_MAC0_MAR12H_SA *((volatile unsigned int*)(0x42C81478UL))
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|
#define bFM3_ETHERNET_MAC0_MAR12H_AE *((volatile unsigned int*)(0x42C8147CUL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A0 *((volatile unsigned int*)(0x42C81480UL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A1 *((volatile unsigned int*)(0x42C81484UL))
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|
#define bFM3_ETHERNET_MAC0_MAR12L_A2 *((volatile unsigned int*)(0x42C81488UL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A3 *((volatile unsigned int*)(0x42C8148CUL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A4 *((volatile unsigned int*)(0x42C81490UL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A5 *((volatile unsigned int*)(0x42C81494UL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A6 *((volatile unsigned int*)(0x42C81498UL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A7 *((volatile unsigned int*)(0x42C8149CUL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A8 *((volatile unsigned int*)(0x42C814A0UL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A9 *((volatile unsigned int*)(0x42C814A4UL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A10 *((volatile unsigned int*)(0x42C814A8UL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A11 *((volatile unsigned int*)(0x42C814ACUL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A12 *((volatile unsigned int*)(0x42C814B0UL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A13 *((volatile unsigned int*)(0x42C814B4UL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A14 *((volatile unsigned int*)(0x42C814B8UL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A15 *((volatile unsigned int*)(0x42C814BCUL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A16 *((volatile unsigned int*)(0x42C814C0UL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A17 *((volatile unsigned int*)(0x42C814C4UL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A18 *((volatile unsigned int*)(0x42C814C8UL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A19 *((volatile unsigned int*)(0x42C814CCUL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A20 *((volatile unsigned int*)(0x42C814D0UL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A21 *((volatile unsigned int*)(0x42C814D4UL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A22 *((volatile unsigned int*)(0x42C814D8UL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A23 *((volatile unsigned int*)(0x42C814DCUL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A24 *((volatile unsigned int*)(0x42C814E0UL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A25 *((volatile unsigned int*)(0x42C814E4UL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A26 *((volatile unsigned int*)(0x42C814E8UL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A27 *((volatile unsigned int*)(0x42C814ECUL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A28 *((volatile unsigned int*)(0x42C814F0UL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A29 *((volatile unsigned int*)(0x42C814F4UL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A30 *((volatile unsigned int*)(0x42C814F8UL))
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#define bFM3_ETHERNET_MAC0_MAR12L_A31 *((volatile unsigned int*)(0x42C814FCUL))
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#define bFM3_ETHERNET_MAC0_MAR13H_A32 *((volatile unsigned int*)(0x42C81500UL))
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#define bFM3_ETHERNET_MAC0_MAR13H_A33 *((volatile unsigned int*)(0x42C81504UL))
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#define bFM3_ETHERNET_MAC0_MAR13H_A34 *((volatile unsigned int*)(0x42C81508UL))
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#define bFM3_ETHERNET_MAC0_MAR13H_A35 *((volatile unsigned int*)(0x42C8150CUL))
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#define bFM3_ETHERNET_MAC0_MAR13H_A36 *((volatile unsigned int*)(0x42C81510UL))
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#define bFM3_ETHERNET_MAC0_MAR13H_A37 *((volatile unsigned int*)(0x42C81514UL))
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#define bFM3_ETHERNET_MAC0_MAR13H_A38 *((volatile unsigned int*)(0x42C81518UL))
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#define bFM3_ETHERNET_MAC0_MAR13H_A39 *((volatile unsigned int*)(0x42C8151CUL))
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#define bFM3_ETHERNET_MAC0_MAR13H_A40 *((volatile unsigned int*)(0x42C81520UL))
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#define bFM3_ETHERNET_MAC0_MAR13H_A41 *((volatile unsigned int*)(0x42C81524UL))
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#define bFM3_ETHERNET_MAC0_MAR13H_A42 *((volatile unsigned int*)(0x42C81528UL))
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#define bFM3_ETHERNET_MAC0_MAR13H_A43 *((volatile unsigned int*)(0x42C8152CUL))
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#define bFM3_ETHERNET_MAC0_MAR13H_A44 *((volatile unsigned int*)(0x42C81530UL))
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#define bFM3_ETHERNET_MAC0_MAR13H_A45 *((volatile unsigned int*)(0x42C81534UL))
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#define bFM3_ETHERNET_MAC0_MAR13H_A46 *((volatile unsigned int*)(0x42C81538UL))
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#define bFM3_ETHERNET_MAC0_MAR13H_A47 *((volatile unsigned int*)(0x42C8153CUL))
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#define bFM3_ETHERNET_MAC0_MAR13H_MBC0 *((volatile unsigned int*)(0x42C81560UL))
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#define bFM3_ETHERNET_MAC0_MAR13H_MBC1 *((volatile unsigned int*)(0x42C81564UL))
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#define bFM3_ETHERNET_MAC0_MAR13H_MBC2 *((volatile unsigned int*)(0x42C81568UL))
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#define bFM3_ETHERNET_MAC0_MAR13H_MBC3 *((volatile unsigned int*)(0x42C8156CUL))
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#define bFM3_ETHERNET_MAC0_MAR13H_MBC4 *((volatile unsigned int*)(0x42C81570UL))
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#define bFM3_ETHERNET_MAC0_MAR13H_MBC5 *((volatile unsigned int*)(0x42C81574UL))
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#define bFM3_ETHERNET_MAC0_MAR13H_SA *((volatile unsigned int*)(0x42C81578UL))
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#define bFM3_ETHERNET_MAC0_MAR13H_AE *((volatile unsigned int*)(0x42C8157CUL))
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#define bFM3_ETHERNET_MAC0_MAR13L_A0 *((volatile unsigned int*)(0x42C81580UL))
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#define bFM3_ETHERNET_MAC0_MAR13L_A1 *((volatile unsigned int*)(0x42C81584UL))
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#define bFM3_ETHERNET_MAC0_MAR13L_A2 *((volatile unsigned int*)(0x42C81588UL))
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#define bFM3_ETHERNET_MAC0_MAR13L_A3 *((volatile unsigned int*)(0x42C8158CUL))
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#define bFM3_ETHERNET_MAC0_MAR13L_A4 *((volatile unsigned int*)(0x42C81590UL))
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#define bFM3_ETHERNET_MAC0_MAR13L_A5 *((volatile unsigned int*)(0x42C81594UL))
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#define bFM3_ETHERNET_MAC0_MAR13L_A6 *((volatile unsigned int*)(0x42C81598UL))
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|
#define bFM3_ETHERNET_MAC0_MAR13L_A7 *((volatile unsigned int*)(0x42C8159CUL))
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#define bFM3_ETHERNET_MAC0_MAR13L_A8 *((volatile unsigned int*)(0x42C815A0UL))
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#define bFM3_ETHERNET_MAC0_MAR13L_A9 *((volatile unsigned int*)(0x42C815A4UL))
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#define bFM3_ETHERNET_MAC0_MAR13L_A10 *((volatile unsigned int*)(0x42C815A8UL))
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#define bFM3_ETHERNET_MAC0_MAR13L_A11 *((volatile unsigned int*)(0x42C815ACUL))
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|
#define bFM3_ETHERNET_MAC0_MAR13L_A12 *((volatile unsigned int*)(0x42C815B0UL))
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|
#define bFM3_ETHERNET_MAC0_MAR13L_A13 *((volatile unsigned int*)(0x42C815B4UL))
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#define bFM3_ETHERNET_MAC0_MAR13L_A14 *((volatile unsigned int*)(0x42C815B8UL))
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|
#define bFM3_ETHERNET_MAC0_MAR13L_A15 *((volatile unsigned int*)(0x42C815BCUL))
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#define bFM3_ETHERNET_MAC0_MAR13L_A16 *((volatile unsigned int*)(0x42C815C0UL))
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|
#define bFM3_ETHERNET_MAC0_MAR13L_A17 *((volatile unsigned int*)(0x42C815C4UL))
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|
#define bFM3_ETHERNET_MAC0_MAR13L_A18 *((volatile unsigned int*)(0x42C815C8UL))
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|
#define bFM3_ETHERNET_MAC0_MAR13L_A19 *((volatile unsigned int*)(0x42C815CCUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR13L_A20 *((volatile unsigned int*)(0x42C815D0UL))
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|
#define bFM3_ETHERNET_MAC0_MAR13L_A21 *((volatile unsigned int*)(0x42C815D4UL))
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|
#define bFM3_ETHERNET_MAC0_MAR13L_A22 *((volatile unsigned int*)(0x42C815D8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR13L_A23 *((volatile unsigned int*)(0x42C815DCUL))
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|
#define bFM3_ETHERNET_MAC0_MAR13L_A24 *((volatile unsigned int*)(0x42C815E0UL))
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|
#define bFM3_ETHERNET_MAC0_MAR13L_A25 *((volatile unsigned int*)(0x42C815E4UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR13L_A26 *((volatile unsigned int*)(0x42C815E8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR13L_A27 *((volatile unsigned int*)(0x42C815ECUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR13L_A28 *((volatile unsigned int*)(0x42C815F0UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR13L_A29 *((volatile unsigned int*)(0x42C815F4UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR13L_A30 *((volatile unsigned int*)(0x42C815F8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR13L_A31 *((volatile unsigned int*)(0x42C815FCUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR14H_A32 *((volatile unsigned int*)(0x42C81600UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR14H_A33 *((volatile unsigned int*)(0x42C81604UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR14H_A34 *((volatile unsigned int*)(0x42C81608UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR14H_A35 *((volatile unsigned int*)(0x42C8160CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR14H_A36 *((volatile unsigned int*)(0x42C81610UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR14H_A37 *((volatile unsigned int*)(0x42C81614UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR14H_A38 *((volatile unsigned int*)(0x42C81618UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR14H_A39 *((volatile unsigned int*)(0x42C8161CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR14H_A40 *((volatile unsigned int*)(0x42C81620UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR14H_A41 *((volatile unsigned int*)(0x42C81624UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR14H_A42 *((volatile unsigned int*)(0x42C81628UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR14H_A43 *((volatile unsigned int*)(0x42C8162CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR14H_A44 *((volatile unsigned int*)(0x42C81630UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR14H_A45 *((volatile unsigned int*)(0x42C81634UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR14H_A46 *((volatile unsigned int*)(0x42C81638UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR14H_A47 *((volatile unsigned int*)(0x42C8163CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR14H_MBC0 *((volatile unsigned int*)(0x42C81660UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR14H_MBC1 *((volatile unsigned int*)(0x42C81664UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR14H_MBC2 *((volatile unsigned int*)(0x42C81668UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR14H_MBC3 *((volatile unsigned int*)(0x42C8166CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR14H_MBC4 *((volatile unsigned int*)(0x42C81670UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR14H_MBC5 *((volatile unsigned int*)(0x42C81674UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR14H_SA *((volatile unsigned int*)(0x42C81678UL))
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#define bFM3_ETHERNET_MAC0_MAR14H_AE *((volatile unsigned int*)(0x42C8167CUL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A0 *((volatile unsigned int*)(0x42C81680UL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A1 *((volatile unsigned int*)(0x42C81684UL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A2 *((volatile unsigned int*)(0x42C81688UL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A3 *((volatile unsigned int*)(0x42C8168CUL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A4 *((volatile unsigned int*)(0x42C81690UL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A5 *((volatile unsigned int*)(0x42C81694UL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A6 *((volatile unsigned int*)(0x42C81698UL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A7 *((volatile unsigned int*)(0x42C8169CUL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A8 *((volatile unsigned int*)(0x42C816A0UL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A9 *((volatile unsigned int*)(0x42C816A4UL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A10 *((volatile unsigned int*)(0x42C816A8UL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A11 *((volatile unsigned int*)(0x42C816ACUL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A12 *((volatile unsigned int*)(0x42C816B0UL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A13 *((volatile unsigned int*)(0x42C816B4UL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A14 *((volatile unsigned int*)(0x42C816B8UL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A15 *((volatile unsigned int*)(0x42C816BCUL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A16 *((volatile unsigned int*)(0x42C816C0UL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A17 *((volatile unsigned int*)(0x42C816C4UL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A18 *((volatile unsigned int*)(0x42C816C8UL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A19 *((volatile unsigned int*)(0x42C816CCUL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A20 *((volatile unsigned int*)(0x42C816D0UL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A21 *((volatile unsigned int*)(0x42C816D4UL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A22 *((volatile unsigned int*)(0x42C816D8UL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A23 *((volatile unsigned int*)(0x42C816DCUL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A24 *((volatile unsigned int*)(0x42C816E0UL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A25 *((volatile unsigned int*)(0x42C816E4UL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A26 *((volatile unsigned int*)(0x42C816E8UL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A27 *((volatile unsigned int*)(0x42C816ECUL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A28 *((volatile unsigned int*)(0x42C816F0UL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A29 *((volatile unsigned int*)(0x42C816F4UL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A30 *((volatile unsigned int*)(0x42C816F8UL))
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#define bFM3_ETHERNET_MAC0_MAR14L_A31 *((volatile unsigned int*)(0x42C816FCUL))
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#define bFM3_ETHERNET_MAC0_MAR15H_A32 *((volatile unsigned int*)(0x42C81700UL))
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#define bFM3_ETHERNET_MAC0_MAR15H_A33 *((volatile unsigned int*)(0x42C81704UL))
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#define bFM3_ETHERNET_MAC0_MAR15H_A34 *((volatile unsigned int*)(0x42C81708UL))
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#define bFM3_ETHERNET_MAC0_MAR15H_A35 *((volatile unsigned int*)(0x42C8170CUL))
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#define bFM3_ETHERNET_MAC0_MAR15H_A36 *((volatile unsigned int*)(0x42C81710UL))
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#define bFM3_ETHERNET_MAC0_MAR15H_A37 *((volatile unsigned int*)(0x42C81714UL))
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#define bFM3_ETHERNET_MAC0_MAR15H_A38 *((volatile unsigned int*)(0x42C81718UL))
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#define bFM3_ETHERNET_MAC0_MAR15H_A39 *((volatile unsigned int*)(0x42C8171CUL))
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#define bFM3_ETHERNET_MAC0_MAR15H_A40 *((volatile unsigned int*)(0x42C81720UL))
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#define bFM3_ETHERNET_MAC0_MAR15H_A41 *((volatile unsigned int*)(0x42C81724UL))
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#define bFM3_ETHERNET_MAC0_MAR15H_A42 *((volatile unsigned int*)(0x42C81728UL))
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#define bFM3_ETHERNET_MAC0_MAR15H_A43 *((volatile unsigned int*)(0x42C8172CUL))
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#define bFM3_ETHERNET_MAC0_MAR15H_A44 *((volatile unsigned int*)(0x42C81730UL))
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#define bFM3_ETHERNET_MAC0_MAR15H_A45 *((volatile unsigned int*)(0x42C81734UL))
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#define bFM3_ETHERNET_MAC0_MAR15H_A46 *((volatile unsigned int*)(0x42C81738UL))
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#define bFM3_ETHERNET_MAC0_MAR15H_A47 *((volatile unsigned int*)(0x42C8173CUL))
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#define bFM3_ETHERNET_MAC0_MAR15H_MBC0 *((volatile unsigned int*)(0x42C81760UL))
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#define bFM3_ETHERNET_MAC0_MAR15H_MBC1 *((volatile unsigned int*)(0x42C81764UL))
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#define bFM3_ETHERNET_MAC0_MAR15H_MBC2 *((volatile unsigned int*)(0x42C81768UL))
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#define bFM3_ETHERNET_MAC0_MAR15H_MBC3 *((volatile unsigned int*)(0x42C8176CUL))
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#define bFM3_ETHERNET_MAC0_MAR15H_MBC4 *((volatile unsigned int*)(0x42C81770UL))
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#define bFM3_ETHERNET_MAC0_MAR15H_MBC5 *((volatile unsigned int*)(0x42C81774UL))
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#define bFM3_ETHERNET_MAC0_MAR15H_SA *((volatile unsigned int*)(0x42C81778UL))
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#define bFM3_ETHERNET_MAC0_MAR15H_AE *((volatile unsigned int*)(0x42C8177CUL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A0 *((volatile unsigned int*)(0x42C81780UL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A1 *((volatile unsigned int*)(0x42C81784UL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A2 *((volatile unsigned int*)(0x42C81788UL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A3 *((volatile unsigned int*)(0x42C8178CUL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A4 *((volatile unsigned int*)(0x42C81790UL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A5 *((volatile unsigned int*)(0x42C81794UL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A6 *((volatile unsigned int*)(0x42C81798UL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A7 *((volatile unsigned int*)(0x42C8179CUL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A8 *((volatile unsigned int*)(0x42C817A0UL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A9 *((volatile unsigned int*)(0x42C817A4UL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A10 *((volatile unsigned int*)(0x42C817A8UL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A11 *((volatile unsigned int*)(0x42C817ACUL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A12 *((volatile unsigned int*)(0x42C817B0UL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A13 *((volatile unsigned int*)(0x42C817B4UL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A14 *((volatile unsigned int*)(0x42C817B8UL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A15 *((volatile unsigned int*)(0x42C817BCUL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A16 *((volatile unsigned int*)(0x42C817C0UL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A17 *((volatile unsigned int*)(0x42C817C4UL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A18 *((volatile unsigned int*)(0x42C817C8UL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A19 *((volatile unsigned int*)(0x42C817CCUL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A20 *((volatile unsigned int*)(0x42C817D0UL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A21 *((volatile unsigned int*)(0x42C817D4UL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A22 *((volatile unsigned int*)(0x42C817D8UL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A23 *((volatile unsigned int*)(0x42C817DCUL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A24 *((volatile unsigned int*)(0x42C817E0UL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A25 *((volatile unsigned int*)(0x42C817E4UL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A26 *((volatile unsigned int*)(0x42C817E8UL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A27 *((volatile unsigned int*)(0x42C817ECUL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A28 *((volatile unsigned int*)(0x42C817F0UL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A29 *((volatile unsigned int*)(0x42C817F4UL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A30 *((volatile unsigned int*)(0x42C817F8UL))
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#define bFM3_ETHERNET_MAC0_MAR15L_A31 *((volatile unsigned int*)(0x42C817FCUL))
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#define bFM3_ETHERNET_MAC0_RGSR_LM *((volatile unsigned int*)(0x42C81B00UL))
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#define bFM3_ETHERNET_MAC0_RGSR_LSP0 *((volatile unsigned int*)(0x42C81B04UL))
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#define bFM3_ETHERNET_MAC0_RGSR_LSP1 *((volatile unsigned int*)(0x42C81B08UL))
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#define bFM3_ETHERNET_MAC0_RGSR_LS *((volatile unsigned int*)(0x42C81B0CUL))
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#define bFM3_ETHERNET_MAC0_TSCR_TSE *((volatile unsigned int*)(0x42C8E000UL))
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#define bFM3_ETHERNET_MAC0_TSCR_TFCU *((volatile unsigned int*)(0x42C8E004UL))
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#define bFM3_ETHERNET_MAC0_TSCR_TSI *((volatile unsigned int*)(0x42C8E008UL))
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#define bFM3_ETHERNET_MAC0_TSCR_TSU *((volatile unsigned int*)(0x42C8E00CUL))
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#define bFM3_ETHERNET_MAC0_TSCR_TITE *((volatile unsigned int*)(0x42C8E010UL))
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#define bFM3_ETHERNET_MAC0_TSCR_TARU *((volatile unsigned int*)(0x42C8E014UL))
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#define bFM3_ETHERNET_MAC0_TSCR_TSEA *((volatile unsigned int*)(0x42C8E020UL))
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#define bFM3_ETHERNET_MAC0_TSCR_TSDB *((volatile unsigned int*)(0x42C8E024UL))
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#define bFM3_ETHERNET_MAC0_TSCR_TSV2E *((volatile unsigned int*)(0x42C8E028UL))
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#define bFM3_ETHERNET_MAC0_TSCR_TETSP *((volatile unsigned int*)(0x42C8E02CUL))
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#define bFM3_ETHERNET_MAC0_TSCR_TSIP6E *((volatile unsigned int*)(0x42C8E030UL))
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#define bFM3_ETHERNET_MAC0_TSCR_TSIP4E *((volatile unsigned int*)(0x42C8E034UL))
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#define bFM3_ETHERNET_MAC0_TSCR_TETSEM *((volatile unsigned int*)(0x42C8E038UL))
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#define bFM3_ETHERNET_MAC0_TSCR_TSMRM *((volatile unsigned int*)(0x42C8E03CUL))
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#define bFM3_ETHERNET_MAC0_TSCR_TSPS0 *((volatile unsigned int*)(0x42C8E040UL))
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#define bFM3_ETHERNET_MAC0_TSCR_TSPS1 *((volatile unsigned int*)(0x42C8E044UL))
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#define bFM3_ETHERNET_MAC0_TSCR_TSENMF *((volatile unsigned int*)(0x42C8E048UL))
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#define bFM3_ETHERNET_MAC0_TSCR_ATSFC *((volatile unsigned int*)(0x42C8E060UL))
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#define bFM3_ETHERNET_MAC0_SSIR_SSINC0 *((volatile unsigned int*)(0x42C8E080UL))
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#define bFM3_ETHERNET_MAC0_SSIR_SSINC1 *((volatile unsigned int*)(0x42C8E084UL))
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#define bFM3_ETHERNET_MAC0_SSIR_SSINC2 *((volatile unsigned int*)(0x42C8E088UL))
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#define bFM3_ETHERNET_MAC0_SSIR_SSINC3 *((volatile unsigned int*)(0x42C8E08CUL))
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#define bFM3_ETHERNET_MAC0_SSIR_SSINC4 *((volatile unsigned int*)(0x42C8E090UL))
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#define bFM3_ETHERNET_MAC0_SSIR_SSINC5 *((volatile unsigned int*)(0x42C8E094UL))
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#define bFM3_ETHERNET_MAC0_SSIR_SSINC6 *((volatile unsigned int*)(0x42C8E098UL))
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#define bFM3_ETHERNET_MAC0_SSIR_SSINC7 *((volatile unsigned int*)(0x42C8E09CUL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS0 *((volatile unsigned int*)(0x42C8E100UL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS1 *((volatile unsigned int*)(0x42C8E104UL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS2 *((volatile unsigned int*)(0x42C8E108UL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS3 *((volatile unsigned int*)(0x42C8E10CUL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS4 *((volatile unsigned int*)(0x42C8E110UL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS5 *((volatile unsigned int*)(0x42C8E114UL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS6 *((volatile unsigned int*)(0x42C8E118UL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS7 *((volatile unsigned int*)(0x42C8E11CUL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS8 *((volatile unsigned int*)(0x42C8E120UL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS9 *((volatile unsigned int*)(0x42C8E124UL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS10 *((volatile unsigned int*)(0x42C8E128UL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS11 *((volatile unsigned int*)(0x42C8E12CUL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS12 *((volatile unsigned int*)(0x42C8E130UL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS13 *((volatile unsigned int*)(0x42C8E134UL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS14 *((volatile unsigned int*)(0x42C8E138UL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS15 *((volatile unsigned int*)(0x42C8E13CUL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS16 *((volatile unsigned int*)(0x42C8E140UL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS17 *((volatile unsigned int*)(0x42C8E144UL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS18 *((volatile unsigned int*)(0x42C8E148UL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS19 *((volatile unsigned int*)(0x42C8E14CUL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS20 *((volatile unsigned int*)(0x42C8E150UL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS21 *((volatile unsigned int*)(0x42C8E154UL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS22 *((volatile unsigned int*)(0x42C8E158UL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS23 *((volatile unsigned int*)(0x42C8E15CUL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS24 *((volatile unsigned int*)(0x42C8E160UL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS25 *((volatile unsigned int*)(0x42C8E164UL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS26 *((volatile unsigned int*)(0x42C8E168UL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS27 *((volatile unsigned int*)(0x42C8E16CUL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS28 *((volatile unsigned int*)(0x42C8E170UL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS29 *((volatile unsigned int*)(0x42C8E174UL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS30 *((volatile unsigned int*)(0x42C8E178UL))
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#define bFM3_ETHERNET_MAC0_STSR_TSS31 *((volatile unsigned int*)(0x42C8E17CUL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS0 *((volatile unsigned int*)(0x42C8E080UL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS1 *((volatile unsigned int*)(0x42C8E084UL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS2 *((volatile unsigned int*)(0x42C8E088UL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS3 *((volatile unsigned int*)(0x42C8E08CUL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS4 *((volatile unsigned int*)(0x42C8E090UL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS5 *((volatile unsigned int*)(0x42C8E094UL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS6 *((volatile unsigned int*)(0x42C8E098UL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS7 *((volatile unsigned int*)(0x42C8E09CUL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS8 *((volatile unsigned int*)(0x42C8E0A0UL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS9 *((volatile unsigned int*)(0x42C8E0A4UL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS10 *((volatile unsigned int*)(0x42C8E0A8UL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS11 *((volatile unsigned int*)(0x42C8E0ACUL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS12 *((volatile unsigned int*)(0x42C8E0B0UL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS13 *((volatile unsigned int*)(0x42C8E0B4UL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS14 *((volatile unsigned int*)(0x42C8E0B8UL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS15 *((volatile unsigned int*)(0x42C8E0BCUL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS16 *((volatile unsigned int*)(0x42C8E0C0UL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS17 *((volatile unsigned int*)(0x42C8E0C4UL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS18 *((volatile unsigned int*)(0x42C8E0C8UL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS19 *((volatile unsigned int*)(0x42C8E0CCUL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS20 *((volatile unsigned int*)(0x42C8E0D0UL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS21 *((volatile unsigned int*)(0x42C8E0D4UL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS22 *((volatile unsigned int*)(0x42C8E0D8UL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS23 *((volatile unsigned int*)(0x42C8E0DCUL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS24 *((volatile unsigned int*)(0x42C8E0E0UL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS25 *((volatile unsigned int*)(0x42C8E0E4UL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS26 *((volatile unsigned int*)(0x42C8E0E8UL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS27 *((volatile unsigned int*)(0x42C8E0ECUL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS28 *((volatile unsigned int*)(0x42C8E0F0UL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS29 *((volatile unsigned int*)(0x42C8E0F4UL))
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#define bFM3_ETHERNET_MAC0_STNR_TSSS30 *((volatile unsigned int*)(0x42C8E0F8UL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS0 *((volatile unsigned int*)(0x42C8E200UL))
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|
#define bFM3_ETHERNET_MAC0_STSUR_TSS1 *((volatile unsigned int*)(0x42C8E204UL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS2 *((volatile unsigned int*)(0x42C8E208UL))
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|
#define bFM3_ETHERNET_MAC0_STSUR_TSS3 *((volatile unsigned int*)(0x42C8E20CUL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS4 *((volatile unsigned int*)(0x42C8E210UL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS5 *((volatile unsigned int*)(0x42C8E214UL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS6 *((volatile unsigned int*)(0x42C8E218UL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS7 *((volatile unsigned int*)(0x42C8E21CUL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS8 *((volatile unsigned int*)(0x42C8E220UL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS9 *((volatile unsigned int*)(0x42C8E224UL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS10 *((volatile unsigned int*)(0x42C8E228UL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS11 *((volatile unsigned int*)(0x42C8E22CUL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS12 *((volatile unsigned int*)(0x42C8E230UL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS13 *((volatile unsigned int*)(0x42C8E234UL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS14 *((volatile unsigned int*)(0x42C8E238UL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS15 *((volatile unsigned int*)(0x42C8E23CUL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS16 *((volatile unsigned int*)(0x42C8E240UL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS17 *((volatile unsigned int*)(0x42C8E244UL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS18 *((volatile unsigned int*)(0x42C8E248UL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS19 *((volatile unsigned int*)(0x42C8E24CUL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS20 *((volatile unsigned int*)(0x42C8E250UL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS21 *((volatile unsigned int*)(0x42C8E254UL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS22 *((volatile unsigned int*)(0x42C8E258UL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS23 *((volatile unsigned int*)(0x42C8E25CUL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS24 *((volatile unsigned int*)(0x42C8E260UL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS25 *((volatile unsigned int*)(0x42C8E264UL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS26 *((volatile unsigned int*)(0x42C8E268UL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS27 *((volatile unsigned int*)(0x42C8E26CUL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS28 *((volatile unsigned int*)(0x42C8E270UL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS29 *((volatile unsigned int*)(0x42C8E274UL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS30 *((volatile unsigned int*)(0x42C8E278UL))
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#define bFM3_ETHERNET_MAC0_STSUR_TSS31 *((volatile unsigned int*)(0x42C8E27CUL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS0 *((volatile unsigned int*)(0x42C8E280UL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS1 *((volatile unsigned int*)(0x42C8E284UL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS2 *((volatile unsigned int*)(0x42C8E288UL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS3 *((volatile unsigned int*)(0x42C8E28CUL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS4 *((volatile unsigned int*)(0x42C8E290UL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS5 *((volatile unsigned int*)(0x42C8E294UL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS6 *((volatile unsigned int*)(0x42C8E298UL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS7 *((volatile unsigned int*)(0x42C8E29CUL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS8 *((volatile unsigned int*)(0x42C8E2A0UL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS9 *((volatile unsigned int*)(0x42C8E2A4UL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS10 *((volatile unsigned int*)(0x42C8E2A8UL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS11 *((volatile unsigned int*)(0x42C8E2ACUL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS12 *((volatile unsigned int*)(0x42C8E2B0UL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS13 *((volatile unsigned int*)(0x42C8E2B4UL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS14 *((volatile unsigned int*)(0x42C8E2B8UL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS15 *((volatile unsigned int*)(0x42C8E2BCUL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS16 *((volatile unsigned int*)(0x42C8E2C0UL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS17 *((volatile unsigned int*)(0x42C8E2C4UL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS18 *((volatile unsigned int*)(0x42C8E2C8UL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS19 *((volatile unsigned int*)(0x42C8E2CCUL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS20 *((volatile unsigned int*)(0x42C8E2D0UL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS21 *((volatile unsigned int*)(0x42C8E2D4UL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS22 *((volatile unsigned int*)(0x42C8E2D8UL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS23 *((volatile unsigned int*)(0x42C8E2DCUL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS24 *((volatile unsigned int*)(0x42C8E2E0UL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS25 *((volatile unsigned int*)(0x42C8E2E4UL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS26 *((volatile unsigned int*)(0x42C8E2E8UL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS27 *((volatile unsigned int*)(0x42C8E2ECUL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS28 *((volatile unsigned int*)(0x42C8E2F0UL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS29 *((volatile unsigned int*)(0x42C8E2F4UL))
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#define bFM3_ETHERNET_MAC0_STNUR_TSSS30 *((volatile unsigned int*)(0x42C8E2F8UL))
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#define bFM3_ETHERNET_MAC0_STNUR_ADDSUB *((volatile unsigned int*)(0x42C8E2FCUL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR0 *((volatile unsigned int*)(0x42C8E300UL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR1 *((volatile unsigned int*)(0x42C8E304UL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR2 *((volatile unsigned int*)(0x42C8E308UL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR3 *((volatile unsigned int*)(0x42C8E30CUL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR4 *((volatile unsigned int*)(0x42C8E310UL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR5 *((volatile unsigned int*)(0x42C8E314UL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR6 *((volatile unsigned int*)(0x42C8E318UL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR7 *((volatile unsigned int*)(0x42C8E31CUL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR8 *((volatile unsigned int*)(0x42C8E320UL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR9 *((volatile unsigned int*)(0x42C8E324UL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR10 *((volatile unsigned int*)(0x42C8E328UL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR11 *((volatile unsigned int*)(0x42C8E32CUL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR12 *((volatile unsigned int*)(0x42C8E330UL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR13 *((volatile unsigned int*)(0x42C8E334UL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR14 *((volatile unsigned int*)(0x42C8E338UL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR15 *((volatile unsigned int*)(0x42C8E33CUL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR16 *((volatile unsigned int*)(0x42C8E340UL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR17 *((volatile unsigned int*)(0x42C8E344UL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR18 *((volatile unsigned int*)(0x42C8E348UL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR19 *((volatile unsigned int*)(0x42C8E34CUL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR20 *((volatile unsigned int*)(0x42C8E350UL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR21 *((volatile unsigned int*)(0x42C8E354UL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR22 *((volatile unsigned int*)(0x42C8E358UL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR23 *((volatile unsigned int*)(0x42C8E35CUL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR24 *((volatile unsigned int*)(0x42C8E360UL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR25 *((volatile unsigned int*)(0x42C8E364UL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR26 *((volatile unsigned int*)(0x42C8E368UL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR27 *((volatile unsigned int*)(0x42C8E36CUL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR28 *((volatile unsigned int*)(0x42C8E370UL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR29 *((volatile unsigned int*)(0x42C8E374UL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR30 *((volatile unsigned int*)(0x42C8E378UL))
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#define bFM3_ETHERNET_MAC0_TSAR_TSAR31 *((volatile unsigned int*)(0x42C8E37CUL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR0 *((volatile unsigned int*)(0x42C8E380UL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR1 *((volatile unsigned int*)(0x42C8E384UL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR2 *((volatile unsigned int*)(0x42C8E388UL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR3 *((volatile unsigned int*)(0x42C8E38CUL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR4 *((volatile unsigned int*)(0x42C8E390UL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR5 *((volatile unsigned int*)(0x42C8E394UL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR6 *((volatile unsigned int*)(0x42C8E398UL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR7 *((volatile unsigned int*)(0x42C8E39CUL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR8 *((volatile unsigned int*)(0x42C8E3A0UL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR9 *((volatile unsigned int*)(0x42C8E3A4UL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR10 *((volatile unsigned int*)(0x42C8E3A8UL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR11 *((volatile unsigned int*)(0x42C8E3ACUL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR12 *((volatile unsigned int*)(0x42C8E3B0UL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR13 *((volatile unsigned int*)(0x42C8E3B4UL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR14 *((volatile unsigned int*)(0x42C8E3B8UL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR15 *((volatile unsigned int*)(0x42C8E3BCUL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR16 *((volatile unsigned int*)(0x42C8E3C0UL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR17 *((volatile unsigned int*)(0x42C8E3C4UL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR18 *((volatile unsigned int*)(0x42C8E3C8UL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR19 *((volatile unsigned int*)(0x42C8E3CCUL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR20 *((volatile unsigned int*)(0x42C8E3D0UL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR21 *((volatile unsigned int*)(0x42C8E3D4UL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR22 *((volatile unsigned int*)(0x42C8E3D8UL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR23 *((volatile unsigned int*)(0x42C8E3DCUL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR24 *((volatile unsigned int*)(0x42C8E3E0UL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR25 *((volatile unsigned int*)(0x42C8E3E4UL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR26 *((volatile unsigned int*)(0x42C8E3E8UL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR27 *((volatile unsigned int*)(0x42C8E3ECUL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR28 *((volatile unsigned int*)(0x42C8E3F0UL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR29 *((volatile unsigned int*)(0x42C8E3F4UL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR30 *((volatile unsigned int*)(0x42C8E3F8UL))
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#define bFM3_ETHERNET_MAC0_TTSR_TSTR31 *((volatile unsigned int*)(0x42C8E3FCUL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR0 *((volatile unsigned int*)(0x42C8E400UL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR1 *((volatile unsigned int*)(0x42C8E404UL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR2 *((volatile unsigned int*)(0x42C8E408UL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR3 *((volatile unsigned int*)(0x42C8E40CUL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR4 *((volatile unsigned int*)(0x42C8E410UL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR5 *((volatile unsigned int*)(0x42C8E414UL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR6 *((volatile unsigned int*)(0x42C8E418UL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR7 *((volatile unsigned int*)(0x42C8E41CUL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR8 *((volatile unsigned int*)(0x42C8E420UL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR9 *((volatile unsigned int*)(0x42C8E424UL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR10 *((volatile unsigned int*)(0x42C8E428UL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR11 *((volatile unsigned int*)(0x42C8E42CUL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR12 *((volatile unsigned int*)(0x42C8E430UL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR13 *((volatile unsigned int*)(0x42C8E434UL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR14 *((volatile unsigned int*)(0x42C8E438UL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR15 *((volatile unsigned int*)(0x42C8E43CUL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR16 *((volatile unsigned int*)(0x42C8E440UL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR17 *((volatile unsigned int*)(0x42C8E444UL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR18 *((volatile unsigned int*)(0x42C8E448UL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR19 *((volatile unsigned int*)(0x42C8E44CUL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR20 *((volatile unsigned int*)(0x42C8E450UL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR21 *((volatile unsigned int*)(0x42C8E454UL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR22 *((volatile unsigned int*)(0x42C8E458UL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR23 *((volatile unsigned int*)(0x42C8E45CUL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR24 *((volatile unsigned int*)(0x42C8E460UL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR25 *((volatile unsigned int*)(0x42C8E464UL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR26 *((volatile unsigned int*)(0x42C8E468UL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR27 *((volatile unsigned int*)(0x42C8E46CUL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR28 *((volatile unsigned int*)(0x42C8E470UL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR29 *((volatile unsigned int*)(0x42C8E474UL))
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#define bFM3_ETHERNET_MAC0_TTNR_TSTR30 *((volatile unsigned int*)(0x42C8E478UL))
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#define bFM3_ETHERNET_MAC0_STHWSR_TSHWR0 *((volatile unsigned int*)(0x42C8E480UL))
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#define bFM3_ETHERNET_MAC0_STHWSR_TSHWR1 *((volatile unsigned int*)(0x42C8E484UL))
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#define bFM3_ETHERNET_MAC0_STHWSR_TSHWR2 *((volatile unsigned int*)(0x42C8E488UL))
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#define bFM3_ETHERNET_MAC0_STHWSR_TSHWR3 *((volatile unsigned int*)(0x42C8E48CUL))
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#define bFM3_ETHERNET_MAC0_STHWSR_TSHWR4 *((volatile unsigned int*)(0x42C8E490UL))
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#define bFM3_ETHERNET_MAC0_STHWSR_TSHWR5 *((volatile unsigned int*)(0x42C8E494UL))
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#define bFM3_ETHERNET_MAC0_STHWSR_TSHWR6 *((volatile unsigned int*)(0x42C8E498UL))
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#define bFM3_ETHERNET_MAC0_STHWSR_TSHWR7 *((volatile unsigned int*)(0x42C8E49CUL))
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#define bFM3_ETHERNET_MAC0_STHWSR_TSHWR8 *((volatile unsigned int*)(0x42C8E4A0UL))
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#define bFM3_ETHERNET_MAC0_STHWSR_TSHWR9 *((volatile unsigned int*)(0x42C8E4A4UL))
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#define bFM3_ETHERNET_MAC0_STHWSR_TSHWR10 *((volatile unsigned int*)(0x42C8E4A8UL))
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#define bFM3_ETHERNET_MAC0_STHWSR_TSHWR11 *((volatile unsigned int*)(0x42C8E4ACUL))
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#define bFM3_ETHERNET_MAC0_STHWSR_TSHWR12 *((volatile unsigned int*)(0x42C8E4B0UL))
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#define bFM3_ETHERNET_MAC0_STHWSR_TSHWR13 *((volatile unsigned int*)(0x42C8E4B4UL))
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#define bFM3_ETHERNET_MAC0_STHWSR_TSHWR14 *((volatile unsigned int*)(0x42C8E4B8UL))
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#define bFM3_ETHERNET_MAC0_STHWSR_TSHWR15 *((volatile unsigned int*)(0x42C8E4BCUL))
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#define bFM3_ETHERNET_MAC0_TSR_TSSOVF *((volatile unsigned int*)(0x42C8E500UL))
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#define bFM3_ETHERNET_MAC0_TSR_TSTART *((volatile unsigned int*)(0x42C8E504UL))
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#define bFM3_ETHERNET_MAC0_TSR_ATSTS *((volatile unsigned int*)(0x42C8E508UL))
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#define bFM3_ETHERNET_MAC0_TSR_TRGTER *((volatile unsigned int*)(0x42C8E50CUL))
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#define bFM3_ETHERNET_MAC0_TSR_ATSSTM *((volatile unsigned int*)(0x42C8E560UL))
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#define bFM3_ETHERNET_MAC0_TSR_ATSNS0 *((volatile unsigned int*)(0x42C8E564UL))
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#define bFM3_ETHERNET_MAC0_TSR_ATSNS1 *((volatile unsigned int*)(0x42C8E568UL))
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|
#define bFM3_ETHERNET_MAC0_TSR_ATSNS2 *((volatile unsigned int*)(0x42C8E56CUL))
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#define bFM3_ETHERNET_MAC0_PPSCR_PPSCTRL0 *((volatile unsigned int*)(0x42C8E580UL))
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|
#define bFM3_ETHERNET_MAC0_PPSCR_PPSCTRL1 *((volatile unsigned int*)(0x42C8E584UL))
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|
#define bFM3_ETHERNET_MAC0_PPSCR_PPSCTRL2 *((volatile unsigned int*)(0x42C8E588UL))
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|
#define bFM3_ETHERNET_MAC0_PPSCR_PPSCTRL3 *((volatile unsigned int*)(0x42C8E58CUL))
|
|
#define bFM3_ETHERNET_MAC0_ATNR_ATN0 *((volatile unsigned int*)(0x42C8E600UL))
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|
#define bFM3_ETHERNET_MAC0_ATNR_ATN1 *((volatile unsigned int*)(0x42C8E604UL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN2 *((volatile unsigned int*)(0x42C8E608UL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN3 *((volatile unsigned int*)(0x42C8E60CUL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN4 *((volatile unsigned int*)(0x42C8E610UL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN5 *((volatile unsigned int*)(0x42C8E614UL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN6 *((volatile unsigned int*)(0x42C8E618UL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN7 *((volatile unsigned int*)(0x42C8E61CUL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN8 *((volatile unsigned int*)(0x42C8E620UL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN9 *((volatile unsigned int*)(0x42C8E624UL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN10 *((volatile unsigned int*)(0x42C8E628UL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN11 *((volatile unsigned int*)(0x42C8E62CUL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN12 *((volatile unsigned int*)(0x42C8E630UL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN13 *((volatile unsigned int*)(0x42C8E634UL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN14 *((volatile unsigned int*)(0x42C8E638UL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN15 *((volatile unsigned int*)(0x42C8E63CUL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN16 *((volatile unsigned int*)(0x42C8E640UL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN17 *((volatile unsigned int*)(0x42C8E644UL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN18 *((volatile unsigned int*)(0x42C8E648UL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN19 *((volatile unsigned int*)(0x42C8E64CUL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN20 *((volatile unsigned int*)(0x42C8E650UL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN21 *((volatile unsigned int*)(0x42C8E654UL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN22 *((volatile unsigned int*)(0x42C8E658UL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN23 *((volatile unsigned int*)(0x42C8E65CUL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN24 *((volatile unsigned int*)(0x42C8E660UL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN25 *((volatile unsigned int*)(0x42C8E664UL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN26 *((volatile unsigned int*)(0x42C8E668UL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN27 *((volatile unsigned int*)(0x42C8E66CUL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN28 *((volatile unsigned int*)(0x42C8E670UL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN29 *((volatile unsigned int*)(0x42C8E674UL))
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#define bFM3_ETHERNET_MAC0_ATNR_ATN30 *((volatile unsigned int*)(0x42C8E678UL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS0 *((volatile unsigned int*)(0x42C8E680UL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS1 *((volatile unsigned int*)(0x42C8E684UL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS2 *((volatile unsigned int*)(0x42C8E688UL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS3 *((volatile unsigned int*)(0x42C8E68CUL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS4 *((volatile unsigned int*)(0x42C8E690UL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS5 *((volatile unsigned int*)(0x42C8E694UL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS6 *((volatile unsigned int*)(0x42C8E698UL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS7 *((volatile unsigned int*)(0x42C8E69CUL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS8 *((volatile unsigned int*)(0x42C8E6A0UL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS9 *((volatile unsigned int*)(0x42C8E6A4UL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS10 *((volatile unsigned int*)(0x42C8E6A8UL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS11 *((volatile unsigned int*)(0x42C8E6ACUL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS12 *((volatile unsigned int*)(0x42C8E6B0UL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS13 *((volatile unsigned int*)(0x42C8E6B4UL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS14 *((volatile unsigned int*)(0x42C8E6B8UL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS15 *((volatile unsigned int*)(0x42C8E6BCUL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS16 *((volatile unsigned int*)(0x42C8E6C0UL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS17 *((volatile unsigned int*)(0x42C8E6C4UL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS18 *((volatile unsigned int*)(0x42C8E6C8UL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS19 *((volatile unsigned int*)(0x42C8E6CCUL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS20 *((volatile unsigned int*)(0x42C8E6D0UL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS21 *((volatile unsigned int*)(0x42C8E6D4UL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS22 *((volatile unsigned int*)(0x42C8E6D8UL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS23 *((volatile unsigned int*)(0x42C8E6DCUL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS24 *((volatile unsigned int*)(0x42C8E6E0UL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS25 *((volatile unsigned int*)(0x42C8E6E4UL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS26 *((volatile unsigned int*)(0x42C8E6E8UL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS27 *((volatile unsigned int*)(0x42C8E6ECUL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS28 *((volatile unsigned int*)(0x42C8E6F0UL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS29 *((volatile unsigned int*)(0x42C8E6F4UL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS30 *((volatile unsigned int*)(0x42C8E6F8UL))
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#define bFM3_ETHERNET_MAC0_ATSR_ATS31 *((volatile unsigned int*)(0x42C8E6FCUL))
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#define bFM3_ETHERNET_MAC0_MAR16H_A32 *((volatile unsigned int*)(0x42C90000UL))
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#define bFM3_ETHERNET_MAC0_MAR16H_A33 *((volatile unsigned int*)(0x42C90004UL))
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#define bFM3_ETHERNET_MAC0_MAR16H_A34 *((volatile unsigned int*)(0x42C90008UL))
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#define bFM3_ETHERNET_MAC0_MAR16H_A35 *((volatile unsigned int*)(0x42C9000CUL))
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#define bFM3_ETHERNET_MAC0_MAR16H_A36 *((volatile unsigned int*)(0x42C90010UL))
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#define bFM3_ETHERNET_MAC0_MAR16H_A37 *((volatile unsigned int*)(0x42C90014UL))
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#define bFM3_ETHERNET_MAC0_MAR16H_A38 *((volatile unsigned int*)(0x42C90018UL))
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#define bFM3_ETHERNET_MAC0_MAR16H_A39 *((volatile unsigned int*)(0x42C9001CUL))
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#define bFM3_ETHERNET_MAC0_MAR16H_A40 *((volatile unsigned int*)(0x42C90020UL))
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#define bFM3_ETHERNET_MAC0_MAR16H_A41 *((volatile unsigned int*)(0x42C90024UL))
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#define bFM3_ETHERNET_MAC0_MAR16H_A42 *((volatile unsigned int*)(0x42C90028UL))
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#define bFM3_ETHERNET_MAC0_MAR16H_A43 *((volatile unsigned int*)(0x42C9002CUL))
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#define bFM3_ETHERNET_MAC0_MAR16H_A44 *((volatile unsigned int*)(0x42C90030UL))
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#define bFM3_ETHERNET_MAC0_MAR16H_A45 *((volatile unsigned int*)(0x42C90034UL))
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#define bFM3_ETHERNET_MAC0_MAR16H_A46 *((volatile unsigned int*)(0x42C90038UL))
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#define bFM3_ETHERNET_MAC0_MAR16H_A47 *((volatile unsigned int*)(0x42C9003CUL))
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#define bFM3_ETHERNET_MAC0_MAR16H_MBC0 *((volatile unsigned int*)(0x42C90060UL))
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#define bFM3_ETHERNET_MAC0_MAR16H_MBC1 *((volatile unsigned int*)(0x42C90064UL))
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#define bFM3_ETHERNET_MAC0_MAR16H_MBC2 *((volatile unsigned int*)(0x42C90068UL))
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#define bFM3_ETHERNET_MAC0_MAR16H_MBC3 *((volatile unsigned int*)(0x42C9006CUL))
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#define bFM3_ETHERNET_MAC0_MAR16H_MBC4 *((volatile unsigned int*)(0x42C90070UL))
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#define bFM3_ETHERNET_MAC0_MAR16H_MBC5 *((volatile unsigned int*)(0x42C90074UL))
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#define bFM3_ETHERNET_MAC0_MAR16H_SA *((volatile unsigned int*)(0x42C90078UL))
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#define bFM3_ETHERNET_MAC0_MAR16H_AE *((volatile unsigned int*)(0x42C9007CUL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A0 *((volatile unsigned int*)(0x42C90080UL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A1 *((volatile unsigned int*)(0x42C90084UL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A2 *((volatile unsigned int*)(0x42C90088UL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A3 *((volatile unsigned int*)(0x42C9008CUL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A4 *((volatile unsigned int*)(0x42C90090UL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A5 *((volatile unsigned int*)(0x42C90094UL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A6 *((volatile unsigned int*)(0x42C90098UL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A7 *((volatile unsigned int*)(0x42C9009CUL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A8 *((volatile unsigned int*)(0x42C900A0UL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A9 *((volatile unsigned int*)(0x42C900A4UL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A10 *((volatile unsigned int*)(0x42C900A8UL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A11 *((volatile unsigned int*)(0x42C900ACUL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A12 *((volatile unsigned int*)(0x42C900B0UL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A13 *((volatile unsigned int*)(0x42C900B4UL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A14 *((volatile unsigned int*)(0x42C900B8UL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A15 *((volatile unsigned int*)(0x42C900BCUL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A16 *((volatile unsigned int*)(0x42C900C0UL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A17 *((volatile unsigned int*)(0x42C900C4UL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A18 *((volatile unsigned int*)(0x42C900C8UL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A19 *((volatile unsigned int*)(0x42C900CCUL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A20 *((volatile unsigned int*)(0x42C900D0UL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A21 *((volatile unsigned int*)(0x42C900D4UL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A22 *((volatile unsigned int*)(0x42C900D8UL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A23 *((volatile unsigned int*)(0x42C900DCUL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A24 *((volatile unsigned int*)(0x42C900E0UL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A25 *((volatile unsigned int*)(0x42C900E4UL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A26 *((volatile unsigned int*)(0x42C900E8UL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A27 *((volatile unsigned int*)(0x42C900ECUL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A28 *((volatile unsigned int*)(0x42C900F0UL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A29 *((volatile unsigned int*)(0x42C900F4UL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A30 *((volatile unsigned int*)(0x42C900F8UL))
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#define bFM3_ETHERNET_MAC0_MAR16L_A31 *((volatile unsigned int*)(0x42C900FCUL))
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#define bFM3_ETHERNET_MAC0_MAR17H_A32 *((volatile unsigned int*)(0x42C90100UL))
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#define bFM3_ETHERNET_MAC0_MAR17H_A33 *((volatile unsigned int*)(0x42C90104UL))
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#define bFM3_ETHERNET_MAC0_MAR17H_A34 *((volatile unsigned int*)(0x42C90108UL))
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#define bFM3_ETHERNET_MAC0_MAR17H_A35 *((volatile unsigned int*)(0x42C9010CUL))
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#define bFM3_ETHERNET_MAC0_MAR17H_A36 *((volatile unsigned int*)(0x42C90110UL))
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#define bFM3_ETHERNET_MAC0_MAR17H_A37 *((volatile unsigned int*)(0x42C90114UL))
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#define bFM3_ETHERNET_MAC0_MAR17H_A38 *((volatile unsigned int*)(0x42C90118UL))
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#define bFM3_ETHERNET_MAC0_MAR17H_A39 *((volatile unsigned int*)(0x42C9011CUL))
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#define bFM3_ETHERNET_MAC0_MAR17H_A40 *((volatile unsigned int*)(0x42C90120UL))
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#define bFM3_ETHERNET_MAC0_MAR17H_A41 *((volatile unsigned int*)(0x42C90124UL))
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#define bFM3_ETHERNET_MAC0_MAR17H_A42 *((volatile unsigned int*)(0x42C90128UL))
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#define bFM3_ETHERNET_MAC0_MAR17H_A43 *((volatile unsigned int*)(0x42C9012CUL))
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#define bFM3_ETHERNET_MAC0_MAR17H_A44 *((volatile unsigned int*)(0x42C90130UL))
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#define bFM3_ETHERNET_MAC0_MAR17H_A45 *((volatile unsigned int*)(0x42C90134UL))
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#define bFM3_ETHERNET_MAC0_MAR17H_A46 *((volatile unsigned int*)(0x42C90138UL))
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#define bFM3_ETHERNET_MAC0_MAR17H_A47 *((volatile unsigned int*)(0x42C9013CUL))
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#define bFM3_ETHERNET_MAC0_MAR17H_MBC0 *((volatile unsigned int*)(0x42C90160UL))
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#define bFM3_ETHERNET_MAC0_MAR17H_MBC1 *((volatile unsigned int*)(0x42C90164UL))
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#define bFM3_ETHERNET_MAC0_MAR17H_MBC2 *((volatile unsigned int*)(0x42C90168UL))
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#define bFM3_ETHERNET_MAC0_MAR17H_MBC3 *((volatile unsigned int*)(0x42C9016CUL))
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#define bFM3_ETHERNET_MAC0_MAR17H_MBC4 *((volatile unsigned int*)(0x42C90170UL))
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#define bFM3_ETHERNET_MAC0_MAR17H_MBC5 *((volatile unsigned int*)(0x42C90174UL))
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#define bFM3_ETHERNET_MAC0_MAR17H_SA *((volatile unsigned int*)(0x42C90178UL))
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#define bFM3_ETHERNET_MAC0_MAR17H_AE *((volatile unsigned int*)(0x42C9017CUL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A0 *((volatile unsigned int*)(0x42C90180UL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A1 *((volatile unsigned int*)(0x42C90184UL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A2 *((volatile unsigned int*)(0x42C90188UL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A3 *((volatile unsigned int*)(0x42C9018CUL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A4 *((volatile unsigned int*)(0x42C90190UL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A5 *((volatile unsigned int*)(0x42C90194UL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A6 *((volatile unsigned int*)(0x42C90198UL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A7 *((volatile unsigned int*)(0x42C9019CUL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A8 *((volatile unsigned int*)(0x42C901A0UL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A9 *((volatile unsigned int*)(0x42C901A4UL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A10 *((volatile unsigned int*)(0x42C901A8UL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A11 *((volatile unsigned int*)(0x42C901ACUL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A12 *((volatile unsigned int*)(0x42C901B0UL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A13 *((volatile unsigned int*)(0x42C901B4UL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A14 *((volatile unsigned int*)(0x42C901B8UL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A15 *((volatile unsigned int*)(0x42C901BCUL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A16 *((volatile unsigned int*)(0x42C901C0UL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A17 *((volatile unsigned int*)(0x42C901C4UL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A18 *((volatile unsigned int*)(0x42C901C8UL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A19 *((volatile unsigned int*)(0x42C901CCUL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A20 *((volatile unsigned int*)(0x42C901D0UL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A21 *((volatile unsigned int*)(0x42C901D4UL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A22 *((volatile unsigned int*)(0x42C901D8UL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A23 *((volatile unsigned int*)(0x42C901DCUL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A24 *((volatile unsigned int*)(0x42C901E0UL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A25 *((volatile unsigned int*)(0x42C901E4UL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A26 *((volatile unsigned int*)(0x42C901E8UL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A27 *((volatile unsigned int*)(0x42C901ECUL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A28 *((volatile unsigned int*)(0x42C901F0UL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A29 *((volatile unsigned int*)(0x42C901F4UL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A30 *((volatile unsigned int*)(0x42C901F8UL))
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#define bFM3_ETHERNET_MAC0_MAR17L_A31 *((volatile unsigned int*)(0x42C901FCUL))
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#define bFM3_ETHERNET_MAC0_MAR18H_A32 *((volatile unsigned int*)(0x42C90200UL))
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#define bFM3_ETHERNET_MAC0_MAR18H_A33 *((volatile unsigned int*)(0x42C90204UL))
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#define bFM3_ETHERNET_MAC0_MAR18H_A34 *((volatile unsigned int*)(0x42C90208UL))
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#define bFM3_ETHERNET_MAC0_MAR18H_A35 *((volatile unsigned int*)(0x42C9020CUL))
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#define bFM3_ETHERNET_MAC0_MAR18H_A36 *((volatile unsigned int*)(0x42C90210UL))
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#define bFM3_ETHERNET_MAC0_MAR18H_A37 *((volatile unsigned int*)(0x42C90214UL))
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#define bFM3_ETHERNET_MAC0_MAR18H_A38 *((volatile unsigned int*)(0x42C90218UL))
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#define bFM3_ETHERNET_MAC0_MAR18H_A39 *((volatile unsigned int*)(0x42C9021CUL))
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#define bFM3_ETHERNET_MAC0_MAR18H_A40 *((volatile unsigned int*)(0x42C90220UL))
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#define bFM3_ETHERNET_MAC0_MAR18H_A41 *((volatile unsigned int*)(0x42C90224UL))
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#define bFM3_ETHERNET_MAC0_MAR18H_A42 *((volatile unsigned int*)(0x42C90228UL))
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#define bFM3_ETHERNET_MAC0_MAR18H_A43 *((volatile unsigned int*)(0x42C9022CUL))
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#define bFM3_ETHERNET_MAC0_MAR18H_A44 *((volatile unsigned int*)(0x42C90230UL))
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#define bFM3_ETHERNET_MAC0_MAR18H_A45 *((volatile unsigned int*)(0x42C90234UL))
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#define bFM3_ETHERNET_MAC0_MAR18H_A46 *((volatile unsigned int*)(0x42C90238UL))
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#define bFM3_ETHERNET_MAC0_MAR18H_A47 *((volatile unsigned int*)(0x42C9023CUL))
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#define bFM3_ETHERNET_MAC0_MAR18H_MBC0 *((volatile unsigned int*)(0x42C90260UL))
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#define bFM3_ETHERNET_MAC0_MAR18H_MBC1 *((volatile unsigned int*)(0x42C90264UL))
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#define bFM3_ETHERNET_MAC0_MAR18H_MBC2 *((volatile unsigned int*)(0x42C90268UL))
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#define bFM3_ETHERNET_MAC0_MAR18H_MBC3 *((volatile unsigned int*)(0x42C9026CUL))
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#define bFM3_ETHERNET_MAC0_MAR18H_MBC4 *((volatile unsigned int*)(0x42C90270UL))
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#define bFM3_ETHERNET_MAC0_MAR18H_MBC5 *((volatile unsigned int*)(0x42C90274UL))
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#define bFM3_ETHERNET_MAC0_MAR18H_SA *((volatile unsigned int*)(0x42C90278UL))
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#define bFM3_ETHERNET_MAC0_MAR18H_AE *((volatile unsigned int*)(0x42C9027CUL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A0 *((volatile unsigned int*)(0x42C90280UL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A1 *((volatile unsigned int*)(0x42C90284UL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A2 *((volatile unsigned int*)(0x42C90288UL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A3 *((volatile unsigned int*)(0x42C9028CUL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A4 *((volatile unsigned int*)(0x42C90290UL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A5 *((volatile unsigned int*)(0x42C90294UL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A6 *((volatile unsigned int*)(0x42C90298UL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A7 *((volatile unsigned int*)(0x42C9029CUL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A8 *((volatile unsigned int*)(0x42C902A0UL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A9 *((volatile unsigned int*)(0x42C902A4UL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A10 *((volatile unsigned int*)(0x42C902A8UL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A11 *((volatile unsigned int*)(0x42C902ACUL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A12 *((volatile unsigned int*)(0x42C902B0UL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A13 *((volatile unsigned int*)(0x42C902B4UL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A14 *((volatile unsigned int*)(0x42C902B8UL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A15 *((volatile unsigned int*)(0x42C902BCUL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A16 *((volatile unsigned int*)(0x42C902C0UL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A17 *((volatile unsigned int*)(0x42C902C4UL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A18 *((volatile unsigned int*)(0x42C902C8UL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A19 *((volatile unsigned int*)(0x42C902CCUL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A20 *((volatile unsigned int*)(0x42C902D0UL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A21 *((volatile unsigned int*)(0x42C902D4UL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A22 *((volatile unsigned int*)(0x42C902D8UL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A23 *((volatile unsigned int*)(0x42C902DCUL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A24 *((volatile unsigned int*)(0x42C902E0UL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A25 *((volatile unsigned int*)(0x42C902E4UL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A26 *((volatile unsigned int*)(0x42C902E8UL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A27 *((volatile unsigned int*)(0x42C902ECUL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A28 *((volatile unsigned int*)(0x42C902F0UL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A29 *((volatile unsigned int*)(0x42C902F4UL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A30 *((volatile unsigned int*)(0x42C902F8UL))
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#define bFM3_ETHERNET_MAC0_MAR18L_A31 *((volatile unsigned int*)(0x42C902FCUL))
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#define bFM3_ETHERNET_MAC0_MAR19H_A32 *((volatile unsigned int*)(0x42C90300UL))
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#define bFM3_ETHERNET_MAC0_MAR19H_A33 *((volatile unsigned int*)(0x42C90304UL))
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#define bFM3_ETHERNET_MAC0_MAR19H_A34 *((volatile unsigned int*)(0x42C90308UL))
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#define bFM3_ETHERNET_MAC0_MAR19H_A35 *((volatile unsigned int*)(0x42C9030CUL))
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#define bFM3_ETHERNET_MAC0_MAR19H_A36 *((volatile unsigned int*)(0x42C90310UL))
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#define bFM3_ETHERNET_MAC0_MAR19H_A37 *((volatile unsigned int*)(0x42C90314UL))
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#define bFM3_ETHERNET_MAC0_MAR19H_A38 *((volatile unsigned int*)(0x42C90318UL))
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#define bFM3_ETHERNET_MAC0_MAR19H_A39 *((volatile unsigned int*)(0x42C9031CUL))
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|
#define bFM3_ETHERNET_MAC0_MAR19H_A40 *((volatile unsigned int*)(0x42C90320UL))
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#define bFM3_ETHERNET_MAC0_MAR19H_A41 *((volatile unsigned int*)(0x42C90324UL))
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|
#define bFM3_ETHERNET_MAC0_MAR19H_A42 *((volatile unsigned int*)(0x42C90328UL))
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#define bFM3_ETHERNET_MAC0_MAR19H_A43 *((volatile unsigned int*)(0x42C9032CUL))
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#define bFM3_ETHERNET_MAC0_MAR19H_A44 *((volatile unsigned int*)(0x42C90330UL))
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|
#define bFM3_ETHERNET_MAC0_MAR19H_A45 *((volatile unsigned int*)(0x42C90334UL))
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|
#define bFM3_ETHERNET_MAC0_MAR19H_A46 *((volatile unsigned int*)(0x42C90338UL))
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#define bFM3_ETHERNET_MAC0_MAR19H_A47 *((volatile unsigned int*)(0x42C9033CUL))
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|
#define bFM3_ETHERNET_MAC0_MAR19H_MBC0 *((volatile unsigned int*)(0x42C90360UL))
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|
#define bFM3_ETHERNET_MAC0_MAR19H_MBC1 *((volatile unsigned int*)(0x42C90364UL))
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|
#define bFM3_ETHERNET_MAC0_MAR19H_MBC2 *((volatile unsigned int*)(0x42C90368UL))
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|
#define bFM3_ETHERNET_MAC0_MAR19H_MBC3 *((volatile unsigned int*)(0x42C9036CUL))
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|
#define bFM3_ETHERNET_MAC0_MAR19H_MBC4 *((volatile unsigned int*)(0x42C90370UL))
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|
#define bFM3_ETHERNET_MAC0_MAR19H_MBC5 *((volatile unsigned int*)(0x42C90374UL))
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|
#define bFM3_ETHERNET_MAC0_MAR19H_SA *((volatile unsigned int*)(0x42C90378UL))
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#define bFM3_ETHERNET_MAC0_MAR19H_AE *((volatile unsigned int*)(0x42C9037CUL))
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#define bFM3_ETHERNET_MAC0_MAR19L_A0 *((volatile unsigned int*)(0x42C90380UL))
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|
#define bFM3_ETHERNET_MAC0_MAR19L_A1 *((volatile unsigned int*)(0x42C90384UL))
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|
#define bFM3_ETHERNET_MAC0_MAR19L_A2 *((volatile unsigned int*)(0x42C90388UL))
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|
#define bFM3_ETHERNET_MAC0_MAR19L_A3 *((volatile unsigned int*)(0x42C9038CUL))
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|
#define bFM3_ETHERNET_MAC0_MAR19L_A4 *((volatile unsigned int*)(0x42C90390UL))
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|
#define bFM3_ETHERNET_MAC0_MAR19L_A5 *((volatile unsigned int*)(0x42C90394UL))
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|
#define bFM3_ETHERNET_MAC0_MAR19L_A6 *((volatile unsigned int*)(0x42C90398UL))
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|
#define bFM3_ETHERNET_MAC0_MAR19L_A7 *((volatile unsigned int*)(0x42C9039CUL))
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|
#define bFM3_ETHERNET_MAC0_MAR19L_A8 *((volatile unsigned int*)(0x42C903A0UL))
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|
#define bFM3_ETHERNET_MAC0_MAR19L_A9 *((volatile unsigned int*)(0x42C903A4UL))
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|
#define bFM3_ETHERNET_MAC0_MAR19L_A10 *((volatile unsigned int*)(0x42C903A8UL))
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|
#define bFM3_ETHERNET_MAC0_MAR19L_A11 *((volatile unsigned int*)(0x42C903ACUL))
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|
#define bFM3_ETHERNET_MAC0_MAR19L_A12 *((volatile unsigned int*)(0x42C903B0UL))
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|
#define bFM3_ETHERNET_MAC0_MAR19L_A13 *((volatile unsigned int*)(0x42C903B4UL))
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|
#define bFM3_ETHERNET_MAC0_MAR19L_A14 *((volatile unsigned int*)(0x42C903B8UL))
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|
#define bFM3_ETHERNET_MAC0_MAR19L_A15 *((volatile unsigned int*)(0x42C903BCUL))
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|
#define bFM3_ETHERNET_MAC0_MAR19L_A16 *((volatile unsigned int*)(0x42C903C0UL))
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#define bFM3_ETHERNET_MAC0_MAR19L_A17 *((volatile unsigned int*)(0x42C903C4UL))
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|
#define bFM3_ETHERNET_MAC0_MAR19L_A18 *((volatile unsigned int*)(0x42C903C8UL))
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|
#define bFM3_ETHERNET_MAC0_MAR19L_A19 *((volatile unsigned int*)(0x42C903CCUL))
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#define bFM3_ETHERNET_MAC0_MAR19L_A20 *((volatile unsigned int*)(0x42C903D0UL))
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#define bFM3_ETHERNET_MAC0_MAR19L_A21 *((volatile unsigned int*)(0x42C903D4UL))
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|
#define bFM3_ETHERNET_MAC0_MAR19L_A22 *((volatile unsigned int*)(0x42C903D8UL))
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#define bFM3_ETHERNET_MAC0_MAR19L_A23 *((volatile unsigned int*)(0x42C903DCUL))
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#define bFM3_ETHERNET_MAC0_MAR19L_A24 *((volatile unsigned int*)(0x42C903E0UL))
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#define bFM3_ETHERNET_MAC0_MAR19L_A25 *((volatile unsigned int*)(0x42C903E4UL))
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#define bFM3_ETHERNET_MAC0_MAR19L_A26 *((volatile unsigned int*)(0x42C903E8UL))
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#define bFM3_ETHERNET_MAC0_MAR19L_A27 *((volatile unsigned int*)(0x42C903ECUL))
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#define bFM3_ETHERNET_MAC0_MAR19L_A28 *((volatile unsigned int*)(0x42C903F0UL))
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#define bFM3_ETHERNET_MAC0_MAR19L_A29 *((volatile unsigned int*)(0x42C903F4UL))
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#define bFM3_ETHERNET_MAC0_MAR19L_A30 *((volatile unsigned int*)(0x42C903F8UL))
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#define bFM3_ETHERNET_MAC0_MAR19L_A31 *((volatile unsigned int*)(0x42C903FCUL))
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#define bFM3_ETHERNET_MAC0_MAR20H_A32 *((volatile unsigned int*)(0x42C90400UL))
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#define bFM3_ETHERNET_MAC0_MAR20H_A33 *((volatile unsigned int*)(0x42C90404UL))
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#define bFM3_ETHERNET_MAC0_MAR20H_A34 *((volatile unsigned int*)(0x42C90408UL))
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#define bFM3_ETHERNET_MAC0_MAR20H_A35 *((volatile unsigned int*)(0x42C9040CUL))
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#define bFM3_ETHERNET_MAC0_MAR20H_A36 *((volatile unsigned int*)(0x42C90410UL))
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#define bFM3_ETHERNET_MAC0_MAR20H_A37 *((volatile unsigned int*)(0x42C90414UL))
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#define bFM3_ETHERNET_MAC0_MAR20H_A38 *((volatile unsigned int*)(0x42C90418UL))
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#define bFM3_ETHERNET_MAC0_MAR20H_A39 *((volatile unsigned int*)(0x42C9041CUL))
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#define bFM3_ETHERNET_MAC0_MAR20H_A40 *((volatile unsigned int*)(0x42C90420UL))
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#define bFM3_ETHERNET_MAC0_MAR20H_A41 *((volatile unsigned int*)(0x42C90424UL))
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#define bFM3_ETHERNET_MAC0_MAR20H_A42 *((volatile unsigned int*)(0x42C90428UL))
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#define bFM3_ETHERNET_MAC0_MAR20H_A43 *((volatile unsigned int*)(0x42C9042CUL))
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#define bFM3_ETHERNET_MAC0_MAR20H_A44 *((volatile unsigned int*)(0x42C90430UL))
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#define bFM3_ETHERNET_MAC0_MAR20H_A45 *((volatile unsigned int*)(0x42C90434UL))
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#define bFM3_ETHERNET_MAC0_MAR20H_A46 *((volatile unsigned int*)(0x42C90438UL))
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#define bFM3_ETHERNET_MAC0_MAR20H_A47 *((volatile unsigned int*)(0x42C9043CUL))
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#define bFM3_ETHERNET_MAC0_MAR20H_MBC0 *((volatile unsigned int*)(0x42C90460UL))
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#define bFM3_ETHERNET_MAC0_MAR20H_MBC1 *((volatile unsigned int*)(0x42C90464UL))
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#define bFM3_ETHERNET_MAC0_MAR20H_MBC2 *((volatile unsigned int*)(0x42C90468UL))
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#define bFM3_ETHERNET_MAC0_MAR20H_MBC3 *((volatile unsigned int*)(0x42C9046CUL))
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|
#define bFM3_ETHERNET_MAC0_MAR20H_MBC4 *((volatile unsigned int*)(0x42C90470UL))
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|
#define bFM3_ETHERNET_MAC0_MAR20H_MBC5 *((volatile unsigned int*)(0x42C90474UL))
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#define bFM3_ETHERNET_MAC0_MAR20H_SA *((volatile unsigned int*)(0x42C90478UL))
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#define bFM3_ETHERNET_MAC0_MAR20H_AE *((volatile unsigned int*)(0x42C9047CUL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A0 *((volatile unsigned int*)(0x42C90480UL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A1 *((volatile unsigned int*)(0x42C90484UL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A2 *((volatile unsigned int*)(0x42C90488UL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A3 *((volatile unsigned int*)(0x42C9048CUL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A4 *((volatile unsigned int*)(0x42C90490UL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A5 *((volatile unsigned int*)(0x42C90494UL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A6 *((volatile unsigned int*)(0x42C90498UL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A7 *((volatile unsigned int*)(0x42C9049CUL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A8 *((volatile unsigned int*)(0x42C904A0UL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A9 *((volatile unsigned int*)(0x42C904A4UL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A10 *((volatile unsigned int*)(0x42C904A8UL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A11 *((volatile unsigned int*)(0x42C904ACUL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A12 *((volatile unsigned int*)(0x42C904B0UL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A13 *((volatile unsigned int*)(0x42C904B4UL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A14 *((volatile unsigned int*)(0x42C904B8UL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A15 *((volatile unsigned int*)(0x42C904BCUL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A16 *((volatile unsigned int*)(0x42C904C0UL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A17 *((volatile unsigned int*)(0x42C904C4UL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A18 *((volatile unsigned int*)(0x42C904C8UL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A19 *((volatile unsigned int*)(0x42C904CCUL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A20 *((volatile unsigned int*)(0x42C904D0UL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A21 *((volatile unsigned int*)(0x42C904D4UL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A22 *((volatile unsigned int*)(0x42C904D8UL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A23 *((volatile unsigned int*)(0x42C904DCUL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A24 *((volatile unsigned int*)(0x42C904E0UL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A25 *((volatile unsigned int*)(0x42C904E4UL))
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|
#define bFM3_ETHERNET_MAC0_MAR20L_A26 *((volatile unsigned int*)(0x42C904E8UL))
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|
#define bFM3_ETHERNET_MAC0_MAR20L_A27 *((volatile unsigned int*)(0x42C904ECUL))
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|
#define bFM3_ETHERNET_MAC0_MAR20L_A28 *((volatile unsigned int*)(0x42C904F0UL))
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|
#define bFM3_ETHERNET_MAC0_MAR20L_A29 *((volatile unsigned int*)(0x42C904F4UL))
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|
#define bFM3_ETHERNET_MAC0_MAR20L_A30 *((volatile unsigned int*)(0x42C904F8UL))
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#define bFM3_ETHERNET_MAC0_MAR20L_A31 *((volatile unsigned int*)(0x42C904FCUL))
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|
#define bFM3_ETHERNET_MAC0_MAR21H_A32 *((volatile unsigned int*)(0x42C90500UL))
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|
#define bFM3_ETHERNET_MAC0_MAR21H_A33 *((volatile unsigned int*)(0x42C90504UL))
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|
#define bFM3_ETHERNET_MAC0_MAR21H_A34 *((volatile unsigned int*)(0x42C90508UL))
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|
#define bFM3_ETHERNET_MAC0_MAR21H_A35 *((volatile unsigned int*)(0x42C9050CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21H_A36 *((volatile unsigned int*)(0x42C90510UL))
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|
#define bFM3_ETHERNET_MAC0_MAR21H_A37 *((volatile unsigned int*)(0x42C90514UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21H_A38 *((volatile unsigned int*)(0x42C90518UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21H_A39 *((volatile unsigned int*)(0x42C9051CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21H_A40 *((volatile unsigned int*)(0x42C90520UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21H_A41 *((volatile unsigned int*)(0x42C90524UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21H_A42 *((volatile unsigned int*)(0x42C90528UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21H_A43 *((volatile unsigned int*)(0x42C9052CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21H_A44 *((volatile unsigned int*)(0x42C90530UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21H_A45 *((volatile unsigned int*)(0x42C90534UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21H_A46 *((volatile unsigned int*)(0x42C90538UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21H_A47 *((volatile unsigned int*)(0x42C9053CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21H_MBC0 *((volatile unsigned int*)(0x42C90560UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21H_MBC1 *((volatile unsigned int*)(0x42C90564UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21H_MBC2 *((volatile unsigned int*)(0x42C90568UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21H_MBC3 *((volatile unsigned int*)(0x42C9056CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21H_MBC4 *((volatile unsigned int*)(0x42C90570UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21H_MBC5 *((volatile unsigned int*)(0x42C90574UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21H_SA *((volatile unsigned int*)(0x42C90578UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21H_AE *((volatile unsigned int*)(0x42C9057CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21L_A0 *((volatile unsigned int*)(0x42C90580UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21L_A1 *((volatile unsigned int*)(0x42C90584UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21L_A2 *((volatile unsigned int*)(0x42C90588UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21L_A3 *((volatile unsigned int*)(0x42C9058CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21L_A4 *((volatile unsigned int*)(0x42C90590UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21L_A5 *((volatile unsigned int*)(0x42C90594UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21L_A6 *((volatile unsigned int*)(0x42C90598UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21L_A7 *((volatile unsigned int*)(0x42C9059CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21L_A8 *((volatile unsigned int*)(0x42C905A0UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21L_A9 *((volatile unsigned int*)(0x42C905A4UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21L_A10 *((volatile unsigned int*)(0x42C905A8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21L_A11 *((volatile unsigned int*)(0x42C905ACUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21L_A12 *((volatile unsigned int*)(0x42C905B0UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21L_A13 *((volatile unsigned int*)(0x42C905B4UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21L_A14 *((volatile unsigned int*)(0x42C905B8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21L_A15 *((volatile unsigned int*)(0x42C905BCUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21L_A16 *((volatile unsigned int*)(0x42C905C0UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR21L_A17 *((volatile unsigned int*)(0x42C905C4UL))
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#define bFM3_ETHERNET_MAC0_MAR21L_A18 *((volatile unsigned int*)(0x42C905C8UL))
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#define bFM3_ETHERNET_MAC0_MAR21L_A19 *((volatile unsigned int*)(0x42C905CCUL))
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#define bFM3_ETHERNET_MAC0_MAR21L_A20 *((volatile unsigned int*)(0x42C905D0UL))
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#define bFM3_ETHERNET_MAC0_MAR21L_A21 *((volatile unsigned int*)(0x42C905D4UL))
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#define bFM3_ETHERNET_MAC0_MAR21L_A22 *((volatile unsigned int*)(0x42C905D8UL))
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#define bFM3_ETHERNET_MAC0_MAR21L_A23 *((volatile unsigned int*)(0x42C905DCUL))
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#define bFM3_ETHERNET_MAC0_MAR21L_A24 *((volatile unsigned int*)(0x42C905E0UL))
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#define bFM3_ETHERNET_MAC0_MAR21L_A25 *((volatile unsigned int*)(0x42C905E4UL))
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#define bFM3_ETHERNET_MAC0_MAR21L_A26 *((volatile unsigned int*)(0x42C905E8UL))
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#define bFM3_ETHERNET_MAC0_MAR21L_A27 *((volatile unsigned int*)(0x42C905ECUL))
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#define bFM3_ETHERNET_MAC0_MAR21L_A28 *((volatile unsigned int*)(0x42C905F0UL))
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#define bFM3_ETHERNET_MAC0_MAR21L_A29 *((volatile unsigned int*)(0x42C905F4UL))
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#define bFM3_ETHERNET_MAC0_MAR21L_A30 *((volatile unsigned int*)(0x42C905F8UL))
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#define bFM3_ETHERNET_MAC0_MAR21L_A31 *((volatile unsigned int*)(0x42C905FCUL))
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#define bFM3_ETHERNET_MAC0_MAR22H_A32 *((volatile unsigned int*)(0x42C90600UL))
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#define bFM3_ETHERNET_MAC0_MAR22H_A33 *((volatile unsigned int*)(0x42C90604UL))
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#define bFM3_ETHERNET_MAC0_MAR22H_A34 *((volatile unsigned int*)(0x42C90608UL))
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#define bFM3_ETHERNET_MAC0_MAR22H_A35 *((volatile unsigned int*)(0x42C9060CUL))
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#define bFM3_ETHERNET_MAC0_MAR22H_A36 *((volatile unsigned int*)(0x42C90610UL))
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#define bFM3_ETHERNET_MAC0_MAR22H_A37 *((volatile unsigned int*)(0x42C90614UL))
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#define bFM3_ETHERNET_MAC0_MAR22H_A38 *((volatile unsigned int*)(0x42C90618UL))
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#define bFM3_ETHERNET_MAC0_MAR22H_A39 *((volatile unsigned int*)(0x42C9061CUL))
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#define bFM3_ETHERNET_MAC0_MAR22H_A40 *((volatile unsigned int*)(0x42C90620UL))
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#define bFM3_ETHERNET_MAC0_MAR22H_A41 *((volatile unsigned int*)(0x42C90624UL))
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#define bFM3_ETHERNET_MAC0_MAR22H_A42 *((volatile unsigned int*)(0x42C90628UL))
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#define bFM3_ETHERNET_MAC0_MAR22H_A43 *((volatile unsigned int*)(0x42C9062CUL))
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#define bFM3_ETHERNET_MAC0_MAR22H_A44 *((volatile unsigned int*)(0x42C90630UL))
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#define bFM3_ETHERNET_MAC0_MAR22H_A45 *((volatile unsigned int*)(0x42C90634UL))
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#define bFM3_ETHERNET_MAC0_MAR22H_A46 *((volatile unsigned int*)(0x42C90638UL))
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#define bFM3_ETHERNET_MAC0_MAR22H_A47 *((volatile unsigned int*)(0x42C9063CUL))
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#define bFM3_ETHERNET_MAC0_MAR22H_MBC0 *((volatile unsigned int*)(0x42C90660UL))
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#define bFM3_ETHERNET_MAC0_MAR22H_MBC1 *((volatile unsigned int*)(0x42C90664UL))
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#define bFM3_ETHERNET_MAC0_MAR22H_MBC2 *((volatile unsigned int*)(0x42C90668UL))
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#define bFM3_ETHERNET_MAC0_MAR22H_MBC3 *((volatile unsigned int*)(0x42C9066CUL))
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#define bFM3_ETHERNET_MAC0_MAR22H_MBC4 *((volatile unsigned int*)(0x42C90670UL))
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#define bFM3_ETHERNET_MAC0_MAR22H_MBC5 *((volatile unsigned int*)(0x42C90674UL))
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#define bFM3_ETHERNET_MAC0_MAR22H_SA *((volatile unsigned int*)(0x42C90678UL))
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#define bFM3_ETHERNET_MAC0_MAR22H_AE *((volatile unsigned int*)(0x42C9067CUL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A0 *((volatile unsigned int*)(0x42C90680UL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A1 *((volatile unsigned int*)(0x42C90684UL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A2 *((volatile unsigned int*)(0x42C90688UL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A3 *((volatile unsigned int*)(0x42C9068CUL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A4 *((volatile unsigned int*)(0x42C90690UL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A5 *((volatile unsigned int*)(0x42C90694UL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A6 *((volatile unsigned int*)(0x42C90698UL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A7 *((volatile unsigned int*)(0x42C9069CUL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A8 *((volatile unsigned int*)(0x42C906A0UL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A9 *((volatile unsigned int*)(0x42C906A4UL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A10 *((volatile unsigned int*)(0x42C906A8UL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A11 *((volatile unsigned int*)(0x42C906ACUL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A12 *((volatile unsigned int*)(0x42C906B0UL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A13 *((volatile unsigned int*)(0x42C906B4UL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A14 *((volatile unsigned int*)(0x42C906B8UL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A15 *((volatile unsigned int*)(0x42C906BCUL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A16 *((volatile unsigned int*)(0x42C906C0UL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A17 *((volatile unsigned int*)(0x42C906C4UL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A18 *((volatile unsigned int*)(0x42C906C8UL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A19 *((volatile unsigned int*)(0x42C906CCUL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A20 *((volatile unsigned int*)(0x42C906D0UL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A21 *((volatile unsigned int*)(0x42C906D4UL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A22 *((volatile unsigned int*)(0x42C906D8UL))
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|
#define bFM3_ETHERNET_MAC0_MAR22L_A23 *((volatile unsigned int*)(0x42C906DCUL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A24 *((volatile unsigned int*)(0x42C906E0UL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A25 *((volatile unsigned int*)(0x42C906E4UL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A26 *((volatile unsigned int*)(0x42C906E8UL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A27 *((volatile unsigned int*)(0x42C906ECUL))
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#define bFM3_ETHERNET_MAC0_MAR22L_A28 *((volatile unsigned int*)(0x42C906F0UL))
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|
#define bFM3_ETHERNET_MAC0_MAR22L_A29 *((volatile unsigned int*)(0x42C906F4UL))
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|
#define bFM3_ETHERNET_MAC0_MAR22L_A30 *((volatile unsigned int*)(0x42C906F8UL))
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|
#define bFM3_ETHERNET_MAC0_MAR22L_A31 *((volatile unsigned int*)(0x42C906FCUL))
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#define bFM3_ETHERNET_MAC0_MAR23H_A32 *((volatile unsigned int*)(0x42C90700UL))
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#define bFM3_ETHERNET_MAC0_MAR23H_A33 *((volatile unsigned int*)(0x42C90704UL))
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|
#define bFM3_ETHERNET_MAC0_MAR23H_A34 *((volatile unsigned int*)(0x42C90708UL))
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#define bFM3_ETHERNET_MAC0_MAR23H_A35 *((volatile unsigned int*)(0x42C9070CUL))
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|
#define bFM3_ETHERNET_MAC0_MAR23H_A36 *((volatile unsigned int*)(0x42C90710UL))
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|
#define bFM3_ETHERNET_MAC0_MAR23H_A37 *((volatile unsigned int*)(0x42C90714UL))
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#define bFM3_ETHERNET_MAC0_MAR23H_A38 *((volatile unsigned int*)(0x42C90718UL))
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|
#define bFM3_ETHERNET_MAC0_MAR23H_A39 *((volatile unsigned int*)(0x42C9071CUL))
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|
#define bFM3_ETHERNET_MAC0_MAR23H_A40 *((volatile unsigned int*)(0x42C90720UL))
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#define bFM3_ETHERNET_MAC0_MAR23H_A41 *((volatile unsigned int*)(0x42C90724UL))
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#define bFM3_ETHERNET_MAC0_MAR23H_A42 *((volatile unsigned int*)(0x42C90728UL))
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#define bFM3_ETHERNET_MAC0_MAR23H_A43 *((volatile unsigned int*)(0x42C9072CUL))
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|
#define bFM3_ETHERNET_MAC0_MAR23H_A44 *((volatile unsigned int*)(0x42C90730UL))
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#define bFM3_ETHERNET_MAC0_MAR23H_A45 *((volatile unsigned int*)(0x42C90734UL))
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#define bFM3_ETHERNET_MAC0_MAR23H_A46 *((volatile unsigned int*)(0x42C90738UL))
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#define bFM3_ETHERNET_MAC0_MAR23H_A47 *((volatile unsigned int*)(0x42C9073CUL))
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#define bFM3_ETHERNET_MAC0_MAR23H_MBC0 *((volatile unsigned int*)(0x42C90760UL))
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#define bFM3_ETHERNET_MAC0_MAR23H_MBC1 *((volatile unsigned int*)(0x42C90764UL))
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#define bFM3_ETHERNET_MAC0_MAR23H_MBC2 *((volatile unsigned int*)(0x42C90768UL))
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#define bFM3_ETHERNET_MAC0_MAR23H_MBC3 *((volatile unsigned int*)(0x42C9076CUL))
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#define bFM3_ETHERNET_MAC0_MAR23H_MBC4 *((volatile unsigned int*)(0x42C90770UL))
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#define bFM3_ETHERNET_MAC0_MAR23H_MBC5 *((volatile unsigned int*)(0x42C90774UL))
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#define bFM3_ETHERNET_MAC0_MAR23H_SA *((volatile unsigned int*)(0x42C90778UL))
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#define bFM3_ETHERNET_MAC0_MAR23H_AE *((volatile unsigned int*)(0x42C9077CUL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A0 *((volatile unsigned int*)(0x42C90780UL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A1 *((volatile unsigned int*)(0x42C90784UL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A2 *((volatile unsigned int*)(0x42C90788UL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A3 *((volatile unsigned int*)(0x42C9078CUL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A4 *((volatile unsigned int*)(0x42C90790UL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A5 *((volatile unsigned int*)(0x42C90794UL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A6 *((volatile unsigned int*)(0x42C90798UL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A7 *((volatile unsigned int*)(0x42C9079CUL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A8 *((volatile unsigned int*)(0x42C907A0UL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A9 *((volatile unsigned int*)(0x42C907A4UL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A10 *((volatile unsigned int*)(0x42C907A8UL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A11 *((volatile unsigned int*)(0x42C907ACUL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A12 *((volatile unsigned int*)(0x42C907B0UL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A13 *((volatile unsigned int*)(0x42C907B4UL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A14 *((volatile unsigned int*)(0x42C907B8UL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A15 *((volatile unsigned int*)(0x42C907BCUL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A16 *((volatile unsigned int*)(0x42C907C0UL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A17 *((volatile unsigned int*)(0x42C907C4UL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A18 *((volatile unsigned int*)(0x42C907C8UL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A19 *((volatile unsigned int*)(0x42C907CCUL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A20 *((volatile unsigned int*)(0x42C907D0UL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A21 *((volatile unsigned int*)(0x42C907D4UL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A22 *((volatile unsigned int*)(0x42C907D8UL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A23 *((volatile unsigned int*)(0x42C907DCUL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A24 *((volatile unsigned int*)(0x42C907E0UL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A25 *((volatile unsigned int*)(0x42C907E4UL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A26 *((volatile unsigned int*)(0x42C907E8UL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A27 *((volatile unsigned int*)(0x42C907ECUL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A28 *((volatile unsigned int*)(0x42C907F0UL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A29 *((volatile unsigned int*)(0x42C907F4UL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A30 *((volatile unsigned int*)(0x42C907F8UL))
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#define bFM3_ETHERNET_MAC0_MAR23L_A31 *((volatile unsigned int*)(0x42C907FCUL))
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#define bFM3_ETHERNET_MAC0_MAR24H_A32 *((volatile unsigned int*)(0x42C90800UL))
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#define bFM3_ETHERNET_MAC0_MAR24H_A33 *((volatile unsigned int*)(0x42C90804UL))
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#define bFM3_ETHERNET_MAC0_MAR24H_A34 *((volatile unsigned int*)(0x42C90808UL))
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#define bFM3_ETHERNET_MAC0_MAR24H_A35 *((volatile unsigned int*)(0x42C9080CUL))
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#define bFM3_ETHERNET_MAC0_MAR24H_A36 *((volatile unsigned int*)(0x42C90810UL))
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#define bFM3_ETHERNET_MAC0_MAR24H_A37 *((volatile unsigned int*)(0x42C90814UL))
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#define bFM3_ETHERNET_MAC0_MAR24H_A38 *((volatile unsigned int*)(0x42C90818UL))
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#define bFM3_ETHERNET_MAC0_MAR24H_A39 *((volatile unsigned int*)(0x42C9081CUL))
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#define bFM3_ETHERNET_MAC0_MAR24H_A40 *((volatile unsigned int*)(0x42C90820UL))
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#define bFM3_ETHERNET_MAC0_MAR24H_A41 *((volatile unsigned int*)(0x42C90824UL))
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#define bFM3_ETHERNET_MAC0_MAR24H_A42 *((volatile unsigned int*)(0x42C90828UL))
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#define bFM3_ETHERNET_MAC0_MAR24H_A43 *((volatile unsigned int*)(0x42C9082CUL))
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#define bFM3_ETHERNET_MAC0_MAR24H_A44 *((volatile unsigned int*)(0x42C90830UL))
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#define bFM3_ETHERNET_MAC0_MAR24H_A45 *((volatile unsigned int*)(0x42C90834UL))
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#define bFM3_ETHERNET_MAC0_MAR24H_A46 *((volatile unsigned int*)(0x42C90838UL))
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#define bFM3_ETHERNET_MAC0_MAR24H_A47 *((volatile unsigned int*)(0x42C9083CUL))
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#define bFM3_ETHERNET_MAC0_MAR24H_MBC0 *((volatile unsigned int*)(0x42C90860UL))
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|
#define bFM3_ETHERNET_MAC0_MAR24H_MBC1 *((volatile unsigned int*)(0x42C90864UL))
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#define bFM3_ETHERNET_MAC0_MAR24H_MBC2 *((volatile unsigned int*)(0x42C90868UL))
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#define bFM3_ETHERNET_MAC0_MAR24H_MBC3 *((volatile unsigned int*)(0x42C9086CUL))
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#define bFM3_ETHERNET_MAC0_MAR24H_MBC4 *((volatile unsigned int*)(0x42C90870UL))
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|
#define bFM3_ETHERNET_MAC0_MAR24H_MBC5 *((volatile unsigned int*)(0x42C90874UL))
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#define bFM3_ETHERNET_MAC0_MAR24H_SA *((volatile unsigned int*)(0x42C90878UL))
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|
#define bFM3_ETHERNET_MAC0_MAR24H_AE *((volatile unsigned int*)(0x42C9087CUL))
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|
#define bFM3_ETHERNET_MAC0_MAR24L_A0 *((volatile unsigned int*)(0x42C90880UL))
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|
#define bFM3_ETHERNET_MAC0_MAR24L_A1 *((volatile unsigned int*)(0x42C90884UL))
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|
#define bFM3_ETHERNET_MAC0_MAR24L_A2 *((volatile unsigned int*)(0x42C90888UL))
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|
#define bFM3_ETHERNET_MAC0_MAR24L_A3 *((volatile unsigned int*)(0x42C9088CUL))
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|
#define bFM3_ETHERNET_MAC0_MAR24L_A4 *((volatile unsigned int*)(0x42C90890UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR24L_A5 *((volatile unsigned int*)(0x42C90894UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR24L_A6 *((volatile unsigned int*)(0x42C90898UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR24L_A7 *((volatile unsigned int*)(0x42C9089CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR24L_A8 *((volatile unsigned int*)(0x42C908A0UL))
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|
#define bFM3_ETHERNET_MAC0_MAR24L_A9 *((volatile unsigned int*)(0x42C908A4UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR24L_A10 *((volatile unsigned int*)(0x42C908A8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR24L_A11 *((volatile unsigned int*)(0x42C908ACUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR24L_A12 *((volatile unsigned int*)(0x42C908B0UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR24L_A13 *((volatile unsigned int*)(0x42C908B4UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR24L_A14 *((volatile unsigned int*)(0x42C908B8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR24L_A15 *((volatile unsigned int*)(0x42C908BCUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR24L_A16 *((volatile unsigned int*)(0x42C908C0UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR24L_A17 *((volatile unsigned int*)(0x42C908C4UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR24L_A18 *((volatile unsigned int*)(0x42C908C8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR24L_A19 *((volatile unsigned int*)(0x42C908CCUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR24L_A20 *((volatile unsigned int*)(0x42C908D0UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR24L_A21 *((volatile unsigned int*)(0x42C908D4UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR24L_A22 *((volatile unsigned int*)(0x42C908D8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR24L_A23 *((volatile unsigned int*)(0x42C908DCUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR24L_A24 *((volatile unsigned int*)(0x42C908E0UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR24L_A25 *((volatile unsigned int*)(0x42C908E4UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR24L_A26 *((volatile unsigned int*)(0x42C908E8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR24L_A27 *((volatile unsigned int*)(0x42C908ECUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR24L_A28 *((volatile unsigned int*)(0x42C908F0UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR24L_A29 *((volatile unsigned int*)(0x42C908F4UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR24L_A30 *((volatile unsigned int*)(0x42C908F8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR24L_A31 *((volatile unsigned int*)(0x42C908FCUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR25H_A32 *((volatile unsigned int*)(0x42C90900UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR25H_A33 *((volatile unsigned int*)(0x42C90904UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR25H_A34 *((volatile unsigned int*)(0x42C90908UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR25H_A35 *((volatile unsigned int*)(0x42C9090CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR25H_A36 *((volatile unsigned int*)(0x42C90910UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR25H_A37 *((volatile unsigned int*)(0x42C90914UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR25H_A38 *((volatile unsigned int*)(0x42C90918UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR25H_A39 *((volatile unsigned int*)(0x42C9091CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR25H_A40 *((volatile unsigned int*)(0x42C90920UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR25H_A41 *((volatile unsigned int*)(0x42C90924UL))
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#define bFM3_ETHERNET_MAC0_MAR25H_A42 *((volatile unsigned int*)(0x42C90928UL))
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#define bFM3_ETHERNET_MAC0_MAR25H_A43 *((volatile unsigned int*)(0x42C9092CUL))
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#define bFM3_ETHERNET_MAC0_MAR25H_A44 *((volatile unsigned int*)(0x42C90930UL))
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#define bFM3_ETHERNET_MAC0_MAR25H_A45 *((volatile unsigned int*)(0x42C90934UL))
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#define bFM3_ETHERNET_MAC0_MAR25H_A46 *((volatile unsigned int*)(0x42C90938UL))
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#define bFM3_ETHERNET_MAC0_MAR25H_A47 *((volatile unsigned int*)(0x42C9093CUL))
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#define bFM3_ETHERNET_MAC0_MAR25H_MBC0 *((volatile unsigned int*)(0x42C90960UL))
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#define bFM3_ETHERNET_MAC0_MAR25H_MBC1 *((volatile unsigned int*)(0x42C90964UL))
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#define bFM3_ETHERNET_MAC0_MAR25H_MBC2 *((volatile unsigned int*)(0x42C90968UL))
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#define bFM3_ETHERNET_MAC0_MAR25H_MBC3 *((volatile unsigned int*)(0x42C9096CUL))
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#define bFM3_ETHERNET_MAC0_MAR25H_MBC4 *((volatile unsigned int*)(0x42C90970UL))
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#define bFM3_ETHERNET_MAC0_MAR25H_MBC5 *((volatile unsigned int*)(0x42C90974UL))
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#define bFM3_ETHERNET_MAC0_MAR25H_SA *((volatile unsigned int*)(0x42C90978UL))
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#define bFM3_ETHERNET_MAC0_MAR25H_AE *((volatile unsigned int*)(0x42C9097CUL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A0 *((volatile unsigned int*)(0x42C90980UL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A1 *((volatile unsigned int*)(0x42C90984UL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A2 *((volatile unsigned int*)(0x42C90988UL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A3 *((volatile unsigned int*)(0x42C9098CUL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A4 *((volatile unsigned int*)(0x42C90990UL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A5 *((volatile unsigned int*)(0x42C90994UL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A6 *((volatile unsigned int*)(0x42C90998UL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A7 *((volatile unsigned int*)(0x42C9099CUL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A8 *((volatile unsigned int*)(0x42C909A0UL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A9 *((volatile unsigned int*)(0x42C909A4UL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A10 *((volatile unsigned int*)(0x42C909A8UL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A11 *((volatile unsigned int*)(0x42C909ACUL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A12 *((volatile unsigned int*)(0x42C909B0UL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A13 *((volatile unsigned int*)(0x42C909B4UL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A14 *((volatile unsigned int*)(0x42C909B8UL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A15 *((volatile unsigned int*)(0x42C909BCUL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A16 *((volatile unsigned int*)(0x42C909C0UL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A17 *((volatile unsigned int*)(0x42C909C4UL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A18 *((volatile unsigned int*)(0x42C909C8UL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A19 *((volatile unsigned int*)(0x42C909CCUL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A20 *((volatile unsigned int*)(0x42C909D0UL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A21 *((volatile unsigned int*)(0x42C909D4UL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A22 *((volatile unsigned int*)(0x42C909D8UL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A23 *((volatile unsigned int*)(0x42C909DCUL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A24 *((volatile unsigned int*)(0x42C909E0UL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A25 *((volatile unsigned int*)(0x42C909E4UL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A26 *((volatile unsigned int*)(0x42C909E8UL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A27 *((volatile unsigned int*)(0x42C909ECUL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A28 *((volatile unsigned int*)(0x42C909F0UL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A29 *((volatile unsigned int*)(0x42C909F4UL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A30 *((volatile unsigned int*)(0x42C909F8UL))
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#define bFM3_ETHERNET_MAC0_MAR25L_A31 *((volatile unsigned int*)(0x42C909FCUL))
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#define bFM3_ETHERNET_MAC0_MAR26H_A32 *((volatile unsigned int*)(0x42C90A00UL))
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#define bFM3_ETHERNET_MAC0_MAR26H_A33 *((volatile unsigned int*)(0x42C90A04UL))
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#define bFM3_ETHERNET_MAC0_MAR26H_A34 *((volatile unsigned int*)(0x42C90A08UL))
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#define bFM3_ETHERNET_MAC0_MAR26H_A35 *((volatile unsigned int*)(0x42C90A0CUL))
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#define bFM3_ETHERNET_MAC0_MAR26H_A36 *((volatile unsigned int*)(0x42C90A10UL))
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#define bFM3_ETHERNET_MAC0_MAR26H_A37 *((volatile unsigned int*)(0x42C90A14UL))
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#define bFM3_ETHERNET_MAC0_MAR26H_A38 *((volatile unsigned int*)(0x42C90A18UL))
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#define bFM3_ETHERNET_MAC0_MAR26H_A39 *((volatile unsigned int*)(0x42C90A1CUL))
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#define bFM3_ETHERNET_MAC0_MAR26H_A40 *((volatile unsigned int*)(0x42C90A20UL))
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#define bFM3_ETHERNET_MAC0_MAR26H_A41 *((volatile unsigned int*)(0x42C90A24UL))
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#define bFM3_ETHERNET_MAC0_MAR26H_A42 *((volatile unsigned int*)(0x42C90A28UL))
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#define bFM3_ETHERNET_MAC0_MAR26H_A43 *((volatile unsigned int*)(0x42C90A2CUL))
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#define bFM3_ETHERNET_MAC0_MAR26H_A44 *((volatile unsigned int*)(0x42C90A30UL))
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#define bFM3_ETHERNET_MAC0_MAR26H_A45 *((volatile unsigned int*)(0x42C90A34UL))
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#define bFM3_ETHERNET_MAC0_MAR26H_A46 *((volatile unsigned int*)(0x42C90A38UL))
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#define bFM3_ETHERNET_MAC0_MAR26H_A47 *((volatile unsigned int*)(0x42C90A3CUL))
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#define bFM3_ETHERNET_MAC0_MAR26H_MBC0 *((volatile unsigned int*)(0x42C90A60UL))
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#define bFM3_ETHERNET_MAC0_MAR26H_MBC1 *((volatile unsigned int*)(0x42C90A64UL))
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#define bFM3_ETHERNET_MAC0_MAR26H_MBC2 *((volatile unsigned int*)(0x42C90A68UL))
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#define bFM3_ETHERNET_MAC0_MAR26H_MBC3 *((volatile unsigned int*)(0x42C90A6CUL))
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#define bFM3_ETHERNET_MAC0_MAR26H_MBC4 *((volatile unsigned int*)(0x42C90A70UL))
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#define bFM3_ETHERNET_MAC0_MAR26H_MBC5 *((volatile unsigned int*)(0x42C90A74UL))
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#define bFM3_ETHERNET_MAC0_MAR26H_SA *((volatile unsigned int*)(0x42C90A78UL))
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#define bFM3_ETHERNET_MAC0_MAR26H_AE *((volatile unsigned int*)(0x42C90A7CUL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A0 *((volatile unsigned int*)(0x42C90A80UL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A1 *((volatile unsigned int*)(0x42C90A84UL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A2 *((volatile unsigned int*)(0x42C90A88UL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A3 *((volatile unsigned int*)(0x42C90A8CUL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A4 *((volatile unsigned int*)(0x42C90A90UL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A5 *((volatile unsigned int*)(0x42C90A94UL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A6 *((volatile unsigned int*)(0x42C90A98UL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A7 *((volatile unsigned int*)(0x42C90A9CUL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A8 *((volatile unsigned int*)(0x42C90AA0UL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A9 *((volatile unsigned int*)(0x42C90AA4UL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A10 *((volatile unsigned int*)(0x42C90AA8UL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A11 *((volatile unsigned int*)(0x42C90AACUL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A12 *((volatile unsigned int*)(0x42C90AB0UL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A13 *((volatile unsigned int*)(0x42C90AB4UL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A14 *((volatile unsigned int*)(0x42C90AB8UL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A15 *((volatile unsigned int*)(0x42C90ABCUL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A16 *((volatile unsigned int*)(0x42C90AC0UL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A17 *((volatile unsigned int*)(0x42C90AC4UL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A18 *((volatile unsigned int*)(0x42C90AC8UL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A19 *((volatile unsigned int*)(0x42C90ACCUL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A20 *((volatile unsigned int*)(0x42C90AD0UL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A21 *((volatile unsigned int*)(0x42C90AD4UL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A22 *((volatile unsigned int*)(0x42C90AD8UL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A23 *((volatile unsigned int*)(0x42C90ADCUL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A24 *((volatile unsigned int*)(0x42C90AE0UL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A25 *((volatile unsigned int*)(0x42C90AE4UL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A26 *((volatile unsigned int*)(0x42C90AE8UL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A27 *((volatile unsigned int*)(0x42C90AECUL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A28 *((volatile unsigned int*)(0x42C90AF0UL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A29 *((volatile unsigned int*)(0x42C90AF4UL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A30 *((volatile unsigned int*)(0x42C90AF8UL))
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#define bFM3_ETHERNET_MAC0_MAR26L_A31 *((volatile unsigned int*)(0x42C90AFCUL))
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#define bFM3_ETHERNET_MAC0_MAR27H_A32 *((volatile unsigned int*)(0x42C90B00UL))
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#define bFM3_ETHERNET_MAC0_MAR27H_A33 *((volatile unsigned int*)(0x42C90B04UL))
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#define bFM3_ETHERNET_MAC0_MAR27H_A34 *((volatile unsigned int*)(0x42C90B08UL))
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#define bFM3_ETHERNET_MAC0_MAR27H_A35 *((volatile unsigned int*)(0x42C90B0CUL))
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#define bFM3_ETHERNET_MAC0_MAR27H_A36 *((volatile unsigned int*)(0x42C90B10UL))
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#define bFM3_ETHERNET_MAC0_MAR27H_A37 *((volatile unsigned int*)(0x42C90B14UL))
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#define bFM3_ETHERNET_MAC0_MAR27H_A38 *((volatile unsigned int*)(0x42C90B18UL))
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#define bFM3_ETHERNET_MAC0_MAR27H_A39 *((volatile unsigned int*)(0x42C90B1CUL))
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#define bFM3_ETHERNET_MAC0_MAR27H_A40 *((volatile unsigned int*)(0x42C90B20UL))
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#define bFM3_ETHERNET_MAC0_MAR27H_A41 *((volatile unsigned int*)(0x42C90B24UL))
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#define bFM3_ETHERNET_MAC0_MAR27H_A42 *((volatile unsigned int*)(0x42C90B28UL))
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#define bFM3_ETHERNET_MAC0_MAR27H_A43 *((volatile unsigned int*)(0x42C90B2CUL))
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#define bFM3_ETHERNET_MAC0_MAR27H_A44 *((volatile unsigned int*)(0x42C90B30UL))
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#define bFM3_ETHERNET_MAC0_MAR27H_A45 *((volatile unsigned int*)(0x42C90B34UL))
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#define bFM3_ETHERNET_MAC0_MAR27H_A46 *((volatile unsigned int*)(0x42C90B38UL))
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#define bFM3_ETHERNET_MAC0_MAR27H_A47 *((volatile unsigned int*)(0x42C90B3CUL))
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#define bFM3_ETHERNET_MAC0_MAR27H_MBC0 *((volatile unsigned int*)(0x42C90B60UL))
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#define bFM3_ETHERNET_MAC0_MAR27H_MBC1 *((volatile unsigned int*)(0x42C90B64UL))
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#define bFM3_ETHERNET_MAC0_MAR27H_MBC2 *((volatile unsigned int*)(0x42C90B68UL))
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#define bFM3_ETHERNET_MAC0_MAR27H_MBC3 *((volatile unsigned int*)(0x42C90B6CUL))
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#define bFM3_ETHERNET_MAC0_MAR27H_MBC4 *((volatile unsigned int*)(0x42C90B70UL))
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#define bFM3_ETHERNET_MAC0_MAR27H_MBC5 *((volatile unsigned int*)(0x42C90B74UL))
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#define bFM3_ETHERNET_MAC0_MAR27H_SA *((volatile unsigned int*)(0x42C90B78UL))
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#define bFM3_ETHERNET_MAC0_MAR27H_AE *((volatile unsigned int*)(0x42C90B7CUL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A0 *((volatile unsigned int*)(0x42C90B80UL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A1 *((volatile unsigned int*)(0x42C90B84UL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A2 *((volatile unsigned int*)(0x42C90B88UL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A3 *((volatile unsigned int*)(0x42C90B8CUL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A4 *((volatile unsigned int*)(0x42C90B90UL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A5 *((volatile unsigned int*)(0x42C90B94UL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A6 *((volatile unsigned int*)(0x42C90B98UL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A7 *((volatile unsigned int*)(0x42C90B9CUL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A8 *((volatile unsigned int*)(0x42C90BA0UL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A9 *((volatile unsigned int*)(0x42C90BA4UL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A10 *((volatile unsigned int*)(0x42C90BA8UL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A11 *((volatile unsigned int*)(0x42C90BACUL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A12 *((volatile unsigned int*)(0x42C90BB0UL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A13 *((volatile unsigned int*)(0x42C90BB4UL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A14 *((volatile unsigned int*)(0x42C90BB8UL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A15 *((volatile unsigned int*)(0x42C90BBCUL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A16 *((volatile unsigned int*)(0x42C90BC0UL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A17 *((volatile unsigned int*)(0x42C90BC4UL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A18 *((volatile unsigned int*)(0x42C90BC8UL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A19 *((volatile unsigned int*)(0x42C90BCCUL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A20 *((volatile unsigned int*)(0x42C90BD0UL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A21 *((volatile unsigned int*)(0x42C90BD4UL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A22 *((volatile unsigned int*)(0x42C90BD8UL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A23 *((volatile unsigned int*)(0x42C90BDCUL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A24 *((volatile unsigned int*)(0x42C90BE0UL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A25 *((volatile unsigned int*)(0x42C90BE4UL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A26 *((volatile unsigned int*)(0x42C90BE8UL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A27 *((volatile unsigned int*)(0x42C90BECUL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A28 *((volatile unsigned int*)(0x42C90BF0UL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A29 *((volatile unsigned int*)(0x42C90BF4UL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A30 *((volatile unsigned int*)(0x42C90BF8UL))
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#define bFM3_ETHERNET_MAC0_MAR27L_A31 *((volatile unsigned int*)(0x42C90BFCUL))
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#define bFM3_ETHERNET_MAC0_MAR28H_A32 *((volatile unsigned int*)(0x42C90C00UL))
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#define bFM3_ETHERNET_MAC0_MAR28H_A33 *((volatile unsigned int*)(0x42C90C04UL))
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#define bFM3_ETHERNET_MAC0_MAR28H_A34 *((volatile unsigned int*)(0x42C90C08UL))
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#define bFM3_ETHERNET_MAC0_MAR28H_A35 *((volatile unsigned int*)(0x42C90C0CUL))
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#define bFM3_ETHERNET_MAC0_MAR28H_A36 *((volatile unsigned int*)(0x42C90C10UL))
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#define bFM3_ETHERNET_MAC0_MAR28H_A37 *((volatile unsigned int*)(0x42C90C14UL))
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#define bFM3_ETHERNET_MAC0_MAR28H_A38 *((volatile unsigned int*)(0x42C90C18UL))
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#define bFM3_ETHERNET_MAC0_MAR28H_A39 *((volatile unsigned int*)(0x42C90C1CUL))
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#define bFM3_ETHERNET_MAC0_MAR28H_A40 *((volatile unsigned int*)(0x42C90C20UL))
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|
#define bFM3_ETHERNET_MAC0_MAR28H_A41 *((volatile unsigned int*)(0x42C90C24UL))
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|
#define bFM3_ETHERNET_MAC0_MAR28H_A42 *((volatile unsigned int*)(0x42C90C28UL))
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#define bFM3_ETHERNET_MAC0_MAR28H_A43 *((volatile unsigned int*)(0x42C90C2CUL))
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#define bFM3_ETHERNET_MAC0_MAR28H_A44 *((volatile unsigned int*)(0x42C90C30UL))
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|
#define bFM3_ETHERNET_MAC0_MAR28H_A45 *((volatile unsigned int*)(0x42C90C34UL))
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|
#define bFM3_ETHERNET_MAC0_MAR28H_A46 *((volatile unsigned int*)(0x42C90C38UL))
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|
#define bFM3_ETHERNET_MAC0_MAR28H_A47 *((volatile unsigned int*)(0x42C90C3CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR28H_MBC0 *((volatile unsigned int*)(0x42C90C60UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR28H_MBC1 *((volatile unsigned int*)(0x42C90C64UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR28H_MBC2 *((volatile unsigned int*)(0x42C90C68UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR28H_MBC3 *((volatile unsigned int*)(0x42C90C6CUL))
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|
#define bFM3_ETHERNET_MAC0_MAR28H_MBC4 *((volatile unsigned int*)(0x42C90C70UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR28H_MBC5 *((volatile unsigned int*)(0x42C90C74UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR28H_SA *((volatile unsigned int*)(0x42C90C78UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR28H_AE *((volatile unsigned int*)(0x42C90C7CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR28L_A0 *((volatile unsigned int*)(0x42C90C80UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR28L_A1 *((volatile unsigned int*)(0x42C90C84UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR28L_A2 *((volatile unsigned int*)(0x42C90C88UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR28L_A3 *((volatile unsigned int*)(0x42C90C8CUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR28L_A4 *((volatile unsigned int*)(0x42C90C90UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR28L_A5 *((volatile unsigned int*)(0x42C90C94UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR28L_A6 *((volatile unsigned int*)(0x42C90C98UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR28L_A7 *((volatile unsigned int*)(0x42C90C9CUL))
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#define bFM3_ETHERNET_MAC0_MAR28L_A8 *((volatile unsigned int*)(0x42C90CA0UL))
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#define bFM3_ETHERNET_MAC0_MAR28L_A9 *((volatile unsigned int*)(0x42C90CA4UL))
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#define bFM3_ETHERNET_MAC0_MAR28L_A10 *((volatile unsigned int*)(0x42C90CA8UL))
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#define bFM3_ETHERNET_MAC0_MAR28L_A11 *((volatile unsigned int*)(0x42C90CACUL))
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#define bFM3_ETHERNET_MAC0_MAR28L_A12 *((volatile unsigned int*)(0x42C90CB0UL))
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#define bFM3_ETHERNET_MAC0_MAR28L_A13 *((volatile unsigned int*)(0x42C90CB4UL))
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#define bFM3_ETHERNET_MAC0_MAR28L_A14 *((volatile unsigned int*)(0x42C90CB8UL))
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#define bFM3_ETHERNET_MAC0_MAR28L_A15 *((volatile unsigned int*)(0x42C90CBCUL))
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#define bFM3_ETHERNET_MAC0_MAR28L_A16 *((volatile unsigned int*)(0x42C90CC0UL))
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#define bFM3_ETHERNET_MAC0_MAR28L_A17 *((volatile unsigned int*)(0x42C90CC4UL))
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#define bFM3_ETHERNET_MAC0_MAR28L_A18 *((volatile unsigned int*)(0x42C90CC8UL))
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#define bFM3_ETHERNET_MAC0_MAR28L_A19 *((volatile unsigned int*)(0x42C90CCCUL))
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#define bFM3_ETHERNET_MAC0_MAR28L_A20 *((volatile unsigned int*)(0x42C90CD0UL))
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#define bFM3_ETHERNET_MAC0_MAR28L_A21 *((volatile unsigned int*)(0x42C90CD4UL))
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#define bFM3_ETHERNET_MAC0_MAR28L_A22 *((volatile unsigned int*)(0x42C90CD8UL))
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#define bFM3_ETHERNET_MAC0_MAR28L_A23 *((volatile unsigned int*)(0x42C90CDCUL))
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#define bFM3_ETHERNET_MAC0_MAR28L_A24 *((volatile unsigned int*)(0x42C90CE0UL))
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#define bFM3_ETHERNET_MAC0_MAR28L_A25 *((volatile unsigned int*)(0x42C90CE4UL))
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#define bFM3_ETHERNET_MAC0_MAR28L_A26 *((volatile unsigned int*)(0x42C90CE8UL))
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#define bFM3_ETHERNET_MAC0_MAR28L_A27 *((volatile unsigned int*)(0x42C90CECUL))
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#define bFM3_ETHERNET_MAC0_MAR28L_A28 *((volatile unsigned int*)(0x42C90CF0UL))
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#define bFM3_ETHERNET_MAC0_MAR28L_A29 *((volatile unsigned int*)(0x42C90CF4UL))
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#define bFM3_ETHERNET_MAC0_MAR28L_A30 *((volatile unsigned int*)(0x42C90CF8UL))
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#define bFM3_ETHERNET_MAC0_MAR28L_A31 *((volatile unsigned int*)(0x42C90CFCUL))
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#define bFM3_ETHERNET_MAC0_MAR29H_A32 *((volatile unsigned int*)(0x42C90D00UL))
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#define bFM3_ETHERNET_MAC0_MAR29H_A33 *((volatile unsigned int*)(0x42C90D04UL))
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#define bFM3_ETHERNET_MAC0_MAR29H_A34 *((volatile unsigned int*)(0x42C90D08UL))
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#define bFM3_ETHERNET_MAC0_MAR29H_A35 *((volatile unsigned int*)(0x42C90D0CUL))
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#define bFM3_ETHERNET_MAC0_MAR29H_A36 *((volatile unsigned int*)(0x42C90D10UL))
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#define bFM3_ETHERNET_MAC0_MAR29H_A37 *((volatile unsigned int*)(0x42C90D14UL))
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#define bFM3_ETHERNET_MAC0_MAR29H_A38 *((volatile unsigned int*)(0x42C90D18UL))
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#define bFM3_ETHERNET_MAC0_MAR29H_A39 *((volatile unsigned int*)(0x42C90D1CUL))
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#define bFM3_ETHERNET_MAC0_MAR29H_A40 *((volatile unsigned int*)(0x42C90D20UL))
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#define bFM3_ETHERNET_MAC0_MAR29H_A41 *((volatile unsigned int*)(0x42C90D24UL))
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#define bFM3_ETHERNET_MAC0_MAR29H_A42 *((volatile unsigned int*)(0x42C90D28UL))
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#define bFM3_ETHERNET_MAC0_MAR29H_A43 *((volatile unsigned int*)(0x42C90D2CUL))
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#define bFM3_ETHERNET_MAC0_MAR29H_A44 *((volatile unsigned int*)(0x42C90D30UL))
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#define bFM3_ETHERNET_MAC0_MAR29H_A45 *((volatile unsigned int*)(0x42C90D34UL))
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#define bFM3_ETHERNET_MAC0_MAR29H_A46 *((volatile unsigned int*)(0x42C90D38UL))
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#define bFM3_ETHERNET_MAC0_MAR29H_A47 *((volatile unsigned int*)(0x42C90D3CUL))
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#define bFM3_ETHERNET_MAC0_MAR29H_MBC0 *((volatile unsigned int*)(0x42C90D60UL))
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#define bFM3_ETHERNET_MAC0_MAR29H_MBC1 *((volatile unsigned int*)(0x42C90D64UL))
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#define bFM3_ETHERNET_MAC0_MAR29H_MBC2 *((volatile unsigned int*)(0x42C90D68UL))
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#define bFM3_ETHERNET_MAC0_MAR29H_MBC3 *((volatile unsigned int*)(0x42C90D6CUL))
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#define bFM3_ETHERNET_MAC0_MAR29H_MBC4 *((volatile unsigned int*)(0x42C90D70UL))
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#define bFM3_ETHERNET_MAC0_MAR29H_MBC5 *((volatile unsigned int*)(0x42C90D74UL))
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#define bFM3_ETHERNET_MAC0_MAR29H_SA *((volatile unsigned int*)(0x42C90D78UL))
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#define bFM3_ETHERNET_MAC0_MAR29H_AE *((volatile unsigned int*)(0x42C90D7CUL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A0 *((volatile unsigned int*)(0x42C90D80UL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A1 *((volatile unsigned int*)(0x42C90D84UL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A2 *((volatile unsigned int*)(0x42C90D88UL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A3 *((volatile unsigned int*)(0x42C90D8CUL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A4 *((volatile unsigned int*)(0x42C90D90UL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A5 *((volatile unsigned int*)(0x42C90D94UL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A6 *((volatile unsigned int*)(0x42C90D98UL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A7 *((volatile unsigned int*)(0x42C90D9CUL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A8 *((volatile unsigned int*)(0x42C90DA0UL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A9 *((volatile unsigned int*)(0x42C90DA4UL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A10 *((volatile unsigned int*)(0x42C90DA8UL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A11 *((volatile unsigned int*)(0x42C90DACUL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A12 *((volatile unsigned int*)(0x42C90DB0UL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A13 *((volatile unsigned int*)(0x42C90DB4UL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A14 *((volatile unsigned int*)(0x42C90DB8UL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A15 *((volatile unsigned int*)(0x42C90DBCUL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A16 *((volatile unsigned int*)(0x42C90DC0UL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A17 *((volatile unsigned int*)(0x42C90DC4UL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A18 *((volatile unsigned int*)(0x42C90DC8UL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A19 *((volatile unsigned int*)(0x42C90DCCUL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A20 *((volatile unsigned int*)(0x42C90DD0UL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A21 *((volatile unsigned int*)(0x42C90DD4UL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A22 *((volatile unsigned int*)(0x42C90DD8UL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A23 *((volatile unsigned int*)(0x42C90DDCUL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A24 *((volatile unsigned int*)(0x42C90DE0UL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A25 *((volatile unsigned int*)(0x42C90DE4UL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A26 *((volatile unsigned int*)(0x42C90DE8UL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A27 *((volatile unsigned int*)(0x42C90DECUL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A28 *((volatile unsigned int*)(0x42C90DF0UL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A29 *((volatile unsigned int*)(0x42C90DF4UL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A30 *((volatile unsigned int*)(0x42C90DF8UL))
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#define bFM3_ETHERNET_MAC0_MAR29L_A31 *((volatile unsigned int*)(0x42C90DFCUL))
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#define bFM3_ETHERNET_MAC0_MAR30H_A32 *((volatile unsigned int*)(0x42C90E00UL))
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#define bFM3_ETHERNET_MAC0_MAR30H_A33 *((volatile unsigned int*)(0x42C90E04UL))
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#define bFM3_ETHERNET_MAC0_MAR30H_A34 *((volatile unsigned int*)(0x42C90E08UL))
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#define bFM3_ETHERNET_MAC0_MAR30H_A35 *((volatile unsigned int*)(0x42C90E0CUL))
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#define bFM3_ETHERNET_MAC0_MAR30H_A36 *((volatile unsigned int*)(0x42C90E10UL))
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#define bFM3_ETHERNET_MAC0_MAR30H_A37 *((volatile unsigned int*)(0x42C90E14UL))
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#define bFM3_ETHERNET_MAC0_MAR30H_A38 *((volatile unsigned int*)(0x42C90E18UL))
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#define bFM3_ETHERNET_MAC0_MAR30H_A39 *((volatile unsigned int*)(0x42C90E1CUL))
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#define bFM3_ETHERNET_MAC0_MAR30H_A40 *((volatile unsigned int*)(0x42C90E20UL))
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#define bFM3_ETHERNET_MAC0_MAR30H_A41 *((volatile unsigned int*)(0x42C90E24UL))
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#define bFM3_ETHERNET_MAC0_MAR30H_A42 *((volatile unsigned int*)(0x42C90E28UL))
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#define bFM3_ETHERNET_MAC0_MAR30H_A43 *((volatile unsigned int*)(0x42C90E2CUL))
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#define bFM3_ETHERNET_MAC0_MAR30H_A44 *((volatile unsigned int*)(0x42C90E30UL))
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#define bFM3_ETHERNET_MAC0_MAR30H_A45 *((volatile unsigned int*)(0x42C90E34UL))
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#define bFM3_ETHERNET_MAC0_MAR30H_A46 *((volatile unsigned int*)(0x42C90E38UL))
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#define bFM3_ETHERNET_MAC0_MAR30H_A47 *((volatile unsigned int*)(0x42C90E3CUL))
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#define bFM3_ETHERNET_MAC0_MAR30H_MBC0 *((volatile unsigned int*)(0x42C90E60UL))
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#define bFM3_ETHERNET_MAC0_MAR30H_MBC1 *((volatile unsigned int*)(0x42C90E64UL))
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#define bFM3_ETHERNET_MAC0_MAR30H_MBC2 *((volatile unsigned int*)(0x42C90E68UL))
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#define bFM3_ETHERNET_MAC0_MAR30H_MBC3 *((volatile unsigned int*)(0x42C90E6CUL))
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#define bFM3_ETHERNET_MAC0_MAR30H_MBC4 *((volatile unsigned int*)(0x42C90E70UL))
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#define bFM3_ETHERNET_MAC0_MAR30H_MBC5 *((volatile unsigned int*)(0x42C90E74UL))
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#define bFM3_ETHERNET_MAC0_MAR30H_SA *((volatile unsigned int*)(0x42C90E78UL))
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#define bFM3_ETHERNET_MAC0_MAR30H_AE *((volatile unsigned int*)(0x42C90E7CUL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A0 *((volatile unsigned int*)(0x42C90E80UL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A1 *((volatile unsigned int*)(0x42C90E84UL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A2 *((volatile unsigned int*)(0x42C90E88UL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A3 *((volatile unsigned int*)(0x42C90E8CUL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A4 *((volatile unsigned int*)(0x42C90E90UL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A5 *((volatile unsigned int*)(0x42C90E94UL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A6 *((volatile unsigned int*)(0x42C90E98UL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A7 *((volatile unsigned int*)(0x42C90E9CUL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A8 *((volatile unsigned int*)(0x42C90EA0UL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A9 *((volatile unsigned int*)(0x42C90EA4UL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A10 *((volatile unsigned int*)(0x42C90EA8UL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A11 *((volatile unsigned int*)(0x42C90EACUL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A12 *((volatile unsigned int*)(0x42C90EB0UL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A13 *((volatile unsigned int*)(0x42C90EB4UL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A14 *((volatile unsigned int*)(0x42C90EB8UL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A15 *((volatile unsigned int*)(0x42C90EBCUL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A16 *((volatile unsigned int*)(0x42C90EC0UL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A17 *((volatile unsigned int*)(0x42C90EC4UL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A18 *((volatile unsigned int*)(0x42C90EC8UL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A19 *((volatile unsigned int*)(0x42C90ECCUL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A20 *((volatile unsigned int*)(0x42C90ED0UL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A21 *((volatile unsigned int*)(0x42C90ED4UL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A22 *((volatile unsigned int*)(0x42C90ED8UL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A23 *((volatile unsigned int*)(0x42C90EDCUL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A24 *((volatile unsigned int*)(0x42C90EE0UL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A25 *((volatile unsigned int*)(0x42C90EE4UL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A26 *((volatile unsigned int*)(0x42C90EE8UL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A27 *((volatile unsigned int*)(0x42C90EECUL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A28 *((volatile unsigned int*)(0x42C90EF0UL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A29 *((volatile unsigned int*)(0x42C90EF4UL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A30 *((volatile unsigned int*)(0x42C90EF8UL))
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#define bFM3_ETHERNET_MAC0_MAR30L_A31 *((volatile unsigned int*)(0x42C90EFCUL))
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#define bFM3_ETHERNET_MAC0_MAR31H_A32 *((volatile unsigned int*)(0x42C90F00UL))
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#define bFM3_ETHERNET_MAC0_MAR31H_A33 *((volatile unsigned int*)(0x42C90F04UL))
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#define bFM3_ETHERNET_MAC0_MAR31H_A34 *((volatile unsigned int*)(0x42C90F08UL))
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#define bFM3_ETHERNET_MAC0_MAR31H_A35 *((volatile unsigned int*)(0x42C90F0CUL))
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#define bFM3_ETHERNET_MAC0_MAR31H_A36 *((volatile unsigned int*)(0x42C90F10UL))
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#define bFM3_ETHERNET_MAC0_MAR31H_A37 *((volatile unsigned int*)(0x42C90F14UL))
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#define bFM3_ETHERNET_MAC0_MAR31H_A38 *((volatile unsigned int*)(0x42C90F18UL))
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#define bFM3_ETHERNET_MAC0_MAR31H_A39 *((volatile unsigned int*)(0x42C90F1CUL))
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#define bFM3_ETHERNET_MAC0_MAR31H_A40 *((volatile unsigned int*)(0x42C90F20UL))
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#define bFM3_ETHERNET_MAC0_MAR31H_A41 *((volatile unsigned int*)(0x42C90F24UL))
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#define bFM3_ETHERNET_MAC0_MAR31H_A42 *((volatile unsigned int*)(0x42C90F28UL))
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#define bFM3_ETHERNET_MAC0_MAR31H_A43 *((volatile unsigned int*)(0x42C90F2CUL))
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#define bFM3_ETHERNET_MAC0_MAR31H_A44 *((volatile unsigned int*)(0x42C90F30UL))
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#define bFM3_ETHERNET_MAC0_MAR31H_A45 *((volatile unsigned int*)(0x42C90F34UL))
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#define bFM3_ETHERNET_MAC0_MAR31H_A46 *((volatile unsigned int*)(0x42C90F38UL))
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#define bFM3_ETHERNET_MAC0_MAR31H_A47 *((volatile unsigned int*)(0x42C90F3CUL))
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#define bFM3_ETHERNET_MAC0_MAR31H_MBC0 *((volatile unsigned int*)(0x42C90F60UL))
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#define bFM3_ETHERNET_MAC0_MAR31H_MBC1 *((volatile unsigned int*)(0x42C90F64UL))
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#define bFM3_ETHERNET_MAC0_MAR31H_MBC2 *((volatile unsigned int*)(0x42C90F68UL))
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|
#define bFM3_ETHERNET_MAC0_MAR31H_MBC3 *((volatile unsigned int*)(0x42C90F6CUL))
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#define bFM3_ETHERNET_MAC0_MAR31H_MBC4 *((volatile unsigned int*)(0x42C90F70UL))
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#define bFM3_ETHERNET_MAC0_MAR31H_MBC5 *((volatile unsigned int*)(0x42C90F74UL))
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#define bFM3_ETHERNET_MAC0_MAR31H_SA *((volatile unsigned int*)(0x42C90F78UL))
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|
#define bFM3_ETHERNET_MAC0_MAR31H_AE *((volatile unsigned int*)(0x42C90F7CUL))
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#define bFM3_ETHERNET_MAC0_MAR31L_A0 *((volatile unsigned int*)(0x42C90F80UL))
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#define bFM3_ETHERNET_MAC0_MAR31L_A1 *((volatile unsigned int*)(0x42C90F84UL))
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#define bFM3_ETHERNET_MAC0_MAR31L_A2 *((volatile unsigned int*)(0x42C90F88UL))
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|
#define bFM3_ETHERNET_MAC0_MAR31L_A3 *((volatile unsigned int*)(0x42C90F8CUL))
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|
#define bFM3_ETHERNET_MAC0_MAR31L_A4 *((volatile unsigned int*)(0x42C90F90UL))
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|
#define bFM3_ETHERNET_MAC0_MAR31L_A5 *((volatile unsigned int*)(0x42C90F94UL))
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#define bFM3_ETHERNET_MAC0_MAR31L_A6 *((volatile unsigned int*)(0x42C90F98UL))
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|
#define bFM3_ETHERNET_MAC0_MAR31L_A7 *((volatile unsigned int*)(0x42C90F9CUL))
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|
#define bFM3_ETHERNET_MAC0_MAR31L_A8 *((volatile unsigned int*)(0x42C90FA0UL))
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|
#define bFM3_ETHERNET_MAC0_MAR31L_A9 *((volatile unsigned int*)(0x42C90FA4UL))
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#define bFM3_ETHERNET_MAC0_MAR31L_A10 *((volatile unsigned int*)(0x42C90FA8UL))
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|
#define bFM3_ETHERNET_MAC0_MAR31L_A11 *((volatile unsigned int*)(0x42C90FACUL))
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|
#define bFM3_ETHERNET_MAC0_MAR31L_A12 *((volatile unsigned int*)(0x42C90FB0UL))
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|
#define bFM3_ETHERNET_MAC0_MAR31L_A13 *((volatile unsigned int*)(0x42C90FB4UL))
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#define bFM3_ETHERNET_MAC0_MAR31L_A14 *((volatile unsigned int*)(0x42C90FB8UL))
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|
#define bFM3_ETHERNET_MAC0_MAR31L_A15 *((volatile unsigned int*)(0x42C90FBCUL))
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#define bFM3_ETHERNET_MAC0_MAR31L_A16 *((volatile unsigned int*)(0x42C90FC0UL))
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|
#define bFM3_ETHERNET_MAC0_MAR31L_A17 *((volatile unsigned int*)(0x42C90FC4UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR31L_A18 *((volatile unsigned int*)(0x42C90FC8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR31L_A19 *((volatile unsigned int*)(0x42C90FCCUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR31L_A20 *((volatile unsigned int*)(0x42C90FD0UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR31L_A21 *((volatile unsigned int*)(0x42C90FD4UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR31L_A22 *((volatile unsigned int*)(0x42C90FD8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR31L_A23 *((volatile unsigned int*)(0x42C90FDCUL))
|
|
#define bFM3_ETHERNET_MAC0_MAR31L_A24 *((volatile unsigned int*)(0x42C90FE0UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR31L_A25 *((volatile unsigned int*)(0x42C90FE4UL))
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|
#define bFM3_ETHERNET_MAC0_MAR31L_A26 *((volatile unsigned int*)(0x42C90FE8UL))
|
|
#define bFM3_ETHERNET_MAC0_MAR31L_A27 *((volatile unsigned int*)(0x42C90FECUL))
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|
#define bFM3_ETHERNET_MAC0_MAR31L_A28 *((volatile unsigned int*)(0x42C90FF0UL))
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#define bFM3_ETHERNET_MAC0_MAR31L_A29 *((volatile unsigned int*)(0x42C90FF4UL))
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#define bFM3_ETHERNET_MAC0_MAR31L_A30 *((volatile unsigned int*)(0x42C90FF8UL))
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#define bFM3_ETHERNET_MAC0_MAR31L_A31 *((volatile unsigned int*)(0x42C90FFCUL))
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#define bFM3_ETHERNET_MAC0_BMR_SWR *((volatile unsigned int*)(0x42CA0000UL))
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#define bFM3_ETHERNET_MAC0_BMR_DA *((volatile unsigned int*)(0x42CA0004UL))
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#define bFM3_ETHERNET_MAC0_BMR_DSL0 *((volatile unsigned int*)(0x42CA0008UL))
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#define bFM3_ETHERNET_MAC0_BMR_DSL1 *((volatile unsigned int*)(0x42CA000CUL))
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#define bFM3_ETHERNET_MAC0_BMR_DSL2 *((volatile unsigned int*)(0x42CA0010UL))
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#define bFM3_ETHERNET_MAC0_BMR_DSL3 *((volatile unsigned int*)(0x42CA0014UL))
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#define bFM3_ETHERNET_MAC0_BMR_DSL4 *((volatile unsigned int*)(0x42CA0018UL))
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#define bFM3_ETHERNET_MAC0_BMR_ATDS *((volatile unsigned int*)(0x42CA001CUL))
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#define bFM3_ETHERNET_MAC0_BMR_PBL0 *((volatile unsigned int*)(0x42CA0020UL))
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#define bFM3_ETHERNET_MAC0_BMR_PBL1 *((volatile unsigned int*)(0x42CA0024UL))
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#define bFM3_ETHERNET_MAC0_BMR_PBL2 *((volatile unsigned int*)(0x42CA0028UL))
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#define bFM3_ETHERNET_MAC0_BMR_PBL3 *((volatile unsigned int*)(0x42CA002CUL))
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#define bFM3_ETHERNET_MAC0_BMR_PBL4 *((volatile unsigned int*)(0x42CA0030UL))
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#define bFM3_ETHERNET_MAC0_BMR_PBL5 *((volatile unsigned int*)(0x42CA0034UL))
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#define bFM3_ETHERNET_MAC0_BMR_PR0 *((volatile unsigned int*)(0x42CA0038UL))
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#define bFM3_ETHERNET_MAC0_BMR_PR1 *((volatile unsigned int*)(0x42CA003CUL))
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#define bFM3_ETHERNET_MAC0_BMR_FB *((volatile unsigned int*)(0x42CA0040UL))
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#define bFM3_ETHERNET_MAC0_BMR_RPBL0 *((volatile unsigned int*)(0x42CA0044UL))
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#define bFM3_ETHERNET_MAC0_BMR_RPBL1 *((volatile unsigned int*)(0x42CA0048UL))
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#define bFM3_ETHERNET_MAC0_BMR_RPBL2 *((volatile unsigned int*)(0x42CA004CUL))
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#define bFM3_ETHERNET_MAC0_BMR_RPBL3 *((volatile unsigned int*)(0x42CA0050UL))
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#define bFM3_ETHERNET_MAC0_BMR_RPBL4 *((volatile unsigned int*)(0x42CA0054UL))
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#define bFM3_ETHERNET_MAC0_BMR_RPBL5 *((volatile unsigned int*)(0x42CA0058UL))
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#define bFM3_ETHERNET_MAC0_BMR_USP *((volatile unsigned int*)(0x42CA005CUL))
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#define bFM3_ETHERNET_MAC0_BMR_8XPBL *((volatile unsigned int*)(0x42CA0060UL))
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#define bFM3_ETHERNET_MAC0_BMR_AAL *((volatile unsigned int*)(0x42CA0064UL))
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#define bFM3_ETHERNET_MAC0_BMR_MB *((volatile unsigned int*)(0x42CA0068UL))
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#define bFM3_ETHERNET_MAC0_BMR_TXPR *((volatile unsigned int*)(0x42CA006CUL))
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#define bFM3_ETHERNET_MAC0_TPDR_TPD0 *((volatile unsigned int*)(0x42CA0080UL))
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#define bFM3_ETHERNET_MAC0_TPDR_TPD1 *((volatile unsigned int*)(0x42CA0084UL))
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#define bFM3_ETHERNET_MAC0_TPDR_TPD2 *((volatile unsigned int*)(0x42CA0088UL))
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#define bFM3_ETHERNET_MAC0_TPDR_TPD3 *((volatile unsigned int*)(0x42CA008CUL))
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#define bFM3_ETHERNET_MAC0_TPDR_TPD4 *((volatile unsigned int*)(0x42CA0090UL))
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#define bFM3_ETHERNET_MAC0_TPDR_TPD5 *((volatile unsigned int*)(0x42CA0094UL))
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#define bFM3_ETHERNET_MAC0_TPDR_TPD6 *((volatile unsigned int*)(0x42CA0098UL))
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#define bFM3_ETHERNET_MAC0_TPDR_TPD7 *((volatile unsigned int*)(0x42CA009CUL))
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#define bFM3_ETHERNET_MAC0_TPDR_TPD8 *((volatile unsigned int*)(0x42CA00A0UL))
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#define bFM3_ETHERNET_MAC0_TPDR_TPD9 *((volatile unsigned int*)(0x42CA00A4UL))
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#define bFM3_ETHERNET_MAC0_TPDR_TPD10 *((volatile unsigned int*)(0x42CA00A8UL))
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#define bFM3_ETHERNET_MAC0_TPDR_TPD11 *((volatile unsigned int*)(0x42CA00ACUL))
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#define bFM3_ETHERNET_MAC0_TPDR_TPD12 *((volatile unsigned int*)(0x42CA00B0UL))
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#define bFM3_ETHERNET_MAC0_TPDR_TPD13 *((volatile unsigned int*)(0x42CA00B4UL))
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#define bFM3_ETHERNET_MAC0_TPDR_TPD14 *((volatile unsigned int*)(0x42CA00B8UL))
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#define bFM3_ETHERNET_MAC0_TPDR_TPD15 *((volatile unsigned int*)(0x42CA00BCUL))
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#define bFM3_ETHERNET_MAC0_TPDR_TPD16 *((volatile unsigned int*)(0x42CA00C0UL))
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|
#define bFM3_ETHERNET_MAC0_TPDR_TPD17 *((volatile unsigned int*)(0x42CA00C4UL))
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|
#define bFM3_ETHERNET_MAC0_TPDR_TPD18 *((volatile unsigned int*)(0x42CA00C8UL))
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|
#define bFM3_ETHERNET_MAC0_TPDR_TPD19 *((volatile unsigned int*)(0x42CA00CCUL))
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|
#define bFM3_ETHERNET_MAC0_TPDR_TPD20 *((volatile unsigned int*)(0x42CA00D0UL))
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|
#define bFM3_ETHERNET_MAC0_TPDR_TPD21 *((volatile unsigned int*)(0x42CA00D4UL))
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|
#define bFM3_ETHERNET_MAC0_TPDR_TPD22 *((volatile unsigned int*)(0x42CA00D8UL))
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|
#define bFM3_ETHERNET_MAC0_TPDR_TPD23 *((volatile unsigned int*)(0x42CA00DCUL))
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|
#define bFM3_ETHERNET_MAC0_TPDR_TPD24 *((volatile unsigned int*)(0x42CA00E0UL))
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|
#define bFM3_ETHERNET_MAC0_TPDR_TPD25 *((volatile unsigned int*)(0x42CA00E4UL))
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|
#define bFM3_ETHERNET_MAC0_TPDR_TPD26 *((volatile unsigned int*)(0x42CA00E8UL))
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|
#define bFM3_ETHERNET_MAC0_TPDR_TPD27 *((volatile unsigned int*)(0x42CA00ECUL))
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|
#define bFM3_ETHERNET_MAC0_TPDR_TPD28 *((volatile unsigned int*)(0x42CA00F0UL))
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|
#define bFM3_ETHERNET_MAC0_TPDR_TPD29 *((volatile unsigned int*)(0x42CA00F4UL))
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|
#define bFM3_ETHERNET_MAC0_TPDR_TPD30 *((volatile unsigned int*)(0x42CA00F8UL))
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|
#define bFM3_ETHERNET_MAC0_TPDR_TPD31 *((volatile unsigned int*)(0x42CA00FCUL))
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#define bFM3_ETHERNET_MAC0_RPDR_RPD0 *((volatile unsigned int*)(0x42CA0100UL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD1 *((volatile unsigned int*)(0x42CA0104UL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD2 *((volatile unsigned int*)(0x42CA0108UL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD3 *((volatile unsigned int*)(0x42CA010CUL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD4 *((volatile unsigned int*)(0x42CA0110UL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD5 *((volatile unsigned int*)(0x42CA0114UL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD6 *((volatile unsigned int*)(0x42CA0118UL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD7 *((volatile unsigned int*)(0x42CA011CUL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD8 *((volatile unsigned int*)(0x42CA0120UL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD9 *((volatile unsigned int*)(0x42CA0124UL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD10 *((volatile unsigned int*)(0x42CA0128UL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD11 *((volatile unsigned int*)(0x42CA012CUL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD12 *((volatile unsigned int*)(0x42CA0130UL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD13 *((volatile unsigned int*)(0x42CA0134UL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD14 *((volatile unsigned int*)(0x42CA0138UL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD15 *((volatile unsigned int*)(0x42CA013CUL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD16 *((volatile unsigned int*)(0x42CA0140UL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD17 *((volatile unsigned int*)(0x42CA0144UL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD18 *((volatile unsigned int*)(0x42CA0148UL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD19 *((volatile unsigned int*)(0x42CA014CUL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD20 *((volatile unsigned int*)(0x42CA0150UL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD21 *((volatile unsigned int*)(0x42CA0154UL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD22 *((volatile unsigned int*)(0x42CA0158UL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD23 *((volatile unsigned int*)(0x42CA015CUL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD24 *((volatile unsigned int*)(0x42CA0160UL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD25 *((volatile unsigned int*)(0x42CA0164UL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD26 *((volatile unsigned int*)(0x42CA0168UL))
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|
#define bFM3_ETHERNET_MAC0_RPDR_RPD27 *((volatile unsigned int*)(0x42CA016CUL))
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#define bFM3_ETHERNET_MAC0_RPDR_RPD28 *((volatile unsigned int*)(0x42CA0170UL))
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#define bFM3_ETHERNET_MAC0_RPDR_RPD29 *((volatile unsigned int*)(0x42CA0174UL))
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#define bFM3_ETHERNET_MAC0_RPDR_RPD30 *((volatile unsigned int*)(0x42CA0178UL))
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#define bFM3_ETHERNET_MAC0_RPDR_RPD31 *((volatile unsigned int*)(0x42CA017CUL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL2 *((volatile unsigned int*)(0x42CA0188UL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL3 *((volatile unsigned int*)(0x42CA018CUL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL4 *((volatile unsigned int*)(0x42CA0190UL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL5 *((volatile unsigned int*)(0x42CA0194UL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL6 *((volatile unsigned int*)(0x42CA0198UL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL7 *((volatile unsigned int*)(0x42CA019CUL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL8 *((volatile unsigned int*)(0x42CA01A0UL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL9 *((volatile unsigned int*)(0x42CA01A4UL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL10 *((volatile unsigned int*)(0x42CA01A8UL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL11 *((volatile unsigned int*)(0x42CA01ACUL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL12 *((volatile unsigned int*)(0x42CA01B0UL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL13 *((volatile unsigned int*)(0x42CA01B4UL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL14 *((volatile unsigned int*)(0x42CA01B8UL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL15 *((volatile unsigned int*)(0x42CA01BCUL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL16 *((volatile unsigned int*)(0x42CA01C0UL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL17 *((volatile unsigned int*)(0x42CA01C4UL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL18 *((volatile unsigned int*)(0x42CA01C8UL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL19 *((volatile unsigned int*)(0x42CA01CCUL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL20 *((volatile unsigned int*)(0x42CA01D0UL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL21 *((volatile unsigned int*)(0x42CA01D4UL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL22 *((volatile unsigned int*)(0x42CA01D8UL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL23 *((volatile unsigned int*)(0x42CA01DCUL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL24 *((volatile unsigned int*)(0x42CA01E0UL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL25 *((volatile unsigned int*)(0x42CA01E4UL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL26 *((volatile unsigned int*)(0x42CA01E8UL))
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|
#define bFM3_ETHERNET_MAC0_RDLAR_SRL27 *((volatile unsigned int*)(0x42CA01ECUL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL28 *((volatile unsigned int*)(0x42CA01F0UL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL29 *((volatile unsigned int*)(0x42CA01F4UL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL30 *((volatile unsigned int*)(0x42CA01F8UL))
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#define bFM3_ETHERNET_MAC0_RDLAR_SRL31 *((volatile unsigned int*)(0x42CA01FCUL))
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#define bFM3_ETHERNET_MAC0_TDLAR_STL2 *((volatile unsigned int*)(0x42CA0208UL))
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#define bFM3_ETHERNET_MAC0_TDLAR_STL3 *((volatile unsigned int*)(0x42CA020CUL))
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#define bFM3_ETHERNET_MAC0_TDLAR_STL4 *((volatile unsigned int*)(0x42CA0210UL))
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#define bFM3_ETHERNET_MAC0_TDLAR_STL5 *((volatile unsigned int*)(0x42CA0214UL))
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#define bFM3_ETHERNET_MAC0_TDLAR_STL6 *((volatile unsigned int*)(0x42CA0218UL))
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#define bFM3_ETHERNET_MAC0_TDLAR_STL7 *((volatile unsigned int*)(0x42CA021CUL))
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#define bFM3_ETHERNET_MAC0_TDLAR_STL8 *((volatile unsigned int*)(0x42CA0220UL))
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#define bFM3_ETHERNET_MAC0_TDLAR_STL9 *((volatile unsigned int*)(0x42CA0224UL))
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#define bFM3_ETHERNET_MAC0_TDLAR_STL10 *((volatile unsigned int*)(0x42CA0228UL))
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#define bFM3_ETHERNET_MAC0_TDLAR_STL11 *((volatile unsigned int*)(0x42CA022CUL))
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#define bFM3_ETHERNET_MAC0_TDLAR_STL12 *((volatile unsigned int*)(0x42CA0230UL))
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#define bFM3_ETHERNET_MAC0_TDLAR_STL13 *((volatile unsigned int*)(0x42CA0234UL))
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#define bFM3_ETHERNET_MAC0_TDLAR_STL14 *((volatile unsigned int*)(0x42CA0238UL))
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#define bFM3_ETHERNET_MAC0_TDLAR_STL15 *((volatile unsigned int*)(0x42CA023CUL))
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|
#define bFM3_ETHERNET_MAC0_TDLAR_STL16 *((volatile unsigned int*)(0x42CA0240UL))
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#define bFM3_ETHERNET_MAC0_TDLAR_STL17 *((volatile unsigned int*)(0x42CA0244UL))
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#define bFM3_ETHERNET_MAC0_TDLAR_STL18 *((volatile unsigned int*)(0x42CA0248UL))
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#define bFM3_ETHERNET_MAC0_TDLAR_STL19 *((volatile unsigned int*)(0x42CA024CUL))
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|
#define bFM3_ETHERNET_MAC0_TDLAR_STL20 *((volatile unsigned int*)(0x42CA0250UL))
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|
#define bFM3_ETHERNET_MAC0_TDLAR_STL21 *((volatile unsigned int*)(0x42CA0254UL))
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|
#define bFM3_ETHERNET_MAC0_TDLAR_STL22 *((volatile unsigned int*)(0x42CA0258UL))
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#define bFM3_ETHERNET_MAC0_TDLAR_STL23 *((volatile unsigned int*)(0x42CA025CUL))
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#define bFM3_ETHERNET_MAC0_TDLAR_STL24 *((volatile unsigned int*)(0x42CA0260UL))
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|
#define bFM3_ETHERNET_MAC0_TDLAR_STL25 *((volatile unsigned int*)(0x42CA0264UL))
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#define bFM3_ETHERNET_MAC0_TDLAR_STL26 *((volatile unsigned int*)(0x42CA0268UL))
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|
#define bFM3_ETHERNET_MAC0_TDLAR_STL27 *((volatile unsigned int*)(0x42CA026CUL))
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|
#define bFM3_ETHERNET_MAC0_TDLAR_STL28 *((volatile unsigned int*)(0x42CA0270UL))
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|
#define bFM3_ETHERNET_MAC0_TDLAR_STL29 *((volatile unsigned int*)(0x42CA0274UL))
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|
#define bFM3_ETHERNET_MAC0_TDLAR_STL30 *((volatile unsigned int*)(0x42CA0278UL))
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|
#define bFM3_ETHERNET_MAC0_TDLAR_STL31 *((volatile unsigned int*)(0x42CA027CUL))
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#define bFM3_ETHERNET_MAC0_SR_TI *((volatile unsigned int*)(0x42CA0280UL))
|
|
#define bFM3_ETHERNET_MAC0_SR_TPS *((volatile unsigned int*)(0x42CA0284UL))
|
|
#define bFM3_ETHERNET_MAC0_SR_TU *((volatile unsigned int*)(0x42CA0288UL))
|
|
#define bFM3_ETHERNET_MAC0_SR_TJT *((volatile unsigned int*)(0x42CA028CUL))
|
|
#define bFM3_ETHERNET_MAC0_SR_OVF *((volatile unsigned int*)(0x42CA0290UL))
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|
#define bFM3_ETHERNET_MAC0_SR_UNF *((volatile unsigned int*)(0x42CA0294UL))
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|
#define bFM3_ETHERNET_MAC0_SR_RI *((volatile unsigned int*)(0x42CA0298UL))
|
|
#define bFM3_ETHERNET_MAC0_SR_RU *((volatile unsigned int*)(0x42CA029CUL))
|
|
#define bFM3_ETHERNET_MAC0_SR_RPS *((volatile unsigned int*)(0x42CA02A0UL))
|
|
#define bFM3_ETHERNET_MAC0_SR_RWT *((volatile unsigned int*)(0x42CA02A4UL))
|
|
#define bFM3_ETHERNET_MAC0_SR_ETI *((volatile unsigned int*)(0x42CA02A8UL))
|
|
#define bFM3_ETHERNET_MAC0_SR_FBI *((volatile unsigned int*)(0x42CA02B4UL))
|
|
#define bFM3_ETHERNET_MAC0_SR_ERI *((volatile unsigned int*)(0x42CA02B8UL))
|
|
#define bFM3_ETHERNET_MAC0_SR_AIS *((volatile unsigned int*)(0x42CA02BCUL))
|
|
#define bFM3_ETHERNET_MAC0_SR_NIS *((volatile unsigned int*)(0x42CA02C0UL))
|
|
#define bFM3_ETHERNET_MAC0_SR_RS0 *((volatile unsigned int*)(0x42CA02C4UL))
|
|
#define bFM3_ETHERNET_MAC0_SR_RS1 *((volatile unsigned int*)(0x42CA02C8UL))
|
|
#define bFM3_ETHERNET_MAC0_SR_RS2 *((volatile unsigned int*)(0x42CA02CCUL))
|
|
#define bFM3_ETHERNET_MAC0_SR_TS0 *((volatile unsigned int*)(0x42CA02D0UL))
|
|
#define bFM3_ETHERNET_MAC0_SR_TS1 *((volatile unsigned int*)(0x42CA02D4UL))
|
|
#define bFM3_ETHERNET_MAC0_SR_TS2 *((volatile unsigned int*)(0x42CA02D8UL))
|
|
#define bFM3_ETHERNET_MAC0_SR_EB0 *((volatile unsigned int*)(0x42CA02DCUL))
|
|
#define bFM3_ETHERNET_MAC0_SR_EB1 *((volatile unsigned int*)(0x42CA02E0UL))
|
|
#define bFM3_ETHERNET_MAC0_SR_EB2 *((volatile unsigned int*)(0x42CA02E4UL))
|
|
#define bFM3_ETHERNET_MAC0_SR_GLI *((volatile unsigned int*)(0x42CA02E8UL))
|
|
#define bFM3_ETHERNET_MAC0_SR_GMI *((volatile unsigned int*)(0x42CA02ECUL))
|
|
#define bFM3_ETHERNET_MAC0_SR_GPI *((volatile unsigned int*)(0x42CA02F0UL))
|
|
#define bFM3_ETHERNET_MAC0_SR_TTI *((volatile unsigned int*)(0x42CA02F4UL))
|
|
#define bFM3_ETHERNET_MAC0_SR_GLPII *((volatile unsigned int*)(0x42CA02F8UL))
|
|
#define bFM3_ETHERNET_MAC0_OMR_SR *((volatile unsigned int*)(0x42CA0304UL))
|
|
#define bFM3_ETHERNET_MAC0_OMR_OSF *((volatile unsigned int*)(0x42CA0308UL))
|
|
#define bFM3_ETHERNET_MAC0_OMR_RTC0 *((volatile unsigned int*)(0x42CA030CUL))
|
|
#define bFM3_ETHERNET_MAC0_OMR_RTC1 *((volatile unsigned int*)(0x42CA0310UL))
|
|
#define bFM3_ETHERNET_MAC0_OMR_FUF *((volatile unsigned int*)(0x42CA0318UL))
|
|
#define bFM3_ETHERNET_MAC0_OMR_FEF *((volatile unsigned int*)(0x42CA031CUL))
|
|
#define bFM3_ETHERNET_MAC0_OMR_ST *((volatile unsigned int*)(0x42CA0334UL))
|
|
#define bFM3_ETHERNET_MAC0_OMR_TTC0 *((volatile unsigned int*)(0x42CA0338UL))
|
|
#define bFM3_ETHERNET_MAC0_OMR_TTC1 *((volatile unsigned int*)(0x42CA033CUL))
|
|
#define bFM3_ETHERNET_MAC0_OMR_TTC2 *((volatile unsigned int*)(0x42CA0340UL))
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|
#define bFM3_ETHERNET_MAC0_OMR_FTF *((volatile unsigned int*)(0x42CA0350UL))
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|
#define bFM3_ETHERNET_MAC0_OMR_TSF *((volatile unsigned int*)(0x42CA0354UL))
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|
#define bFM3_ETHERNET_MAC0_OMR_DFF *((volatile unsigned int*)(0x42CA0360UL))
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|
#define bFM3_ETHERNET_MAC0_OMR_RSF *((volatile unsigned int*)(0x42CA0364UL))
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|
#define bFM3_ETHERNET_MAC0_OMR_DT *((volatile unsigned int*)(0x42CA0368UL))
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#define bFM3_ETHERNET_MAC0_IER_TIE *((volatile unsigned int*)(0x42CA0380UL))
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|
#define bFM3_ETHERNET_MAC0_IER_TSE *((volatile unsigned int*)(0x42CA0384UL))
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|
#define bFM3_ETHERNET_MAC0_IER_TUE *((volatile unsigned int*)(0x42CA0388UL))
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|
#define bFM3_ETHERNET_MAC0_IER_TJE *((volatile unsigned int*)(0x42CA038CUL))
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|
#define bFM3_ETHERNET_MAC0_IER_OVE *((volatile unsigned int*)(0x42CA0390UL))
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|
#define bFM3_ETHERNET_MAC0_IER_UNE *((volatile unsigned int*)(0x42CA0394UL))
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|
#define bFM3_ETHERNET_MAC0_IER_RIE *((volatile unsigned int*)(0x42CA0398UL))
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|
#define bFM3_ETHERNET_MAC0_IER_RUE *((volatile unsigned int*)(0x42CA039CUL))
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|
#define bFM3_ETHERNET_MAC0_IER_RSE *((volatile unsigned int*)(0x42CA03A0UL))
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|
#define bFM3_ETHERNET_MAC0_IER_RWE *((volatile unsigned int*)(0x42CA03A4UL))
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|
#define bFM3_ETHERNET_MAC0_IER_ETE *((volatile unsigned int*)(0x42CA03A8UL))
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|
#define bFM3_ETHERNET_MAC0_IER_FBE *((volatile unsigned int*)(0x42CA03B4UL))
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|
#define bFM3_ETHERNET_MAC0_IER_ERE *((volatile unsigned int*)(0x42CA03B8UL))
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|
#define bFM3_ETHERNET_MAC0_IER_AIE *((volatile unsigned int*)(0x42CA03BCUL))
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|
#define bFM3_ETHERNET_MAC0_IER_NIE *((volatile unsigned int*)(0x42CA03C0UL))
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|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFH0 *((volatile unsigned int*)(0x42CA0400UL))
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|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFH1 *((volatile unsigned int*)(0x42CA0404UL))
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|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFH2 *((volatile unsigned int*)(0x42CA0408UL))
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|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFH3 *((volatile unsigned int*)(0x42CA040CUL))
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|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFH4 *((volatile unsigned int*)(0x42CA0410UL))
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|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFH5 *((volatile unsigned int*)(0x42CA0414UL))
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|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFH6 *((volatile unsigned int*)(0x42CA0418UL))
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|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFH7 *((volatile unsigned int*)(0x42CA041CUL))
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|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFH8 *((volatile unsigned int*)(0x42CA0420UL))
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|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFH9 *((volatile unsigned int*)(0x42CA0424UL))
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|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFH10 *((volatile unsigned int*)(0x42CA0428UL))
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|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFH11 *((volatile unsigned int*)(0x42CA042CUL))
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|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFH12 *((volatile unsigned int*)(0x42CA0430UL))
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|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFH13 *((volatile unsigned int*)(0x42CA0434UL))
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|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFH14 *((volatile unsigned int*)(0x42CA0438UL))
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|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFH15 *((volatile unsigned int*)(0x42CA043CUL))
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|
#define bFM3_ETHERNET_MAC0_MFBOCR_ONMFH *((volatile unsigned int*)(0x42CA0440UL))
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|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFF0 *((volatile unsigned int*)(0x42CA0444UL))
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|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFF1 *((volatile unsigned int*)(0x42CA0448UL))
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|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFF2 *((volatile unsigned int*)(0x42CA044CUL))
|
|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFF3 *((volatile unsigned int*)(0x42CA0450UL))
|
|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFF4 *((volatile unsigned int*)(0x42CA0454UL))
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|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFF5 *((volatile unsigned int*)(0x42CA0458UL))
|
|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFF6 *((volatile unsigned int*)(0x42CA045CUL))
|
|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFF7 *((volatile unsigned int*)(0x42CA0460UL))
|
|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFF8 *((volatile unsigned int*)(0x42CA0464UL))
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|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFF9 *((volatile unsigned int*)(0x42CA0468UL))
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|
#define bFM3_ETHERNET_MAC0_MFBOCR_NMFF10 *((volatile unsigned int*)(0x42CA046CUL))
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|
#define bFM3_ETHERNET_MAC0_MFBOCR_ONMFF *((volatile unsigned int*)(0x42CA0470UL))
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|
#define bFM3_ETHERNET_MAC0_RIWTR_RIWT0 *((volatile unsigned int*)(0x42CA0480UL))
|
|
#define bFM3_ETHERNET_MAC0_RIWTR_RIWT1 *((volatile unsigned int*)(0x42CA0484UL))
|
|
#define bFM3_ETHERNET_MAC0_RIWTR_RIWT2 *((volatile unsigned int*)(0x42CA0488UL))
|
|
#define bFM3_ETHERNET_MAC0_RIWTR_RIWT3 *((volatile unsigned int*)(0x42CA048CUL))
|
|
#define bFM3_ETHERNET_MAC0_RIWTR_RIWT4 *((volatile unsigned int*)(0x42CA0490UL))
|
|
#define bFM3_ETHERNET_MAC0_RIWTR_RIWT5 *((volatile unsigned int*)(0x42CA0494UL))
|
|
#define bFM3_ETHERNET_MAC0_RIWTR_RIWT6 *((volatile unsigned int*)(0x42CA0498UL))
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|
#define bFM3_ETHERNET_MAC0_RIWTR_RIWT7 *((volatile unsigned int*)(0x42CA049CUL))
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|
#define bFM3_ETHERNET_MAC0_AHBSR_AHBS *((volatile unsigned int*)(0x42CA0580UL))
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|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP0 *((volatile unsigned int*)(0x42CA0900UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP1 *((volatile unsigned int*)(0x42CA0904UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP2 *((volatile unsigned int*)(0x42CA0908UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP3 *((volatile unsigned int*)(0x42CA090CUL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP4 *((volatile unsigned int*)(0x42CA0910UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP5 *((volatile unsigned int*)(0x42CA0914UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP6 *((volatile unsigned int*)(0x42CA0918UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP7 *((volatile unsigned int*)(0x42CA091CUL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP8 *((volatile unsigned int*)(0x42CA0920UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP9 *((volatile unsigned int*)(0x42CA0924UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP10 *((volatile unsigned int*)(0x42CA0928UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP11 *((volatile unsigned int*)(0x42CA092CUL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP12 *((volatile unsigned int*)(0x42CA0930UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP13 *((volatile unsigned int*)(0x42CA0934UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP14 *((volatile unsigned int*)(0x42CA0938UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP15 *((volatile unsigned int*)(0x42CA093CUL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP16 *((volatile unsigned int*)(0x42CA0940UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP17 *((volatile unsigned int*)(0x42CA0944UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP18 *((volatile unsigned int*)(0x42CA0948UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP19 *((volatile unsigned int*)(0x42CA094CUL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP20 *((volatile unsigned int*)(0x42CA0950UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP21 *((volatile unsigned int*)(0x42CA0954UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP22 *((volatile unsigned int*)(0x42CA0958UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP23 *((volatile unsigned int*)(0x42CA095CUL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP24 *((volatile unsigned int*)(0x42CA0960UL))
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|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP25 *((volatile unsigned int*)(0x42CA0964UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP26 *((volatile unsigned int*)(0x42CA0968UL))
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|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP27 *((volatile unsigned int*)(0x42CA096CUL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP28 *((volatile unsigned int*)(0x42CA0970UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP29 *((volatile unsigned int*)(0x42CA0974UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP30 *((volatile unsigned int*)(0x42CA0978UL))
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|
#define bFM3_ETHERNET_MAC0_CHTDR_HTDAP31 *((volatile unsigned int*)(0x42CA097CUL))
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|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP0 *((volatile unsigned int*)(0x42CA0980UL))
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|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP1 *((volatile unsigned int*)(0x42CA0984UL))
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|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP2 *((volatile unsigned int*)(0x42CA0988UL))
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|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP3 *((volatile unsigned int*)(0x42CA098CUL))
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|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP4 *((volatile unsigned int*)(0x42CA0990UL))
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|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP5 *((volatile unsigned int*)(0x42CA0994UL))
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|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP6 *((volatile unsigned int*)(0x42CA0998UL))
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|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP7 *((volatile unsigned int*)(0x42CA099CUL))
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|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP8 *((volatile unsigned int*)(0x42CA09A0UL))
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|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP9 *((volatile unsigned int*)(0x42CA09A4UL))
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|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP10 *((volatile unsigned int*)(0x42CA09A8UL))
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|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP11 *((volatile unsigned int*)(0x42CA09ACUL))
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|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP12 *((volatile unsigned int*)(0x42CA09B0UL))
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|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP13 *((volatile unsigned int*)(0x42CA09B4UL))
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|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP14 *((volatile unsigned int*)(0x42CA09B8UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP15 *((volatile unsigned int*)(0x42CA09BCUL))
|
|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP16 *((volatile unsigned int*)(0x42CA09C0UL))
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|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP17 *((volatile unsigned int*)(0x42CA09C4UL))
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|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP18 *((volatile unsigned int*)(0x42CA09C8UL))
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|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP19 *((volatile unsigned int*)(0x42CA09CCUL))
|
|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP20 *((volatile unsigned int*)(0x42CA09D0UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP21 *((volatile unsigned int*)(0x42CA09D4UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP22 *((volatile unsigned int*)(0x42CA09D8UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP23 *((volatile unsigned int*)(0x42CA09DCUL))
|
|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP24 *((volatile unsigned int*)(0x42CA09E0UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP25 *((volatile unsigned int*)(0x42CA09E4UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP26 *((volatile unsigned int*)(0x42CA09E8UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP27 *((volatile unsigned int*)(0x42CA09ECUL))
|
|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP28 *((volatile unsigned int*)(0x42CA09F0UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP29 *((volatile unsigned int*)(0x42CA09F4UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP30 *((volatile unsigned int*)(0x42CA09F8UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRDR_HRDAP31 *((volatile unsigned int*)(0x42CA09FCUL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR0 *((volatile unsigned int*)(0x42CA0A00UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR1 *((volatile unsigned int*)(0x42CA0A04UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR2 *((volatile unsigned int*)(0x42CA0A08UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR3 *((volatile unsigned int*)(0x42CA0A0CUL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR4 *((volatile unsigned int*)(0x42CA0A10UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR5 *((volatile unsigned int*)(0x42CA0A14UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR6 *((volatile unsigned int*)(0x42CA0A18UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR7 *((volatile unsigned int*)(0x42CA0A1CUL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR8 *((volatile unsigned int*)(0x42CA0A20UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR9 *((volatile unsigned int*)(0x42CA0A24UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR10 *((volatile unsigned int*)(0x42CA0A28UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR11 *((volatile unsigned int*)(0x42CA0A2CUL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR12 *((volatile unsigned int*)(0x42CA0A30UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR13 *((volatile unsigned int*)(0x42CA0A34UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR14 *((volatile unsigned int*)(0x42CA0A38UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR15 *((volatile unsigned int*)(0x42CA0A3CUL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR16 *((volatile unsigned int*)(0x42CA0A40UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR17 *((volatile unsigned int*)(0x42CA0A44UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR18 *((volatile unsigned int*)(0x42CA0A48UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR19 *((volatile unsigned int*)(0x42CA0A4CUL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR20 *((volatile unsigned int*)(0x42CA0A50UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR21 *((volatile unsigned int*)(0x42CA0A54UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR22 *((volatile unsigned int*)(0x42CA0A58UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR23 *((volatile unsigned int*)(0x42CA0A5CUL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR24 *((volatile unsigned int*)(0x42CA0A60UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR25 *((volatile unsigned int*)(0x42CA0A64UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR26 *((volatile unsigned int*)(0x42CA0A68UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR27 *((volatile unsigned int*)(0x42CA0A6CUL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR28 *((volatile unsigned int*)(0x42CA0A70UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR29 *((volatile unsigned int*)(0x42CA0A74UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR30 *((volatile unsigned int*)(0x42CA0A78UL))
|
|
#define bFM3_ETHERNET_MAC0_CHTBAR_HTBAR31 *((volatile unsigned int*)(0x42CA0A7CUL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR0 *((volatile unsigned int*)(0x42CA0A80UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR1 *((volatile unsigned int*)(0x42CA0A84UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR2 *((volatile unsigned int*)(0x42CA0A88UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR3 *((volatile unsigned int*)(0x42CA0A8CUL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR4 *((volatile unsigned int*)(0x42CA0A90UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR5 *((volatile unsigned int*)(0x42CA0A94UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR6 *((volatile unsigned int*)(0x42CA0A98UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR7 *((volatile unsigned int*)(0x42CA0A9CUL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR8 *((volatile unsigned int*)(0x42CA0AA0UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR9 *((volatile unsigned int*)(0x42CA0AA4UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR10 *((volatile unsigned int*)(0x42CA0AA8UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR11 *((volatile unsigned int*)(0x42CA0AACUL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR12 *((volatile unsigned int*)(0x42CA0AB0UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR13 *((volatile unsigned int*)(0x42CA0AB4UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR14 *((volatile unsigned int*)(0x42CA0AB8UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR15 *((volatile unsigned int*)(0x42CA0ABCUL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR16 *((volatile unsigned int*)(0x42CA0AC0UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR17 *((volatile unsigned int*)(0x42CA0AC4UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR18 *((volatile unsigned int*)(0x42CA0AC8UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR19 *((volatile unsigned int*)(0x42CA0ACCUL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR20 *((volatile unsigned int*)(0x42CA0AD0UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR21 *((volatile unsigned int*)(0x42CA0AD4UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR22 *((volatile unsigned int*)(0x42CA0AD8UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR23 *((volatile unsigned int*)(0x42CA0ADCUL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR24 *((volatile unsigned int*)(0x42CA0AE0UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR25 *((volatile unsigned int*)(0x42CA0AE4UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR26 *((volatile unsigned int*)(0x42CA0AE8UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR27 *((volatile unsigned int*)(0x42CA0AECUL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR28 *((volatile unsigned int*)(0x42CA0AF0UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR29 *((volatile unsigned int*)(0x42CA0AF4UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR30 *((volatile unsigned int*)(0x42CA0AF8UL))
|
|
#define bFM3_ETHERNET_MAC0_CHRBAR_HRBAR31 *((volatile unsigned int*)(0x42CA0AFCUL))
|
|
|
|
/* ETHERNET-MAC-CONTROL registers */
|
|
#define bFM3_ETHERNET_CONTROL_ETH_MODE_IFMODE *((volatile unsigned int*)(0x42CC0000UL))
|
|
#define bFM3_ETHERNET_CONTROL_ETH_MODE_RST0 *((volatile unsigned int*)(0x42CC0020UL))
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#define bFM3_ETHERNET_CONTROL_ETH_MODE_RST1 *((volatile unsigned int*)(0x42CC0024UL))
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#define bFM3_ETHERNET_CONTROL_ETH_MODE_PPSSEL *((volatile unsigned int*)(0x42CC0070UL))
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#define bFM3_ETHERNET_CONTROL_ETH_CLKG_MACEN0 *((volatile unsigned int*)(0x42CC0100UL))
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#define bFM3_ETHERNET_CONTROL_ETH_CLKG_MACEN1 *((volatile unsigned int*)(0x42CC0104UL))
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/* ETHERNET-MAC1 registers*/
|
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#define bFM3_ETHERNET_MAC1_MCR_RE *((volatile unsigned int*)(0x42CE0008UL))
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#define bFM3_ETHERNET_MAC1_MCR_TE *((volatile unsigned int*)(0x42CE000CUL))
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#define bFM3_ETHERNET_MAC1_MCR_DC *((volatile unsigned int*)(0x42CE0010UL))
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#define bFM3_ETHERNET_MAC1_MCR_BL0 *((volatile unsigned int*)(0x42CE0014UL))
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#define bFM3_ETHERNET_MAC1_MCR_BL1 *((volatile unsigned int*)(0x42CE0018UL))
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#define bFM3_ETHERNET_MAC1_MCR_ACS *((volatile unsigned int*)(0x42CE001CUL))
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|
#define bFM3_ETHERNET_MAC1_MCR_LUD *((volatile unsigned int*)(0x42CE0020UL))
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|
#define bFM3_ETHERNET_MAC1_MCR_DR *((volatile unsigned int*)(0x42CE0024UL))
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#define bFM3_ETHERNET_MAC1_MCR_IPC *((volatile unsigned int*)(0x42CE0028UL))
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#define bFM3_ETHERNET_MAC1_MCR_DM *((volatile unsigned int*)(0x42CE002CUL))
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#define bFM3_ETHERNET_MAC1_MCR_LM *((volatile unsigned int*)(0x42CE0030UL))
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#define bFM3_ETHERNET_MAC1_MCR_DO *((volatile unsigned int*)(0x42CE0034UL))
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#define bFM3_ETHERNET_MAC1_MCR_FES *((volatile unsigned int*)(0x42CE0038UL))
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#define bFM3_ETHERNET_MAC1_MCR_PS *((volatile unsigned int*)(0x42CE003CUL))
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#define bFM3_ETHERNET_MAC1_MCR_DCRS *((volatile unsigned int*)(0x42CE0040UL))
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#define bFM3_ETHERNET_MAC1_MCR_IFG0 *((volatile unsigned int*)(0x42CE0044UL))
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#define bFM3_ETHERNET_MAC1_MCR_IFG1 *((volatile unsigned int*)(0x42CE0048UL))
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#define bFM3_ETHERNET_MAC1_MCR_IFG2 *((volatile unsigned int*)(0x42CE004CUL))
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#define bFM3_ETHERNET_MAC1_MCR_JE *((volatile unsigned int*)(0x42CE0050UL))
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#define bFM3_ETHERNET_MAC1_MCR_BE *((volatile unsigned int*)(0x42CE0054UL))
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#define bFM3_ETHERNET_MAC1_MCR_JD *((volatile unsigned int*)(0x42CE0058UL))
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#define bFM3_ETHERNET_MAC1_MCR_WD *((volatile unsigned int*)(0x42CE005CUL))
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#define bFM3_ETHERNET_MAC1_MCR_TC *((volatile unsigned int*)(0x42CE0060UL))
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#define bFM3_ETHERNET_MAC1_MCR_CST *((volatile unsigned int*)(0x42CE0064UL))
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#define bFM3_ETHERNET_MAC1_MFFR_PR *((volatile unsigned int*)(0x42CE0080UL))
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#define bFM3_ETHERNET_MAC1_MFFR_HUC *((volatile unsigned int*)(0x42CE0084UL))
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#define bFM3_ETHERNET_MAC1_MFFR_HMC *((volatile unsigned int*)(0x42CE0088UL))
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#define bFM3_ETHERNET_MAC1_MFFR_DAIF *((volatile unsigned int*)(0x42CE008CUL))
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#define bFM3_ETHERNET_MAC1_MFFR_PM *((volatile unsigned int*)(0x42CE0090UL))
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#define bFM3_ETHERNET_MAC1_MFFR_DB *((volatile unsigned int*)(0x42CE0094UL))
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#define bFM3_ETHERNET_MAC1_MFFR_PCF0 *((volatile unsigned int*)(0x42CE0098UL))
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#define bFM3_ETHERNET_MAC1_MFFR_PCF1 *((volatile unsigned int*)(0x42CE009CUL))
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|
#define bFM3_ETHERNET_MAC1_MFFR_SAIF *((volatile unsigned int*)(0x42CE00A0UL))
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#define bFM3_ETHERNET_MAC1_MFFR_SAF *((volatile unsigned int*)(0x42CE00A4UL))
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#define bFM3_ETHERNET_MAC1_MFFR_HPF *((volatile unsigned int*)(0x42CE00A8UL))
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#define bFM3_ETHERNET_MAC1_MFFR_RA *((volatile unsigned int*)(0x42CE00FCUL))
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#define bFM3_ETHERNET_MAC1_MHTRH_HTH0 *((volatile unsigned int*)(0x42CE0100UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH1 *((volatile unsigned int*)(0x42CE0104UL))
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#define bFM3_ETHERNET_MAC1_MHTRH_HTH2 *((volatile unsigned int*)(0x42CE0108UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH3 *((volatile unsigned int*)(0x42CE010CUL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH4 *((volatile unsigned int*)(0x42CE0110UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH5 *((volatile unsigned int*)(0x42CE0114UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH6 *((volatile unsigned int*)(0x42CE0118UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH7 *((volatile unsigned int*)(0x42CE011CUL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH8 *((volatile unsigned int*)(0x42CE0120UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH9 *((volatile unsigned int*)(0x42CE0124UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH10 *((volatile unsigned int*)(0x42CE0128UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH11 *((volatile unsigned int*)(0x42CE012CUL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH12 *((volatile unsigned int*)(0x42CE0130UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH13 *((volatile unsigned int*)(0x42CE0134UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH14 *((volatile unsigned int*)(0x42CE0138UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH15 *((volatile unsigned int*)(0x42CE013CUL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH16 *((volatile unsigned int*)(0x42CE0140UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH17 *((volatile unsigned int*)(0x42CE0144UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH18 *((volatile unsigned int*)(0x42CE0148UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH19 *((volatile unsigned int*)(0x42CE014CUL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH20 *((volatile unsigned int*)(0x42CE0150UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH21 *((volatile unsigned int*)(0x42CE0154UL))
|
|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH22 *((volatile unsigned int*)(0x42CE0158UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH23 *((volatile unsigned int*)(0x42CE015CUL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH24 *((volatile unsigned int*)(0x42CE0160UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH25 *((volatile unsigned int*)(0x42CE0164UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH26 *((volatile unsigned int*)(0x42CE0168UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH27 *((volatile unsigned int*)(0x42CE016CUL))
|
|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH28 *((volatile unsigned int*)(0x42CE0170UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH29 *((volatile unsigned int*)(0x42CE0174UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH30 *((volatile unsigned int*)(0x42CE0178UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRH_HTH31 *((volatile unsigned int*)(0x42CE017CUL))
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|
#define bFM3_ETHERNET_MAC1_MHTRL_HTL0 *((volatile unsigned int*)(0x42CE0180UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRL_HTL1 *((volatile unsigned int*)(0x42CE0184UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRL_HTL2 *((volatile unsigned int*)(0x42CE0188UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRL_HTL3 *((volatile unsigned int*)(0x42CE018CUL))
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|
#define bFM3_ETHERNET_MAC1_MHTRL_HTL4 *((volatile unsigned int*)(0x42CE0190UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRL_HTL5 *((volatile unsigned int*)(0x42CE0194UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRL_HTL6 *((volatile unsigned int*)(0x42CE0198UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRL_HTL7 *((volatile unsigned int*)(0x42CE019CUL))
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|
#define bFM3_ETHERNET_MAC1_MHTRL_HTL8 *((volatile unsigned int*)(0x42CE01A0UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRL_HTL9 *((volatile unsigned int*)(0x42CE01A4UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRL_HTL10 *((volatile unsigned int*)(0x42CE01A8UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRL_HTL11 *((volatile unsigned int*)(0x42CE01ACUL))
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|
#define bFM3_ETHERNET_MAC1_MHTRL_HTL12 *((volatile unsigned int*)(0x42CE01B0UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRL_HTL13 *((volatile unsigned int*)(0x42CE01B4UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRL_HTL14 *((volatile unsigned int*)(0x42CE01B8UL))
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|
#define bFM3_ETHERNET_MAC1_MHTRL_HTL15 *((volatile unsigned int*)(0x42CE01BCUL))
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|
#define bFM3_ETHERNET_MAC1_MHTRL_HTL16 *((volatile unsigned int*)(0x42CE01C0UL))
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#define bFM3_ETHERNET_MAC1_MHTRL_HTL17 *((volatile unsigned int*)(0x42CE01C4UL))
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#define bFM3_ETHERNET_MAC1_MHTRL_HTL18 *((volatile unsigned int*)(0x42CE01C8UL))
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#define bFM3_ETHERNET_MAC1_MHTRL_HTL19 *((volatile unsigned int*)(0x42CE01CCUL))
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#define bFM3_ETHERNET_MAC1_MHTRL_HTL20 *((volatile unsigned int*)(0x42CE01D0UL))
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#define bFM3_ETHERNET_MAC1_MHTRL_HTL21 *((volatile unsigned int*)(0x42CE01D4UL))
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#define bFM3_ETHERNET_MAC1_MHTRL_HTL22 *((volatile unsigned int*)(0x42CE01D8UL))
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#define bFM3_ETHERNET_MAC1_MHTRL_HTL23 *((volatile unsigned int*)(0x42CE01DCUL))
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#define bFM3_ETHERNET_MAC1_MHTRL_HTL24 *((volatile unsigned int*)(0x42CE01E0UL))
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#define bFM3_ETHERNET_MAC1_MHTRL_HTL25 *((volatile unsigned int*)(0x42CE01E4UL))
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#define bFM3_ETHERNET_MAC1_MHTRL_HTL26 *((volatile unsigned int*)(0x42CE01E8UL))
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#define bFM3_ETHERNET_MAC1_MHTRL_HTL27 *((volatile unsigned int*)(0x42CE01ECUL))
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#define bFM3_ETHERNET_MAC1_MHTRL_HTL28 *((volatile unsigned int*)(0x42CE01F0UL))
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#define bFM3_ETHERNET_MAC1_MHTRL_HTL29 *((volatile unsigned int*)(0x42CE01F4UL))
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#define bFM3_ETHERNET_MAC1_MHTRL_HTL30 *((volatile unsigned int*)(0x42CE01F8UL))
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#define bFM3_ETHERNET_MAC1_MHTRL_HTL31 *((volatile unsigned int*)(0x42CE01FCUL))
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#define bFM3_ETHERNET_MAC1_GAR_GB *((volatile unsigned int*)(0x42CE0200UL))
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#define bFM3_ETHERNET_MAC1_GAR_GW *((volatile unsigned int*)(0x42CE0204UL))
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#define bFM3_ETHERNET_MAC1_GAR_CR0 *((volatile unsigned int*)(0x42CE0208UL))
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#define bFM3_ETHERNET_MAC1_GAR_CR1 *((volatile unsigned int*)(0x42CE020CUL))
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#define bFM3_ETHERNET_MAC1_GAR_CR2 *((volatile unsigned int*)(0x42CE0210UL))
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#define bFM3_ETHERNET_MAC1_GAR_CR3 *((volatile unsigned int*)(0x42CE0214UL))
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#define bFM3_ETHERNET_MAC1_GAR_GR0 *((volatile unsigned int*)(0x42CE0218UL))
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#define bFM3_ETHERNET_MAC1_GAR_GR1 *((volatile unsigned int*)(0x42CE021CUL))
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#define bFM3_ETHERNET_MAC1_GAR_GR2 *((volatile unsigned int*)(0x42CE0220UL))
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#define bFM3_ETHERNET_MAC1_GAR_GR3 *((volatile unsigned int*)(0x42CE0224UL))
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#define bFM3_ETHERNET_MAC1_GAR_GR4 *((volatile unsigned int*)(0x42CE0228UL))
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#define bFM3_ETHERNET_MAC1_GAR_PA0 *((volatile unsigned int*)(0x42CE022CUL))
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#define bFM3_ETHERNET_MAC1_GAR_PA1 *((volatile unsigned int*)(0x42CE0230UL))
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#define bFM3_ETHERNET_MAC1_GAR_PA2 *((volatile unsigned int*)(0x42CE0234UL))
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#define bFM3_ETHERNET_MAC1_GAR_PA3 *((volatile unsigned int*)(0x42CE0238UL))
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#define bFM3_ETHERNET_MAC1_GAR_PA4 *((volatile unsigned int*)(0x42CE023CUL))
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#define bFM3_ETHERNET_MAC1_GDR_GD0 *((volatile unsigned int*)(0x42CE0280UL))
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#define bFM3_ETHERNET_MAC1_GDR_GD1 *((volatile unsigned int*)(0x42CE0284UL))
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|
#define bFM3_ETHERNET_MAC1_GDR_GD2 *((volatile unsigned int*)(0x42CE0288UL))
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|
#define bFM3_ETHERNET_MAC1_GDR_GD3 *((volatile unsigned int*)(0x42CE028CUL))
|
|
#define bFM3_ETHERNET_MAC1_GDR_GD4 *((volatile unsigned int*)(0x42CE0290UL))
|
|
#define bFM3_ETHERNET_MAC1_GDR_GD5 *((volatile unsigned int*)(0x42CE0294UL))
|
|
#define bFM3_ETHERNET_MAC1_GDR_GD6 *((volatile unsigned int*)(0x42CE0298UL))
|
|
#define bFM3_ETHERNET_MAC1_GDR_GD7 *((volatile unsigned int*)(0x42CE029CUL))
|
|
#define bFM3_ETHERNET_MAC1_GDR_GD8 *((volatile unsigned int*)(0x42CE02A0UL))
|
|
#define bFM3_ETHERNET_MAC1_GDR_GD9 *((volatile unsigned int*)(0x42CE02A4UL))
|
|
#define bFM3_ETHERNET_MAC1_GDR_GD10 *((volatile unsigned int*)(0x42CE02A8UL))
|
|
#define bFM3_ETHERNET_MAC1_GDR_GD11 *((volatile unsigned int*)(0x42CE02ACUL))
|
|
#define bFM3_ETHERNET_MAC1_GDR_GD12 *((volatile unsigned int*)(0x42CE02B0UL))
|
|
#define bFM3_ETHERNET_MAC1_GDR_GD13 *((volatile unsigned int*)(0x42CE02B4UL))
|
|
#define bFM3_ETHERNET_MAC1_GDR_GD14 *((volatile unsigned int*)(0x42CE02B8UL))
|
|
#define bFM3_ETHERNET_MAC1_GDR_GD15 *((volatile unsigned int*)(0x42CE02BCUL))
|
|
#define bFM3_ETHERNET_MAC1_FCR_FCB_BPA *((volatile unsigned int*)(0x42CE0300UL))
|
|
#define bFM3_ETHERNET_MAC1_FCR_TFE *((volatile unsigned int*)(0x42CE0304UL))
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|
#define bFM3_ETHERNET_MAC1_FCR_RFE *((volatile unsigned int*)(0x42CE0308UL))
|
|
#define bFM3_ETHERNET_MAC1_FCR_UP *((volatile unsigned int*)(0x42CE030CUL))
|
|
#define bFM3_ETHERNET_MAC1_FCR_PLT0 *((volatile unsigned int*)(0x42CE0310UL))
|
|
#define bFM3_ETHERNET_MAC1_FCR_PLT1 *((volatile unsigned int*)(0x42CE0314UL))
|
|
#define bFM3_ETHERNET_MAC1_FCR_DZPQ *((volatile unsigned int*)(0x42CE031CUL))
|
|
#define bFM3_ETHERNET_MAC1_FCR_PT0 *((volatile unsigned int*)(0x42CE0340UL))
|
|
#define bFM3_ETHERNET_MAC1_FCR_PT1 *((volatile unsigned int*)(0x42CE0344UL))
|
|
#define bFM3_ETHERNET_MAC1_FCR_PT2 *((volatile unsigned int*)(0x42CE0348UL))
|
|
#define bFM3_ETHERNET_MAC1_FCR_PT3 *((volatile unsigned int*)(0x42CE034CUL))
|
|
#define bFM3_ETHERNET_MAC1_FCR_PT4 *((volatile unsigned int*)(0x42CE0350UL))
|
|
#define bFM3_ETHERNET_MAC1_FCR_PT5 *((volatile unsigned int*)(0x42CE0354UL))
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|
#define bFM3_ETHERNET_MAC1_FCR_PT6 *((volatile unsigned int*)(0x42CE0358UL))
|
|
#define bFM3_ETHERNET_MAC1_FCR_PT7 *((volatile unsigned int*)(0x42CE035CUL))
|
|
#define bFM3_ETHERNET_MAC1_FCR_PT8 *((volatile unsigned int*)(0x42CE0360UL))
|
|
#define bFM3_ETHERNET_MAC1_FCR_PT9 *((volatile unsigned int*)(0x42CE0364UL))
|
|
#define bFM3_ETHERNET_MAC1_FCR_PT10 *((volatile unsigned int*)(0x42CE0368UL))
|
|
#define bFM3_ETHERNET_MAC1_FCR_PT11 *((volatile unsigned int*)(0x42CE036CUL))
|
|
#define bFM3_ETHERNET_MAC1_FCR_PT12 *((volatile unsigned int*)(0x42CE0370UL))
|
|
#define bFM3_ETHERNET_MAC1_FCR_PT13 *((volatile unsigned int*)(0x42CE0374UL))
|
|
#define bFM3_ETHERNET_MAC1_FCR_PT14 *((volatile unsigned int*)(0x42CE0378UL))
|
|
#define bFM3_ETHERNET_MAC1_FCR_PT15 *((volatile unsigned int*)(0x42CE037CUL))
|
|
#define bFM3_ETHERNET_MAC1_VTR_VL0 *((volatile unsigned int*)(0x42CE0380UL))
|
|
#define bFM3_ETHERNET_MAC1_VTR_VL1 *((volatile unsigned int*)(0x42CE0384UL))
|
|
#define bFM3_ETHERNET_MAC1_VTR_VL2 *((volatile unsigned int*)(0x42CE0388UL))
|
|
#define bFM3_ETHERNET_MAC1_VTR_VL3 *((volatile unsigned int*)(0x42CE038CUL))
|
|
#define bFM3_ETHERNET_MAC1_VTR_VL4 *((volatile unsigned int*)(0x42CE0390UL))
|
|
#define bFM3_ETHERNET_MAC1_VTR_VL5 *((volatile unsigned int*)(0x42CE0394UL))
|
|
#define bFM3_ETHERNET_MAC1_VTR_VL6 *((volatile unsigned int*)(0x42CE0398UL))
|
|
#define bFM3_ETHERNET_MAC1_VTR_VL7 *((volatile unsigned int*)(0x42CE039CUL))
|
|
#define bFM3_ETHERNET_MAC1_VTR_VL8 *((volatile unsigned int*)(0x42CE03A0UL))
|
|
#define bFM3_ETHERNET_MAC1_VTR_VL9 *((volatile unsigned int*)(0x42CE03A4UL))
|
|
#define bFM3_ETHERNET_MAC1_VTR_VL10 *((volatile unsigned int*)(0x42CE03A8UL))
|
|
#define bFM3_ETHERNET_MAC1_VTR_VL11 *((volatile unsigned int*)(0x42CE03ACUL))
|
|
#define bFM3_ETHERNET_MAC1_VTR_VL12 *((volatile unsigned int*)(0x42CE03B0UL))
|
|
#define bFM3_ETHERNET_MAC1_VTR_VL13 *((volatile unsigned int*)(0x42CE03B4UL))
|
|
#define bFM3_ETHERNET_MAC1_VTR_VL14 *((volatile unsigned int*)(0x42CE03B8UL))
|
|
#define bFM3_ETHERNET_MAC1_VTR_VL15 *((volatile unsigned int*)(0x42CE03BCUL))
|
|
#define bFM3_ETHERNET_MAC1_VTR_ETV *((volatile unsigned int*)(0x42CE03C0UL))
|
|
#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR0 *((volatile unsigned int*)(0x42CE0500UL))
|
|
#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR1 *((volatile unsigned int*)(0x42CE0504UL))
|
|
#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR2 *((volatile unsigned int*)(0x42CE0508UL))
|
|
#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR3 *((volatile unsigned int*)(0x42CE050CUL))
|
|
#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR4 *((volatile unsigned int*)(0x42CE0510UL))
|
|
#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR5 *((volatile unsigned int*)(0x42CE0514UL))
|
|
#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR6 *((volatile unsigned int*)(0x42CE0518UL))
|
|
#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR7 *((volatile unsigned int*)(0x42CE051CUL))
|
|
#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR8 *((volatile unsigned int*)(0x42CE0520UL))
|
|
#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR9 *((volatile unsigned int*)(0x42CE0524UL))
|
|
#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR10 *((volatile unsigned int*)(0x42CE0528UL))
|
|
#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR11 *((volatile unsigned int*)(0x42CE052CUL))
|
|
#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR12 *((volatile unsigned int*)(0x42CE0530UL))
|
|
#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR13 *((volatile unsigned int*)(0x42CE0534UL))
|
|
#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR14 *((volatile unsigned int*)(0x42CE0538UL))
|
|
#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR15 *((volatile unsigned int*)(0x42CE053CUL))
|
|
#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR16 *((volatile unsigned int*)(0x42CE0540UL))
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#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR17 *((volatile unsigned int*)(0x42CE0544UL))
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#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR18 *((volatile unsigned int*)(0x42CE0548UL))
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#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR19 *((volatile unsigned int*)(0x42CE054CUL))
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#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR20 *((volatile unsigned int*)(0x42CE0550UL))
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#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR21 *((volatile unsigned int*)(0x42CE0554UL))
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|
#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR22 *((volatile unsigned int*)(0x42CE0558UL))
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#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR23 *((volatile unsigned int*)(0x42CE055CUL))
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#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR24 *((volatile unsigned int*)(0x42CE0560UL))
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#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR25 *((volatile unsigned int*)(0x42CE0564UL))
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#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR26 *((volatile unsigned int*)(0x42CE0568UL))
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|
#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR27 *((volatile unsigned int*)(0x42CE056CUL))
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|
#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR28 *((volatile unsigned int*)(0x42CE0570UL))
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|
#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR29 *((volatile unsigned int*)(0x42CE0574UL))
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|
#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR30 *((volatile unsigned int*)(0x42CE0578UL))
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|
#define bFM3_ETHERNET_MAC1_RWFFR_RWFFR31 *((volatile unsigned int*)(0x42CE057CUL))
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#define bFM3_ETHERNET_MAC1_PMTR_PD *((volatile unsigned int*)(0x42CE0580UL))
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|
#define bFM3_ETHERNET_MAC1_PMTR_MPE *((volatile unsigned int*)(0x42CE0584UL))
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|
#define bFM3_ETHERNET_MAC1_PMTR_WFE *((volatile unsigned int*)(0x42CE0588UL))
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|
#define bFM3_ETHERNET_MAC1_PMTR_MPR *((volatile unsigned int*)(0x42CE0594UL))
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|
#define bFM3_ETHERNET_MAC1_PMTR_WPR *((volatile unsigned int*)(0x42CE0598UL))
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|
#define bFM3_ETHERNET_MAC1_PMTR_GU *((volatile unsigned int*)(0x42CE05A4UL))
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#define bFM3_ETHERNET_MAC1_PMTR_RWFFRPR *((volatile unsigned int*)(0x42CE05FCUL))
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#define bFM3_ETHERNET_MAC1_LPICSR_TLPIEN *((volatile unsigned int*)(0x42CE0600UL))
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|
#define bFM3_ETHERNET_MAC1_LPICSR_TLPIEX *((volatile unsigned int*)(0x42CE0604UL))
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|
#define bFM3_ETHERNET_MAC1_LPICSR_RLPIEN *((volatile unsigned int*)(0x42CE0608UL))
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|
#define bFM3_ETHERNET_MAC1_LPICSR_RLPIEX *((volatile unsigned int*)(0x42CE060CUL))
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|
#define bFM3_ETHERNET_MAC1_LPICSR_TLPIST *((volatile unsigned int*)(0x42CE0620UL))
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|
#define bFM3_ETHERNET_MAC1_LPICSR_RLPIST *((volatile unsigned int*)(0x42CE0624UL))
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|
#define bFM3_ETHERNET_MAC1_LPICSR_LPIEN *((volatile unsigned int*)(0x42CE0640UL))
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|
#define bFM3_ETHERNET_MAC1_LPICSR_PLS *((volatile unsigned int*)(0x42CE0644UL))
|
|
#define bFM3_ETHERNET_MAC1_LPICSR_PLSEN *((volatile unsigned int*)(0x42CE0648UL))
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|
#define bFM3_ETHERNET_MAC1_LPICSR_LPITXA *((volatile unsigned int*)(0x42CE064CUL))
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|
#define bFM3_ETHERNET_MAC1_LPITCR_TWT0 *((volatile unsigned int*)(0x42CE0680UL))
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|
#define bFM3_ETHERNET_MAC1_LPITCR_TWT1 *((volatile unsigned int*)(0x42CE0684UL))
|
|
#define bFM3_ETHERNET_MAC1_LPITCR_TWT2 *((volatile unsigned int*)(0x42CE0688UL))
|
|
#define bFM3_ETHERNET_MAC1_LPITCR_TWT3 *((volatile unsigned int*)(0x42CE068CUL))
|
|
#define bFM3_ETHERNET_MAC1_LPITCR_TWT4 *((volatile unsigned int*)(0x42CE0690UL))
|
|
#define bFM3_ETHERNET_MAC1_LPITCR_TWT5 *((volatile unsigned int*)(0x42CE0694UL))
|
|
#define bFM3_ETHERNET_MAC1_LPITCR_TWT6 *((volatile unsigned int*)(0x42CE0698UL))
|
|
#define bFM3_ETHERNET_MAC1_LPITCR_TWT7 *((volatile unsigned int*)(0x42CE069CUL))
|
|
#define bFM3_ETHERNET_MAC1_LPITCR_TWT8 *((volatile unsigned int*)(0x42CE06A0UL))
|
|
#define bFM3_ETHERNET_MAC1_LPITCR_TWT9 *((volatile unsigned int*)(0x42CE06A4UL))
|
|
#define bFM3_ETHERNET_MAC1_LPITCR_TWT10 *((volatile unsigned int*)(0x42CE06A8UL))
|
|
#define bFM3_ETHERNET_MAC1_LPITCR_TWT11 *((volatile unsigned int*)(0x42CE06ACUL))
|
|
#define bFM3_ETHERNET_MAC1_LPITCR_TWT12 *((volatile unsigned int*)(0x42CE06B0UL))
|
|
#define bFM3_ETHERNET_MAC1_LPITCR_TWT13 *((volatile unsigned int*)(0x42CE06B4UL))
|
|
#define bFM3_ETHERNET_MAC1_LPITCR_TWT14 *((volatile unsigned int*)(0x42CE06B8UL))
|
|
#define bFM3_ETHERNET_MAC1_LPITCR_TWT15 *((volatile unsigned int*)(0x42CE06BCUL))
|
|
#define bFM3_ETHERNET_MAC1_LPITCR_LIT0 *((volatile unsigned int*)(0x42CE06C0UL))
|
|
#define bFM3_ETHERNET_MAC1_LPITCR_LIT1 *((volatile unsigned int*)(0x42CE06C4UL))
|
|
#define bFM3_ETHERNET_MAC1_LPITCR_LIT2 *((volatile unsigned int*)(0x42CE06C8UL))
|
|
#define bFM3_ETHERNET_MAC1_LPITCR_LIT3 *((volatile unsigned int*)(0x42CE06CCUL))
|
|
#define bFM3_ETHERNET_MAC1_LPITCR_LIT4 *((volatile unsigned int*)(0x42CE06D0UL))
|
|
#define bFM3_ETHERNET_MAC1_LPITCR_LIT5 *((volatile unsigned int*)(0x42CE06D4UL))
|
|
#define bFM3_ETHERNET_MAC1_LPITCR_LIT6 *((volatile unsigned int*)(0x42CE06D8UL))
|
|
#define bFM3_ETHERNET_MAC1_LPITCR_LIT7 *((volatile unsigned int*)(0x42CE06DCUL))
|
|
#define bFM3_ETHERNET_MAC1_LPITCR_LIT8 *((volatile unsigned int*)(0x42CE06E0UL))
|
|
#define bFM3_ETHERNET_MAC1_LPITCR_LIT9 *((volatile unsigned int*)(0x42CE06E4UL))
|
|
#define bFM3_ETHERNET_MAC1_ISR_RGIS *((volatile unsigned int*)(0x42CE0700UL))
|
|
#define bFM3_ETHERNET_MAC1_ISR_PIS *((volatile unsigned int*)(0x42CE070CUL))
|
|
#define bFM3_ETHERNET_MAC1_ISR_MIS *((volatile unsigned int*)(0x42CE0710UL))
|
|
#define bFM3_ETHERNET_MAC1_ISR_RIS *((volatile unsigned int*)(0x42CE0714UL))
|
|
#define bFM3_ETHERNET_MAC1_ISR_TIS *((volatile unsigned int*)(0x42CE0718UL))
|
|
#define bFM3_ETHERNET_MAC1_ISR_COIS *((volatile unsigned int*)(0x42CE071CUL))
|
|
#define bFM3_ETHERNET_MAC1_ISR_TSIS *((volatile unsigned int*)(0x42CE0724UL))
|
|
#define bFM3_ETHERNET_MAC1_ISR_LPIIS *((volatile unsigned int*)(0x42CE0728UL))
|
|
#define bFM3_ETHERNET_MAC1_IMR_RGIM *((volatile unsigned int*)(0x42CE0780UL))
|
|
#define bFM3_ETHERNET_MAC1_IMR_PIM *((volatile unsigned int*)(0x42CE078CUL))
|
|
#define bFM3_ETHERNET_MAC1_IMR_TSIM *((volatile unsigned int*)(0x42CE0794UL))
|
|
#define bFM3_ETHERNET_MAC1_IMR_LPIIM *((volatile unsigned int*)(0x42CE0798UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR0H_A32 *((volatile unsigned int*)(0x42CE0800UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0H_A33 *((volatile unsigned int*)(0x42CE0804UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR0H_A34 *((volatile unsigned int*)(0x42CE0808UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR0H_A35 *((volatile unsigned int*)(0x42CE080CUL))
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|
#define bFM3_ETHERNET_MAC1_MAR0H_A36 *((volatile unsigned int*)(0x42CE0810UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0H_A37 *((volatile unsigned int*)(0x42CE0814UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0H_A38 *((volatile unsigned int*)(0x42CE0818UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0H_A39 *((volatile unsigned int*)(0x42CE081CUL))
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|
#define bFM3_ETHERNET_MAC1_MAR0H_A40 *((volatile unsigned int*)(0x42CE0820UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0H_A41 *((volatile unsigned int*)(0x42CE0824UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR0H_A42 *((volatile unsigned int*)(0x42CE0828UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0H_A43 *((volatile unsigned int*)(0x42CE082CUL))
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|
#define bFM3_ETHERNET_MAC1_MAR0H_A44 *((volatile unsigned int*)(0x42CE0830UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0H_A45 *((volatile unsigned int*)(0x42CE0834UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0H_A46 *((volatile unsigned int*)(0x42CE0838UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0H_A47 *((volatile unsigned int*)(0x42CE083CUL))
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|
#define bFM3_ETHERNET_MAC1_MAR0H_MO *((volatile unsigned int*)(0x42CE087CUL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A0 *((volatile unsigned int*)(0x42CE0880UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A1 *((volatile unsigned int*)(0x42CE0884UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A2 *((volatile unsigned int*)(0x42CE0888UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A3 *((volatile unsigned int*)(0x42CE088CUL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A4 *((volatile unsigned int*)(0x42CE0890UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A5 *((volatile unsigned int*)(0x42CE0894UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A6 *((volatile unsigned int*)(0x42CE0898UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A7 *((volatile unsigned int*)(0x42CE089CUL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A8 *((volatile unsigned int*)(0x42CE08A0UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A9 *((volatile unsigned int*)(0x42CE08A4UL))
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#define bFM3_ETHERNET_MAC1_MAR0L_A10 *((volatile unsigned int*)(0x42CE08A8UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A11 *((volatile unsigned int*)(0x42CE08ACUL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A12 *((volatile unsigned int*)(0x42CE08B0UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A13 *((volatile unsigned int*)(0x42CE08B4UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A14 *((volatile unsigned int*)(0x42CE08B8UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A15 *((volatile unsigned int*)(0x42CE08BCUL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A16 *((volatile unsigned int*)(0x42CE08C0UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A17 *((volatile unsigned int*)(0x42CE08C4UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A18 *((volatile unsigned int*)(0x42CE08C8UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A19 *((volatile unsigned int*)(0x42CE08CCUL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A20 *((volatile unsigned int*)(0x42CE08D0UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A21 *((volatile unsigned int*)(0x42CE08D4UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A22 *((volatile unsigned int*)(0x42CE08D8UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A23 *((volatile unsigned int*)(0x42CE08DCUL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A24 *((volatile unsigned int*)(0x42CE08E0UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A25 *((volatile unsigned int*)(0x42CE08E4UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A26 *((volatile unsigned int*)(0x42CE08E8UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A27 *((volatile unsigned int*)(0x42CE08ECUL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A28 *((volatile unsigned int*)(0x42CE08F0UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A29 *((volatile unsigned int*)(0x42CE08F4UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A30 *((volatile unsigned int*)(0x42CE08F8UL))
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|
#define bFM3_ETHERNET_MAC1_MAR0L_A31 *((volatile unsigned int*)(0x42CE08FCUL))
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|
#define bFM3_ETHERNET_MAC1_MAR1H_A32 *((volatile unsigned int*)(0x42CE0900UL))
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|
#define bFM3_ETHERNET_MAC1_MAR1H_A33 *((volatile unsigned int*)(0x42CE0904UL))
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|
#define bFM3_ETHERNET_MAC1_MAR1H_A34 *((volatile unsigned int*)(0x42CE0908UL))
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|
#define bFM3_ETHERNET_MAC1_MAR1H_A35 *((volatile unsigned int*)(0x42CE090CUL))
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|
#define bFM3_ETHERNET_MAC1_MAR1H_A36 *((volatile unsigned int*)(0x42CE0910UL))
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|
#define bFM3_ETHERNET_MAC1_MAR1H_A37 *((volatile unsigned int*)(0x42CE0914UL))
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|
#define bFM3_ETHERNET_MAC1_MAR1H_A38 *((volatile unsigned int*)(0x42CE0918UL))
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|
#define bFM3_ETHERNET_MAC1_MAR1H_A39 *((volatile unsigned int*)(0x42CE091CUL))
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|
#define bFM3_ETHERNET_MAC1_MAR1H_A40 *((volatile unsigned int*)(0x42CE0920UL))
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|
#define bFM3_ETHERNET_MAC1_MAR1H_A41 *((volatile unsigned int*)(0x42CE0924UL))
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|
#define bFM3_ETHERNET_MAC1_MAR1H_A42 *((volatile unsigned int*)(0x42CE0928UL))
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|
#define bFM3_ETHERNET_MAC1_MAR1H_A43 *((volatile unsigned int*)(0x42CE092CUL))
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|
#define bFM3_ETHERNET_MAC1_MAR1H_A44 *((volatile unsigned int*)(0x42CE0930UL))
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|
#define bFM3_ETHERNET_MAC1_MAR1H_A45 *((volatile unsigned int*)(0x42CE0934UL))
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|
#define bFM3_ETHERNET_MAC1_MAR1H_A46 *((volatile unsigned int*)(0x42CE0938UL))
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|
#define bFM3_ETHERNET_MAC1_MAR1H_A47 *((volatile unsigned int*)(0x42CE093CUL))
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|
#define bFM3_ETHERNET_MAC1_MAR1H_MBC0 *((volatile unsigned int*)(0x42CE0960UL))
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|
#define bFM3_ETHERNET_MAC1_MAR1H_MBC1 *((volatile unsigned int*)(0x42CE0964UL))
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|
#define bFM3_ETHERNET_MAC1_MAR1H_MBC2 *((volatile unsigned int*)(0x42CE0968UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1H_MBC3 *((volatile unsigned int*)(0x42CE096CUL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1H_MBC4 *((volatile unsigned int*)(0x42CE0970UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1H_MBC5 *((volatile unsigned int*)(0x42CE0974UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1H_SA *((volatile unsigned int*)(0x42CE0978UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1H_AE *((volatile unsigned int*)(0x42CE097CUL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A0 *((volatile unsigned int*)(0x42CE0980UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A1 *((volatile unsigned int*)(0x42CE0984UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A2 *((volatile unsigned int*)(0x42CE0988UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A3 *((volatile unsigned int*)(0x42CE098CUL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A4 *((volatile unsigned int*)(0x42CE0990UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A5 *((volatile unsigned int*)(0x42CE0994UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A6 *((volatile unsigned int*)(0x42CE0998UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A7 *((volatile unsigned int*)(0x42CE099CUL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A8 *((volatile unsigned int*)(0x42CE09A0UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A9 *((volatile unsigned int*)(0x42CE09A4UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A10 *((volatile unsigned int*)(0x42CE09A8UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A11 *((volatile unsigned int*)(0x42CE09ACUL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A12 *((volatile unsigned int*)(0x42CE09B0UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A13 *((volatile unsigned int*)(0x42CE09B4UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A14 *((volatile unsigned int*)(0x42CE09B8UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A15 *((volatile unsigned int*)(0x42CE09BCUL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A16 *((volatile unsigned int*)(0x42CE09C0UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A17 *((volatile unsigned int*)(0x42CE09C4UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A18 *((volatile unsigned int*)(0x42CE09C8UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A19 *((volatile unsigned int*)(0x42CE09CCUL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A20 *((volatile unsigned int*)(0x42CE09D0UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A21 *((volatile unsigned int*)(0x42CE09D4UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A22 *((volatile unsigned int*)(0x42CE09D8UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A23 *((volatile unsigned int*)(0x42CE09DCUL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A24 *((volatile unsigned int*)(0x42CE09E0UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A25 *((volatile unsigned int*)(0x42CE09E4UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A26 *((volatile unsigned int*)(0x42CE09E8UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A27 *((volatile unsigned int*)(0x42CE09ECUL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A28 *((volatile unsigned int*)(0x42CE09F0UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A29 *((volatile unsigned int*)(0x42CE09F4UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A30 *((volatile unsigned int*)(0x42CE09F8UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR1L_A31 *((volatile unsigned int*)(0x42CE09FCUL))
|
|
#define bFM3_ETHERNET_MAC1_MAR2H_A32 *((volatile unsigned int*)(0x42CE0A00UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR2H_A33 *((volatile unsigned int*)(0x42CE0A04UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR2H_A34 *((volatile unsigned int*)(0x42CE0A08UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR2H_A35 *((volatile unsigned int*)(0x42CE0A0CUL))
|
|
#define bFM3_ETHERNET_MAC1_MAR2H_A36 *((volatile unsigned int*)(0x42CE0A10UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR2H_A37 *((volatile unsigned int*)(0x42CE0A14UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR2H_A38 *((volatile unsigned int*)(0x42CE0A18UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR2H_A39 *((volatile unsigned int*)(0x42CE0A1CUL))
|
|
#define bFM3_ETHERNET_MAC1_MAR2H_A40 *((volatile unsigned int*)(0x42CE0A20UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR2H_A41 *((volatile unsigned int*)(0x42CE0A24UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR2H_A42 *((volatile unsigned int*)(0x42CE0A28UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR2H_A43 *((volatile unsigned int*)(0x42CE0A2CUL))
|
|
#define bFM3_ETHERNET_MAC1_MAR2H_A44 *((volatile unsigned int*)(0x42CE0A30UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR2H_A45 *((volatile unsigned int*)(0x42CE0A34UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR2H_A46 *((volatile unsigned int*)(0x42CE0A38UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR2H_A47 *((volatile unsigned int*)(0x42CE0A3CUL))
|
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#define bFM3_ETHERNET_MAC1_MAR2H_MBC0 *((volatile unsigned int*)(0x42CE0A60UL))
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#define bFM3_ETHERNET_MAC1_MAR2H_MBC1 *((volatile unsigned int*)(0x42CE0A64UL))
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#define bFM3_ETHERNET_MAC1_MAR2H_MBC2 *((volatile unsigned int*)(0x42CE0A68UL))
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#define bFM3_ETHERNET_MAC1_MAR2H_MBC3 *((volatile unsigned int*)(0x42CE0A6CUL))
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#define bFM3_ETHERNET_MAC1_MAR2H_MBC4 *((volatile unsigned int*)(0x42CE0A70UL))
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#define bFM3_ETHERNET_MAC1_MAR2H_MBC5 *((volatile unsigned int*)(0x42CE0A74UL))
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#define bFM3_ETHERNET_MAC1_MAR2H_SA *((volatile unsigned int*)(0x42CE0A78UL))
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#define bFM3_ETHERNET_MAC1_MAR2H_AE *((volatile unsigned int*)(0x42CE0A7CUL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A0 *((volatile unsigned int*)(0x42CE0A80UL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A1 *((volatile unsigned int*)(0x42CE0A84UL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A2 *((volatile unsigned int*)(0x42CE0A88UL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A3 *((volatile unsigned int*)(0x42CE0A8CUL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A4 *((volatile unsigned int*)(0x42CE0A90UL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A5 *((volatile unsigned int*)(0x42CE0A94UL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A6 *((volatile unsigned int*)(0x42CE0A98UL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A7 *((volatile unsigned int*)(0x42CE0A9CUL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A8 *((volatile unsigned int*)(0x42CE0AA0UL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A9 *((volatile unsigned int*)(0x42CE0AA4UL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A10 *((volatile unsigned int*)(0x42CE0AA8UL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A11 *((volatile unsigned int*)(0x42CE0AACUL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A12 *((volatile unsigned int*)(0x42CE0AB0UL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A13 *((volatile unsigned int*)(0x42CE0AB4UL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A14 *((volatile unsigned int*)(0x42CE0AB8UL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A15 *((volatile unsigned int*)(0x42CE0ABCUL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A16 *((volatile unsigned int*)(0x42CE0AC0UL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A17 *((volatile unsigned int*)(0x42CE0AC4UL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A18 *((volatile unsigned int*)(0x42CE0AC8UL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A19 *((volatile unsigned int*)(0x42CE0ACCUL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A20 *((volatile unsigned int*)(0x42CE0AD0UL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A21 *((volatile unsigned int*)(0x42CE0AD4UL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A22 *((volatile unsigned int*)(0x42CE0AD8UL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A23 *((volatile unsigned int*)(0x42CE0ADCUL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A24 *((volatile unsigned int*)(0x42CE0AE0UL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A25 *((volatile unsigned int*)(0x42CE0AE4UL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A26 *((volatile unsigned int*)(0x42CE0AE8UL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A27 *((volatile unsigned int*)(0x42CE0AECUL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A28 *((volatile unsigned int*)(0x42CE0AF0UL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A29 *((volatile unsigned int*)(0x42CE0AF4UL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A30 *((volatile unsigned int*)(0x42CE0AF8UL))
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#define bFM3_ETHERNET_MAC1_MAR2L_A31 *((volatile unsigned int*)(0x42CE0AFCUL))
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#define bFM3_ETHERNET_MAC1_MAR3H_A32 *((volatile unsigned int*)(0x42CE0B00UL))
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#define bFM3_ETHERNET_MAC1_MAR3H_A33 *((volatile unsigned int*)(0x42CE0B04UL))
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#define bFM3_ETHERNET_MAC1_MAR3H_A34 *((volatile unsigned int*)(0x42CE0B08UL))
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#define bFM3_ETHERNET_MAC1_MAR3H_A35 *((volatile unsigned int*)(0x42CE0B0CUL))
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#define bFM3_ETHERNET_MAC1_MAR3H_A36 *((volatile unsigned int*)(0x42CE0B10UL))
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#define bFM3_ETHERNET_MAC1_MAR3H_A37 *((volatile unsigned int*)(0x42CE0B14UL))
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#define bFM3_ETHERNET_MAC1_MAR3H_A38 *((volatile unsigned int*)(0x42CE0B18UL))
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#define bFM3_ETHERNET_MAC1_MAR3H_A39 *((volatile unsigned int*)(0x42CE0B1CUL))
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#define bFM3_ETHERNET_MAC1_MAR3H_A40 *((volatile unsigned int*)(0x42CE0B20UL))
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#define bFM3_ETHERNET_MAC1_MAR3H_A41 *((volatile unsigned int*)(0x42CE0B24UL))
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#define bFM3_ETHERNET_MAC1_MAR3H_A42 *((volatile unsigned int*)(0x42CE0B28UL))
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#define bFM3_ETHERNET_MAC1_MAR3H_A43 *((volatile unsigned int*)(0x42CE0B2CUL))
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#define bFM3_ETHERNET_MAC1_MAR3H_A44 *((volatile unsigned int*)(0x42CE0B30UL))
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#define bFM3_ETHERNET_MAC1_MAR3H_A45 *((volatile unsigned int*)(0x42CE0B34UL))
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#define bFM3_ETHERNET_MAC1_MAR3H_A46 *((volatile unsigned int*)(0x42CE0B38UL))
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#define bFM3_ETHERNET_MAC1_MAR3H_A47 *((volatile unsigned int*)(0x42CE0B3CUL))
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#define bFM3_ETHERNET_MAC1_MAR3H_MBC0 *((volatile unsigned int*)(0x42CE0B60UL))
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#define bFM3_ETHERNET_MAC1_MAR3H_MBC1 *((volatile unsigned int*)(0x42CE0B64UL))
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#define bFM3_ETHERNET_MAC1_MAR3H_MBC2 *((volatile unsigned int*)(0x42CE0B68UL))
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#define bFM3_ETHERNET_MAC1_MAR3H_MBC3 *((volatile unsigned int*)(0x42CE0B6CUL))
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#define bFM3_ETHERNET_MAC1_MAR3H_MBC4 *((volatile unsigned int*)(0x42CE0B70UL))
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#define bFM3_ETHERNET_MAC1_MAR3H_MBC5 *((volatile unsigned int*)(0x42CE0B74UL))
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#define bFM3_ETHERNET_MAC1_MAR3H_SA *((volatile unsigned int*)(0x42CE0B78UL))
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#define bFM3_ETHERNET_MAC1_MAR3H_AE *((volatile unsigned int*)(0x42CE0B7CUL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A0 *((volatile unsigned int*)(0x42CE0B80UL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A1 *((volatile unsigned int*)(0x42CE0B84UL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A2 *((volatile unsigned int*)(0x42CE0B88UL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A3 *((volatile unsigned int*)(0x42CE0B8CUL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A4 *((volatile unsigned int*)(0x42CE0B90UL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A5 *((volatile unsigned int*)(0x42CE0B94UL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A6 *((volatile unsigned int*)(0x42CE0B98UL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A7 *((volatile unsigned int*)(0x42CE0B9CUL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A8 *((volatile unsigned int*)(0x42CE0BA0UL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A9 *((volatile unsigned int*)(0x42CE0BA4UL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A10 *((volatile unsigned int*)(0x42CE0BA8UL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A11 *((volatile unsigned int*)(0x42CE0BACUL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A12 *((volatile unsigned int*)(0x42CE0BB0UL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A13 *((volatile unsigned int*)(0x42CE0BB4UL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A14 *((volatile unsigned int*)(0x42CE0BB8UL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A15 *((volatile unsigned int*)(0x42CE0BBCUL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A16 *((volatile unsigned int*)(0x42CE0BC0UL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A17 *((volatile unsigned int*)(0x42CE0BC4UL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A18 *((volatile unsigned int*)(0x42CE0BC8UL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A19 *((volatile unsigned int*)(0x42CE0BCCUL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A20 *((volatile unsigned int*)(0x42CE0BD0UL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A21 *((volatile unsigned int*)(0x42CE0BD4UL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A22 *((volatile unsigned int*)(0x42CE0BD8UL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A23 *((volatile unsigned int*)(0x42CE0BDCUL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A24 *((volatile unsigned int*)(0x42CE0BE0UL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A25 *((volatile unsigned int*)(0x42CE0BE4UL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A26 *((volatile unsigned int*)(0x42CE0BE8UL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A27 *((volatile unsigned int*)(0x42CE0BECUL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A28 *((volatile unsigned int*)(0x42CE0BF0UL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A29 *((volatile unsigned int*)(0x42CE0BF4UL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A30 *((volatile unsigned int*)(0x42CE0BF8UL))
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#define bFM3_ETHERNET_MAC1_MAR3L_A31 *((volatile unsigned int*)(0x42CE0BFCUL))
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#define bFM3_ETHERNET_MAC1_MAR4H_A32 *((volatile unsigned int*)(0x42CE0C00UL))
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#define bFM3_ETHERNET_MAC1_MAR4H_A33 *((volatile unsigned int*)(0x42CE0C04UL))
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#define bFM3_ETHERNET_MAC1_MAR4H_A34 *((volatile unsigned int*)(0x42CE0C08UL))
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#define bFM3_ETHERNET_MAC1_MAR4H_A35 *((volatile unsigned int*)(0x42CE0C0CUL))
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#define bFM3_ETHERNET_MAC1_MAR4H_A36 *((volatile unsigned int*)(0x42CE0C10UL))
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#define bFM3_ETHERNET_MAC1_MAR4H_A37 *((volatile unsigned int*)(0x42CE0C14UL))
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#define bFM3_ETHERNET_MAC1_MAR4H_A38 *((volatile unsigned int*)(0x42CE0C18UL))
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#define bFM3_ETHERNET_MAC1_MAR4H_A39 *((volatile unsigned int*)(0x42CE0C1CUL))
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#define bFM3_ETHERNET_MAC1_MAR4H_A40 *((volatile unsigned int*)(0x42CE0C20UL))
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#define bFM3_ETHERNET_MAC1_MAR4H_A41 *((volatile unsigned int*)(0x42CE0C24UL))
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#define bFM3_ETHERNET_MAC1_MAR4H_A42 *((volatile unsigned int*)(0x42CE0C28UL))
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#define bFM3_ETHERNET_MAC1_MAR4H_A43 *((volatile unsigned int*)(0x42CE0C2CUL))
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#define bFM3_ETHERNET_MAC1_MAR4H_A44 *((volatile unsigned int*)(0x42CE0C30UL))
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#define bFM3_ETHERNET_MAC1_MAR4H_A45 *((volatile unsigned int*)(0x42CE0C34UL))
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#define bFM3_ETHERNET_MAC1_MAR4H_A46 *((volatile unsigned int*)(0x42CE0C38UL))
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#define bFM3_ETHERNET_MAC1_MAR4H_A47 *((volatile unsigned int*)(0x42CE0C3CUL))
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#define bFM3_ETHERNET_MAC1_MAR4H_MBC0 *((volatile unsigned int*)(0x42CE0C60UL))
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#define bFM3_ETHERNET_MAC1_MAR4H_MBC1 *((volatile unsigned int*)(0x42CE0C64UL))
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#define bFM3_ETHERNET_MAC1_MAR4H_MBC2 *((volatile unsigned int*)(0x42CE0C68UL))
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#define bFM3_ETHERNET_MAC1_MAR4H_MBC3 *((volatile unsigned int*)(0x42CE0C6CUL))
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#define bFM3_ETHERNET_MAC1_MAR4H_MBC4 *((volatile unsigned int*)(0x42CE0C70UL))
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#define bFM3_ETHERNET_MAC1_MAR4H_MBC5 *((volatile unsigned int*)(0x42CE0C74UL))
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#define bFM3_ETHERNET_MAC1_MAR4H_SA *((volatile unsigned int*)(0x42CE0C78UL))
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#define bFM3_ETHERNET_MAC1_MAR4H_AE *((volatile unsigned int*)(0x42CE0C7CUL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A0 *((volatile unsigned int*)(0x42CE0C80UL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A1 *((volatile unsigned int*)(0x42CE0C84UL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A2 *((volatile unsigned int*)(0x42CE0C88UL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A3 *((volatile unsigned int*)(0x42CE0C8CUL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A4 *((volatile unsigned int*)(0x42CE0C90UL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A5 *((volatile unsigned int*)(0x42CE0C94UL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A6 *((volatile unsigned int*)(0x42CE0C98UL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A7 *((volatile unsigned int*)(0x42CE0C9CUL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A8 *((volatile unsigned int*)(0x42CE0CA0UL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A9 *((volatile unsigned int*)(0x42CE0CA4UL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A10 *((volatile unsigned int*)(0x42CE0CA8UL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A11 *((volatile unsigned int*)(0x42CE0CACUL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A12 *((volatile unsigned int*)(0x42CE0CB0UL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A13 *((volatile unsigned int*)(0x42CE0CB4UL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A14 *((volatile unsigned int*)(0x42CE0CB8UL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A15 *((volatile unsigned int*)(0x42CE0CBCUL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A16 *((volatile unsigned int*)(0x42CE0CC0UL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A17 *((volatile unsigned int*)(0x42CE0CC4UL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A18 *((volatile unsigned int*)(0x42CE0CC8UL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A19 *((volatile unsigned int*)(0x42CE0CCCUL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A20 *((volatile unsigned int*)(0x42CE0CD0UL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A21 *((volatile unsigned int*)(0x42CE0CD4UL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A22 *((volatile unsigned int*)(0x42CE0CD8UL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A23 *((volatile unsigned int*)(0x42CE0CDCUL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A24 *((volatile unsigned int*)(0x42CE0CE0UL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A25 *((volatile unsigned int*)(0x42CE0CE4UL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A26 *((volatile unsigned int*)(0x42CE0CE8UL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A27 *((volatile unsigned int*)(0x42CE0CECUL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A28 *((volatile unsigned int*)(0x42CE0CF0UL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A29 *((volatile unsigned int*)(0x42CE0CF4UL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A30 *((volatile unsigned int*)(0x42CE0CF8UL))
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#define bFM3_ETHERNET_MAC1_MAR4L_A31 *((volatile unsigned int*)(0x42CE0CFCUL))
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#define bFM3_ETHERNET_MAC1_MAR5H_A32 *((volatile unsigned int*)(0x42CE0D00UL))
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#define bFM3_ETHERNET_MAC1_MAR5H_A33 *((volatile unsigned int*)(0x42CE0D04UL))
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#define bFM3_ETHERNET_MAC1_MAR5H_A34 *((volatile unsigned int*)(0x42CE0D08UL))
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#define bFM3_ETHERNET_MAC1_MAR5H_A35 *((volatile unsigned int*)(0x42CE0D0CUL))
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#define bFM3_ETHERNET_MAC1_MAR5H_A36 *((volatile unsigned int*)(0x42CE0D10UL))
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#define bFM3_ETHERNET_MAC1_MAR5H_A37 *((volatile unsigned int*)(0x42CE0D14UL))
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#define bFM3_ETHERNET_MAC1_MAR5H_A38 *((volatile unsigned int*)(0x42CE0D18UL))
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#define bFM3_ETHERNET_MAC1_MAR5H_A39 *((volatile unsigned int*)(0x42CE0D1CUL))
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#define bFM3_ETHERNET_MAC1_MAR5H_A40 *((volatile unsigned int*)(0x42CE0D20UL))
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#define bFM3_ETHERNET_MAC1_MAR5H_A41 *((volatile unsigned int*)(0x42CE0D24UL))
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#define bFM3_ETHERNET_MAC1_MAR5H_A42 *((volatile unsigned int*)(0x42CE0D28UL))
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#define bFM3_ETHERNET_MAC1_MAR5H_A43 *((volatile unsigned int*)(0x42CE0D2CUL))
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#define bFM3_ETHERNET_MAC1_MAR5H_A44 *((volatile unsigned int*)(0x42CE0D30UL))
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#define bFM3_ETHERNET_MAC1_MAR5H_A45 *((volatile unsigned int*)(0x42CE0D34UL))
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#define bFM3_ETHERNET_MAC1_MAR5H_A46 *((volatile unsigned int*)(0x42CE0D38UL))
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#define bFM3_ETHERNET_MAC1_MAR5H_A47 *((volatile unsigned int*)(0x42CE0D3CUL))
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#define bFM3_ETHERNET_MAC1_MAR5H_MBC0 *((volatile unsigned int*)(0x42CE0D60UL))
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#define bFM3_ETHERNET_MAC1_MAR5H_MBC1 *((volatile unsigned int*)(0x42CE0D64UL))
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#define bFM3_ETHERNET_MAC1_MAR5H_MBC2 *((volatile unsigned int*)(0x42CE0D68UL))
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#define bFM3_ETHERNET_MAC1_MAR5H_MBC3 *((volatile unsigned int*)(0x42CE0D6CUL))
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#define bFM3_ETHERNET_MAC1_MAR5H_MBC4 *((volatile unsigned int*)(0x42CE0D70UL))
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#define bFM3_ETHERNET_MAC1_MAR5H_MBC5 *((volatile unsigned int*)(0x42CE0D74UL))
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#define bFM3_ETHERNET_MAC1_MAR5H_SA *((volatile unsigned int*)(0x42CE0D78UL))
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#define bFM3_ETHERNET_MAC1_MAR5H_AE *((volatile unsigned int*)(0x42CE0D7CUL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A0 *((volatile unsigned int*)(0x42CE0D80UL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A1 *((volatile unsigned int*)(0x42CE0D84UL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A2 *((volatile unsigned int*)(0x42CE0D88UL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A3 *((volatile unsigned int*)(0x42CE0D8CUL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A4 *((volatile unsigned int*)(0x42CE0D90UL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A5 *((volatile unsigned int*)(0x42CE0D94UL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A6 *((volatile unsigned int*)(0x42CE0D98UL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A7 *((volatile unsigned int*)(0x42CE0D9CUL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A8 *((volatile unsigned int*)(0x42CE0DA0UL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A9 *((volatile unsigned int*)(0x42CE0DA4UL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A10 *((volatile unsigned int*)(0x42CE0DA8UL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A11 *((volatile unsigned int*)(0x42CE0DACUL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A12 *((volatile unsigned int*)(0x42CE0DB0UL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A13 *((volatile unsigned int*)(0x42CE0DB4UL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A14 *((volatile unsigned int*)(0x42CE0DB8UL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A15 *((volatile unsigned int*)(0x42CE0DBCUL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A16 *((volatile unsigned int*)(0x42CE0DC0UL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A17 *((volatile unsigned int*)(0x42CE0DC4UL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A18 *((volatile unsigned int*)(0x42CE0DC8UL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A19 *((volatile unsigned int*)(0x42CE0DCCUL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A20 *((volatile unsigned int*)(0x42CE0DD0UL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A21 *((volatile unsigned int*)(0x42CE0DD4UL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A22 *((volatile unsigned int*)(0x42CE0DD8UL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A23 *((volatile unsigned int*)(0x42CE0DDCUL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A24 *((volatile unsigned int*)(0x42CE0DE0UL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A25 *((volatile unsigned int*)(0x42CE0DE4UL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A26 *((volatile unsigned int*)(0x42CE0DE8UL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A27 *((volatile unsigned int*)(0x42CE0DECUL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A28 *((volatile unsigned int*)(0x42CE0DF0UL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A29 *((volatile unsigned int*)(0x42CE0DF4UL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A30 *((volatile unsigned int*)(0x42CE0DF8UL))
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#define bFM3_ETHERNET_MAC1_MAR5L_A31 *((volatile unsigned int*)(0x42CE0DFCUL))
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#define bFM3_ETHERNET_MAC1_MAR6H_A32 *((volatile unsigned int*)(0x42CE0E00UL))
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#define bFM3_ETHERNET_MAC1_MAR6H_A33 *((volatile unsigned int*)(0x42CE0E04UL))
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#define bFM3_ETHERNET_MAC1_MAR6H_A34 *((volatile unsigned int*)(0x42CE0E08UL))
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#define bFM3_ETHERNET_MAC1_MAR6H_A35 *((volatile unsigned int*)(0x42CE0E0CUL))
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#define bFM3_ETHERNET_MAC1_MAR6H_A36 *((volatile unsigned int*)(0x42CE0E10UL))
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#define bFM3_ETHERNET_MAC1_MAR6H_A37 *((volatile unsigned int*)(0x42CE0E14UL))
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#define bFM3_ETHERNET_MAC1_MAR6H_A38 *((volatile unsigned int*)(0x42CE0E18UL))
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#define bFM3_ETHERNET_MAC1_MAR6H_A39 *((volatile unsigned int*)(0x42CE0E1CUL))
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#define bFM3_ETHERNET_MAC1_MAR6H_A40 *((volatile unsigned int*)(0x42CE0E20UL))
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#define bFM3_ETHERNET_MAC1_MAR6H_A41 *((volatile unsigned int*)(0x42CE0E24UL))
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#define bFM3_ETHERNET_MAC1_MAR6H_A42 *((volatile unsigned int*)(0x42CE0E28UL))
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#define bFM3_ETHERNET_MAC1_MAR6H_A43 *((volatile unsigned int*)(0x42CE0E2CUL))
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#define bFM3_ETHERNET_MAC1_MAR6H_A44 *((volatile unsigned int*)(0x42CE0E30UL))
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#define bFM3_ETHERNET_MAC1_MAR6H_A45 *((volatile unsigned int*)(0x42CE0E34UL))
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#define bFM3_ETHERNET_MAC1_MAR6H_A46 *((volatile unsigned int*)(0x42CE0E38UL))
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#define bFM3_ETHERNET_MAC1_MAR6H_A47 *((volatile unsigned int*)(0x42CE0E3CUL))
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#define bFM3_ETHERNET_MAC1_MAR6H_MBC0 *((volatile unsigned int*)(0x42CE0E60UL))
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#define bFM3_ETHERNET_MAC1_MAR6H_MBC1 *((volatile unsigned int*)(0x42CE0E64UL))
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#define bFM3_ETHERNET_MAC1_MAR6H_MBC2 *((volatile unsigned int*)(0x42CE0E68UL))
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#define bFM3_ETHERNET_MAC1_MAR6H_MBC3 *((volatile unsigned int*)(0x42CE0E6CUL))
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#define bFM3_ETHERNET_MAC1_MAR6H_MBC4 *((volatile unsigned int*)(0x42CE0E70UL))
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#define bFM3_ETHERNET_MAC1_MAR6H_MBC5 *((volatile unsigned int*)(0x42CE0E74UL))
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#define bFM3_ETHERNET_MAC1_MAR6H_SA *((volatile unsigned int*)(0x42CE0E78UL))
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#define bFM3_ETHERNET_MAC1_MAR6H_AE *((volatile unsigned int*)(0x42CE0E7CUL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A0 *((volatile unsigned int*)(0x42CE0E80UL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A1 *((volatile unsigned int*)(0x42CE0E84UL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A2 *((volatile unsigned int*)(0x42CE0E88UL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A3 *((volatile unsigned int*)(0x42CE0E8CUL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A4 *((volatile unsigned int*)(0x42CE0E90UL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A5 *((volatile unsigned int*)(0x42CE0E94UL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A6 *((volatile unsigned int*)(0x42CE0E98UL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A7 *((volatile unsigned int*)(0x42CE0E9CUL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A8 *((volatile unsigned int*)(0x42CE0EA0UL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A9 *((volatile unsigned int*)(0x42CE0EA4UL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A10 *((volatile unsigned int*)(0x42CE0EA8UL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A11 *((volatile unsigned int*)(0x42CE0EACUL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A12 *((volatile unsigned int*)(0x42CE0EB0UL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A13 *((volatile unsigned int*)(0x42CE0EB4UL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A14 *((volatile unsigned int*)(0x42CE0EB8UL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A15 *((volatile unsigned int*)(0x42CE0EBCUL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A16 *((volatile unsigned int*)(0x42CE0EC0UL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A17 *((volatile unsigned int*)(0x42CE0EC4UL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A18 *((volatile unsigned int*)(0x42CE0EC8UL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A19 *((volatile unsigned int*)(0x42CE0ECCUL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A20 *((volatile unsigned int*)(0x42CE0ED0UL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A21 *((volatile unsigned int*)(0x42CE0ED4UL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A22 *((volatile unsigned int*)(0x42CE0ED8UL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A23 *((volatile unsigned int*)(0x42CE0EDCUL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A24 *((volatile unsigned int*)(0x42CE0EE0UL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A25 *((volatile unsigned int*)(0x42CE0EE4UL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A26 *((volatile unsigned int*)(0x42CE0EE8UL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A27 *((volatile unsigned int*)(0x42CE0EECUL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A28 *((volatile unsigned int*)(0x42CE0EF0UL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A29 *((volatile unsigned int*)(0x42CE0EF4UL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A30 *((volatile unsigned int*)(0x42CE0EF8UL))
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#define bFM3_ETHERNET_MAC1_MAR6L_A31 *((volatile unsigned int*)(0x42CE0EFCUL))
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#define bFM3_ETHERNET_MAC1_MAR7H_A32 *((volatile unsigned int*)(0x42CE0F00UL))
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#define bFM3_ETHERNET_MAC1_MAR7H_A33 *((volatile unsigned int*)(0x42CE0F04UL))
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#define bFM3_ETHERNET_MAC1_MAR7H_A34 *((volatile unsigned int*)(0x42CE0F08UL))
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#define bFM3_ETHERNET_MAC1_MAR7H_A35 *((volatile unsigned int*)(0x42CE0F0CUL))
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#define bFM3_ETHERNET_MAC1_MAR7H_A36 *((volatile unsigned int*)(0x42CE0F10UL))
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#define bFM3_ETHERNET_MAC1_MAR7H_A37 *((volatile unsigned int*)(0x42CE0F14UL))
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#define bFM3_ETHERNET_MAC1_MAR7H_A38 *((volatile unsigned int*)(0x42CE0F18UL))
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#define bFM3_ETHERNET_MAC1_MAR7H_A39 *((volatile unsigned int*)(0x42CE0F1CUL))
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#define bFM3_ETHERNET_MAC1_MAR7H_A40 *((volatile unsigned int*)(0x42CE0F20UL))
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#define bFM3_ETHERNET_MAC1_MAR7H_A41 *((volatile unsigned int*)(0x42CE0F24UL))
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#define bFM3_ETHERNET_MAC1_MAR7H_A42 *((volatile unsigned int*)(0x42CE0F28UL))
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#define bFM3_ETHERNET_MAC1_MAR7H_A43 *((volatile unsigned int*)(0x42CE0F2CUL))
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#define bFM3_ETHERNET_MAC1_MAR7H_A44 *((volatile unsigned int*)(0x42CE0F30UL))
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#define bFM3_ETHERNET_MAC1_MAR7H_A45 *((volatile unsigned int*)(0x42CE0F34UL))
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#define bFM3_ETHERNET_MAC1_MAR7H_A46 *((volatile unsigned int*)(0x42CE0F38UL))
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#define bFM3_ETHERNET_MAC1_MAR7H_A47 *((volatile unsigned int*)(0x42CE0F3CUL))
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#define bFM3_ETHERNET_MAC1_MAR7H_MBC0 *((volatile unsigned int*)(0x42CE0F60UL))
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#define bFM3_ETHERNET_MAC1_MAR7H_MBC1 *((volatile unsigned int*)(0x42CE0F64UL))
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#define bFM3_ETHERNET_MAC1_MAR7H_MBC2 *((volatile unsigned int*)(0x42CE0F68UL))
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#define bFM3_ETHERNET_MAC1_MAR7H_MBC3 *((volatile unsigned int*)(0x42CE0F6CUL))
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#define bFM3_ETHERNET_MAC1_MAR7H_MBC4 *((volatile unsigned int*)(0x42CE0F70UL))
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#define bFM3_ETHERNET_MAC1_MAR7H_MBC5 *((volatile unsigned int*)(0x42CE0F74UL))
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#define bFM3_ETHERNET_MAC1_MAR7H_SA *((volatile unsigned int*)(0x42CE0F78UL))
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#define bFM3_ETHERNET_MAC1_MAR7H_AE *((volatile unsigned int*)(0x42CE0F7CUL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A0 *((volatile unsigned int*)(0x42CE0F80UL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A1 *((volatile unsigned int*)(0x42CE0F84UL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A2 *((volatile unsigned int*)(0x42CE0F88UL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A3 *((volatile unsigned int*)(0x42CE0F8CUL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A4 *((volatile unsigned int*)(0x42CE0F90UL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A5 *((volatile unsigned int*)(0x42CE0F94UL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A6 *((volatile unsigned int*)(0x42CE0F98UL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A7 *((volatile unsigned int*)(0x42CE0F9CUL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A8 *((volatile unsigned int*)(0x42CE0FA0UL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A9 *((volatile unsigned int*)(0x42CE0FA4UL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A10 *((volatile unsigned int*)(0x42CE0FA8UL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A11 *((volatile unsigned int*)(0x42CE0FACUL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A12 *((volatile unsigned int*)(0x42CE0FB0UL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A13 *((volatile unsigned int*)(0x42CE0FB4UL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A14 *((volatile unsigned int*)(0x42CE0FB8UL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A15 *((volatile unsigned int*)(0x42CE0FBCUL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A16 *((volatile unsigned int*)(0x42CE0FC0UL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A17 *((volatile unsigned int*)(0x42CE0FC4UL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A18 *((volatile unsigned int*)(0x42CE0FC8UL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A19 *((volatile unsigned int*)(0x42CE0FCCUL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A20 *((volatile unsigned int*)(0x42CE0FD0UL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A21 *((volatile unsigned int*)(0x42CE0FD4UL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A22 *((volatile unsigned int*)(0x42CE0FD8UL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A23 *((volatile unsigned int*)(0x42CE0FDCUL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A24 *((volatile unsigned int*)(0x42CE0FE0UL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A25 *((volatile unsigned int*)(0x42CE0FE4UL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A26 *((volatile unsigned int*)(0x42CE0FE8UL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A27 *((volatile unsigned int*)(0x42CE0FECUL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A28 *((volatile unsigned int*)(0x42CE0FF0UL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A29 *((volatile unsigned int*)(0x42CE0FF4UL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A30 *((volatile unsigned int*)(0x42CE0FF8UL))
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#define bFM3_ETHERNET_MAC1_MAR7L_A31 *((volatile unsigned int*)(0x42CE0FFCUL))
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#define bFM3_ETHERNET_MAC1_MAR8H_A32 *((volatile unsigned int*)(0x42CE1000UL))
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#define bFM3_ETHERNET_MAC1_MAR8H_A33 *((volatile unsigned int*)(0x42CE1004UL))
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#define bFM3_ETHERNET_MAC1_MAR8H_A34 *((volatile unsigned int*)(0x42CE1008UL))
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#define bFM3_ETHERNET_MAC1_MAR8H_A35 *((volatile unsigned int*)(0x42CE100CUL))
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#define bFM3_ETHERNET_MAC1_MAR8H_A36 *((volatile unsigned int*)(0x42CE1010UL))
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#define bFM3_ETHERNET_MAC1_MAR8H_A37 *((volatile unsigned int*)(0x42CE1014UL))
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#define bFM3_ETHERNET_MAC1_MAR8H_A38 *((volatile unsigned int*)(0x42CE1018UL))
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#define bFM3_ETHERNET_MAC1_MAR8H_A39 *((volatile unsigned int*)(0x42CE101CUL))
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#define bFM3_ETHERNET_MAC1_MAR8H_A40 *((volatile unsigned int*)(0x42CE1020UL))
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#define bFM3_ETHERNET_MAC1_MAR8H_A41 *((volatile unsigned int*)(0x42CE1024UL))
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#define bFM3_ETHERNET_MAC1_MAR8H_A42 *((volatile unsigned int*)(0x42CE1028UL))
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#define bFM3_ETHERNET_MAC1_MAR8H_A43 *((volatile unsigned int*)(0x42CE102CUL))
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#define bFM3_ETHERNET_MAC1_MAR8H_A44 *((volatile unsigned int*)(0x42CE1030UL))
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#define bFM3_ETHERNET_MAC1_MAR8H_A45 *((volatile unsigned int*)(0x42CE1034UL))
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#define bFM3_ETHERNET_MAC1_MAR8H_A46 *((volatile unsigned int*)(0x42CE1038UL))
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#define bFM3_ETHERNET_MAC1_MAR8H_A47 *((volatile unsigned int*)(0x42CE103CUL))
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#define bFM3_ETHERNET_MAC1_MAR8H_MBC0 *((volatile unsigned int*)(0x42CE1060UL))
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#define bFM3_ETHERNET_MAC1_MAR8H_MBC1 *((volatile unsigned int*)(0x42CE1064UL))
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#define bFM3_ETHERNET_MAC1_MAR8H_MBC2 *((volatile unsigned int*)(0x42CE1068UL))
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#define bFM3_ETHERNET_MAC1_MAR8H_MBC3 *((volatile unsigned int*)(0x42CE106CUL))
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#define bFM3_ETHERNET_MAC1_MAR8H_MBC4 *((volatile unsigned int*)(0x42CE1070UL))
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|
#define bFM3_ETHERNET_MAC1_MAR8H_MBC5 *((volatile unsigned int*)(0x42CE1074UL))
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#define bFM3_ETHERNET_MAC1_MAR8H_SA *((volatile unsigned int*)(0x42CE1078UL))
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#define bFM3_ETHERNET_MAC1_MAR8H_AE *((volatile unsigned int*)(0x42CE107CUL))
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|
#define bFM3_ETHERNET_MAC1_MAR8L_A0 *((volatile unsigned int*)(0x42CE1080UL))
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|
#define bFM3_ETHERNET_MAC1_MAR8L_A1 *((volatile unsigned int*)(0x42CE1084UL))
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#define bFM3_ETHERNET_MAC1_MAR8L_A2 *((volatile unsigned int*)(0x42CE1088UL))
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|
#define bFM3_ETHERNET_MAC1_MAR8L_A3 *((volatile unsigned int*)(0x42CE108CUL))
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#define bFM3_ETHERNET_MAC1_MAR8L_A4 *((volatile unsigned int*)(0x42CE1090UL))
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|
#define bFM3_ETHERNET_MAC1_MAR8L_A5 *((volatile unsigned int*)(0x42CE1094UL))
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|
#define bFM3_ETHERNET_MAC1_MAR8L_A6 *((volatile unsigned int*)(0x42CE1098UL))
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|
#define bFM3_ETHERNET_MAC1_MAR8L_A7 *((volatile unsigned int*)(0x42CE109CUL))
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#define bFM3_ETHERNET_MAC1_MAR8L_A8 *((volatile unsigned int*)(0x42CE10A0UL))
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|
#define bFM3_ETHERNET_MAC1_MAR8L_A9 *((volatile unsigned int*)(0x42CE10A4UL))
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|
#define bFM3_ETHERNET_MAC1_MAR8L_A10 *((volatile unsigned int*)(0x42CE10A8UL))
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|
#define bFM3_ETHERNET_MAC1_MAR8L_A11 *((volatile unsigned int*)(0x42CE10ACUL))
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|
#define bFM3_ETHERNET_MAC1_MAR8L_A12 *((volatile unsigned int*)(0x42CE10B0UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR8L_A13 *((volatile unsigned int*)(0x42CE10B4UL))
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|
#define bFM3_ETHERNET_MAC1_MAR8L_A14 *((volatile unsigned int*)(0x42CE10B8UL))
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|
#define bFM3_ETHERNET_MAC1_MAR8L_A15 *((volatile unsigned int*)(0x42CE10BCUL))
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|
#define bFM3_ETHERNET_MAC1_MAR8L_A16 *((volatile unsigned int*)(0x42CE10C0UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR8L_A17 *((volatile unsigned int*)(0x42CE10C4UL))
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|
#define bFM3_ETHERNET_MAC1_MAR8L_A18 *((volatile unsigned int*)(0x42CE10C8UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR8L_A19 *((volatile unsigned int*)(0x42CE10CCUL))
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|
#define bFM3_ETHERNET_MAC1_MAR8L_A20 *((volatile unsigned int*)(0x42CE10D0UL))
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|
#define bFM3_ETHERNET_MAC1_MAR8L_A21 *((volatile unsigned int*)(0x42CE10D4UL))
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|
#define bFM3_ETHERNET_MAC1_MAR8L_A22 *((volatile unsigned int*)(0x42CE10D8UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR8L_A23 *((volatile unsigned int*)(0x42CE10DCUL))
|
|
#define bFM3_ETHERNET_MAC1_MAR8L_A24 *((volatile unsigned int*)(0x42CE10E0UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR8L_A25 *((volatile unsigned int*)(0x42CE10E4UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR8L_A26 *((volatile unsigned int*)(0x42CE10E8UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR8L_A27 *((volatile unsigned int*)(0x42CE10ECUL))
|
|
#define bFM3_ETHERNET_MAC1_MAR8L_A28 *((volatile unsigned int*)(0x42CE10F0UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR8L_A29 *((volatile unsigned int*)(0x42CE10F4UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR8L_A30 *((volatile unsigned int*)(0x42CE10F8UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR8L_A31 *((volatile unsigned int*)(0x42CE10FCUL))
|
|
#define bFM3_ETHERNET_MAC1_MAR9H_A32 *((volatile unsigned int*)(0x42CE1100UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR9H_A33 *((volatile unsigned int*)(0x42CE1104UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR9H_A34 *((volatile unsigned int*)(0x42CE1108UL))
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#define bFM3_ETHERNET_MAC1_MAR9H_A35 *((volatile unsigned int*)(0x42CE110CUL))
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#define bFM3_ETHERNET_MAC1_MAR9H_A36 *((volatile unsigned int*)(0x42CE1110UL))
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#define bFM3_ETHERNET_MAC1_MAR9H_A37 *((volatile unsigned int*)(0x42CE1114UL))
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#define bFM3_ETHERNET_MAC1_MAR9H_A38 *((volatile unsigned int*)(0x42CE1118UL))
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#define bFM3_ETHERNET_MAC1_MAR9H_A39 *((volatile unsigned int*)(0x42CE111CUL))
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#define bFM3_ETHERNET_MAC1_MAR9H_A40 *((volatile unsigned int*)(0x42CE1120UL))
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#define bFM3_ETHERNET_MAC1_MAR9H_A41 *((volatile unsigned int*)(0x42CE1124UL))
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#define bFM3_ETHERNET_MAC1_MAR9H_A42 *((volatile unsigned int*)(0x42CE1128UL))
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#define bFM3_ETHERNET_MAC1_MAR9H_A43 *((volatile unsigned int*)(0x42CE112CUL))
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#define bFM3_ETHERNET_MAC1_MAR9H_A44 *((volatile unsigned int*)(0x42CE1130UL))
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#define bFM3_ETHERNET_MAC1_MAR9H_A45 *((volatile unsigned int*)(0x42CE1134UL))
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#define bFM3_ETHERNET_MAC1_MAR9H_A46 *((volatile unsigned int*)(0x42CE1138UL))
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#define bFM3_ETHERNET_MAC1_MAR9H_A47 *((volatile unsigned int*)(0x42CE113CUL))
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#define bFM3_ETHERNET_MAC1_MAR9H_MBC0 *((volatile unsigned int*)(0x42CE1160UL))
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#define bFM3_ETHERNET_MAC1_MAR9H_MBC1 *((volatile unsigned int*)(0x42CE1164UL))
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#define bFM3_ETHERNET_MAC1_MAR9H_MBC2 *((volatile unsigned int*)(0x42CE1168UL))
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#define bFM3_ETHERNET_MAC1_MAR9H_MBC3 *((volatile unsigned int*)(0x42CE116CUL))
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#define bFM3_ETHERNET_MAC1_MAR9H_MBC4 *((volatile unsigned int*)(0x42CE1170UL))
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#define bFM3_ETHERNET_MAC1_MAR9H_MBC5 *((volatile unsigned int*)(0x42CE1174UL))
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#define bFM3_ETHERNET_MAC1_MAR9H_SA *((volatile unsigned int*)(0x42CE1178UL))
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#define bFM3_ETHERNET_MAC1_MAR9H_AE *((volatile unsigned int*)(0x42CE117CUL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A0 *((volatile unsigned int*)(0x42CE1180UL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A1 *((volatile unsigned int*)(0x42CE1184UL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A2 *((volatile unsigned int*)(0x42CE1188UL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A3 *((volatile unsigned int*)(0x42CE118CUL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A4 *((volatile unsigned int*)(0x42CE1190UL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A5 *((volatile unsigned int*)(0x42CE1194UL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A6 *((volatile unsigned int*)(0x42CE1198UL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A7 *((volatile unsigned int*)(0x42CE119CUL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A8 *((volatile unsigned int*)(0x42CE11A0UL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A9 *((volatile unsigned int*)(0x42CE11A4UL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A10 *((volatile unsigned int*)(0x42CE11A8UL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A11 *((volatile unsigned int*)(0x42CE11ACUL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A12 *((volatile unsigned int*)(0x42CE11B0UL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A13 *((volatile unsigned int*)(0x42CE11B4UL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A14 *((volatile unsigned int*)(0x42CE11B8UL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A15 *((volatile unsigned int*)(0x42CE11BCUL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A16 *((volatile unsigned int*)(0x42CE11C0UL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A17 *((volatile unsigned int*)(0x42CE11C4UL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A18 *((volatile unsigned int*)(0x42CE11C8UL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A19 *((volatile unsigned int*)(0x42CE11CCUL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A20 *((volatile unsigned int*)(0x42CE11D0UL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A21 *((volatile unsigned int*)(0x42CE11D4UL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A22 *((volatile unsigned int*)(0x42CE11D8UL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A23 *((volatile unsigned int*)(0x42CE11DCUL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A24 *((volatile unsigned int*)(0x42CE11E0UL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A25 *((volatile unsigned int*)(0x42CE11E4UL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A26 *((volatile unsigned int*)(0x42CE11E8UL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A27 *((volatile unsigned int*)(0x42CE11ECUL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A28 *((volatile unsigned int*)(0x42CE11F0UL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A29 *((volatile unsigned int*)(0x42CE11F4UL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A30 *((volatile unsigned int*)(0x42CE11F8UL))
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#define bFM3_ETHERNET_MAC1_MAR9L_A31 *((volatile unsigned int*)(0x42CE11FCUL))
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#define bFM3_ETHERNET_MAC1_MAR10H_A32 *((volatile unsigned int*)(0x42CE1200UL))
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#define bFM3_ETHERNET_MAC1_MAR10H_A33 *((volatile unsigned int*)(0x42CE1204UL))
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#define bFM3_ETHERNET_MAC1_MAR10H_A34 *((volatile unsigned int*)(0x42CE1208UL))
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#define bFM3_ETHERNET_MAC1_MAR10H_A35 *((volatile unsigned int*)(0x42CE120CUL))
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#define bFM3_ETHERNET_MAC1_MAR10H_A36 *((volatile unsigned int*)(0x42CE1210UL))
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#define bFM3_ETHERNET_MAC1_MAR10H_A37 *((volatile unsigned int*)(0x42CE1214UL))
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#define bFM3_ETHERNET_MAC1_MAR10H_A38 *((volatile unsigned int*)(0x42CE1218UL))
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#define bFM3_ETHERNET_MAC1_MAR10H_A39 *((volatile unsigned int*)(0x42CE121CUL))
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#define bFM3_ETHERNET_MAC1_MAR10H_A40 *((volatile unsigned int*)(0x42CE1220UL))
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#define bFM3_ETHERNET_MAC1_MAR10H_A41 *((volatile unsigned int*)(0x42CE1224UL))
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#define bFM3_ETHERNET_MAC1_MAR10H_A42 *((volatile unsigned int*)(0x42CE1228UL))
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#define bFM3_ETHERNET_MAC1_MAR10H_A43 *((volatile unsigned int*)(0x42CE122CUL))
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#define bFM3_ETHERNET_MAC1_MAR10H_A44 *((volatile unsigned int*)(0x42CE1230UL))
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#define bFM3_ETHERNET_MAC1_MAR10H_A45 *((volatile unsigned int*)(0x42CE1234UL))
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#define bFM3_ETHERNET_MAC1_MAR10H_A46 *((volatile unsigned int*)(0x42CE1238UL))
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#define bFM3_ETHERNET_MAC1_MAR10H_A47 *((volatile unsigned int*)(0x42CE123CUL))
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#define bFM3_ETHERNET_MAC1_MAR10H_MBC0 *((volatile unsigned int*)(0x42CE1260UL))
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#define bFM3_ETHERNET_MAC1_MAR10H_MBC1 *((volatile unsigned int*)(0x42CE1264UL))
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|
#define bFM3_ETHERNET_MAC1_MAR10H_MBC2 *((volatile unsigned int*)(0x42CE1268UL))
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|
#define bFM3_ETHERNET_MAC1_MAR10H_MBC3 *((volatile unsigned int*)(0x42CE126CUL))
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#define bFM3_ETHERNET_MAC1_MAR10H_MBC4 *((volatile unsigned int*)(0x42CE1270UL))
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|
#define bFM3_ETHERNET_MAC1_MAR10H_MBC5 *((volatile unsigned int*)(0x42CE1274UL))
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#define bFM3_ETHERNET_MAC1_MAR10H_SA *((volatile unsigned int*)(0x42CE1278UL))
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#define bFM3_ETHERNET_MAC1_MAR10H_AE *((volatile unsigned int*)(0x42CE127CUL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A0 *((volatile unsigned int*)(0x42CE1280UL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A1 *((volatile unsigned int*)(0x42CE1284UL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A2 *((volatile unsigned int*)(0x42CE1288UL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A3 *((volatile unsigned int*)(0x42CE128CUL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A4 *((volatile unsigned int*)(0x42CE1290UL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A5 *((volatile unsigned int*)(0x42CE1294UL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A6 *((volatile unsigned int*)(0x42CE1298UL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A7 *((volatile unsigned int*)(0x42CE129CUL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A8 *((volatile unsigned int*)(0x42CE12A0UL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A9 *((volatile unsigned int*)(0x42CE12A4UL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A10 *((volatile unsigned int*)(0x42CE12A8UL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A11 *((volatile unsigned int*)(0x42CE12ACUL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A12 *((volatile unsigned int*)(0x42CE12B0UL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A13 *((volatile unsigned int*)(0x42CE12B4UL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A14 *((volatile unsigned int*)(0x42CE12B8UL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A15 *((volatile unsigned int*)(0x42CE12BCUL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A16 *((volatile unsigned int*)(0x42CE12C0UL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A17 *((volatile unsigned int*)(0x42CE12C4UL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A18 *((volatile unsigned int*)(0x42CE12C8UL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A19 *((volatile unsigned int*)(0x42CE12CCUL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A20 *((volatile unsigned int*)(0x42CE12D0UL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A21 *((volatile unsigned int*)(0x42CE12D4UL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A22 *((volatile unsigned int*)(0x42CE12D8UL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A23 *((volatile unsigned int*)(0x42CE12DCUL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A24 *((volatile unsigned int*)(0x42CE12E0UL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A25 *((volatile unsigned int*)(0x42CE12E4UL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A26 *((volatile unsigned int*)(0x42CE12E8UL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A27 *((volatile unsigned int*)(0x42CE12ECUL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A28 *((volatile unsigned int*)(0x42CE12F0UL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A29 *((volatile unsigned int*)(0x42CE12F4UL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A30 *((volatile unsigned int*)(0x42CE12F8UL))
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#define bFM3_ETHERNET_MAC1_MAR10L_A31 *((volatile unsigned int*)(0x42CE12FCUL))
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#define bFM3_ETHERNET_MAC1_MAR11H_A32 *((volatile unsigned int*)(0x42CE1300UL))
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#define bFM3_ETHERNET_MAC1_MAR11H_A33 *((volatile unsigned int*)(0x42CE1304UL))
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#define bFM3_ETHERNET_MAC1_MAR11H_A34 *((volatile unsigned int*)(0x42CE1308UL))
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#define bFM3_ETHERNET_MAC1_MAR11H_A35 *((volatile unsigned int*)(0x42CE130CUL))
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#define bFM3_ETHERNET_MAC1_MAR11H_A36 *((volatile unsigned int*)(0x42CE1310UL))
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#define bFM3_ETHERNET_MAC1_MAR11H_A37 *((volatile unsigned int*)(0x42CE1314UL))
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#define bFM3_ETHERNET_MAC1_MAR11H_A38 *((volatile unsigned int*)(0x42CE1318UL))
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#define bFM3_ETHERNET_MAC1_MAR11H_A39 *((volatile unsigned int*)(0x42CE131CUL))
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#define bFM3_ETHERNET_MAC1_MAR11H_A40 *((volatile unsigned int*)(0x42CE1320UL))
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#define bFM3_ETHERNET_MAC1_MAR11H_A41 *((volatile unsigned int*)(0x42CE1324UL))
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#define bFM3_ETHERNET_MAC1_MAR11H_A42 *((volatile unsigned int*)(0x42CE1328UL))
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#define bFM3_ETHERNET_MAC1_MAR11H_A43 *((volatile unsigned int*)(0x42CE132CUL))
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#define bFM3_ETHERNET_MAC1_MAR11H_A44 *((volatile unsigned int*)(0x42CE1330UL))
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#define bFM3_ETHERNET_MAC1_MAR11H_A45 *((volatile unsigned int*)(0x42CE1334UL))
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#define bFM3_ETHERNET_MAC1_MAR11H_A46 *((volatile unsigned int*)(0x42CE1338UL))
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#define bFM3_ETHERNET_MAC1_MAR11H_A47 *((volatile unsigned int*)(0x42CE133CUL))
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#define bFM3_ETHERNET_MAC1_MAR11H_MBC0 *((volatile unsigned int*)(0x42CE1360UL))
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#define bFM3_ETHERNET_MAC1_MAR11H_MBC1 *((volatile unsigned int*)(0x42CE1364UL))
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#define bFM3_ETHERNET_MAC1_MAR11H_MBC2 *((volatile unsigned int*)(0x42CE1368UL))
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#define bFM3_ETHERNET_MAC1_MAR11H_MBC3 *((volatile unsigned int*)(0x42CE136CUL))
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#define bFM3_ETHERNET_MAC1_MAR11H_MBC4 *((volatile unsigned int*)(0x42CE1370UL))
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#define bFM3_ETHERNET_MAC1_MAR11H_MBC5 *((volatile unsigned int*)(0x42CE1374UL))
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#define bFM3_ETHERNET_MAC1_MAR11H_SA *((volatile unsigned int*)(0x42CE1378UL))
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#define bFM3_ETHERNET_MAC1_MAR11H_AE *((volatile unsigned int*)(0x42CE137CUL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A0 *((volatile unsigned int*)(0x42CE1380UL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A1 *((volatile unsigned int*)(0x42CE1384UL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A2 *((volatile unsigned int*)(0x42CE1388UL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A3 *((volatile unsigned int*)(0x42CE138CUL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A4 *((volatile unsigned int*)(0x42CE1390UL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A5 *((volatile unsigned int*)(0x42CE1394UL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A6 *((volatile unsigned int*)(0x42CE1398UL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A7 *((volatile unsigned int*)(0x42CE139CUL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A8 *((volatile unsigned int*)(0x42CE13A0UL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A9 *((volatile unsigned int*)(0x42CE13A4UL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A10 *((volatile unsigned int*)(0x42CE13A8UL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A11 *((volatile unsigned int*)(0x42CE13ACUL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A12 *((volatile unsigned int*)(0x42CE13B0UL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A13 *((volatile unsigned int*)(0x42CE13B4UL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A14 *((volatile unsigned int*)(0x42CE13B8UL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A15 *((volatile unsigned int*)(0x42CE13BCUL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A16 *((volatile unsigned int*)(0x42CE13C0UL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A17 *((volatile unsigned int*)(0x42CE13C4UL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A18 *((volatile unsigned int*)(0x42CE13C8UL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A19 *((volatile unsigned int*)(0x42CE13CCUL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A20 *((volatile unsigned int*)(0x42CE13D0UL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A21 *((volatile unsigned int*)(0x42CE13D4UL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A22 *((volatile unsigned int*)(0x42CE13D8UL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A23 *((volatile unsigned int*)(0x42CE13DCUL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A24 *((volatile unsigned int*)(0x42CE13E0UL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A25 *((volatile unsigned int*)(0x42CE13E4UL))
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#define bFM3_ETHERNET_MAC1_MAR11L_A26 *((volatile unsigned int*)(0x42CE13E8UL))
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|
#define bFM3_ETHERNET_MAC1_MAR11L_A27 *((volatile unsigned int*)(0x42CE13ECUL))
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|
#define bFM3_ETHERNET_MAC1_MAR11L_A28 *((volatile unsigned int*)(0x42CE13F0UL))
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|
#define bFM3_ETHERNET_MAC1_MAR11L_A29 *((volatile unsigned int*)(0x42CE13F4UL))
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|
#define bFM3_ETHERNET_MAC1_MAR11L_A30 *((volatile unsigned int*)(0x42CE13F8UL))
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|
#define bFM3_ETHERNET_MAC1_MAR11L_A31 *((volatile unsigned int*)(0x42CE13FCUL))
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|
#define bFM3_ETHERNET_MAC1_MAR12H_A32 *((volatile unsigned int*)(0x42CE1400UL))
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|
#define bFM3_ETHERNET_MAC1_MAR12H_A33 *((volatile unsigned int*)(0x42CE1404UL))
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|
#define bFM3_ETHERNET_MAC1_MAR12H_A34 *((volatile unsigned int*)(0x42CE1408UL))
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|
#define bFM3_ETHERNET_MAC1_MAR12H_A35 *((volatile unsigned int*)(0x42CE140CUL))
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|
#define bFM3_ETHERNET_MAC1_MAR12H_A36 *((volatile unsigned int*)(0x42CE1410UL))
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|
#define bFM3_ETHERNET_MAC1_MAR12H_A37 *((volatile unsigned int*)(0x42CE1414UL))
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|
#define bFM3_ETHERNET_MAC1_MAR12H_A38 *((volatile unsigned int*)(0x42CE1418UL))
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|
#define bFM3_ETHERNET_MAC1_MAR12H_A39 *((volatile unsigned int*)(0x42CE141CUL))
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|
#define bFM3_ETHERNET_MAC1_MAR12H_A40 *((volatile unsigned int*)(0x42CE1420UL))
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|
#define bFM3_ETHERNET_MAC1_MAR12H_A41 *((volatile unsigned int*)(0x42CE1424UL))
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|
#define bFM3_ETHERNET_MAC1_MAR12H_A42 *((volatile unsigned int*)(0x42CE1428UL))
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|
#define bFM3_ETHERNET_MAC1_MAR12H_A43 *((volatile unsigned int*)(0x42CE142CUL))
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|
#define bFM3_ETHERNET_MAC1_MAR12H_A44 *((volatile unsigned int*)(0x42CE1430UL))
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|
#define bFM3_ETHERNET_MAC1_MAR12H_A45 *((volatile unsigned int*)(0x42CE1434UL))
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|
#define bFM3_ETHERNET_MAC1_MAR12H_A46 *((volatile unsigned int*)(0x42CE1438UL))
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|
#define bFM3_ETHERNET_MAC1_MAR12H_A47 *((volatile unsigned int*)(0x42CE143CUL))
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|
#define bFM3_ETHERNET_MAC1_MAR12H_MBC0 *((volatile unsigned int*)(0x42CE1460UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR12H_MBC1 *((volatile unsigned int*)(0x42CE1464UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR12H_MBC2 *((volatile unsigned int*)(0x42CE1468UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR12H_MBC3 *((volatile unsigned int*)(0x42CE146CUL))
|
|
#define bFM3_ETHERNET_MAC1_MAR12H_MBC4 *((volatile unsigned int*)(0x42CE1470UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR12H_MBC5 *((volatile unsigned int*)(0x42CE1474UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR12H_SA *((volatile unsigned int*)(0x42CE1478UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR12H_AE *((volatile unsigned int*)(0x42CE147CUL))
|
|
#define bFM3_ETHERNET_MAC1_MAR12L_A0 *((volatile unsigned int*)(0x42CE1480UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR12L_A1 *((volatile unsigned int*)(0x42CE1484UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR12L_A2 *((volatile unsigned int*)(0x42CE1488UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR12L_A3 *((volatile unsigned int*)(0x42CE148CUL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A4 *((volatile unsigned int*)(0x42CE1490UL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A5 *((volatile unsigned int*)(0x42CE1494UL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A6 *((volatile unsigned int*)(0x42CE1498UL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A7 *((volatile unsigned int*)(0x42CE149CUL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A8 *((volatile unsigned int*)(0x42CE14A0UL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A9 *((volatile unsigned int*)(0x42CE14A4UL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A10 *((volatile unsigned int*)(0x42CE14A8UL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A11 *((volatile unsigned int*)(0x42CE14ACUL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A12 *((volatile unsigned int*)(0x42CE14B0UL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A13 *((volatile unsigned int*)(0x42CE14B4UL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A14 *((volatile unsigned int*)(0x42CE14B8UL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A15 *((volatile unsigned int*)(0x42CE14BCUL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A16 *((volatile unsigned int*)(0x42CE14C0UL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A17 *((volatile unsigned int*)(0x42CE14C4UL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A18 *((volatile unsigned int*)(0x42CE14C8UL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A19 *((volatile unsigned int*)(0x42CE14CCUL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A20 *((volatile unsigned int*)(0x42CE14D0UL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A21 *((volatile unsigned int*)(0x42CE14D4UL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A22 *((volatile unsigned int*)(0x42CE14D8UL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A23 *((volatile unsigned int*)(0x42CE14DCUL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A24 *((volatile unsigned int*)(0x42CE14E0UL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A25 *((volatile unsigned int*)(0x42CE14E4UL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A26 *((volatile unsigned int*)(0x42CE14E8UL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A27 *((volatile unsigned int*)(0x42CE14ECUL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A28 *((volatile unsigned int*)(0x42CE14F0UL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A29 *((volatile unsigned int*)(0x42CE14F4UL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A30 *((volatile unsigned int*)(0x42CE14F8UL))
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#define bFM3_ETHERNET_MAC1_MAR12L_A31 *((volatile unsigned int*)(0x42CE14FCUL))
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#define bFM3_ETHERNET_MAC1_MAR13H_A32 *((volatile unsigned int*)(0x42CE1500UL))
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#define bFM3_ETHERNET_MAC1_MAR13H_A33 *((volatile unsigned int*)(0x42CE1504UL))
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#define bFM3_ETHERNET_MAC1_MAR13H_A34 *((volatile unsigned int*)(0x42CE1508UL))
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#define bFM3_ETHERNET_MAC1_MAR13H_A35 *((volatile unsigned int*)(0x42CE150CUL))
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#define bFM3_ETHERNET_MAC1_MAR13H_A36 *((volatile unsigned int*)(0x42CE1510UL))
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#define bFM3_ETHERNET_MAC1_MAR13H_A37 *((volatile unsigned int*)(0x42CE1514UL))
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#define bFM3_ETHERNET_MAC1_MAR13H_A38 *((volatile unsigned int*)(0x42CE1518UL))
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#define bFM3_ETHERNET_MAC1_MAR13H_A39 *((volatile unsigned int*)(0x42CE151CUL))
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#define bFM3_ETHERNET_MAC1_MAR13H_A40 *((volatile unsigned int*)(0x42CE1520UL))
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#define bFM3_ETHERNET_MAC1_MAR13H_A41 *((volatile unsigned int*)(0x42CE1524UL))
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#define bFM3_ETHERNET_MAC1_MAR13H_A42 *((volatile unsigned int*)(0x42CE1528UL))
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#define bFM3_ETHERNET_MAC1_MAR13H_A43 *((volatile unsigned int*)(0x42CE152CUL))
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#define bFM3_ETHERNET_MAC1_MAR13H_A44 *((volatile unsigned int*)(0x42CE1530UL))
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#define bFM3_ETHERNET_MAC1_MAR13H_A45 *((volatile unsigned int*)(0x42CE1534UL))
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#define bFM3_ETHERNET_MAC1_MAR13H_A46 *((volatile unsigned int*)(0x42CE1538UL))
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#define bFM3_ETHERNET_MAC1_MAR13H_A47 *((volatile unsigned int*)(0x42CE153CUL))
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#define bFM3_ETHERNET_MAC1_MAR13H_MBC0 *((volatile unsigned int*)(0x42CE1560UL))
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#define bFM3_ETHERNET_MAC1_MAR13H_MBC1 *((volatile unsigned int*)(0x42CE1564UL))
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#define bFM3_ETHERNET_MAC1_MAR13H_MBC2 *((volatile unsigned int*)(0x42CE1568UL))
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#define bFM3_ETHERNET_MAC1_MAR13H_MBC3 *((volatile unsigned int*)(0x42CE156CUL))
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#define bFM3_ETHERNET_MAC1_MAR13H_MBC4 *((volatile unsigned int*)(0x42CE1570UL))
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#define bFM3_ETHERNET_MAC1_MAR13H_MBC5 *((volatile unsigned int*)(0x42CE1574UL))
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#define bFM3_ETHERNET_MAC1_MAR13H_SA *((volatile unsigned int*)(0x42CE1578UL))
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#define bFM3_ETHERNET_MAC1_MAR13H_AE *((volatile unsigned int*)(0x42CE157CUL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A0 *((volatile unsigned int*)(0x42CE1580UL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A1 *((volatile unsigned int*)(0x42CE1584UL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A2 *((volatile unsigned int*)(0x42CE1588UL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A3 *((volatile unsigned int*)(0x42CE158CUL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A4 *((volatile unsigned int*)(0x42CE1590UL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A5 *((volatile unsigned int*)(0x42CE1594UL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A6 *((volatile unsigned int*)(0x42CE1598UL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A7 *((volatile unsigned int*)(0x42CE159CUL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A8 *((volatile unsigned int*)(0x42CE15A0UL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A9 *((volatile unsigned int*)(0x42CE15A4UL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A10 *((volatile unsigned int*)(0x42CE15A8UL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A11 *((volatile unsigned int*)(0x42CE15ACUL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A12 *((volatile unsigned int*)(0x42CE15B0UL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A13 *((volatile unsigned int*)(0x42CE15B4UL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A14 *((volatile unsigned int*)(0x42CE15B8UL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A15 *((volatile unsigned int*)(0x42CE15BCUL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A16 *((volatile unsigned int*)(0x42CE15C0UL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A17 *((volatile unsigned int*)(0x42CE15C4UL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A18 *((volatile unsigned int*)(0x42CE15C8UL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A19 *((volatile unsigned int*)(0x42CE15CCUL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A20 *((volatile unsigned int*)(0x42CE15D0UL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A21 *((volatile unsigned int*)(0x42CE15D4UL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A22 *((volatile unsigned int*)(0x42CE15D8UL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A23 *((volatile unsigned int*)(0x42CE15DCUL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A24 *((volatile unsigned int*)(0x42CE15E0UL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A25 *((volatile unsigned int*)(0x42CE15E4UL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A26 *((volatile unsigned int*)(0x42CE15E8UL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A27 *((volatile unsigned int*)(0x42CE15ECUL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A28 *((volatile unsigned int*)(0x42CE15F0UL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A29 *((volatile unsigned int*)(0x42CE15F4UL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A30 *((volatile unsigned int*)(0x42CE15F8UL))
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#define bFM3_ETHERNET_MAC1_MAR13L_A31 *((volatile unsigned int*)(0x42CE15FCUL))
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#define bFM3_ETHERNET_MAC1_MAR14H_A32 *((volatile unsigned int*)(0x42CE1600UL))
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#define bFM3_ETHERNET_MAC1_MAR14H_A33 *((volatile unsigned int*)(0x42CE1604UL))
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#define bFM3_ETHERNET_MAC1_MAR14H_A34 *((volatile unsigned int*)(0x42CE1608UL))
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#define bFM3_ETHERNET_MAC1_MAR14H_A35 *((volatile unsigned int*)(0x42CE160CUL))
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#define bFM3_ETHERNET_MAC1_MAR14H_A36 *((volatile unsigned int*)(0x42CE1610UL))
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#define bFM3_ETHERNET_MAC1_MAR14H_A37 *((volatile unsigned int*)(0x42CE1614UL))
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#define bFM3_ETHERNET_MAC1_MAR14H_A38 *((volatile unsigned int*)(0x42CE1618UL))
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#define bFM3_ETHERNET_MAC1_MAR14H_A39 *((volatile unsigned int*)(0x42CE161CUL))
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#define bFM3_ETHERNET_MAC1_MAR14H_A40 *((volatile unsigned int*)(0x42CE1620UL))
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#define bFM3_ETHERNET_MAC1_MAR14H_A41 *((volatile unsigned int*)(0x42CE1624UL))
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#define bFM3_ETHERNET_MAC1_MAR14H_A42 *((volatile unsigned int*)(0x42CE1628UL))
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#define bFM3_ETHERNET_MAC1_MAR14H_A43 *((volatile unsigned int*)(0x42CE162CUL))
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#define bFM3_ETHERNET_MAC1_MAR14H_A44 *((volatile unsigned int*)(0x42CE1630UL))
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#define bFM3_ETHERNET_MAC1_MAR14H_A45 *((volatile unsigned int*)(0x42CE1634UL))
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#define bFM3_ETHERNET_MAC1_MAR14H_A46 *((volatile unsigned int*)(0x42CE1638UL))
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#define bFM3_ETHERNET_MAC1_MAR14H_A47 *((volatile unsigned int*)(0x42CE163CUL))
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#define bFM3_ETHERNET_MAC1_MAR14H_MBC0 *((volatile unsigned int*)(0x42CE1660UL))
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#define bFM3_ETHERNET_MAC1_MAR14H_MBC1 *((volatile unsigned int*)(0x42CE1664UL))
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#define bFM3_ETHERNET_MAC1_MAR14H_MBC2 *((volatile unsigned int*)(0x42CE1668UL))
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#define bFM3_ETHERNET_MAC1_MAR14H_MBC3 *((volatile unsigned int*)(0x42CE166CUL))
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#define bFM3_ETHERNET_MAC1_MAR14H_MBC4 *((volatile unsigned int*)(0x42CE1670UL))
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#define bFM3_ETHERNET_MAC1_MAR14H_MBC5 *((volatile unsigned int*)(0x42CE1674UL))
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#define bFM3_ETHERNET_MAC1_MAR14H_SA *((volatile unsigned int*)(0x42CE1678UL))
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#define bFM3_ETHERNET_MAC1_MAR14H_AE *((volatile unsigned int*)(0x42CE167CUL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A0 *((volatile unsigned int*)(0x42CE1680UL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A1 *((volatile unsigned int*)(0x42CE1684UL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A2 *((volatile unsigned int*)(0x42CE1688UL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A3 *((volatile unsigned int*)(0x42CE168CUL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A4 *((volatile unsigned int*)(0x42CE1690UL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A5 *((volatile unsigned int*)(0x42CE1694UL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A6 *((volatile unsigned int*)(0x42CE1698UL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A7 *((volatile unsigned int*)(0x42CE169CUL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A8 *((volatile unsigned int*)(0x42CE16A0UL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A9 *((volatile unsigned int*)(0x42CE16A4UL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A10 *((volatile unsigned int*)(0x42CE16A8UL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A11 *((volatile unsigned int*)(0x42CE16ACUL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A12 *((volatile unsigned int*)(0x42CE16B0UL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A13 *((volatile unsigned int*)(0x42CE16B4UL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A14 *((volatile unsigned int*)(0x42CE16B8UL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A15 *((volatile unsigned int*)(0x42CE16BCUL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A16 *((volatile unsigned int*)(0x42CE16C0UL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A17 *((volatile unsigned int*)(0x42CE16C4UL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A18 *((volatile unsigned int*)(0x42CE16C8UL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A19 *((volatile unsigned int*)(0x42CE16CCUL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A20 *((volatile unsigned int*)(0x42CE16D0UL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A21 *((volatile unsigned int*)(0x42CE16D4UL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A22 *((volatile unsigned int*)(0x42CE16D8UL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A23 *((volatile unsigned int*)(0x42CE16DCUL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A24 *((volatile unsigned int*)(0x42CE16E0UL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A25 *((volatile unsigned int*)(0x42CE16E4UL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A26 *((volatile unsigned int*)(0x42CE16E8UL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A27 *((volatile unsigned int*)(0x42CE16ECUL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A28 *((volatile unsigned int*)(0x42CE16F0UL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A29 *((volatile unsigned int*)(0x42CE16F4UL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A30 *((volatile unsigned int*)(0x42CE16F8UL))
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#define bFM3_ETHERNET_MAC1_MAR14L_A31 *((volatile unsigned int*)(0x42CE16FCUL))
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#define bFM3_ETHERNET_MAC1_MAR15H_A32 *((volatile unsigned int*)(0x42CE1700UL))
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#define bFM3_ETHERNET_MAC1_MAR15H_A33 *((volatile unsigned int*)(0x42CE1704UL))
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#define bFM3_ETHERNET_MAC1_MAR15H_A34 *((volatile unsigned int*)(0x42CE1708UL))
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#define bFM3_ETHERNET_MAC1_MAR15H_A35 *((volatile unsigned int*)(0x42CE170CUL))
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#define bFM3_ETHERNET_MAC1_MAR15H_A36 *((volatile unsigned int*)(0x42CE1710UL))
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#define bFM3_ETHERNET_MAC1_MAR15H_A37 *((volatile unsigned int*)(0x42CE1714UL))
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#define bFM3_ETHERNET_MAC1_MAR15H_A38 *((volatile unsigned int*)(0x42CE1718UL))
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#define bFM3_ETHERNET_MAC1_MAR15H_A39 *((volatile unsigned int*)(0x42CE171CUL))
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#define bFM3_ETHERNET_MAC1_MAR15H_A40 *((volatile unsigned int*)(0x42CE1720UL))
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#define bFM3_ETHERNET_MAC1_MAR15H_A41 *((volatile unsigned int*)(0x42CE1724UL))
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#define bFM3_ETHERNET_MAC1_MAR15H_A42 *((volatile unsigned int*)(0x42CE1728UL))
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#define bFM3_ETHERNET_MAC1_MAR15H_A43 *((volatile unsigned int*)(0x42CE172CUL))
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#define bFM3_ETHERNET_MAC1_MAR15H_A44 *((volatile unsigned int*)(0x42CE1730UL))
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#define bFM3_ETHERNET_MAC1_MAR15H_A45 *((volatile unsigned int*)(0x42CE1734UL))
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#define bFM3_ETHERNET_MAC1_MAR15H_A46 *((volatile unsigned int*)(0x42CE1738UL))
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#define bFM3_ETHERNET_MAC1_MAR15H_A47 *((volatile unsigned int*)(0x42CE173CUL))
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#define bFM3_ETHERNET_MAC1_MAR15H_MBC0 *((volatile unsigned int*)(0x42CE1760UL))
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#define bFM3_ETHERNET_MAC1_MAR15H_MBC1 *((volatile unsigned int*)(0x42CE1764UL))
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#define bFM3_ETHERNET_MAC1_MAR15H_MBC2 *((volatile unsigned int*)(0x42CE1768UL))
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#define bFM3_ETHERNET_MAC1_MAR15H_MBC3 *((volatile unsigned int*)(0x42CE176CUL))
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#define bFM3_ETHERNET_MAC1_MAR15H_MBC4 *((volatile unsigned int*)(0x42CE1770UL))
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#define bFM3_ETHERNET_MAC1_MAR15H_MBC5 *((volatile unsigned int*)(0x42CE1774UL))
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#define bFM3_ETHERNET_MAC1_MAR15H_SA *((volatile unsigned int*)(0x42CE1778UL))
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#define bFM3_ETHERNET_MAC1_MAR15H_AE *((volatile unsigned int*)(0x42CE177CUL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A0 *((volatile unsigned int*)(0x42CE1780UL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A1 *((volatile unsigned int*)(0x42CE1784UL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A2 *((volatile unsigned int*)(0x42CE1788UL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A3 *((volatile unsigned int*)(0x42CE178CUL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A4 *((volatile unsigned int*)(0x42CE1790UL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A5 *((volatile unsigned int*)(0x42CE1794UL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A6 *((volatile unsigned int*)(0x42CE1798UL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A7 *((volatile unsigned int*)(0x42CE179CUL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A8 *((volatile unsigned int*)(0x42CE17A0UL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A9 *((volatile unsigned int*)(0x42CE17A4UL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A10 *((volatile unsigned int*)(0x42CE17A8UL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A11 *((volatile unsigned int*)(0x42CE17ACUL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A12 *((volatile unsigned int*)(0x42CE17B0UL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A13 *((volatile unsigned int*)(0x42CE17B4UL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A14 *((volatile unsigned int*)(0x42CE17B8UL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A15 *((volatile unsigned int*)(0x42CE17BCUL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A16 *((volatile unsigned int*)(0x42CE17C0UL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A17 *((volatile unsigned int*)(0x42CE17C4UL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A18 *((volatile unsigned int*)(0x42CE17C8UL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A19 *((volatile unsigned int*)(0x42CE17CCUL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A20 *((volatile unsigned int*)(0x42CE17D0UL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A21 *((volatile unsigned int*)(0x42CE17D4UL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A22 *((volatile unsigned int*)(0x42CE17D8UL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A23 *((volatile unsigned int*)(0x42CE17DCUL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A24 *((volatile unsigned int*)(0x42CE17E0UL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A25 *((volatile unsigned int*)(0x42CE17E4UL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A26 *((volatile unsigned int*)(0x42CE17E8UL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A27 *((volatile unsigned int*)(0x42CE17ECUL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A28 *((volatile unsigned int*)(0x42CE17F0UL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A29 *((volatile unsigned int*)(0x42CE17F4UL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A30 *((volatile unsigned int*)(0x42CE17F8UL))
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#define bFM3_ETHERNET_MAC1_MAR15L_A31 *((volatile unsigned int*)(0x42CE17FCUL))
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#define bFM3_ETHERNET_MAC1_RGSR_LM *((volatile unsigned int*)(0x42CE1B00UL))
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#define bFM3_ETHERNET_MAC1_RGSR_LSP0 *((volatile unsigned int*)(0x42CE1B04UL))
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#define bFM3_ETHERNET_MAC1_RGSR_LSP1 *((volatile unsigned int*)(0x42CE1B08UL))
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#define bFM3_ETHERNET_MAC1_RGSR_LS *((volatile unsigned int*)(0x42CE1B0CUL))
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#define bFM3_ETHERNET_MAC1_TSCR_TSE *((volatile unsigned int*)(0x42CEE000UL))
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#define bFM3_ETHERNET_MAC1_TSCR_TFCU *((volatile unsigned int*)(0x42CEE004UL))
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#define bFM3_ETHERNET_MAC1_TSCR_TSI *((volatile unsigned int*)(0x42CEE008UL))
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#define bFM3_ETHERNET_MAC1_TSCR_TSU *((volatile unsigned int*)(0x42CEE00CUL))
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#define bFM3_ETHERNET_MAC1_TSCR_TITE *((volatile unsigned int*)(0x42CEE010UL))
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#define bFM3_ETHERNET_MAC1_TSCR_TARU *((volatile unsigned int*)(0x42CEE014UL))
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#define bFM3_ETHERNET_MAC1_TSCR_TSEA *((volatile unsigned int*)(0x42CEE020UL))
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#define bFM3_ETHERNET_MAC1_TSCR_TSDB *((volatile unsigned int*)(0x42CEE024UL))
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#define bFM3_ETHERNET_MAC1_TSCR_TSV2E *((volatile unsigned int*)(0x42CEE028UL))
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#define bFM3_ETHERNET_MAC1_TSCR_TETSP *((volatile unsigned int*)(0x42CEE02CUL))
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#define bFM3_ETHERNET_MAC1_TSCR_TSIP6E *((volatile unsigned int*)(0x42CEE030UL))
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#define bFM3_ETHERNET_MAC1_TSCR_TSIP4E *((volatile unsigned int*)(0x42CEE034UL))
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#define bFM3_ETHERNET_MAC1_TSCR_TETSEM *((volatile unsigned int*)(0x42CEE038UL))
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#define bFM3_ETHERNET_MAC1_TSCR_TSMRM *((volatile unsigned int*)(0x42CEE03CUL))
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#define bFM3_ETHERNET_MAC1_TSCR_TSPS0 *((volatile unsigned int*)(0x42CEE040UL))
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#define bFM3_ETHERNET_MAC1_TSCR_TSPS1 *((volatile unsigned int*)(0x42CEE044UL))
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#define bFM3_ETHERNET_MAC1_TSCR_TSENMF *((volatile unsigned int*)(0x42CEE048UL))
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#define bFM3_ETHERNET_MAC1_TSCR_ATSFC *((volatile unsigned int*)(0x42CEE060UL))
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#define bFM3_ETHERNET_MAC1_SSIR_SSINC0 *((volatile unsigned int*)(0x42CEE080UL))
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#define bFM3_ETHERNET_MAC1_SSIR_SSINC1 *((volatile unsigned int*)(0x42CEE084UL))
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#define bFM3_ETHERNET_MAC1_SSIR_SSINC2 *((volatile unsigned int*)(0x42CEE088UL))
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#define bFM3_ETHERNET_MAC1_SSIR_SSINC3 *((volatile unsigned int*)(0x42CEE08CUL))
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#define bFM3_ETHERNET_MAC1_SSIR_SSINC4 *((volatile unsigned int*)(0x42CEE090UL))
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#define bFM3_ETHERNET_MAC1_SSIR_SSINC5 *((volatile unsigned int*)(0x42CEE094UL))
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#define bFM3_ETHERNET_MAC1_SSIR_SSINC6 *((volatile unsigned int*)(0x42CEE098UL))
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#define bFM3_ETHERNET_MAC1_SSIR_SSINC7 *((volatile unsigned int*)(0x42CEE09CUL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS0 *((volatile unsigned int*)(0x42CEE100UL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS1 *((volatile unsigned int*)(0x42CEE104UL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS2 *((volatile unsigned int*)(0x42CEE108UL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS3 *((volatile unsigned int*)(0x42CEE10CUL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS4 *((volatile unsigned int*)(0x42CEE110UL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS5 *((volatile unsigned int*)(0x42CEE114UL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS6 *((volatile unsigned int*)(0x42CEE118UL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS7 *((volatile unsigned int*)(0x42CEE11CUL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS8 *((volatile unsigned int*)(0x42CEE120UL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS9 *((volatile unsigned int*)(0x42CEE124UL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS10 *((volatile unsigned int*)(0x42CEE128UL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS11 *((volatile unsigned int*)(0x42CEE12CUL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS12 *((volatile unsigned int*)(0x42CEE130UL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS13 *((volatile unsigned int*)(0x42CEE134UL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS14 *((volatile unsigned int*)(0x42CEE138UL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS15 *((volatile unsigned int*)(0x42CEE13CUL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS16 *((volatile unsigned int*)(0x42CEE140UL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS17 *((volatile unsigned int*)(0x42CEE144UL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS18 *((volatile unsigned int*)(0x42CEE148UL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS19 *((volatile unsigned int*)(0x42CEE14CUL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS20 *((volatile unsigned int*)(0x42CEE150UL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS21 *((volatile unsigned int*)(0x42CEE154UL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS22 *((volatile unsigned int*)(0x42CEE158UL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS23 *((volatile unsigned int*)(0x42CEE15CUL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS24 *((volatile unsigned int*)(0x42CEE160UL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS25 *((volatile unsigned int*)(0x42CEE164UL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS26 *((volatile unsigned int*)(0x42CEE168UL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS27 *((volatile unsigned int*)(0x42CEE16CUL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS28 *((volatile unsigned int*)(0x42CEE170UL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS29 *((volatile unsigned int*)(0x42CEE174UL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS30 *((volatile unsigned int*)(0x42CEE178UL))
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#define bFM3_ETHERNET_MAC1_STSR_TSS31 *((volatile unsigned int*)(0x42CEE17CUL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS0 *((volatile unsigned int*)(0x42CEE080UL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS1 *((volatile unsigned int*)(0x42CEE084UL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS2 *((volatile unsigned int*)(0x42CEE088UL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS3 *((volatile unsigned int*)(0x42CEE08CUL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS4 *((volatile unsigned int*)(0x42CEE090UL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS5 *((volatile unsigned int*)(0x42CEE094UL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS6 *((volatile unsigned int*)(0x42CEE098UL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS7 *((volatile unsigned int*)(0x42CEE09CUL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS8 *((volatile unsigned int*)(0x42CEE0A0UL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS9 *((volatile unsigned int*)(0x42CEE0A4UL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS10 *((volatile unsigned int*)(0x42CEE0A8UL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS11 *((volatile unsigned int*)(0x42CEE0ACUL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS12 *((volatile unsigned int*)(0x42CEE0B0UL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS13 *((volatile unsigned int*)(0x42CEE0B4UL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS14 *((volatile unsigned int*)(0x42CEE0B8UL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS15 *((volatile unsigned int*)(0x42CEE0BCUL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS16 *((volatile unsigned int*)(0x42CEE0C0UL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS17 *((volatile unsigned int*)(0x42CEE0C4UL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS18 *((volatile unsigned int*)(0x42CEE0C8UL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS19 *((volatile unsigned int*)(0x42CEE0CCUL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS20 *((volatile unsigned int*)(0x42CEE0D0UL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS21 *((volatile unsigned int*)(0x42CEE0D4UL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS22 *((volatile unsigned int*)(0x42CEE0D8UL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS23 *((volatile unsigned int*)(0x42CEE0DCUL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS24 *((volatile unsigned int*)(0x42CEE0E0UL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS25 *((volatile unsigned int*)(0x42CEE0E4UL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS26 *((volatile unsigned int*)(0x42CEE0E8UL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS27 *((volatile unsigned int*)(0x42CEE0ECUL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS28 *((volatile unsigned int*)(0x42CEE0F0UL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS29 *((volatile unsigned int*)(0x42CEE0F4UL))
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#define bFM3_ETHERNET_MAC1_STNR_TSSS30 *((volatile unsigned int*)(0x42CEE0F8UL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS0 *((volatile unsigned int*)(0x42CEE200UL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS1 *((volatile unsigned int*)(0x42CEE204UL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS2 *((volatile unsigned int*)(0x42CEE208UL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS3 *((volatile unsigned int*)(0x42CEE20CUL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS4 *((volatile unsigned int*)(0x42CEE210UL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS5 *((volatile unsigned int*)(0x42CEE214UL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS6 *((volatile unsigned int*)(0x42CEE218UL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS7 *((volatile unsigned int*)(0x42CEE21CUL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS8 *((volatile unsigned int*)(0x42CEE220UL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS9 *((volatile unsigned int*)(0x42CEE224UL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS10 *((volatile unsigned int*)(0x42CEE228UL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS11 *((volatile unsigned int*)(0x42CEE22CUL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS12 *((volatile unsigned int*)(0x42CEE230UL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS13 *((volatile unsigned int*)(0x42CEE234UL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS14 *((volatile unsigned int*)(0x42CEE238UL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS15 *((volatile unsigned int*)(0x42CEE23CUL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS16 *((volatile unsigned int*)(0x42CEE240UL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS17 *((volatile unsigned int*)(0x42CEE244UL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS18 *((volatile unsigned int*)(0x42CEE248UL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS19 *((volatile unsigned int*)(0x42CEE24CUL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS20 *((volatile unsigned int*)(0x42CEE250UL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS21 *((volatile unsigned int*)(0x42CEE254UL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS22 *((volatile unsigned int*)(0x42CEE258UL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS23 *((volatile unsigned int*)(0x42CEE25CUL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS24 *((volatile unsigned int*)(0x42CEE260UL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS25 *((volatile unsigned int*)(0x42CEE264UL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS26 *((volatile unsigned int*)(0x42CEE268UL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS27 *((volatile unsigned int*)(0x42CEE26CUL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS28 *((volatile unsigned int*)(0x42CEE270UL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS29 *((volatile unsigned int*)(0x42CEE274UL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS30 *((volatile unsigned int*)(0x42CEE278UL))
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#define bFM3_ETHERNET_MAC1_STSUR_TSS31 *((volatile unsigned int*)(0x42CEE27CUL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS0 *((volatile unsigned int*)(0x42CEE280UL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS1 *((volatile unsigned int*)(0x42CEE284UL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS2 *((volatile unsigned int*)(0x42CEE288UL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS3 *((volatile unsigned int*)(0x42CEE28CUL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS4 *((volatile unsigned int*)(0x42CEE290UL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS5 *((volatile unsigned int*)(0x42CEE294UL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS6 *((volatile unsigned int*)(0x42CEE298UL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS7 *((volatile unsigned int*)(0x42CEE29CUL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS8 *((volatile unsigned int*)(0x42CEE2A0UL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS9 *((volatile unsigned int*)(0x42CEE2A4UL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS10 *((volatile unsigned int*)(0x42CEE2A8UL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS11 *((volatile unsigned int*)(0x42CEE2ACUL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS12 *((volatile unsigned int*)(0x42CEE2B0UL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS13 *((volatile unsigned int*)(0x42CEE2B4UL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS14 *((volatile unsigned int*)(0x42CEE2B8UL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS15 *((volatile unsigned int*)(0x42CEE2BCUL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS16 *((volatile unsigned int*)(0x42CEE2C0UL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS17 *((volatile unsigned int*)(0x42CEE2C4UL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS18 *((volatile unsigned int*)(0x42CEE2C8UL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS19 *((volatile unsigned int*)(0x42CEE2CCUL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS20 *((volatile unsigned int*)(0x42CEE2D0UL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS21 *((volatile unsigned int*)(0x42CEE2D4UL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS22 *((volatile unsigned int*)(0x42CEE2D8UL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS23 *((volatile unsigned int*)(0x42CEE2DCUL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS24 *((volatile unsigned int*)(0x42CEE2E0UL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS25 *((volatile unsigned int*)(0x42CEE2E4UL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS26 *((volatile unsigned int*)(0x42CEE2E8UL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS27 *((volatile unsigned int*)(0x42CEE2ECUL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS28 *((volatile unsigned int*)(0x42CEE2F0UL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS29 *((volatile unsigned int*)(0x42CEE2F4UL))
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#define bFM3_ETHERNET_MAC1_STNUR_TSSS30 *((volatile unsigned int*)(0x42CEE2F8UL))
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#define bFM3_ETHERNET_MAC1_STNUR_ADDSUB *((volatile unsigned int*)(0x42CEE2FCUL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR0 *((volatile unsigned int*)(0x42CEE300UL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR1 *((volatile unsigned int*)(0x42CEE304UL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR2 *((volatile unsigned int*)(0x42CEE308UL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR3 *((volatile unsigned int*)(0x42CEE30CUL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR4 *((volatile unsigned int*)(0x42CEE310UL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR5 *((volatile unsigned int*)(0x42CEE314UL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR6 *((volatile unsigned int*)(0x42CEE318UL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR7 *((volatile unsigned int*)(0x42CEE31CUL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR8 *((volatile unsigned int*)(0x42CEE320UL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR9 *((volatile unsigned int*)(0x42CEE324UL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR10 *((volatile unsigned int*)(0x42CEE328UL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR11 *((volatile unsigned int*)(0x42CEE32CUL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR12 *((volatile unsigned int*)(0x42CEE330UL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR13 *((volatile unsigned int*)(0x42CEE334UL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR14 *((volatile unsigned int*)(0x42CEE338UL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR15 *((volatile unsigned int*)(0x42CEE33CUL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR16 *((volatile unsigned int*)(0x42CEE340UL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR17 *((volatile unsigned int*)(0x42CEE344UL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR18 *((volatile unsigned int*)(0x42CEE348UL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR19 *((volatile unsigned int*)(0x42CEE34CUL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR20 *((volatile unsigned int*)(0x42CEE350UL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR21 *((volatile unsigned int*)(0x42CEE354UL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR22 *((volatile unsigned int*)(0x42CEE358UL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR23 *((volatile unsigned int*)(0x42CEE35CUL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR24 *((volatile unsigned int*)(0x42CEE360UL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR25 *((volatile unsigned int*)(0x42CEE364UL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR26 *((volatile unsigned int*)(0x42CEE368UL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR27 *((volatile unsigned int*)(0x42CEE36CUL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR28 *((volatile unsigned int*)(0x42CEE370UL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR29 *((volatile unsigned int*)(0x42CEE374UL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR30 *((volatile unsigned int*)(0x42CEE378UL))
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#define bFM3_ETHERNET_MAC1_TSAR_TSAR31 *((volatile unsigned int*)(0x42CEE37CUL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR0 *((volatile unsigned int*)(0x42CEE380UL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR1 *((volatile unsigned int*)(0x42CEE384UL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR2 *((volatile unsigned int*)(0x42CEE388UL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR3 *((volatile unsigned int*)(0x42CEE38CUL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR4 *((volatile unsigned int*)(0x42CEE390UL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR5 *((volatile unsigned int*)(0x42CEE394UL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR6 *((volatile unsigned int*)(0x42CEE398UL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR7 *((volatile unsigned int*)(0x42CEE39CUL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR8 *((volatile unsigned int*)(0x42CEE3A0UL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR9 *((volatile unsigned int*)(0x42CEE3A4UL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR10 *((volatile unsigned int*)(0x42CEE3A8UL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR11 *((volatile unsigned int*)(0x42CEE3ACUL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR12 *((volatile unsigned int*)(0x42CEE3B0UL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR13 *((volatile unsigned int*)(0x42CEE3B4UL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR14 *((volatile unsigned int*)(0x42CEE3B8UL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR15 *((volatile unsigned int*)(0x42CEE3BCUL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR16 *((volatile unsigned int*)(0x42CEE3C0UL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR17 *((volatile unsigned int*)(0x42CEE3C4UL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR18 *((volatile unsigned int*)(0x42CEE3C8UL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR19 *((volatile unsigned int*)(0x42CEE3CCUL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR20 *((volatile unsigned int*)(0x42CEE3D0UL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR21 *((volatile unsigned int*)(0x42CEE3D4UL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR22 *((volatile unsigned int*)(0x42CEE3D8UL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR23 *((volatile unsigned int*)(0x42CEE3DCUL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR24 *((volatile unsigned int*)(0x42CEE3E0UL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR25 *((volatile unsigned int*)(0x42CEE3E4UL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR26 *((volatile unsigned int*)(0x42CEE3E8UL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR27 *((volatile unsigned int*)(0x42CEE3ECUL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR28 *((volatile unsigned int*)(0x42CEE3F0UL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR29 *((volatile unsigned int*)(0x42CEE3F4UL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR30 *((volatile unsigned int*)(0x42CEE3F8UL))
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#define bFM3_ETHERNET_MAC1_TTSR_TSTR31 *((volatile unsigned int*)(0x42CEE3FCUL))
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#define bFM3_ETHERNET_MAC1_TTNR_TSTR0 *((volatile unsigned int*)(0x42CEE400UL))
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#define bFM3_ETHERNET_MAC1_TTNR_TSTR1 *((volatile unsigned int*)(0x42CEE404UL))
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#define bFM3_ETHERNET_MAC1_TTNR_TSTR2 *((volatile unsigned int*)(0x42CEE408UL))
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#define bFM3_ETHERNET_MAC1_TTNR_TSTR3 *((volatile unsigned int*)(0x42CEE40CUL))
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#define bFM3_ETHERNET_MAC1_TTNR_TSTR4 *((volatile unsigned int*)(0x42CEE410UL))
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#define bFM3_ETHERNET_MAC1_TTNR_TSTR5 *((volatile unsigned int*)(0x42CEE414UL))
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#define bFM3_ETHERNET_MAC1_TTNR_TSTR6 *((volatile unsigned int*)(0x42CEE418UL))
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#define bFM3_ETHERNET_MAC1_TTNR_TSTR7 *((volatile unsigned int*)(0x42CEE41CUL))
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#define bFM3_ETHERNET_MAC1_TTNR_TSTR8 *((volatile unsigned int*)(0x42CEE420UL))
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#define bFM3_ETHERNET_MAC1_TTNR_TSTR9 *((volatile unsigned int*)(0x42CEE424UL))
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#define bFM3_ETHERNET_MAC1_TTNR_TSTR10 *((volatile unsigned int*)(0x42CEE428UL))
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#define bFM3_ETHERNET_MAC1_TTNR_TSTR11 *((volatile unsigned int*)(0x42CEE42CUL))
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#define bFM3_ETHERNET_MAC1_TTNR_TSTR12 *((volatile unsigned int*)(0x42CEE430UL))
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#define bFM3_ETHERNET_MAC1_TTNR_TSTR13 *((volatile unsigned int*)(0x42CEE434UL))
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#define bFM3_ETHERNET_MAC1_TTNR_TSTR14 *((volatile unsigned int*)(0x42CEE438UL))
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#define bFM3_ETHERNET_MAC1_TTNR_TSTR15 *((volatile unsigned int*)(0x42CEE43CUL))
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#define bFM3_ETHERNET_MAC1_TTNR_TSTR16 *((volatile unsigned int*)(0x42CEE440UL))
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|
#define bFM3_ETHERNET_MAC1_TTNR_TSTR17 *((volatile unsigned int*)(0x42CEE444UL))
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#define bFM3_ETHERNET_MAC1_TTNR_TSTR18 *((volatile unsigned int*)(0x42CEE448UL))
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#define bFM3_ETHERNET_MAC1_TTNR_TSTR19 *((volatile unsigned int*)(0x42CEE44CUL))
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|
#define bFM3_ETHERNET_MAC1_TTNR_TSTR20 *((volatile unsigned int*)(0x42CEE450UL))
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#define bFM3_ETHERNET_MAC1_TTNR_TSTR21 *((volatile unsigned int*)(0x42CEE454UL))
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#define bFM3_ETHERNET_MAC1_TTNR_TSTR22 *((volatile unsigned int*)(0x42CEE458UL))
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|
#define bFM3_ETHERNET_MAC1_TTNR_TSTR23 *((volatile unsigned int*)(0x42CEE45CUL))
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|
#define bFM3_ETHERNET_MAC1_TTNR_TSTR24 *((volatile unsigned int*)(0x42CEE460UL))
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|
#define bFM3_ETHERNET_MAC1_TTNR_TSTR25 *((volatile unsigned int*)(0x42CEE464UL))
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|
#define bFM3_ETHERNET_MAC1_TTNR_TSTR26 *((volatile unsigned int*)(0x42CEE468UL))
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|
#define bFM3_ETHERNET_MAC1_TTNR_TSTR27 *((volatile unsigned int*)(0x42CEE46CUL))
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|
#define bFM3_ETHERNET_MAC1_TTNR_TSTR28 *((volatile unsigned int*)(0x42CEE470UL))
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#define bFM3_ETHERNET_MAC1_TTNR_TSTR29 *((volatile unsigned int*)(0x42CEE474UL))
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#define bFM3_ETHERNET_MAC1_TTNR_TSTR30 *((volatile unsigned int*)(0x42CEE478UL))
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#define bFM3_ETHERNET_MAC1_STHWSR_TSHWR0 *((volatile unsigned int*)(0x42CEE480UL))
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|
#define bFM3_ETHERNET_MAC1_STHWSR_TSHWR1 *((volatile unsigned int*)(0x42CEE484UL))
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|
#define bFM3_ETHERNET_MAC1_STHWSR_TSHWR2 *((volatile unsigned int*)(0x42CEE488UL))
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|
#define bFM3_ETHERNET_MAC1_STHWSR_TSHWR3 *((volatile unsigned int*)(0x42CEE48CUL))
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|
#define bFM3_ETHERNET_MAC1_STHWSR_TSHWR4 *((volatile unsigned int*)(0x42CEE490UL))
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#define bFM3_ETHERNET_MAC1_STHWSR_TSHWR5 *((volatile unsigned int*)(0x42CEE494UL))
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|
#define bFM3_ETHERNET_MAC1_STHWSR_TSHWR6 *((volatile unsigned int*)(0x42CEE498UL))
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#define bFM3_ETHERNET_MAC1_STHWSR_TSHWR7 *((volatile unsigned int*)(0x42CEE49CUL))
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|
#define bFM3_ETHERNET_MAC1_STHWSR_TSHWR8 *((volatile unsigned int*)(0x42CEE4A0UL))
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|
#define bFM3_ETHERNET_MAC1_STHWSR_TSHWR9 *((volatile unsigned int*)(0x42CEE4A4UL))
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#define bFM3_ETHERNET_MAC1_STHWSR_TSHWR10 *((volatile unsigned int*)(0x42CEE4A8UL))
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|
#define bFM3_ETHERNET_MAC1_STHWSR_TSHWR11 *((volatile unsigned int*)(0x42CEE4ACUL))
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|
#define bFM3_ETHERNET_MAC1_STHWSR_TSHWR12 *((volatile unsigned int*)(0x42CEE4B0UL))
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|
#define bFM3_ETHERNET_MAC1_STHWSR_TSHWR13 *((volatile unsigned int*)(0x42CEE4B4UL))
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|
#define bFM3_ETHERNET_MAC1_STHWSR_TSHWR14 *((volatile unsigned int*)(0x42CEE4B8UL))
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#define bFM3_ETHERNET_MAC1_STHWSR_TSHWR15 *((volatile unsigned int*)(0x42CEE4BCUL))
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#define bFM3_ETHERNET_MAC1_TSR_TSSOVF *((volatile unsigned int*)(0x42CEE500UL))
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#define bFM3_ETHERNET_MAC1_TSR_TSTART *((volatile unsigned int*)(0x42CEE504UL))
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#define bFM3_ETHERNET_MAC1_TSR_ATSTS *((volatile unsigned int*)(0x42CEE508UL))
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#define bFM3_ETHERNET_MAC1_TSR_TRGTER *((volatile unsigned int*)(0x42C8E50CUL))
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#define bFM3_ETHERNET_MAC1_TSR_ATSSTM *((volatile unsigned int*)(0x42CEE560UL))
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#define bFM3_ETHERNET_MAC1_TSR_ATSNS0 *((volatile unsigned int*)(0x42CEE564UL))
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#define bFM3_ETHERNET_MAC1_TSR_ATSNS1 *((volatile unsigned int*)(0x42CEE568UL))
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#define bFM3_ETHERNET_MAC1_TSR_ATSNS2 *((volatile unsigned int*)(0x42CEE56CUL))
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#define bFM3_ETHERNET_MAC1_PPSCR_PPSCTRL0 *((volatile unsigned int*)(0x42CEE580UL))
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#define bFM3_ETHERNET_MAC1_PPSCR_PPSCTRL1 *((volatile unsigned int*)(0x42CEE584UL))
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#define bFM3_ETHERNET_MAC1_PPSCR_PPSCTRL2 *((volatile unsigned int*)(0x42CEE588UL))
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#define bFM3_ETHERNET_MAC1_PPSCR_PPSCTRL3 *((volatile unsigned int*)(0x42CEE58CUL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN0 *((volatile unsigned int*)(0x42CEE600UL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN1 *((volatile unsigned int*)(0x42CEE604UL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN2 *((volatile unsigned int*)(0x42CEE608UL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN3 *((volatile unsigned int*)(0x42CEE60CUL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN4 *((volatile unsigned int*)(0x42CEE610UL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN5 *((volatile unsigned int*)(0x42CEE614UL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN6 *((volatile unsigned int*)(0x42CEE618UL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN7 *((volatile unsigned int*)(0x42CEE61CUL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN8 *((volatile unsigned int*)(0x42CEE620UL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN9 *((volatile unsigned int*)(0x42CEE624UL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN10 *((volatile unsigned int*)(0x42CEE628UL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN11 *((volatile unsigned int*)(0x42CEE62CUL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN12 *((volatile unsigned int*)(0x42CEE630UL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN13 *((volatile unsigned int*)(0x42CEE634UL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN14 *((volatile unsigned int*)(0x42CEE638UL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN15 *((volatile unsigned int*)(0x42CEE63CUL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN16 *((volatile unsigned int*)(0x42CEE640UL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN17 *((volatile unsigned int*)(0x42CEE644UL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN18 *((volatile unsigned int*)(0x42CEE648UL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN19 *((volatile unsigned int*)(0x42CEE64CUL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN20 *((volatile unsigned int*)(0x42CEE650UL))
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|
#define bFM3_ETHERNET_MAC1_ATNR_ATN21 *((volatile unsigned int*)(0x42CEE654UL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN22 *((volatile unsigned int*)(0x42CEE658UL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN23 *((volatile unsigned int*)(0x42CEE65CUL))
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|
#define bFM3_ETHERNET_MAC1_ATNR_ATN24 *((volatile unsigned int*)(0x42CEE660UL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN25 *((volatile unsigned int*)(0x42CEE664UL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN26 *((volatile unsigned int*)(0x42CEE668UL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN27 *((volatile unsigned int*)(0x42CEE66CUL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN28 *((volatile unsigned int*)(0x42CEE670UL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN29 *((volatile unsigned int*)(0x42CEE674UL))
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#define bFM3_ETHERNET_MAC1_ATNR_ATN30 *((volatile unsigned int*)(0x42CEE678UL))
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#define bFM3_ETHERNET_MAC1_ATSR_ATS0 *((volatile unsigned int*)(0x42CEE680UL))
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#define bFM3_ETHERNET_MAC1_ATSR_ATS1 *((volatile unsigned int*)(0x42CEE684UL))
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#define bFM3_ETHERNET_MAC1_ATSR_ATS2 *((volatile unsigned int*)(0x42CEE688UL))
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#define bFM3_ETHERNET_MAC1_ATSR_ATS3 *((volatile unsigned int*)(0x42CEE68CUL))
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#define bFM3_ETHERNET_MAC1_ATSR_ATS4 *((volatile unsigned int*)(0x42CEE690UL))
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#define bFM3_ETHERNET_MAC1_ATSR_ATS5 *((volatile unsigned int*)(0x42CEE694UL))
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#define bFM3_ETHERNET_MAC1_ATSR_ATS6 *((volatile unsigned int*)(0x42CEE698UL))
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#define bFM3_ETHERNET_MAC1_ATSR_ATS7 *((volatile unsigned int*)(0x42CEE69CUL))
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#define bFM3_ETHERNET_MAC1_ATSR_ATS8 *((volatile unsigned int*)(0x42CEE6A0UL))
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#define bFM3_ETHERNET_MAC1_ATSR_ATS9 *((volatile unsigned int*)(0x42CEE6A4UL))
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#define bFM3_ETHERNET_MAC1_ATSR_ATS10 *((volatile unsigned int*)(0x42CEE6A8UL))
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#define bFM3_ETHERNET_MAC1_ATSR_ATS11 *((volatile unsigned int*)(0x42CEE6ACUL))
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#define bFM3_ETHERNET_MAC1_ATSR_ATS12 *((volatile unsigned int*)(0x42CEE6B0UL))
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#define bFM3_ETHERNET_MAC1_ATSR_ATS13 *((volatile unsigned int*)(0x42CEE6B4UL))
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#define bFM3_ETHERNET_MAC1_ATSR_ATS14 *((volatile unsigned int*)(0x42CEE6B8UL))
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#define bFM3_ETHERNET_MAC1_ATSR_ATS15 *((volatile unsigned int*)(0x42CEE6BCUL))
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#define bFM3_ETHERNET_MAC1_ATSR_ATS16 *((volatile unsigned int*)(0x42CEE6C0UL))
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#define bFM3_ETHERNET_MAC1_ATSR_ATS17 *((volatile unsigned int*)(0x42CEE6C4UL))
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#define bFM3_ETHERNET_MAC1_ATSR_ATS18 *((volatile unsigned int*)(0x42CEE6C8UL))
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#define bFM3_ETHERNET_MAC1_ATSR_ATS19 *((volatile unsigned int*)(0x42CEE6CCUL))
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#define bFM3_ETHERNET_MAC1_ATSR_ATS20 *((volatile unsigned int*)(0x42CEE6D0UL))
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|
#define bFM3_ETHERNET_MAC1_ATSR_ATS21 *((volatile unsigned int*)(0x42CEE6D4UL))
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#define bFM3_ETHERNET_MAC1_ATSR_ATS22 *((volatile unsigned int*)(0x42CEE6D8UL))
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|
#define bFM3_ETHERNET_MAC1_ATSR_ATS23 *((volatile unsigned int*)(0x42CEE6DCUL))
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#define bFM3_ETHERNET_MAC1_ATSR_ATS24 *((volatile unsigned int*)(0x42CEE6E0UL))
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|
#define bFM3_ETHERNET_MAC1_ATSR_ATS25 *((volatile unsigned int*)(0x42CEE6E4UL))
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|
#define bFM3_ETHERNET_MAC1_ATSR_ATS26 *((volatile unsigned int*)(0x42CEE6E8UL))
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#define bFM3_ETHERNET_MAC1_ATSR_ATS27 *((volatile unsigned int*)(0x42CEE6ECUL))
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#define bFM3_ETHERNET_MAC1_ATSR_ATS28 *((volatile unsigned int*)(0x42CEE6F0UL))
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|
#define bFM3_ETHERNET_MAC1_ATSR_ATS29 *((volatile unsigned int*)(0x42CEE6F4UL))
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|
#define bFM3_ETHERNET_MAC1_ATSR_ATS30 *((volatile unsigned int*)(0x42CEE6F8UL))
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|
#define bFM3_ETHERNET_MAC1_ATSR_ATS31 *((volatile unsigned int*)(0x42CEE6FCUL))
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#define bFM3_ETHERNET_MAC1_MAR16H_A32 *((volatile unsigned int*)(0x42CF0000UL))
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|
#define bFM3_ETHERNET_MAC1_MAR16H_A33 *((volatile unsigned int*)(0x42CF0004UL))
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#define bFM3_ETHERNET_MAC1_MAR16H_A34 *((volatile unsigned int*)(0x42CF0008UL))
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|
#define bFM3_ETHERNET_MAC1_MAR16H_A35 *((volatile unsigned int*)(0x42CF000CUL))
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|
#define bFM3_ETHERNET_MAC1_MAR16H_A36 *((volatile unsigned int*)(0x42CF0010UL))
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|
#define bFM3_ETHERNET_MAC1_MAR16H_A37 *((volatile unsigned int*)(0x42CF0014UL))
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|
#define bFM3_ETHERNET_MAC1_MAR16H_A38 *((volatile unsigned int*)(0x42CF0018UL))
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|
#define bFM3_ETHERNET_MAC1_MAR16H_A39 *((volatile unsigned int*)(0x42CF001CUL))
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|
#define bFM3_ETHERNET_MAC1_MAR16H_A40 *((volatile unsigned int*)(0x42CF0020UL))
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|
#define bFM3_ETHERNET_MAC1_MAR16H_A41 *((volatile unsigned int*)(0x42CF0024UL))
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|
#define bFM3_ETHERNET_MAC1_MAR16H_A42 *((volatile unsigned int*)(0x42CF0028UL))
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|
#define bFM3_ETHERNET_MAC1_MAR16H_A43 *((volatile unsigned int*)(0x42CF002CUL))
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|
#define bFM3_ETHERNET_MAC1_MAR16H_A44 *((volatile unsigned int*)(0x42CF0030UL))
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|
#define bFM3_ETHERNET_MAC1_MAR16H_A45 *((volatile unsigned int*)(0x42CF0034UL))
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|
#define bFM3_ETHERNET_MAC1_MAR16H_A46 *((volatile unsigned int*)(0x42CF0038UL))
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|
#define bFM3_ETHERNET_MAC1_MAR16H_A47 *((volatile unsigned int*)(0x42CF003CUL))
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|
#define bFM3_ETHERNET_MAC1_MAR16H_MBC0 *((volatile unsigned int*)(0x42CF0060UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR16H_MBC1 *((volatile unsigned int*)(0x42CF0064UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR16H_MBC2 *((volatile unsigned int*)(0x42CF0068UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR16H_MBC3 *((volatile unsigned int*)(0x42CF006CUL))
|
|
#define bFM3_ETHERNET_MAC1_MAR16H_MBC4 *((volatile unsigned int*)(0x42CF0070UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR16H_MBC5 *((volatile unsigned int*)(0x42CF0074UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR16H_SA *((volatile unsigned int*)(0x42CF0078UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR16H_AE *((volatile unsigned int*)(0x42CF007CUL))
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|
#define bFM3_ETHERNET_MAC1_MAR16L_A0 *((volatile unsigned int*)(0x42CF0080UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR16L_A1 *((volatile unsigned int*)(0x42CF0084UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR16L_A2 *((volatile unsigned int*)(0x42CF0088UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR16L_A3 *((volatile unsigned int*)(0x42CF008CUL))
|
|
#define bFM3_ETHERNET_MAC1_MAR16L_A4 *((volatile unsigned int*)(0x42CF0090UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR16L_A5 *((volatile unsigned int*)(0x42CF0094UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR16L_A6 *((volatile unsigned int*)(0x42CF0098UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR16L_A7 *((volatile unsigned int*)(0x42CF009CUL))
|
|
#define bFM3_ETHERNET_MAC1_MAR16L_A8 *((volatile unsigned int*)(0x42CF00A0UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR16L_A9 *((volatile unsigned int*)(0x42CF00A4UL))
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|
#define bFM3_ETHERNET_MAC1_MAR16L_A10 *((volatile unsigned int*)(0x42CF00A8UL))
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#define bFM3_ETHERNET_MAC1_MAR16L_A11 *((volatile unsigned int*)(0x42CF00ACUL))
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#define bFM3_ETHERNET_MAC1_MAR16L_A12 *((volatile unsigned int*)(0x42CF00B0UL))
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#define bFM3_ETHERNET_MAC1_MAR16L_A13 *((volatile unsigned int*)(0x42CF00B4UL))
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#define bFM3_ETHERNET_MAC1_MAR16L_A14 *((volatile unsigned int*)(0x42CF00B8UL))
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#define bFM3_ETHERNET_MAC1_MAR16L_A15 *((volatile unsigned int*)(0x42CF00BCUL))
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#define bFM3_ETHERNET_MAC1_MAR16L_A16 *((volatile unsigned int*)(0x42CF00C0UL))
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#define bFM3_ETHERNET_MAC1_MAR16L_A17 *((volatile unsigned int*)(0x42CF00C4UL))
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#define bFM3_ETHERNET_MAC1_MAR16L_A18 *((volatile unsigned int*)(0x42CF00C8UL))
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#define bFM3_ETHERNET_MAC1_MAR16L_A19 *((volatile unsigned int*)(0x42CF00CCUL))
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#define bFM3_ETHERNET_MAC1_MAR16L_A20 *((volatile unsigned int*)(0x42CF00D0UL))
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#define bFM3_ETHERNET_MAC1_MAR16L_A21 *((volatile unsigned int*)(0x42CF00D4UL))
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#define bFM3_ETHERNET_MAC1_MAR16L_A22 *((volatile unsigned int*)(0x42CF00D8UL))
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#define bFM3_ETHERNET_MAC1_MAR16L_A23 *((volatile unsigned int*)(0x42CF00DCUL))
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#define bFM3_ETHERNET_MAC1_MAR16L_A24 *((volatile unsigned int*)(0x42CF00E0UL))
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#define bFM3_ETHERNET_MAC1_MAR16L_A25 *((volatile unsigned int*)(0x42CF00E4UL))
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#define bFM3_ETHERNET_MAC1_MAR16L_A26 *((volatile unsigned int*)(0x42CF00E8UL))
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#define bFM3_ETHERNET_MAC1_MAR16L_A27 *((volatile unsigned int*)(0x42CF00ECUL))
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#define bFM3_ETHERNET_MAC1_MAR16L_A28 *((volatile unsigned int*)(0x42CF00F0UL))
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#define bFM3_ETHERNET_MAC1_MAR16L_A29 *((volatile unsigned int*)(0x42CF00F4UL))
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#define bFM3_ETHERNET_MAC1_MAR16L_A30 *((volatile unsigned int*)(0x42CF00F8UL))
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#define bFM3_ETHERNET_MAC1_MAR16L_A31 *((volatile unsigned int*)(0x42CF00FCUL))
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#define bFM3_ETHERNET_MAC1_MAR17H_A32 *((volatile unsigned int*)(0x42CF0100UL))
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#define bFM3_ETHERNET_MAC1_MAR17H_A33 *((volatile unsigned int*)(0x42CF0104UL))
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#define bFM3_ETHERNET_MAC1_MAR17H_A34 *((volatile unsigned int*)(0x42CF0108UL))
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#define bFM3_ETHERNET_MAC1_MAR17H_A35 *((volatile unsigned int*)(0x42CF010CUL))
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#define bFM3_ETHERNET_MAC1_MAR17H_A36 *((volatile unsigned int*)(0x42CF0110UL))
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#define bFM3_ETHERNET_MAC1_MAR17H_A37 *((volatile unsigned int*)(0x42CF0114UL))
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#define bFM3_ETHERNET_MAC1_MAR17H_A38 *((volatile unsigned int*)(0x42CF0118UL))
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#define bFM3_ETHERNET_MAC1_MAR17H_A39 *((volatile unsigned int*)(0x42CF011CUL))
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#define bFM3_ETHERNET_MAC1_MAR17H_A40 *((volatile unsigned int*)(0x42CF0120UL))
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#define bFM3_ETHERNET_MAC1_MAR17H_A41 *((volatile unsigned int*)(0x42CF0124UL))
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#define bFM3_ETHERNET_MAC1_MAR17H_A42 *((volatile unsigned int*)(0x42CF0128UL))
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#define bFM3_ETHERNET_MAC1_MAR17H_A43 *((volatile unsigned int*)(0x42CF012CUL))
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#define bFM3_ETHERNET_MAC1_MAR17H_A44 *((volatile unsigned int*)(0x42CF0130UL))
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#define bFM3_ETHERNET_MAC1_MAR17H_A45 *((volatile unsigned int*)(0x42CF0134UL))
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#define bFM3_ETHERNET_MAC1_MAR17H_A46 *((volatile unsigned int*)(0x42CF0138UL))
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#define bFM3_ETHERNET_MAC1_MAR17H_A47 *((volatile unsigned int*)(0x42CF013CUL))
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#define bFM3_ETHERNET_MAC1_MAR17H_MBC0 *((volatile unsigned int*)(0x42CF0160UL))
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#define bFM3_ETHERNET_MAC1_MAR17H_MBC1 *((volatile unsigned int*)(0x42CF0164UL))
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#define bFM3_ETHERNET_MAC1_MAR17H_MBC2 *((volatile unsigned int*)(0x42CF0168UL))
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#define bFM3_ETHERNET_MAC1_MAR17H_MBC3 *((volatile unsigned int*)(0x42CF016CUL))
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#define bFM3_ETHERNET_MAC1_MAR17H_MBC4 *((volatile unsigned int*)(0x42CF0170UL))
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#define bFM3_ETHERNET_MAC1_MAR17H_MBC5 *((volatile unsigned int*)(0x42CF0174UL))
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#define bFM3_ETHERNET_MAC1_MAR17H_SA *((volatile unsigned int*)(0x42CF0178UL))
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#define bFM3_ETHERNET_MAC1_MAR17H_AE *((volatile unsigned int*)(0x42CF017CUL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A0 *((volatile unsigned int*)(0x42CF0180UL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A1 *((volatile unsigned int*)(0x42CF0184UL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A2 *((volatile unsigned int*)(0x42CF0188UL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A3 *((volatile unsigned int*)(0x42CF018CUL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A4 *((volatile unsigned int*)(0x42CF0190UL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A5 *((volatile unsigned int*)(0x42CF0194UL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A6 *((volatile unsigned int*)(0x42CF0198UL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A7 *((volatile unsigned int*)(0x42CF019CUL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A8 *((volatile unsigned int*)(0x42CF01A0UL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A9 *((volatile unsigned int*)(0x42CF01A4UL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A10 *((volatile unsigned int*)(0x42CF01A8UL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A11 *((volatile unsigned int*)(0x42CF01ACUL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A12 *((volatile unsigned int*)(0x42CF01B0UL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A13 *((volatile unsigned int*)(0x42CF01B4UL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A14 *((volatile unsigned int*)(0x42CF01B8UL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A15 *((volatile unsigned int*)(0x42CF01BCUL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A16 *((volatile unsigned int*)(0x42CF01C0UL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A17 *((volatile unsigned int*)(0x42CF01C4UL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A18 *((volatile unsigned int*)(0x42CF01C8UL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A19 *((volatile unsigned int*)(0x42CF01CCUL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A20 *((volatile unsigned int*)(0x42CF01D0UL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A21 *((volatile unsigned int*)(0x42CF01D4UL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A22 *((volatile unsigned int*)(0x42CF01D8UL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A23 *((volatile unsigned int*)(0x42CF01DCUL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A24 *((volatile unsigned int*)(0x42CF01E0UL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A25 *((volatile unsigned int*)(0x42CF01E4UL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A26 *((volatile unsigned int*)(0x42CF01E8UL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A27 *((volatile unsigned int*)(0x42CF01ECUL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A28 *((volatile unsigned int*)(0x42CF01F0UL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A29 *((volatile unsigned int*)(0x42CF01F4UL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A30 *((volatile unsigned int*)(0x42CF01F8UL))
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#define bFM3_ETHERNET_MAC1_MAR17L_A31 *((volatile unsigned int*)(0x42CF01FCUL))
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#define bFM3_ETHERNET_MAC1_MAR18H_A32 *((volatile unsigned int*)(0x42CF0200UL))
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#define bFM3_ETHERNET_MAC1_MAR18H_A33 *((volatile unsigned int*)(0x42CF0204UL))
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#define bFM3_ETHERNET_MAC1_MAR18H_A34 *((volatile unsigned int*)(0x42CF0208UL))
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#define bFM3_ETHERNET_MAC1_MAR18H_A35 *((volatile unsigned int*)(0x42CF020CUL))
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#define bFM3_ETHERNET_MAC1_MAR18H_A36 *((volatile unsigned int*)(0x42CF0210UL))
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#define bFM3_ETHERNET_MAC1_MAR18H_A37 *((volatile unsigned int*)(0x42CF0214UL))
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#define bFM3_ETHERNET_MAC1_MAR18H_A38 *((volatile unsigned int*)(0x42CF0218UL))
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#define bFM3_ETHERNET_MAC1_MAR18H_A39 *((volatile unsigned int*)(0x42CF021CUL))
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#define bFM3_ETHERNET_MAC1_MAR18H_A40 *((volatile unsigned int*)(0x42CF0220UL))
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#define bFM3_ETHERNET_MAC1_MAR18H_A41 *((volatile unsigned int*)(0x42CF0224UL))
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#define bFM3_ETHERNET_MAC1_MAR18H_A42 *((volatile unsigned int*)(0x42CF0228UL))
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#define bFM3_ETHERNET_MAC1_MAR18H_A43 *((volatile unsigned int*)(0x42CF022CUL))
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#define bFM3_ETHERNET_MAC1_MAR18H_A44 *((volatile unsigned int*)(0x42CF0230UL))
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#define bFM3_ETHERNET_MAC1_MAR18H_A45 *((volatile unsigned int*)(0x42CF0234UL))
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#define bFM3_ETHERNET_MAC1_MAR18H_A46 *((volatile unsigned int*)(0x42CF0238UL))
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#define bFM3_ETHERNET_MAC1_MAR18H_A47 *((volatile unsigned int*)(0x42CF023CUL))
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#define bFM3_ETHERNET_MAC1_MAR18H_MBC0 *((volatile unsigned int*)(0x42CF0260UL))
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#define bFM3_ETHERNET_MAC1_MAR18H_MBC1 *((volatile unsigned int*)(0x42CF0264UL))
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#define bFM3_ETHERNET_MAC1_MAR18H_MBC2 *((volatile unsigned int*)(0x42CF0268UL))
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#define bFM3_ETHERNET_MAC1_MAR18H_MBC3 *((volatile unsigned int*)(0x42CF026CUL))
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#define bFM3_ETHERNET_MAC1_MAR18H_MBC4 *((volatile unsigned int*)(0x42CF0270UL))
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#define bFM3_ETHERNET_MAC1_MAR18H_MBC5 *((volatile unsigned int*)(0x42CF0274UL))
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#define bFM3_ETHERNET_MAC1_MAR18H_SA *((volatile unsigned int*)(0x42CF0278UL))
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#define bFM3_ETHERNET_MAC1_MAR18H_AE *((volatile unsigned int*)(0x42CF027CUL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A0 *((volatile unsigned int*)(0x42CF0280UL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A1 *((volatile unsigned int*)(0x42CF0284UL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A2 *((volatile unsigned int*)(0x42CF0288UL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A3 *((volatile unsigned int*)(0x42CF028CUL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A4 *((volatile unsigned int*)(0x42CF0290UL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A5 *((volatile unsigned int*)(0x42CF0294UL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A6 *((volatile unsigned int*)(0x42CF0298UL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A7 *((volatile unsigned int*)(0x42CF029CUL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A8 *((volatile unsigned int*)(0x42CF02A0UL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A9 *((volatile unsigned int*)(0x42CF02A4UL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A10 *((volatile unsigned int*)(0x42CF02A8UL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A11 *((volatile unsigned int*)(0x42CF02ACUL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A12 *((volatile unsigned int*)(0x42CF02B0UL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A13 *((volatile unsigned int*)(0x42CF02B4UL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A14 *((volatile unsigned int*)(0x42CF02B8UL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A15 *((volatile unsigned int*)(0x42CF02BCUL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A16 *((volatile unsigned int*)(0x42CF02C0UL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A17 *((volatile unsigned int*)(0x42CF02C4UL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A18 *((volatile unsigned int*)(0x42CF02C8UL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A19 *((volatile unsigned int*)(0x42CF02CCUL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A20 *((volatile unsigned int*)(0x42CF02D0UL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A21 *((volatile unsigned int*)(0x42CF02D4UL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A22 *((volatile unsigned int*)(0x42CF02D8UL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A23 *((volatile unsigned int*)(0x42CF02DCUL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A24 *((volatile unsigned int*)(0x42CF02E0UL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A25 *((volatile unsigned int*)(0x42CF02E4UL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A26 *((volatile unsigned int*)(0x42CF02E8UL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A27 *((volatile unsigned int*)(0x42CF02ECUL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A28 *((volatile unsigned int*)(0x42CF02F0UL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A29 *((volatile unsigned int*)(0x42CF02F4UL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A30 *((volatile unsigned int*)(0x42CF02F8UL))
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#define bFM3_ETHERNET_MAC1_MAR18L_A31 *((volatile unsigned int*)(0x42CF02FCUL))
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#define bFM3_ETHERNET_MAC1_MAR19H_A32 *((volatile unsigned int*)(0x42CF0300UL))
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#define bFM3_ETHERNET_MAC1_MAR19H_A33 *((volatile unsigned int*)(0x42CF0304UL))
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#define bFM3_ETHERNET_MAC1_MAR19H_A34 *((volatile unsigned int*)(0x42CF0308UL))
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#define bFM3_ETHERNET_MAC1_MAR19H_A35 *((volatile unsigned int*)(0x42CF030CUL))
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#define bFM3_ETHERNET_MAC1_MAR19H_A36 *((volatile unsigned int*)(0x42CF0310UL))
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#define bFM3_ETHERNET_MAC1_MAR19H_A37 *((volatile unsigned int*)(0x42CF0314UL))
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#define bFM3_ETHERNET_MAC1_MAR19H_A38 *((volatile unsigned int*)(0x42CF0318UL))
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#define bFM3_ETHERNET_MAC1_MAR19H_A39 *((volatile unsigned int*)(0x42CF031CUL))
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#define bFM3_ETHERNET_MAC1_MAR19H_A40 *((volatile unsigned int*)(0x42CF0320UL))
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#define bFM3_ETHERNET_MAC1_MAR19H_A41 *((volatile unsigned int*)(0x42CF0324UL))
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#define bFM3_ETHERNET_MAC1_MAR19H_A42 *((volatile unsigned int*)(0x42CF0328UL))
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#define bFM3_ETHERNET_MAC1_MAR19H_A43 *((volatile unsigned int*)(0x42CF032CUL))
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#define bFM3_ETHERNET_MAC1_MAR19H_A44 *((volatile unsigned int*)(0x42CF0330UL))
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#define bFM3_ETHERNET_MAC1_MAR19H_A45 *((volatile unsigned int*)(0x42CF0334UL))
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#define bFM3_ETHERNET_MAC1_MAR19H_A46 *((volatile unsigned int*)(0x42CF0338UL))
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#define bFM3_ETHERNET_MAC1_MAR19H_A47 *((volatile unsigned int*)(0x42CF033CUL))
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#define bFM3_ETHERNET_MAC1_MAR19H_MBC0 *((volatile unsigned int*)(0x42CF0360UL))
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#define bFM3_ETHERNET_MAC1_MAR19H_MBC1 *((volatile unsigned int*)(0x42CF0364UL))
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#define bFM3_ETHERNET_MAC1_MAR19H_MBC2 *((volatile unsigned int*)(0x42CF0368UL))
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#define bFM3_ETHERNET_MAC1_MAR19H_MBC3 *((volatile unsigned int*)(0x42CF036CUL))
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#define bFM3_ETHERNET_MAC1_MAR19H_MBC4 *((volatile unsigned int*)(0x42CF0370UL))
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#define bFM3_ETHERNET_MAC1_MAR19H_MBC5 *((volatile unsigned int*)(0x42CF0374UL))
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#define bFM3_ETHERNET_MAC1_MAR19H_SA *((volatile unsigned int*)(0x42CF0378UL))
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#define bFM3_ETHERNET_MAC1_MAR19H_AE *((volatile unsigned int*)(0x42CF037CUL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A0 *((volatile unsigned int*)(0x42CF0380UL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A1 *((volatile unsigned int*)(0x42CF0384UL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A2 *((volatile unsigned int*)(0x42CF0388UL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A3 *((volatile unsigned int*)(0x42CF038CUL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A4 *((volatile unsigned int*)(0x42CF0390UL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A5 *((volatile unsigned int*)(0x42CF0394UL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A6 *((volatile unsigned int*)(0x42CF0398UL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A7 *((volatile unsigned int*)(0x42CF039CUL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A8 *((volatile unsigned int*)(0x42CF03A0UL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A9 *((volatile unsigned int*)(0x42CF03A4UL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A10 *((volatile unsigned int*)(0x42CF03A8UL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A11 *((volatile unsigned int*)(0x42CF03ACUL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A12 *((volatile unsigned int*)(0x42CF03B0UL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A13 *((volatile unsigned int*)(0x42CF03B4UL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A14 *((volatile unsigned int*)(0x42CF03B8UL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A15 *((volatile unsigned int*)(0x42CF03BCUL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A16 *((volatile unsigned int*)(0x42CF03C0UL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A17 *((volatile unsigned int*)(0x42CF03C4UL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A18 *((volatile unsigned int*)(0x42CF03C8UL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A19 *((volatile unsigned int*)(0x42CF03CCUL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A20 *((volatile unsigned int*)(0x42CF03D0UL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A21 *((volatile unsigned int*)(0x42CF03D4UL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A22 *((volatile unsigned int*)(0x42CF03D8UL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A23 *((volatile unsigned int*)(0x42CF03DCUL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A24 *((volatile unsigned int*)(0x42CF03E0UL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A25 *((volatile unsigned int*)(0x42CF03E4UL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A26 *((volatile unsigned int*)(0x42CF03E8UL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A27 *((volatile unsigned int*)(0x42CF03ECUL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A28 *((volatile unsigned int*)(0x42CF03F0UL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A29 *((volatile unsigned int*)(0x42CF03F4UL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A30 *((volatile unsigned int*)(0x42CF03F8UL))
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#define bFM3_ETHERNET_MAC1_MAR19L_A31 *((volatile unsigned int*)(0x42CF03FCUL))
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#define bFM3_ETHERNET_MAC1_MAR20H_A32 *((volatile unsigned int*)(0x42CF0400UL))
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#define bFM3_ETHERNET_MAC1_MAR20H_A33 *((volatile unsigned int*)(0x42CF0404UL))
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#define bFM3_ETHERNET_MAC1_MAR20H_A34 *((volatile unsigned int*)(0x42CF0408UL))
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#define bFM3_ETHERNET_MAC1_MAR20H_A35 *((volatile unsigned int*)(0x42CF040CUL))
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#define bFM3_ETHERNET_MAC1_MAR20H_A36 *((volatile unsigned int*)(0x42CF0410UL))
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#define bFM3_ETHERNET_MAC1_MAR20H_A37 *((volatile unsigned int*)(0x42CF0414UL))
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#define bFM3_ETHERNET_MAC1_MAR20H_A38 *((volatile unsigned int*)(0x42CF0418UL))
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#define bFM3_ETHERNET_MAC1_MAR20H_A39 *((volatile unsigned int*)(0x42CF041CUL))
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#define bFM3_ETHERNET_MAC1_MAR20H_A40 *((volatile unsigned int*)(0x42CF0420UL))
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#define bFM3_ETHERNET_MAC1_MAR20H_A41 *((volatile unsigned int*)(0x42CF0424UL))
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#define bFM3_ETHERNET_MAC1_MAR20H_A42 *((volatile unsigned int*)(0x42CF0428UL))
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#define bFM3_ETHERNET_MAC1_MAR20H_A43 *((volatile unsigned int*)(0x42CF042CUL))
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#define bFM3_ETHERNET_MAC1_MAR20H_A44 *((volatile unsigned int*)(0x42CF0430UL))
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#define bFM3_ETHERNET_MAC1_MAR20H_A45 *((volatile unsigned int*)(0x42CF0434UL))
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#define bFM3_ETHERNET_MAC1_MAR20H_A46 *((volatile unsigned int*)(0x42CF0438UL))
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#define bFM3_ETHERNET_MAC1_MAR20H_A47 *((volatile unsigned int*)(0x42CF043CUL))
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#define bFM3_ETHERNET_MAC1_MAR20H_MBC0 *((volatile unsigned int*)(0x42CF0460UL))
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#define bFM3_ETHERNET_MAC1_MAR20H_MBC1 *((volatile unsigned int*)(0x42CF0464UL))
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#define bFM3_ETHERNET_MAC1_MAR20H_MBC2 *((volatile unsigned int*)(0x42CF0468UL))
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#define bFM3_ETHERNET_MAC1_MAR20H_MBC3 *((volatile unsigned int*)(0x42CF046CUL))
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#define bFM3_ETHERNET_MAC1_MAR20H_MBC4 *((volatile unsigned int*)(0x42CF0470UL))
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#define bFM3_ETHERNET_MAC1_MAR20H_MBC5 *((volatile unsigned int*)(0x42CF0474UL))
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#define bFM3_ETHERNET_MAC1_MAR20H_SA *((volatile unsigned int*)(0x42CF0478UL))
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#define bFM3_ETHERNET_MAC1_MAR20H_AE *((volatile unsigned int*)(0x42CF047CUL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A0 *((volatile unsigned int*)(0x42CF0480UL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A1 *((volatile unsigned int*)(0x42CF0484UL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A2 *((volatile unsigned int*)(0x42CF0488UL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A3 *((volatile unsigned int*)(0x42CF048CUL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A4 *((volatile unsigned int*)(0x42CF0490UL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A5 *((volatile unsigned int*)(0x42CF0494UL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A6 *((volatile unsigned int*)(0x42CF0498UL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A7 *((volatile unsigned int*)(0x42CF049CUL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A8 *((volatile unsigned int*)(0x42CF04A0UL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A9 *((volatile unsigned int*)(0x42CF04A4UL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A10 *((volatile unsigned int*)(0x42CF04A8UL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A11 *((volatile unsigned int*)(0x42CF04ACUL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A12 *((volatile unsigned int*)(0x42CF04B0UL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A13 *((volatile unsigned int*)(0x42CF04B4UL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A14 *((volatile unsigned int*)(0x42CF04B8UL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A15 *((volatile unsigned int*)(0x42CF04BCUL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A16 *((volatile unsigned int*)(0x42CF04C0UL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A17 *((volatile unsigned int*)(0x42CF04C4UL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A18 *((volatile unsigned int*)(0x42CF04C8UL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A19 *((volatile unsigned int*)(0x42CF04CCUL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A20 *((volatile unsigned int*)(0x42CF04D0UL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A21 *((volatile unsigned int*)(0x42CF04D4UL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A22 *((volatile unsigned int*)(0x42CF04D8UL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A23 *((volatile unsigned int*)(0x42CF04DCUL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A24 *((volatile unsigned int*)(0x42CF04E0UL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A25 *((volatile unsigned int*)(0x42CF04E4UL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A26 *((volatile unsigned int*)(0x42CF04E8UL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A27 *((volatile unsigned int*)(0x42CF04ECUL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A28 *((volatile unsigned int*)(0x42CF04F0UL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A29 *((volatile unsigned int*)(0x42CF04F4UL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A30 *((volatile unsigned int*)(0x42CF04F8UL))
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#define bFM3_ETHERNET_MAC1_MAR20L_A31 *((volatile unsigned int*)(0x42CF04FCUL))
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#define bFM3_ETHERNET_MAC1_MAR21H_A32 *((volatile unsigned int*)(0x42CF0500UL))
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#define bFM3_ETHERNET_MAC1_MAR21H_A33 *((volatile unsigned int*)(0x42CF0504UL))
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#define bFM3_ETHERNET_MAC1_MAR21H_A34 *((volatile unsigned int*)(0x42CF0508UL))
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#define bFM3_ETHERNET_MAC1_MAR21H_A35 *((volatile unsigned int*)(0x42CF050CUL))
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#define bFM3_ETHERNET_MAC1_MAR21H_A36 *((volatile unsigned int*)(0x42CF0510UL))
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#define bFM3_ETHERNET_MAC1_MAR21H_A37 *((volatile unsigned int*)(0x42CF0514UL))
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#define bFM3_ETHERNET_MAC1_MAR21H_A38 *((volatile unsigned int*)(0x42CF0518UL))
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#define bFM3_ETHERNET_MAC1_MAR21H_A39 *((volatile unsigned int*)(0x42CF051CUL))
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#define bFM3_ETHERNET_MAC1_MAR21H_A40 *((volatile unsigned int*)(0x42CF0520UL))
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#define bFM3_ETHERNET_MAC1_MAR21H_A41 *((volatile unsigned int*)(0x42CF0524UL))
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#define bFM3_ETHERNET_MAC1_MAR21H_A42 *((volatile unsigned int*)(0x42CF0528UL))
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#define bFM3_ETHERNET_MAC1_MAR21H_A43 *((volatile unsigned int*)(0x42CF052CUL))
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#define bFM3_ETHERNET_MAC1_MAR21H_A44 *((volatile unsigned int*)(0x42CF0530UL))
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#define bFM3_ETHERNET_MAC1_MAR21H_A45 *((volatile unsigned int*)(0x42CF0534UL))
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#define bFM3_ETHERNET_MAC1_MAR21H_A46 *((volatile unsigned int*)(0x42CF0538UL))
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#define bFM3_ETHERNET_MAC1_MAR21H_A47 *((volatile unsigned int*)(0x42CF053CUL))
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#define bFM3_ETHERNET_MAC1_MAR21H_MBC0 *((volatile unsigned int*)(0x42CF0560UL))
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|
#define bFM3_ETHERNET_MAC1_MAR21H_MBC1 *((volatile unsigned int*)(0x42CF0564UL))
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|
#define bFM3_ETHERNET_MAC1_MAR21H_MBC2 *((volatile unsigned int*)(0x42CF0568UL))
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#define bFM3_ETHERNET_MAC1_MAR21H_MBC3 *((volatile unsigned int*)(0x42CF056CUL))
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#define bFM3_ETHERNET_MAC1_MAR21H_MBC4 *((volatile unsigned int*)(0x42CF0570UL))
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|
#define bFM3_ETHERNET_MAC1_MAR21H_MBC5 *((volatile unsigned int*)(0x42CF0574UL))
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#define bFM3_ETHERNET_MAC1_MAR21H_SA *((volatile unsigned int*)(0x42CF0578UL))
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|
#define bFM3_ETHERNET_MAC1_MAR21H_AE *((volatile unsigned int*)(0x42CF057CUL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A0 *((volatile unsigned int*)(0x42CF0580UL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A1 *((volatile unsigned int*)(0x42CF0584UL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A2 *((volatile unsigned int*)(0x42CF0588UL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A3 *((volatile unsigned int*)(0x42CF058CUL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A4 *((volatile unsigned int*)(0x42CF0590UL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A5 *((volatile unsigned int*)(0x42CF0594UL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A6 *((volatile unsigned int*)(0x42CF0598UL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A7 *((volatile unsigned int*)(0x42CF059CUL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A8 *((volatile unsigned int*)(0x42CF05A0UL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A9 *((volatile unsigned int*)(0x42CF05A4UL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A10 *((volatile unsigned int*)(0x42CF05A8UL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A11 *((volatile unsigned int*)(0x42CF05ACUL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A12 *((volatile unsigned int*)(0x42CF05B0UL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A13 *((volatile unsigned int*)(0x42CF05B4UL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A14 *((volatile unsigned int*)(0x42CF05B8UL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A15 *((volatile unsigned int*)(0x42CF05BCUL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A16 *((volatile unsigned int*)(0x42CF05C0UL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A17 *((volatile unsigned int*)(0x42CF05C4UL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A18 *((volatile unsigned int*)(0x42CF05C8UL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A19 *((volatile unsigned int*)(0x42CF05CCUL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A20 *((volatile unsigned int*)(0x42CF05D0UL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A21 *((volatile unsigned int*)(0x42CF05D4UL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A22 *((volatile unsigned int*)(0x42CF05D8UL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A23 *((volatile unsigned int*)(0x42CF05DCUL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A24 *((volatile unsigned int*)(0x42CF05E0UL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A25 *((volatile unsigned int*)(0x42CF05E4UL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A26 *((volatile unsigned int*)(0x42CF05E8UL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A27 *((volatile unsigned int*)(0x42CF05ECUL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A28 *((volatile unsigned int*)(0x42CF05F0UL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A29 *((volatile unsigned int*)(0x42CF05F4UL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A30 *((volatile unsigned int*)(0x42CF05F8UL))
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#define bFM3_ETHERNET_MAC1_MAR21L_A31 *((volatile unsigned int*)(0x42CF05FCUL))
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#define bFM3_ETHERNET_MAC1_MAR22H_A32 *((volatile unsigned int*)(0x42CF0600UL))
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#define bFM3_ETHERNET_MAC1_MAR22H_A33 *((volatile unsigned int*)(0x42CF0604UL))
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#define bFM3_ETHERNET_MAC1_MAR22H_A34 *((volatile unsigned int*)(0x42CF0608UL))
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#define bFM3_ETHERNET_MAC1_MAR22H_A35 *((volatile unsigned int*)(0x42CF060CUL))
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#define bFM3_ETHERNET_MAC1_MAR22H_A36 *((volatile unsigned int*)(0x42CF0610UL))
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#define bFM3_ETHERNET_MAC1_MAR22H_A37 *((volatile unsigned int*)(0x42CF0614UL))
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#define bFM3_ETHERNET_MAC1_MAR22H_A38 *((volatile unsigned int*)(0x42CF0618UL))
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#define bFM3_ETHERNET_MAC1_MAR22H_A39 *((volatile unsigned int*)(0x42CF061CUL))
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#define bFM3_ETHERNET_MAC1_MAR22H_A40 *((volatile unsigned int*)(0x42CF0620UL))
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#define bFM3_ETHERNET_MAC1_MAR22H_A41 *((volatile unsigned int*)(0x42CF0624UL))
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#define bFM3_ETHERNET_MAC1_MAR22H_A42 *((volatile unsigned int*)(0x42CF0628UL))
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#define bFM3_ETHERNET_MAC1_MAR22H_A43 *((volatile unsigned int*)(0x42CF062CUL))
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#define bFM3_ETHERNET_MAC1_MAR22H_A44 *((volatile unsigned int*)(0x42CF0630UL))
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#define bFM3_ETHERNET_MAC1_MAR22H_A45 *((volatile unsigned int*)(0x42CF0634UL))
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#define bFM3_ETHERNET_MAC1_MAR22H_A46 *((volatile unsigned int*)(0x42CF0638UL))
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#define bFM3_ETHERNET_MAC1_MAR22H_A47 *((volatile unsigned int*)(0x42CF063CUL))
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#define bFM3_ETHERNET_MAC1_MAR22H_MBC0 *((volatile unsigned int*)(0x42CF0660UL))
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#define bFM3_ETHERNET_MAC1_MAR22H_MBC1 *((volatile unsigned int*)(0x42CF0664UL))
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#define bFM3_ETHERNET_MAC1_MAR22H_MBC2 *((volatile unsigned int*)(0x42CF0668UL))
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#define bFM3_ETHERNET_MAC1_MAR22H_MBC3 *((volatile unsigned int*)(0x42CF066CUL))
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#define bFM3_ETHERNET_MAC1_MAR22H_MBC4 *((volatile unsigned int*)(0x42CF0670UL))
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#define bFM3_ETHERNET_MAC1_MAR22H_MBC5 *((volatile unsigned int*)(0x42CF0674UL))
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#define bFM3_ETHERNET_MAC1_MAR22H_SA *((volatile unsigned int*)(0x42CF0678UL))
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#define bFM3_ETHERNET_MAC1_MAR22H_AE *((volatile unsigned int*)(0x42CF067CUL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A0 *((volatile unsigned int*)(0x42CF0680UL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A1 *((volatile unsigned int*)(0x42CF0684UL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A2 *((volatile unsigned int*)(0x42CF0688UL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A3 *((volatile unsigned int*)(0x42CF068CUL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A4 *((volatile unsigned int*)(0x42CF0690UL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A5 *((volatile unsigned int*)(0x42CF0694UL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A6 *((volatile unsigned int*)(0x42CF0698UL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A7 *((volatile unsigned int*)(0x42CF069CUL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A8 *((volatile unsigned int*)(0x42CF06A0UL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A9 *((volatile unsigned int*)(0x42CF06A4UL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A10 *((volatile unsigned int*)(0x42CF06A8UL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A11 *((volatile unsigned int*)(0x42CF06ACUL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A12 *((volatile unsigned int*)(0x42CF06B0UL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A13 *((volatile unsigned int*)(0x42CF06B4UL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A14 *((volatile unsigned int*)(0x42CF06B8UL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A15 *((volatile unsigned int*)(0x42CF06BCUL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A16 *((volatile unsigned int*)(0x42CF06C0UL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A17 *((volatile unsigned int*)(0x42CF06C4UL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A18 *((volatile unsigned int*)(0x42CF06C8UL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A19 *((volatile unsigned int*)(0x42CF06CCUL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A20 *((volatile unsigned int*)(0x42CF06D0UL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A21 *((volatile unsigned int*)(0x42CF06D4UL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A22 *((volatile unsigned int*)(0x42CF06D8UL))
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|
#define bFM3_ETHERNET_MAC1_MAR22L_A23 *((volatile unsigned int*)(0x42CF06DCUL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A24 *((volatile unsigned int*)(0x42CF06E0UL))
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|
#define bFM3_ETHERNET_MAC1_MAR22L_A25 *((volatile unsigned int*)(0x42CF06E4UL))
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|
#define bFM3_ETHERNET_MAC1_MAR22L_A26 *((volatile unsigned int*)(0x42CF06E8UL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A27 *((volatile unsigned int*)(0x42CF06ECUL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A28 *((volatile unsigned int*)(0x42CF06F0UL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A29 *((volatile unsigned int*)(0x42CF06F4UL))
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#define bFM3_ETHERNET_MAC1_MAR22L_A30 *((volatile unsigned int*)(0x42CF06F8UL))
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|
#define bFM3_ETHERNET_MAC1_MAR22L_A31 *((volatile unsigned int*)(0x42CF06FCUL))
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#define bFM3_ETHERNET_MAC1_MAR23H_A32 *((volatile unsigned int*)(0x42CF0700UL))
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|
#define bFM3_ETHERNET_MAC1_MAR23H_A33 *((volatile unsigned int*)(0x42CF0704UL))
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|
#define bFM3_ETHERNET_MAC1_MAR23H_A34 *((volatile unsigned int*)(0x42CF0708UL))
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|
#define bFM3_ETHERNET_MAC1_MAR23H_A35 *((volatile unsigned int*)(0x42CF070CUL))
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|
#define bFM3_ETHERNET_MAC1_MAR23H_A36 *((volatile unsigned int*)(0x42CF0710UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR23H_A37 *((volatile unsigned int*)(0x42CF0714UL))
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|
#define bFM3_ETHERNET_MAC1_MAR23H_A38 *((volatile unsigned int*)(0x42CF0718UL))
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|
#define bFM3_ETHERNET_MAC1_MAR23H_A39 *((volatile unsigned int*)(0x42CF071CUL))
|
|
#define bFM3_ETHERNET_MAC1_MAR23H_A40 *((volatile unsigned int*)(0x42CF0720UL))
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|
#define bFM3_ETHERNET_MAC1_MAR23H_A41 *((volatile unsigned int*)(0x42CF0724UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR23H_A42 *((volatile unsigned int*)(0x42CF0728UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR23H_A43 *((volatile unsigned int*)(0x42CF072CUL))
|
|
#define bFM3_ETHERNET_MAC1_MAR23H_A44 *((volatile unsigned int*)(0x42CF0730UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR23H_A45 *((volatile unsigned int*)(0x42CF0734UL))
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|
#define bFM3_ETHERNET_MAC1_MAR23H_A46 *((volatile unsigned int*)(0x42CF0738UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR23H_A47 *((volatile unsigned int*)(0x42CF073CUL))
|
|
#define bFM3_ETHERNET_MAC1_MAR23H_MBC0 *((volatile unsigned int*)(0x42CF0760UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR23H_MBC1 *((volatile unsigned int*)(0x42CF0764UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR23H_MBC2 *((volatile unsigned int*)(0x42CF0768UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR23H_MBC3 *((volatile unsigned int*)(0x42CF076CUL))
|
|
#define bFM3_ETHERNET_MAC1_MAR23H_MBC4 *((volatile unsigned int*)(0x42CF0770UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR23H_MBC5 *((volatile unsigned int*)(0x42CF0774UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR23H_SA *((volatile unsigned int*)(0x42CF0778UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR23H_AE *((volatile unsigned int*)(0x42CF077CUL))
|
|
#define bFM3_ETHERNET_MAC1_MAR23L_A0 *((volatile unsigned int*)(0x42CF0780UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR23L_A1 *((volatile unsigned int*)(0x42CF0784UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR23L_A2 *((volatile unsigned int*)(0x42CF0788UL))
|
|
#define bFM3_ETHERNET_MAC1_MAR23L_A3 *((volatile unsigned int*)(0x42CF078CUL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A4 *((volatile unsigned int*)(0x42CF0790UL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A5 *((volatile unsigned int*)(0x42CF0794UL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A6 *((volatile unsigned int*)(0x42CF0798UL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A7 *((volatile unsigned int*)(0x42CF079CUL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A8 *((volatile unsigned int*)(0x42CF07A0UL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A9 *((volatile unsigned int*)(0x42CF07A4UL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A10 *((volatile unsigned int*)(0x42CF07A8UL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A11 *((volatile unsigned int*)(0x42CF07ACUL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A12 *((volatile unsigned int*)(0x42CF07B0UL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A13 *((volatile unsigned int*)(0x42CF07B4UL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A14 *((volatile unsigned int*)(0x42CF07B8UL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A15 *((volatile unsigned int*)(0x42CF07BCUL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A16 *((volatile unsigned int*)(0x42CF07C0UL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A17 *((volatile unsigned int*)(0x42CF07C4UL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A18 *((volatile unsigned int*)(0x42CF07C8UL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A19 *((volatile unsigned int*)(0x42CF07CCUL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A20 *((volatile unsigned int*)(0x42CF07D0UL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A21 *((volatile unsigned int*)(0x42CF07D4UL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A22 *((volatile unsigned int*)(0x42CF07D8UL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A23 *((volatile unsigned int*)(0x42CF07DCUL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A24 *((volatile unsigned int*)(0x42CF07E0UL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A25 *((volatile unsigned int*)(0x42CF07E4UL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A26 *((volatile unsigned int*)(0x42CF07E8UL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A27 *((volatile unsigned int*)(0x42CF07ECUL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A28 *((volatile unsigned int*)(0x42CF07F0UL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A29 *((volatile unsigned int*)(0x42CF07F4UL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A30 *((volatile unsigned int*)(0x42CF07F8UL))
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#define bFM3_ETHERNET_MAC1_MAR23L_A31 *((volatile unsigned int*)(0x42CF07FCUL))
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#define bFM3_ETHERNET_MAC1_MAR24H_A32 *((volatile unsigned int*)(0x42CF0800UL))
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#define bFM3_ETHERNET_MAC1_MAR24H_A33 *((volatile unsigned int*)(0x42CF0804UL))
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#define bFM3_ETHERNET_MAC1_MAR24H_A34 *((volatile unsigned int*)(0x42CF0808UL))
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#define bFM3_ETHERNET_MAC1_MAR24H_A35 *((volatile unsigned int*)(0x42CF080CUL))
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#define bFM3_ETHERNET_MAC1_MAR24H_A36 *((volatile unsigned int*)(0x42CF0810UL))
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#define bFM3_ETHERNET_MAC1_MAR24H_A37 *((volatile unsigned int*)(0x42CF0814UL))
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#define bFM3_ETHERNET_MAC1_MAR24H_A38 *((volatile unsigned int*)(0x42CF0818UL))
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#define bFM3_ETHERNET_MAC1_MAR24H_A39 *((volatile unsigned int*)(0x42CF081CUL))
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#define bFM3_ETHERNET_MAC1_MAR24H_A40 *((volatile unsigned int*)(0x42CF0820UL))
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#define bFM3_ETHERNET_MAC1_MAR24H_A41 *((volatile unsigned int*)(0x42CF0824UL))
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#define bFM3_ETHERNET_MAC1_MAR24H_A42 *((volatile unsigned int*)(0x42CF0828UL))
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#define bFM3_ETHERNET_MAC1_MAR24H_A43 *((volatile unsigned int*)(0x42CF082CUL))
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#define bFM3_ETHERNET_MAC1_MAR24H_A44 *((volatile unsigned int*)(0x42CF0830UL))
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#define bFM3_ETHERNET_MAC1_MAR24H_A45 *((volatile unsigned int*)(0x42CF0834UL))
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#define bFM3_ETHERNET_MAC1_MAR24H_A46 *((volatile unsigned int*)(0x42CF0838UL))
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#define bFM3_ETHERNET_MAC1_MAR24H_A47 *((volatile unsigned int*)(0x42CF083CUL))
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#define bFM3_ETHERNET_MAC1_MAR24H_MBC0 *((volatile unsigned int*)(0x42CF0860UL))
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#define bFM3_ETHERNET_MAC1_MAR24H_MBC1 *((volatile unsigned int*)(0x42CF0864UL))
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#define bFM3_ETHERNET_MAC1_MAR24H_MBC2 *((volatile unsigned int*)(0x42CF0868UL))
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#define bFM3_ETHERNET_MAC1_MAR24H_MBC3 *((volatile unsigned int*)(0x42CF086CUL))
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#define bFM3_ETHERNET_MAC1_MAR24H_MBC4 *((volatile unsigned int*)(0x42CF0870UL))
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#define bFM3_ETHERNET_MAC1_MAR24H_MBC5 *((volatile unsigned int*)(0x42CF0874UL))
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#define bFM3_ETHERNET_MAC1_MAR24H_SA *((volatile unsigned int*)(0x42CF0878UL))
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#define bFM3_ETHERNET_MAC1_MAR24H_AE *((volatile unsigned int*)(0x42CF087CUL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A0 *((volatile unsigned int*)(0x42CF0880UL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A1 *((volatile unsigned int*)(0x42CF0884UL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A2 *((volatile unsigned int*)(0x42CF0888UL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A3 *((volatile unsigned int*)(0x42CF088CUL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A4 *((volatile unsigned int*)(0x42CF0890UL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A5 *((volatile unsigned int*)(0x42CF0894UL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A6 *((volatile unsigned int*)(0x42CF0898UL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A7 *((volatile unsigned int*)(0x42CF089CUL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A8 *((volatile unsigned int*)(0x42CF08A0UL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A9 *((volatile unsigned int*)(0x42CF08A4UL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A10 *((volatile unsigned int*)(0x42CF08A8UL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A11 *((volatile unsigned int*)(0x42CF08ACUL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A12 *((volatile unsigned int*)(0x42CF08B0UL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A13 *((volatile unsigned int*)(0x42CF08B4UL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A14 *((volatile unsigned int*)(0x42CF08B8UL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A15 *((volatile unsigned int*)(0x42CF08BCUL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A16 *((volatile unsigned int*)(0x42CF08C0UL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A17 *((volatile unsigned int*)(0x42CF08C4UL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A18 *((volatile unsigned int*)(0x42CF08C8UL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A19 *((volatile unsigned int*)(0x42CF08CCUL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A20 *((volatile unsigned int*)(0x42CF08D0UL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A21 *((volatile unsigned int*)(0x42CF08D4UL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A22 *((volatile unsigned int*)(0x42CF08D8UL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A23 *((volatile unsigned int*)(0x42CF08DCUL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A24 *((volatile unsigned int*)(0x42CF08E0UL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A25 *((volatile unsigned int*)(0x42CF08E4UL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A26 *((volatile unsigned int*)(0x42CF08E8UL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A27 *((volatile unsigned int*)(0x42CF08ECUL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A28 *((volatile unsigned int*)(0x42CF08F0UL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A29 *((volatile unsigned int*)(0x42CF08F4UL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A30 *((volatile unsigned int*)(0x42CF08F8UL))
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#define bFM3_ETHERNET_MAC1_MAR24L_A31 *((volatile unsigned int*)(0x42CF08FCUL))
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#define bFM3_ETHERNET_MAC1_MAR25H_A32 *((volatile unsigned int*)(0x42CF0900UL))
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#define bFM3_ETHERNET_MAC1_MAR25H_A33 *((volatile unsigned int*)(0x42CF0904UL))
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#define bFM3_ETHERNET_MAC1_MAR25H_A34 *((volatile unsigned int*)(0x42CF0908UL))
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#define bFM3_ETHERNET_MAC1_MAR25H_A35 *((volatile unsigned int*)(0x42CF090CUL))
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#define bFM3_ETHERNET_MAC1_MAR25H_A36 *((volatile unsigned int*)(0x42CF0910UL))
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#define bFM3_ETHERNET_MAC1_MAR25H_A37 *((volatile unsigned int*)(0x42CF0914UL))
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#define bFM3_ETHERNET_MAC1_MAR25H_A38 *((volatile unsigned int*)(0x42CF0918UL))
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#define bFM3_ETHERNET_MAC1_MAR25H_A39 *((volatile unsigned int*)(0x42CF091CUL))
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#define bFM3_ETHERNET_MAC1_MAR25H_A40 *((volatile unsigned int*)(0x42CF0920UL))
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#define bFM3_ETHERNET_MAC1_MAR25H_A41 *((volatile unsigned int*)(0x42CF0924UL))
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#define bFM3_ETHERNET_MAC1_MAR25H_A42 *((volatile unsigned int*)(0x42CF0928UL))
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#define bFM3_ETHERNET_MAC1_MAR25H_A43 *((volatile unsigned int*)(0x42CF092CUL))
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#define bFM3_ETHERNET_MAC1_MAR25H_A44 *((volatile unsigned int*)(0x42CF0930UL))
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#define bFM3_ETHERNET_MAC1_MAR25H_A45 *((volatile unsigned int*)(0x42CF0934UL))
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#define bFM3_ETHERNET_MAC1_MAR25H_A46 *((volatile unsigned int*)(0x42CF0938UL))
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#define bFM3_ETHERNET_MAC1_MAR25H_A47 *((volatile unsigned int*)(0x42CF093CUL))
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#define bFM3_ETHERNET_MAC1_MAR25H_MBC0 *((volatile unsigned int*)(0x42CF0960UL))
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#define bFM3_ETHERNET_MAC1_MAR25H_MBC1 *((volatile unsigned int*)(0x42CF0964UL))
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#define bFM3_ETHERNET_MAC1_MAR25H_MBC2 *((volatile unsigned int*)(0x42CF0968UL))
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#define bFM3_ETHERNET_MAC1_MAR25H_MBC3 *((volatile unsigned int*)(0x42CF096CUL))
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#define bFM3_ETHERNET_MAC1_MAR25H_MBC4 *((volatile unsigned int*)(0x42CF0970UL))
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#define bFM3_ETHERNET_MAC1_MAR25H_MBC5 *((volatile unsigned int*)(0x42CF0974UL))
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#define bFM3_ETHERNET_MAC1_MAR25H_SA *((volatile unsigned int*)(0x42CF0978UL))
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#define bFM3_ETHERNET_MAC1_MAR25H_AE *((volatile unsigned int*)(0x42CF097CUL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A0 *((volatile unsigned int*)(0x42CF0980UL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A1 *((volatile unsigned int*)(0x42CF0984UL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A2 *((volatile unsigned int*)(0x42CF0988UL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A3 *((volatile unsigned int*)(0x42CF098CUL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A4 *((volatile unsigned int*)(0x42CF0990UL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A5 *((volatile unsigned int*)(0x42CF0994UL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A6 *((volatile unsigned int*)(0x42CF0998UL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A7 *((volatile unsigned int*)(0x42CF099CUL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A8 *((volatile unsigned int*)(0x42CF09A0UL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A9 *((volatile unsigned int*)(0x42CF09A4UL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A10 *((volatile unsigned int*)(0x42CF09A8UL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A11 *((volatile unsigned int*)(0x42CF09ACUL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A12 *((volatile unsigned int*)(0x42CF09B0UL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A13 *((volatile unsigned int*)(0x42CF09B4UL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A14 *((volatile unsigned int*)(0x42CF09B8UL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A15 *((volatile unsigned int*)(0x42CF09BCUL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A16 *((volatile unsigned int*)(0x42CF09C0UL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A17 *((volatile unsigned int*)(0x42CF09C4UL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A18 *((volatile unsigned int*)(0x42CF09C8UL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A19 *((volatile unsigned int*)(0x42CF09CCUL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A20 *((volatile unsigned int*)(0x42CF09D0UL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A21 *((volatile unsigned int*)(0x42CF09D4UL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A22 *((volatile unsigned int*)(0x42CF09D8UL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A23 *((volatile unsigned int*)(0x42CF09DCUL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A24 *((volatile unsigned int*)(0x42CF09E0UL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A25 *((volatile unsigned int*)(0x42CF09E4UL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A26 *((volatile unsigned int*)(0x42CF09E8UL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A27 *((volatile unsigned int*)(0x42CF09ECUL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A28 *((volatile unsigned int*)(0x42CF09F0UL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A29 *((volatile unsigned int*)(0x42CF09F4UL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A30 *((volatile unsigned int*)(0x42CF09F8UL))
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#define bFM3_ETHERNET_MAC1_MAR25L_A31 *((volatile unsigned int*)(0x42CF09FCUL))
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#define bFM3_ETHERNET_MAC1_MAR26H_A32 *((volatile unsigned int*)(0x42CF0A00UL))
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#define bFM3_ETHERNET_MAC1_MAR26H_A33 *((volatile unsigned int*)(0x42CF0A04UL))
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#define bFM3_ETHERNET_MAC1_MAR26H_A34 *((volatile unsigned int*)(0x42CF0A08UL))
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#define bFM3_ETHERNET_MAC1_MAR26H_A35 *((volatile unsigned int*)(0x42CF0A0CUL))
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#define bFM3_ETHERNET_MAC1_MAR26H_A36 *((volatile unsigned int*)(0x42CF0A10UL))
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#define bFM3_ETHERNET_MAC1_MAR26H_A37 *((volatile unsigned int*)(0x42CF0A14UL))
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#define bFM3_ETHERNET_MAC1_MAR26H_A38 *((volatile unsigned int*)(0x42CF0A18UL))
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#define bFM3_ETHERNET_MAC1_MAR26H_A39 *((volatile unsigned int*)(0x42CF0A1CUL))
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#define bFM3_ETHERNET_MAC1_MAR26H_A40 *((volatile unsigned int*)(0x42CF0A20UL))
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#define bFM3_ETHERNET_MAC1_MAR26H_A41 *((volatile unsigned int*)(0x42CF0A24UL))
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#define bFM3_ETHERNET_MAC1_MAR26H_A42 *((volatile unsigned int*)(0x42CF0A28UL))
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#define bFM3_ETHERNET_MAC1_MAR26H_A43 *((volatile unsigned int*)(0x42CF0A2CUL))
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#define bFM3_ETHERNET_MAC1_MAR26H_A44 *((volatile unsigned int*)(0x42CF0A30UL))
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#define bFM3_ETHERNET_MAC1_MAR26H_A45 *((volatile unsigned int*)(0x42CF0A34UL))
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#define bFM3_ETHERNET_MAC1_MAR26H_A46 *((volatile unsigned int*)(0x42CF0A38UL))
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#define bFM3_ETHERNET_MAC1_MAR26H_A47 *((volatile unsigned int*)(0x42CF0A3CUL))
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#define bFM3_ETHERNET_MAC1_MAR26H_MBC0 *((volatile unsigned int*)(0x42CF0A60UL))
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#define bFM3_ETHERNET_MAC1_MAR26H_MBC1 *((volatile unsigned int*)(0x42CF0A64UL))
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#define bFM3_ETHERNET_MAC1_MAR26H_MBC2 *((volatile unsigned int*)(0x42CF0A68UL))
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#define bFM3_ETHERNET_MAC1_MAR26H_MBC3 *((volatile unsigned int*)(0x42CF0A6CUL))
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#define bFM3_ETHERNET_MAC1_MAR26H_MBC4 *((volatile unsigned int*)(0x42CF0A70UL))
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#define bFM3_ETHERNET_MAC1_MAR26H_MBC5 *((volatile unsigned int*)(0x42CF0A74UL))
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#define bFM3_ETHERNET_MAC1_MAR26H_SA *((volatile unsigned int*)(0x42CF0A78UL))
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#define bFM3_ETHERNET_MAC1_MAR26H_AE *((volatile unsigned int*)(0x42CF0A7CUL))
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#define bFM3_ETHERNET_MAC1_MAR26L_A0 *((volatile unsigned int*)(0x42CF0A80UL))
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#define bFM3_ETHERNET_MAC1_MAR26L_A1 *((volatile unsigned int*)(0x42CF0A84UL))
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#define bFM3_ETHERNET_MAC1_MAR26L_A2 *((volatile unsigned int*)(0x42CF0A88UL))
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#define bFM3_ETHERNET_MAC1_MAR26L_A3 *((volatile unsigned int*)(0x42CF0A8CUL))
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#define bFM3_ETHERNET_MAC1_MAR26L_A4 *((volatile unsigned int*)(0x42CF0A90UL))
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#define bFM3_ETHERNET_MAC1_MAR26L_A5 *((volatile unsigned int*)(0x42CF0A94UL))
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#define bFM3_ETHERNET_MAC1_MAR26L_A6 *((volatile unsigned int*)(0x42CF0A98UL))
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#define bFM3_ETHERNET_MAC1_MAR26L_A7 *((volatile unsigned int*)(0x42CF0A9CUL))
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#define bFM3_ETHERNET_MAC1_MAR26L_A8 *((volatile unsigned int*)(0x42CF0AA0UL))
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#define bFM3_ETHERNET_MAC1_MAR26L_A9 *((volatile unsigned int*)(0x42CF0AA4UL))
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#define bFM3_ETHERNET_MAC1_MAR26L_A10 *((volatile unsigned int*)(0x42CF0AA8UL))
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#define bFM3_ETHERNET_MAC1_MAR26L_A11 *((volatile unsigned int*)(0x42CF0AACUL))
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#define bFM3_ETHERNET_MAC1_MAR26L_A12 *((volatile unsigned int*)(0x42CF0AB0UL))
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#define bFM3_ETHERNET_MAC1_MAR26L_A13 *((volatile unsigned int*)(0x42CF0AB4UL))
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#define bFM3_ETHERNET_MAC1_MAR26L_A14 *((volatile unsigned int*)(0x42CF0AB8UL))
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#define bFM3_ETHERNET_MAC1_MAR26L_A15 *((volatile unsigned int*)(0x42CF0ABCUL))
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#define bFM3_ETHERNET_MAC1_MAR26L_A16 *((volatile unsigned int*)(0x42CF0AC0UL))
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|
#define bFM3_ETHERNET_MAC1_MAR26L_A17 *((volatile unsigned int*)(0x42CF0AC4UL))
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|
#define bFM3_ETHERNET_MAC1_MAR26L_A18 *((volatile unsigned int*)(0x42CF0AC8UL))
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#define bFM3_ETHERNET_MAC1_MAR26L_A19 *((volatile unsigned int*)(0x42CF0ACCUL))
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|
#define bFM3_ETHERNET_MAC1_MAR26L_A20 *((volatile unsigned int*)(0x42CF0AD0UL))
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|
#define bFM3_ETHERNET_MAC1_MAR26L_A21 *((volatile unsigned int*)(0x42CF0AD4UL))
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|
#define bFM3_ETHERNET_MAC1_MAR26L_A22 *((volatile unsigned int*)(0x42CF0AD8UL))
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|
#define bFM3_ETHERNET_MAC1_MAR26L_A23 *((volatile unsigned int*)(0x42CF0ADCUL))
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#define bFM3_ETHERNET_MAC1_MAR26L_A24 *((volatile unsigned int*)(0x42CF0AE0UL))
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#define bFM3_ETHERNET_MAC1_MAR26L_A25 *((volatile unsigned int*)(0x42CF0AE4UL))
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#define bFM3_ETHERNET_MAC1_MAR26L_A26 *((volatile unsigned int*)(0x42CF0AE8UL))
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#define bFM3_ETHERNET_MAC1_MAR26L_A27 *((volatile unsigned int*)(0x42CF0AECUL))
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#define bFM3_ETHERNET_MAC1_MAR26L_A28 *((volatile unsigned int*)(0x42CF0AF0UL))
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#define bFM3_ETHERNET_MAC1_MAR26L_A29 *((volatile unsigned int*)(0x42CF0AF4UL))
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#define bFM3_ETHERNET_MAC1_MAR26L_A30 *((volatile unsigned int*)(0x42CF0AF8UL))
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#define bFM3_ETHERNET_MAC1_MAR26L_A31 *((volatile unsigned int*)(0x42CF0AFCUL))
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#define bFM3_ETHERNET_MAC1_MAR27H_A32 *((volatile unsigned int*)(0x42CF0B00UL))
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#define bFM3_ETHERNET_MAC1_MAR27H_A33 *((volatile unsigned int*)(0x42CF0B04UL))
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#define bFM3_ETHERNET_MAC1_MAR27H_A34 *((volatile unsigned int*)(0x42CF0B08UL))
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#define bFM3_ETHERNET_MAC1_MAR27H_A35 *((volatile unsigned int*)(0x42CF0B0CUL))
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#define bFM3_ETHERNET_MAC1_MAR27H_A36 *((volatile unsigned int*)(0x42CF0B10UL))
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#define bFM3_ETHERNET_MAC1_MAR27H_A37 *((volatile unsigned int*)(0x42CF0B14UL))
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#define bFM3_ETHERNET_MAC1_MAR27H_A38 *((volatile unsigned int*)(0x42CF0B18UL))
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#define bFM3_ETHERNET_MAC1_MAR27H_A39 *((volatile unsigned int*)(0x42CF0B1CUL))
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#define bFM3_ETHERNET_MAC1_MAR27H_A40 *((volatile unsigned int*)(0x42CF0B20UL))
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#define bFM3_ETHERNET_MAC1_MAR27H_A41 *((volatile unsigned int*)(0x42CF0B24UL))
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#define bFM3_ETHERNET_MAC1_MAR27H_A42 *((volatile unsigned int*)(0x42CF0B28UL))
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#define bFM3_ETHERNET_MAC1_MAR27H_A43 *((volatile unsigned int*)(0x42CF0B2CUL))
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#define bFM3_ETHERNET_MAC1_MAR27H_A44 *((volatile unsigned int*)(0x42CF0B30UL))
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#define bFM3_ETHERNET_MAC1_MAR27H_A45 *((volatile unsigned int*)(0x42CF0B34UL))
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#define bFM3_ETHERNET_MAC1_MAR27H_A46 *((volatile unsigned int*)(0x42CF0B38UL))
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#define bFM3_ETHERNET_MAC1_MAR27H_A47 *((volatile unsigned int*)(0x42CF0B3CUL))
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#define bFM3_ETHERNET_MAC1_MAR27H_MBC0 *((volatile unsigned int*)(0x42CF0B60UL))
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#define bFM3_ETHERNET_MAC1_MAR27H_MBC1 *((volatile unsigned int*)(0x42CF0B64UL))
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#define bFM3_ETHERNET_MAC1_MAR27H_MBC2 *((volatile unsigned int*)(0x42CF0B68UL))
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#define bFM3_ETHERNET_MAC1_MAR27H_MBC3 *((volatile unsigned int*)(0x42CF0B6CUL))
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#define bFM3_ETHERNET_MAC1_MAR27H_MBC4 *((volatile unsigned int*)(0x42CF0B70UL))
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#define bFM3_ETHERNET_MAC1_MAR27H_MBC5 *((volatile unsigned int*)(0x42CF0B74UL))
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#define bFM3_ETHERNET_MAC1_MAR27H_SA *((volatile unsigned int*)(0x42CF0B78UL))
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#define bFM3_ETHERNET_MAC1_MAR27H_AE *((volatile unsigned int*)(0x42CF0B7CUL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A0 *((volatile unsigned int*)(0x42CF0B80UL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A1 *((volatile unsigned int*)(0x42CF0B84UL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A2 *((volatile unsigned int*)(0x42CF0B88UL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A3 *((volatile unsigned int*)(0x42CF0B8CUL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A4 *((volatile unsigned int*)(0x42CF0B90UL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A5 *((volatile unsigned int*)(0x42CF0B94UL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A6 *((volatile unsigned int*)(0x42CF0B98UL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A7 *((volatile unsigned int*)(0x42CF0B9CUL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A8 *((volatile unsigned int*)(0x42CF0BA0UL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A9 *((volatile unsigned int*)(0x42CF0BA4UL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A10 *((volatile unsigned int*)(0x42CF0BA8UL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A11 *((volatile unsigned int*)(0x42CF0BACUL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A12 *((volatile unsigned int*)(0x42CF0BB0UL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A13 *((volatile unsigned int*)(0x42CF0BB4UL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A14 *((volatile unsigned int*)(0x42CF0BB8UL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A15 *((volatile unsigned int*)(0x42CF0BBCUL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A16 *((volatile unsigned int*)(0x42CF0BC0UL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A17 *((volatile unsigned int*)(0x42CF0BC4UL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A18 *((volatile unsigned int*)(0x42CF0BC8UL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A19 *((volatile unsigned int*)(0x42CF0BCCUL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A20 *((volatile unsigned int*)(0x42CF0BD0UL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A21 *((volatile unsigned int*)(0x42CF0BD4UL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A22 *((volatile unsigned int*)(0x42CF0BD8UL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A23 *((volatile unsigned int*)(0x42CF0BDCUL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A24 *((volatile unsigned int*)(0x42CF0BE0UL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A25 *((volatile unsigned int*)(0x42CF0BE4UL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A26 *((volatile unsigned int*)(0x42CF0BE8UL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A27 *((volatile unsigned int*)(0x42CF0BECUL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A28 *((volatile unsigned int*)(0x42CF0BF0UL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A29 *((volatile unsigned int*)(0x42CF0BF4UL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A30 *((volatile unsigned int*)(0x42CF0BF8UL))
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#define bFM3_ETHERNET_MAC1_MAR27L_A31 *((volatile unsigned int*)(0x42CF0BFCUL))
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#define bFM3_ETHERNET_MAC1_MAR28H_A32 *((volatile unsigned int*)(0x42CF0C00UL))
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#define bFM3_ETHERNET_MAC1_MAR28H_A33 *((volatile unsigned int*)(0x42CF0C04UL))
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#define bFM3_ETHERNET_MAC1_MAR28H_A34 *((volatile unsigned int*)(0x42CF0C08UL))
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#define bFM3_ETHERNET_MAC1_MAR28H_A35 *((volatile unsigned int*)(0x42CF0C0CUL))
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#define bFM3_ETHERNET_MAC1_MAR28H_A36 *((volatile unsigned int*)(0x42CF0C10UL))
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#define bFM3_ETHERNET_MAC1_MAR28H_A37 *((volatile unsigned int*)(0x42CF0C14UL))
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#define bFM3_ETHERNET_MAC1_MAR28H_A38 *((volatile unsigned int*)(0x42CF0C18UL))
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#define bFM3_ETHERNET_MAC1_MAR28H_A39 *((volatile unsigned int*)(0x42CF0C1CUL))
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#define bFM3_ETHERNET_MAC1_MAR28H_A40 *((volatile unsigned int*)(0x42CF0C20UL))
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#define bFM3_ETHERNET_MAC1_MAR28H_A41 *((volatile unsigned int*)(0x42CF0C24UL))
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#define bFM3_ETHERNET_MAC1_MAR28H_A42 *((volatile unsigned int*)(0x42CF0C28UL))
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#define bFM3_ETHERNET_MAC1_MAR28H_A43 *((volatile unsigned int*)(0x42CF0C2CUL))
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#define bFM3_ETHERNET_MAC1_MAR28H_A44 *((volatile unsigned int*)(0x42CF0C30UL))
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#define bFM3_ETHERNET_MAC1_MAR28H_A45 *((volatile unsigned int*)(0x42CF0C34UL))
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#define bFM3_ETHERNET_MAC1_MAR28H_A46 *((volatile unsigned int*)(0x42CF0C38UL))
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#define bFM3_ETHERNET_MAC1_MAR28H_A47 *((volatile unsigned int*)(0x42CF0C3CUL))
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#define bFM3_ETHERNET_MAC1_MAR28H_MBC0 *((volatile unsigned int*)(0x42CF0C60UL))
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#define bFM3_ETHERNET_MAC1_MAR28H_MBC1 *((volatile unsigned int*)(0x42CF0C64UL))
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#define bFM3_ETHERNET_MAC1_MAR28H_MBC2 *((volatile unsigned int*)(0x42CF0C68UL))
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#define bFM3_ETHERNET_MAC1_MAR28H_MBC3 *((volatile unsigned int*)(0x42CF0C6CUL))
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#define bFM3_ETHERNET_MAC1_MAR28H_MBC4 *((volatile unsigned int*)(0x42CF0C70UL))
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#define bFM3_ETHERNET_MAC1_MAR28H_MBC5 *((volatile unsigned int*)(0x42CF0C74UL))
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#define bFM3_ETHERNET_MAC1_MAR28H_SA *((volatile unsigned int*)(0x42CF0C78UL))
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#define bFM3_ETHERNET_MAC1_MAR28H_AE *((volatile unsigned int*)(0x42CF0C7CUL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A0 *((volatile unsigned int*)(0x42CF0C80UL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A1 *((volatile unsigned int*)(0x42CF0C84UL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A2 *((volatile unsigned int*)(0x42CF0C88UL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A3 *((volatile unsigned int*)(0x42CF0C8CUL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A4 *((volatile unsigned int*)(0x42CF0C90UL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A5 *((volatile unsigned int*)(0x42CF0C94UL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A6 *((volatile unsigned int*)(0x42CF0C98UL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A7 *((volatile unsigned int*)(0x42CF0C9CUL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A8 *((volatile unsigned int*)(0x42CF0CA0UL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A9 *((volatile unsigned int*)(0x42CF0CA4UL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A10 *((volatile unsigned int*)(0x42CF0CA8UL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A11 *((volatile unsigned int*)(0x42CF0CACUL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A12 *((volatile unsigned int*)(0x42CF0CB0UL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A13 *((volatile unsigned int*)(0x42CF0CB4UL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A14 *((volatile unsigned int*)(0x42CF0CB8UL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A15 *((volatile unsigned int*)(0x42CF0CBCUL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A16 *((volatile unsigned int*)(0x42CF0CC0UL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A17 *((volatile unsigned int*)(0x42CF0CC4UL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A18 *((volatile unsigned int*)(0x42CF0CC8UL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A19 *((volatile unsigned int*)(0x42CF0CCCUL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A20 *((volatile unsigned int*)(0x42CF0CD0UL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A21 *((volatile unsigned int*)(0x42CF0CD4UL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A22 *((volatile unsigned int*)(0x42CF0CD8UL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A23 *((volatile unsigned int*)(0x42CF0CDCUL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A24 *((volatile unsigned int*)(0x42CF0CE0UL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A25 *((volatile unsigned int*)(0x42CF0CE4UL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A26 *((volatile unsigned int*)(0x42CF0CE8UL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A27 *((volatile unsigned int*)(0x42CF0CECUL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A28 *((volatile unsigned int*)(0x42CF0CF0UL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A29 *((volatile unsigned int*)(0x42CF0CF4UL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A30 *((volatile unsigned int*)(0x42CF0CF8UL))
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#define bFM3_ETHERNET_MAC1_MAR28L_A31 *((volatile unsigned int*)(0x42CF0CFCUL))
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#define bFM3_ETHERNET_MAC1_MAR29H_A32 *((volatile unsigned int*)(0x42CF0D00UL))
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#define bFM3_ETHERNET_MAC1_MAR29H_A33 *((volatile unsigned int*)(0x42CF0D04UL))
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#define bFM3_ETHERNET_MAC1_MAR29H_A34 *((volatile unsigned int*)(0x42CF0D08UL))
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#define bFM3_ETHERNET_MAC1_MAR29H_A35 *((volatile unsigned int*)(0x42CF0D0CUL))
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#define bFM3_ETHERNET_MAC1_MAR29H_A36 *((volatile unsigned int*)(0x42CF0D10UL))
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#define bFM3_ETHERNET_MAC1_MAR29H_A37 *((volatile unsigned int*)(0x42CF0D14UL))
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#define bFM3_ETHERNET_MAC1_MAR29H_A38 *((volatile unsigned int*)(0x42CF0D18UL))
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#define bFM3_ETHERNET_MAC1_MAR29H_A39 *((volatile unsigned int*)(0x42CF0D1CUL))
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#define bFM3_ETHERNET_MAC1_MAR29H_A40 *((volatile unsigned int*)(0x42CF0D20UL))
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#define bFM3_ETHERNET_MAC1_MAR29H_A41 *((volatile unsigned int*)(0x42CF0D24UL))
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#define bFM3_ETHERNET_MAC1_MAR29H_A42 *((volatile unsigned int*)(0x42CF0D28UL))
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#define bFM3_ETHERNET_MAC1_MAR29H_A43 *((volatile unsigned int*)(0x42CF0D2CUL))
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#define bFM3_ETHERNET_MAC1_MAR29H_A44 *((volatile unsigned int*)(0x42CF0D30UL))
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#define bFM3_ETHERNET_MAC1_MAR29H_A45 *((volatile unsigned int*)(0x42CF0D34UL))
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#define bFM3_ETHERNET_MAC1_MAR29H_A46 *((volatile unsigned int*)(0x42CF0D38UL))
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#define bFM3_ETHERNET_MAC1_MAR29H_A47 *((volatile unsigned int*)(0x42CF0D3CUL))
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#define bFM3_ETHERNET_MAC1_MAR29H_MBC0 *((volatile unsigned int*)(0x42CF0D60UL))
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#define bFM3_ETHERNET_MAC1_MAR29H_MBC1 *((volatile unsigned int*)(0x42CF0D64UL))
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#define bFM3_ETHERNET_MAC1_MAR29H_MBC2 *((volatile unsigned int*)(0x42CF0D68UL))
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#define bFM3_ETHERNET_MAC1_MAR29H_MBC3 *((volatile unsigned int*)(0x42CF0D6CUL))
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#define bFM3_ETHERNET_MAC1_MAR29H_MBC4 *((volatile unsigned int*)(0x42CF0D70UL))
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#define bFM3_ETHERNET_MAC1_MAR29H_MBC5 *((volatile unsigned int*)(0x42CF0D74UL))
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#define bFM3_ETHERNET_MAC1_MAR29H_SA *((volatile unsigned int*)(0x42CF0D78UL))
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#define bFM3_ETHERNET_MAC1_MAR29H_AE *((volatile unsigned int*)(0x42CF0D7CUL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A0 *((volatile unsigned int*)(0x42CF0D80UL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A1 *((volatile unsigned int*)(0x42CF0D84UL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A2 *((volatile unsigned int*)(0x42CF0D88UL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A3 *((volatile unsigned int*)(0x42CF0D8CUL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A4 *((volatile unsigned int*)(0x42CF0D90UL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A5 *((volatile unsigned int*)(0x42CF0D94UL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A6 *((volatile unsigned int*)(0x42CF0D98UL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A7 *((volatile unsigned int*)(0x42CF0D9CUL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A8 *((volatile unsigned int*)(0x42CF0DA0UL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A9 *((volatile unsigned int*)(0x42CF0DA4UL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A10 *((volatile unsigned int*)(0x42CF0DA8UL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A11 *((volatile unsigned int*)(0x42CF0DACUL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A12 *((volatile unsigned int*)(0x42CF0DB0UL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A13 *((volatile unsigned int*)(0x42CF0DB4UL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A14 *((volatile unsigned int*)(0x42CF0DB8UL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A15 *((volatile unsigned int*)(0x42CF0DBCUL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A16 *((volatile unsigned int*)(0x42CF0DC0UL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A17 *((volatile unsigned int*)(0x42CF0DC4UL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A18 *((volatile unsigned int*)(0x42CF0DC8UL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A19 *((volatile unsigned int*)(0x42CF0DCCUL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A20 *((volatile unsigned int*)(0x42CF0DD0UL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A21 *((volatile unsigned int*)(0x42CF0DD4UL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A22 *((volatile unsigned int*)(0x42CF0DD8UL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A23 *((volatile unsigned int*)(0x42CF0DDCUL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A24 *((volatile unsigned int*)(0x42CF0DE0UL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A25 *((volatile unsigned int*)(0x42CF0DE4UL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A26 *((volatile unsigned int*)(0x42CF0DE8UL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A27 *((volatile unsigned int*)(0x42CF0DECUL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A28 *((volatile unsigned int*)(0x42CF0DF0UL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A29 *((volatile unsigned int*)(0x42CF0DF4UL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A30 *((volatile unsigned int*)(0x42CF0DF8UL))
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#define bFM3_ETHERNET_MAC1_MAR29L_A31 *((volatile unsigned int*)(0x42CF0DFCUL))
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#define bFM3_ETHERNET_MAC1_MAR30H_A32 *((volatile unsigned int*)(0x42CF0E00UL))
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#define bFM3_ETHERNET_MAC1_MAR30H_A33 *((volatile unsigned int*)(0x42CF0E04UL))
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#define bFM3_ETHERNET_MAC1_MAR30H_A34 *((volatile unsigned int*)(0x42CF0E08UL))
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#define bFM3_ETHERNET_MAC1_MAR30H_A35 *((volatile unsigned int*)(0x42CF0E0CUL))
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#define bFM3_ETHERNET_MAC1_MAR30H_A36 *((volatile unsigned int*)(0x42CF0E10UL))
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#define bFM3_ETHERNET_MAC1_MAR30H_A37 *((volatile unsigned int*)(0x42CF0E14UL))
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#define bFM3_ETHERNET_MAC1_MAR30H_A38 *((volatile unsigned int*)(0x42CF0E18UL))
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#define bFM3_ETHERNET_MAC1_MAR30H_A39 *((volatile unsigned int*)(0x42CF0E1CUL))
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#define bFM3_ETHERNET_MAC1_MAR30H_A40 *((volatile unsigned int*)(0x42CF0E20UL))
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#define bFM3_ETHERNET_MAC1_MAR30H_A41 *((volatile unsigned int*)(0x42CF0E24UL))
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#define bFM3_ETHERNET_MAC1_MAR30H_A42 *((volatile unsigned int*)(0x42CF0E28UL))
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#define bFM3_ETHERNET_MAC1_MAR30H_A43 *((volatile unsigned int*)(0x42CF0E2CUL))
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#define bFM3_ETHERNET_MAC1_MAR30H_A44 *((volatile unsigned int*)(0x42CF0E30UL))
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#define bFM3_ETHERNET_MAC1_MAR30H_A45 *((volatile unsigned int*)(0x42CF0E34UL))
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#define bFM3_ETHERNET_MAC1_MAR30H_A46 *((volatile unsigned int*)(0x42CF0E38UL))
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#define bFM3_ETHERNET_MAC1_MAR30H_A47 *((volatile unsigned int*)(0x42CF0E3CUL))
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#define bFM3_ETHERNET_MAC1_MAR30H_MBC0 *((volatile unsigned int*)(0x42CF0E60UL))
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#define bFM3_ETHERNET_MAC1_MAR30H_MBC1 *((volatile unsigned int*)(0x42CF0E64UL))
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#define bFM3_ETHERNET_MAC1_MAR30H_MBC2 *((volatile unsigned int*)(0x42CF0E68UL))
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#define bFM3_ETHERNET_MAC1_MAR30H_MBC3 *((volatile unsigned int*)(0x42CF0E6CUL))
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#define bFM3_ETHERNET_MAC1_MAR30H_MBC4 *((volatile unsigned int*)(0x42CF0E70UL))
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#define bFM3_ETHERNET_MAC1_MAR30H_MBC5 *((volatile unsigned int*)(0x42CF0E74UL))
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#define bFM3_ETHERNET_MAC1_MAR30H_SA *((volatile unsigned int*)(0x42CF0E78UL))
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#define bFM3_ETHERNET_MAC1_MAR30H_AE *((volatile unsigned int*)(0x42CF0E7CUL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A0 *((volatile unsigned int*)(0x42CF0E80UL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A1 *((volatile unsigned int*)(0x42CF0E84UL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A2 *((volatile unsigned int*)(0x42CF0E88UL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A3 *((volatile unsigned int*)(0x42CF0E8CUL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A4 *((volatile unsigned int*)(0x42CF0E90UL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A5 *((volatile unsigned int*)(0x42CF0E94UL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A6 *((volatile unsigned int*)(0x42CF0E98UL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A7 *((volatile unsigned int*)(0x42CF0E9CUL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A8 *((volatile unsigned int*)(0x42CF0EA0UL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A9 *((volatile unsigned int*)(0x42CF0EA4UL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A10 *((volatile unsigned int*)(0x42CF0EA8UL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A11 *((volatile unsigned int*)(0x42CF0EACUL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A12 *((volatile unsigned int*)(0x42CF0EB0UL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A13 *((volatile unsigned int*)(0x42CF0EB4UL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A14 *((volatile unsigned int*)(0x42CF0EB8UL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A15 *((volatile unsigned int*)(0x42CF0EBCUL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A16 *((volatile unsigned int*)(0x42CF0EC0UL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A17 *((volatile unsigned int*)(0x42CF0EC4UL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A18 *((volatile unsigned int*)(0x42CF0EC8UL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A19 *((volatile unsigned int*)(0x42CF0ECCUL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A20 *((volatile unsigned int*)(0x42CF0ED0UL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A21 *((volatile unsigned int*)(0x42CF0ED4UL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A22 *((volatile unsigned int*)(0x42CF0ED8UL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A23 *((volatile unsigned int*)(0x42CF0EDCUL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A24 *((volatile unsigned int*)(0x42CF0EE0UL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A25 *((volatile unsigned int*)(0x42CF0EE4UL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A26 *((volatile unsigned int*)(0x42CF0EE8UL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A27 *((volatile unsigned int*)(0x42CF0EECUL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A28 *((volatile unsigned int*)(0x42CF0EF0UL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A29 *((volatile unsigned int*)(0x42CF0EF4UL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A30 *((volatile unsigned int*)(0x42CF0EF8UL))
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#define bFM3_ETHERNET_MAC1_MAR30L_A31 *((volatile unsigned int*)(0x42CF0EFCUL))
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#define bFM3_ETHERNET_MAC1_MAR31H_A32 *((volatile unsigned int*)(0x42CF0F00UL))
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#define bFM3_ETHERNET_MAC1_MAR31H_A33 *((volatile unsigned int*)(0x42CF0F04UL))
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#define bFM3_ETHERNET_MAC1_MAR31H_A34 *((volatile unsigned int*)(0x42CF0F08UL))
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#define bFM3_ETHERNET_MAC1_MAR31H_A35 *((volatile unsigned int*)(0x42CF0F0CUL))
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#define bFM3_ETHERNET_MAC1_MAR31H_A36 *((volatile unsigned int*)(0x42CF0F10UL))
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#define bFM3_ETHERNET_MAC1_MAR31H_A37 *((volatile unsigned int*)(0x42CF0F14UL))
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#define bFM3_ETHERNET_MAC1_MAR31H_A38 *((volatile unsigned int*)(0x42CF0F18UL))
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#define bFM3_ETHERNET_MAC1_MAR31H_A39 *((volatile unsigned int*)(0x42CF0F1CUL))
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#define bFM3_ETHERNET_MAC1_MAR31H_A40 *((volatile unsigned int*)(0x42CF0F20UL))
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#define bFM3_ETHERNET_MAC1_MAR31H_A41 *((volatile unsigned int*)(0x42CF0F24UL))
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#define bFM3_ETHERNET_MAC1_MAR31H_A42 *((volatile unsigned int*)(0x42CF0F28UL))
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#define bFM3_ETHERNET_MAC1_MAR31H_A43 *((volatile unsigned int*)(0x42CF0F2CUL))
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#define bFM3_ETHERNET_MAC1_MAR31H_A44 *((volatile unsigned int*)(0x42CF0F30UL))
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#define bFM3_ETHERNET_MAC1_MAR31H_A45 *((volatile unsigned int*)(0x42CF0F34UL))
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#define bFM3_ETHERNET_MAC1_MAR31H_A46 *((volatile unsigned int*)(0x42CF0F38UL))
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#define bFM3_ETHERNET_MAC1_MAR31H_A47 *((volatile unsigned int*)(0x42CF0F3CUL))
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#define bFM3_ETHERNET_MAC1_MAR31H_MBC0 *((volatile unsigned int*)(0x42CF0F60UL))
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#define bFM3_ETHERNET_MAC1_MAR31H_MBC1 *((volatile unsigned int*)(0x42CF0F64UL))
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#define bFM3_ETHERNET_MAC1_MAR31H_MBC2 *((volatile unsigned int*)(0x42CF0F68UL))
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#define bFM3_ETHERNET_MAC1_MAR31H_MBC3 *((volatile unsigned int*)(0x42CF0F6CUL))
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#define bFM3_ETHERNET_MAC1_MAR31H_MBC4 *((volatile unsigned int*)(0x42CF0F70UL))
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#define bFM3_ETHERNET_MAC1_MAR31H_MBC5 *((volatile unsigned int*)(0x42CF0F74UL))
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#define bFM3_ETHERNET_MAC1_MAR31H_SA *((volatile unsigned int*)(0x42CF0F78UL))
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#define bFM3_ETHERNET_MAC1_MAR31H_AE *((volatile unsigned int*)(0x42CF0F7CUL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A0 *((volatile unsigned int*)(0x42CF0F80UL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A1 *((volatile unsigned int*)(0x42CF0F84UL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A2 *((volatile unsigned int*)(0x42CF0F88UL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A3 *((volatile unsigned int*)(0x42CF0F8CUL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A4 *((volatile unsigned int*)(0x42CF0F90UL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A5 *((volatile unsigned int*)(0x42CF0F94UL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A6 *((volatile unsigned int*)(0x42CF0F98UL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A7 *((volatile unsigned int*)(0x42CF0F9CUL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A8 *((volatile unsigned int*)(0x42CF0FA0UL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A9 *((volatile unsigned int*)(0x42CF0FA4UL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A10 *((volatile unsigned int*)(0x42CF0FA8UL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A11 *((volatile unsigned int*)(0x42CF0FACUL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A12 *((volatile unsigned int*)(0x42CF0FB0UL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A13 *((volatile unsigned int*)(0x42CF0FB4UL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A14 *((volatile unsigned int*)(0x42CF0FB8UL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A15 *((volatile unsigned int*)(0x42CF0FBCUL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A16 *((volatile unsigned int*)(0x42CF0FC0UL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A17 *((volatile unsigned int*)(0x42CF0FC4UL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A18 *((volatile unsigned int*)(0x42CF0FC8UL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A19 *((volatile unsigned int*)(0x42CF0FCCUL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A20 *((volatile unsigned int*)(0x42CF0FD0UL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A21 *((volatile unsigned int*)(0x42CF0FD4UL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A22 *((volatile unsigned int*)(0x42CF0FD8UL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A23 *((volatile unsigned int*)(0x42CF0FDCUL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A24 *((volatile unsigned int*)(0x42CF0FE0UL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A25 *((volatile unsigned int*)(0x42CF0FE4UL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A26 *((volatile unsigned int*)(0x42CF0FE8UL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A27 *((volatile unsigned int*)(0x42CF0FECUL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A28 *((volatile unsigned int*)(0x42CF0FF0UL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A29 *((volatile unsigned int*)(0x42CF0FF4UL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A30 *((volatile unsigned int*)(0x42CF0FF8UL))
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#define bFM3_ETHERNET_MAC1_MAR31L_A31 *((volatile unsigned int*)(0x42CF0FFCUL))
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#define bFM3_ETHERNET_MAC1_BMR_SWR *((volatile unsigned int*)(0x42D00000UL))
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#define bFM3_ETHERNET_MAC1_BMR_DA *((volatile unsigned int*)(0x42D00004UL))
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#define bFM3_ETHERNET_MAC1_BMR_DSL0 *((volatile unsigned int*)(0x42D00008UL))
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#define bFM3_ETHERNET_MAC1_BMR_DSL1 *((volatile unsigned int*)(0x42D0000CUL))
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#define bFM3_ETHERNET_MAC1_BMR_DSL2 *((volatile unsigned int*)(0x42D00010UL))
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#define bFM3_ETHERNET_MAC1_BMR_DSL3 *((volatile unsigned int*)(0x42D00014UL))
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#define bFM3_ETHERNET_MAC1_BMR_DSL4 *((volatile unsigned int*)(0x42D00018UL))
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#define bFM3_ETHERNET_MAC1_BMR_ATDS *((volatile unsigned int*)(0x42D0001CUL))
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#define bFM3_ETHERNET_MAC1_BMR_PBL0 *((volatile unsigned int*)(0x42D00020UL))
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#define bFM3_ETHERNET_MAC1_BMR_PBL1 *((volatile unsigned int*)(0x42D00024UL))
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#define bFM3_ETHERNET_MAC1_BMR_PBL2 *((volatile unsigned int*)(0x42D00028UL))
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#define bFM3_ETHERNET_MAC1_BMR_PBL3 *((volatile unsigned int*)(0x42D0002CUL))
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#define bFM3_ETHERNET_MAC1_BMR_PBL4 *((volatile unsigned int*)(0x42D00030UL))
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#define bFM3_ETHERNET_MAC1_BMR_PBL5 *((volatile unsigned int*)(0x42D00034UL))
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#define bFM3_ETHERNET_MAC1_BMR_PR0 *((volatile unsigned int*)(0x42D00038UL))
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#define bFM3_ETHERNET_MAC1_BMR_PR1 *((volatile unsigned int*)(0x42D0003CUL))
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#define bFM3_ETHERNET_MAC1_BMR_FB *((volatile unsigned int*)(0x42D00040UL))
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#define bFM3_ETHERNET_MAC1_BMR_RPBL0 *((volatile unsigned int*)(0x42D00044UL))
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#define bFM3_ETHERNET_MAC1_BMR_RPBL1 *((volatile unsigned int*)(0x42D00048UL))
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#define bFM3_ETHERNET_MAC1_BMR_RPBL2 *((volatile unsigned int*)(0x42D0004CUL))
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#define bFM3_ETHERNET_MAC1_BMR_RPBL3 *((volatile unsigned int*)(0x42D00050UL))
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#define bFM3_ETHERNET_MAC1_BMR_RPBL4 *((volatile unsigned int*)(0x42D00054UL))
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#define bFM3_ETHERNET_MAC1_BMR_RPBL5 *((volatile unsigned int*)(0x42D00058UL))
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#define bFM3_ETHERNET_MAC1_BMR_USP *((volatile unsigned int*)(0x42D0005CUL))
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#define bFM3_ETHERNET_MAC1_BMR_8XPBL *((volatile unsigned int*)(0x42D00060UL))
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#define bFM3_ETHERNET_MAC1_BMR_AAL *((volatile unsigned int*)(0x42D00064UL))
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#define bFM3_ETHERNET_MAC1_BMR_MB *((volatile unsigned int*)(0x42D00068UL))
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#define bFM3_ETHERNET_MAC1_BMR_TXPR *((volatile unsigned int*)(0x42D0006CUL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD0 *((volatile unsigned int*)(0x42D00080UL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD1 *((volatile unsigned int*)(0x42D00084UL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD2 *((volatile unsigned int*)(0x42D00088UL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD3 *((volatile unsigned int*)(0x42D0008CUL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD4 *((volatile unsigned int*)(0x42D00090UL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD5 *((volatile unsigned int*)(0x42D00094UL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD6 *((volatile unsigned int*)(0x42D00098UL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD7 *((volatile unsigned int*)(0x42D0009CUL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD8 *((volatile unsigned int*)(0x42D000A0UL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD9 *((volatile unsigned int*)(0x42D000A4UL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD10 *((volatile unsigned int*)(0x42D000A8UL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD11 *((volatile unsigned int*)(0x42D000ACUL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD12 *((volatile unsigned int*)(0x42D000B0UL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD13 *((volatile unsigned int*)(0x42D000B4UL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD14 *((volatile unsigned int*)(0x42D000B8UL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD15 *((volatile unsigned int*)(0x42D000BCUL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD16 *((volatile unsigned int*)(0x42D000C0UL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD17 *((volatile unsigned int*)(0x42D000C4UL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD18 *((volatile unsigned int*)(0x42D000C8UL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD19 *((volatile unsigned int*)(0x42D000CCUL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD20 *((volatile unsigned int*)(0x42D000D0UL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD21 *((volatile unsigned int*)(0x42D000D4UL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD22 *((volatile unsigned int*)(0x42D000D8UL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD23 *((volatile unsigned int*)(0x42D000DCUL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD24 *((volatile unsigned int*)(0x42D000E0UL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD25 *((volatile unsigned int*)(0x42D000E4UL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD26 *((volatile unsigned int*)(0x42D000E8UL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD27 *((volatile unsigned int*)(0x42D000ECUL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD28 *((volatile unsigned int*)(0x42D000F0UL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD29 *((volatile unsigned int*)(0x42D000F4UL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD30 *((volatile unsigned int*)(0x42D000F8UL))
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#define bFM3_ETHERNET_MAC1_TPDR_TPD31 *((volatile unsigned int*)(0x42D000FCUL))
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#define bFM3_ETHERNET_MAC1_RPDR_RPD0 *((volatile unsigned int*)(0x42D00100UL))
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#define bFM3_ETHERNET_MAC1_RPDR_RPD1 *((volatile unsigned int*)(0x42D00104UL))
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#define bFM3_ETHERNET_MAC1_RPDR_RPD2 *((volatile unsigned int*)(0x42D00108UL))
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#define bFM3_ETHERNET_MAC1_RPDR_RPD3 *((volatile unsigned int*)(0x42D0010CUL))
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#define bFM3_ETHERNET_MAC1_RPDR_RPD4 *((volatile unsigned int*)(0x42D00110UL))
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#define bFM3_ETHERNET_MAC1_RPDR_RPD5 *((volatile unsigned int*)(0x42D00114UL))
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#define bFM3_ETHERNET_MAC1_RPDR_RPD6 *((volatile unsigned int*)(0x42D00118UL))
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#define bFM3_ETHERNET_MAC1_RPDR_RPD7 *((volatile unsigned int*)(0x42D0011CUL))
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#define bFM3_ETHERNET_MAC1_RPDR_RPD8 *((volatile unsigned int*)(0x42D00120UL))
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#define bFM3_ETHERNET_MAC1_RPDR_RPD9 *((volatile unsigned int*)(0x42D00124UL))
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#define bFM3_ETHERNET_MAC1_RPDR_RPD10 *((volatile unsigned int*)(0x42D00128UL))
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#define bFM3_ETHERNET_MAC1_RPDR_RPD11 *((volatile unsigned int*)(0x42D0012CUL))
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|
#define bFM3_ETHERNET_MAC1_RPDR_RPD12 *((volatile unsigned int*)(0x42D00130UL))
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#define bFM3_ETHERNET_MAC1_RPDR_RPD13 *((volatile unsigned int*)(0x42D00134UL))
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#define bFM3_ETHERNET_MAC1_RPDR_RPD14 *((volatile unsigned int*)(0x42D00138UL))
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#define bFM3_ETHERNET_MAC1_RPDR_RPD15 *((volatile unsigned int*)(0x42D0013CUL))
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#define bFM3_ETHERNET_MAC1_RPDR_RPD16 *((volatile unsigned int*)(0x42D00140UL))
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#define bFM3_ETHERNET_MAC1_RPDR_RPD17 *((volatile unsigned int*)(0x42D00144UL))
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|
#define bFM3_ETHERNET_MAC1_RPDR_RPD18 *((volatile unsigned int*)(0x42D00148UL))
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|
#define bFM3_ETHERNET_MAC1_RPDR_RPD19 *((volatile unsigned int*)(0x42D0014CUL))
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#define bFM3_ETHERNET_MAC1_RPDR_RPD20 *((volatile unsigned int*)(0x42D00150UL))
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#define bFM3_ETHERNET_MAC1_RPDR_RPD21 *((volatile unsigned int*)(0x42D00154UL))
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#define bFM3_ETHERNET_MAC1_RPDR_RPD22 *((volatile unsigned int*)(0x42D00158UL))
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|
#define bFM3_ETHERNET_MAC1_RPDR_RPD23 *((volatile unsigned int*)(0x42D0015CUL))
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|
#define bFM3_ETHERNET_MAC1_RPDR_RPD24 *((volatile unsigned int*)(0x42D00160UL))
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|
#define bFM3_ETHERNET_MAC1_RPDR_RPD25 *((volatile unsigned int*)(0x42D00164UL))
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|
#define bFM3_ETHERNET_MAC1_RPDR_RPD26 *((volatile unsigned int*)(0x42D00168UL))
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|
#define bFM3_ETHERNET_MAC1_RPDR_RPD27 *((volatile unsigned int*)(0x42D0016CUL))
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|
#define bFM3_ETHERNET_MAC1_RPDR_RPD28 *((volatile unsigned int*)(0x42D00170UL))
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|
#define bFM3_ETHERNET_MAC1_RPDR_RPD29 *((volatile unsigned int*)(0x42D00174UL))
|
|
#define bFM3_ETHERNET_MAC1_RPDR_RPD30 *((volatile unsigned int*)(0x42D00178UL))
|
|
#define bFM3_ETHERNET_MAC1_RPDR_RPD31 *((volatile unsigned int*)(0x42D0017CUL))
|
|
#define bFM3_ETHERNET_MAC1_RDLAR_SRL2 *((volatile unsigned int*)(0x42D00188UL))
|
|
#define bFM3_ETHERNET_MAC1_RDLAR_SRL3 *((volatile unsigned int*)(0x42D0018CUL))
|
|
#define bFM3_ETHERNET_MAC1_RDLAR_SRL4 *((volatile unsigned int*)(0x42D00190UL))
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|
#define bFM3_ETHERNET_MAC1_RDLAR_SRL5 *((volatile unsigned int*)(0x42D00194UL))
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#define bFM3_ETHERNET_MAC1_RDLAR_SRL6 *((volatile unsigned int*)(0x42D00198UL))
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#define bFM3_ETHERNET_MAC1_RDLAR_SRL7 *((volatile unsigned int*)(0x42D0019CUL))
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#define bFM3_ETHERNET_MAC1_RDLAR_SRL8 *((volatile unsigned int*)(0x42D001A0UL))
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#define bFM3_ETHERNET_MAC1_RDLAR_SRL9 *((volatile unsigned int*)(0x42D001A4UL))
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#define bFM3_ETHERNET_MAC1_RDLAR_SRL10 *((volatile unsigned int*)(0x42D001A8UL))
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#define bFM3_ETHERNET_MAC1_RDLAR_SRL11 *((volatile unsigned int*)(0x42D001ACUL))
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#define bFM3_ETHERNET_MAC1_RDLAR_SRL12 *((volatile unsigned int*)(0x42D001B0UL))
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#define bFM3_ETHERNET_MAC1_RDLAR_SRL13 *((volatile unsigned int*)(0x42D001B4UL))
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#define bFM3_ETHERNET_MAC1_RDLAR_SRL14 *((volatile unsigned int*)(0x42D001B8UL))
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#define bFM3_ETHERNET_MAC1_RDLAR_SRL15 *((volatile unsigned int*)(0x42D001BCUL))
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#define bFM3_ETHERNET_MAC1_RDLAR_SRL16 *((volatile unsigned int*)(0x42D001C0UL))
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#define bFM3_ETHERNET_MAC1_RDLAR_SRL17 *((volatile unsigned int*)(0x42D001C4UL))
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#define bFM3_ETHERNET_MAC1_RDLAR_SRL18 *((volatile unsigned int*)(0x42D001C8UL))
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#define bFM3_ETHERNET_MAC1_RDLAR_SRL19 *((volatile unsigned int*)(0x42D001CCUL))
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#define bFM3_ETHERNET_MAC1_RDLAR_SRL20 *((volatile unsigned int*)(0x42D001D0UL))
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#define bFM3_ETHERNET_MAC1_RDLAR_SRL21 *((volatile unsigned int*)(0x42D001D4UL))
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#define bFM3_ETHERNET_MAC1_RDLAR_SRL22 *((volatile unsigned int*)(0x42D001D8UL))
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#define bFM3_ETHERNET_MAC1_RDLAR_SRL23 *((volatile unsigned int*)(0x42D001DCUL))
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#define bFM3_ETHERNET_MAC1_RDLAR_SRL24 *((volatile unsigned int*)(0x42D001E0UL))
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#define bFM3_ETHERNET_MAC1_RDLAR_SRL25 *((volatile unsigned int*)(0x42D001E4UL))
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#define bFM3_ETHERNET_MAC1_RDLAR_SRL26 *((volatile unsigned int*)(0x42D001E8UL))
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#define bFM3_ETHERNET_MAC1_RDLAR_SRL27 *((volatile unsigned int*)(0x42D001ECUL))
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#define bFM3_ETHERNET_MAC1_RDLAR_SRL28 *((volatile unsigned int*)(0x42D001F0UL))
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#define bFM3_ETHERNET_MAC1_RDLAR_SRL29 *((volatile unsigned int*)(0x42D001F4UL))
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#define bFM3_ETHERNET_MAC1_RDLAR_SRL30 *((volatile unsigned int*)(0x42D001F8UL))
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#define bFM3_ETHERNET_MAC1_RDLAR_SRL31 *((volatile unsigned int*)(0x42D001FCUL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL2 *((volatile unsigned int*)(0x42D00208UL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL3 *((volatile unsigned int*)(0x42D0020CUL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL4 *((volatile unsigned int*)(0x42D00210UL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL5 *((volatile unsigned int*)(0x42D00214UL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL6 *((volatile unsigned int*)(0x42D00218UL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL7 *((volatile unsigned int*)(0x42D0021CUL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL8 *((volatile unsigned int*)(0x42D00220UL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL9 *((volatile unsigned int*)(0x42D00224UL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL10 *((volatile unsigned int*)(0x42D00228UL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL11 *((volatile unsigned int*)(0x42D0022CUL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL12 *((volatile unsigned int*)(0x42D00230UL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL13 *((volatile unsigned int*)(0x42D00234UL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL14 *((volatile unsigned int*)(0x42D00238UL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL15 *((volatile unsigned int*)(0x42D0023CUL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL16 *((volatile unsigned int*)(0x42D00240UL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL17 *((volatile unsigned int*)(0x42D00244UL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL18 *((volatile unsigned int*)(0x42D00248UL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL19 *((volatile unsigned int*)(0x42D0024CUL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL20 *((volatile unsigned int*)(0x42D00250UL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL21 *((volatile unsigned int*)(0x42D00254UL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL22 *((volatile unsigned int*)(0x42D00258UL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL23 *((volatile unsigned int*)(0x42D0025CUL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL24 *((volatile unsigned int*)(0x42D00260UL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL25 *((volatile unsigned int*)(0x42D00264UL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL26 *((volatile unsigned int*)(0x42D00268UL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL27 *((volatile unsigned int*)(0x42D0026CUL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL28 *((volatile unsigned int*)(0x42D00270UL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL29 *((volatile unsigned int*)(0x42D00274UL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL30 *((volatile unsigned int*)(0x42D00278UL))
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#define bFM3_ETHERNET_MAC1_TDLAR_STL31 *((volatile unsigned int*)(0x42D0027CUL))
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#define bFM3_ETHERNET_MAC1_SR_TI *((volatile unsigned int*)(0x42D00280UL))
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#define bFM3_ETHERNET_MAC1_SR_TPS *((volatile unsigned int*)(0x42D00284UL))
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#define bFM3_ETHERNET_MAC1_SR_TU *((volatile unsigned int*)(0x42D00288UL))
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#define bFM3_ETHERNET_MAC1_SR_TJT *((volatile unsigned int*)(0x42D0028CUL))
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#define bFM3_ETHERNET_MAC1_SR_OVF *((volatile unsigned int*)(0x42D00290UL))
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#define bFM3_ETHERNET_MAC1_SR_UNF *((volatile unsigned int*)(0x42D00294UL))
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#define bFM3_ETHERNET_MAC1_SR_RI *((volatile unsigned int*)(0x42D00298UL))
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#define bFM3_ETHERNET_MAC1_SR_RU *((volatile unsigned int*)(0x42D0029CUL))
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#define bFM3_ETHERNET_MAC1_SR_RPS *((volatile unsigned int*)(0x42D002A0UL))
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#define bFM3_ETHERNET_MAC1_SR_RWT *((volatile unsigned int*)(0x42D002A4UL))
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#define bFM3_ETHERNET_MAC1_SR_ETI *((volatile unsigned int*)(0x42D002A8UL))
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#define bFM3_ETHERNET_MAC1_SR_FBI *((volatile unsigned int*)(0x42D002B4UL))
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#define bFM3_ETHERNET_MAC1_SR_ERI *((volatile unsigned int*)(0x42D002B8UL))
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#define bFM3_ETHERNET_MAC1_SR_AIS *((volatile unsigned int*)(0x42D002BCUL))
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#define bFM3_ETHERNET_MAC1_SR_NIS *((volatile unsigned int*)(0x42D002C0UL))
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#define bFM3_ETHERNET_MAC1_SR_RS0 *((volatile unsigned int*)(0x42D002C4UL))
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#define bFM3_ETHERNET_MAC1_SR_RS1 *((volatile unsigned int*)(0x42D002C8UL))
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#define bFM3_ETHERNET_MAC1_SR_RS2 *((volatile unsigned int*)(0x42D002CCUL))
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#define bFM3_ETHERNET_MAC1_SR_TS0 *((volatile unsigned int*)(0x42D002D0UL))
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#define bFM3_ETHERNET_MAC1_SR_TS1 *((volatile unsigned int*)(0x42D002D4UL))
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#define bFM3_ETHERNET_MAC1_SR_TS2 *((volatile unsigned int*)(0x42D002D8UL))
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#define bFM3_ETHERNET_MAC1_SR_EB0 *((volatile unsigned int*)(0x42D002DCUL))
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#define bFM3_ETHERNET_MAC1_SR_EB1 *((volatile unsigned int*)(0x42D002E0UL))
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#define bFM3_ETHERNET_MAC1_SR_EB2 *((volatile unsigned int*)(0x42D002E4UL))
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#define bFM3_ETHERNET_MAC1_SR_GLI *((volatile unsigned int*)(0x42D002E8UL))
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#define bFM3_ETHERNET_MAC1_SR_GMI *((volatile unsigned int*)(0x42D002ECUL))
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#define bFM3_ETHERNET_MAC1_SR_GPI *((volatile unsigned int*)(0x42D002F0UL))
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#define bFM3_ETHERNET_MAC1_SR_TTI *((volatile unsigned int*)(0x42D002F4UL))
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#define bFM3_ETHERNET_MAC1_SR_GLPII *((volatile unsigned int*)(0x42D002F8UL))
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#define bFM3_ETHERNET_MAC1_OMR_SR *((volatile unsigned int*)(0x42D00304UL))
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#define bFM3_ETHERNET_MAC1_OMR_OSF *((volatile unsigned int*)(0x42D00308UL))
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#define bFM3_ETHERNET_MAC1_OMR_RTC0 *((volatile unsigned int*)(0x42D0030CUL))
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#define bFM3_ETHERNET_MAC1_OMR_RTC1 *((volatile unsigned int*)(0x42D00310UL))
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#define bFM3_ETHERNET_MAC1_OMR_FUF *((volatile unsigned int*)(0x42D00318UL))
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#define bFM3_ETHERNET_MAC1_OMR_FEF *((volatile unsigned int*)(0x42D0031CUL))
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#define bFM3_ETHERNET_MAC1_OMR_ST *((volatile unsigned int*)(0x42D00334UL))
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#define bFM3_ETHERNET_MAC1_OMR_TTC0 *((volatile unsigned int*)(0x42D00338UL))
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#define bFM3_ETHERNET_MAC1_OMR_TTC1 *((volatile unsigned int*)(0x42D0033CUL))
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#define bFM3_ETHERNET_MAC1_OMR_TTC2 *((volatile unsigned int*)(0x42D00340UL))
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#define bFM3_ETHERNET_MAC1_OMR_FTF *((volatile unsigned int*)(0x42D00350UL))
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#define bFM3_ETHERNET_MAC1_OMR_TSF *((volatile unsigned int*)(0x42D00354UL))
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#define bFM3_ETHERNET_MAC1_OMR_DFF *((volatile unsigned int*)(0x42D00360UL))
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#define bFM3_ETHERNET_MAC1_OMR_RSF *((volatile unsigned int*)(0x42D00364UL))
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#define bFM3_ETHERNET_MAC1_OMR_DT *((volatile unsigned int*)(0x42D00368UL))
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#define bFM3_ETHERNET_MAC1_IER_TIE *((volatile unsigned int*)(0x42D00380UL))
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#define bFM3_ETHERNET_MAC1_IER_TSE *((volatile unsigned int*)(0x42D00384UL))
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#define bFM3_ETHERNET_MAC1_IER_TUE *((volatile unsigned int*)(0x42D00388UL))
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#define bFM3_ETHERNET_MAC1_IER_TJE *((volatile unsigned int*)(0x42D0038CUL))
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#define bFM3_ETHERNET_MAC1_IER_OVE *((volatile unsigned int*)(0x42D00390UL))
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#define bFM3_ETHERNET_MAC1_IER_UNE *((volatile unsigned int*)(0x42D00394UL))
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#define bFM3_ETHERNET_MAC1_IER_RIE *((volatile unsigned int*)(0x42D00398UL))
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#define bFM3_ETHERNET_MAC1_IER_RUE *((volatile unsigned int*)(0x42D0039CUL))
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#define bFM3_ETHERNET_MAC1_IER_RSE *((volatile unsigned int*)(0x42D003A0UL))
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#define bFM3_ETHERNET_MAC1_IER_RWE *((volatile unsigned int*)(0x42D003A4UL))
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#define bFM3_ETHERNET_MAC1_IER_ETE *((volatile unsigned int*)(0x42D003A8UL))
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#define bFM3_ETHERNET_MAC1_IER_FBE *((volatile unsigned int*)(0x42D003B4UL))
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#define bFM3_ETHERNET_MAC1_IER_ERE *((volatile unsigned int*)(0x42D003B8UL))
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#define bFM3_ETHERNET_MAC1_IER_AIE *((volatile unsigned int*)(0x42D003BCUL))
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#define bFM3_ETHERNET_MAC1_IER_NIE *((volatile unsigned int*)(0x42D003C0UL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFH0 *((volatile unsigned int*)(0x42D00400UL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFH1 *((volatile unsigned int*)(0x42D00404UL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFH2 *((volatile unsigned int*)(0x42D00408UL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFH3 *((volatile unsigned int*)(0x42D0040CUL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFH4 *((volatile unsigned int*)(0x42D00410UL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFH5 *((volatile unsigned int*)(0x42D00414UL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFH6 *((volatile unsigned int*)(0x42D00418UL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFH7 *((volatile unsigned int*)(0x42D0041CUL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFH8 *((volatile unsigned int*)(0x42D00420UL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFH9 *((volatile unsigned int*)(0x42D00424UL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFH10 *((volatile unsigned int*)(0x42D00428UL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFH11 *((volatile unsigned int*)(0x42D0042CUL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFH12 *((volatile unsigned int*)(0x42D00430UL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFH13 *((volatile unsigned int*)(0x42D00434UL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFH14 *((volatile unsigned int*)(0x42D00438UL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFH15 *((volatile unsigned int*)(0x42D0043CUL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_ONMFH *((volatile unsigned int*)(0x42D00440UL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFF0 *((volatile unsigned int*)(0x42D00444UL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFF1 *((volatile unsigned int*)(0x42D00448UL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFF2 *((volatile unsigned int*)(0x42D0044CUL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFF3 *((volatile unsigned int*)(0x42D00450UL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFF4 *((volatile unsigned int*)(0x42D00454UL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFF5 *((volatile unsigned int*)(0x42D00458UL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFF6 *((volatile unsigned int*)(0x42D0045CUL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFF7 *((volatile unsigned int*)(0x42D00460UL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFF8 *((volatile unsigned int*)(0x42D00464UL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFF9 *((volatile unsigned int*)(0x42D00468UL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_NMFF10 *((volatile unsigned int*)(0x42D0046CUL))
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#define bFM3_ETHERNET_MAC1_MFBOCR_ONMFF *((volatile unsigned int*)(0x42D00470UL))
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#define bFM3_ETHERNET_MAC1_RIWTR_RIWT0 *((volatile unsigned int*)(0x42D00480UL))
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#define bFM3_ETHERNET_MAC1_RIWTR_RIWT1 *((volatile unsigned int*)(0x42D00484UL))
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#define bFM3_ETHERNET_MAC1_RIWTR_RIWT2 *((volatile unsigned int*)(0x42D00488UL))
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#define bFM3_ETHERNET_MAC1_RIWTR_RIWT3 *((volatile unsigned int*)(0x42D0048CUL))
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#define bFM3_ETHERNET_MAC1_RIWTR_RIWT4 *((volatile unsigned int*)(0x42D00490UL))
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#define bFM3_ETHERNET_MAC1_RIWTR_RIWT5 *((volatile unsigned int*)(0x42D00494UL))
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#define bFM3_ETHERNET_MAC1_RIWTR_RIWT6 *((volatile unsigned int*)(0x42D00498UL))
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#define bFM3_ETHERNET_MAC1_RIWTR_RIWT7 *((volatile unsigned int*)(0x42D0049CUL))
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#define bFM3_ETHERNET_MAC1_AHBSR_AHBS *((volatile unsigned int*)(0x42D00580UL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP0 *((volatile unsigned int*)(0x42D00900UL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP1 *((volatile unsigned int*)(0x42D00904UL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP2 *((volatile unsigned int*)(0x42D00908UL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP3 *((volatile unsigned int*)(0x42D0090CUL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP4 *((volatile unsigned int*)(0x42D00910UL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP5 *((volatile unsigned int*)(0x42D00914UL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP6 *((volatile unsigned int*)(0x42D00918UL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP7 *((volatile unsigned int*)(0x42D0091CUL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP8 *((volatile unsigned int*)(0x42D00920UL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP9 *((volatile unsigned int*)(0x42D00924UL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP10 *((volatile unsigned int*)(0x42D00928UL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP11 *((volatile unsigned int*)(0x42D0092CUL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP12 *((volatile unsigned int*)(0x42D00930UL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP13 *((volatile unsigned int*)(0x42D00934UL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP14 *((volatile unsigned int*)(0x42D00938UL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP15 *((volatile unsigned int*)(0x42D0093CUL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP16 *((volatile unsigned int*)(0x42D00940UL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP17 *((volatile unsigned int*)(0x42D00944UL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP18 *((volatile unsigned int*)(0x42D00948UL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP19 *((volatile unsigned int*)(0x42D0094CUL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP20 *((volatile unsigned int*)(0x42D00950UL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP21 *((volatile unsigned int*)(0x42D00954UL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP22 *((volatile unsigned int*)(0x42D00958UL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP23 *((volatile unsigned int*)(0x42D0095CUL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP24 *((volatile unsigned int*)(0x42D00960UL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP25 *((volatile unsigned int*)(0x42D00964UL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP26 *((volatile unsigned int*)(0x42D00968UL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP27 *((volatile unsigned int*)(0x42D0096CUL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP28 *((volatile unsigned int*)(0x42D00970UL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP29 *((volatile unsigned int*)(0x42D00974UL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP30 *((volatile unsigned int*)(0x42D00978UL))
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#define bFM3_ETHERNET_MAC1_CHTDR_HTDAP31 *((volatile unsigned int*)(0x42D0097CUL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP0 *((volatile unsigned int*)(0x42D00980UL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP1 *((volatile unsigned int*)(0x42D00984UL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP2 *((volatile unsigned int*)(0x42D00988UL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP3 *((volatile unsigned int*)(0x42D0098CUL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP4 *((volatile unsigned int*)(0x42D00990UL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP5 *((volatile unsigned int*)(0x42D00994UL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP6 *((volatile unsigned int*)(0x42D00998UL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP7 *((volatile unsigned int*)(0x42D0099CUL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP8 *((volatile unsigned int*)(0x42D009A0UL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP9 *((volatile unsigned int*)(0x42D009A4UL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP10 *((volatile unsigned int*)(0x42D009A8UL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP11 *((volatile unsigned int*)(0x42D009ACUL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP12 *((volatile unsigned int*)(0x42D009B0UL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP13 *((volatile unsigned int*)(0x42D009B4UL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP14 *((volatile unsigned int*)(0x42D009B8UL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP15 *((volatile unsigned int*)(0x42D009BCUL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP16 *((volatile unsigned int*)(0x42D009C0UL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP17 *((volatile unsigned int*)(0x42D009C4UL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP18 *((volatile unsigned int*)(0x42D009C8UL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP19 *((volatile unsigned int*)(0x42D009CCUL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP20 *((volatile unsigned int*)(0x42D009D0UL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP21 *((volatile unsigned int*)(0x42D009D4UL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP22 *((volatile unsigned int*)(0x42D009D8UL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP23 *((volatile unsigned int*)(0x42D009DCUL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP24 *((volatile unsigned int*)(0x42D009E0UL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP25 *((volatile unsigned int*)(0x42D009E4UL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP26 *((volatile unsigned int*)(0x42D009E8UL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP27 *((volatile unsigned int*)(0x42D009ECUL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP28 *((volatile unsigned int*)(0x42D009F0UL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP29 *((volatile unsigned int*)(0x42D009F4UL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP30 *((volatile unsigned int*)(0x42D009F8UL))
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#define bFM3_ETHERNET_MAC1_CHRDR_HRDAP31 *((volatile unsigned int*)(0x42D009FCUL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR0 *((volatile unsigned int*)(0x42D00A00UL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR1 *((volatile unsigned int*)(0x42D00A04UL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR2 *((volatile unsigned int*)(0x42D00A08UL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR3 *((volatile unsigned int*)(0x42D00A0CUL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR4 *((volatile unsigned int*)(0x42D00A10UL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR5 *((volatile unsigned int*)(0x42D00A14UL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR6 *((volatile unsigned int*)(0x42D00A18UL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR7 *((volatile unsigned int*)(0x42D00A1CUL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR8 *((volatile unsigned int*)(0x42D00A20UL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR9 *((volatile unsigned int*)(0x42D00A24UL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR10 *((volatile unsigned int*)(0x42D00A28UL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR11 *((volatile unsigned int*)(0x42D00A2CUL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR12 *((volatile unsigned int*)(0x42D00A30UL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR13 *((volatile unsigned int*)(0x42D00A34UL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR14 *((volatile unsigned int*)(0x42D00A38UL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR15 *((volatile unsigned int*)(0x42D00A3CUL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR16 *((volatile unsigned int*)(0x42D00A40UL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR17 *((volatile unsigned int*)(0x42D00A44UL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR18 *((volatile unsigned int*)(0x42D00A48UL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR19 *((volatile unsigned int*)(0x42D00A4CUL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR20 *((volatile unsigned int*)(0x42D00A50UL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR21 *((volatile unsigned int*)(0x42D00A54UL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR22 *((volatile unsigned int*)(0x42D00A58UL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR23 *((volatile unsigned int*)(0x42D00A5CUL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR24 *((volatile unsigned int*)(0x42D00A60UL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR25 *((volatile unsigned int*)(0x42D00A64UL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR26 *((volatile unsigned int*)(0x42D00A68UL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR27 *((volatile unsigned int*)(0x42D00A6CUL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR28 *((volatile unsigned int*)(0x42D00A70UL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR29 *((volatile unsigned int*)(0x42D00A74UL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR30 *((volatile unsigned int*)(0x42D00A78UL))
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#define bFM3_ETHERNET_MAC1_CHTBAR_HTBAR31 *((volatile unsigned int*)(0x42D00A7CUL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR0 *((volatile unsigned int*)(0x42D00A80UL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR1 *((volatile unsigned int*)(0x42D00A84UL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR2 *((volatile unsigned int*)(0x42D00A88UL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR3 *((volatile unsigned int*)(0x42D00A8CUL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR4 *((volatile unsigned int*)(0x42D00A90UL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR5 *((volatile unsigned int*)(0x42D00A94UL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR6 *((volatile unsigned int*)(0x42D00A98UL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR7 *((volatile unsigned int*)(0x42D00A9CUL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR8 *((volatile unsigned int*)(0x42D00AA0UL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR9 *((volatile unsigned int*)(0x42D00AA4UL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR10 *((volatile unsigned int*)(0x42D00AA8UL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR11 *((volatile unsigned int*)(0x42D00AACUL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR12 *((volatile unsigned int*)(0x42D00AB0UL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR13 *((volatile unsigned int*)(0x42D00AB4UL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR14 *((volatile unsigned int*)(0x42D00AB8UL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR15 *((volatile unsigned int*)(0x42D00ABCUL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR16 *((volatile unsigned int*)(0x42D00AC0UL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR17 *((volatile unsigned int*)(0x42D00AC4UL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR18 *((volatile unsigned int*)(0x42D00AC8UL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR19 *((volatile unsigned int*)(0x42D00ACCUL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR20 *((volatile unsigned int*)(0x42D00AD0UL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR21 *((volatile unsigned int*)(0x42D00AD4UL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR22 *((volatile unsigned int*)(0x42D00AD8UL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR23 *((volatile unsigned int*)(0x42D00ADCUL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR24 *((volatile unsigned int*)(0x42D00AE0UL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR25 *((volatile unsigned int*)(0x42D00AE4UL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR26 *((volatile unsigned int*)(0x42D00AE8UL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR27 *((volatile unsigned int*)(0x42D00AECUL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR28 *((volatile unsigned int*)(0x42D00AF0UL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR29 *((volatile unsigned int*)(0x42D00AF4UL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR30 *((volatile unsigned int*)(0x42D00AF8UL))
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#define bFM3_ETHERNET_MAC1_CHRBAR_HRBAR31 *((volatile unsigned int*)(0x42D00AFCUL))
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#ifdef __cplusplus
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}
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#endif
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#endif /* _MB9BF618S_H_ */
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