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rtt-f030/bsp/lpc43xx
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Grissiom bcbe180886 lpc43xx: fix the default RTT_ROOT in SConstruct 2015-01-06 13:39:54 +08:00
..
Libraries lpc43xx: fix the startup code for GCC 2015-01-06 12:42:12 +08:00
M0 lpc43xx: fix the default RTT_ROOT in SConstruct 2015-01-06 13:39:54 +08:00
M4 lpc43xx: fix the default RTT_ROOT in SConstruct 2015-01-06 13:39:54 +08:00
drivers lpc43xx: move board.c into M0/M4 2015-01-06 10:46:31 +08:00
bin2C.py lpc43xx: output a newline in the header file 2015-01-06 11:03:01 +08:00
readme.txt lpc43xx: add readme 2015-01-06 10:46:32 +08:00

readme.txt 

1. M4 run on flash bank A. M0 run on flash bank B and the binary code of M0 is
   embedded into the code of M4.
3. Compile the project in M0/ first and then compile the project in M4/. Then
   flash it into the chip with JLink.