316 lines
8.8 KiB
C
316 lines
8.8 KiB
C
/*
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* Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/******************************************************************************
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* @file ck_pwm.c
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* @brief CSI Source File for PWM Driver
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* @version V1.0
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* @date 02. June 2017
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******************************************************************************/
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#include "ck_pwm.h"
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#include "drv_pwm.h"
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#include "soc.h"
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#define ERR_PWM(errno) (CSI_DRV_ERRNO_PWM_BASE | errno)
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#define PWM_NULL_PARAM_CHK(para) \
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do { \
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if (para == NULL) { \
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return ERR_PWM(EDRV_PARAMETER); \
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} \
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} while (0)
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typedef struct {
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uint32_t base;
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uint32_t irq;
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uint32_t ch_num;
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} ck_pwm_priv_t;
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static ck_pwm_priv_t pwm_instance[CONFIG_PWM_NUM];
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int32_t __attribute__((weak)) target_pwm_init(pin_t pwm_pin, uint32_t *ch_num, uint32_t *base, uint32_t *irq)
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{
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return -1;
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}
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/**
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\brief Initialize PWM Interface. 1. Initializes the resources needed for the PWM interface 2.registers event callback function
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\param[in] pwm pin of gpio
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\return handle pwm handle to operate.
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*/
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pwm_handle_t drv_pwm_initialize(pin_t pwm_pin)
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{
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uint32_t base = 0u;
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uint32_t irq = 0u;
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uint32_t ch_num = 0u;
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int32_t idx = target_pwm_init(pwm_pin, &ch_num, &base, &irq);
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if (idx < 0 || idx >= CONFIG_PWM_NUM) {
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return NULL;
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}
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ck_pwm_priv_t *pwm_priv = &pwm_instance[idx];
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pwm_priv->base = base;
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pwm_priv->irq = irq;
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pwm_priv->ch_num = ch_num;
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return pwm_priv;
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}
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/**
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\brief De-initialize PWM Interface. stops operation and releases the software resources used by the interface
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\param[in] handle pwm handle to operate.
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\return \ref execution_status
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*/
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int32_t drv_pwm_uninitialize(pwm_handle_t handle)
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{
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PWM_NULL_PARAM_CHK(handle);
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return 0;
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}
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/**
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\brief config pwm mode.
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\param[in] handle pwm handle to operate.
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\param[in] sysclk configured system clock.
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\param[in] period_us the PWM period in us
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\param[in] duty the PMW duty. ( 0 - 10000 represents 0% - 100% ,other values are invalid)
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\return \ref execution_status
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*/
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int32_t drv_pwm_config(pwm_handle_t handle, uint32_t sysclk, uint32_t period_us, uint32_t duty)
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{
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if (handle == NULL || duty > 10000) {
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return ERR_PWM(EDRV_PARAMETER);
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}
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ck_pwm_priv_t *pwm_priv = handle;
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uint32_t chn = pwm_priv->ch_num;
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uint32_t counter = (sysclk / 1000000 * period_us);
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if (counter >= 0xffff) {
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return ERR_PWM(EDRV_PARAMETER);
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}
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uint32_t data_width;
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data_width = (uint32_t)((counter * duty / 10000));
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ck_pwm_reg_t *addr = (ck_pwm_reg_t *)(pwm_priv->base);
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uint32_t ctl_tmp = addr->PWMCTL;
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uint32_t temp;
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if (chn == CKENUM_PWM_CH0 || chn == CKENUM_PWM_CH1) {
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ctl_tmp &= 0xfffffffe;
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addr->PWMCTL = ctl_tmp | (uint32_t)CKENUM_PWM_COUNT_UP;
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temp = addr->PWM01LOAD;
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temp &= 0xffff0000;
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addr->PWM01LOAD = temp | counter;
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temp = addr->PWM0CMP;
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if (chn == CKENUM_PWM_CH0) {
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temp &= 0xffff0000;
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addr->PWM0CMP = temp | data_width;
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} else {
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temp &= 0x0000ffff;
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addr->PWM0CMP = temp | data_width << 16;
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}
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}
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if (chn == CKENUM_PWM_CH2 || chn == CKENUM_PWM_CH3) {
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ctl_tmp &= 0xfffffffd;
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addr->PWMCTL = ctl_tmp | (uint32_t)CKENUM_PWM_COUNT_UP << 1;
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temp = addr->PWM01LOAD;
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temp &= 0x0000ffff;
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addr->PWM01LOAD = temp | counter << 16 ;
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temp = addr->PWM1CMP;
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if (chn == CKENUM_PWM_CH2) {
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temp &= 0xffff0000;
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addr->PWM1CMP = temp | data_width;
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} else {
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temp &= 0x0000ffff;
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addr->PWM1CMP = temp | data_width << 16;
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}
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}
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if (chn == CKENUM_PWM_CH4 || chn == CKENUM_PWM_CH5) {
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ctl_tmp &= 0xfffffffb;
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addr->PWMCTL = ctl_tmp | (uint32_t)CKENUM_PWM_COUNT_UP << 2;
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temp = addr->PWM23LOAD;
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temp &= 0xffff0000;
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addr->PWM23LOAD = temp | counter;
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temp = addr->PWM2CMP;
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if (chn == CKENUM_PWM_CH4) {
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temp &= 0xffff0000;
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addr->PWM2CMP = temp | data_width;
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} else {
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temp &= 0x0000ffff;
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addr->PWM2CMP = temp | data_width << 16;
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}
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}
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if (chn == CKENUM_PWM_CH6 || chn == CKENUM_PWM_CH7) {
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ctl_tmp &= 0xfffffff7;
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addr->PWMCTL = ctl_tmp | (uint32_t)CKENUM_PWM_COUNT_UP << 3;
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temp = addr->PWM23LOAD;
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temp &= 0x0000ffff;
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addr->PWM23LOAD = temp | counter << 16 ;
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temp = addr->PWM3CMP;
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if (chn == CKENUM_PWM_CH6) {
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temp &= 0xffff0000;
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addr->PWM3CMP = temp | data_width;
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} else {
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temp &= 0x0000ffff;
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addr->PWM3CMP = temp | data_width << 16;
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}
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}
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if (chn == CKENUM_PWM_CH8 || chn == CKENUM_PWM_CH9) {
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ctl_tmp &= 0xffffffef;
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addr->PWMCTL = ctl_tmp | (uint32_t)CKENUM_PWM_COUNT_UP << 4;
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temp = addr->PWM45LOAD;
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temp &= 0xffff0000;
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addr->PWM45LOAD = temp | counter ;
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temp = addr->PWM4CMP;
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if (chn == CKENUM_PWM_CH8) {
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temp &= 0xffff0000;
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addr->PWM4CMP = temp | data_width;
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} else {
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temp &= 0x0000ffff;
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addr->PWM4CMP = temp | data_width << 16;
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}
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}
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if (chn == CKENUM_PWM_CH10 || chn == CKENUM_PWM_CH11) {
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ctl_tmp &= 0xffffffdf;
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addr->PWMCTL = ctl_tmp | (uint32_t)CKENUM_PWM_COUNT_UP << 5;
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temp = addr->PWM45LOAD;
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temp &= 0x0000ffff;
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addr->PWM45LOAD = temp | counter << 16 ;
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temp = addr->PWM5CMP;
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if (chn == CKENUM_PWM_CH10) {
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temp &= 0xffff0000;
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addr->PWM5CMP = temp | data_width;
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} else {
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temp &= 0x0000ffff;
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addr->PWM5CMP = temp | data_width << 16;
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}
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}
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return 0;
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}
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/**
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\brief start generate pwm signal.
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\param[in] handle pwm handle to operate.
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\param[in] pwm channel number.
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\return \ref execution_status
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*/
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int32_t drv_pwm_start(pwm_handle_t handle)
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{
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PWM_NULL_PARAM_CHK(handle);
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ck_pwm_priv_t *pwm_priv = handle;
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ck_pwm_reg_t *addr = (ck_pwm_reg_t *)(pwm_priv->base);
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uint32_t chn = pwm_priv->ch_num;
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if (chn == CKENUM_PWM_CH0 || chn == CKENUM_PWM_CH1) {
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addr->PWMCFG |= 0x00000003; /* PWM0 output enable */
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}
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if (chn == CKENUM_PWM_CH2 || chn == CKENUM_PWM_CH3) {
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addr->PWMCFG |= 0x0000000C; /* PWM1 output enable */
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}
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if (chn == CKENUM_PWM_CH4 || chn == CKENUM_PWM_CH5) {
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addr->PWMCFG |= 0x00000030; /* PWM2 output enable */
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}
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if (chn == CKENUM_PWM_CH6 || chn == CKENUM_PWM_CH7) {
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addr->PWMCFG |= 0x000000C0; /* PWM3 output enable */
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}
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if (chn == CKENUM_PWM_CH8 || chn == CKENUM_PWM_CH9) {
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addr->PWMCFG |= 0x00000300; /* PWM4 output enable */
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}
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if (chn == CKENUM_PWM_CH10 || chn == CKENUM_PWM_CH11) {
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addr->PWMCFG |= 0x00000C00; /* PWM5 output enable */
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}
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return 0;
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}
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/**
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\brief Stop generate pwm signal.
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\param[in] handle pwm handle to operate.
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\return \ref execution_status
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*/
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int32_t drv_pwm_stop(pwm_handle_t handle)
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{
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PWM_NULL_PARAM_CHK(handle);
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ck_pwm_priv_t *pwm_priv = handle;
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ck_pwm_reg_t *addr = (ck_pwm_reg_t *)(pwm_priv->base);
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uint32_t chn = pwm_priv->ch_num;
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if (chn == CKENUM_PWM_CH0 || chn == CKENUM_PWM_CH1) {
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addr->PWMCFG &= ~0x00000003; /* PWM0 output disable */
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}
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if (chn == CKENUM_PWM_CH2 || chn == CKENUM_PWM_CH3) {
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addr->PWMCFG &= ~0x0000000C; /* PWM1 output disable */
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}
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if (chn == CKENUM_PWM_CH4 || chn == CKENUM_PWM_CH5) {
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addr->PWMCFG &= ~0x00000030; /* PWM2 output disable */
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}
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if (chn == CKENUM_PWM_CH6 || chn == CKENUM_PWM_CH7) {
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addr->PWMCFG &= ~0x000000C0; /* PWM3 output disable */
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}
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if (chn == CKENUM_PWM_CH8 || chn == CKENUM_PWM_CH9) {
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addr->PWMCFG &= ~0x00000300; /* PWM4 output disable */
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}
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if (chn == CKENUM_PWM_CH10 || chn == CKENUM_PWM_CH11) {
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addr->PWMCFG &= ~0x00000C00; /* PWM5 output disable */
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}
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return 0;
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}
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