666 lines
26 KiB
C
666 lines
26 KiB
C
//*****************************************************************************
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//
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// am_hal_pdm.h
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//! @file
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//!
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//! @brief Functions for accessing and configuring the PDM module
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//!
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//! @addtogroup pdm2 Pulse Density Modulation (PDM) Input Module.
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//! @ingroup apollo2hal
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//! @{
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//*****************************************************************************
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//*****************************************************************************
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//
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// Copyright (c) 2017, Ambiq Micro
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// 1. Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// 2. Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// 3. Neither the name of the copyright holder nor the names of its
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// contributors may be used to endorse or promote products derived from this
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// software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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//
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// This is part of revision 1.2.9 of the AmbiqSuite Development Package.
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//
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//*****************************************************************************
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#ifndef AM_HAL_PDM_H
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#define AM_HAL_PDM_H
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//*****************************************************************************
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//
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// Macro definitions
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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//! @name PDM Left Right Swap Control
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//! @brief Macro definitions for the PDM LRSWAP bit field
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//!
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//! These macros may be used with the am_hal_pdm_config_t structure to set the
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//! left right swap bit.
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//!
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_PDM_PCFG_LRSWAP_ENABLE \
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AM_REG_PDM_PCFG_LRSWAP_EN
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#define AM_HAL_PDM_PCFG_LRSWAP_DISABLE \
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AM_REG_PDM_PCFG_LRSWAP_NOSWAP
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//! @}
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//*****************************************************************************
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//
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//! @name PDM Right Gain Setting
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//! @brief Macro definitions for the PDM Right Gain Setting.
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//!
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//! These macros may be used with the am_hal_pdm_config_t structure to set the
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//! right gain value.
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//!
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_PDM_PCFG_RIGHT_PGA_M15DB AM_REG_PDM_PCFG_PGARIGHT_M15DB
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#define AM_HAL_PDM_PCFG_RIGHT_PGA_M300DB AM_REG_PDM_PCFG_PGARIGHT_M300DB
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#define AM_HAL_PDM_PCFG_RIGHT_PGA_M45DB AM_REG_PDM_PCFG_PGARIGHT_M45DB
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#define AM_HAL_PDM_PCFG_RIGHT_PGA_M60DB AM_REG_PDM_PCFG_PGARIGHT_M60DB
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#define AM_HAL_PDM_PCFG_RIGHT_PGA_M75DB AM_REG_PDM_PCFG_PGARIGHT_M75DB
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#define AM_HAL_PDM_PCFG_RIGHT_PGA_M90DB AM_REG_PDM_PCFG_PGARIGHT_M90DB
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#define AM_HAL_PDM_PCFG_RIGHT_PGA_M105DB AM_REG_PDM_PCFG_PGARIGHT_M105DB
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#define AM_HAL_PDM_PCFG_RIGHT_PGA_M120DB AM_REG_PDM_PCFG_PGARIGHT_M120DB
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#define AM_HAL_PDM_PCFG_RIGHT_PGA_P105DB AM_REG_PDM_PCFG_PGARIGHT_P105DB
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#define AM_HAL_PDM_PCFG_RIGHT_PGA_P90DB AM_REG_PDM_PCFG_PGARIGHT_P90DB
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#define AM_HAL_PDM_PCFG_RIGHT_PGA_P75DB AM_REG_PDM_PCFG_PGARIGHT_P75DB
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#define AM_HAL_PDM_PCFG_RIGHT_PGA_P60DB AM_REG_PDM_PCFG_PGARIGHT_P60DB
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#define AM_HAL_PDM_PCFG_RIGHT_PGA_P45DB AM_REG_PDM_PCFG_PGARIGHT_P45DB
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#define AM_HAL_PDM_PCFG_RIGHT_PGA_P300DB AM_REG_PDM_PCFG_PGARIGHT_P300DB
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#define AM_HAL_PDM_PCFG_RIGHT_PGA_P15DB AM_REG_PDM_PCFG_PGARIGHT_P15DB
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#define AM_HAL_PDM_PCFG_RIGHT_PGA_0DB AM_REG_PDM_PCFG_PGARIGHT_0DB
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//! @}
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//*****************************************************************************
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//
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//! @name PDM Left Gain Setting
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//! @brief Macro definitions for the PDM Left Gain Setting.
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//!
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//! These macros may be used with the am_hal_pdm_config_t structure to set the
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//! left gain value.
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//!
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_PDM_PCFG_LEFT_PGA_M15DB AM_REG_PDM_PCFG_PGALEFT_M15DB
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#define AM_HAL_PDM_PCFG_LEFT_PGA_M300DB AM_REG_PDM_PCFG_PGALEFT_M300DB
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#define AM_HAL_PDM_PCFG_LEFT_PGA_M45DB AM_REG_PDM_PCFG_PGALEFT_M45DB
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#define AM_HAL_PDM_PCFG_LEFT_PGA_M60DB AM_REG_PDM_PCFG_PGALEFT_M60DB
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#define AM_HAL_PDM_PCFG_LEFT_PGA_M75DB AM_REG_PDM_PCFG_PGALEFT_M75DB
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#define AM_HAL_PDM_PCFG_LEFT_PGA_M90DB AM_REG_PDM_PCFG_PGALEFT_M90DB
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#define AM_HAL_PDM_PCFG_LEFT_PGA_M105DB AM_REG_PDM_PCFG_PGALEFT_M105DB
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#define AM_HAL_PDM_PCFG_LEFT_PGA_M120DB AM_REG_PDM_PCFG_PGALEFT_M120DB
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#define AM_HAL_PDM_PCFG_LEFT_PGA_P105DB AM_REG_PDM_PCFG_PGALEFT_P105DB
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#define AM_HAL_PDM_PCFG_LEFT_PGA_P90DB AM_REG_PDM_PCFG_PGALEFT_P90DB
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#define AM_HAL_PDM_PCFG_LEFT_PGA_P75DB AM_REG_PDM_PCFG_PGALEFT_P75DB
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#define AM_HAL_PDM_PCFG_LEFT_PGA_P60DB AM_REG_PDM_PCFG_PGALEFT_P60DB
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#define AM_HAL_PDM_PCFG_LEFT_PGA_P45DB AM_REG_PDM_PCFG_PGALEFT_P45DB
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#define AM_HAL_PDM_PCFG_LEFT_PGA_P300DB AM_REG_PDM_PCFG_PGALEFT_P300DB
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#define AM_HAL_PDM_PCFG_LEFT_PGA_P15DB AM_REG_PDM_PCFG_PGALEFT_P15DB
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#define AM_HAL_PDM_PCFG_LEFT_PGA_0DB AM_REG_PDM_PCFG_PGALEFT_0DB
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//! @}
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//*****************************************************************************
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//
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//! @name PDM Configuration MCLK Divider
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//! @brief Macro definitions for the PDM MCLK Divider
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//!
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//! These macros may be used with the am_hal_pdm_config_t structure to set the
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//! sinc decimation rate relative to the PDM sample clock (OSR).
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//!
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_PDM_PCFG_MCLKDIV_DIV1 AM_REG_PDM_PCFG_MCLKDIV_MCKDIV1
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#define AM_HAL_PDM_PCFG_MCLKDIV_DIV2 AM_REG_PDM_PCFG_MCLKDIV_MCKDIV2
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#define AM_HAL_PDM_PCFG_MCLKDIV_DIV3 AM_REG_PDM_PCFG_MCLKDIV_MCKDIV3
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#define AM_HAL_PDM_PCFG_MCLKDIV_DIV4 AM_REG_PDM_PCFG_MCLKDIV_MCKDIV4
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#define AM_HAL_PDM_PCFG_MCLKDIV(DIV) AM_REG_PDM_PCFG_MCLKDIV(DIV)
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//! @}
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//*****************************************************************************
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//
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//! @name PDM Configuration SINC Decimation Rate
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//! @brief Macro definitions for the PDM SINC decimation rate
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//!
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//! These macros may be used with the am_hal_pdm_config_t structure to set the
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//! sinc decimation rate relative to the PDM sample clock (OSR).
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//!
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_PDM_PCFG_SINC_RATE(OSR) \
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AM_REG_PDM_PCFG_SINCRATE(OSR)
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//! @}
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//*****************************************************************************
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//
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//! @name PDM Configuration High Pass Filter Enable
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//! @brief Macro definitions for the PDM ADCHPD
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//!
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//! These macros may be used with the am_hal_pdm_config_t structure to enable
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//! the high pass filter.
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//!
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_PDM_PCFG_ADCHPD_ENABLE AM_REG_PDM_PCFG_ADCHPD_EN
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#define AM_HAL_PDM_PCFG_ADCHPD_DISABLE AM_REG_PDM_PCFG_ADCHPD_DIS
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//! @}
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//*****************************************************************************
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//
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//! @name PDM Configuration HPCUTOFF
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//! @brief Macro definitions for the PDM High Pass Filter Cutoff Selector.
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//!
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//! These macros may be used with the am_hal_pdm_config_t structure to set the
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//! high pass filter cutoff frequency. Valid range is 0 to 7.
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//!
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_PDM_PCFG_HPCUTOFF(HPSEL) \
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AM_REG_PDM_PCFG_HPCUTOFF(HPSEL)
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//! @}
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//*****************************************************************************
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//
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//! @name PDM Configuration Gain Set Change Clock Delay
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//! @brief Macro definitions for the PDM clock delay for gain set changes.
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//!
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//! These macros may be used with the am_hal_pdm_config_t structure to set the
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//! number of clocks for spreading gain setting changes. Valid range is 0 to 7.
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//!
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_PDM_PCFG_CYCLES(CLOCKS) \
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AM_REG_PDM_PCFG_CYCLES(CLOCKS)
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//! @}
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//*****************************************************************************
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//
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//! @name PDM Configuration SOFTMUTE enable/disable.
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//! @brief Macro definitions for the PDM PCFG register mute controls.
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//!
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//! These macros may be used with the am_hal_pdm_config_t structure to enable
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//! or disable the SOFTMUTE option.
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//!
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_PDM_PCFG_SOFTMUTE_ENABLE AM_REG_PDM_PCFG_SOFTMUTE_EN
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#define AM_HAL_PDM_PCFG_SOFTMUTE_DISABLE AM_REG_PDM_PCFG_SOFTMUTE_DIS
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//! @}
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//*****************************************************************************
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//
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//! @name PDM Configuration PDM Core enable/disable.
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//! @brief Macro definitions for the PDM PCFG register filter engine enable.
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//!
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//! These macros may be used with the am_hal_pdm_config_t structure to enable
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//! or disable the PDM filter engine core.
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//!
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_PDM_PCFG_PDMCORE_ENABLE AM_REG_PDM_PCFG_PDMCORE_EN
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#define AM_HAL_PDM_PCFG_PDMCORE_DISABLE AM_REG_PDM_PCFG_PDMCORE_DIS
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//! @}
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//*****************************************************************************
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//
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//! @name PDM Clock Frequencies
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//! @brief Macro definitions for the PDM clock (from clkgen) frequencies.
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//!
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//! These macros may be used with the am_hal_pdm_config_t structure to set the
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//! source clock frequency of the PDM interface.
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//!
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_PDM_IOCLK_12MHZ \
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(AM_REG_PDM_VCFG_PDMCLKSEL_12MHz | AM_REG_PDM_VCFG_IOCLKEN_EN)
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#define AM_HAL_PDM_IOCLK_6MHZ \
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(AM_REG_PDM_VCFG_PDMCLKSEL_6MHz | AM_REG_PDM_VCFG_IOCLKEN_EN)
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#define AM_HAL_PDM_IOCLK_3MHZ \
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(AM_REG_PDM_VCFG_PDMCLKSEL_3MHz | AM_REG_PDM_VCFG_IOCLKEN_EN)
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#define AM_HAL_PDM_IOCLK_1_5MHZ \
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(AM_REG_PDM_VCFG_PDMCLKSEL_1_5MHz | AM_REG_PDM_VCFG_IOCLKEN_EN)
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#define AM_HAL_PDM_IOCLK_750KHZ \
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(AM_REG_PDM_VCFG_PDMCLKSEL_750KHz | AM_REG_PDM_VCFG_IOCLKEN_EN)
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#define AM_HAL_PDM_IOCLK_375KHZ \
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(AM_REG_PDM_VCFG_PDMCLKSEL_375KHz | AM_REG_PDM_VCFG_IOCLKEN_EN)
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#define AM_HAL_PDM_IOCLK_187KHZ \
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(AM_REG_PDM_VCFG_PDMCLKSEL_187KHz | AM_REG_PDM_VCFG_IOCLKEN_EN)
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//! @}
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//*****************************************************************************
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//
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//! @name PDM Voice Configuration RSTB
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//! @brief Reset the IP core.
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//!
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_PDM_VCFG_RSTB_RESET AM_REG_PDM_VCFG_RSTB_RESET
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#define AM_HAL_PDM_VCFG_RSTB_NORMAL AM_REG_PDM_VCFG_RSTB_NORM
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//! @}
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//*****************************************************************************
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//
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//! @name PDM Voice Configuration PDM Clock Enable/Disable
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//! @brief Macro definitions for the PDM VCFG register PDMCLKEN.
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//!
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//! These macros may be used with the am_hal_pdm_config_t structure to enable
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//! or disable the PDM clock output to the pad mux and from there to the world.
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//!
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_PDM_VCFG_PDMCLK_ENABLE AM_REG_PDM_VCFG_PDMCLK_EN
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#define AM_HAL_PDM_VCFG_PDMCLK_DISABLE AM_REG_PDM_VCFG_PDMCLK_DIS
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//! @}
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//*****************************************************************************
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//
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//! @name PDM Voice Configuration I2S Mode Enable/Disable
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//! @brief Macro definitions for the PDM VCFG register I2SMODE.
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//!
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//! These macros may be used with the am_hal_pdm_config_t structure to enable
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//! or disable the PDM clock output to the pad mux and from there to the world.
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//!
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_PDM_VCFG_I2SMODE_ENABLE AM_REG_PDM_VCFG_I2SMODE_EN
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#define AM_HAL_PDM_VCFG_I2SMODE_DISABLE AM_REG_PDM_VCFG_I2SMODE_DIS
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//! @}
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//*****************************************************************************
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//
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//! @name PDM Voice Configuration BCLK Inversion Enable/Disable
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//! @brief Macro definitions for the PDM VCFG register BCLKINV.
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//!
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//! These macros may be used with the am_hal_pdm_config_t structure to enable
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//! or disable the PDM clock output to the pad mux and from there to the world.
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//!
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_PDM_VCFG_BCLKINV_ENABLE AM_REG_PDM_VCFG_BCLKINV_INV
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#define AM_HAL_PDM_VCFG_BCLKINV_DISABLE AM_REG_PDM_VCFG_BCLKINV_NORM
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//! @}
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//*****************************************************************************
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//
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//! @name PDM Voice Configuration DMICDEL Enable/Disable
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//! @brief Macro definitions for the PDM VCFG register Digital Mic Delay.
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//!
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//! These macros may be used with the am_hal_pdm_config_t structure to enable
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//! or disable the PDM digital microphone clock delay.
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//!
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_PDM_VCFG_DMICDEL_1CYC AM_REG_PDM_VCFG_DMICKDEL_1CYC
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#define AM_HAL_PDM_VCFG_DMICDEL_0CYC AM_REG_PDM_VCFG_DMICKDEL_0CYC
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#define AM_HAL_PDM_VCFG_DMICDEL_ENABLE AM_REG_PDM_VCFG_DMICKDEL_1CYC
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#define AM_HAL_PDM_VCFG_DMICDEL_DISABLE AM_REG_PDM_VCFG_DMICKDEL_0CYC
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//! @}
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//*****************************************************************************
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//
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//! @name PDM Voice Configuration Select Apps Processor (AP) versus Internal
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//! @brief Macro definitions for the PDM VCFG register Digital Mic Delay.
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//!
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//! These macros may be used with the am_hal_pdm_config_t structure to select
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//! the Application Processor (I2S slave) mode or the Internal FIFO interface
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//! to the Apollo Cortex M4.
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//!
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_PDM_VCFG_SELAP_I2S AM_REG_PDM_VCFG_SELAP_I2S
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#define AM_HAL_PDM_VCFG_SELAP_INTERNAL AM_REG_PDM_VCFG_SELAP_INTERNAL
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#define AM_HAL_PDM_VCFG_SELAP_AP_I2S AM_REG_PDM_VCFG_SELAP_I2S
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#define AM_HAL_PDM_VCFG_SELAP_CM4_FIFO AM_REG_PDM_VCFG_SELAP_INTERNAL
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//! @}
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//*****************************************************************************
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//
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//! @name PDM Voice Configuration PACK Enable/Disable
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//! @brief Macro definitions for the PDM VCFG register sample packing mode.
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//!
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//! These macros may be used with the am_hal_pdm_config_t structure to enable
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//! or disable the PDM sample packing mode. This mode puts two 16-bit samples
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//! per 32-bit FIFO word. The following packed modes are available:
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//!
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//! mono left: LEFT_NEW, LEFT_OLD
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//! mono right: RIGHT_NEW,RIGHT_OLD
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//! stereo right: LEFT, RIGHT
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//! stereo right(LRSWAP): RIGHT, LEFT
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//!
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//!
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//!
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_PDM_VCFG_PACK_ENABLE AM_REG_PDM_VCFG_PCMPACK_EN
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#define AM_HAL_PDM_VCFG_PACK_DISABLE AM_REG_PDM_VCFG_PCMPACK_DIS
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//! @}
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//*****************************************************************************
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//
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//! @name PDM Channel Selects
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//! @brief Macro definitions for the PDM Channel Selection.
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//!
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//! These macros may be used with the am_hal_pdm_config_t structure to set the
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//! channel selection for the PDM interface.
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//!
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_PDM_VCFG_CHANNEL_LEFT AM_REG_PDM_VCFG_CHSET_LEFT
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#define AM_HAL_PDM_VCFG_CHANNEL_RIGHT AM_REG_PDM_VCFG_CHSET_RIGHT
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#define AM_HAL_PDM_VCFG_CHANNEL_STEREO AM_REG_PDM_VCFG_CHSET_STEREO
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//! @}
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//*****************************************************************************
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//
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//! @name PDM Interrupts
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//! @brief Macro definitions for the PDM interrupt status bits.
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//!
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//! These macros correspond to the bits in the PDM interrupt status register.
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//! They may be used for any of the am_hal_pdm_int_x() functions.
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//!
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_PDM_INT_UNDFL AM_REG_PDM_INTEN_UNDFL_M
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#define AM_HAL_PDM_INT_OVF AM_REG_PDM_INTEN_OVF_M
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#define AM_HAL_PDM_INT_FIFO AM_REG_PDM_INTEN_THR_M
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//! @}
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//*****************************************************************************
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//
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//! @brief Configuration structure for the PDM module.
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//
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//*****************************************************************************
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typedef struct
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{
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//
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//! @brief Set the PDM configuration reg with the values in this member.
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//! Choose from AM_HAL_PDM_PCFG macros.
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//! AM_HAL_PDM_PCFG_LRSWAP_xxx
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//! AM_HAL_PDM_PCFG_RIGHT_PGA_xxx
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//! AM_HAL_PDM_PCFG_LEFT_PGA_xxx
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//! AM_HAL_PDM_PCFG_MCLKDIV_xxx
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//! AM_HAL_PDM_PCFG_SINC_RATE()
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//! AM_HAL_PDM_PCFG_ADCHPD_xxx
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//! AM_HAL_PDM_PCFG_HPCUTOFF()
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//! AM_HAL_PDM_PCFG_CYCLES()
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//! AM_HAL_PDM_PCFG_SOFTMUTE_xxx
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//! * AM_HAL_PDM_PCFG_PDMCORE_EN
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//! AM_HAL_PDM_PCFG_PDMCORE_DISABLE
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//
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uint32_t ui32PDMConfigReg;
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//
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//! @brief Set the Voice Configuration reg with the values in this member.
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//! Choose from AM_HAL_PDM_VCFG macros.
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//! AM_HAL_PDM_IOCLK_xxx (also sets AM_REG_PDM_VCFG_IOCLKEN_EN)
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//! * AM_REG_PDM_VCFG_IOCLKEN_EN
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//! * AM_HAL_PDM_VCFG_RSTB_RESET
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//! AM_HAL_PDM_VCFG_RSTB_NORMAL
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//! * AM_HAL_PDM_VCFG_PDMCLK_EN
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//! AM_HAL_PDM_VCFG_PDMCLK_DIS
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//! AM_HAL_PDM_VCFG_I2SMODE_xxx
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//! AM_HAL_PDM_VCFG_BCLKINV_xxx
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//! AM_HAL_PDM_VCFG_DMICDEL_xxx
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//! AM_HAL_PDM_VCFG_SELAP_xxx
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//! AM_HAL_PDM_VCFG_PACK_xxx
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//! AM_HAL_PDM_VCFG_CHANNEL_xxx
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//!
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//! * = These bits are set or cleared by the HAL PDM functions
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//! am_hal_pdm_enable() or am_hal_pdm_disable().
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//
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uint32_t ui32VoiceConfigReg;
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//
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//! @brief Select the FIFO PCM sample threshold.
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//!
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//! The PDM controller will generate a processor interrupt when the number
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//! of entries in the FIFO goes *above* this number.
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//
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uint32_t ui32FIFOThreshold;
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} am_hal_pdm_config_t;
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//*****************************************************************************
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//
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// Define function-like macros.
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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//! @brief Read the FIFO depth information as an in-line macro
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//
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//*****************************************************************************
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#define am_hal_pdm_fifo_depth_read() (AM_REG(PDM, FR))
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//*****************************************************************************
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//
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//! @brief Read the FIFO READ DATA as an in-line macro
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//
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//*****************************************************************************
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#define am_hal_pdm_fifo_data_read() (AM_REG(PDM, FRD))
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//*****************************************************************************
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//
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//! @brief Flush the FIFO as an in-line macro
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//
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//*****************************************************************************
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#define am_hal_pdm_fifo_flush() (AM_REG(PDM, FLUSH) = 0)
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//*****************************************************************************
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//
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//! @brief Set the PDM Configuration (PCFG) Register
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//!
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//! This function sets the PDM configuration register
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//
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//*****************************************************************************
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#define am_hal_pdm_pcfg_set(Value) (AM_REG(PDM, PCFG) = Value)
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//*****************************************************************************
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//
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//! @brief Get the PCFG register value from PDM module.
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//
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//*****************************************************************************
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#define am_hal_pdm_pcfg_get() (AM_REG(PDM, PCFG))
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//*****************************************************************************
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//
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//! @brief Set the Voice Configuration (VCFG) Register
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//
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//*****************************************************************************
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#define am_hal_pdm_vcfg_set(Value) (AM_REG(PDM, VCFG) = Value)
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//*****************************************************************************
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//
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//! @brief Get the VCFG register value from PDM module.
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//
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//*****************************************************************************
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#define am_hal_pdm_vcfg_get() (AM_REG(PDM, VCFG))
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//*****************************************************************************
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//
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//! @brief Set the FIFO Threshold
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//
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//*****************************************************************************
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#define am_hal_pdm_thresh_set(thresh) (AM_REG(PDM, FTHR) = thresh)
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//*****************************************************************************
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//
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//! @brief Get the FIFO Threshold register value from PDM module.
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//
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//*****************************************************************************
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#define am_hal_pdm_thresh_get() (AM_REG(PDM, FTHR))
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//*****************************************************************************
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//
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//! @brief Set the left microphone PGA gain.
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//!
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//*****************************************************************************
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#define am_hal_pdm_left_gain_set(gain) (AM_BFW(PDM, PCFG, PGALEFT, gain))
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|
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//*****************************************************************************
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//
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//! @brief Set the right microphone PGA gain.
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//
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//*****************************************************************************
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#define am_hal_pdm_right_gain_set(gain) (AM_BFW(PDM, PCFG, PGARIGHT, gain))
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|
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//*****************************************************************************
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//
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//! @brief Get the left microphone PGA gain value.
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//
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//*****************************************************************************
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#define am_hal_pdm_left_gain_get() (AM_BFR(PDM, PCFG, PGALEFT))
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|
|
//*****************************************************************************
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//
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//! @brief Get the right microphone PGA gain value.
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//
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|
//*****************************************************************************
|
|
#define am_hal_pdm_right_gain_get() (AM_BFR(PDM, PCFG, PGARIGHT))
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|
|
//*****************************************************************************
|
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//
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|
//! @brief Enable the Soft Mute functionality.
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//
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|
//*****************************************************************************
|
|
#define am_hal_pdm_soft_mute_enable() (AM_BFWe(PDM, PCFG, SOFTMUTE, EN))
|
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|
|
//*****************************************************************************
|
|
//
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|
//! @brief Disable the Soft Mute functionality.
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|
//
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|
//*****************************************************************************
|
|
#define am_hal_pdm_soft_mute_disable() (AM_BFWe(PDM, PCFG, SOFTMUTE, DIS))
|
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|
|
//*****************************************************************************
|
|
//
|
|
//! @brief Enable selected PDM Interrupts.
|
|
//!
|
|
//! @param ui32Interrupt - Use the macro bit fields provided in am_hal_pdm.h\n
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|
//! AM_HAL_PDM_INT_UNDFL\n
|
|
//! AM_HAL_PDM_INT_OVF\n
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|
//! AM_HAL_PDM_INT_FIFO\n
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|
//
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|
//*****************************************************************************
|
|
#define am_hal_pdm_int_enable(intrpt) (AM_REG(PDM, INTEN) |= intrpt)
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|
|
//*****************************************************************************
|
|
//
|
|
//! @brief Return the enabled PDM Interrupts.
|
|
//!
|
|
//! Use this function to return all enabled PDM interrupts.
|
|
//!
|
|
//! @return all enabled PDM interrupts as a mask.\n
|
|
//! AM_HAL_PDM_INT_UNDFL\n
|
|
//! AM_HAL_PDM_INT_OVF\n
|
|
//! AM_HAL_PDM_INT_FIFO\n
|
|
//
|
|
//*****************************************************************************
|
|
#define am_hal_pdm_int_enable_get() (AM_REG(PDM, INTEN))
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! @brief Disable selected PDM Interrupts.
|
|
//!
|
|
//! @param ui32Interrupt - Use the macro bit fields provided in am_hal_pdm.h\n
|
|
//! AM_HAL_PDM_INT_UNDFL\n
|
|
//! AM_HAL_PDM_INT_OVF\n
|
|
//! AM_HAL_PDM_INT_FIFO\n
|
|
//
|
|
//*****************************************************************************
|
|
#define am_hal_pdm_int_disable(intrpt) (AM_REG(PDM, INTEN) &= ~intrpt)
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! @brief Clear selected PDM Interrupts.
|
|
//!
|
|
//! @param ui32Interrupt - Use the macro bit fields provided in am_hal_pdm.h\n
|
|
//! AM_HAL_PDM_INT_UNDFL\n
|
|
//! AM_HAL_PDM_INT_OVF\n
|
|
//! AM_HAL_PDM_INT_FIFO\n
|
|
//
|
|
//*****************************************************************************
|
|
#define am_hal_pdm_int_clear(intrpt) (AM_REG(PDM, INTCLR) = intrpt)
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! @brief Set selected PDM Interrupts.
|
|
//!
|
|
//! Use this function to set the PDM interrupts.
|
|
//!
|
|
//! @param ui32Interrupt - Use the macro bit fields provided in am_hal_pdm.h\n
|
|
//! AM_HAL_PDM_INT_UNDFL\n
|
|
//! AM_HAL_PDM_INT_OVF\n
|
|
//! AM_HAL_PDM_INT_FIFO\n
|
|
//
|
|
//*****************************************************************************
|
|
#define am_hal_pdm_int_set(intrpt) (AM_REG(PDM, INTSET) = intrpt)
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// External function definitions
|
|
//
|
|
//*****************************************************************************
|
|
extern void am_hal_pdm_config(am_hal_pdm_config_t * cfg);
|
|
extern void am_hal_pdm_enable(void);
|
|
extern void am_hal_pdm_disable(void);
|
|
|
|
extern uint32_t am_hal_pdm_int_status_get(bool bEnabledOnly);
|
|
|
|
#endif // AM_HAL_PDM_H
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// End Doxygen group.
|
|
//! @}
|
|
//
|
|
//*****************************************************************************
|