1061 lines
35 KiB
C
1061 lines
35 KiB
C
/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* Copyright 2016-2017 NXP
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "fsl_lpspi_edma.h"
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/***********************************************************************************************************************
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* Definitons
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***********************************************************************************************************************/
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/*!
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* @brief Structure definition for dspi_master_edma_private_handle_t. The structure is private.
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*/
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typedef struct _lpspi_master_edma_private_handle
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{
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LPSPI_Type *base; /*!< LPSPI peripheral base address. */
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lpspi_master_edma_handle_t *handle; /*!< lpspi_master_edma_handle_t handle */
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} lpspi_master_edma_private_handle_t;
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/*!
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* @brief Structure definition for dspi_slave_edma_private_handle_t. The structure is private.
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*/
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typedef struct _lpspi_slave_edma_private_handle
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{
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LPSPI_Type *base; /*!< LPSPI peripheral base address. */
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lpspi_slave_edma_handle_t *handle; /*!< lpspi_slave_edma_handle_t handle */
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} lpspi_slave_edma_private_handle_t;
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/***********************************************************************************************************************
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* Prototypes
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***********************************************************************************************************************/
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/*!
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* @brief EDMA_LpspiMasterCallback after the LPSPI master transfer completed by using EDMA.
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* This is not a public API.
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*/
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static void EDMA_LpspiMasterCallback(edma_handle_t *edmaHandle,
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void *g_lpspiEdmaPrivateHandle,
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bool transferDone,
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uint32_t tcds);
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/*!
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* @brief EDMA_LpspiSlaveCallback after the LPSPI slave transfer completed by using EDMA.
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* This is not a public API.
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*/
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static void EDMA_LpspiSlaveCallback(edma_handle_t *edmaHandle,
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void *g_lpspiEdmaPrivateHandle,
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bool transferDone,
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uint32_t tcds);
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/*!
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* @brief Get instance number for LPSPI module.
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* This is not a public API and it's extern from fsl_lpspi.c.
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* @param base LPSPI peripheral base address
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*/
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extern uint32_t LPSPI_GetInstance(LPSPI_Type *base);
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/*!
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* @brief Check the argument for transfer .
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* This is not a public API. It's extern from fsl_lpspi.c.
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*/
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extern bool LPSPI_CheckTransferArgument(lpspi_transfer_t *transfer, uint32_t bitsPerFrame, uint32_t bytesPerFrame);
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static void LPSPI_SeparateEdmaReadData(uint8_t *rxData, uint32_t readData, uint32_t bytesEachRead, bool isByteSwap);
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/***********************************************************************************************************************
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* Variables
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***********************************************************************************************************************/
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/*! @brief Pointers to lpspi edma handles for each instance. */
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static lpspi_master_edma_private_handle_t s_lpspiMasterEdmaPrivateHandle[FSL_FEATURE_SOC_LPSPI_COUNT];
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static lpspi_slave_edma_private_handle_t s_lpspiSlaveEdmaPrivateHandle[FSL_FEATURE_SOC_LPSPI_COUNT];
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/*! @brief Global variable for dummy data value setting. */
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extern volatile uint8_t s_dummyData[];
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/***********************************************************************************************************************
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* Code
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***********************************************************************************************************************/
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static void LPSPI_SeparateEdmaReadData(uint8_t *rxData, uint32_t readData, uint32_t bytesEachRead, bool isByteSwap)
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{
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assert(rxData);
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switch (bytesEachRead)
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{
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case 1:
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if (!isByteSwap)
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{
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*rxData = readData;
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++rxData;
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}
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else
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{
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*rxData = readData >> 24;
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++rxData;
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}
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break;
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case 2:
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if (!isByteSwap)
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{
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*rxData = readData;
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++rxData;
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*rxData = readData >> 8;
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++rxData;
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}
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else
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{
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*rxData = readData >> 16;
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++rxData;
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*rxData = readData >> 24;
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++rxData;
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}
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break;
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case 4:
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*rxData = readData;
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++rxData;
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*rxData = readData >> 8;
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++rxData;
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*rxData = readData >> 16;
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++rxData;
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*rxData = readData >> 24;
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++rxData;
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break;
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default:
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assert(false);
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break;
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}
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}
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void LPSPI_MasterTransferCreateHandleEDMA(LPSPI_Type *base,
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lpspi_master_edma_handle_t *handle,
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lpspi_master_edma_transfer_callback_t callback,
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void *userData,
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edma_handle_t *edmaRxRegToRxDataHandle,
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edma_handle_t *edmaTxDataToTxRegHandle)
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{
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assert(handle);
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assert(edmaRxRegToRxDataHandle);
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assert(edmaTxDataToTxRegHandle);
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/* Zero the handle. */
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memset(handle, 0, sizeof(*handle));
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uint32_t instance = LPSPI_GetInstance(base);
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s_lpspiMasterEdmaPrivateHandle[instance].base = base;
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s_lpspiMasterEdmaPrivateHandle[instance].handle = handle;
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handle->callback = callback;
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handle->userData = userData;
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handle->edmaRxRegToRxDataHandle = edmaRxRegToRxDataHandle;
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handle->edmaTxDataToTxRegHandle = edmaTxDataToTxRegHandle;
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}
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status_t LPSPI_MasterTransferEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, lpspi_transfer_t *transfer)
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{
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assert(handle);
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assert(transfer);
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uint32_t bitsPerFrame = ((base->TCR & LPSPI_TCR_FRAMESZ_MASK) >> LPSPI_TCR_FRAMESZ_SHIFT) + 1;
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uint32_t bytesPerFrame = (bitsPerFrame + 7) / 8;
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uint32_t temp = 0U;
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if (!LPSPI_CheckTransferArgument(transfer, bitsPerFrame, bytesPerFrame))
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{
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return kStatus_InvalidArgument;
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}
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/*And since the dma transfer can not support 3 bytes .*/
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if ((bytesPerFrame % 4U) == 3)
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{
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return kStatus_InvalidArgument;
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}
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/* Check that we're not busy.*/
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if (handle->state == kLPSPI_Busy)
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{
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return kStatus_LPSPI_Busy;
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}
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handle->state = kLPSPI_Busy;
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uint32_t instance = LPSPI_GetInstance(base);
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uint32_t rxAddr = LPSPI_GetRxRegisterAddress(base);
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uint32_t txAddr = LPSPI_GetTxRegisterAddress(base);
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uint32_t whichPcs = (transfer->configFlags & LPSPI_MASTER_PCS_MASK) >> LPSPI_MASTER_PCS_SHIFT;
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/*Because DMA is fast enough , so set the RX and TX watermarks to 0 .*/
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uint8_t txWatermark = 0;
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uint8_t rxWatermark = 0;
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/*Used for byte swap*/
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uint32_t dif = 0;
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uint8_t bytesLastWrite = 0;
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bool isThereExtraTxBytes = false;
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uint8_t dummyData = s_dummyData[instance];
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edma_transfer_config_t transferConfigRx;
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edma_transfer_config_t transferConfigTx;
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edma_tcd_t *softwareTCD_extraBytes = (edma_tcd_t *)((uint32_t)(&handle->lpspiSoftwareTCD[1]) & (~0x1FU));
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edma_tcd_t *softwareTCD_pcsContinuous = (edma_tcd_t *)((uint32_t)(&handle->lpspiSoftwareTCD[2]) & (~0x1FU));
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handle->txData = transfer->txData;
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handle->rxData = transfer->rxData;
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handle->txRemainingByteCount = transfer->dataSize;
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handle->rxRemainingByteCount = transfer->dataSize;
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handle->totalByteCount = transfer->dataSize;
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handle->writeRegRemainingTimes = (transfer->dataSize / bytesPerFrame) * ((bytesPerFrame + 3) / 4);
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handle->readRegRemainingTimes = handle->writeRegRemainingTimes;
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handle->txBuffIfNull =
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((uint32_t)dummyData) | ((uint32_t)dummyData << 8) | ((uint32_t)dummyData << 16) | ((uint32_t)dummyData << 24);
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/*The TX and RX FIFO sizes are always the same*/
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handle->fifoSize = LPSPI_GetRxFifoSize(base);
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handle->isPcsContinuous = (bool)(transfer->configFlags & kLPSPI_MasterPcsContinuous);
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handle->isByteSwap = (bool)(transfer->configFlags & kLPSPI_MasterByteSwap);
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LPSPI_SetFifoWatermarks(base, txWatermark, rxWatermark);
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/*Transfers will stall when transmit FIFO is empty or receive FIFO is full. */
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LPSPI_Enable(base, false);
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base->CFGR1 &= (~LPSPI_CFGR1_NOSTALL_MASK);
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/* Check if using 3-wire mode and the txData is NULL, set the output pin to tristated. */
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temp = base->CFGR1;
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temp &= LPSPI_CFGR1_PINCFG_MASK;
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if ((temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdiInSdiOut)) || (temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdoInSdoOut)))
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{
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if (!handle->txData)
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{
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base->CFGR1 |= LPSPI_CFGR1_OUTCFG_MASK;
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}
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/* The 3-wire mode can't send and receive data at the same time. */
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if ((handle->txData) && (handle->rxData))
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{
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return kStatus_InvalidArgument;
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}
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}
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/*Flush FIFO , clear status , disable all the inerrupts.*/
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LPSPI_FlushFifo(base, true, true);
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LPSPI_ClearStatusFlags(base, kLPSPI_AllStatusFlag);
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LPSPI_DisableInterrupts(base, kLPSPI_AllInterruptEnable);
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/* For DMA transfer , we'd better not masked the transmit data and receive data in TCR since the transfer flow is
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* hard to controlled by software.
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*/
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base->TCR = (base->TCR & ~(LPSPI_TCR_CONT_MASK | LPSPI_TCR_CONTC_MASK | LPSPI_TCR_BYSW_MASK | LPSPI_TCR_PCS_MASK)) |
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LPSPI_TCR_CONT(handle->isPcsContinuous) | LPSPI_TCR_CONTC(0U) | LPSPI_TCR_BYSW(handle->isByteSwap) |
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LPSPI_TCR_PCS(whichPcs);
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isThereExtraTxBytes = false;
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handle->isThereExtraRxBytes = false;
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/*Calculate the bytes for write/read the TX/RX register each time*/
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if (bytesPerFrame <= 4)
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{
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handle->bytesEachWrite = bytesPerFrame;
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handle->bytesEachRead = bytesPerFrame;
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handle->bytesLastRead = bytesPerFrame;
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}
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else
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{
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handle->bytesEachWrite = 4;
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handle->bytesEachRead = 4;
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handle->bytesLastRead = 4;
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if ((transfer->dataSize % 4) != 0)
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{
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bytesLastWrite = transfer->dataSize % 4;
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handle->bytesLastRead = bytesLastWrite;
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isThereExtraTxBytes = true;
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--handle->writeRegRemainingTimes;
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--handle->readRegRemainingTimes;
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handle->isThereExtraRxBytes = true;
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}
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}
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LPSPI_DisableDMA(base, kLPSPI_RxDmaEnable | kLPSPI_TxDmaEnable);
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EDMA_SetCallback(handle->edmaRxRegToRxDataHandle, EDMA_LpspiMasterCallback,
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&s_lpspiMasterEdmaPrivateHandle[instance]);
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/*Rx*/
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EDMA_ResetChannel(handle->edmaRxRegToRxDataHandle->base, handle->edmaRxRegToRxDataHandle->channel);
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if (handle->rxData)
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{
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transferConfigRx.destAddr = (uint32_t) & (handle->rxData[0]);
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transferConfigRx.destOffset = 1;
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}
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else
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{
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transferConfigRx.destAddr = (uint32_t) & (handle->rxBuffIfNull);
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transferConfigRx.destOffset = 0;
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}
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transferConfigRx.destTransferSize = kEDMA_TransferSize1Bytes;
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dif = 0;
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switch (handle->bytesEachRead)
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{
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case (1U):
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transferConfigRx.srcTransferSize = kEDMA_TransferSize1Bytes;
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transferConfigRx.minorLoopBytes = 1;
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if (handle->isByteSwap)
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{
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dif = 3;
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}
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break;
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case (2U):
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transferConfigRx.srcTransferSize = kEDMA_TransferSize2Bytes;
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transferConfigRx.minorLoopBytes = 2;
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if (handle->isByteSwap)
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{
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dif = 2;
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}
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break;
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case (4U):
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transferConfigRx.srcTransferSize = kEDMA_TransferSize4Bytes;
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transferConfigRx.minorLoopBytes = 4;
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break;
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default:
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transferConfigRx.srcTransferSize = kEDMA_TransferSize1Bytes;
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transferConfigRx.minorLoopBytes = 1;
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assert(false);
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break;
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}
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transferConfigRx.srcAddr = (uint32_t)rxAddr + dif;
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transferConfigRx.srcOffset = 0;
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transferConfigRx.majorLoopCounts = handle->readRegRemainingTimes;
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/* Store the initially configured eDMA minor byte transfer count into the LPSPI handle */
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handle->nbytes = transferConfigRx.minorLoopBytes;
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EDMA_SetTransferConfig(handle->edmaRxRegToRxDataHandle->base, handle->edmaRxRegToRxDataHandle->channel,
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&transferConfigRx, NULL);
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EDMA_EnableChannelInterrupts(handle->edmaRxRegToRxDataHandle->base, handle->edmaRxRegToRxDataHandle->channel,
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kEDMA_MajorInterruptEnable);
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/*Tx*/
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EDMA_ResetChannel(handle->edmaTxDataToTxRegHandle->base, handle->edmaTxDataToTxRegHandle->channel);
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if (isThereExtraTxBytes)
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{
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if (handle->txData)
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{
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transferConfigTx.srcAddr = (uint32_t) & (transfer->txData[transfer->dataSize - bytesLastWrite]);
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transferConfigTx.srcOffset = 1;
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}
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else
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{
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transferConfigTx.srcAddr = (uint32_t)(&handle->txBuffIfNull);
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transferConfigTx.srcOffset = 0;
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}
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transferConfigTx.destOffset = 0;
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transferConfigTx.srcTransferSize = kEDMA_TransferSize1Bytes;
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dif = 0;
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switch (bytesLastWrite)
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{
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case (1U):
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transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
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transferConfigTx.minorLoopBytes = 1;
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if (handle->isByteSwap)
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{
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dif = 3;
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}
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break;
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case (2U):
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transferConfigTx.destTransferSize = kEDMA_TransferSize2Bytes;
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transferConfigTx.minorLoopBytes = 2;
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if (handle->isByteSwap)
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{
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dif = 2;
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}
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break;
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default:
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transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
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transferConfigTx.minorLoopBytes = 1;
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assert(false);
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break;
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}
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transferConfigTx.destAddr = (uint32_t)txAddr + dif;
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transferConfigTx.majorLoopCounts = 1;
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EDMA_TcdReset(softwareTCD_extraBytes);
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if (handle->isPcsContinuous)
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{
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EDMA_TcdSetTransferConfig(softwareTCD_extraBytes, &transferConfigTx, softwareTCD_pcsContinuous);
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}
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else
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{
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EDMA_TcdSetTransferConfig(softwareTCD_extraBytes, &transferConfigTx, NULL);
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}
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}
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if (handle->isPcsContinuous)
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{
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handle->transmitCommand = base->TCR & ~(LPSPI_TCR_CONTC_MASK | LPSPI_TCR_CONT_MASK);
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transferConfigTx.srcAddr = (uint32_t) & (handle->transmitCommand);
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transferConfigTx.srcOffset = 0;
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transferConfigTx.destAddr = (uint32_t) & (base->TCR);
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transferConfigTx.destOffset = 0;
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transferConfigTx.srcTransferSize = kEDMA_TransferSize4Bytes;
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transferConfigTx.destTransferSize = kEDMA_TransferSize4Bytes;
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transferConfigTx.minorLoopBytes = 4;
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transferConfigTx.majorLoopCounts = 1;
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EDMA_TcdReset(softwareTCD_pcsContinuous);
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EDMA_TcdSetTransferConfig(softwareTCD_pcsContinuous, &transferConfigTx, NULL);
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}
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if (handle->txData)
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{
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transferConfigTx.srcAddr = (uint32_t)(handle->txData);
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transferConfigTx.srcOffset = 1;
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}
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else
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{
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transferConfigTx.srcAddr = (uint32_t)(&handle->txBuffIfNull);
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transferConfigTx.srcOffset = 0;
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}
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transferConfigTx.destOffset = 0;
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transferConfigTx.srcTransferSize = kEDMA_TransferSize1Bytes;
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dif = 0;
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switch (handle->bytesEachRead)
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{
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case (1U):
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transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
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transferConfigTx.minorLoopBytes = 1;
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if (handle->isByteSwap)
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{
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dif = 3;
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}
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break;
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case (2U):
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transferConfigTx.destTransferSize = kEDMA_TransferSize2Bytes;
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transferConfigTx.minorLoopBytes = 2;
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if (handle->isByteSwap)
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{
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dif = 2;
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}
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break;
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case (4U):
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transferConfigTx.destTransferSize = kEDMA_TransferSize4Bytes;
|
|
transferConfigTx.minorLoopBytes = 4;
|
|
break;
|
|
|
|
default:
|
|
transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
|
|
transferConfigTx.minorLoopBytes = 1;
|
|
assert(false);
|
|
break;
|
|
}
|
|
|
|
transferConfigTx.destAddr = (uint32_t)txAddr + dif;
|
|
|
|
transferConfigTx.majorLoopCounts = handle->writeRegRemainingTimes;
|
|
|
|
if (isThereExtraTxBytes)
|
|
{
|
|
EDMA_SetTransferConfig(handle->edmaTxDataToTxRegHandle->base, handle->edmaTxDataToTxRegHandle->channel,
|
|
&transferConfigTx, softwareTCD_extraBytes);
|
|
}
|
|
else if (handle->isPcsContinuous)
|
|
{
|
|
EDMA_SetTransferConfig(handle->edmaTxDataToTxRegHandle->base, handle->edmaTxDataToTxRegHandle->channel,
|
|
&transferConfigTx, softwareTCD_pcsContinuous);
|
|
}
|
|
else
|
|
{
|
|
EDMA_SetTransferConfig(handle->edmaTxDataToTxRegHandle->base, handle->edmaTxDataToTxRegHandle->channel,
|
|
&transferConfigTx, NULL);
|
|
}
|
|
|
|
EDMA_StartTransfer(handle->edmaTxDataToTxRegHandle);
|
|
EDMA_StartTransfer(handle->edmaRxRegToRxDataHandle);
|
|
|
|
LPSPI_EnableDMA(base, kLPSPI_RxDmaEnable | kLPSPI_TxDmaEnable);
|
|
LPSPI_Enable(base, true);
|
|
|
|
return kStatus_Success;
|
|
}
|
|
|
|
static void EDMA_LpspiMasterCallback(edma_handle_t *edmaHandle,
|
|
void *g_lpspiEdmaPrivateHandle,
|
|
bool transferDone,
|
|
uint32_t tcds)
|
|
{
|
|
assert(edmaHandle);
|
|
assert(g_lpspiEdmaPrivateHandle);
|
|
|
|
uint32_t readData;
|
|
|
|
lpspi_master_edma_private_handle_t *lpspiEdmaPrivateHandle;
|
|
|
|
lpspiEdmaPrivateHandle = (lpspi_master_edma_private_handle_t *)g_lpspiEdmaPrivateHandle;
|
|
|
|
LPSPI_DisableDMA(lpspiEdmaPrivateHandle->base, kLPSPI_TxDmaEnable | kLPSPI_RxDmaEnable);
|
|
|
|
if (lpspiEdmaPrivateHandle->handle->isThereExtraRxBytes)
|
|
{
|
|
while (LPSPI_GetRxFifoCount(lpspiEdmaPrivateHandle->base) == 0)
|
|
{
|
|
}
|
|
readData = LPSPI_ReadData(lpspiEdmaPrivateHandle->base);
|
|
|
|
if (lpspiEdmaPrivateHandle->handle->rxData)
|
|
{
|
|
LPSPI_SeparateEdmaReadData(
|
|
&(lpspiEdmaPrivateHandle->handle->rxData[lpspiEdmaPrivateHandle->handle->rxRemainingByteCount -
|
|
lpspiEdmaPrivateHandle->handle->bytesLastRead]),
|
|
readData, lpspiEdmaPrivateHandle->handle->bytesLastRead, lpspiEdmaPrivateHandle->handle->isByteSwap);
|
|
}
|
|
}
|
|
|
|
lpspiEdmaPrivateHandle->handle->state = kLPSPI_Idle;
|
|
|
|
if (lpspiEdmaPrivateHandle->handle->callback)
|
|
{
|
|
lpspiEdmaPrivateHandle->handle->callback(lpspiEdmaPrivateHandle->base, lpspiEdmaPrivateHandle->handle,
|
|
kStatus_Success, lpspiEdmaPrivateHandle->handle->userData);
|
|
}
|
|
}
|
|
|
|
void LPSPI_MasterTransferAbortEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *handle)
|
|
{
|
|
assert(handle);
|
|
|
|
LPSPI_DisableDMA(base, kLPSPI_RxDmaEnable | kLPSPI_TxDmaEnable);
|
|
|
|
EDMA_AbortTransfer(handle->edmaRxRegToRxDataHandle);
|
|
EDMA_AbortTransfer(handle->edmaTxDataToTxRegHandle);
|
|
|
|
handle->state = kLPSPI_Idle;
|
|
}
|
|
|
|
status_t LPSPI_MasterTransferGetCountEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, size_t *count)
|
|
{
|
|
assert(handle);
|
|
|
|
if (!count)
|
|
{
|
|
return kStatus_InvalidArgument;
|
|
}
|
|
|
|
/* Catch when there is not an active transfer. */
|
|
if (handle->state != kLPSPI_Busy)
|
|
{
|
|
*count = 0;
|
|
return kStatus_NoTransferInProgress;
|
|
}
|
|
|
|
size_t remainingByte;
|
|
|
|
remainingByte =
|
|
(uint32_t)handle->nbytes * EDMA_GetRemainingMajorLoopCount(handle->edmaRxRegToRxDataHandle->base,
|
|
handle->edmaRxRegToRxDataHandle->channel);
|
|
|
|
*count = handle->totalByteCount - remainingByte;
|
|
|
|
return kStatus_Success;
|
|
}
|
|
|
|
void LPSPI_SlaveTransferCreateHandleEDMA(LPSPI_Type *base,
|
|
lpspi_slave_edma_handle_t *handle,
|
|
lpspi_slave_edma_transfer_callback_t callback,
|
|
void *userData,
|
|
edma_handle_t *edmaRxRegToRxDataHandle,
|
|
edma_handle_t *edmaTxDataToTxRegHandle)
|
|
{
|
|
assert(handle);
|
|
assert(edmaRxRegToRxDataHandle);
|
|
assert(edmaTxDataToTxRegHandle);
|
|
|
|
/* Zero the handle. */
|
|
memset(handle, 0, sizeof(*handle));
|
|
|
|
uint32_t instance = LPSPI_GetInstance(base);
|
|
|
|
s_lpspiSlaveEdmaPrivateHandle[instance].base = base;
|
|
s_lpspiSlaveEdmaPrivateHandle[instance].handle = handle;
|
|
|
|
handle->callback = callback;
|
|
handle->userData = userData;
|
|
|
|
handle->edmaRxRegToRxDataHandle = edmaRxRegToRxDataHandle;
|
|
handle->edmaTxDataToTxRegHandle = edmaTxDataToTxRegHandle;
|
|
}
|
|
|
|
status_t LPSPI_SlaveTransferEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle, lpspi_transfer_t *transfer)
|
|
{
|
|
assert(handle);
|
|
assert(transfer);
|
|
|
|
uint32_t bitsPerFrame = ((base->TCR & LPSPI_TCR_FRAMESZ_MASK) >> LPSPI_TCR_FRAMESZ_SHIFT) + 1;
|
|
uint32_t bytesPerFrame = (bitsPerFrame + 7) / 8;
|
|
uint32_t temp = 0U;
|
|
|
|
uint8_t dummyData = s_dummyData[LPSPI_GetInstance(base)];
|
|
|
|
if (!LPSPI_CheckTransferArgument(transfer, bitsPerFrame, bytesPerFrame))
|
|
{
|
|
return kStatus_InvalidArgument;
|
|
}
|
|
|
|
/*And since the dma transfer can not support 3 bytes .*/
|
|
if ((bytesPerFrame % 4U) == 3)
|
|
{
|
|
return kStatus_InvalidArgument;
|
|
}
|
|
|
|
/* Check that we're not busy.*/
|
|
if (handle->state == kLPSPI_Busy)
|
|
{
|
|
return kStatus_LPSPI_Busy;
|
|
}
|
|
|
|
handle->state = kLPSPI_Busy;
|
|
|
|
uint32_t rxAddr = LPSPI_GetRxRegisterAddress(base);
|
|
uint32_t txAddr = LPSPI_GetTxRegisterAddress(base);
|
|
|
|
edma_tcd_t *softwareTCD_extraBytes = (edma_tcd_t *)((uint32_t)(&handle->lpspiSoftwareTCD[1]) & (~0x1FU));
|
|
|
|
uint32_t whichPcs = (transfer->configFlags & LPSPI_MASTER_PCS_MASK) >> LPSPI_MASTER_PCS_SHIFT;
|
|
|
|
/*Because DMA is fast enough , so set the RX and TX watermarks to 0 .*/
|
|
uint8_t txWatermark = 0;
|
|
uint8_t rxWatermark = 0;
|
|
|
|
/*Used for byte swap*/
|
|
uint32_t dif = 0;
|
|
|
|
uint8_t bytesLastWrite = 0;
|
|
|
|
uint32_t instance = LPSPI_GetInstance(base);
|
|
|
|
edma_transfer_config_t transferConfigRx;
|
|
edma_transfer_config_t transferConfigTx;
|
|
|
|
bool isThereExtraTxBytes = false;
|
|
|
|
handle->txData = transfer->txData;
|
|
handle->rxData = transfer->rxData;
|
|
handle->txRemainingByteCount = transfer->dataSize;
|
|
handle->rxRemainingByteCount = transfer->dataSize;
|
|
handle->totalByteCount = transfer->dataSize;
|
|
|
|
handle->writeRegRemainingTimes = (transfer->dataSize / bytesPerFrame) * ((bytesPerFrame + 3) / 4);
|
|
handle->readRegRemainingTimes = handle->writeRegRemainingTimes;
|
|
|
|
handle->txBuffIfNull =
|
|
((uint32_t)dummyData) | ((uint32_t)dummyData << 8) | ((uint32_t)dummyData << 16) | ((uint32_t)dummyData << 24);
|
|
|
|
/*The TX and RX FIFO sizes are always the same*/
|
|
handle->fifoSize = LPSPI_GetRxFifoSize(base);
|
|
|
|
handle->isByteSwap = (bool)(transfer->configFlags & kLPSPI_MasterByteSwap);
|
|
|
|
LPSPI_SetFifoWatermarks(base, txWatermark, rxWatermark);
|
|
|
|
/*Transfers will stall when transmit FIFO is empty or receive FIFO is full. */
|
|
LPSPI_Enable(base, false);
|
|
base->CFGR1 &= (~LPSPI_CFGR1_NOSTALL_MASK);
|
|
/* Check if using 3-wire mode and the txData is NULL, set the output pin to tristated. */
|
|
temp = base->CFGR1;
|
|
temp &= LPSPI_CFGR1_PINCFG_MASK;
|
|
if ((temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdiInSdiOut)) || (temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdoInSdoOut)))
|
|
{
|
|
if (!handle->txData)
|
|
{
|
|
base->CFGR1 |= LPSPI_CFGR1_OUTCFG_MASK;
|
|
}
|
|
/* The 3-wire mode can't send and receive data at the same time. */
|
|
if ((handle->txData) && (handle->rxData))
|
|
{
|
|
return kStatus_InvalidArgument;
|
|
}
|
|
}
|
|
|
|
/*Flush FIFO , clear status , disable all the inerrupts.*/
|
|
LPSPI_FlushFifo(base, true, true);
|
|
LPSPI_ClearStatusFlags(base, kLPSPI_AllStatusFlag);
|
|
LPSPI_DisableInterrupts(base, kLPSPI_AllInterruptEnable);
|
|
|
|
/* For DMA transfer , we'd better not masked the transmit data and receive data in TCR since the transfer flow is
|
|
* hard to controlled by software.
|
|
*/
|
|
base->TCR = (base->TCR & ~(LPSPI_TCR_CONT_MASK | LPSPI_TCR_CONTC_MASK | LPSPI_TCR_BYSW_MASK)) |
|
|
LPSPI_TCR_CONTC(0U) | LPSPI_TCR_BYSW(handle->isByteSwap) | LPSPI_TCR_PCS(whichPcs);
|
|
|
|
isThereExtraTxBytes = false;
|
|
handle->isThereExtraRxBytes = false;
|
|
|
|
/*Calculate the bytes for write/read the TX/RX register each time*/
|
|
if (bytesPerFrame <= 4)
|
|
{
|
|
handle->bytesEachWrite = bytesPerFrame;
|
|
handle->bytesEachRead = bytesPerFrame;
|
|
|
|
handle->bytesLastRead = bytesPerFrame;
|
|
}
|
|
else
|
|
{
|
|
handle->bytesEachWrite = 4;
|
|
handle->bytesEachRead = 4;
|
|
|
|
handle->bytesLastRead = 4;
|
|
|
|
if ((transfer->dataSize % 4) != 0)
|
|
{
|
|
bytesLastWrite = transfer->dataSize % 4;
|
|
handle->bytesLastRead = bytesLastWrite;
|
|
|
|
isThereExtraTxBytes = true;
|
|
--handle->writeRegRemainingTimes;
|
|
|
|
handle->isThereExtraRxBytes = true;
|
|
--handle->readRegRemainingTimes;
|
|
}
|
|
}
|
|
|
|
LPSPI_DisableDMA(base, kLPSPI_RxDmaEnable | kLPSPI_TxDmaEnable);
|
|
|
|
EDMA_SetCallback(handle->edmaRxRegToRxDataHandle, EDMA_LpspiSlaveCallback,
|
|
&s_lpspiSlaveEdmaPrivateHandle[instance]);
|
|
|
|
/*Rx*/
|
|
if (handle->readRegRemainingTimes > 0)
|
|
{
|
|
EDMA_ResetChannel(handle->edmaRxRegToRxDataHandle->base, handle->edmaRxRegToRxDataHandle->channel);
|
|
|
|
if (handle->rxData)
|
|
{
|
|
transferConfigRx.destAddr = (uint32_t) & (handle->rxData[0]);
|
|
transferConfigRx.destOffset = 1;
|
|
}
|
|
else
|
|
{
|
|
transferConfigRx.destAddr = (uint32_t) & (handle->rxBuffIfNull);
|
|
transferConfigRx.destOffset = 0;
|
|
}
|
|
transferConfigRx.destTransferSize = kEDMA_TransferSize1Bytes;
|
|
|
|
dif = 0;
|
|
switch (handle->bytesEachRead)
|
|
{
|
|
case (1U):
|
|
transferConfigRx.srcTransferSize = kEDMA_TransferSize1Bytes;
|
|
transferConfigRx.minorLoopBytes = 1;
|
|
if (handle->isByteSwap)
|
|
{
|
|
dif = 3;
|
|
}
|
|
break;
|
|
|
|
case (2U):
|
|
transferConfigRx.srcTransferSize = kEDMA_TransferSize2Bytes;
|
|
transferConfigRx.minorLoopBytes = 2;
|
|
if (handle->isByteSwap)
|
|
{
|
|
dif = 2;
|
|
}
|
|
break;
|
|
|
|
case (4U):
|
|
transferConfigRx.srcTransferSize = kEDMA_TransferSize4Bytes;
|
|
transferConfigRx.minorLoopBytes = 4;
|
|
break;
|
|
|
|
default:
|
|
transferConfigRx.srcTransferSize = kEDMA_TransferSize1Bytes;
|
|
transferConfigRx.minorLoopBytes = 1;
|
|
assert(false);
|
|
break;
|
|
}
|
|
|
|
transferConfigRx.srcAddr = (uint32_t)rxAddr + dif;
|
|
transferConfigRx.srcOffset = 0;
|
|
|
|
transferConfigRx.majorLoopCounts = handle->readRegRemainingTimes;
|
|
|
|
/* Store the initially configured eDMA minor byte transfer count into the DSPI handle */
|
|
handle->nbytes = transferConfigRx.minorLoopBytes;
|
|
|
|
EDMA_SetTransferConfig(handle->edmaRxRegToRxDataHandle->base, handle->edmaRxRegToRxDataHandle->channel,
|
|
&transferConfigRx, NULL);
|
|
EDMA_EnableChannelInterrupts(handle->edmaRxRegToRxDataHandle->base, handle->edmaRxRegToRxDataHandle->channel,
|
|
kEDMA_MajorInterruptEnable);
|
|
}
|
|
|
|
/*Tx*/
|
|
EDMA_ResetChannel(handle->edmaTxDataToTxRegHandle->base, handle->edmaTxDataToTxRegHandle->channel);
|
|
|
|
if (isThereExtraTxBytes)
|
|
{
|
|
if (handle->txData)
|
|
{
|
|
transferConfigTx.srcAddr = (uint32_t) & (transfer->txData[transfer->dataSize - bytesLastWrite]);
|
|
transferConfigTx.srcOffset = 1;
|
|
}
|
|
else
|
|
{
|
|
transferConfigTx.srcAddr = (uint32_t)(&handle->txBuffIfNull);
|
|
transferConfigTx.srcOffset = 0;
|
|
}
|
|
|
|
transferConfigTx.destOffset = 0;
|
|
|
|
transferConfigTx.srcTransferSize = kEDMA_TransferSize1Bytes;
|
|
|
|
dif = 0;
|
|
switch (bytesLastWrite)
|
|
{
|
|
case (1U):
|
|
transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
|
|
transferConfigTx.minorLoopBytes = 1;
|
|
if (handle->isByteSwap)
|
|
{
|
|
dif = 3;
|
|
}
|
|
break;
|
|
|
|
case (2U):
|
|
transferConfigTx.destTransferSize = kEDMA_TransferSize2Bytes;
|
|
transferConfigTx.minorLoopBytes = 2;
|
|
if (handle->isByteSwap)
|
|
{
|
|
dif = 2;
|
|
}
|
|
break;
|
|
|
|
default:
|
|
transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
|
|
transferConfigTx.minorLoopBytes = 1;
|
|
assert(false);
|
|
break;
|
|
}
|
|
|
|
transferConfigTx.destAddr = (uint32_t)txAddr + dif;
|
|
transferConfigTx.majorLoopCounts = 1;
|
|
|
|
EDMA_TcdReset(softwareTCD_extraBytes);
|
|
|
|
EDMA_TcdSetTransferConfig(softwareTCD_extraBytes, &transferConfigTx, NULL);
|
|
}
|
|
|
|
if (handle->txData)
|
|
{
|
|
transferConfigTx.srcAddr = (uint32_t)(handle->txData);
|
|
transferConfigTx.srcOffset = 1;
|
|
}
|
|
else
|
|
{
|
|
transferConfigTx.srcAddr = (uint32_t)(&handle->txBuffIfNull);
|
|
transferConfigTx.srcOffset = 0;
|
|
}
|
|
|
|
transferConfigTx.destOffset = 0;
|
|
|
|
transferConfigTx.srcTransferSize = kEDMA_TransferSize1Bytes;
|
|
|
|
dif = 0;
|
|
switch (handle->bytesEachRead)
|
|
{
|
|
case (1U):
|
|
transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
|
|
transferConfigTx.minorLoopBytes = 1;
|
|
if (handle->isByteSwap)
|
|
{
|
|
dif = 3;
|
|
}
|
|
break;
|
|
|
|
case (2U):
|
|
transferConfigTx.destTransferSize = kEDMA_TransferSize2Bytes;
|
|
transferConfigTx.minorLoopBytes = 2;
|
|
|
|
if (handle->isByteSwap)
|
|
{
|
|
dif = 2;
|
|
}
|
|
break;
|
|
|
|
case (4U):
|
|
transferConfigTx.destTransferSize = kEDMA_TransferSize4Bytes;
|
|
transferConfigTx.minorLoopBytes = 4;
|
|
break;
|
|
|
|
default:
|
|
transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
|
|
transferConfigTx.minorLoopBytes = 1;
|
|
assert(false);
|
|
break;
|
|
}
|
|
|
|
transferConfigTx.destAddr = (uint32_t)txAddr + dif;
|
|
|
|
transferConfigTx.majorLoopCounts = handle->writeRegRemainingTimes;
|
|
|
|
if (isThereExtraTxBytes)
|
|
{
|
|
EDMA_SetTransferConfig(handle->edmaTxDataToTxRegHandle->base, handle->edmaTxDataToTxRegHandle->channel,
|
|
&transferConfigTx, softwareTCD_extraBytes);
|
|
}
|
|
else
|
|
{
|
|
EDMA_SetTransferConfig(handle->edmaTxDataToTxRegHandle->base, handle->edmaTxDataToTxRegHandle->channel,
|
|
&transferConfigTx, NULL);
|
|
}
|
|
|
|
EDMA_StartTransfer(handle->edmaTxDataToTxRegHandle);
|
|
EDMA_StartTransfer(handle->edmaRxRegToRxDataHandle);
|
|
|
|
LPSPI_EnableDMA(base, kLPSPI_RxDmaEnable | kLPSPI_TxDmaEnable);
|
|
LPSPI_Enable(base, true);
|
|
|
|
return kStatus_Success;
|
|
}
|
|
|
|
static void EDMA_LpspiSlaveCallback(edma_handle_t *edmaHandle,
|
|
void *g_lpspiEdmaPrivateHandle,
|
|
bool transferDone,
|
|
uint32_t tcds)
|
|
{
|
|
assert(edmaHandle);
|
|
assert(g_lpspiEdmaPrivateHandle);
|
|
|
|
uint32_t readData;
|
|
|
|
lpspi_slave_edma_private_handle_t *lpspiEdmaPrivateHandle;
|
|
|
|
lpspiEdmaPrivateHandle = (lpspi_slave_edma_private_handle_t *)g_lpspiEdmaPrivateHandle;
|
|
|
|
LPSPI_DisableDMA(lpspiEdmaPrivateHandle->base, kLPSPI_TxDmaEnable | kLPSPI_RxDmaEnable);
|
|
|
|
if (lpspiEdmaPrivateHandle->handle->isThereExtraRxBytes)
|
|
{
|
|
while (LPSPI_GetRxFifoCount(lpspiEdmaPrivateHandle->base) == 0)
|
|
{
|
|
}
|
|
readData = LPSPI_ReadData(lpspiEdmaPrivateHandle->base);
|
|
|
|
if (lpspiEdmaPrivateHandle->handle->rxData)
|
|
{
|
|
LPSPI_SeparateEdmaReadData(
|
|
&(lpspiEdmaPrivateHandle->handle->rxData[lpspiEdmaPrivateHandle->handle->rxRemainingByteCount -
|
|
lpspiEdmaPrivateHandle->handle->bytesLastRead]),
|
|
readData, lpspiEdmaPrivateHandle->handle->bytesLastRead, lpspiEdmaPrivateHandle->handle->isByteSwap);
|
|
}
|
|
}
|
|
|
|
lpspiEdmaPrivateHandle->handle->state = kLPSPI_Idle;
|
|
|
|
if (lpspiEdmaPrivateHandle->handle->callback)
|
|
{
|
|
lpspiEdmaPrivateHandle->handle->callback(lpspiEdmaPrivateHandle->base, lpspiEdmaPrivateHandle->handle,
|
|
kStatus_Success, lpspiEdmaPrivateHandle->handle->userData);
|
|
}
|
|
}
|
|
|
|
void LPSPI_SlaveTransferAbortEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle)
|
|
{
|
|
assert(handle);
|
|
|
|
LPSPI_DisableDMA(base, kLPSPI_RxDmaEnable | kLPSPI_TxDmaEnable);
|
|
|
|
EDMA_AbortTransfer(handle->edmaRxRegToRxDataHandle);
|
|
EDMA_AbortTransfer(handle->edmaTxDataToTxRegHandle);
|
|
|
|
handle->state = kLPSPI_Idle;
|
|
}
|
|
|
|
status_t LPSPI_SlaveTransferGetCountEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle, size_t *count)
|
|
{
|
|
assert(handle);
|
|
|
|
if (!count)
|
|
{
|
|
return kStatus_InvalidArgument;
|
|
}
|
|
|
|
/* Catch when there is not an active transfer. */
|
|
if (handle->state != kLPSPI_Busy)
|
|
{
|
|
*count = 0;
|
|
return kStatus_NoTransferInProgress;
|
|
}
|
|
|
|
size_t remainingByte;
|
|
|
|
remainingByte =
|
|
(uint32_t)handle->nbytes * EDMA_GetRemainingMajorLoopCount(handle->edmaRxRegToRxDataHandle->base,
|
|
handle->edmaRxRegToRxDataHandle->channel);
|
|
|
|
*count = handle->totalByteCount - remainingByte;
|
|
|
|
return kStatus_Success;
|
|
}
|