716 lines
20 KiB
C
716 lines
20 KiB
C
/**
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*
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* \file
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*
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* \brief SAM Advanced Encryption Standard driver.
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*
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* Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of Atmel may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* 4. This software may only be redistributed and used in connection with an
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* Atmel microcontroller product.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* \asf_license_stop
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*
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*/
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/*
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* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
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*/
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#ifndef AES_H_INCLUDED
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#define AES_H_INCLUDED
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* \defgroup asfdoc_sam0_drivers_aes_group SAM Advanced Encryption Standard (AES) Driver
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*
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* This driver for Atmel® | SMART ARM®-based microcontrollers provides an interface for the configuration
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* and management of the device's Advanced Encryption Standard functionality. The following
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* driver API modes are covered by this manual:
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*
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* - Polled APIs
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* - Callback APIs
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*
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* The Advanced Encryption Standard module supports all five confidentiality
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* modes of operation for symmetrical key block cipher algorithms (as specified
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* in the NIST Special Publication 800-38A Recommendation):
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* - Electronic Code Book (ECB)
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* - Cipher Block Chaining (CBC)
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* - Output Feedback (OFB)
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* - Cipher Feedback (CFB)
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* - Counter (CTR)
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*
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* The following peripheral is used by this module:
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* - AES (Advanced Encryption Standard)
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*
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* The following devices can use this module:
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* - Atmel | SMART SAM L21
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* - Atmel | SMART SAM L22
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*
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* The outline of this documentation is as follows:
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* - \ref asfdoc_sam0_drivers_aes_prerequisites
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* - \ref asfdoc_sam0_drivers_aes_module_overview
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* - \ref asfdoc_sam0_drivers_aes_special_considerations
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* - \ref asfdoc_sam0_drivers_aes_extra_info
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* - \ref asfdoc_sam0_drivers_aes_examples
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* - \ref asfdoc_sam0_drivers_aes_api_overview
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*
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*
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* \section asfdoc_sam0_drivers_aes_prerequisites Prerequisites
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*
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* There are no prerequisites for this module.
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*
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*
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* \section asfdoc_sam0_drivers_aes_module_overview Module Overview
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*
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* The Advanced Encryption Standard (AES) is a specification for the encryption of
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* electronic data established by the U.S. National Institute of Standards and
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* Technology (NIST) in 2001. It is compliant with the American FIPS
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* (Federal Information Processing Standard) Publication 197 specification.
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*
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* The AES supports all five confidentiality modes of operation for symmetrical
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* key block cipher algorithms (as specified in the NIST Special Publication
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* 800-38A Recommendation):
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* - Electronic Code Book (ECB)
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* - Cipher Block Chaining (CBC)
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* - Output Feedback (OFB)
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* - Cipher Feedback (CFB)
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* - Counter (CTR)
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*
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* Data transfers both to and from the AES module can occur using the peripheral
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* DMA controller channels, thus minimizing processor intervention for
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* large data buffer transfers.
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*
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* As soon as the initialization vector, the input data and the key are
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* configured, the encryption/decryption process may be started. Once the
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* process has completed the encrypted/decrypted data can be read out via
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* registers or through DMA channels.
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*
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* \subsection asfdoc_sam0_drivers_aes_module_overview_en_de Encryption and Decryption
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* The AES is capable of using cryptographic keys of 128/192/256 bits to
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* encrypt and decrypt data in blocks of 128 bits. In Cipher Feedback Mode (CFB),
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* five data sizes are possible (8, 16, 32, 64, or 128 bits).
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*
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* The input to the encryption processes of the CBC, CFB, and OFB modes includes,
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* in addition to the plaintext, a 128-bit data block called the Initialization
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* Vector (IV). The Initialization Vector is used in the initial step in the
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* encryption of a message and in the corresponding decryption of the message.
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*
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* There are three encryption/decryption start modes:
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* - Manual Mode: Start encryption/decryption manually
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* - Auto Start Mode: Once the correct number of input data registers is written,
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* processing is automatically started, DMA operation uses this mode
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* - Last Output Data Mode (LOD): This mode is used to generate message
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* authentication code (MAC) on data in CCM mode of operation
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*
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* \subsection asfdoc_sam0_drivers_aes_module_overview_hardware_countermeasures Hardware Countermeasures
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* The AES module features four types of hardware countermeasures that are
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* useful for protecting data against differential power analysis attacks:
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* - Type 1: Randomly add one cycle to data processing
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* - Type 2: Randomly add one cycle to data processing (other version)
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* - Type 3: Add a random number of clock cycles to data processing, subject to
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* a maximum of 11/13/15 clock cycles for key sizes of 128/192/256 bits
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* - Type 4: Add random spurious power consumption during data processing
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*
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* \subsection asfdoc_sam0_drivers_aes_module_overview_gcm Galois Counter Mode (GCM)
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* GCM is comprised of the AES engine in CTR mode along with a universal hash
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* function (GHASH engine) that is defined over a binary Galois field to produce
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* a message authentication tag. The GHASH engine processes data packets after the
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* AES operation. GCM provides assurance of the confidentiality of data through the
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* AES Counter mode of operation for DRAFT 920 encryption. Authenticity of the
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* confidential data is assured through the GHASH engine. Refer to the NIST Special
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* Publication 800-38D Recommendation for more complete information.
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*
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* \section asfdoc_sam0_drivers_aes_special_considerations Special Considerations
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*
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* There are no special considerations for this module.
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*
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* \section asfdoc_sam0_drivers_aes_extra_info Extra Information
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*
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* For extra information, see \ref asfdoc_sam0_drivers_aes_extra. This includes:
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* - \ref asfdoc_sam0_drivers_aes_extra_acronyms
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* - \ref asfdoc_sam0_drivers_aes_extra_dependencies
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* - \ref asfdoc_sam0_drivers_aes_extra_errata
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* - \ref asfdoc_sam0_drivers_aes_extra_history
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*
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* \section asfdoc_sam0_drivers_aes_examples Examples
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*
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* For a list of examples related to this driver, see
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* \ref asfdoc_sam0_drivers_aes_exqsg.
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*
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*
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* \section asfdoc_sam0_drivers_aes_api_overview API Overview
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* @{
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*/
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#include <compiler.h>
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#include <system.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** AES processing mode. */
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enum aes_encrypt_mode {
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AES_DECRYPTION = 0, /**< Decryption of data will be performed */
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AES_ENCRYPTION, /**< Encryption of data will be performed */
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};
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/** AES cryptographic key size. */
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enum aes_key_size {
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AES_KEY_SIZE_128 = 0, /**< AES key size is 128-bit */
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AES_KEY_SIZE_192, /**< AES key size is 192-bit */
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AES_KEY_SIZE_256, /**< AES key size is 256-bit */
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};
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/** AES start mode. */
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enum aes_start_mode {
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AES_MANUAL_START = 0, /**< Manual start mode */
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AES_AUTO_START, /**< Auto start mode */
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};
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/** AES operation mode. */
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enum aes_operation_mode {
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AES_ECB_MODE = 0, /**< Electronic Codebook (ECB) */
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AES_CBC_MODE, /**< Cipher Block Chaining (CBC) */
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AES_OFB_MODE, /**< Output Feedback (OFB) */
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AES_CFB_MODE, /**< Cipher Feedback (CFB) */
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AES_CTR_MODE, /**< Counter (CTR) */
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AES_CCM_MODE, /**< Counter (CCM) */
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AES_GCM_MODE, /**< Galois Counter Mode (GCM) */
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};
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/** AES Cipher FeedBack (CFB) size. */
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enum aes_cfb_size {
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AES_CFB_SIZE_128 = 0, /**< Cipher feedback data size is 128-bit */
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AES_CFB_SIZE_64, /**< Cipher feedback data size is 64-bit */
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AES_CFB_SIZE_32, /**< Cipher feedback data size is 32-bit */
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AES_CFB_SIZE_16, /**< Cipher feedback data size is 16-bit */
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AES_CFB_SIZE_8, /**< Cipher feedback data size is 8-bit */
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};
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/** AES countermeasure type */
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enum aes_countermeature_type {
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AES_COUNTERMEASURE_TYPE_disabled = 0x0, /**< Countermeasure type all disabled */
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AES_COUNTERMEASURE_TYPE_1 = 0x01, /**< Countermeasure1 enabled */
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AES_COUNTERMEASURE_TYPE_2 = 0x02, /**< Countermeasure2 enabled */
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AES_COUNTERMEASURE_TYPE_3 = 0x04, /**< Countermeasure3 enabled */
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AES_COUNTERMEASURE_TYPE_4 = 0x08, /**< Countermeasure4 enabled */
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AES_COUNTERMEASURE_TYPE_ALL = 0x0F, /**< Countermeasure type all enabled */
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};
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/**
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* \name Module Status Flags
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*
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* AES status flags, returned by \ref aes_get_status() and cleared by
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* \ref aes_clear_status().
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*
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* @{
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*/
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/** AES encryption complete.
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*/
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#define AES_ENCRYPTION_COMPLETE (1UL << 0)
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/** AES GF multiplication complete.
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*/
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#define AES_GF_MULTI_COMPLETE (1UL << 1)
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/** @} */
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/** AES Configuration structure. */
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struct aes_config {
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/** AES data mode (decryption or encryption) */
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enum aes_encrypt_mode encrypt_mode;
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/** AES key size */
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enum aes_key_size key_size;
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/** Start mode */
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enum aes_start_mode start_mode;
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/** AES cipher operation mode*/
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enum aes_operation_mode opmode;
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/** Cipher feedback data size */
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enum aes_cfb_size cfb_size;
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/** Countermeasure type */
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enum aes_countermeature_type ctype;
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/** Enable XOR key */
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bool enable_xor_key;
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/** Enable key generation */
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bool enable_key_gen;
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/** Last output data mode enable/disable */
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bool lod;
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};
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#if !defined(__DOXYGEN__)
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/**
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* \brief Device structure.
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*/
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struct aes_module {
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/** AES hardware module. */
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Aes *hw;
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/** AES cipher operation mode.*/
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enum aes_operation_mode opmode;
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/** AES key size. */
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enum aes_key_size key_size;
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/** Cipher feedback data size. */
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enum aes_cfb_size cfb_size;
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};
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#endif
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/**
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* \name Configuration and Initialization
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* @{
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*/
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void aes_get_config_defaults(struct aes_config *const config);
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void aes_set_config(struct aes_module *const module,
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Aes *const hw,
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struct aes_config *const config);
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void aes_init(struct aes_module *const module,
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Aes *const hw,
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struct aes_config *const config);
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/** @} */
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/**
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* \name Start, Enable, and Write
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* @{
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*/
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/**
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* \brief Start a manual encryption/decryption process.
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*
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* \param[in] module Pointer to the AES software instance struct
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*/
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static inline void aes_start(struct aes_module *const module)
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{
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Assert(module);
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Assert(module->hw);
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module->hw->CTRLB.reg |= AES_CTRLB_START;
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}
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/**
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* \brief Notifies the module that the next input data block
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* is the beginning of a new message.
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*
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* \param[in] module Pointer to the AES software instance struct
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*
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*/
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static inline void aes_set_new_message(struct aes_module *const module)
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{
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Assert(module);
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Assert(module->hw);
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module->hw->CTRLB.reg |= AES_CTRLB_NEWMSG;
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}
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/**
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* \brief Clear the indication of the beginning for a new message
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*
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* \param[in] module Pointer to the AES software instance struct
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*
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*/
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static inline void aes_clear_new_message(struct aes_module *const module)
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{
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Assert(module);
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Assert(module->hw);
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module->hw->CTRLB.reg &= ~AES_CTRLB_NEWMSG;
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}
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void aes_enable(struct aes_module *const module);
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void aes_disable(struct aes_module *const module);
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void aes_write_key(struct aes_module *const module, const uint32_t *key);
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void aes_write_init_vector(struct aes_module *const module, const uint32_t *vector);
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void aes_write_input_data(struct aes_module *const module,
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const uint32_t *p_input_data_buffer);
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void aes_read_output_data(struct aes_module *const module,
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uint32_t *p_output_data_buffer);
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/**
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* \brief Write AES random seed.
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*
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* \param[in] module Pointer to the AES software instance struct
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* \param[in] seed Seed for the random number generator
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*/
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static inline void aes_write_random_seed(struct aes_module *const module,
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uint32_t seed)
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{
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Assert(module);
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Assert(module->hw);
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module->hw->RANDSEED.reg = seed;
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}
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/** @} */
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/**
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* \name Status Management
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* @{
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*/
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/**
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* \brief Retrieves the current module status.
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*
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* Retrieves the status of the module, giving overall state information.
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*
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* \param[in] module Pointer to the AES software instance struct
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*
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* \retval AES_ENCRYPTION_COMPLETE AES encryption complete
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* \retval AES_GF_MULTI_COMPLETE AES GF multiplication complete
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*/
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static inline uint32_t aes_get_status(struct aes_module *const module)
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{
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/* Sanity check arguments */
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Assert(module);
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Assert(module->hw);
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uint32_t int_flags = module->hw->INTFLAG.reg;
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uint32_t status_flags = 0;
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if (int_flags & AES_INTFLAG_ENCCMP) {
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status_flags |= AES_ENCRYPTION_COMPLETE;
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}
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if (int_flags & AES_INTFLAG_GFMCMP) {
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status_flags |= AES_GF_MULTI_COMPLETE;
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}
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return status_flags;
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}
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/**
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* \brief Clears a module status flag.
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*
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* Clears the given status flag of the module.
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*
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* \param[in] module Pointer to the AES software instance struct
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* \param[in] status_flags Bitmask flags to clear
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*/
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static inline void aes_clear_status(
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struct aes_module *const module,
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const uint32_t status_flags)
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{
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/* Sanity check arguments */
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Assert(module);
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Assert(module->hw);
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uint32_t int_flags = 0;
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if (status_flags & AES_ENCRYPTION_COMPLETE) {
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int_flags |= AES_INTENCLR_ENCCMP;
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}
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if (status_flags & AES_GF_MULTI_COMPLETE) {
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int_flags |= AES_INTENCLR_GFMCMP;
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}
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/* Clear interrupt flag */
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module->hw->INTFLAG.reg = int_flags;
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}
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/** @} */
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/**
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* \name Galois Counter Mode
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* @{
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*/
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/**
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* \brief Get the AES GCM Hash Value.
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*
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* \param[in] module Pointer to the AES software instance struct
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* \param[in] id Index into the GHASH array (range 0 to 3)
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*
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* \return The content of the GHASHRx[x = 0...3] value.
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*/
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static inline uint32_t aes_gcm_read_ghash(struct aes_module *const module, uint32_t id)
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{
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Assert(module);
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Assert(module->hw);
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return module->hw->GHASH[id].reg;
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}
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/**
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* \brief Set the AES GCM Hash Value.
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*
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* \param[in] module Pointer to the AES software instance struct
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* \param[in] id Index into the GHASHx array (range 0 to 3)
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* \param[in] ghash GCM hash value
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*/
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static inline void aes_gcm_write_ghash(struct aes_module *const module,
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uint32_t id,uint32_t ghash)
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{
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Assert(module);
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Assert(module->hw);
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module->hw->GHASH[id].reg = ghash;
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}
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/**
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* \brief Get AES GCM Hash key.
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*
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* \param[in] module Pointer to the AES software instance struct
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* \param[in] id Index into the Hash key array (range 0 to 3)
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*
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* \return The contents of the HASHKEYx[x = 0...3] specified.
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*/
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static inline uint32_t aes_gcm_read_hash_key(struct aes_module *const module,
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uint32_t id)
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{
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Assert(module);
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Assert(module->hw);
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return module->hw->HASHKEY[id].reg;
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}
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/**
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* \brief Set the AES GCM Hash key.
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*
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* \param[in] module Pointer to the AES software instance struct
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* \param[in] id Index into the Hash key array (range 0 to 3)
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* \param[in] key GCM Hash key
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*/
|
|
static inline void aes_gcm_write_hash_key(struct aes_module *const module,
|
|
uint32_t id, uint32_t key)
|
|
{
|
|
Assert(module);
|
|
Assert(module->hw);
|
|
|
|
module->hw->HASHKEY[id].reg = key;
|
|
}
|
|
|
|
/**
|
|
* \brief Get the AES GCM cipher length.
|
|
*
|
|
* \param[in] module Pointer to the AES software instance struct
|
|
*
|
|
* \return The contents of the HASHKEYx[x = 0...3] specified.
|
|
*/
|
|
static inline uint32_t aes_gcm_read_cipher_len(struct aes_module *const module)
|
|
{
|
|
Assert(module);
|
|
Assert(module->hw);
|
|
|
|
return (module->hw->CIPLEN.reg);
|
|
}
|
|
|
|
/**
|
|
* \brief Set the AES GCM cipher length.
|
|
*
|
|
* \param[in] module Pointer to the AES software instance struct
|
|
* \param[in] len Cipher length
|
|
*/
|
|
static inline void aes_gcm_write_cipher_len(struct aes_module *const module,
|
|
uint32_t len)
|
|
{
|
|
Assert(module);
|
|
Assert(module->hw);
|
|
|
|
module->hw->CIPLEN.reg = len;
|
|
}
|
|
|
|
/**
|
|
* \brief Set GCM end of input message status.
|
|
*
|
|
* \param[in] module Pointer to the AES software instance struct
|
|
*/
|
|
static inline void aes_gcm_set_end_message_status(struct aes_module *const module)
|
|
{
|
|
Assert(module);
|
|
Assert(module->hw);
|
|
|
|
module->hw->CTRLB.reg |= AES_CTRLB_EOM;
|
|
}
|
|
|
|
/**
|
|
* \brief Clear GCM end of input message status.
|
|
*
|
|
* \param[in] module Pointer to the AES software instance struct
|
|
*/
|
|
static inline void aes_gcm_clear_end_message_status(struct aes_module *const module)
|
|
{
|
|
Assert(module);
|
|
Assert(module->hw);
|
|
|
|
module->hw->CTRLB.reg &= ~AES_CTRLB_EOM;
|
|
}
|
|
|
|
/**
|
|
* \brief Set GF multiplication of GCM mode.
|
|
*
|
|
* \param[in] module Pointer to the AES software instance struct
|
|
*/
|
|
static inline void aes_gcm_set_gf_multiplication(struct aes_module *const module)
|
|
{
|
|
Assert(module);
|
|
Assert(module->hw);
|
|
|
|
module->hw->CTRLB.reg |= AES_CTRLB_GFMUL;
|
|
}
|
|
|
|
/** @} */
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
/** @} */
|
|
|
|
/**
|
|
* \page asfdoc_sam0_drivers_aes_extra Extra Information for Advanced Encryption Standard
|
|
*
|
|
* \section asfdoc_sam0_drivers_aes_extra_acronyms Acronyms
|
|
* Below is a table listing the acronyms used in this module, along with their
|
|
* intended meanings.
|
|
*
|
|
* <table>
|
|
* <tr>
|
|
* <th>Acronym</th>
|
|
* <th>Definition</th>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>AAD</td>
|
|
* <td>Additional Authenticated Data</td>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>CBC</td>
|
|
* <td>Cipher Block Chaining</td>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>CFB</td>
|
|
* <td>Cipher Feedback</td>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>CTR</td>
|
|
* <td> Counter</td>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>DMA</td>
|
|
* <td>Direct Memory Access</td>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>DMAC</td>
|
|
* <td>DMA Controller</td>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>ECB</td>
|
|
* <td>Electronic Codebook</td>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>GCM</td>
|
|
* <td>Galois Counter Mode</td>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>OFB</td>
|
|
* <td>Output Feedback</td>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>QSG</td>
|
|
* <td>Quick Start Guide</td>
|
|
* </tr>
|
|
* </table>
|
|
*
|
|
*
|
|
* \section asfdoc_sam0_drivers_aes_extra_dependencies Dependencies
|
|
* This driver has the following dependencies:
|
|
*
|
|
* - None
|
|
*
|
|
*
|
|
* \section asfdoc_sam0_drivers_aes_extra_errata Errata
|
|
* There are no errata related to this driver.
|
|
*
|
|
*
|
|
* \section asfdoc_sam0_drivers_aes_extra_history Module History
|
|
* An overview of the module history is presented in the table below, with
|
|
* details on the enhancements and fixes made to the module since its first
|
|
* release. The current version of this corresponds to the newest version in
|
|
* the table.
|
|
*
|
|
* <table>
|
|
* <tr>
|
|
* <th>Changelog</th>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>Initial release</td>
|
|
* </tr>
|
|
* </table>
|
|
*/
|
|
|
|
/**
|
|
* \page asfdoc_sam0_drivers_aes_exqsg Examples for Advanced Encryption Standard
|
|
*
|
|
* This is a list of the available Quick Start Guides (QSGs) and example
|
|
* applications for \ref asfdoc_sam0_drivers_aes_group. QSGs are simple examples with
|
|
* step-by-step instructions to configure and use this driver in a selection of
|
|
* use cases. Note that a QSG can be compiled as a standalone application or be
|
|
* added to the user application.
|
|
*
|
|
* - \subpage asfdoc_sam0_aes_basic_use_case
|
|
* - \subpage asfdoc_sam0_aes_callback_use_case
|
|
* - \subpage asfdoc_sam0_aes_dma_use_case
|
|
*
|
|
* \page asfdoc_sam0_drivers_aes_document_revision_history Document Revision History
|
|
*
|
|
* <table>
|
|
* <tr>
|
|
* <th>Doc. Rev.</td>
|
|
* <th>Date</td>
|
|
* <th>Comments</td>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>42445B</td>
|
|
* <td>12/2015</td>
|
|
* <td>Added support for SAM L22</td>
|
|
* </tr>
|
|
* <tr>
|
|
* <td>42445A</td>
|
|
* <td>06/2015</td>
|
|
* <td>Initial release</td>
|
|
* </tr>
|
|
* </table>
|
|
*
|
|
*/
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* AES_H_INCLUDED */
|