371 lines
12 KiB
C
371 lines
12 KiB
C
/*
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* Copyright (c) 2016, Freescale Semiconductor, Inc.
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* Copyright 2016-2017 NXP
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _FSL_LPTMR_H_
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#define _FSL_LPTMR_H_
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#include "fsl_common.h"
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/*!
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* @addtogroup lptmr
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* @{
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*/
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*! @name Driver version */
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/*@{*/
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#define FSL_LPTMR_DRIVER_VERSION (MAKE_VERSION(2, 0, 1)) /*!< Version 2.0.1 */
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/*@}*/
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/*! @brief LPTMR pin selection used in pulse counter mode.*/
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typedef enum _lptmr_pin_select
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{
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kLPTMR_PinSelectInput_0 = 0x0U, /*!< Pulse counter input 0 is selected */
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kLPTMR_PinSelectInput_1 = 0x1U, /*!< Pulse counter input 1 is selected */
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kLPTMR_PinSelectInput_2 = 0x2U, /*!< Pulse counter input 2 is selected */
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kLPTMR_PinSelectInput_3 = 0x3U /*!< Pulse counter input 3 is selected */
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} lptmr_pin_select_t;
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/*! @brief LPTMR pin polarity used in pulse counter mode.*/
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typedef enum _lptmr_pin_polarity
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{
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kLPTMR_PinPolarityActiveHigh = 0x0U, /*!< Pulse Counter input source is active-high */
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kLPTMR_PinPolarityActiveLow = 0x1U /*!< Pulse Counter input source is active-low */
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} lptmr_pin_polarity_t;
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/*! @brief LPTMR timer mode selection.*/
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typedef enum _lptmr_timer_mode
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{
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kLPTMR_TimerModeTimeCounter = 0x0U, /*!< Time Counter mode */
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kLPTMR_TimerModePulseCounter = 0x1U /*!< Pulse Counter mode */
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} lptmr_timer_mode_t;
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/*! @brief LPTMR prescaler/glitch filter values*/
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typedef enum _lptmr_prescaler_glitch_value
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{
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kLPTMR_Prescale_Glitch_0 = 0x0U, /*!< Prescaler divide 2, glitch filter does not support this setting */
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kLPTMR_Prescale_Glitch_1 = 0x1U, /*!< Prescaler divide 4, glitch filter 2 */
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kLPTMR_Prescale_Glitch_2 = 0x2U, /*!< Prescaler divide 8, glitch filter 4 */
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kLPTMR_Prescale_Glitch_3 = 0x3U, /*!< Prescaler divide 16, glitch filter 8 */
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kLPTMR_Prescale_Glitch_4 = 0x4U, /*!< Prescaler divide 32, glitch filter 16 */
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kLPTMR_Prescale_Glitch_5 = 0x5U, /*!< Prescaler divide 64, glitch filter 32 */
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kLPTMR_Prescale_Glitch_6 = 0x6U, /*!< Prescaler divide 128, glitch filter 64 */
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kLPTMR_Prescale_Glitch_7 = 0x7U, /*!< Prescaler divide 256, glitch filter 128 */
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kLPTMR_Prescale_Glitch_8 = 0x8U, /*!< Prescaler divide 512, glitch filter 256 */
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kLPTMR_Prescale_Glitch_9 = 0x9U, /*!< Prescaler divide 1024, glitch filter 512*/
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kLPTMR_Prescale_Glitch_10 = 0xAU, /*!< Prescaler divide 2048 glitch filter 1024 */
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kLPTMR_Prescale_Glitch_11 = 0xBU, /*!< Prescaler divide 4096, glitch filter 2048 */
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kLPTMR_Prescale_Glitch_12 = 0xCU, /*!< Prescaler divide 8192, glitch filter 4096 */
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kLPTMR_Prescale_Glitch_13 = 0xDU, /*!< Prescaler divide 16384, glitch filter 8192 */
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kLPTMR_Prescale_Glitch_14 = 0xEU, /*!< Prescaler divide 32768, glitch filter 16384 */
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kLPTMR_Prescale_Glitch_15 = 0xFU /*!< Prescaler divide 65536, glitch filter 32768 */
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} lptmr_prescaler_glitch_value_t;
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/*!
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* @brief LPTMR prescaler/glitch filter clock select.
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* @note Clock connections are SoC-specific
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*/
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typedef enum _lptmr_prescaler_clock_select
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{
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kLPTMR_PrescalerClock_0 = 0x0U, /*!< Prescaler/glitch filter clock 0 selected. */
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kLPTMR_PrescalerClock_1 = 0x1U, /*!< Prescaler/glitch filter clock 1 selected. */
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kLPTMR_PrescalerClock_2 = 0x2U, /*!< Prescaler/glitch filter clock 2 selected. */
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kLPTMR_PrescalerClock_3 = 0x3U, /*!< Prescaler/glitch filter clock 3 selected. */
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} lptmr_prescaler_clock_select_t;
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/*! @brief List of the LPTMR interrupts */
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typedef enum _lptmr_interrupt_enable
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{
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kLPTMR_TimerInterruptEnable = LPTMR_CSR_TIE_MASK, /*!< Timer interrupt enable */
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} lptmr_interrupt_enable_t;
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/*! @brief List of the LPTMR status flags */
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typedef enum _lptmr_status_flags
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{
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kLPTMR_TimerCompareFlag = LPTMR_CSR_TCF_MASK, /*!< Timer compare flag */
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} lptmr_status_flags_t;
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/*!
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* @brief LPTMR config structure
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*
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* This structure holds the configuration settings for the LPTMR peripheral. To initialize this
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* structure to reasonable defaults, call the LPTMR_GetDefaultConfig() function and pass a
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* pointer to your configuration structure instance.
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*
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* The configuration struct can be made constant so it resides in flash.
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*/
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typedef struct _lptmr_config
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{
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lptmr_timer_mode_t timerMode; /*!< Time counter mode or pulse counter mode */
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lptmr_pin_select_t pinSelect; /*!< LPTMR pulse input pin select; used only in pulse counter mode */
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lptmr_pin_polarity_t pinPolarity; /*!< LPTMR pulse input pin polarity; used only in pulse counter mode */
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bool enableFreeRunning; /*!< True: enable free running, counter is reset on overflow
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False: counter is reset when the compare flag is set */
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bool bypassPrescaler; /*!< True: bypass prescaler; false: use clock from prescaler */
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lptmr_prescaler_clock_select_t prescalerClockSource; /*!< LPTMR clock source */
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lptmr_prescaler_glitch_value_t value; /*!< Prescaler or glitch filter value */
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} lptmr_config_t;
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/*******************************************************************************
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* API
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******************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/*!
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* @name Initialization and deinitialization
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* @{
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*/
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/*!
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* @brief Ungates the LPTMR clock and configures the peripheral for a basic operation.
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*
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* @note This API should be called at the beginning of the application using the LPTMR driver.
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*
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* @param base LPTMR peripheral base address
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* @param config A pointer to the LPTMR configuration structure.
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*/
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void LPTMR_Init(LPTMR_Type *base, const lptmr_config_t *config);
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/*!
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* @brief Gates the LPTMR clock.
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*
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* @param base LPTMR peripheral base address
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*/
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void LPTMR_Deinit(LPTMR_Type *base);
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/*!
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* @brief Fills in the LPTMR configuration structure with default settings.
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*
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* The default values are as follows.
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* @code
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* config->timerMode = kLPTMR_TimerModeTimeCounter;
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* config->pinSelect = kLPTMR_PinSelectInput_0;
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* config->pinPolarity = kLPTMR_PinPolarityActiveHigh;
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* config->enableFreeRunning = false;
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* config->bypassPrescaler = true;
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* config->prescalerClockSource = kLPTMR_PrescalerClock_1;
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* config->value = kLPTMR_Prescale_Glitch_0;
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* @endcode
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* @param config A pointer to the LPTMR configuration structure.
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*/
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void LPTMR_GetDefaultConfig(lptmr_config_t *config);
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/*! @}*/
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/*!
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* @name Interrupt Interface
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* @{
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*/
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/*!
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* @brief Enables the selected LPTMR interrupts.
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*
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* @param base LPTMR peripheral base address
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* @param mask The interrupts to enable. This is a logical OR of members of the
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* enumeration ::lptmr_interrupt_enable_t
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*/
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static inline void LPTMR_EnableInterrupts(LPTMR_Type *base, uint32_t mask)
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{
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uint32_t reg = base->CSR;
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/* Clear the TCF bit so that we don't clear this w1c bit when writing back */
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reg &= ~(LPTMR_CSR_TCF_MASK);
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reg |= mask;
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base->CSR = reg;
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}
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/*!
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* @brief Disables the selected LPTMR interrupts.
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*
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* @param base LPTMR peripheral base address
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* @param mask The interrupts to disable. This is a logical OR of members of the
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* enumeration ::lptmr_interrupt_enable_t.
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*/
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static inline void LPTMR_DisableInterrupts(LPTMR_Type *base, uint32_t mask)
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{
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uint32_t reg = base->CSR;
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/* Clear the TCF bit so that we don't clear this w1c bit when writing back */
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reg &= ~(LPTMR_CSR_TCF_MASK);
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reg &= ~mask;
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base->CSR = reg;
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}
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/*!
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* @brief Gets the enabled LPTMR interrupts.
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*
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* @param base LPTMR peripheral base address
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*
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* @return The enabled interrupts. This is the logical OR of members of the
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* enumeration ::lptmr_interrupt_enable_t
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*/
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static inline uint32_t LPTMR_GetEnabledInterrupts(LPTMR_Type *base)
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{
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return (base->CSR & LPTMR_CSR_TIE_MASK);
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}
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/*! @}*/
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/*!
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* @name Status Interface
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* @{
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*/
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/*!
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* @brief Gets the LPTMR status flags.
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*
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* @param base LPTMR peripheral base address
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*
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* @return The status flags. This is the logical OR of members of the
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* enumeration ::lptmr_status_flags_t
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*/
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static inline uint32_t LPTMR_GetStatusFlags(LPTMR_Type *base)
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{
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return (base->CSR & LPTMR_CSR_TCF_MASK);
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}
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/*!
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* @brief Clears the LPTMR status flags.
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*
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* @param base LPTMR peripheral base address
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* @param mask The status flags to clear. This is a logical OR of members of the
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* enumeration ::lptmr_status_flags_t.
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*/
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static inline void LPTMR_ClearStatusFlags(LPTMR_Type *base, uint32_t mask)
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{
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base->CSR |= mask;
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}
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/*! @}*/
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/*!
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* @name Read and write the timer period
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* @{
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*/
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/*!
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* @brief Sets the timer period in units of count.
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*
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* Timers counts from 0 until it equals the count value set here. The count value is written to
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* the CMR register.
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*
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* @note
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* 1. The TCF flag is set with the CNR equals the count provided here and then increments.
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* 2. Call the utility macros provided in the fsl_common.h to convert to ticks.
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*
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* @param base LPTMR peripheral base address
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* @param ticks A timer period in units of ticks, which should be equal or greater than 1.
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*/
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static inline void LPTMR_SetTimerPeriod(LPTMR_Type *base, uint32_t ticks)
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{
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assert(ticks > 0);
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base->CMR = ticks - 1;
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}
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/*!
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* @brief Reads the current timer counting value.
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*
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* This function returns the real-time timer counting value in a range from 0 to a
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* timer period.
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*
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* @note Call the utility macros provided in the fsl_common.h to convert ticks to usec or msec.
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*
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* @param base LPTMR peripheral base address
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*
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* @return The current counter value in ticks
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*/
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static inline uint32_t LPTMR_GetCurrentTimerCount(LPTMR_Type *base)
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{
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/* Must first write any value to the CNR. This synchronizes and registers the current value
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* of the CNR into a temporary register which can then be read
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*/
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base->CNR = 0U;
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return (uint32_t)((base->CNR & LPTMR_CNR_COUNTER_MASK) >> LPTMR_CNR_COUNTER_SHIFT);
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}
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/*! @}*/
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/*!
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* @name Timer Start and Stop
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* @{
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*/
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/*!
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* @brief Starts the timer.
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*
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* After calling this function, the timer counts up to the CMR register value.
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* Each time the timer reaches the CMR value and then increments, it generates a
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* trigger pulse and sets the timeout interrupt flag. An interrupt is also
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* triggered if the timer interrupt is enabled.
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*
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* @param base LPTMR peripheral base address
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*/
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static inline void LPTMR_StartTimer(LPTMR_Type *base)
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{
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uint32_t reg = base->CSR;
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/* Clear the TCF bit to avoid clearing the w1c bit when writing back. */
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reg &= ~(LPTMR_CSR_TCF_MASK);
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reg |= LPTMR_CSR_TEN_MASK;
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base->CSR = reg;
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}
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/*!
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* @brief Stops the timer.
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*
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* This function stops the timer and resets the timer's counter register.
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*
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* @param base LPTMR peripheral base address
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*/
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static inline void LPTMR_StopTimer(LPTMR_Type *base)
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{
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uint32_t reg = base->CSR;
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/* Clear the TCF bit to avoid clearing the w1c bit when writing back. */
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reg &= ~(LPTMR_CSR_TCF_MASK);
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reg &= ~LPTMR_CSR_TEN_MASK;
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base->CSR = reg;
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}
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/*! @}*/
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#if defined(__cplusplus)
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}
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#endif
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/*! @}*/
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#endif /* _FSL_LPTMR_H_ */
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