98 lines
4.0 KiB
C
98 lines
4.0 KiB
C
/*
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* File : interrupt.h
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Change Logs:
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* Date Author Notes
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* 2015-04-14 ArdaFu first version
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*/
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#ifndef __INTERRUPT_H__
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#define __INTERRUPT_H__
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#define INT_IRQ 0x00
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#define INT_FIQ 0x01
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// IRQ Source
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#define INT_ARM_COMMRX 0
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#define INT_ARM_COMMTX 1
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#define INT_RTC 2
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#define INT_GPIO0 3
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#define INT_GPIO1 4
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#define INT_GPIO2 5
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#define INT_GPIO3 6
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#define INT_GPIO4_IIS1 7
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#define INT_USB0 8
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#define INT_USB1 9
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#define INT_USB0_DMA 10
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#define INT_USB1_DMA 11
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#define INT_MAC 12
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#define INT_MAC_PMT 13
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#define INT_NAND 14
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#define INT_UART0 15
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#define INT_UART1 16
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#define INT_UART2 17
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#define INT_UART3 18
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#define INT_UART4 19
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#define INT_UART5 20
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#define INT_UART6 21
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#define INT_UART7 22
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#define INT_UART8 23
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#define INT_UART9 24
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#define INT_I2S0 25
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#define INT_I2C0 26
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#define INT_I2C1 27
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#define INT_CAMIF 28
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#define INT_TIMER0 29
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#define INT_TIMER1 30
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#define INT_TIMER2 31
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#define INT_TIMER3 32
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#define INT_ADC0 33
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#define INT_DAC0 34
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#define INT_USB0_RESUME_HOSTDISCONNECT 35
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#define INT_USB0_VBUSVALID 36
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#define INT_USB1_RESUME_HOSTDISCONNECT 37
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#define INT_USB1_VBUSVALID 38
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#define INT_DMA0_CH0 39
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#define INT_DMA0_CH1 40
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#define INT_DMA0_CH2 41
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#define INT_DMA0_CH3 42
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#define INT_DMA0_CH4 43
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#define INT_DMA0_CH5 44
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#define INT_DMA0_CH6 45
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#define INT_DMA0_CH7 46
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#define INT_DMA1_CH0 47
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#define INT_DMA1_CH1 48
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#define INT_DMA1_CH2 49
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#define INT_DMA1_CH3 50
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#define INT_DMA1_CH4 51
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#define INT_DMA1_CH5 52
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#define INT_DMA1_CH6 53
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#define INT_DMA1_CH7 54
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#define INT_WATCHDOG 55
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#define INT_CAN0 56
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#define INT_CAN1 57
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#define INT_QEI 58
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#define INT_MCPWM 59
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#define INT_SPI0 60
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#define INT_SPI1 61
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#define INT_QUADSPI0 62
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#define INT_SSP0 63
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#endif
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