237 lines
11 KiB
C
237 lines
11 KiB
C
/***************************************************************************//**
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* @file
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* @brief Memory protection unit (MPU) peripheral API for EFM32.
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* @author Energy Micro AS
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* @version 2.3.2
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*******************************************************************************
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* @section License
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* <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
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*******************************************************************************
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*
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* This source code is the property of Energy Micro AS. The source and compiled
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* code may only be used on Energy Micro "EFM32" microcontrollers.
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*
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* This copyright notice may not be removed from the source code nor changed.
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*
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* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
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* obligation to support this Software. Energy Micro AS is providing the
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* Software "AS IS", with no express or implied warranties of any kind,
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* including, but not limited to, any implied warranties of merchantability
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* or fitness for any particular purpose or warranties against infringement
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* of any proprietary rights of a third party.
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*
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* Energy Micro AS will not be liable for any consequential, incidental, or
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* special damages, or any other relief, or for any claim by any third party,
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* arising from your use of this Software.
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*
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******************************************************************************/
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#ifndef __EFM32_MPU_H
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#define __EFM32_MPU_H
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#include "efm32.h"
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#if defined(__MPU_PRESENT) && (__MPU_PRESENT == 1)
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#include "efm32_assert.h"
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#include <stdbool.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************************************************************//**
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* @addtogroup EFM32_Library
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* @{
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******************************************************************************/
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/***************************************************************************//**
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* @addtogroup MPU
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* @{
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******************************************************************************/
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/** @anchor MPU_CTRL_PRIVDEFENA
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* Argument to MPU_enable(). Enables priviledged
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* access to default memory map. */
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#define MPU_CTRL_PRIVDEFENA MPU_CTRL_PRIVDEFENA_Msk
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/** @anchor MPU_CTRL_HFNMIENA
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* Argument to MPU_enable(). Enables MPU during hard fault,
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* NMI, and FAULTMASK handlers. */
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#define MPU_CTRL_HFNMIENA MPU_CTRL_HFNMIENA_Msk
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/*******************************************************************************
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******************************** ENUMS ************************************
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******************************************************************************/
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/**
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* Size of an MPU region.
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*/
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typedef enum
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{
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mpuRegionSize32b = 4, /**< 32 byte region size. */
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mpuRegionSize64b = 5, /**< 64 byte region size. */
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mpuRegionSize128b = 6, /**< 128 byte region size. */
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mpuRegionSize256b = 7, /**< 256 byte region size. */
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mpuRegionSize512b = 8, /**< 512 byte region size. */
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mpuRegionSize1Kb = 9, /**< 1K byte region size. */
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mpuRegionSize2Kb = 10, /**< 2K byte region size. */
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mpuRegionSize4Kb = 11, /**< 4K byte region size. */
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mpuRegionSize8Kb = 12, /**< 8K byte region size. */
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mpuRegionSize16Kb = 13, /**< 16K byte region size. */
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mpuRegionSize32Kb = 14, /**< 32K byte region size. */
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mpuRegionSize64Kb = 15, /**< 64K byte region size. */
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mpuRegionSize128Kb = 16, /**< 128K byte region size. */
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mpuRegionSize256Kb = 17, /**< 256K byte region size. */
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mpuRegionSize512Kb = 18, /**< 512K byte region size. */
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mpuRegionSize1Mb = 19, /**< 1M byte region size. */
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mpuRegionSize2Mb = 20, /**< 2M byte region size. */
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mpuRegionSize4Mb = 21, /**< 4M byte region size. */
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mpuRegionSize8Mb = 22, /**< 8M byte region size. */
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mpuRegionSize16Mb = 23, /**< 16M byte region size. */
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mpuRegionSize32Mb = 24, /**< 32M byte region size. */
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mpuRegionSize64Mb = 25, /**< 64M byte region size. */
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mpuRegionSize128Mb = 26, /**< 128M byte region size. */
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mpuRegionSize256Mb = 27, /**< 256M byte region size. */
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mpuRegionSize512Mb = 28, /**< 512M byte region size. */
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mpuRegionSize1Gb = 29, /**< 1G byte region size. */
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mpuRegionSize2Gb = 30, /**< 2G byte region size. */
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mpuRegionSize4Gb = 31 /**< 4G byte region size. */
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} MPU_RegionSize_TypeDef;
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/**
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* MPU region access permission attributes.
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*/
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typedef enum
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{
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mpuRegionNoAccess = 0, /**< No access what so ever. */
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mpuRegionApPRw = 1, /**< Priviledged state R/W only. */
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mpuRegionApPRwURo = 2, /**< Priviledged state R/W, User state R only. */
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mpuRegionApFullAccess = 3, /**< R/W in Priviledged and User state. */
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mpuRegionApPRo = 5, /**< Priviledged R only. */
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mpuRegionApPRo_URo = 6 /**< R only in Priviledged and User state. */
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} MPU_RegionAp_TypeDef;
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/*******************************************************************************
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******************************* STRUCTS ***********************************
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******************************************************************************/
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/** MPU Region init structure. */
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typedef struct
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{
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bool regionEnable; /**< MPU region enable. */
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uint8_t regionNo; /**< MPU region number. */
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uint32_t baseAddress; /**< Region baseaddress. */
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MPU_RegionSize_TypeDef size; /**< Memory region size. */
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MPU_RegionAp_TypeDef accessPermission; /**< Memory access permissions. */
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bool disableExec; /**< Disable execution. */
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bool shareable; /**< Memory shareable attribute. */
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bool cacheable; /**< Memory cacheable attribute. */
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bool bufferable; /**< Memory bufferable attribute. */
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uint8_t srd; /**< Memory subregion disable bits. */
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uint8_t tex; /**< Memory type extension attributes. */
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} MPU_RegionInit_TypeDef;
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/** Default configuration of MPU region init structure for flash memory. */
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#define MPU_INIT_FLASH_DEFAULT \
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{ \
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true, /* Enable MPU region. */ \
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0, /* MPU Region number. */ \
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FLASH_MEM_BASE, /* Flash base address. */ \
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mpuRegionSize1Mb, /* Size - Set to max. for EFM32. */ \
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mpuRegionApFullAccess, /* Access permissions. */ \
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false, /* Execution allowed. */ \
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false, /* Not shareable. */ \
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true, /* Cacheable. */ \
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false, /* Not bufferable. */ \
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0, /* No subregions. */ \
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0 /* No TEX attributes. */ \
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}
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/** Default configuration of MPU region init structure for sram memory. */
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#define MPU_INIT_SRAM_DEFAULT \
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{ \
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true, /* Enable MPU region. */ \
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1, /* MPU Region number. */ \
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RAM_MEM_BASE, /* SRAM base address. */ \
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mpuRegionSize128Kb, /* Size - Set to max. for EFM32. */ \
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mpuRegionApFullAccess, /* Access permissions. */ \
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false, /* Execution allowed. */ \
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true, /* Shareable. */ \
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true, /* Cacheable. */ \
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false, /* Not bufferable. */ \
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0, /* No subregions. */ \
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0 /* No TEX attributes. */ \
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}
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/** Default configuration of MPU region init structure for onchip peripherals.*/
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#define MPU_INIT_PERIPHERAL_DEFAULT \
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{ \
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true, /* Enable MPU region. */ \
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0, /* MPU Region number. */ \
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0, /* Region base address. */ \
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mpuRegionSize32b, /* Size - Set to minimum */ \
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mpuRegionApFullAccess, /* Access permissions. */ \
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true, /* Execution not allowed. */ \
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true, /* Shareable. */ \
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false, /* Not cacheable. */ \
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true, /* Bufferable. */ \
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0, /* No subregions. */ \
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0 /* No TEX attributes. */ \
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}
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/*******************************************************************************
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***************************** PROTOTYPES **********************************
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******************************************************************************/
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void MPU_ConfigureRegion(const MPU_RegionInit_TypeDef *init);
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/***************************************************************************//**
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* @brief
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* Disable the MPU
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* @details
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* Disable MPU and MPU fault exceptions.
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******************************************************************************/
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static __INLINE void MPU_Disable(void)
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{
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SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; /* Disable fault exceptions */
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MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk; /* Disable the MPU */
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}
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/***************************************************************************//**
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* @brief
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* Enable the MPU
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* @details
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* Enable MPU and MPU fault exceptions.
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* @param[in] flags
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* Use a logical OR of @ref MPU_CTRL_PRIVDEFENA and
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* @ref MPU_CTRL_HFNMIENA as needed.
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******************************************************************************/
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static __INLINE void MPU_Enable(uint32_t flags)
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{
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EFM_ASSERT(!(flags & ~(MPU_CTRL_PRIVDEFENA_Msk |
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MPU_CTRL_HFNMIENA_Msk |
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MPU_CTRL_ENABLE_Msk)));
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MPU->CTRL = flags | MPU_CTRL_ENABLE_Msk; /* Enable the MPU */
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SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; /* Enable fault exceptions */
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}
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/** @} (end addtogroup MPU) */
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/** @} (end addtogroup EFM32_Library) */
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#ifdef __cplusplus
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}
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#endif
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#endif /* defined(__MPU_PRESENT) && (EBI_COUNT == 1) */
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#endif /* __EFM32_MPU_H */
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