109 lines
3.3 KiB
C
109 lines
3.3 KiB
C
#ifndef __I386_H_
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#define __I386_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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static __inline unsigned char inb(int port)
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{
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unsigned char data;
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__asm __volatile("inb %w1,%0" : "=a" (data) : "d" (port));
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return data;
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}
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static __inline unsigned short inw(int port)
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{
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unsigned short data;
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__asm __volatile("inw %w1,%0" : "=a" (data) : "d" (port));
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return data;
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}
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static __inline unsigned int inl(int port)
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{
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unsigned int data;
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__asm __volatile("inl %w1,%0" : "=a" (data) : "d" (port));
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return data;
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}
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static __inline void insl(int port, void *addr, int cnt)
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{
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__asm __volatile("cld\n\trepne\n\tinsl" :
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"=D" (addr), "=c" (cnt) :
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"d" (port), "0" (addr), "1" (cnt) :
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"memory", "cc");
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}
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static __inline void outb(int port, unsigned char data)
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{
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__asm __volatile("outb %0,%w1" : : "a" (data), "d" (port));
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}
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static __inline void outw(int port, unsigned short data)
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{
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__asm __volatile("outw %0,%w1" : : "a" (data), "d" (port));
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}
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/* Gate descriptors are slightly different*/
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struct Gatedesc {
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unsigned gd_off_15_0 : 16; // low 16 bits of offset in segment
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unsigned gd_ss : 16; // segment selector
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unsigned gd_args : 5; // # args, 0 for interrupt/trap gates
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unsigned gd_rsv1 : 3; // reserved(should be zero I guess)
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unsigned gd_type :4; // type(STS_{TG,IG32,TG32})
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unsigned gd_s : 1; // must be 0 (system)
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unsigned gd_dpl : 2; // descriptor(meaning new) privilege level
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unsigned gd_p : 1; // Present
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unsigned gd_off_31_16 : 16; // high bits of offset in segment
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};
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/* Pseudo-descriptors used for LGDT, LLDT and LIDT instructions*/
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struct Pseudodesc {
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rt_uint16_t pd__garbage; // LGDT supposed to be from address 4N+2
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rt_uint16_t pd_lim; // Limit
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rt_uint32_t pd_base __attribute__ ((packed)); // Base address
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};
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#define SETGATE(gate, istrap, sel, off, dpl) \
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{ \
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(gate).gd_off_15_0 = (rt_uint32_t) (off) & 0xffff; \
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(gate).gd_ss = (sel); \
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(gate).gd_args = 0; \
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(gate).gd_rsv1 = 0; \
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(gate).gd_type = (istrap) ? STS_TG32 : STS_IG32; \
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(gate).gd_s = 0; \
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(gate).gd_dpl = dpl; \
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(gate).gd_p = 1; \
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(gate).gd_off_31_16 = (rt_uint32_t) (off) >> 16; \
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}
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/* Global descriptor numbers*/
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#define GD_KT 0x08 // kernel text
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#define GD_KD 0x10 // kernel data
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#define GD_UT 0x18 // user text
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#define GD_UD 0x20 // user data
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/* Application segment type bits*/
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#define STA_X 0x8 // Executable segment
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#define STA_E 0x4 // Expand down(non-executable segments)
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#define STA_C 0x4 // Conforming code segment(executable only)
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#define STA_W 0x2 // Writeable(non-executable segments)
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#define STA_R 0x2 // Readable(executable segments)
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#define STA_A 0x1 // Accessed
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/* System segment type bits*/
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#define STS_T16A 0x1 // Available 16-bit TSS
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#define STS_LDT 0x2 // Local Descriptor Table
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#define STS_T16B 0x3 // Busy 16-bit TSS
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#define STS_CG16 0x4 // 16-bit Call Gate
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#define STS_TG 0x5 // Task Gate / Coum Transmitions
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#define STS_IG16 0x6 // 16-bit Interrupt Gate
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#define STS_TG16 0x7 // 16-bit Trap Gate
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#define STS_T32A 0x9 // Available 32-bit TSS
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#define STS_T32B 0xb // Busy 32-bit TSS
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#define STS_CG32 0xc // 32-bit Call Gate
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#define STS_IG32 0xe // 32-bit Interrupt Gate
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#define STS_TG32 0xf // 32-bit Trap Gate
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#endif
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