473 lines
18 KiB
C
473 lines
18 KiB
C
/**
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******************************************************************************
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* @file stm32f10x_i2c.h
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* @author MCD Application Team
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* @version V3.1.2
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* @date 09/28/2009
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* @brief This file contains all the functions prototypes for the I2C firmware
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* library.
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******************************************************************************
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* @copy
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*
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*
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* <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F10x_I2C_H
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#define __STM32F10x_I2C_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f10x.h"
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/** @addtogroup STM32F10x_StdPeriph_Driver
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* @{
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*/
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/** @addtogroup I2C
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* @{
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*/
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/** @defgroup I2C_Exported_Types
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* @{
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*/
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/**
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* @brief I2C Init structure definition
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*/
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typedef struct
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{
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uint32_t I2C_ClockSpeed; /*!< Specifies the clock frequency.
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This parameter must be set to a value lower than 400kHz */
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uint16_t I2C_Mode; /*!< Specifies the I2C mode.
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This parameter can be a value of @ref I2C_mode */
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uint16_t I2C_DutyCycle; /*!< Specifies the I2C fast mode duty cycle.
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This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
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uint16_t I2C_OwnAddress1; /*!< Specifies the first device own address.
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This parameter can be a 7-bit or 10-bit address. */
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uint16_t I2C_Ack; /*!< Enables or disables the acknowledgement.
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This parameter can be a value of @ref I2C_acknowledgement */
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uint16_t I2C_AcknowledgedAddress; /*!< Specifies if 7-bit or 10-bit address is acknowledged.
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This parameter can be a value of @ref I2C_acknowledged_address */
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}I2C_InitTypeDef;
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/**
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* @}
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*/
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/** @defgroup I2C_Exported_Constants
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* @{
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*/
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#define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C1) || \
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((PERIPH) == I2C2))
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/** @defgroup I2C_mode
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* @{
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*/
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#define I2C_Mode_I2C ((uint16_t)0x0000)
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#define I2C_Mode_SMBusDevice ((uint16_t)0x0002)
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#define I2C_Mode_SMBusHost ((uint16_t)0x000A)
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#define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C) || \
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((MODE) == I2C_Mode_SMBusDevice) || \
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((MODE) == I2C_Mode_SMBusHost))
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/**
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* @}
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*/
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/** @defgroup I2C_duty_cycle_in_fast_mode
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* @{
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*/
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#define I2C_DutyCycle_16_9 ((uint16_t)0x4000) /*!< I2C fast mode Tlow/Thigh = 16/9 */
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#define I2C_DutyCycle_2 ((uint16_t)0xBFFF) /*!< I2C fast mode Tlow/Thigh = 2 */
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#define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DutyCycle_16_9) || \
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((CYCLE) == I2C_DutyCycle_2))
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/**
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* @}
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*/
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/** @defgroup I2C_acknowledgement
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* @{
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*/
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#define I2C_Ack_Enable ((uint16_t)0x0400)
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#define I2C_Ack_Disable ((uint16_t)0x0000)
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#define IS_I2C_ACK_STATE(STATE) (((STATE) == I2C_Ack_Enable) || \
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((STATE) == I2C_Ack_Disable))
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/**
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* @}
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*/
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/** @defgroup I2C_transfer_direction
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* @{
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*/
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#define I2C_Direction_Transmitter ((uint8_t)0x00)
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#define I2C_Direction_Receiver ((uint8_t)0x01)
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#define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) || \
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((DIRECTION) == I2C_Direction_Receiver))
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/**
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* @}
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*/
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/** @defgroup I2C_acknowledged_address
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* @{
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*/
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#define I2C_AcknowledgedAddress_7bit ((uint16_t)0x4000)
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#define I2C_AcknowledgedAddress_10bit ((uint16_t)0xC000)
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#define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \
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((ADDRESS) == I2C_AcknowledgedAddress_10bit))
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/**
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* @}
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*/
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/** @defgroup I2C_registers
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* @{
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*/
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#define I2C_Register_CR1 ((uint8_t)0x00)
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#define I2C_Register_CR2 ((uint8_t)0x04)
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#define I2C_Register_OAR1 ((uint8_t)0x08)
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#define I2C_Register_OAR2 ((uint8_t)0x0C)
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#define I2C_Register_DR ((uint8_t)0x10)
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#define I2C_Register_SR1 ((uint8_t)0x14)
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#define I2C_Register_SR2 ((uint8_t)0x18)
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#define I2C_Register_CCR ((uint8_t)0x1C)
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#define I2C_Register_TRISE ((uint8_t)0x20)
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#define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_CR1) || \
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((REGISTER) == I2C_Register_CR2) || \
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((REGISTER) == I2C_Register_OAR1) || \
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((REGISTER) == I2C_Register_OAR2) || \
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((REGISTER) == I2C_Register_DR) || \
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((REGISTER) == I2C_Register_SR1) || \
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((REGISTER) == I2C_Register_SR2) || \
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((REGISTER) == I2C_Register_CCR) || \
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((REGISTER) == I2C_Register_TRISE))
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/**
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* @}
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*/
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/** @defgroup I2C_SMBus_alert_pin_level
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* @{
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*/
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#define I2C_SMBusAlert_Low ((uint16_t)0x2000)
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#define I2C_SMBusAlert_High ((uint16_t)0xDFFF)
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#define IS_I2C_SMBUS_ALERT(ALERT) (((ALERT) == I2C_SMBusAlert_Low) || \
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((ALERT) == I2C_SMBusAlert_High))
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/**
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* @}
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*/
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/** @defgroup I2C_PEC_position
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* @{
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*/
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#define I2C_PECPosition_Next ((uint16_t)0x0800)
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#define I2C_PECPosition_Current ((uint16_t)0xF7FF)
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#define IS_I2C_PEC_POSITION(POSITION) (((POSITION) == I2C_PECPosition_Next) || \
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((POSITION) == I2C_PECPosition_Current))
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/**
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* @}
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*/
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/** @defgroup I2C_interrupts_definition
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* @{
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*/
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#define I2C_IT_BUF ((uint16_t)0x0400)
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#define I2C_IT_EVT ((uint16_t)0x0200)
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#define I2C_IT_ERR ((uint16_t)0x0100)
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#define IS_I2C_CONFIG_IT(IT) ((((IT) & (uint16_t)0xF8FF) == 0x00) && ((IT) != 0x00))
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/**
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* @}
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*/
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/** @defgroup I2C_interrupts_definition
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* @{
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*/
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#define I2C_IT_SMBALERT ((uint32_t)0x01008000)
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#define I2C_IT_TIMEOUT ((uint32_t)0x01004000)
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#define I2C_IT_PECERR ((uint32_t)0x01001000)
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#define I2C_IT_OVR ((uint32_t)0x01000800)
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#define I2C_IT_AF ((uint32_t)0x01000400)
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#define I2C_IT_ARLO ((uint32_t)0x01000200)
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#define I2C_IT_BERR ((uint32_t)0x01000100)
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#define I2C_IT_TXE ((uint32_t)0x06000080)
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#define I2C_IT_RXNE ((uint32_t)0x06000040)
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#define I2C_IT_STOPF ((uint32_t)0x02000010)
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#define I2C_IT_ADD10 ((uint32_t)0x02000008)
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#define I2C_IT_BTF ((uint32_t)0x02000004)
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#define I2C_IT_ADDR ((uint32_t)0x02000002)
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#define I2C_IT_SB ((uint32_t)0x02000001)
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#define IS_I2C_CLEAR_IT(IT) ((((IT) & (uint16_t)0x20FF) == 0x00) && ((IT) != (uint16_t)0x00))
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#define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_SMBALERT) || ((IT) == I2C_IT_TIMEOUT) || \
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((IT) == I2C_IT_PECERR) || ((IT) == I2C_IT_OVR) || \
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((IT) == I2C_IT_AF) || ((IT) == I2C_IT_ARLO) || \
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((IT) == I2C_IT_BERR) || ((IT) == I2C_IT_TXE) || \
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((IT) == I2C_IT_RXNE) || ((IT) == I2C_IT_STOPF) || \
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((IT) == I2C_IT_ADD10) || ((IT) == I2C_IT_BTF) || \
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((IT) == I2C_IT_ADDR) || ((IT) == I2C_IT_SB))
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/**
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* @}
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*/
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/** @defgroup I2C_flags_definition
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* @{
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*/
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/**
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* @brief SR2 register flags
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*/
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#define I2C_FLAG_DUALF ((uint32_t)0x00800000)
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#define I2C_FLAG_SMBHOST ((uint32_t)0x00400000)
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#define I2C_FLAG_SMBDEFAULT ((uint32_t)0x00200000)
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#define I2C_FLAG_GENCALL ((uint32_t)0x00100000)
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#define I2C_FLAG_TRA ((uint32_t)0x00040000)
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#define I2C_FLAG_BUSY ((uint32_t)0x00020000)
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#define I2C_FLAG_MSL ((uint32_t)0x00010000)
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/**
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* @brief SR1 register flags
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*/
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#define I2C_FLAG_SMBALERT ((uint32_t)0x10008000)
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#define I2C_FLAG_TIMEOUT ((uint32_t)0x10004000)
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#define I2C_FLAG_PECERR ((uint32_t)0x10001000)
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#define I2C_FLAG_OVR ((uint32_t)0x10000800)
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#define I2C_FLAG_AF ((uint32_t)0x10000400)
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#define I2C_FLAG_ARLO ((uint32_t)0x10000200)
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#define I2C_FLAG_BERR ((uint32_t)0x10000100)
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#define I2C_FLAG_TXE ((uint32_t)0x10000080)
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#define I2C_FLAG_RXNE ((uint32_t)0x10000040)
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#define I2C_FLAG_STOPF ((uint32_t)0x10000010)
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#define I2C_FLAG_ADD10 ((uint32_t)0x10000008)
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#define I2C_FLAG_BTF ((uint32_t)0x10000004)
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#define I2C_FLAG_ADDR ((uint32_t)0x10000002)
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#define I2C_FLAG_SB ((uint32_t)0x10000001)
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#define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0x20FF) == 0x00) && ((FLAG) != (uint16_t)0x00))
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#define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_DUALF) || ((FLAG) == I2C_FLAG_SMBHOST) || \
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((FLAG) == I2C_FLAG_SMBDEFAULT) || ((FLAG) == I2C_FLAG_GENCALL) || \
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((FLAG) == I2C_FLAG_TRA) || ((FLAG) == I2C_FLAG_BUSY) || \
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((FLAG) == I2C_FLAG_MSL) || ((FLAG) == I2C_FLAG_SMBALERT) || \
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((FLAG) == I2C_FLAG_TIMEOUT) || ((FLAG) == I2C_FLAG_PECERR) || \
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((FLAG) == I2C_FLAG_OVR) || ((FLAG) == I2C_FLAG_AF) || \
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((FLAG) == I2C_FLAG_ARLO) || ((FLAG) == I2C_FLAG_BERR) || \
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((FLAG) == I2C_FLAG_TXE) || ((FLAG) == I2C_FLAG_RXNE) || \
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((FLAG) == I2C_FLAG_STOPF) || ((FLAG) == I2C_FLAG_ADD10) || \
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((FLAG) == I2C_FLAG_BTF) || ((FLAG) == I2C_FLAG_ADDR) || \
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((FLAG) == I2C_FLAG_SB))
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/**
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* @}
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*/
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/** @defgroup I2C_Events
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* @{
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*/
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/**
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* @brief EV1
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*/
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#define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */
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#define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((uint32_t)0x00020002) /* BUSY and ADDR flags */
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#define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080) /* DUALF, TRA, BUSY and TXE flags */
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#define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((uint32_t)0x00820000) /* DUALF and BUSY flags */
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#define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((uint32_t)0x00120000) /* GENCALL and BUSY flags */
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/**
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* @brief EV2
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*/
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#define I2C_EVENT_SLAVE_BYTE_RECEIVED ((uint32_t)0x00020040) /* BUSY and RXNE flags */
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/**
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* @brief EV3
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*/
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#define I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((uint32_t)0x00060084) /* TRA, BUSY, TXE and BTF flags */
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/**
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* @brief EV4
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*/
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#define I2C_EVENT_SLAVE_STOP_DETECTED ((uint32_t)0x00000010) /* STOPF flag */
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/**
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* @brief EV5
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*/
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#define I2C_EVENT_MASTER_MODE_SELECT ((uint32_t)0x00030001) /* BUSY, MSL and SB flag */
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/**
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* @brief EV6
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*/
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#define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((uint32_t)0x00070082) /* BUSY, MSL, ADDR, TXE and TRA flags */
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#define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((uint32_t)0x00030002) /* BUSY, MSL and ADDR flags */
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/**
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* @brief EV7
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*/
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#define I2C_EVENT_MASTER_BYTE_RECEIVED ((uint32_t)0x00030040) /* BUSY, MSL and RXNE flags */
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/**
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* @brief EV8
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*/
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#define I2C_EVENT_MASTER_BYTE_TRANSMITTING ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */
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/**
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* @brief EV8_2
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*/
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#define I2C_EVENT_MASTER_BYTE_TRANSMITTED ((uint32_t)0x00070084) /* TRA, BUSY, MSL, TXE and BTF flags */
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/**
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* @brief EV9
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*/
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#define I2C_EVENT_MASTER_MODE_ADDRESS10 ((uint32_t)0x00030008) /* BUSY, MSL and ADD10 flags */
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/**
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* @brief EV3_2
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*/
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#define I2C_EVENT_SLAVE_ACK_FAILURE ((uint32_t)0x00000400) /* AF flag */
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#define IS_I2C_EVENT(EVENT) (((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED) || \
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((EVENT) == I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED) || \
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((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED) || \
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((EVENT) == I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED) || \
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((EVENT) == I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED) || \
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((EVENT) == I2C_EVENT_SLAVE_BYTE_RECEIVED) || \
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((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF)) || \
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((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL)) || \
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((EVENT) == I2C_EVENT_SLAVE_BYTE_TRANSMITTED) || \
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((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF)) || \
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((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL)) || \
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((EVENT) == I2C_EVENT_SLAVE_STOP_DETECTED) || \
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((EVENT) == I2C_EVENT_MASTER_MODE_SELECT) || \
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((EVENT) == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) || \
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((EVENT) == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) || \
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((EVENT) == I2C_EVENT_MASTER_BYTE_RECEIVED) || \
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((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTED) || \
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((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTING) || \
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((EVENT) == I2C_EVENT_MASTER_MODE_ADDRESS10) || \
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((EVENT) == I2C_EVENT_SLAVE_ACK_FAILURE))
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/**
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* @}
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*/
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/** @defgroup I2C_own_address1
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* @{
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*/
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#define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x3FF)
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/**
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* @}
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*/
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/** @defgroup I2C_clock_speed
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* @{
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*/
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#define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) >= 0x1) && ((SPEED) <= 400000))
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/**
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* @}
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*/
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/**
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* @}
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*/
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/** @defgroup I2C_Exported_Macros
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup I2C_Exported_Functions
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* @{
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*/
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void I2C_DeInit(I2C_TypeDef* I2Cx);
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void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct);
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void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct);
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void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
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void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
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void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
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void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState);
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void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState);
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void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState);
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void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address);
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void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
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void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
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void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState);
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void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data);
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uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx);
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void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction);
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uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register);
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void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
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void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert);
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void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
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void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition);
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void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
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uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx);
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void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
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void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
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void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle);
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uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx);
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ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT);
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FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
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void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
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ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
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void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
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#ifdef __cplusplus
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}
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#endif
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#endif /*__STM32F10x_I2C_H */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
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