f51bce3fed
We currently only support building with CCS and SCons is not using.
bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file.
You may need to regenerate the source file as you like, providing that:
1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The
channel 5 in enabled and connected to IRQ.
2, RTI driver is enabled and compare3 source is selected to counter1
and the compare3 will generate tick in the period of 10ms. This
value is coresponding with RT_TICK_PER_SECOND in rtconfig.h.
In CCS, you need to create a new CCS project and create link folders
pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember
to add the include path to the Build Properties.
404 lines
11 KiB
NASM
404 lines
11 KiB
NASM
;-------------------------------------------------------------------------------
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; sys_mpu.asm
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;
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; (c) Texas Instruments 2009-2013, All rights reserved.
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;
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.text
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.arm
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;-------------------------------------------------------------------------------
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; Initalize Mpu
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.def _mpuInit_
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.asmfunc
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_mpuInit_
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stmfd sp!, {r0}
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; Disable mpu
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mrc p15, #0, r0, c1, c0, #0
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bic r0, r0, #1
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dsb
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mcr p15, #0, r0, c1, c0, #0
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isb
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; Disable background region
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mrc p15, #0, r0, c1, c0, #0
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bic r0, r0, #0x20000
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mcr p15, #0, r0, c1, c0, #0
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; Setup region 1
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mov r0, #0
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mcr p15, #0, r0, c6, c2, #0
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ldr r0, r1Base
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mcr p15, #0, r0, c6, c1, #0
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mov r0, #0x0008
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orr r0, r0, #0x1000
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mcr p15, #0, r0, c6, c1, #4
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movw r0, #((1 << 15) + (1 << 14) + (1 << 13) + (1 << 12) + (1 << 11) + (1 << 10) + (1 << 9) + (1 << 8) + (0x1F << 1) + (1))
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mcr p15, #0, r0, c6, c1, #2
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; Setup region 2
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mov r0, #1
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mcr p15, #0, r0, c6, c2, #0
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ldr r0, r2Base
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mcr p15, #0, r0, c6, c1, #0
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mov r0, #0x0008
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orr r0, r0, #0x0600
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mcr p15, #0, r0, c6, c1, #4
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movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x15 << 1) + (1))
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mcr p15, #0, r0, c6, c1, #2
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; Setup region
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mov r0, #2
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mcr p15, #0, r0, c6, c2, #0
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ldr r0, r3Base
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mcr p15, #0, r0, c6, c1, #0
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mov r0, #0x0008
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orr r0, r0, #0x0300
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mcr p15, #0, r0, c6, c1, #4
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movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x11 << 1) + (1))
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mcr p15, #0, r0, c6, c1, #2
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; Setup region 4
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mov r0, #3
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mcr p15, #0, r0, c6, c2, #0
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ldr r0, r4Base
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mcr p15, #0, r0, c6, c1, #0
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mov r0, #0x0008
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orr r0, r0, #0x0300
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mcr p15, #0, r0, c6, c1, #4
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movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x11 << 1) + (1))
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mcr p15, #0, r0, c6, c1, #2
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; Setup region 5
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mov r0, #4
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mcr p15, #0, r0, c6, c2, #0
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ldr r0, r5Base
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mcr p15, #0, r0, c6, c1, #0
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mov r0, #0x0000
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orr r0, r0, #0x0300
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mcr p15, #0, r0, c6, c1, #4
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movw r0, #((1 << 15) + (1 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x19 << 1) + (1))
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mcr p15, #0, r0, c6, c1, #2
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; Setup region 6
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mov r0, #5
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mcr p15, #0, r0, c6, c2, #0
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ldr r0, r6Base
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mcr p15, #0, r0, c6, c1, #0
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mov r0, #0x0000
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orr r0, r0, #0x0300
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mcr p15, #0, r0, c6, c1, #4
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movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x1A << 1) + (1))
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mcr p15, #0, r0, c6, c1, #2
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; Setup region 7
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mov r0, #6
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mcr p15, #0, r0, c6, c2, #0
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ldr r0, r7Base
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mcr p15, #0, r0, c6, c1, #0
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mov r0, #0x0008
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orr r0, r0, #0x1200
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mcr p15, #0, r0, c6, c1, #4
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movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x16 << 1) + (1))
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mcr p15, #0, r0, c6, c1, #2
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; Setup region 8
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mov r0, #7
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mcr p15, #0, r0, c6, c2, #0
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ldr r0, r8Base
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mcr p15, #0, r0, c6, c1, #0
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mov r0, #0x0010
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orr r0, r0, #0x1300
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mcr p15, #0, r0, c6, c1, #4
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movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x17 << 1) + (1))
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mcr p15, #0, r0, c6, c1, #2
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; Setup region 9
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mov r0, #8
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mcr p15, #0, r0, c6, c2, #0
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ldr r0, r9Base
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mcr p15, #0, r0, c6, c1, #0
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mov r0, #0x0010
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orr r0, r0, #0x1300
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mcr p15, #0, r0, c6, c1, #4
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movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x08 << 1) + (1))
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mcr p15, #0, r0, c6, c1, #2
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; Setup region 10
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mov r0, #9
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mcr p15, #0, r0, c6, c2, #0
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ldr r0, r10Base
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mcr p15, #0, r0, c6, c1, #0
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mov r0, #0x0010
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orr r0, r0, #0x1300
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mcr p15, #0, r0, c6, c1, #4
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movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x17 << 1) + (1))
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mcr p15, #0, r0, c6, c1, #2
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; Setup region 11
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mov r0, #10
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mcr p15, #0, r0, c6, c2, #0
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ldr r0, r11Base
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mcr p15, #0, r0, c6, c1, #0
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mov r0, #0x0008
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orr r0, r0, #0x1100
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mcr p15, #0, r0, c6, c1, #4
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movw r0, #((1 << 15) + (1 << 14) + (1 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x0A << 1) + (0))
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mcr p15, #0, r0, c6, c1, #2
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; Setup region 12
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mov r0, #11
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mcr p15, #0, r0, c6, c2, #0
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ldr r0, r12Base
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mcr p15, #0, r0, c6, c1, #0
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mov r0, #0x0008
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orr r0, r0, #0x1300
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mcr p15, #0, r0, c6, c1, #4
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movw r0, #((1 << 15) + (1 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x15 << 1) + (0))
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mcr p15, #0, r0, c6, c1, #2
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; Enable mpu background region
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mrc p15, #0, r0, c1, c0, #0
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orr r0, r0, #0x20000
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mcr p15, #0, r0, c1, c0, #0
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; Enable mpu
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mrc p15, #0, r0, c1, c0, #0
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orr r0, r0, #1
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dsb
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mcr p15, #0, r0, c1, c0, #0
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isb
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ldmfd sp!, {r0}
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bx lr
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r1Base .word 0x00000000
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r2Base .word 0x00000000
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r3Base .word 0x08000000
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r4Base .word 0x08400000
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r5Base .word 0x60000000
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r6Base .word 0x80000000
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r7Base .word 0xF0000000
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r8Base .word 0xFC000000
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r9Base .word 0xFE000000
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r10Base .word 0xFF000000
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r11Base .word 0x08001000
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r12Base .word 0x20000000
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Enable Mpu
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.def _mpuEnable_
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.asmfunc
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_mpuEnable_
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stmfd sp!, {r0}
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mrc p15, #0, r0, c1, c0, #0
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orr r0, r0, #1
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dsb
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mcr p15, #0, r0, c1, c0, #0
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isb
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ldmfd sp!, {r0}
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Disable Mpu
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.def _mpuDisable_
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.asmfunc
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_mpuDisable_
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stmfd sp!, {r0}
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mrc p15, #0, r0, c1, c0, #0
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bic r0, r0, #1
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dsb
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mcr p15, #0, r0, c1, c0, #0
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isb
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ldmfd sp!, {r0}
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Enable Mpu background region
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.def _mpuEnableBackgroundRegion_
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.asmfunc
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_mpuEnableBackgroundRegion_
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stmfd sp!, {r0}
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mrc p15, #0, r0, c1, c0, #0
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orr r0, r0, #0x20000
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mcr p15, #0, r0, c1, c0, #0
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ldmfd sp!, {r0}
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Disable Mpu background region
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.def _mpuDisableBackgroundRegion_
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.asmfunc
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_mpuDisableBackgroundRegion_
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stmfd sp!, {r0}
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mrc p15, #0, r0, c1, c0, #0
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bic r0, r0, #0x20000
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mcr p15, #0, r0, c1, c0, #0
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ldmfd sp!, {r0}
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Returns number of implemented Mpu regions
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.def _mpuGetNumberOfRegions_
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.asmfunc
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_mpuGetNumberOfRegions_
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mrc p15, #0, r0, c0, c0, #4
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uxtb r0, r0, ROR #8
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Returns the type of the implemented mpu regions
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.def _mpuAreRegionsSeparate_
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.asmfunc
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_mpuAreRegionsSeparate_
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mrc p15, #0, r0, c0, c0, #4
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uxtb r0, r0
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Set mpu region number
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.def _mpuSetRegion_
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.asmfunc
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_mpuSetRegion_
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mcr p15, #0, r0, c6, c2, #0
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Get mpu region number
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.def _mpuGetRegion_
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.asmfunc
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_mpuGetRegion_
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mrc p15, #0, r0, c6, c2, #0
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Set base address
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.def _mpuSetRegionBaseAddress_
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.asmfunc
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_mpuSetRegionBaseAddress_
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mcr p15, #0, r0, c6, c1, #0
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Get base address
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.def _mpuGetRegionBaseAddress_
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.asmfunc
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_mpuGetRegionBaseAddress_
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mrc p15, #0, r0, c6, c1, #0
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Set type and permission
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.def _mpuSetRegionTypeAndPermission_
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.asmfunc
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_mpuSetRegionTypeAndPermission_
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orr r0, r0, r1
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mcr p15, #0, r0, c6, c1, #4
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Get type
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.def _mpuGetRegionType_
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.asmfunc
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_mpuGetRegionType_
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mrc p15, #0, r0, c6, c1, #4
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bic r0, r0, #0xFF00
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Get permission
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.def _mpuGetRegionPermission_
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.asmfunc
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_mpuGetRegionPermission_
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mrc p15, #0, r0, c6, c1, #4
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bic r0, r0, #0xFF
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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; Set region size register value
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.def _mpuSetRegionSizeRegister_
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.asmfunc
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_mpuSetRegionSizeRegister_
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mcr p15, #0, r0, c6, c1, #2
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bx lr
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.endasmfunc
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;-------------------------------------------------------------------------------
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