164 lines
5.0 KiB
C
164 lines
5.0 KiB
C
/*
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* @brief SSP Registers and control functions
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#include "ssp_001.h"
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/*****************************************************************************
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* Private types/enumerations/variables
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****************************************************************************/
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/*****************************************************************************
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* Public types/enumerations/variables
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****************************************************************************/
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/*****************************************************************************
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* Private functions
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****************************************************************************/
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/*****************************************************************************
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* Public functions
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****************************************************************************/
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/*Set up output clocks per bit for SSP bus*/
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void IP_SSP_Set_ClockRate(IP_SSP_001_Type *pSSP, uint32_t clk_rate, uint32_t prescale)
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{
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pSSP->CR0 &= ~(SSP_CR0_SCR(0xFF));
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pSSP->CR0 |= SSP_CR0_SCR(clk_rate);
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pSSP->CPSR = prescale;
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}
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/* Set up the SSP frame format */
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void IP_SSP_Set_Format(IP_SSP_001_Type *pSSP, uint32_t bits, uint32_t frameFormat, uint32_t clockFormat)
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{
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pSSP->CR0 = (pSSP->CR0 & ~0xFF) | bits | frameFormat | clockFormat;
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}
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/* Set the SSP working as master or slave mode */
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void IP_SSP_Set_Mode(IP_SSP_001_Type *pSSP, uint32_t mode)
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{
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pSSP->CR1 = (pSSP->CR1 & ~(1 << 2)) | mode;
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}
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/* Disable SSP operation */
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void IP_SSP_DeInit(IP_SSP_001_Type *pSSP)
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{
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pSSP->CR1 &= (~SSP_CR1_SSP_EN) & SSP_CR1_BITMASK;
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}
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/* Enable/Disable SSP operation */
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void IP_SSP_Cmd(IP_SSP_001_Type *pSSP, FunctionalState NewState)
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{
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if (NewState == ENABLE) {
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pSSP->CR1 |= SSP_CR1_SSP_EN;
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}
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else {
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pSSP->CR1 &= (~SSP_CR1_SSP_EN) & SSP_CR1_BITMASK;
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}
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}
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/* Send SSP 16-bit data */
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void IP_SSP_SendFrame(IP_SSP_001_Type *pSSP, uint16_t tx_data)
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{
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pSSP->DR = SSP_DR_BITMASK(tx_data);
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}
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/* Get received SSP data */
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uint16_t IP_SSP_ReceiveFrame(IP_SSP_001_Type *pSSP)
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{
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return (uint16_t) (SSP_DR_BITMASK(pSSP->DR));
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}
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/* Enable/Disable loopback mode */
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void IP_SSP_LoopBackCmd(IP_SSP_001_Type *pSSP, FunctionalState NewState)
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{
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if (NewState == ENABLE) {
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pSSP->CR1 |= SSP_CR1_LBM_EN;
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}
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else {
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pSSP->CR1 &= (~SSP_CR1_LBM_EN) & SSP_CR1_BITMASK;
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}
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}
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/* Get the raw interrupt status */
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IntStatus IP_SSP_GetRawIntStatus(IP_SSP_001_Type *pSSP, SSP_Raw_Int_Status_Type RawInt)
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{
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return (pSSP->RIS & RawInt) ? SET : RESET;
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}
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/* Get the masked interrupt status */
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uint32_t IP_SSP_GetIntStatus(IP_SSP_001_Type *pSSP)
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{
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return pSSP->MIS;
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}
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/* Clear the corresponding interrupt condition(s) in the SSP controller */
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void IP_SSP_ClearIntPending(IP_SSP_001_Type *pSSP, SSP_Int_Clear_Type IntClear)
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{
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pSSP->ICR = IntClear;
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}
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/* Get the current status of SSP controller */
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FlagStatus IP_SSP_GetStatus(IP_SSP_001_Type *pSSP, SSP_Status_Type Stat)
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{
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return (pSSP->SR & Stat) ? SET : RESET;
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}
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/* Get the number of bits transferred in each frame */
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uint8_t IP_SSP_GetDataSize(IP_SSP_001_Type *pSSP)
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{
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return SSP_CR0_DSS(pSSP->CR0);
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}
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/* Enable/Disable interrupt for the SSP */
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void IP_SSP_Int_Enable(IP_SSP_001_Type *pSSP, SSP_Int_Mask_Type IntType, FunctionalState NewState)
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{
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if (NewState == ENABLE) {
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pSSP->IMSC |= IntType;
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}
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else {
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pSSP->IMSC &= (~IntType);
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}
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}
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/* Enable/Disable DMA for SSP */
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void IP_SSP_DMA_Cmd(IP_SSP_001_Type *pSSP, SSP_DMA_Type ssp_dma_t, FunctionalState NewState)
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{
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#if !defined(CHIP_LPC111X_CXX) && !defined(CHIP_LPC11UXX)
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if (NewState == ENABLE) {
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pSSP->DMACR |= ssp_dma_t;
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}
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else {
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pSSP->DMACR &= (~ssp_dma_t);
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}
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#endif
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}
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