328 lines
8.4 KiB
C
328 lines
8.4 KiB
C
/*
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* @brief I2S Registers and control functions
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#include "i2s_001.h"
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/*****************************************************************************
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* Private types/enumerations/variables
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****************************************************************************/
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/*****************************************************************************
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* Public types/enumerations/variables
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****************************************************************************/
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/*****************************************************************************
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* Private functions
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****************************************************************************/
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/*****************************************************************************
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* Public functions
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****************************************************************************/
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/* Initialize for I2S */
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void IP_I2S_Init(IP_I2S_001_Type *pI2S)
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{}
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/* Shutdown I2S */
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void IP_I2S_DeInit(IP_I2S_001_Type *pI2S)
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{
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pI2S->DAI = 0x07E1;
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pI2S->DAO = 0x87E1;
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pI2S->IRQ = 0;
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pI2S->TXMODE = 0;
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pI2S->RXMODE = 0;
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pI2S->DMA1 = 0;
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pI2S->DMA2 = 0;
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}
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/* I2S configuration functions --------*/
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/* Selects the number of bytes in data */
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void IP_I2S_SetWordWidth(IP_I2S_001_Type *pI2S, uint8_t TRMode, uint32_t wordwidth)
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{
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if (TRMode == I2S_TX_MODE) {
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pI2S->DAO &= ~I2S_DAO_WORDWIDTH_MASK;
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pI2S->DAO |= wordwidth;
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}
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else {
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pI2S->DAI &= ~I2S_DAI_WORDWIDTH_MASK;
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pI2S->DAI |= wordwidth;
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}
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}
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/* Set I2S data format is monaural or stereo */
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void IP_I2S_SetMono(IP_I2S_001_Type *pI2S, uint8_t TRMode, uint32_t mono)
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{
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if (TRMode == I2S_TX_MODE) {
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pI2S->DAO &= ~I2S_DAO_MONO;
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pI2S->DAO |= mono;
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}
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else {
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pI2S->DAI &= ~I2S_DAI_MONO;
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pI2S->DAI |= mono;
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}
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}
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/* Set I2S interface in master/slave mode */
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void IP_I2S_SetMasterSlaveMode(IP_I2S_001_Type *pI2S, uint8_t TRMode, uint32_t mode)
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{
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if (TRMode == I2S_TX_MODE) {
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pI2S->DAO &= ~I2S_DAO_SLAVE;
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pI2S->DAO |= mode;
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}
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else {
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pI2S->DAI &= ~I2S_DAI_SLAVE;
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pI2S->DAI |= mode;
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}
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}
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/* Set the clock frequency for I2S interface */
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void IP_I2S_SetBitRate(IP_I2S_001_Type *pI2S, uint8_t TRMode, uint32_t mclk_divider)
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{
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if (TRMode == I2S_TX_MODE) {
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pI2S->TXBITRATE = mclk_divider;
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}
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else {
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pI2S->RXBITRATE = mclk_divider;
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}
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}
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/* Set the MCLK rate by using a fractional rate generator, dividing down the frequency of PCLK */
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void IP_I2S_SetXYDivider(IP_I2S_001_Type *pI2S, uint8_t TRMode, uint8_t x_divider, uint8_t y_divider)
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{
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if (TRMode == I2S_TX_MODE) {
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pI2S->TXRATE = y_divider | (x_divider << 8);
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}
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else {
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pI2S->RXRATE = y_divider | (x_divider << 8);
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}
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}
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/* Set word select (WS) half period */
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void IP_I2S_SetWS_Halfperiod(IP_I2S_001_Type *pI2S, uint8_t TRMode, uint32_t ws_halfperiod)
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{
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if (TRMode == I2S_TX_MODE) {
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pI2S->DAO &= ~I2S_DAO_WS_HALFPERIOD_MASK;
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pI2S->DAO |= I2S_DAO_WS_HALFPERIOD(ws_halfperiod);
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}
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else {
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pI2S->DAI &= ~I2S_DAI_WS_HALFPERIOD_MASK;
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pI2S->DAI |= I2S_DAI_WS_HALFPERIOD(ws_halfperiod);
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}
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}
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/* Set the I2S operating modes */
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void IP_I2S_ModeConfig(IP_I2S_001_Type *pI2S, uint8_t TRMode, uint32_t clksel, uint32_t fpin, uint32_t mcena)
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{
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if (TRMode == I2S_TX_MODE) {
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pI2S->TXMODE = clksel | fpin | mcena;
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}
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else {
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pI2S->RXMODE = clksel | fpin | mcena;
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}
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}
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/* Get the current level of the Transmit/Receive FIFO */
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uint8_t IP_I2S_GetLevel(IP_I2S_001_Type *pI2S, uint8_t TRMode)
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{
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if (TRMode == I2S_TX_MODE) {
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return (pI2S->STATE >> 16) & 0xF;
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}
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else {
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return (pI2S->STATE >> 8) & 0xF;
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}
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}
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/* I2S operate functions -------------*/
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/* Send a 32-bit data to TXFIFO for transmition */
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void IP_I2S_Send(IP_I2S_001_Type *pI2S, uint32_t data)
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{
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pI2S->TXFIFO = data;
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}
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/* Get received data from RXFIFO */
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uint32_t IP_I2S_Receive(IP_I2S_001_Type *pI2S)
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{
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return pI2S->RXFIFO;
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}
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/* Start the I2S */
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void IP_I2S_Start(IP_I2S_001_Type *pI2S, uint8_t TRMode)
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{
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if (TRMode == I2S_TX_MODE) {
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pI2S->DAO &= ~(I2S_DAO_RESET | I2S_DAO_STOP | I2S_DAO_MUTE);
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}
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else {
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pI2S->DAI &= ~(I2S_DAI_RESET | I2S_DAI_STOP);
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}
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}
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/* Disables accesses on FIFOs, places the transmit channel in mute mode */
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void IP_I2S_Pause(IP_I2S_001_Type *pI2S, uint8_t TRMode)
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{
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if (TRMode == I2S_TX_MODE) {
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pI2S->DAO |= I2S_DAO_STOP;
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}
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else {
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pI2S->DAI |= I2S_DAI_STOP;
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}
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}
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/* Transmit channel sends only zeroes */
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void IP_I2S_Mute(IP_I2S_001_Type *pI2S, FunctionalState NewState)
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{
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if (NewState == ENABLE) {
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pI2S->DAO |= I2S_DAO_MUTE;
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}
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else {
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pI2S->DAO &= ~I2S_DAO_MUTE;
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}
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}
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/* Pause, resets the transmit channel and FIFO asynchronously */
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void IP_I2S_Stop(IP_I2S_001_Type *pI2S, uint8_t TRMode)
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{
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if (TRMode == I2S_TX_MODE) {
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pI2S->DAO &= ~I2S_DAO_MUTE;
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pI2S->DAO |= I2S_DAO_STOP | I2S_DAO_RESET;
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}
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else {
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pI2S->DAI |= I2S_DAI_STOP | I2S_DAI_RESET;
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}
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}
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/* I2S DMA functions ----------------*/
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/* Set the FIFO level on which to create an DMA request */
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void IP_I2S_DMACmd(IP_I2S_001_Type *pI2S, IP_I2S_DMARequestNumber_Type DMANum, uint8_t TRMode, FunctionalState NewState)
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{
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if (TRMode == I2S_RX_MODE) {
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if (DMANum == IP_I2S_DMA_REQUEST_NUMBER_1) {
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if (NewState == ENABLE) {
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pI2S->DMA1 |= 0x01;
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}
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else {
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pI2S->DMA1 &= ~0x01;
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}
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}
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else {
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if (NewState == ENABLE) {
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pI2S->DMA2 |= 0x01;
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}
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else {
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pI2S->DMA2 &= ~0x01;
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}
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}
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}
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else {
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if (DMANum == IP_I2S_DMA_REQUEST_NUMBER_1) {
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if (NewState == ENABLE) {
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pI2S->DMA1 |= 0x02;
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}
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else {
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pI2S->DMA1 &= ~0x02;
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}
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}
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else {
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if (NewState == ENABLE) {
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pI2S->DMA2 |= 0x02;
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}
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else {
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pI2S->DMA2 &= ~0x02;
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}
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}
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}
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}
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/* Enable/Disable DMA for the I2S */
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void IP_I2S_SetFIFODepthDMA(IP_I2S_001_Type *pI2S, uint8_t TRMode, IP_I2S_DMARequestNumber_Type DMANum, uint32_t depth)
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{
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if (TRMode == I2S_RX_MODE) {
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if (DMANum == IP_I2S_DMA_REQUEST_NUMBER_1) {
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pI2S->DMA1 &= ~(0x0F << 8);
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pI2S->DMA1 |= depth << 8;
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}
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else {
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pI2S->DMA2 &= ~(0x0F << 8);
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pI2S->DMA2 |= depth << 8;
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}
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}
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else {
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if (DMANum == IP_I2S_DMA_REQUEST_NUMBER_1) {
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pI2S->DMA1 &= ~(0x0F << 16);
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pI2S->DMA1 |= depth << 16;
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}
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else {
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pI2S->DMA2 &= ~(0x0F << 16);
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pI2S->DMA2 |= depth << 16;
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}
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}
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}
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/* I2S IRQ functions ----------------*/
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/* Enable/Disable interrupt for the I2S */
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void IP_I2S_InterruptCmd(IP_I2S_001_Type *pI2S, uint8_t TRMode, FunctionalState NewState)
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{
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if (NewState == ENABLE) {
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pI2S->IRQ |= (TRMode == I2S_RX_MODE) ? 0x01 : 0x02;
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}
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else {
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pI2S->IRQ &= (TRMode == I2S_RX_MODE) ? (~0x01) : (~0x02);
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}
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}
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/* Set the FIFO level on which to create an irq request */
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void IP_I2S_SetFIFODepthIRQ(IP_I2S_001_Type *pI2S, uint8_t TRMode, uint32_t depth)
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{
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depth &= 0x0F;
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if (TRMode == I2S_RX_MODE) {
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pI2S->IRQ &= ~I2S_IRQ_RX_DEPTH_MASK;
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pI2S->IRQ |= I2S_IRQ_RX_DEPTH(depth);
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}
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else {
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pI2S->IRQ &= ~I2S_IRQ_TX_DEPTH_MASK;
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pI2S->IRQ |= I2S_IRQ_TX_DEPTH(depth);
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}
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}
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/* Get the status of I2S interrupt */
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Status IP_I2S_GetIntStatus(IP_I2S_001_Type *pI2S, uint8_t TRMode)
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{
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if (TRMode == I2S_TX_MODE) {
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return (Status) (((pI2S->IRQ >> 1) & 0x01) & ((pI2S->STATE) & 0x01));
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}
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else {
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return (Status) (((pI2S->IRQ) & 0x01) & ((pI2S->STATE) & 0x01));
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}
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}
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