439 lines
11 KiB
C
439 lines
11 KiB
C
/*
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* File : usart.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006, RT-Thread Development Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Change Logs:
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* Date Author Notes
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* 2011-01-13 weety first version
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* 2013-07-21 weety using serial component
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*/
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#include <rtthread.h>
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#include <rthw.h>
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#include <at91sam926x.h>
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#include <rtdevice.h>
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#define RXRDY 0x01
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#define TXRDY (1 << 1)
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typedef struct uartport
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{
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volatile rt_uint32_t CR;
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volatile rt_uint32_t MR;
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volatile rt_uint32_t IER;
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volatile rt_uint32_t IDR;
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volatile rt_uint32_t IMR;
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volatile rt_uint32_t CSR;
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volatile rt_uint32_t RHR;
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volatile rt_uint32_t THR;
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volatile rt_uint32_t BRGR;
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volatile rt_uint32_t RTOR;
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volatile rt_uint32_t TTGR;
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volatile rt_uint32_t reserved0[5];
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volatile rt_uint32_t FIDI;
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volatile rt_uint32_t NER;
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volatile rt_uint32_t reserved1;
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volatile rt_uint32_t IFR;
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volatile rt_uint32_t reserved2[44];
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volatile rt_uint32_t RPR;
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volatile rt_uint32_t RCR;
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volatile rt_uint32_t TPR;
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volatile rt_uint32_t TCR;
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volatile rt_uint32_t RNPR;
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volatile rt_uint32_t RNCR;
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volatile rt_uint32_t TNPR;
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volatile rt_uint32_t TNCR;
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volatile rt_uint32_t PTCR;
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volatile rt_uint32_t PTSR;
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}uartport;
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#define CIDR FIDI
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#define EXID NER
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#define FNR reserved1
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#define DBGU ((struct uartport *)AT91SAM9260_BASE_DBGU)
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#define UART0 ((struct uartport *)AT91SAM9260_BASE_US0)
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#define UART1 ((struct uartport *)AT91SAM9260_BASE_US1)
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#define UART2 ((struct uartport *)AT91SAM9260_BASE_US2)
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#define UART3 ((struct uartport *)AT91SAM9260_BASE_US3)
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struct at91_uart {
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uartport *port;
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int irq;
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};
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/**
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* This function will handle serial
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*/
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void rt_at91_usart_handler(int vector, void *param)
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{
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int status;
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struct at91_uart *uart;
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rt_device_t dev = (rt_device_t)param;
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uart = (struct at91_uart *)dev->user_data;
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status = uart->port->CSR;
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if (!(status & uart->port->IMR))
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{
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return;
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}
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rt_interrupt_enter();
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rt_hw_serial_isr(dev);
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rt_interrupt_leave();
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}
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/**
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* UART device in RT-Thread
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*/
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static rt_err_t at91_usart_configure(struct rt_serial_device *serial,
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struct serial_configure *cfg)
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{
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int div;
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int mode = 0;
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struct at91_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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RT_ASSERT(cfg != RT_NULL);
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uart = (struct at91_uart *)serial->parent.user_data;
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uart->port->CR = AT91_US_RSTTX | AT91_US_RSTRX |
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AT91_US_RXDIS | AT91_US_TXDIS;
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mode |= AT91_US_USMODE_NORMAL | AT91_US_USCLKS_MCK |
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AT91_US_CHMODE_NORMAL;
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switch (cfg->data_bits)
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{
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case DATA_BITS_8:
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mode |= AT91_US_CHRL_8;
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break;
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case DATA_BITS_7:
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mode |= AT91_US_CHRL_7;
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break;
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case DATA_BITS_6:
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mode |= AT91_US_CHRL_6;
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break;
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case DATA_BITS_5:
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mode |= AT91_US_CHRL_5;
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break;
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default:
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mode |= AT91_US_CHRL_8;
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break;
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}
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switch (cfg->stop_bits)
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{
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case STOP_BITS_2:
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mode |= AT91_US_NBSTOP_2;
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break;
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case STOP_BITS_1:
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default:
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mode |= AT91_US_NBSTOP_1;
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break;
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}
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switch (cfg->parity)
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{
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case PARITY_ODD:
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mode |= AT91_US_PAR_ODD;
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break;
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case PARITY_EVEN:
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mode |= AT91_US_PAR_EVEN;
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break;
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case PARITY_NONE:
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default:
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mode |= AT91_US_PAR_NONE;
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break;
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}
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uart->port->MR = mode;
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div = (clk_get_rate(clk_get("mck")) / 16 + cfg->baud_rate/2) / cfg->baud_rate;
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uart->port->BRGR = div;
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uart->port->CR = AT91_US_RXEN | AT91_US_TXEN;
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uart->port->IER = 0x01;
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return RT_EOK;
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}
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static rt_err_t at91_usart_control(struct rt_serial_device *serial,
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int cmd, void *arg)
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{
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struct at91_uart* uart;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct at91_uart *)serial->parent.user_data;
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switch (cmd)
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{
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case RT_DEVICE_CTRL_CLR_INT:
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/* disable rx irq */
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rt_hw_interrupt_mask(uart->irq);
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break;
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case RT_DEVICE_CTRL_SET_INT:
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/* enable rx irq */
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rt_hw_interrupt_umask(uart->irq);
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break;
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}
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return RT_EOK;
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}
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static int at91_usart_putc(struct rt_serial_device *serial, char c)
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{
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rt_uint32_t level;
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struct at91_uart *uart = serial->parent.user_data;
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while (!(uart->port->CSR & TXRDY));
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uart->port->THR = c;
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return 1;
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}
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static int at91_usart_getc(struct rt_serial_device *serial)
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{
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int result;
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struct at91_uart *uart = serial->parent.user_data;
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if (uart->port->CSR & RXRDY)
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{
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result = uart->port->RHR & 0xff;
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}
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else
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{
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result = -1;
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}
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return result;
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}
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static const struct rt_uart_ops at91_usart_ops =
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{
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at91_usart_configure,
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at91_usart_control,
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at91_usart_putc,
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at91_usart_getc,
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};
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#if defined(RT_USING_DBGU)
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static struct rt_serial_device serial_dbgu;
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static struct serial_ringbuffer dbgu_int_rx;
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struct at91_uart dbgu = {
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DBGU,
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AT91_ID_SYS
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};
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#endif
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#if defined(RT_USING_UART0)
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static struct rt_serial_device serial0;
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static struct serial_ringbuffer uart0_int_rx;
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struct at91_uart uart0 = {
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UART0,
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AT91SAM9260_ID_US0
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};
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#endif
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#if defined(RT_USING_UART1)
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static struct rt_serial_device serial1;
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static struct serial_ringbuffer uart1_int_rx;
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struct at91_uart uart1 = {
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UART1,
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AT91SAM9260_ID_US1
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};
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#endif
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#if defined(RT_USING_UART2)
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static struct rt_serial_device serial2;
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static struct serial_ringbuffer uart2_int_rx;
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struct at91_uart uart2 = {
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UART2,
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AT91SAM9260_ID_US2
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};
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#endif
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#if defined(RT_USING_UART3)
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static struct rt_serial_device serial3;
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static struct serial_ringbuffer uart3_int_rx;
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struct at91_uart uart3 = {
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UART3,
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AT91SAM9260_ID_US3
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};
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#endif
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void at91_usart_gpio_init(void)
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{
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rt_uint32_t val;
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#ifdef RT_USING_DBGU
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at91_sys_write(AT91_PIOB + PIO_IDR, (1<<14)|(1<<15));
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//at91_sys_write(AT91_PIOB + PIO_PUER, (1<<6));
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at91_sys_write(AT91_PIOB + PIO_PUDR, (1<<14)|(1<<15));
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at91_sys_write(AT91_PIOB + PIO_ASR, (1<<14)|(1<<15));
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at91_sys_write(AT91_PIOB + PIO_PDR, (1<<14)|(1<<15));
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at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
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#endif
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#ifdef RT_USING_UART0
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at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US0);
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at91_sys_write(AT91_PIOB + PIO_IDR, (1<<4)|(1<<5));
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at91_sys_write(AT91_PIOB + PIO_PUER, (1<<4));
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at91_sys_write(AT91_PIOB + PIO_PUDR, (1<<5));
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at91_sys_write(AT91_PIOB + PIO_ASR, (1<<4)|(1<<5));
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at91_sys_write(AT91_PIOB + PIO_PDR, (1<<4)|(1<<5));
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#endif
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#ifdef RT_USING_UART1
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at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US1);
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at91_sys_write(AT91_PIOB + PIO_IDR, (1<<6)|(1<<7));
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at91_sys_write(AT91_PIOB + PIO_PUER, (1<<6));
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at91_sys_write(AT91_PIOB + PIO_PUDR, (1<<7));
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at91_sys_write(AT91_PIOB + PIO_ASR, (1<<6)|(1<<7));
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at91_sys_write(AT91_PIOB + PIO_PDR, (1<<6)|(1<<7));
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#endif
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#ifdef RT_USING_UART2
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at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US2);
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at91_sys_write(AT91_PIOB + PIO_IDR, (1<<8)|(1<<9));
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at91_sys_write(AT91_PIOB + PIO_PUER, (1<<8));
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at91_sys_write(AT91_PIOB + PIO_PUDR, (1<<9));
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at91_sys_write(AT91_PIOB + PIO_ASR, (1<<8)|(1<<9));
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at91_sys_write(AT91_PIOB + PIO_PDR, (1<<8)|(1<<9));
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#endif
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#ifdef RT_USING_UART3
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at91_sys_write(AT91_PMC_PCER, 1<<AT91SAM9260_ID_US3);
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at91_sys_write(AT91_PIOB + PIO_IDR, (1<<10)|(1<<11));
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at91_sys_write(AT91_PIOB + PIO_PUER, (1<<10));
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at91_sys_write(AT91_PIOB + PIO_PUDR, (1<<11));
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at91_sys_write(AT91_PIOB + PIO_ASR, (1<<10)|(1<<11));
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at91_sys_write(AT91_PIOB + PIO_PDR, (1<<10)|(1<<11));
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#endif
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}
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/**
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* This function will handle init uart
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*/
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void rt_hw_uart_init(void)
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{
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at91_usart_gpio_init();
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#if defined(RT_USING_DBGU)
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serial_dbgu.ops = &at91_usart_ops;
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serial_dbgu.int_rx = &dbgu_int_rx;
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serial_dbgu.config.baud_rate = BAUD_RATE_115200;
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serial_dbgu.config.bit_order = BIT_ORDER_LSB;
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serial_dbgu.config.data_bits = DATA_BITS_8;
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serial_dbgu.config.parity = PARITY_NONE;
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serial_dbgu.config.stop_bits = STOP_BITS_1;
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serial_dbgu.config.invert = NRZ_NORMAL;
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/* register vcom device */
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rt_hw_serial_register(&serial_dbgu, "dbgu",
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
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&dbgu);
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#endif
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#if defined(RT_USING_UART0)
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serial0.ops = &at91_usart_ops;
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serial0.int_rx = &uart0_int_rx;
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serial0.config.baud_rate = BAUD_RATE_115200;
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serial0.config.bit_order = BIT_ORDER_LSB;
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serial0.config.data_bits = DATA_BITS_8;
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serial0.config.parity = PARITY_NONE;
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serial0.config.stop_bits = STOP_BITS_1;
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serial0.config.invert = NRZ_NORMAL;
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/* register vcom device */
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rt_hw_serial_register(&serial0, "uart0",
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
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&uart0);
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rt_hw_interrupt_install(uart0.irq, rt_at91_usart_handler,
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(void *)&(serial0.parent), "UART0");
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rt_hw_interrupt_umask(uart0.irq);
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#endif
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#if defined(RT_USING_UART1)
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serial1.ops = &at91_usart_ops;
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serial1.int_rx = &uart1_int_rx;
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serial1.config.baud_rate = BAUD_RATE_115200;
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serial1.config.bit_order = BIT_ORDER_LSB;
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serial1.config.data_bits = DATA_BITS_8;
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serial1.config.parity = PARITY_NONE;
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serial1.config.stop_bits = STOP_BITS_1;
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serial1.config.invert = NRZ_NORMAL;
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/* register vcom device */
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rt_hw_serial_register(&serial1, "uart1",
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
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&uart1);
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rt_hw_interrupt_install(uart1.irq, rt_at91_usart_handler,
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(void *)&(serial1.parent), "UART1");
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rt_hw_interrupt_umask(uart1.irq);
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#endif
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#if defined(RT_USING_UART2)
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serial2.ops = &at91_usart_ops;
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serial2.int_rx = &uart2_int_rx;
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serial2.config.baud_rate = BAUD_RATE_115200;
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serial2.config.bit_order = BIT_ORDER_LSB;
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serial2.config.data_bits = DATA_BITS_8;
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serial2.config.parity = PARITY_NONE;
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serial2.config.stop_bits = STOP_BITS_1;
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serial2.config.invert = NRZ_NORMAL;
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/* register vcom device */
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rt_hw_serial_register(&serial2, "uart2",
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
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&uart2);
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rt_hw_interrupt_install(uart2.irq, rt_at91_usart_handler,
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(void *)&(serial2.parent), "UART2");
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rt_hw_interrupt_umask(uart2.irq);
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#endif
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#if defined(RT_USING_UART3)
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serial3.ops = &at91_usart_ops;
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serial3.int_rx = &uart3_int_rx;
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serial3.config.baud_rate = BAUD_RATE_115200;
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serial3.config.bit_order = BIT_ORDER_LSB;
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serial3.config.data_bits = DATA_BITS_8;
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serial3.config.parity = PARITY_NONE;
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serial3.config.stop_bits = STOP_BITS_1;
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serial3.config.invert = NRZ_NORMAL;
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/* register vcom device */
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rt_hw_serial_register(&serial3, "uart3",
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
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&uart3);
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rt_hw_interrupt_install(uart3.irq, rt_at91_usart_handler,
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(void *)&(serial3.parent), "UART3");
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rt_hw_interrupt_umask(uart3.irq);
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#endif
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}
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#ifdef RT_USING_DBGU
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void rt_dbgu_isr(void)
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{
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rt_at91_usart_handler(dbgu.irq, &(serial_dbgu.parent));
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}
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#endif
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