133 lines
2.7 KiB
ArmAsm
133 lines
2.7 KiB
ArmAsm
/*
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* File : start_gcc.S
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* Change Logs:
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* Date Author Notes
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* 2010-05-17 swkyer first version
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* 2010-09-04 bernard porting to Jz47xx
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*/
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#include "../common/mips.inc"
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#include "../common/stackframe.h"
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#include "soc3210.h"
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.section ".start", "ax"
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.set noreorder
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/* the program entry */
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.globl _start
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_start:
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.set noreorder
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la ra, _start
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/* disable interrupt */
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mfc0 t0, CP0_STATUS
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and t0, 0xfffffffe # By default it will be disabled.
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mtc0 t0, CP0_STATUS # Set CPU to disable interrupt.
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nop
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/* disable cache */
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mfc0 t0, CP0_CONFIG
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and t0, 0xfffffff8
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or t0, 0x2 # disable,!default value is not it!
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mtc0 t0, CP0_CONFIG # Set CPU to disable cache.
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nop
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/* setup stack pointer */
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li sp, SYSTEM_STACK
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la gp, _gp
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/* copy IRAM section */
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la t0, _iramcopy
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la t1, _iramstart
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la t2, _iramend
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_iram_loop:
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lw t3, 0(t0)
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sw t3, 0(t1)
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addiu t1, 4
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bne t1, t2, _iram_loop
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addiu t0, 4
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/* clear bss */
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la t0, __bss_start
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la t1, __bss_end
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_clr_bss_loop:
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sw zero, 0(t0)
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bne t0, t1, _clr_bss_loop
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addiu t0, t0, 4
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/* jump to RT-Thread RTOS */
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jal rtthread_startup
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nop
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/* restart, never die */
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j _start
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nop
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.set reorder
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.globl cp0_get_cause
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cp0_get_cause:
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mfc0 v0, CP0_CAUSE
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jr ra
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nop
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.globl cp0_get_status
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cp0_get_status:
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mfc0 v0, CP0_STATUS
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jr ra
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nop
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.globl cp0_get_hi
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cp0_get_hi:
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mfhi v0
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jr ra
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nop
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.globl cp0_get_lo
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cp0_get_lo:
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mflo v0
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jr ra
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nop
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.extern tlb_refill_handler
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.extern cache_error_handler
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/* Exception Handler */
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/* 0x0 - TLB refill handler */
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.section .vectors.1, "ax", %progbits
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j tlb_refill_handler
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nop
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/* 0x100 - Cache error handler */
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.section .vectors.2, "ax", %progbits
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j cache_error_handler
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nop
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/* 0x180 - Exception/Interrupt handler */
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.section .vectors.3, "ax", %progbits
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j _general_exception_handler
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nop
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/* 0x200 - Special Exception Interrupt handler (when IV is set in CP0_CAUSE) */
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.section .vectors.4, "ax", %progbits
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j _irq_handler
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nop
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.section .vectors, "ax", %progbits
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.extern mips_irq_handle
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/* general exception handler */
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_general_exception_handler:
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.set noreorder
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la k0, mips_irq_handle
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jr k0
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nop
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.set reorder
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/* interrupt handler */
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_irq_handler:
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.set noreorder
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la k0, mips_irq_handle
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jr k0
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nop
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.set reorder
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