127 lines
3.4 KiB
C
127 lines
3.4 KiB
C
/*
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* File : board.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2009 RT-Thread Develop Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2009-01-05 Bernard first implementation
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*/
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#include <stdint.h>
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#include <rthw.h>
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#include <rtthread.h>
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#include "board.h"
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#include "usart.h"
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/* ARM PLL configuration for RUN mode */
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const clock_arm_pll_config_t armPllConfig = { .loopDivider = 100U };
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/* SYS PLL configuration for RUN mode */
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const clock_sys_pll_config_t sysPllConfig = { .loopDivider = 1U };
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/* USB1 PLL configuration for RUN mode */
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const clock_usb_pll_config_t usb1PllConfig = { .loopDivider = 0U };
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static void BOARD_BootClockGate(void)
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{
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/* Disable all unused peripheral clock */
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CCM->CCGR0 = 0x00C0000FU;
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CCM->CCGR1 = 0x30000000U;
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CCM->CCGR2 = 0x003F0030U;
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CCM->CCGR3 = 0xF0000330U;
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CCM->CCGR4 = 0x0000FF3CU;
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CCM->CCGR5 = 0xF000330FU;
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CCM->CCGR6 = 0x00FC0300U;
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}
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static void BOARD_BootClockRUN(void)
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{
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/* Boot ROM did initialize the XTAL, here we only sets external XTAL OSC freq */
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CLOCK_SetXtalFreq(24000000U);
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CLOCK_SetRtcXtalFreq(32768U);
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CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0x1); /* Set PERIPH_CLK2 MUX to OSC */
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CLOCK_SetMux(kCLOCK_PeriphMux, 0x1); /* Set PERIPH_CLK MUX to PERIPH_CLK2 */
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/* Setting the VDD_SOC to 1.5V. It is necessary to config AHB to 600Mhz */
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DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x12);
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CLOCK_InitArmPll(&armPllConfig); /* Configure ARM PLL to 1200M */
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#ifndef SKIP_SYSCLK_INIT
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CLOCK_InitSysPll(&sysPllConfig); /* Configure SYS PLL to 528M */
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#endif
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#ifndef SKIP_USB_PLL_INIT
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CLOCK_InitUsb1Pll(&usb1PllConfig); /* Configure USB1 PLL to 480M */
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#endif
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CLOCK_SetDiv(kCLOCK_ArmDiv, 0x1); /* Set ARM PODF to 0, divide by 2 */
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CLOCK_SetDiv(kCLOCK_AhbDiv, 0x0); /* Set AHB PODF to 0, divide by 1 */
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CLOCK_SetDiv(kCLOCK_IpgDiv, 0x3); /* Set IPG PODF to 3, divede by 4 */
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CLOCK_SetMux(kCLOCK_PrePeriphMux, 0x3); /* Set PRE_PERIPH_CLK to PLL1, 1200M */
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CLOCK_SetMux(kCLOCK_PeriphMux, 0x0); /* Set PERIPH_CLK MUX to PRE_PERIPH_CLK */
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/* Disable unused clock */
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BOARD_BootClockGate();
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/* Power down all unused PLL */
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CLOCK_DeinitAudioPll();
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CLOCK_DeinitVideoPll();
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CLOCK_DeinitEnetPll();
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CLOCK_DeinitUsb2Pll();
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/* Configure UART divider to default */
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CLOCK_SetMux(kCLOCK_UartMux, 0); /* Set UART source to PLL3 80M */
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CLOCK_SetDiv(kCLOCK_UartDiv, 0); /* Set UART divider to 1 */
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/* Update core clock */
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SystemCoreClockUpdate();
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}
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/**
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* This is the timer interrupt service routine.
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*
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*/
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void SysTick_Handler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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rt_tick_increase();
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/* leave interrupt */
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rt_interrupt_leave();
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}
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/**
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* This function will initial LPC8XX board.
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*/
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void rt_hw_board_init()
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{
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BOARD_BootClockRUN();
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SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
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extern int imxrt_hw_usart_init(void);
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imxrt_hw_usart_init();
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#ifdef RT_USING_COMPONENTS_INIT
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rt_components_board_init();
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#endif
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#ifdef RT_USING_CONSOLE
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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#endif
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#ifdef RT_USING_HEAP
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rt_system_heap_init((void*)HEAP_BEGIN, (void*)HEAP_END);
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#endif
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}
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/*@}*/
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