chinky/rtt-f030
chinky
/
rtt-f030
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity
rtt-f030/bsp/stmsky001/project.Uv2

171 lines
6.0 KiB
Plaintext
Raw Blame History

### uVision2 Project, (C) Keil Software
### Do not modify !
Target (RT-Thread/STM32Sky), 0x0004 // Tools: 'ARM-ADS'
Group (Startup)
Group (Library)
Group (Kernel)
Group (STM32)
Group (finsh)
File 1,1,<.\application.c><application.c>
File 1,1,<.\board.c><board.c>
File 1,1,<.\startup.c><startup.c>
File 1,2,<.\cortexm3_macro.s><cortexm3_macro.s>
File 1,1,<.\stm32f10x_it.c><stm32f10x_it.c>
File 1,5,<.\stm32f10x_conf.h><stm32f10x_conf.h>
File 1,5,<.\rtconfig.h><rtconfig.h>
File 1,1,<.\usart.c><usart.c>
File 1,1,<.\rtc.c><rtc.c>
File 2,1,<.\library\src\stm32f10x_adc.c><stm32f10x_adc.c>
File 2,1,<.\library\src\stm32f10x_bkp.c><stm32f10x_bkp.c>
File 2,1,<.\library\src\stm32f10x_can.c><stm32f10x_can.c>
File 2,1,<.\library\src\stm32f10x_crc.c><stm32f10x_crc.c>
File 2,1,<.\library\src\stm32f10x_dac.c><stm32f10x_dac.c>
File 2,1,<.\library\src\stm32f10x_dbgmcu.c><stm32f10x_dbgmcu.c>
File 2,1,<.\library\src\stm32f10x_dma.c><stm32f10x_dma.c>
File 2,1,<.\library\src\stm32f10x_exti.c><stm32f10x_exti.c>
File 2,1,<.\library\src\stm32f10x_flash.c><stm32f10x_flash.c>
File 2,1,<.\library\src\stm32f10x_fsmc.c><stm32f10x_fsmc.c>
File 2,1,<.\library\src\stm32f10x_gpio.c><stm32f10x_gpio.c>
File 2,1,<.\library\src\stm32f10x_i2c.c><stm32f10x_i2c.c>
File 2,1,<.\library\src\stm32f10x_iwdg.c><stm32f10x_iwdg.c>
File 2,1,<.\library\src\stm32f10x_lib.c><stm32f10x_lib.c>
File 2,1,<.\library\src\stm32f10x_nvic.c><stm32f10x_nvic.c>
File 2,1,<.\library\src\stm32f10x_pwr.c><stm32f10x_pwr.c>
File 2,1,<.\library\src\stm32f10x_rcc.c><stm32f10x_rcc.c>
File 2,1,<.\library\src\stm32f10x_rtc.c><stm32f10x_rtc.c>
File 2,1,<.\library\src\stm32f10x_sdio.c><stm32f10x_sdio.c>
File 2,1,<.\library\src\stm32f10x_spi.c><stm32f10x_spi.c>
File 2,1,<.\library\src\stm32f10x_systick.c><stm32f10x_systick.c>
File 2,1,<.\library\src\stm32f10x_tim.c><stm32f10x_tim.c>
File 2,1,<.\library\src\stm32f10x_usart.c><stm32f10x_usart.c>
File 2,1,<.\library\src\stm32f10x_wwdg.c><stm32f10x_wwdg.c>
File 3,1,<..\..\src\clock.c><clock.c>
File 3,1,<..\..\src\idle.c><idle.c>
File 3,1,<..\..\src\ipc.c><ipc.c>
File 3,1,<..\..\src\mem.c><mem.c>
File 3,1,<..\..\src\mempool.c><mempool.c>
File 3,1,<..\..\src\object.c><object.c>
File 3,1,<..\..\src\scheduler.c><scheduler.c>
File 3,1,<..\..\src\thread.c><thread.c>
File 3,1,<..\..\src\timer.c><timer.c>
File 3,1,<..\..\src\irq.c><irq.c>
File 3,1,<..\..\src\kservice.c><kservice.c>
File 3,1,<..\..\src\device.c><device.c>
File 3,1,<..\..\src\slab.c><slab.c>
File 4,1,<..\..\libcpu\arm\stm32\stack.c><stack.c>
File 4,1,<..\..\libcpu\arm\stm32\interrupt.c><interrupt.c>
File 4,1,<..\..\libcpu\arm\stm32\cpu.c><cpu.c>
File 4,1,<..\..\libcpu\arm\stm32\serial.c><serial.c>
File 4,2,<..\..\libcpu\arm\stm32\context_rvds.S><context_rvds.S>
File 4,2,<..\..\libcpu\arm\stm32\start_rvds.s><start_rvds.s>
File 4,1,<..\..\libcpu\arm\stm32\fault.c><fault.c>
File 4,2,<..\..\libcpu\arm\stm32\fault_rvds.S><fault_rvds.S>
File 5,1,<..\..\finsh\finsh_compiler.c><finsh_compiler.c>
File 5,1,<..\..\finsh\finsh_error.c><finsh_error.c>
File 5,1,<..\..\finsh\finsh_heap.c><finsh_heap.c>
File 5,1,<..\..\finsh\finsh_init.c><finsh_init.c>
File 5,1,<..\..\finsh\finsh_node.c><finsh_node.c>
File 5,1,<..\..\finsh\finsh_ops.c><finsh_ops.c>
File 5,1,<..\..\finsh\finsh_parser.c><finsh_parser.c>
File 5,1,<..\..\finsh\finsh_token.c><finsh_token.c>
File 5,1,<..\..\finsh\finsh_var.c><finsh_var.c>
File 5,1,<..\..\finsh\finsh_vm.c><finsh_vm.c>
File 5,1,<..\..\finsh\shell.c><shell.c>
File 5,1,<..\..\finsh\symbol.c><symbol.c>
File 5,1,<..\..\finsh\cmd.c><cmd.c>
Options 1,0,0 // Target 'RT-Thread/STM32Sky'
Device (STM32F103ZE)
Vendor (STMicroelectronics)
Cpu (IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x807FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3"))
FlashUt ()
StupF ("STARTUP\ST\STM32F10x.s" ("STM32 Startup Code"))
FlashDR (UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_512 -FS08000000 -FL080000))
DevID (4216)
Rgf (stm32f10x_lib.h)
Mem ()
C ()
A ()
RL ()
OH ()
DBC_IFX ()
DBC_CMS ()
DBC_AMS ()
DBC_LMS ()
UseEnv=0
EnvBin ()
EnvInc ()
EnvLib ()
EnvReg (<28>ST\STM32F10x\)
OrgReg (<28>ST\STM32F10x\)
TgStat=16
OutDir (.\obj\)
OutName (rtthread-stm32)
GenApp=1
GenLib=0
GenHex=1
Debug=1
Browse=1
LstDir (.\obj\)
HexSel=1
MG32K=0
TGMORE=0
RunUsr 0 0 <>
RunUsr 1 0 <>
BrunUsr 0 0 <>
BrunUsr 1 0 <>
CrunUsr 0 0 <>
CrunUsr 1 0 <>
SVCSID <>
GLFLAGS=1790
ADSFLGA { 243,31,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ACPUTYP ("Cortex-M3")
RVDEV ()
ADSTFLGA { 0,12,0,2,99,0,1,66,0,0,0,0,0,0,0,0,0,0,0,0 }
OCMADSOCM { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
OCMADSIRAM { 0,0,0,0,32,0,0,1,0 }
OCMADSIROM { 1,0,0,0,8,0,0,8,0 }
OCMADSXRAM { 0,0,0,0,0,0,0,0,0 }
OCR_RVCT { 1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,8,0,0,8,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,32,0,0,1,0,0,0,0,0,0,0,0,0,0 }
RV_STAVEC ()
ADSCCFLG { 5,0,0,4,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSCMISC ()
ADSCDEFN ()
ADSCUDEF ()
ADSCINCD (.;.\library\inc;.\library\src;..\..\include;..\..\libcpu\arm\stm32;..\..\finsh)
ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSAMISC ()
ADSADEFN ()
ADSAUDEF ()
ADSAINCD ()
PropFld { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
IncBld=1
AlwaysBuild=0
GenAsm=0
AsmAsm=0
PublicsOnly=0
StopCode=3
CustArgs ()
LibMods ()
ADSLDFG { 17,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSLDTA (0x08000000)
ADSLDDA (0x20000000)
ADSLDSC ()
ADSLDIB ()
ADSLDIC ()
ADSLDMC (--keep __fsym_* --keep __vsym_*)
ADSLDIF ()
ADSLDDW ()
OPTDL (SARMCM3.DLL)()(DARMSTM.DLL)(-pSTM32F103ZE)(SARMCM3.DLL)()(TARMSTM.DLL)(-pSTM32F103ZE)
OPTDBG 48117,7,()()()()()()()()()() (Segger\JL2CM3.dll)()()()
FLASH1 { 9,0,0,0,1,0,0,0,5,16,0,0,0,0,0,0,0,0,0,0 }
FLASH2 (Segger\JLTAgdi.dll)
FLASH3 ("" ())
FLASH4 ()
EndOpt
Reference in New Issue View Git Blame Copy Permalink