chinky/rtt-f030
chinky
/
rtt-f030
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity
2,678 Commits 12 Branches 0 Tags 254 MiB
Commit Graph

212 Commits

Author SHA1 Message Date
aozima f9e673354a update libcpu/arm/cortex-m4: restore MSP. 2013-06-22 18:59:49 +08:00
Bernard Xiong 3071e35c54 Merge pull request #109 from grissiom/rm48x50 
Rm48x50
 2013-06-19 01:29:12 -07:00
visitor83 c986754c49 Signed-off-by: visitor83 <wolflouiswang@gmail.com> 
format the s3c24x0 serial.c and mini2440 rtconfig.py
 2013-06-18 12:51:55 +08:00
visitor83 c56fa7c907 ident format 
Signed-off-by: visitor83 <root@wolflouis.(none)>
 2013-06-16 10:00:34 +08:00
Grissiom 009239ceed rm48x50: rt_interrupt_nest should be `volatile rt_uint8_t` 2013-06-12 23:56:10 +08:00
Grissiom 9b949c28b7 rm48x50: add cache_{enable, disable} 2013-06-12 21:03:04 +08:00
Grissiom e8bbbe6788 cortex-r4: wrap asm functions with .asmfunc/.endasmfunc 2013-06-05 23:21:06 +08:00
Grissiom 228a6be077 cortex-r4: add __rt_ffs 2013-06-05 23:20:39 +08:00
Grissiom e74befca44 move libcpu/arm/rm48x50/ to libcpu/arm/cortex-r4 2013-05-31 21:06:26 +08:00
Grissiom 24fc6e6ebb rm48x50: VFP lazy stacking 
You need to turn on RT_VFP_LAZY_STACKING in rtconfig.h. By default, RTT
will turn on VFP for all threads and stack all the VFP registers. When
doing lazy stacking, VFP will only be turned on for the thread who
issued VFP instructions.

Currently, if a thread turned on VFP, it cannot be turned off. RTT will
never know what time the thread doesn't need VFP any more. The thread
might could turn off the VFP for it self in proper time.
 2013-05-31 20:58:08 +08:00
Grissiom 8bbfd45ce3 rm48x50: change STMFD/LDMFD to STMDB/LDMIA 
VFP instructions only have IA(Increment After)/DB(Decrement Before)
mode. To keep consistency, just change STM/LDM to DB/IA accordingly.
 2013-05-31 18:38:42 +08:00
Grissiom ec1203bfab rm48x50: turn on VFP support 
This support Common VFPv2 sub-architecture.
 2013-05-31 18:32:21 +08:00
Grissiom 83ea4dd628 rm48x50: small cleanup on context_ccs.asm 2013-05-30 17:37:50 +08:00
Grissiom 810311b624 rm48x50: fix bug in rt_hw_interrupt_{mask,unmask} 2013-05-29 23:36:32 +08:00
Grissiom f08df08897 rm48x50: optimize a BEQ 
Use condition flag in the ORR. This could eliminate a BEQ.
 2013-05-26 23:37:56 +08:00
Grissiom 19fe6251e7 rm48x50: optimize context_switch_interrupt_to by reuse registers 
When saving thread registers in context_switch_interrupt_to, we don't
change them, just move them. So there is no need to always r0-r3 from
stack to the real r0-r3. So just use the intermediate registers and
eliminate 2 MOV.
 2013-05-26 22:37:49 +08:00
Grissiom 3d0647efb3 rm48x50: optimize context_switch_interrupt_do 
Substitude STMFD, MOV, ADD with STMFD, SUB. It reduce one instruction.
Tested on board and it works like a charm.
 2013-05-26 17:22:36 +08:00
Grissiom b39d038cf0 rm48x50: utilize CPS instruction and remove some useless code 2013-05-26 16:55:39 +08:00
Grissiom f51bce3fed add rm48x50 bsp and libcpu 
We currently only support building with CCS and SCons is not using.
bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file.
You may need to regenerate the source file as you like, providing that:

    1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The
    channel 5 in enabled and connected to IRQ.

    2, RTI driver is enabled and compare3 source is selected to counter1
    and the compare3 will generate tick in the period of 10ms. This
    value is coresponding with RT_TICK_PER_SECOND in rtconfig.h.

In CCS, you need to create a new CCS project and create link folders
pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember
to add the include path to the Build Properties.
 2013-05-24 22:55:13 +08:00
yiyue.fang db548a1b37 fixed compiling error related to the RT_USING_INTERRUPT_INFO in mini4020 2013-04-10 00:49:18 +08:00
weety d9d39a8d21 Use SRAM as EMAC transmit buffer, to avoid the underrun error, especially in the large amount of data communication. 2013-04-08 21:57:24 +08:00
weety 0594734d8d clean up code 2013-04-02 20:33:56 +08:00
weety 03aa76155e fixed context thread issue when using armcc compile 2013-04-02 20:27:08 +08:00
weety fb9ea5eada enable at91sam9260 mmu, update SDIO and EMAC drivers 2013-04-02 20:24:51 +08:00
weety 92d4c1939b fixed at91sam9260 context thread issue, avoid idle thread stack overflow 2013-04-02 20:23:11 +08:00
Bernard Xiong c1b600644f Merge pull request #56 from aozima/aozima 
Modify the interrupt interface implementations.
 2013-03-31 04:14:40 -07:00
aozima 2ccb3c7589 update LPC2478: Modify the interrupt interface implementations. 2013-03-31 18:25:51 +08:00
weety 710a0fc4a5 fix issue when print interrupt info 2013-03-31 18:24:51 +08:00
aozima 1549b7db90 update LPC214X: Modify the interrupt interface implementations. 2013-03-31 17:58:26 +08:00
aozima eab20a9975 update AT91SAM7X: Modify the interrupt interface implementations. 2013-03-31 17:43:09 +08:00
aozima 29a3ae4368 update sep4020: Modify the interrupt interface implementations. 2013-03-31 17:32:04 +08:00
aozima fbc1b05dd8 update mini2440: Modify the interrupt interface implementations. 2013-03-31 17:30:30 +08:00
Bernard Xiong 608074deaf update to interrupt description 2013-03-30 08:15:27 +08:00
Bernard Xiong bb72be94b2 code cleanup for interrupt description 2013-03-26 08:52:33 +08:00
weety 5639c5daed implement __rt_ffs for armv5 2013-03-24 16:03:23 +08:00
Bernard Xiong 1abaa0492d implement __rt_ffs in kernel service library 2013-03-23 11:27:29 +08:00
weety 7917cf09e7 remain the old handler to keep forward compatibility 2013-03-19 11:25:46 +08:00
weety 9678ee67e9 Modified the interrupt function comments 2013-03-19 11:25:33 +08:00
weety b21028474b Modify the interrupt interface implementations, changes in the part of the parameter definition. 2013-03-19 11:25:12 +08:00
aozima d80888a194 port stm32f0x to gcc. 2013-02-20 22:03:31 +08:00
Bernard Xiong 72782e9203 convert end of line 2013-01-08 05:05:02 -08:00
Ubuntu ecd66612cf remove lpc122x because there is a common cortex-m0 porting. 2013-01-04 06:03:03 -08:00
bernard.xiong@gmail.com 68fadd9edc Add exception hook function. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2551 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-29 09:36:16 +00:00
dzzxzz@gmail.com 468ade5e98 fixed the coding style in libcpu/arm 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2518 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-24 06:59:14 +00:00
dzzxzz@gmail.com f6629a1e4c rename the file name using low case 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2514 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-24 03:50:42 +00:00
dzzxzz@gmail.com eab30ebbda fixed the fixed the gcc compiling error in ubuntu host OS 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2512 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-24 03:34:04 +00:00
wuyangyong 5be0c53dd8 stack addr align to 8byte. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2509 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-23 07:40:31 +00:00
dzzxzz@gmail.com 2955dbfcda add LPC4330 BSP based on NGX xplorer development board 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2487 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-17 08:21:29 +00:00
bernard.xiong 6ae9a5d95c revert wrongly commit. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2408 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-11-13 08:10:23 +00:00
bernard.xiong f78a50883b remove nuc1xx because there is a cortex-m0 branch. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2407 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-11-13 07:59:28 +00:00