chinky/rtt-f030
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5 Commits

Author SHA1 Message Date
dzzxzz 55a2684e56 improve the renesas M16C porting 
it can be worked in NORMAL or SIMPLE calling convention
and in all the optimize level(none, low, medium, high)

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1691 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-09-02 06:56:22 +00:00
dzzxzz e8a462b5c7 optimize porting for M16C 
void rt_hw_context_switch(rt_uint32_t from, rt_uint32_t to);

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1688 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-09-01 08:25:54 +00:00
dzzxzz 61d969f1b9 merge stack.c and interrupt.c into cpuport.c 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1687 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-09-01 08:05:21 +00:00
dzzxzz fac560d432 add context_iar.S for SCONS 
actually context_iar.S is the same as context_iar.asm
but context_iar.S is used for SCONS, and context_iar.asm is used for IAR

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1272 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-02-16 13:47:44 +00:00
dzzxzz 29db3e3295 get ready for SCONS 
change the m16c assembly extension from s34 to asm
move the m16c porting files to m16c62p directory


git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1270 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-02-16 13:29:09 +00:00