8160a4089a
fixed #1261 , modify "axf" to "elf" in rtconfig.py for GCC Toolchains configuration.
2018-03-07 15:28:51 +08:00
19433e0cf5
update SConscript: support scons 3.
2018-02-06 20:07:28 +08:00
5e3b3b19a6
[BSP] change the type of cmd.
...
1. Change the type of cmd to 'int';
2. Remove RT_LWIP_USING_RT_MEM macro;
2017-10-16 13:23:03 +08:00
1368e01470
[BSP] fix RT_DFS_ELM_MAX_LFN to 255.
2017-04-09 19:23:28 +08:00
81b37fb1f9
lpc43xx: add copy-right info in vbus drivers
2015-01-08 17:16:26 +08:00
05a01884e6
lpc43xx: fix clock configure
2015-01-07 17:15:50 +08:00
11026d0579
lpc43xx: clean the .o before building M0 and M4
...
SCons will omit the file in parent dir of SConstruct somehow and build
the object files in that dir instead of in variant dir. This cause
problem because we cannot mix the object files between M0 and M4 which
SCons failed to rebuild. So we have to manually remove the files before
building.
2015-01-07 17:15:49 +08:00
17a75eaa02
lpc43xx: remove the fpu settings in startup_LPC43xx_M0
2015-01-07 17:15:49 +08:00
22938a93ef
lpc43xx: fix some compile warnings
2015-01-07 17:15:49 +08:00
f7415e595e
VBus: added
...
Currently only lpc43xx is supported.
2015-01-07 17:15:49 +08:00
fcff552626
lpc43xx: fix the SConscripts
2015-01-07 10:25:44 +08:00
03a2847f12
lpc43xx: fix some compile warnings
2015-01-07 10:25:44 +08:00
7965708050
lpc43xx: add -Wall
2015-01-07 10:25:44 +08:00
df31744178
lpc43xx: fix the M0 project template
2015-01-07 10:25:43 +08:00
0ca281c162
lpc43xx: add flash linker script for GCC
2015-01-06 13:40:46 +08:00
bcbe180886
lpc43xx: fix the default RTT_ROOT in SConstruct
2015-01-06 13:39:54 +08:00
fca84daa9d
lpc43xx: fix the startup code for GCC
2015-01-06 12:42:12 +08:00
833339e1c6
lpc43xx: output a newline in the header file
...
Some compiler is brain-damaged that it will yeild a warning for headers
not ended with a newline. Yes, I mean you, Keil.
2015-01-06 11:03:01 +08:00
ff3ab9c0ab
lpc43xx: add readme
2015-01-06 10:46:32 +08:00
090adcf4c0
lpc43xx: don't set the Clock again in M0 core
...
M0 core is always booted by the M4 core. It means that if we are running
in M0, the clock is always configured.
2015-01-06 10:46:32 +08:00
21ef733251
lpc43xx: use the RIT timer as SysTick in M0 core
2015-01-06 10:46:31 +08:00
773a884a4b
lpc43xx: move board.c into M0/M4
2015-01-06 10:46:31 +08:00
d2e4050a70
lpc43xx: update template.uvproj and add sct files
2015-01-06 10:46:31 +08:00
959f6c695f
lpc43xx: move the application code into its own space
2015-01-06 10:46:31 +08:00
5542af8b7c
lpc43xx/driver: fix the VTOR setting
2015-01-06 10:25:43 +08:00
f609a63564
lpc43xx: add uart3 support
2015-01-06 10:25:43 +08:00
a447b5f3cf
lpc43xx: refactor uart drivers
2015-01-06 10:25:43 +08:00
d5332e2799
bsp:fix the bug of lpc43xx uart interrupt enable in driver initialize.
2014-11-03 23:02:36 +08:00
c45f5a2490
[Drivers] re-write serial framework.
2014-07-18 06:45:54 +08:00
7b32a2bd31
lpc43xx:add the linker script file.
2014-07-15 15:42:22 +08:00
67e79c3e97
lpc43xx:update the startup code.
2014-07-15 15:40:05 +08:00
e152b68e33
add the lpc43xx bsp support.
2014-07-13 14:13:39 +08:00
moebius.ever
aozima
bernard
Bernard Xiong
Grissiom
xiaonong