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Merge branch 'master' of https://github.com/RT-Thread/rt-thread

This commit is contained in:
moebius.ever 2018-03-21 15:37:23 +08:00
parent 61946325ee 883290ddef
commit feeff73168
30 changed files with 3701 additions and 2820 deletions
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6
bsp/imxrt1052-evk/.config
View File

@ -130,7 +130,9 @@ CONFIG_RT_USING_I2C_BITOPS=y
CONFIG_RT_USING_PIN=y CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_MTD_NOR is not set # CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set # CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_RTC is not set CONFIG_RT_USING_RTC=y
# CONFIG_RT_USING_SOFT_RTC is not set
# CONFIG_RTC_SYNC_USING_NTP is not set
CONFIG_RT_USING_SDIO=y CONFIG_RT_USING_SDIO=y
# CONFIG_RT_USING_SPI is not set # CONFIG_RT_USING_SPI is not set
# CONFIG_RT_USING_WDT is not set # CONFIG_RT_USING_WDT is not set
@ -312,5 +314,5 @@ CONFIG_LWIP_NETIF_LOOPBACK=0
# CONFIG_PKG_USING_HELLO is not set # CONFIG_PKG_USING_HELLO is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set # CONFIG_PKG_USING_MULTIBUTTON is not set
CONFIG_SOC_IMXRT1052=y CONFIG_SOC_IMXRT1052=y
CONFIG_RT_USING_UART=y
CONFIG_RT_USING_UART1=y CONFIG_RT_USING_UART1=y
CONFIG_RT_USING_HP_RTC=y

16
bsp/imxrt1052-evk/Kconfig
View File

@ -23,13 +23,15 @@ config SOC_IMXRT1052
select ARCH_ARM_CORTEX_M7 select ARCH_ARM_CORTEX_M7
default y default y
config RT_USING_UART if RT_USING_SERIAL
bool "Using RT_USING_UART"
default y
if RT_USING_UART
config RT_USING_UART1 config RT_USING_UART1
bool "Using RT_USING_UART1" bool "Using RT_USING_UART1"
default y default y
endif endif
if RT_USING_RTC
config RT_USING_HP_RTC
bool "Using RT_USING_HP_RTC"
default n
endif

5
bsp/imxrt1052-evk/drivers/SConscript
View File

@ -7,7 +7,7 @@ cwd = os.path.join(str(Dir('#')), 'drivers')
# add the general drivers. # add the general drivers.
src = Split(""" src = Split("""
board.c board.c
usart.c drv_uart.c
hyper_flash_boot.c hyper_flash_boot.c
drv_sdram.c drv_sdram.c
""") """)
@ -18,6 +18,9 @@ CPPDEFINES = []
if GetDepend('RT_USING_PIN'): if GetDepend('RT_USING_PIN'):
src += ['drv_pin.c'] src += ['drv_pin.c']
if GetDepend('RT_USING_HP_RTC'):
src += ['drv_hp_rtc.c']
if GetDepend('RT_USING_LWIP'): if GetDepend('RT_USING_LWIP'):
src += ['drv_eth.c', 'fsl_phy.c'] src += ['drv_eth.c', 'fsl_phy.c']
CPPDEFINES += ['FSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE'] CPPDEFINES += ['FSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE']

2
bsp/imxrt1052-evk/drivers/board.c
View File

@ -16,7 +16,7 @@
#include <rtthread.h> #include <rtthread.h>
#include "board.h" #include "board.h"
#include "usart.h" #include "drv_uart.h"
static struct rt_memheap system_heap; static struct rt_memheap system_heap;

150
bsp/imxrt1052-evk/drivers/drv_hp_rtc.c Normal file
View File

@ -0,0 +1,150 @@
/*
* File : drv_hp_rtc.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006-2013, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2018-03-15 Liuguang the first version.
*/
#include "drv_hp_rtc.h"
#include <time.h>
#include "fsl_common.h"
#include "fsl_snvs_hp.h"
#include "fsl_snvs_lp.h"
#ifdef RT_USING_RTC
#if defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL
#error "Please don't define 'FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL'!"
#endif
static time_t get_timestamp(void)
{
struct tm tm_new = {0};
snvs_hp_rtc_datetime_t rtcDate;
SNVS_HP_RTC_GetDatetime(SNVS, &rtcDate);
tm_new.tm_sec = rtcDate.second;
tm_new.tm_min = rtcDate.minute;
tm_new.tm_hour = rtcDate.hour;
tm_new.tm_mday = rtcDate.day;
tm_new.tm_mon = rtcDate.month - 1;
tm_new.tm_year = rtcDate.year - 1900;
return mktime(&tm_new);
}
static int set_timestamp(time_t timestamp)
{
struct tm *p_tm;
snvs_hp_rtc_datetime_t rtcDate;
p_tm = localtime(&timestamp);
rtcDate.second = p_tm->tm_sec ;
rtcDate.minute = p_tm->tm_min ;
rtcDate.hour = p_tm->tm_hour;
rtcDate.day = p_tm->tm_mday;
rtcDate.month = p_tm->tm_mon + 1;
rtcDate.year = p_tm->tm_year + 1900;
SNVS_HP_RTC_SetDatetime(SNVS, &rtcDate);
return RT_EOK;
}
/* Çý¶¯½Ó¿Ú */
static rt_err_t rt1052_hp_rtc_init(rt_device_t dev)
{
snvs_hp_rtc_config_t snvsRtcConfig;
SNVS_HP_RTC_GetDefaultConfig(&snvsRtcConfig);
SNVS_HP_RTC_Init(SNVS, &snvsRtcConfig);
SNVS_HP_RTC_StartTimer(SNVS);
return RT_EOK;
}
static rt_err_t rt1052_hp_rtc_open(rt_device_t dev, rt_uint16_t oflag)
{
return RT_EOK;
}
static rt_err_t rt1052_hp_rtc_close(rt_device_t dev)
{
return RT_EOK;
}
static rt_size_t rt1052_hp_rtc_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
{
return 0;
}
static rt_size_t rt1052_hp_rtc_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
{
return 0;
}
static rt_err_t rt1052_hp_rtc_control(rt_device_t dev, int cmd, void *args)
{
RT_ASSERT(dev != RT_NULL);
switch(cmd)
{
case RT_DEVICE_CTRL_RTC_GET_TIME:
{
*(uint32_t *)args = get_timestamp();
}
break;
case RT_DEVICE_CTRL_RTC_SET_TIME:
{
set_timestamp(*(time_t *)args);
}
break;
/* ÎÞЧ²ÎÊý */
default:
return RT_EINVAL;
}
return RT_EOK;
}
static struct rt_device device =
{
.type = RT_Device_Class_RTC,
.init = rt1052_hp_rtc_init,
.open = rt1052_hp_rtc_open,
.close = rt1052_hp_rtc_close,
.read = rt1052_hp_rtc_read,
.write = rt1052_hp_rtc_write,
.control = rt1052_hp_rtc_control,
};
int rt_hw_hp_rtc_init(void)
{
rt_err_t ret = RT_EOK;
ret = rt_device_register(&device, "rtc", RT_DEVICE_FLAG_RDWR);
if(ret != RT_EOK)
{
return ret;
}
rt_device_open(&device, RT_DEVICE_OFLAG_RDWR);
return RT_EOK;
}
INIT_DEVICE_EXPORT(rt_hw_hp_rtc_init);
#endif /*RT_USING_RTC */

23
bsp/imxrt1052-evk/drivers/drv_hp_rtc.h Normal file
View File

@ -0,0 +1,23 @@
/*
* File : drv_hp_rtc.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006-2013, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2018-03-15 Liuguang the first version.
*/
#ifndef __DRV_RTC_H__
#define __DRV_RTC_H__
#include <rtthread.h>
#include <rtdevice.h>
int rt_hw_hp_rtc_init(void);
#endif

461
bsp/imxrt1052-evk/drivers/drv_pin.c
View File

@ -9,7 +9,8 @@
* *
* Change Logs: * Change Logs:
* Date Author Notes * Date Author Notes
* 2018-03-13 Liuguang the first version. * 2018-03-13 Liuguang the first version.
* 2018-03-19 Liuguang add GPIO interrupt mode support.
*/ */
#include "drv_pin.h" #include "drv_pin.h"
@ -19,12 +20,10 @@
#ifdef RT_USING_PIN #ifdef RT_USING_PIN
/* GPIO外设时钟会在GPIO_PinInit中自动配置, 如果定义了以下宏则不会自动配置 */
#if defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL #if defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL
#error "Please don't define 'FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL'!" #error "Please don't define 'FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL'!"
#endif #endif
/* RT1052 PIN描述结构体 */
struct rt1052_pin struct rt1052_pin
{ {
rt_uint16_t pin; rt_uint16_t pin;
@ -32,10 +31,18 @@ struct rt1052_pin
rt_uint32_t gpio_pin; rt_uint32_t gpio_pin;
}; };
struct rt1052_irq
{
rt_uint16_t enable;
struct rt_pin_irq_hdr irq_info;
};
#define __ARRAY_LEN(array) (sizeof(array)/sizeof(array[0])) #define __ARRAY_LEN(array) (sizeof(array)/sizeof(array[0]))
#define __RT1052_PIN_DEFAULT {0, 0, 0} #define __RT1052_PIN_DEFAULT {0, 0, 0}
#define __RT1052_PIN(INDEX, PORT, PIN) {INDEX, PORT, PIN} #define __RT1052_PIN(INDEX, PORT, PIN) {INDEX, PORT, PIN}
static struct rt_pin_ops rt1052_pin_ops;
static struct rt1052_pin rt1052_pin_map[] = static struct rt1052_pin rt1052_pin_map[] =
{ {
__RT1052_PIN_DEFAULT, __RT1052_PIN_DEFAULT,
@ -179,6 +186,279 @@ static struct rt1052_pin rt1052_pin_map[] =
__RT1052_PIN(127, GPIO5, 2) /* PMIC_STBY_REQ */ __RT1052_PIN(127, GPIO5, 2) /* PMIC_STBY_REQ */
}; };
static struct rt1052_irq rt1052_irq_map[] =
{
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} },
{PIN_IRQ_DISABLE, {PIN_IRQ_PIN_NONE, PIN_IRQ_MODE_RISING, RT_NULL, RT_NULL} }
};
void gpio_isr(GPIO_Type* base, rt_uint32_t gpio_pin)
{
if((GPIO_PortGetInterruptFlags(base) & (1 << gpio_pin)) != 0)
{
GPIO_PortClearInterruptFlags(base, gpio_pin);
if(rt1052_irq_map[gpio_pin].irq_info.hdr != RT_NULL)
{
rt1052_irq_map[gpio_pin].irq_info.hdr(rt1052_irq_map[gpio_pin].irq_info.args);
}
}
}
void GPIO1_Combined_0_15_IRQHandler(void)
{
rt_uint8_t gpio_pin;
rt_interrupt_enter();
for(gpio_pin = 0; gpio_pin <= 15; gpio_pin++)
{
gpio_isr(GPIO1, gpio_pin);
}
#if defined __CORTEX_M && (__CORTEX_M == 4U)
__DSB();
#endif
rt_interrupt_leave();
}
void GPIO1_Combined_16_31_IRQHandler(void)
{
rt_uint8_t gpio_pin;
rt_interrupt_enter();
for(gpio_pin = 16; gpio_pin <= 31; gpio_pin++)
{
gpio_isr(GPIO1, gpio_pin);
}
#if defined __CORTEX_M && (__CORTEX_M == 4U)
__DSB();
#endif
rt_interrupt_leave();
}
void GPIO2_Combined_0_15_IRQHandler(void)
{
rt_uint8_t gpio_pin;
rt_interrupt_enter();
for(gpio_pin = 0; gpio_pin <= 15; gpio_pin++)
{
gpio_isr(GPIO2, gpio_pin);
}
#if defined __CORTEX_M && (__CORTEX_M == 4U)
__DSB();
#endif
rt_interrupt_leave();
}
void GPIO2_Combined_16_31_IRQHandler(void)
{
rt_uint8_t gpio_pin;
rt_interrupt_enter();
for(gpio_pin = 16; gpio_pin <= 31; gpio_pin++)
{
gpio_isr(GPIO2, gpio_pin);
}
#if defined __CORTEX_M && (__CORTEX_M == 4U)
__DSB();
#endif
rt_interrupt_leave();
}
void GPIO3_Combined_0_15_IRQHandler(void)
{
rt_uint8_t gpio_pin;
rt_interrupt_enter();
for(gpio_pin = 0; gpio_pin <= 15; gpio_pin++)
{
gpio_isr(GPIO3, gpio_pin);
}
#if defined __CORTEX_M && (__CORTEX_M == 4U)
__DSB();
#endif
rt_interrupt_leave();
}
void GPIO3_Combined_16_31_IRQHandler(void)
{
rt_uint8_t gpio_pin;
rt_interrupt_enter();
for(gpio_pin = 16; gpio_pin <= 31; gpio_pin++)
{
gpio_isr(GPIO3, gpio_pin);
}
#if defined __CORTEX_M && (__CORTEX_M == 4U)
__DSB();
#endif
rt_interrupt_leave();
}
void GPIO4_Combined_0_15_IRQHandler(void)
{
rt_uint8_t gpio_pin;
rt_interrupt_enter();
for(gpio_pin = 0; gpio_pin <= 15; gpio_pin++)
{
gpio_isr(GPIO4, gpio_pin);
}
#if defined __CORTEX_M && (__CORTEX_M == 4U)
__DSB();
#endif
rt_interrupt_leave();
}
void GPIO4_Combined_16_31_IRQHandler(void)
{
rt_uint8_t gpio_pin;
rt_interrupt_enter();
for(gpio_pin = 16; gpio_pin <= 31; gpio_pin++)
{
gpio_isr(GPIO4, gpio_pin);
}
#if defined __CORTEX_M && (__CORTEX_M == 4U)
__DSB();
#endif
rt_interrupt_leave();
}
void GPIO5_Combined_0_15_IRQHandler(void)
{
rt_uint8_t gpio_pin;
rt_interrupt_enter();
for(gpio_pin = 0; gpio_pin <= 2; gpio_pin++)
{
gpio_isr(GPIO5, gpio_pin);
}
#if defined __CORTEX_M && (__CORTEX_M == 4U)
__DSB();
#endif
rt_interrupt_leave();
}
static IRQn_Type rt1052_get_irqnum(GPIO_Type *gpio, rt_uint32_t gpio_pin)
{
IRQn_Type irq_num;
if(gpio == GPIO1)
{
if(gpio_pin <= 15)
{
irq_num = GPIO1_Combined_0_15_IRQn;
}
else
{
irq_num = GPIO1_Combined_16_31_IRQn;
}
}
else if(gpio == GPIO2)
{
if(gpio_pin <= 15)
{
irq_num = GPIO2_Combined_0_15_IRQn;
}
else
{
irq_num = GPIO2_Combined_16_31_IRQn;
}
}
else if(gpio == GPIO3)
{
if(gpio_pin <= 15)
{
irq_num = GPIO3_Combined_0_15_IRQn;
}
else
{
irq_num = GPIO3_Combined_16_31_IRQn;
}
}
else if(gpio == GPIO4)
{
if(gpio_pin <= 15)
{
irq_num = GPIO4_Combined_0_15_IRQn;
}
else
{
irq_num = GPIO4_Combined_16_31_IRQn;
}
}
else if(gpio == GPIO5)
{
if(gpio_pin <= 15)
{
irq_num = GPIO5_Combined_0_15_IRQn;
}
else
{
irq_num = GPIO5_Combined_16_31_IRQn;
}
}
return irq_num;
}
static void rt1052_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode) static void rt1052_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
{ {
gpio_pin_config_t gpio; gpio_pin_config_t gpio;
@ -193,15 +473,15 @@ static void rt1052_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
{ {
CLOCK_EnableClock(kCLOCK_Iomuxc); CLOCK_EnableClock(kCLOCK_Iomuxc);
IOMUXC_SetPinMux(0x401F8010U + pin*4, 0x5U, 0, 0, 0, 0);
} }
else else
{ {
CLOCK_EnableClock(kCLOCK_IomuxcSnvs); CLOCK_EnableClock(kCLOCK_IomuxcSnvs);
IOMUXC_SetPinMux(0x401F8000U + (pin-125)*4, 0x5U, 0, 0, 0, 0);
} }
/* 配置IOMUXC: 将IO配置为GPIO */
IOMUXC_SetPinMux(0x401F8010U + pin*4, 0x5U, 0, 0, 0, 0);
gpio.outputLogic = 0; gpio.outputLogic = 0;
gpio.interruptMode = kGPIO_NoIntmode; gpio.interruptMode = kGPIO_NoIntmode;
@ -243,7 +523,6 @@ static void rt1052_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
break; break;
} }
/* 配置GPIO模式: 上下拉模式, 开漏模, IO翻转速度(50MHz) */
IOMUXC_SetPinConfig(0, 0, 0, 0, 0x401F8200U + pin*4, config_value); IOMUXC_SetPinConfig(0, 0, 0, 0, 0x401F8200U + pin*4, config_value);
GPIO_PinInit(rt1052_pin_map[pin].gpio, rt1052_pin_map[pin].gpio_pin, &gpio); GPIO_PinInit(rt1052_pin_map[pin].gpio, rt1052_pin_map[pin].gpio_pin, &gpio);
@ -259,17 +538,175 @@ static void rt1052_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
GPIO_PinWrite(rt1052_pin_map[pin].gpio, rt1052_pin_map[pin].gpio_pin, value); GPIO_PinWrite(rt1052_pin_map[pin].gpio, rt1052_pin_map[pin].gpio_pin, value);
} }
static struct rt_pin_ops rt1052_pin_ops = static rt_err_t rt1052_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
rt_uint32_t mode, void (*hdr)(void *args), void *args)
{ {
.pin_mode = rt1052_pin_mode, struct rt1052_pin* pin_map = RT_NULL;
.pin_read = rt1052_pin_read, struct rt1052_irq* irq_map = RT_NULL;
.pin_write = rt1052_pin_write
}; pin_map = &rt1052_pin_map[pin];
irq_map = &rt1052_irq_map[rt1052_pin_map[pin].gpio_pin];
if(pin_map == RT_NULL || irq_map == RT_NULL)
{
return RT_ENOSYS;
}
if(irq_map->enable == PIN_IRQ_ENABLE)
{
return RT_EBUSY;
}
irq_map->irq_info.pin = pin;
irq_map->irq_info.hdr = hdr;
irq_map->irq_info.mode = mode;
irq_map->irq_info.args = args;
return RT_EOK;
}
static rt_err_t rt1052_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
{
struct rt1052_pin* pin_map = RT_NULL;
struct rt1052_irq* irq_map = RT_NULL;
pin_map = &rt1052_pin_map[pin];
irq_map = &rt1052_irq_map[rt1052_pin_map[pin].gpio_pin];
if(pin_map == RT_NULL || irq_map == RT_NULL)
{
return RT_ENOSYS;
}
if(irq_map->enable == PIN_IRQ_DISABLE)
{
return RT_EOK;
}
irq_map->irq_info.pin = PIN_IRQ_PIN_NONE;
irq_map->irq_info.hdr = RT_NULL;
irq_map->irq_info.mode = PIN_IRQ_MODE_RISING;
irq_map->irq_info.args = RT_NULL;
return RT_EOK;
}
static rt_err_t rt1052_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled)
{
gpio_pin_config_t gpio;
IRQn_Type irq_num;
struct rt1052_pin* pin_map = RT_NULL;
struct rt1052_irq* irq_map = RT_NULL;
pin_map = &rt1052_pin_map[pin];
irq_map = &rt1052_irq_map[rt1052_pin_map[pin].gpio_pin];
if(pin_map == RT_NULL || irq_map == RT_NULL)
{
return RT_ENOSYS;
}
if(enabled == PIN_IRQ_ENABLE)
{
if(irq_map->enable == PIN_IRQ_ENABLE)
{
return RT_EBUSY;
}
if(irq_map->irq_info.pin != pin)
{
return RT_EIO;
}
irq_map->enable = PIN_IRQ_ENABLE;
if(rt1052_pin_map[pin].gpio != GPIO5)
{
CLOCK_EnableClock(kCLOCK_Iomuxc);
IOMUXC_SetPinMux(0x401F8010U + pin*4, 0x5U, 0, 0, 0, 0);
}
else
{
CLOCK_EnableClock(kCLOCK_IomuxcSnvs);
IOMUXC_SetPinMux(0x401F8000U + (pin-125)*4, 0x5U, 0, 0, 0, 0);
}
gpio.direction = kGPIO_DigitalInput;
gpio.outputLogic = 0;
switch(irq_map->irq_info.mode)
{
case PIN_IRQ_MODE_RISING:
{
gpio.interruptMode = kGPIO_IntRisingEdge;
}
break;
case PIN_IRQ_MODE_FALLING:
{
gpio.interruptMode = kGPIO_IntFallingEdge;
}
break;
case PIN_IRQ_MODE_RISING_FALLING:
{
gpio.interruptMode = kGPIO_IntRisingOrFallingEdge;
}
break;
case PIN_IRQ_MODE_HIGH_LEVEL:
{
gpio.interruptMode = kGPIO_IntHighLevel;
}
break;
case PIN_IRQ_MODE_LOW_LEVEL:
{
gpio.interruptMode = kGPIO_IntLowLevel;
}
break;
}
irq_num = rt1052_get_irqnum(rt1052_pin_map[pin].gpio, rt1052_pin_map[pin].gpio_pin);
NVIC_SetPriority(irq_num, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 5, 0));
EnableIRQ(irq_num);
GPIO_PinInit(rt1052_pin_map[pin].gpio, rt1052_pin_map[pin].gpio_pin, &gpio);
GPIO_PortEnableInterrupts(rt1052_pin_map[pin].gpio, 1U << rt1052_pin_map[pin].gpio_pin);
}
else if(enabled == PIN_IRQ_DISABLE)
{
if(irq_map->enable == PIN_IRQ_DISABLE)
{
return RT_EOK;
}
irq_map->enable = PIN_IRQ_DISABLE;
irq_num = rt1052_get_irqnum(rt1052_pin_map[pin].gpio, rt1052_pin_map[pin].gpio_pin);
NVIC_DisableIRQ(irq_num);
}
else
{
return RT_EINVAL;
}
return RT_EOK;
}
int rt_hw_pin_init(void) int rt_hw_pin_init(void)
{ {
int ret = RT_EOK; int ret = RT_EOK;
rt1052_pin_ops.pin_mode = rt1052_pin_mode;
rt1052_pin_ops.pin_read = rt1052_pin_read;
rt1052_pin_ops.pin_write = rt1052_pin_write;
rt1052_pin_ops.pin_attach_irq = rt1052_pin_attach_irq;
rt1052_pin_ops.pin_dettach_irq = rt1052_pin_dettach_irq;
rt1052_pin_ops.pin_irq_enable = rt1052_pin_irq_enable;
ret = rt_device_pin_register("pin", &rt1052_pin_ops, RT_NULL); ret = rt_device_pin_register("pin", &rt1052_pin_ops, RT_NULL);
return ret; return ret;

1
bsp/imxrt1052-evk/drivers/drv_pin.h
View File

@ -10,6 +10,7 @@
* Change Logs: * Change Logs:
* Date Author Notes * Date Author Notes
* 2018-03-13 Liuguang the first version. * 2018-03-13 Liuguang the first version.
* 2018-03-19 Liuguang add GPIO interrupt mode support.
*/ */
#ifndef __DRV_PIN_H__ #ifndef __DRV_PIN_H__

248
bsp/imxrt1052-evk/drivers/usart.c → bsp/imxrt1052-evk/drivers/drv_uart.c
View File

@ -1,5 +1,5 @@
/* /*
* File : usart.c * File : drv_uart.c
* This file is part of RT-Thread RTOS * This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006-2013, RT-Thread Development Team * COPYRIGHT (C) 2006-2013, RT-Thread Development Team
* *
@ -10,24 +10,32 @@
* Change Logs: * Change Logs:
* Date Author Notes * Date Author Notes
* 2017-10-10 Tanek the first version * 2017-10-10 Tanek the first version
* 2018-03-17 laiyiketang Add other uart.
*/ */
#include <rtthread.h> #include <rtthread.h>
#include "usart.h" #include "drv_uart.h"
#include "fsl_common.h" #include "fsl_common.h"
#include "fsl_lpuart.h" #include "fsl_lpuart.h"
#include "fsl_iomuxc.h" #include "fsl_iomuxc.h"
#ifdef RT_USING_UART #ifdef RT_USING_SERIAL
#if !defined(RT_USING_UART0) && !defined(RT_USING_UART1) && \ /* GPIO外设时钟会在LPUART_Init中自动配置, 如果定义了以下宏则不会自动配置 */
!defined(RT_USING_UART2) && !defined(RT_USING_UART3) && \ #if defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL
!defined(RT_USING_UART4) && !defined(RT_USING_UART5) && \ #error "Please don't define 'FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL'!"
!defined(RT_USING_UART6) && !defined(RT_USING_UART7) #endif
#if !defined(RT_USING_UART1) && !defined(RT_USING_UART2) && \
!defined(RT_USING_UART3) && !defined(RT_USING_UART4) && \
!defined(RT_USING_UART5) && !defined(RT_USING_UART6) && \
!defined(RT_USING_UART7) && !defined(RT_USING_UART8)
#error "Please define at least one UARTx" #error "Please define at least one UARTx"
#endif #endif
#include <rtdevice.h> #include <rtdevice.h>
/* imxrt uart driver */ /* imxrt uart driver */
@ -55,7 +63,7 @@ void LPUART1_IRQHandler(void)
#if defined(RT_USING_UART2) #if defined(RT_USING_UART2)
struct rt_serial_device serial2; struct rt_serial_device serial2;
void USART2_IRQHandler(void) void LPUART2_IRQHandler(void)
{ {
uart_isr(&serial2); uart_isr(&serial2);
} }
@ -65,7 +73,7 @@ void USART2_IRQHandler(void)
#if defined(RT_USING_UART3) #if defined(RT_USING_UART3)
struct rt_serial_device serial3; struct rt_serial_device serial3;
void UART3_IRQHandler(void) void LPUART3_IRQHandler(void)
{ {
uart_isr(&serial3); uart_isr(&serial3);
} }
@ -75,7 +83,7 @@ void UART3_IRQHandler(void)
#if defined(RT_USING_UART4) #if defined(RT_USING_UART4)
struct rt_serial_device serial4; struct rt_serial_device serial4;
void UART4_IRQHandler(void) void LPUART4_IRQHandler(void)
{ {
uart_isr(&serial4); uart_isr(&serial4);
} }
@ -84,7 +92,7 @@ void UART4_IRQHandler(void)
#if defined(RT_USING_UART5) #if defined(RT_USING_UART5)
struct rt_serial_device serial5; struct rt_serial_device serial5;
void USART5_IRQHandler(void) void LPUART5_IRQHandler(void)
{ {
uart_isr(&serial5); uart_isr(&serial5);
} }
@ -94,7 +102,7 @@ void USART5_IRQHandler(void)
#if defined(RT_USING_UART6) #if defined(RT_USING_UART6)
struct rt_serial_device serial6; struct rt_serial_device serial6;
void UART6_IRQHandler(void) void LPUART6_IRQHandler(void)
{ {
uart_isr(&serial6); uart_isr(&serial6);
} }
@ -104,7 +112,7 @@ void UART6_IRQHandler(void)
#if defined(RT_USING_UART7) #if defined(RT_USING_UART7)
struct rt_serial_device serial7; struct rt_serial_device serial7;
void UART7_IRQHandler(void) void LPUART7_IRQHandler(void)
{ {
uart_isr(&serial7); uart_isr(&serial7);
} }
@ -114,7 +122,7 @@ void UART7_IRQHandler(void)
#if defined(RT_USING_UART8) #if defined(RT_USING_UART8)
struct rt_serial_device serial8; struct rt_serial_device serial8;
void UART8_IRQHandler(void) void LPUART8_IRQHandler(void)
{ {
uart_isr(&serial8); uart_isr(&serial8);
} }
@ -122,14 +130,70 @@ void UART8_IRQHandler(void)
#endif /* RT_USING_UART8 */ #endif /* RT_USING_UART8 */
static const struct imxrt_uart uarts[] = { static const struct imxrt_uart uarts[] = {
#ifdef RT_USING_UART1 #ifdef RT_USING_UART1
{ {
LPUART1, LPUART1,
LPUART1_IRQn, LPUART1_IRQn,
&serial1, &serial1,
"uart1", "uart1",
}, },
#endif #endif
#ifdef RT_USING_UART2
{
LPUART2,
LPUART2_IRQn,
&serial2,
"uart2",
},
#endif
#ifdef RT_USING_UART3
{
LPUART3,
LPUART3_IRQn,
&serial3,
"uart3",
},
#endif
#ifdef RT_USING_UART4
{
LPUART4,
LPUART4_IRQn,
&serial4,
"uart4",
},
#endif
#ifdef RT_USING_UART5
{
LPUART5,
LPUART5_IRQn,
&serial5,
"uart5",
},
#endif
#ifdef RT_USING_UART6
{
LPUART6,
LPUART6_IRQn,
&serial6,
"uart6",
},
#endif
#ifdef RT_USING_UART7
{
LPUART7,
LPUART7_IRQn,
&serial7,
"uart7",
},
#endif
#ifdef RT_USING_UART8
{
LPUART8,
LPUART8_IRQn,
&serial8,
"uart8",
},
#endif
}; };
@ -164,19 +228,20 @@ uint32_t BOARD_DebugConsoleSrcFreq(void)
*/ */
void imxrt_uart_gpio_init(struct imxrt_uart *uart) void imxrt_uart_gpio_init(struct imxrt_uart *uart)
{ {
if (uart->uart_base == LPUART1) if (uart->uart_base != RT_NULL)
{ {
CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */ #ifdef RT_USING_UART1
CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */
IOMUXC_SetPinMux( IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 is configured as LPUART1_TX */ IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 is configured as LPUART1_TX */
0U); /* Software Input On Field: Input Path is determined by functionality */ 0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux( IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 is configured as LPUART1_RX */ IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 is configured as LPUART1_RX */
0U); /* Software Input On Field: Input Path is determined by functionality */ 0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinConfig( IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 PAD functional properties : */ IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 PAD functional properties : */
0x10B0u); /* Slew Rate Field: Slow Slew Rate 0x10B0u); /* Slew Rate Field: Slow Slew Rate
Drive Strength Field: R0/6 Drive Strength Field: R0/6
Speed Field: medium(100MHz) Speed Field: medium(100MHz)
Open Drain Enable Field: Open Drain Disabled Open Drain Enable Field: Open Drain Disabled
@ -185,8 +250,8 @@ void imxrt_uart_gpio_init(struct imxrt_uart *uart)
Pull Up / Down Config. Field: 100K Ohm Pull Down Pull Up / Down Config. Field: 100K Ohm Pull Down
Hyst. Enable Field: Hysteresis Disabled */ Hyst. Enable Field: Hysteresis Disabled */
IOMUXC_SetPinConfig( IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 PAD functional properties : */ IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 PAD functional properties : */
0x10B0u); /* Slew Rate Field: Slow Slew Rate 0x10B0u); /* Slew Rate Field: Slow Slew Rate
Drive Strength Field: R0/6 Drive Strength Field: R0/6
Speed Field: medium(100MHz) Speed Field: medium(100MHz)
Open Drain Enable Field: Open Drain Disabled Open Drain Enable Field: Open Drain Disabled
@ -194,6 +259,128 @@ void imxrt_uart_gpio_init(struct imxrt_uart *uart)
Pull / Keep Select Field: Keeper Pull / Keep Select Field: Keeper
Pull Up / Down Config. Field: 100K Ohm Pull Down Pull Up / Down Config. Field: 100K Ohm Pull Down
Hyst. Enable Field: Hysteresis Disabled */ Hyst. Enable Field: Hysteresis Disabled */
#endif
#ifdef RT_USING_UART2
CLOCK_EnableClock(kCLOCK_Iomuxc);
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B1_02_LPUART2_TX,
0U);
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B1_03_LPUART2_RX,
0U);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B1_02_LPUART2_TX,
0x10B0u);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B1_03_LPUART2_RX,
0x10B0u);
#endif
#ifdef RT_USING_UART3
CLOCK_EnableClock(kCLOCK_Iomuxc);
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B1_06_LPUART3_TX,
0U);
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B1_07_LPUART3_RX,
0U);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B1_06_LPUART3_TX,
0x10B0u);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B1_07_LPUART3_RX,
0x10B0u);
#endif
#ifdef RT_USING_UART4
CLOCK_EnableClock(kCLOCK_Iomuxc);
IOMUXC_SetPinMux(
IOMUXC_GPIO_B1_00_LPUART4_TX,
0U);
IOMUXC_SetPinMux(
IOMUXC_GPIO_B1_01_LPUART4_RX,
0U);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_B1_00_LPUART4_TX,
0x10B0u);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_B1_01_LPUART4_RX,
0x10B0u);
#endif
#ifdef RT_USING_UART5
CLOCK_EnableClock(kCLOCK_Iomuxc);
IOMUXC_SetPinMux(
IOMUXC_GPIO_B1_12_LPUART5_TX,
0U);
IOMUXC_SetPinMux(
IOMUXC_GPIO_B1_13_LPUART5_RX,
0U);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_B1_12_LPUART5_TX,
0x10B0u);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_B1_13_LPUART5_RX,
0x10B0u);
#endif
#ifdef RT_USING_UART6
CLOCK_EnableClock(kCLOCK_Iomuxc);
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_02_LPUART6_TX,
0U);
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_03_LPUART6_RX,
0U);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B0_02_LPUART6_TX,
0x10B0u);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B0_03_LPUART6_RX,
0x10B0u);
#endif
#ifdef RT_USING_UART7
CLOCK_EnableClock(kCLOCK_Iomuxc);
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_31_LPUART7_TX,
0U);
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_32_LPUART7_RX,
0U);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_EMC_31_LPUART7_TX,
0x10B0u);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_EMC_32_LPUART7_RX,
0x10B0u);
#endif
#ifdef RT_USING_UART8
CLOCK_EnableClock(kCLOCK_Iomuxc);
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B1_10_LPUART8_TX,
0U);
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B1_11_LPUART8_RX,
0U);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B1_10_LPUART8_TX,
0x10B0u);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B1_11_LPUART8_RX,
0x10B0u);
#endif
} }
else else
{ {
@ -324,10 +511,10 @@ static void uart_isr(struct rt_serial_device *serial)
LPUART_Type *base; LPUART_Type *base;
RT_ASSERT(serial != RT_NULL); RT_ASSERT(serial != RT_NULL);
uart = (struct imxrt_uart *) serial->parent.user_data; uart = (struct imxrt_uart *) serial->parent.user_data;
RT_ASSERT(uart != RT_NULL); RT_ASSERT(uart != RT_NULL);
base = uart->uart_base; base = uart->uart_base;
RT_ASSERT(base != RT_NULL); RT_ASSERT(base != RT_NULL);
@ -339,7 +526,7 @@ static void uart_isr(struct rt_serial_device *serial)
{ {
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
} }
/* If RX overrun. */ /* If RX overrun. */
if (LPUART_STAT_OR_MASK & base->STAT) if (LPUART_STAT_OR_MASK & base->STAT)
{ {
@ -363,7 +550,6 @@ int imxrt_hw_usart_init(void)
{ {
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
int i; int i;
for (i = 0; i < sizeof(uarts) / sizeof(uarts[0]); i++) for (i = 0; i < sizeof(uarts) / sizeof(uarts[0]); i++)
{ {
uarts[i].serial->ops = &imxrt_uart_ops; uarts[i].serial->ops = &imxrt_uart_ops;
@ -380,4 +566,4 @@ int imxrt_hw_usart_init(void)
} }
INIT_BOARD_EXPORT(imxrt_hw_usart_init); INIT_BOARD_EXPORT(imxrt_hw_usart_init);
#endif /*RT_USING_UART*/ #endif /*RT_USING_SERIAL */

8
bsp/imxrt1052-evk/drivers/usart.h → bsp/imxrt1052-evk/drivers/drv_uart.h
View File

@ -1,5 +1,5 @@
/* /*
* File : usart.h * File : drv_uart.h
* This file is part of RT-Thread RTOS * This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team * COPYRIGHT (C) 2009, RT-Thread Development Team
* *
@ -9,11 +9,11 @@
* *
* Change Logs: * Change Logs:
* Date Author Notes * Date Author Notes
* 2013-11-15 bright the first version * 2017-10-10 Tanek the first version
*/ */
#ifndef __USART_H__ #ifndef __DRV_USART_H__
#define __USART_H__ #define __DRV_USART_H__
#include <rthw.h> #include <rthw.h>
#include <rtthread.h> #include <rtthread.h>

5099
bsp/imxrt1052-evk/project.ewp
View File

File diff suppressed because it is too large Load Diff

20
bsp/imxrt1052-evk/project.uvprojx
View File

@ -333,7 +333,7 @@
<MiscControls>--library_interface=armcc --library_type=standardlib --diag_suppress=66,1296,186</MiscControls> <MiscControls>--library_interface=armcc --library_type=standardlib --diag_suppress=66,1296,186</MiscControls>
<Define>SKIP_SYSCLK_INIT, CPU_MIMXRT1052DVL6A, FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL=1, EVK_MCIMXRM, FSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE, RT_USING_ARM_LIBC</Define> <Define>SKIP_SYSCLK_INIT, CPU_MIMXRT1052DVL6A, FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL=1, EVK_MCIMXRM, FSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE, RT_USING_ARM_LIBC</Define>
<Undefine /> <Undefine />
<IncludePath>applications;.;drivers;Libraries;Libraries\drivers;Libraries\utilities;Libraries\CMSIS\Include;..\..\include;..\..\libcpu\arm\cortex-m7;..\..\libcpu\arm\common;..\..\components\dfs\include;..\..\components\dfs\filesystems\devfs;..\..\components\dfs\filesystems\elmfat;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\finsh;..\..\components\libc\compilers\armlibc;..\..\components\net\lwip-2.0.2\src;..\..\components\net\lwip-2.0.2\src\include;..\..\components\net\lwip-2.0.2\src\include\ipv4;..\..\components\net\lwip-2.0.2\src\arch\include;..\..\components\net\lwip-2.0.2\src\include\netif;..\..\components\net\lwip-2.0.2\src\include\posix</IncludePath> <IncludePath>applications;.;drivers;Libraries;Libraries\drivers;Libraries\utilities;Libraries\CMSIS\Include;..\..\include;..\..\libcpu\arm\cortex-m7;..\..\libcpu\arm\common;..\..\components\dfs\include;..\..\components\dfs\filesystems\devfs;..\..\components\dfs\filesystems\elmfat;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\finsh;..\..\components\libc\compilers\armlibc;..\..\components\net\lwip-2.0.2\src;..\..\components\net\lwip-2.0.2\src\include;..\..\components\net\lwip-2.0.2\src\include\ipv4;..\..\components\net\lwip-2.0.2\src\arch\include;..\..\components\net\lwip-2.0.2\src\include\netif;..\..\components\net\lwip-2.0.2\src\include\posix</IncludePath>
</VariousControls> </VariousControls>
</Cads> </Cads>
<Aads> <Aads>
@ -416,9 +416,9 @@
</Files> </Files>
<Files> <Files>
<File> <File>
<FileName>usart.c</FileName> <FileName>drv_uart.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>drivers\usart.c</FilePath> <FilePath>drivers\drv_uart.c</FilePath>
</File> </File>
</Files> </Files>
<Files> <Files>
@ -442,6 +442,13 @@
<FilePath>drivers\drv_pin.c</FilePath> <FilePath>drivers\drv_pin.c</FilePath>
</File> </File>
</Files> </Files>
<Files>
<File>
<FileName>drv_hp_rtc.c</FileName>
<FileType>1</FileType>
<FilePath>drivers\drv_hp_rtc.c</FilePath>
</File>
</Files>
<Files> <Files>
<File> <File>
<FileName>drv_eth.c</FileName> <FileName>drv_eth.c</FileName>
@ -1115,6 +1122,13 @@
<FilePath>..\..\components\drivers\misc\pin.c</FilePath> <FilePath>..\..\components\drivers\misc\pin.c</FilePath>
</File> </File>
</Files> </Files>
<Files>
<File>
<FileName>rtc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\components\drivers\rtc\rtc.c</FilePath>
</File>
</Files>
<Files> <Files>
<File> <File>
<FileName>block_dev.c</FileName> <FileName>block_dev.c</FileName>

6
bsp/imxrt1052-evk/rtconfig.h
View File

@ -121,7 +121,9 @@
#define RT_USING_PIN #define RT_USING_PIN
/* RT_USING_MTD_NOR is not set */ /* RT_USING_MTD_NOR is not set */
/* RT_USING_MTD_NAND is not set */ /* RT_USING_MTD_NAND is not set */
/* RT_USING_RTC is not set */ #define RT_USING_RTC
/* RT_USING_SOFT_RTC is not set */
/* RTC_SYNC_USING_NTP is not set */
#define RT_USING_SDIO #define RT_USING_SDIO
/* RT_USING_SPI is not set */ /* RT_USING_SPI is not set */
/* RT_USING_WDT is not set */ /* RT_USING_WDT is not set */
@ -277,7 +279,7 @@
/* PKG_USING_HELLO is not set */ /* PKG_USING_HELLO is not set */
/* PKG_USING_MULTIBUTTON is not set */ /* PKG_USING_MULTIBUTTON is not set */
#define SOC_IMXRT1052 #define SOC_IMXRT1052
#define RT_USING_UART
#define RT_USING_UART1 #define RT_USING_UART1
#define RT_USING_HP_RTC
#endif #endif

2
bsp/lpc824/rtconfig.h
View File

@ -80,7 +80,7 @@
// </c> // </c>
// <c1>Using Mutex // <c1>Using Mutex
// <i>Using Mutex // <i>Using Mutex
//#define RT_USING_MUTEX #define RT_USING_MUTEX
// </c> // </c>
// <c1>Using Event // <c1>Using Event
// <i>Using Event // <i>Using Event

6
bsp/tm4c129x/libraries/SConscript
View File

@ -18,12 +18,6 @@ elif rtconfig.CROSS_TOOL == 'iar':
CPPPATH = [cwd, cwd + '/inc', cwd + '/driverlib'] CPPPATH = [cwd, cwd + '/inc', cwd + '/driverlib']
CPPDEFINES = [rtconfig.PART_TYPE] CPPDEFINES = [rtconfig.PART_TYPE]
if rtconfig.CROSS_TOOL == 'gcc':
CPPDEFINES += ['gcc'];
CPPDEFINES += ['uint_fast8_t=uint32_t'];
CPPDEFINES += ['uint_fast32_t=uint32_t'];
CPPDEFINES += ['int_fast8_t=int32_t'];
CPPDEFINES += ['uint_fast16_t=uint32_t'];
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES) group = DefineGroup('Libraries', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES)
Return('group') Return('group')

10
components/dfs/filesystems/elmfat/dfs_elm.c
View File

@ -214,7 +214,8 @@ int dfs_elm_mkfs(rt_device_t dev_id)
int flag; int flag;
FRESULT result; FRESULT result;
int index; int index;
char logic_nbr[2] = {'0',':'};
work = rt_malloc(_MAX_SS); work = rt_malloc(_MAX_SS);
if(RT_NULL == work) { if(RT_NULL == work) {
return -ENOMEM; return -ENOMEM;
@ -264,7 +265,8 @@ int dfs_elm_mkfs(rt_device_t dev_id)
* on the disk, you will get a failure. so we need f_mount here, * on the disk, you will get a failure. so we need f_mount here,
* just fill the FatFS[index] in elm fatfs to make mkfs work. * just fill the FatFS[index] in elm fatfs to make mkfs work.
*/ */
f_mount(fat, "", (BYTE)index); logic_nbr[0] = '0' + index;
f_mount(fat, logic_nbr, (BYTE)index);
} }
} }
@ -273,14 +275,14 @@ int dfs_elm_mkfs(rt_device_t dev_id)
/* [IN] Size of the allocation unit */ /* [IN] Size of the allocation unit */
/* [-] Working buffer */ /* [-] Working buffer */
/* [IN] Size of working buffer */ /* [IN] Size of working buffer */
result = f_mkfs("", FM_ANY, 0, work, _MAX_SS); result = f_mkfs(logic_nbr, FM_ANY, 0, work, _MAX_SS);
rt_free(work); work = RT_NULL; rt_free(work); work = RT_NULL;
/* check flag status, we need clear the temp driver stored in disk[] */ /* check flag status, we need clear the temp driver stored in disk[] */
if (flag == FSM_STATUS_USE_TEMP_DRIVER) if (flag == FSM_STATUS_USE_TEMP_DRIVER)
{ {
rt_free(fat); rt_free(fat);
f_mount(RT_NULL, "",(BYTE)index); f_mount(RT_NULL, logic_nbr,(BYTE)index);
disk[index] = RT_NULL; disk[index] = RT_NULL;
/* close device */ /* close device */
rt_device_close(dev_id); rt_device_close(dev_id);

1
components/drivers/include/drivers/usb_device.h
View File

@ -140,6 +140,7 @@ struct udcd
struct uendpoint ep0; struct uendpoint ep0;
uep0_stage_t stage; uep0_stage_t stage;
struct ep_id* ep_pool; struct ep_id* ep_pool;
rt_uint8_t device_is_hs;
}; };
typedef struct udcd* udcd_t; typedef struct udcd* udcd_t;

19
components/drivers/usb/usbdevice/class/cdc_vcom.c
View File

@ -114,15 +114,17 @@ static struct udevice_descriptor dev_desc =
USB_DYNAMIC, //bNumConfigurations; USB_DYNAMIC, //bNumConfigurations;
}; };
//FS and HS needed
static struct usb_qualifier_descriptor dev_qualifier = static struct usb_qualifier_descriptor dev_qualifier =
{ {
sizeof(dev_qualifier), sizeof(dev_qualifier), //bLength
USB_DESC_TYPE_DEVICEQUALIFIER, USB_DESC_TYPE_DEVICEQUALIFIER, //bDescriptorType
0x0200, 0x0200, //bcdUSB
USB_CLASS_CDC, USB_CLASS_CDC, //bDeviceClass
0x00, 0x00, //bDeviceSubClass
64, 0x00, //bDeviceProtocol
0x01, 64, //bMaxPacketSize0
0x01, //bNumConfigurations
0, 0,
}; };
@ -566,7 +568,8 @@ ufunction_t rt_usbd_function_cdc_create(udevice_t device)
/* create a cdc function */ /* create a cdc function */
func = rt_usbd_function_new(device, &dev_desc, &ops); func = rt_usbd_function_new(device, &dev_desc, &ops);
rt_usbd_device_set_qualifier(device, &dev_qualifier); //not support HS
//rt_usbd_device_set_qualifier(device, &dev_qualifier);
/* allocate memory for cdc vcom data */ /* allocate memory for cdc vcom data */
data = (struct vcom*)rt_malloc(sizeof(struct vcom)); data = (struct vcom*)rt_malloc(sizeof(struct vcom));

30
components/drivers/usb/usbdevice/class/ecm.c
View File

@ -41,7 +41,7 @@ struct rt_ecm_eth
rt_uint8_t dev_addr[MAX_ADDR_LEN]; rt_uint8_t dev_addr[MAX_ADDR_LEN];
ALIGN(4) ALIGN(4)
rt_uint8_t rx_pool[64]; rt_uint8_t rx_pool[512];
ALIGN(4) ALIGN(4)
rt_size_t rx_size; rt_size_t rx_size;
ALIGN(4) ALIGN(4)
@ -147,14 +147,14 @@ const static struct ucdc_data_descriptor _data_desc =
USB_DESC_TYPE_ENDPOINT, USB_DESC_TYPE_ENDPOINT,
USB_DIR_OUT | USB_DYNAMIC, USB_DIR_OUT | USB_DYNAMIC,
USB_EP_ATTR_BULK, USB_EP_ATTR_BULK,
USB_CDC_BUFSIZE, USB_DYNAMIC,
0x00, 0x00,
/* endpoint, bulk in */ /* endpoint, bulk in */
USB_DESC_LENGTH_ENDPOINT, USB_DESC_LENGTH_ENDPOINT,
USB_DESC_TYPE_ENDPOINT, USB_DESC_TYPE_ENDPOINT,
USB_DYNAMIC | USB_DIR_IN, USB_DYNAMIC | USB_DIR_IN,
USB_EP_ATTR_BULK, USB_EP_ATTR_BULK,
USB_CDC_BUFSIZE, USB_DYNAMIC,
0x00, 0x00,
}; };
@ -170,17 +170,20 @@ const static char* _ustring[] =
}; };
ALIGN(4) ALIGN(4)
//FS and HS needed
static struct usb_qualifier_descriptor dev_qualifier = static struct usb_qualifier_descriptor dev_qualifier =
{ {
sizeof(dev_qualifier), sizeof(dev_qualifier), //bLength
USB_DESC_TYPE_DEVICEQUALIFIER, USB_DESC_TYPE_DEVICEQUALIFIER, //bDescriptorType
0x0200, 0x0200, //bcdUSB
USB_CLASS_CDC, USB_CLASS_CDC, //bDeviceClass
0x00, USB_CDC_SUBCLASS_ETH, //bDeviceSubClass
64, USB_CDC_PROTOCOL_NONE, //bDeviceProtocol
0x01, 64, //bMaxPacketSize0
0x01, //bNumConfigurations
0, 0,
}; };
static rt_err_t _cdc_send_notifi(ufunction_t func,ucdc_notification_code_t notifi,rt_uint16_t wValue,rt_uint16_t wLength) static rt_err_t _cdc_send_notifi(ufunction_t func,ucdc_notification_code_t notifi,rt_uint16_t wValue,rt_uint16_t wLength)
{ {
static struct ucdc_management_element_notifications _notifi; static struct ucdc_management_element_notifications _notifi;
@ -472,7 +475,7 @@ static struct ufunction_ops ops =
* *
* @return RT_EOK on successful. * @return RT_EOK on successful.
*/ */
static rt_err_t _cdc_descriptor_config(ucdc_comm_desc_t comm, rt_uint8_t cintf_nr, ucdc_data_desc_t data, rt_uint8_t dintf_nr) static rt_err_t _cdc_descriptor_config(ucdc_comm_desc_t comm, rt_uint8_t cintf_nr, ucdc_data_desc_t data, rt_uint8_t dintf_nr, rt_uint8_t device_is_hs)
{ {
comm->call_mgmt_desc.data_interface = dintf_nr; comm->call_mgmt_desc.data_interface = dintf_nr;
comm->union_desc.master_interface = cintf_nr; comm->union_desc.master_interface = cintf_nr;
@ -480,7 +483,8 @@ static rt_err_t _cdc_descriptor_config(ucdc_comm_desc_t comm, rt_uint8_t cintf_n
#ifdef RT_USB_DEVICE_COMPOSITE #ifdef RT_USB_DEVICE_COMPOSITE
comm->iad_desc.bFirstInterface = cintf_nr; comm->iad_desc.bFirstInterface = cintf_nr;
#endif #endif
data->ep_out_desc.wMaxPacketSize = device_is_hs ? 512 : 64;
data->ep_in_desc.wMaxPacketSize = device_is_hs ? 512 : 64;
return RT_EOK; return RT_EOK;
} }
@ -532,7 +536,7 @@ ufunction_t rt_usbd_function_ecm_create(udevice_t device)
(rt_off_t)&((ucdc_eth_desc_t)0)->intf_desc); (rt_off_t)&((ucdc_eth_desc_t)0)->intf_desc);
rt_usbd_altsetting_config_descriptor(data_setting, &_data_desc, 0); rt_usbd_altsetting_config_descriptor(data_setting, &_data_desc, 0);
/* configure the cdc interface descriptor */ /* configure the cdc interface descriptor */
_cdc_descriptor_config(comm_setting->desc, intf_comm->intf_num, data_setting->desc, intf_data->intf_num); _cdc_descriptor_config(comm_setting->desc, intf_comm->intf_num, data_setting->desc, intf_data->intf_num, device->dcd->device_is_hs);
/* create a command endpoint */ /* create a command endpoint */
comm_desc = (ucdc_eth_desc_t)comm_setting->desc; comm_desc = (ucdc_eth_desc_t)comm_setting->desc;

22
components/drivers/usb/usbdevice/class/hid.c
View File

@ -227,18 +227,21 @@ static struct udevice_descriptor _dev_desc =
USB_DYNAMIC, //bNumConfigurations; USB_DYNAMIC, //bNumConfigurations;
}; };
static struct usb_qualifier_descriptor _dev_qualifier = //FS and HS needed
static struct usb_qualifier_descriptor dev_qualifier =
{ {
sizeof(_dev_qualifier), sizeof(dev_qualifier), //bLength
USB_DESC_TYPE_DEVICEQUALIFIER, USB_DESC_TYPE_DEVICEQUALIFIER, //bDescriptorType
0x0200, 0x0200, //bcdUSB
USB_CLASS_HID, USB_CLASS_MASS_STORAGE, //bDeviceClass
0x00, 0x06, //bDeviceSubClass
64, 0x50, //bDeviceProtocol
0x01, 64, //bMaxPacketSize0
0x01, //bNumConfigurations
0, 0,
}; };
/* hid interface descriptor */ /* hid interface descriptor */
const static struct uhid_comm_descriptor _hid_comm_desc = const static struct uhid_comm_descriptor _hid_comm_desc =
{ {
@ -631,7 +634,8 @@ ufunction_t rt_usbd_function_hid_create(udevice_t device)
/* create a cdc function */ /* create a cdc function */
func = rt_usbd_function_new(device, &_dev_desc, &ops); func = rt_usbd_function_new(device, &_dev_desc, &ops);
rt_usbd_device_set_qualifier(device, &_dev_qualifier); //not support hs
//rt_usbd_device_set_qualifier(device, &_dev_qualifier);
/* allocate memory for cdc vcom data */ /* allocate memory for cdc vcom data */
data = (struct hid_s*)rt_malloc(sizeof(struct hid_s)); data = (struct hid_s*)rt_malloc(sizeof(struct hid_s));

30
components/drivers/usb/usbdevice/class/mstorage.c
View File

@ -88,8 +88,8 @@ static struct udevice_descriptor dev_desc =
USB_DESC_TYPE_DEVICE, //type; USB_DESC_TYPE_DEVICE, //type;
USB_BCD_VERSION, //bcdUSB; USB_BCD_VERSION, //bcdUSB;
USB_CLASS_MASS_STORAGE, //bDeviceClass; USB_CLASS_MASS_STORAGE, //bDeviceClass;
0x00, //bDeviceSubClass; 0x06, //bDeviceSubClass;
0x00, //bDeviceProtocol; 0x50, //bDeviceProtocol;
0x40, //bMaxPacketSize0; 0x40, //bMaxPacketSize0;
_VENDOR_ID, //idVendor; _VENDOR_ID, //idVendor;
_PRODUCT_ID, //idProduct; _PRODUCT_ID, //idProduct;
@ -100,15 +100,17 @@ static struct udevice_descriptor dev_desc =
USB_DYNAMIC, //bNumConfigurations; USB_DYNAMIC, //bNumConfigurations;
}; };
//FS and HS needed
static struct usb_qualifier_descriptor dev_qualifier = static struct usb_qualifier_descriptor dev_qualifier =
{ {
sizeof(dev_qualifier), sizeof(dev_qualifier), //bLength
USB_DESC_TYPE_DEVICEQUALIFIER, USB_DESC_TYPE_DEVICEQUALIFIER, //bDescriptorType
0x0200, 0x0200, //bcdUSB
USB_CLASS_MASS_STORAGE, USB_CLASS_MASS_STORAGE, //bDeviceClass
0x00, 0x06, //bDeviceSubClass
64, 0x50, //bDeviceProtocol
0x01, 64, //bMaxPacketSize0
0x01, //bNumConfigurations
0, 0,
}; };
@ -141,14 +143,14 @@ const static struct umass_descriptor _mass_desc =
USB_DESC_TYPE_ENDPOINT, //type; USB_DESC_TYPE_ENDPOINT, //type;
USB_DYNAMIC | USB_DIR_OUT, //bEndpointAddress; USB_DYNAMIC | USB_DIR_OUT, //bEndpointAddress;
USB_EP_ATTR_BULK, //bmAttributes; USB_EP_ATTR_BULK, //bmAttributes;
0x40, //wMaxPacketSize; USB_DYNAMIC, //wMaxPacketSize;
0x00, //bInterval; 0x00, //bInterval;
USB_DESC_LENGTH_ENDPOINT, //bLength; USB_DESC_LENGTH_ENDPOINT, //bLength;
USB_DESC_TYPE_ENDPOINT, //type; USB_DESC_TYPE_ENDPOINT, //type;
USB_DYNAMIC | USB_DIR_IN, //bEndpointAddress; USB_DYNAMIC | USB_DIR_IN, //bEndpointAddress;
USB_EP_ATTR_BULK, //bmAttributes; USB_EP_ATTR_BULK, //bmAttributes;
0x40, //wMaxPacketSize; USB_DYNAMIC, //wMaxPacketSize;
0x00, //bInterval; 0x00, //bInterval;
}; };
@ -1043,11 +1045,13 @@ static struct ufunction_ops ops =
_function_disable, _function_disable,
RT_NULL, RT_NULL,
}; };
static rt_err_t _mstorage_descriptor_config(umass_desc_t desc, rt_uint8_t cintf_nr) static rt_err_t _mstorage_descriptor_config(umass_desc_t desc, rt_uint8_t cintf_nr, rt_uint8_t device_is_hs)
{ {
#ifdef RT_USB_DEVICE_COMPOSITE #ifdef RT_USB_DEVICE_COMPOSITE
desc->iad_desc.bFirstInterface = cintf_nr; desc->iad_desc.bFirstInterface = cintf_nr;
#endif #endif
desc->ep_out_desc.wMaxPacketSize = device_is_hs ? 512 : 64;
desc->ep_in_desc.wMaxPacketSize = device_is_hs ? 512 : 64;
return RT_EOK; return RT_EOK;
} }
/** /**
@ -1090,7 +1094,7 @@ ufunction_t rt_usbd_function_mstorage_create(udevice_t device)
rt_usbd_altsetting_config_descriptor(setting, &_mass_desc, (rt_off_t)&((umass_desc_t)0)->intf_desc); rt_usbd_altsetting_config_descriptor(setting, &_mass_desc, (rt_off_t)&((umass_desc_t)0)->intf_desc);
/* configure the msc interface descriptor */ /* configure the msc interface descriptor */
_mstorage_descriptor_config(setting->desc, intf->intf_num); _mstorage_descriptor_config(setting->desc, intf->intf_num, device->dcd->device_is_hs);
/* create a bulk out and a bulk in endpoint */ /* create a bulk out and a bulk in endpoint */
mass_desc = (umass_desc_t)setting->desc; mass_desc = (umass_desc_t)setting->desc;

34
components/drivers/usb/usbdevice/class/rndis.c
View File

@ -58,9 +58,9 @@ struct rt_rndis_eth
#endif /* RNDIS_DELAY_LINK_UP */ #endif /* RNDIS_DELAY_LINK_UP */
ALIGN(4) ALIGN(4)
rt_uint8_t rx_pool[64]; rt_uint8_t rx_pool[512];
ALIGN(4) ALIGN(4)
rt_uint8_t tx_pool[64]; rt_uint8_t tx_pool[512];
rt_uint32_t cmd_pool[2]; rt_uint32_t cmd_pool[2];
ALIGN(4) ALIGN(4)
@ -175,14 +175,14 @@ const static struct ucdc_data_descriptor _data_desc =
USB_DESC_TYPE_ENDPOINT, USB_DESC_TYPE_ENDPOINT,
USB_DIR_OUT | USB_DYNAMIC, USB_DIR_OUT | USB_DYNAMIC,
USB_EP_ATTR_BULK, USB_EP_ATTR_BULK,
USB_CDC_BUFSIZE, USB_DYNAMIC,
0x00, 0x00,
/* endpoint, bulk in */ /* endpoint, bulk in */
USB_DESC_LENGTH_ENDPOINT, USB_DESC_LENGTH_ENDPOINT,
USB_DESC_TYPE_ENDPOINT, USB_DESC_TYPE_ENDPOINT,
USB_DYNAMIC | USB_DIR_IN, USB_DYNAMIC | USB_DIR_IN,
USB_EP_ATTR_BULK, USB_EP_ATTR_BULK,
USB_CDC_BUFSIZE, USB_DYNAMIC,
0x00, 0x00,
}; };
@ -206,16 +206,17 @@ struct usb_os_function_comp_id_descriptor rndis_func_comp_id_desc =
.subCompatibleID = {'5', '1', '6', '2', '0', '0', '1', 0x00}, .subCompatibleID = {'5', '1', '6', '2', '0', '0', '1', 0x00},
.reserved2 = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00} .reserved2 = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
}; };
ALIGN(4) //FS and HS needed
static struct usb_qualifier_descriptor dev_qualifier = static struct usb_qualifier_descriptor dev_qualifier =
{ {
sizeof(dev_qualifier), sizeof(dev_qualifier), //bLength
USB_DESC_TYPE_DEVICEQUALIFIER, USB_DESC_TYPE_DEVICEQUALIFIER, //bDescriptorType
0x0200, 0x0200, //bcdUSB
USB_CLASS_CDC, USB_CLASS_CDC, //bDeviceClass
0x00, USB_CDC_SUBCLASS_ACM, //bDeviceSubClass
64, USB_CDC_PROTOCOL_VENDOR, //bDeviceProtocol
0x01, 64, //bMaxPacketSize0
0x01, //bNumConfigurations
0, 0,
}; };
@ -401,7 +402,7 @@ static rt_err_t _rndis_query_response(ufunction_t func,rndis_query_msg_t msg)
case OID_GEN_LINK_SPEED: case OID_GEN_LINK_SPEED:
resp = _create_resp(4); resp = _create_resp(4);
if(resp == RT_NULL) break; if(resp == RT_NULL) break;
_set_resp(resp, (10UL * 1000 * 1000) / 100); _set_resp(resp, func->device->dcd->device_is_hs ? (480UL * 1000 *1000) : (12UL * 1000 * 1000) / 100);
break; break;
case OID_GEN_MEDIA_CONNECT_STATUS: case OID_GEN_MEDIA_CONNECT_STATUS:
@ -1008,7 +1009,7 @@ static struct ufunction_ops ops =
* *
* @return RT_EOK on successful. * @return RT_EOK on successful.
*/ */
static rt_err_t _cdc_descriptor_config(ucdc_comm_desc_t comm, rt_uint8_t cintf_nr, ucdc_data_desc_t data, rt_uint8_t dintf_nr) static rt_err_t _cdc_descriptor_config(ucdc_comm_desc_t comm, rt_uint8_t cintf_nr, ucdc_data_desc_t data, rt_uint8_t dintf_nr, rt_uint8_t device_is_hs)
{ {
comm->call_mgmt_desc.data_interface = dintf_nr; comm->call_mgmt_desc.data_interface = dintf_nr;
comm->union_desc.master_interface = cintf_nr; comm->union_desc.master_interface = cintf_nr;
@ -1016,7 +1017,8 @@ static rt_err_t _cdc_descriptor_config(ucdc_comm_desc_t comm, rt_uint8_t cintf_n
#ifdef RT_USB_DEVICE_COMPOSITE #ifdef RT_USB_DEVICE_COMPOSITE
comm->iad_desc.bFirstInterface = cintf_nr; comm->iad_desc.bFirstInterface = cintf_nr;
#endif #endif
data->ep_out_desc.wMaxPacketSize = device_is_hs ? 512 : 64;
data->ep_in_desc.wMaxPacketSize = device_is_hs ? 512 : 64;
return RT_EOK; return RT_EOK;
} }
@ -1237,7 +1239,7 @@ ufunction_t rt_usbd_function_rndis_create(udevice_t device)
(rt_off_t)&((ucdc_comm_desc_t)0)->intf_desc); (rt_off_t)&((ucdc_comm_desc_t)0)->intf_desc);
rt_usbd_altsetting_config_descriptor(data_setting, &_data_desc, 0); rt_usbd_altsetting_config_descriptor(data_setting, &_data_desc, 0);
/* configure the cdc interface descriptor */ /* configure the cdc interface descriptor */
_cdc_descriptor_config(comm_setting->desc, intf_comm->intf_num, data_setting->desc, intf_data->intf_num); _cdc_descriptor_config(comm_setting->desc, intf_comm->intf_num, data_setting->desc, intf_data->intf_num, device->dcd->device_is_hs);
/* create a command endpoint */ /* create a command endpoint */
comm_desc = (ucdc_comm_desc_t)comm_setting->desc; comm_desc = (ucdc_comm_desc_t)comm_setting->desc;

25
components/drivers/usb/usbdevice/class/winusb.c
View File

@ -43,13 +43,14 @@ static struct udevice_descriptor dev_desc =
//FS and HS needed //FS and HS needed
static struct usb_qualifier_descriptor dev_qualifier = static struct usb_qualifier_descriptor dev_qualifier =
{ {
sizeof(dev_qualifier), sizeof(dev_qualifier), //bLength
USB_DESC_TYPE_DEVICEQUALIFIER, USB_DESC_TYPE_DEVICEQUALIFIER, //bDescriptorType
0x0200, 0x0200, //bcdUSB
0x00, 0xFF, //bDeviceClass
0x00, 0x00, //bDeviceSubClass
64, 0x00, //bDeviceProtocol
0x01, 64, //bMaxPacketSize0
0x01, //bNumConfigurations
0, 0,
}; };
@ -81,14 +82,14 @@ struct winusb_descriptor _winusb_desc =
USB_DESC_TYPE_ENDPOINT, USB_DESC_TYPE_ENDPOINT,
USB_DYNAMIC | USB_DIR_OUT, USB_DYNAMIC | USB_DIR_OUT,
USB_EP_ATTR_BULK, USB_EP_ATTR_BULK,
0x40, USB_DYNAMIC,
0x00, 0x00,
/*endpoint descriptor*/ /*endpoint descriptor*/
USB_DESC_LENGTH_ENDPOINT, USB_DESC_LENGTH_ENDPOINT,
USB_DESC_TYPE_ENDPOINT, USB_DESC_TYPE_ENDPOINT,
USB_DYNAMIC | USB_DIR_IN, USB_DYNAMIC | USB_DIR_IN,
USB_EP_ATTR_BULK, USB_EP_ATTR_BULK,
0x40, USB_DYNAMIC,
0x00, 0x00,
}; };
@ -197,11 +198,13 @@ static struct ufunction_ops ops =
RT_NULL, RT_NULL,
}; };
static rt_err_t _winusb_descriptor_config(winusb_desc_t winusb, rt_uint8_t cintf_nr) static rt_err_t _winusb_descriptor_config(winusb_desc_t winusb, rt_uint8_t cintf_nr, rt_uint8_t device_is_hs)
{ {
#ifdef RT_USB_DEVICE_COMPOSITE #ifdef RT_USB_DEVICE_COMPOSITE
winusb->iad_desc.bFirstInterface = cintf_nr; winusb->iad_desc.bFirstInterface = cintf_nr;
#endif #endif
winusb->ep_out_desc.wMaxPacketSize = device_is_hs ? 512 : 64;
winusb->ep_in_desc.wMaxPacketSize = device_is_hs ? 512 : 64;
winusb_func_comp_id_desc.bFirstInterfaceNumber = cintf_nr; winusb_func_comp_id_desc.bFirstInterfaceNumber = cintf_nr;
return RT_EOK; return RT_EOK;
} }
@ -293,7 +296,7 @@ ufunction_t rt_usbd_function_winusb_create(udevice_t device)
rt_usbd_altsetting_config_descriptor(winusb_setting, &_winusb_desc, (rt_off_t)&((winusb_desc_t)0)->intf_desc); rt_usbd_altsetting_config_descriptor(winusb_setting, &_winusb_desc, (rt_off_t)&((winusb_desc_t)0)->intf_desc);
/* configure the hid interface descriptor */ /* configure the hid interface descriptor */
_winusb_descriptor_config(winusb_setting->desc, winusb_intf->intf_num); _winusb_descriptor_config(winusb_setting->desc, winusb_intf->intf_num, device->dcd->device_is_hs);
/* create endpoint */ /* create endpoint */
winusb_desc = (winusb_desc_t)winusb_setting->desc; winusb_desc = (winusb_desc_t)winusb_setting->desc;

5
components/drivers/usb/usbdevice/core/core.c
View File

@ -166,7 +166,7 @@ static rt_err_t _get_qualifier_descriptor(struct udevice* device, ureq_t setup)
RT_ASSERT(device != RT_NULL); RT_ASSERT(device != RT_NULL);
RT_ASSERT(setup != RT_NULL); RT_ASSERT(setup != RT_NULL);
if(device->dev_qualifier) if(device->dev_qualifier && device->dcd->device_is_hs)
{ {
/* send device qualifier descriptor to endpoint 0 */ /* send device qualifier descriptor to endpoint 0 */
rt_usbd_ep0_write(device, (rt_uint8_t*)device->dev_qualifier, rt_usbd_ep0_write(device, (rt_uint8_t*)device->dev_qualifier,
@ -210,6 +210,9 @@ static rt_err_t _get_descriptor(struct udevice* device, ureq_t setup)
case USB_DESC_TYPE_DEVICEQUALIFIER: case USB_DESC_TYPE_DEVICEQUALIFIER:
_get_qualifier_descriptor(device, setup); _get_qualifier_descriptor(device, setup);
break; break;
case USB_DESC_TYPE_OTHERSPEED:
_get_config_descriptor(device, setup);
break;
default: default:
rt_kprintf("unsupported descriptor request\n"); rt_kprintf("unsupported descriptor request\n");
rt_usbd_ep0_set_stall(device); rt_usbd_ep0_set_stall(device);

15
components/drivers/usb/usbdevice/core/usbdevice.c
View File

@ -59,6 +59,20 @@ static struct udevice_descriptor compsit_desc =
USB_STRING_SERIAL_INDEX, //iSerialNumber; USB_STRING_SERIAL_INDEX, //iSerialNumber;
USB_DYNAMIC, //bNumConfigurations; USB_DYNAMIC, //bNumConfigurations;
}; };
//FS and HS needed
static struct usb_qualifier_descriptor dev_qualifier =
{
sizeof(dev_qualifier), //bLength
USB_DESC_TYPE_DEVICEQUALIFIER, //bDescriptorType
0x0200, //bcdUSB
USB_CLASS_MISC, //bDeviceClass
0x02, //bDeviceSubClass
0x01, //bDeviceProtocol
64, //bMaxPacketSize0
0x01, //bNumConfigurations
0,
};
#endif #endif
struct usb_os_comp_id_descriptor usb_comp_id_desc = struct usb_os_comp_id_descriptor usb_comp_id_desc =
@ -169,6 +183,7 @@ rt_err_t rt_usb_device_init(void)
#ifdef RT_USB_DEVICE_COMPOSITE #ifdef RT_USB_DEVICE_COMPOSITE
rt_usbd_device_set_descriptor(udevice, &compsit_desc); rt_usbd_device_set_descriptor(udevice, &compsit_desc);
rt_usbd_device_set_string(udevice, ustring); rt_usbd_device_set_string(udevice, ustring);
rt_usbd_device_set_qualifier(device, &dev_qualifier);
#else #else
rt_usbd_device_set_descriptor(udevice, func->dev_desc); rt_usbd_device_set_descriptor(udevice, func->dev_desc);
#endif #endif

0
components/libc/compilers/dlib/fcntl.h Normal file
View File

0
components/libc/compilers/dlib/sys/stat.h Normal file
View File

5
components/libc/compilers/dlib/sys/unistd.h
View File

@ -2,6 +2,11 @@
#define _SYS_UNISTD_H #define _SYS_UNISTD_H
#ifdef RT_USING_DFS #ifdef RT_USING_DFS
#define STDIN_FILENO 0 /* standard input file descriptor */
#define STDOUT_FILENO 1 /* standard output file descriptor */
#define STDERR_FILENO 2 /* standard error file descriptor */
#include <dfs_posix.h> #include <dfs_posix.h>
#else #else
#define _FREAD 0x0001 /* read enabled */ #define _FREAD 0x0001 /* read enabled */

250
components/libc/compilers/minilibc/stdint.h
View File

@ -1,18 +1,75 @@
/*
* ISO C Standard: 7.18 Integer types <stdint.h>
*/
#ifndef __STDINT_H__ #ifndef __STDINT_H__
#define __STDINT_H__ #define __STDINT_H__
typedef signed char int8_t; /* 7.8.1.1 Exact-width integer types */
typedef signed short int16_t;
typedef signed int int32_t;
typedef unsigned char uint8_t; #ifdef __INT8_TYPE__
typedef unsigned short uint16_t; typedef __INT8_TYPE__ int8_t;
typedef unsigned int uint32_t; #endif
#ifdef __INT16_TYPE__
typedef __INT16_TYPE__ int16_t;
#endif
#ifdef __INT32_TYPE__
typedef __INT32_TYPE__ int32_t;
#endif
#ifdef __INT64_TYPE__
typedef __INT64_TYPE__ int64_t;
#endif
#ifdef __UINT8_TYPE__
typedef __UINT8_TYPE__ uint8_t;
#endif
#ifdef __UINT16_TYPE__
typedef __UINT16_TYPE__ uint16_t;
#endif
#ifdef __UINT32_TYPE__
typedef __UINT32_TYPE__ uint32_t;
#endif
#ifdef __UINT64_TYPE__
typedef __UINT64_TYPE__ uint64_t;
#endif
typedef long long int64_t; /* 7.8.1.2 Minimum-width integer types */
typedef unsigned long long uint64_t;
typedef signed long intptr_t; typedef __INT_LEAST8_TYPE__ int_least8_t;
typedef unsigned long uintptr_t; typedef __INT_LEAST16_TYPE__ int_least16_t;
typedef __INT_LEAST32_TYPE__ int_least32_t;
typedef __INT_LEAST64_TYPE__ int_least64_t;
typedef __UINT_LEAST8_TYPE__ uint_least8_t;
typedef __UINT_LEAST16_TYPE__ uint_least16_t;
typedef __UINT_LEAST32_TYPE__ uint_least32_t;
typedef __UINT_LEAST64_TYPE__ uint_least64_t;
/* 7.8.1.3 Fastest minimum-width integer types */
typedef __INT_FAST8_TYPE__ int_fast8_t;
typedef __INT_FAST16_TYPE__ int_fast16_t;
typedef __INT_FAST32_TYPE__ int_fast32_t;
typedef __INT_FAST64_TYPE__ int_fast64_t;
typedef __UINT_FAST8_TYPE__ uint_fast8_t;
typedef __UINT_FAST16_TYPE__ uint_fast16_t;
typedef __UINT_FAST32_TYPE__ uint_fast32_t;
typedef __UINT_FAST64_TYPE__ uint_fast64_t;
/* 7.8.1.4 Integer types capable of holding object pointers */
#ifdef __INTPTR_TYPE__
typedef __INTPTR_TYPE__ intptr_t;
#endif
#ifdef __UINTPTR_TYPE__
typedef __UINTPTR_TYPE__ uintptr_t;
#endif
/* 7.8.1.5 Greatest-width integer types */
typedef __INTMAX_TYPE__ intmax_t;
typedef __UINTMAX_TYPE__ uintmax_t;
#if (!defined __cplusplus || __cplusplus >= 201103L \
|| defined __STDC_LIMIT_MACROS)
/* /*
* 7.18.2 Limits of specified-width integer types. * 7.18.2 Limits of specified-width integer types.
@ -22,17 +79,170 @@ typedef unsigned long uintptr_t;
*/ */
/* 7.18.2.1 Limits of exact-width integer types */ /* 7.18.2.1 Limits of exact-width integer types */
#define INT8_MIN (-0x7f - 1)
#define INT16_MIN (-0x7fff - 1)
#define INT32_MIN (-0x7fffffff - 1)
#define INT8_MAX 0x7f #ifdef __INT8_MAX__
#define INT16_MAX 0x7fff # undef INT8_MAX
#define INT32_MAX 0x7fffffff # define INT8_MAX __INT8_MAX__
# undef INT8_MIN
# define INT8_MIN (-INT8_MAX - 1)
#endif
#ifdef __UINT8_MAX__
# undef UINT8_MAX
# define UINT8_MAX __UINT8_MAX__
#endif
#ifdef __INT16_MAX__
# undef INT16_MAX
# define INT16_MAX __INT16_MAX__
# undef INT16_MIN
# define INT16_MIN (-INT16_MAX - 1)
#endif
#ifdef __UINT16_MAX__
# undef UINT16_MAX
# define UINT16_MAX __UINT16_MAX__
#endif
#ifdef __INT32_MAX__
# undef INT32_MAX
# define INT32_MAX __INT32_MAX__
# undef INT32_MIN
# define INT32_MIN (-INT32_MAX - 1)
#endif
#ifdef __UINT32_MAX__
# undef UINT32_MAX
# define UINT32_MAX __UINT32_MAX__
#endif
#ifdef __INT64_MAX__
# undef INT64_MAX
# define INT64_MAX __INT64_MAX__
# undef INT64_MIN
# define INT64_MIN (-INT64_MAX - 1)
#endif
#ifdef __UINT64_MAX__
# undef UINT64_MAX
# define UINT64_MAX __UINT64_MAX__
#endif
#define UINT8_MAX 0xff #undef INT_LEAST8_MAX
#define UINT16_MAX 0xffff #define INT_LEAST8_MAX __INT_LEAST8_MAX__
#define UINT32_MAX 0xffffffffU #undef INT_LEAST8_MIN
#define INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)
#undef UINT_LEAST8_MAX
#define UINT_LEAST8_MAX __UINT_LEAST8_MAX__
#undef INT_LEAST16_MAX
#define INT_LEAST16_MAX __INT_LEAST16_MAX__
#undef INT_LEAST16_MIN
#define INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)
#undef UINT_LEAST16_MAX
#define UINT_LEAST16_MAX __UINT_LEAST16_MAX__
#undef INT_LEAST32_MAX
#define INT_LEAST32_MAX __INT_LEAST32_MAX__
#undef INT_LEAST32_MIN
#define INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)
#undef UINT_LEAST32_MAX
#define UINT_LEAST32_MAX __UINT_LEAST32_MAX__
#undef INT_LEAST64_MAX
#define INT_LEAST64_MAX __INT_LEAST64_MAX__
#undef INT_LEAST64_MIN
#define INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)
#undef UINT_LEAST64_MAX
#define UINT_LEAST64_MAX __UINT_LEAST64_MAX__
#undef INT_FAST8_MAX
#define INT_FAST8_MAX __INT_FAST8_MAX__
#undef INT_FAST8_MIN
#define INT_FAST8_MIN (-INT_FAST8_MAX - 1)
#undef UINT_FAST8_MAX
#define UINT_FAST8_MAX __UINT_FAST8_MAX__
#undef INT_FAST16_MAX
#define INT_FAST16_MAX __INT_FAST16_MAX__
#undef INT_FAST16_MIN
#define INT_FAST16_MIN (-INT_FAST16_MAX - 1)
#undef UINT_FAST16_MAX
#define UINT_FAST16_MAX __UINT_FAST16_MAX__
#undef INT_FAST32_MAX
#define INT_FAST32_MAX __INT_FAST32_MAX__
#undef INT_FAST32_MIN
#define INT_FAST32_MIN (-INT_FAST32_MAX - 1)
#undef UINT_FAST32_MAX
#define UINT_FAST32_MAX __UINT_FAST32_MAX__
#undef INT_FAST64_MAX
#define INT_FAST64_MAX __INT_FAST64_MAX__
#undef INT_FAST64_MIN
#define INT_FAST64_MIN (-INT_FAST64_MAX - 1)
#undef UINT_FAST64_MAX
#define UINT_FAST64_MAX __UINT_FAST64_MAX__
#ifdef __INTPTR_MAX__
# undef INTPTR_MAX
# define INTPTR_MAX __INTPTR_MAX__
# undef INTPTR_MIN
# define INTPTR_MIN (-INTPTR_MAX - 1)
#endif
#ifdef __UINTPTR_MAX__
# undef UINTPTR_MAX
# define UINTPTR_MAX __UINTPTR_MAX__
#endif
#undef INTMAX_MAX
#define INTMAX_MAX __INTMAX_MAX__
#undef INTMAX_MIN
#define INTMAX_MIN (-INTMAX_MAX - 1)
#undef UINTMAX_MAX
#define UINTMAX_MAX __UINTMAX_MAX__
/* 7.18.3 Limits of other integer types */
#undef PTRDIFF_MAX
#define PTRDIFF_MAX __PTRDIFF_MAX__
#undef PTRDIFF_MIN
#define PTRDIFF_MIN (-PTRDIFF_MAX - 1)
#undef SIG_ATOMIC_MAX
#define SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__
#undef SIG_ATOMIC_MIN
#define SIG_ATOMIC_MIN __SIG_ATOMIC_MIN__
#undef SIZE_MAX
#define SIZE_MAX __SIZE_MAX__
#undef WCHAR_MAX
#define WCHAR_MAX __WCHAR_MAX__
#undef WCHAR_MIN
#define WCHAR_MIN __WCHAR_MIN__
#undef WINT_MAX
#define WINT_MAX __WINT_MAX__
#undef WINT_MIN
#define WINT_MIN __WINT_MIN__
#endif /* (!defined __cplusplus || __cplusplus >= 201103L
|| defined __STDC_LIMIT_MACROS) */
#if (!defined __cplusplus || __cplusplus >= 201103L \
|| defined __STDC_CONSTANT_MACROS)
#undef INT8_C
#define INT8_C(c) __INT8_C(c)
#undef INT16_C
#define INT16_C(c) __INT16_C(c)
#undef INT32_C
#define INT32_C(c) __INT32_C(c)
#undef INT64_C
#define INT64_C(c) __INT64_C(c)
#undef UINT8_C
#define UINT8_C(c) __UINT8_C(c)
#undef UINT16_C
#define UINT16_C(c) __UINT16_C(c)
#undef UINT32_C
#define UINT32_C(c) __UINT32_C(c)
#undef UINT64_C
#define UINT64_C(c) __UINT64_C(c)
#undef INTMAX_C
#define INTMAX_C(c) __INTMAX_C(c)
#undef UINTMAX_C
#define UINTMAX_C(c) __UINTMAX_C(c)
#endif /* (!defined __cplusplus || __cplusplus >= 201103L
|| defined __STDC_CONSTANT_MACROS) */
#ifndef __INT_MAX__ #ifndef __INT_MAX__
#define __INT_MAX__ 2147483647 #define __INT_MAX__ 2147483647
@ -45,6 +255,4 @@ typedef unsigned long uintptr_t;
#define LONG_MIN (-LONG_MAX - 1) #define LONG_MIN (-LONG_MAX - 1)
#define ULONG_MAX (~0UL) #define ULONG_MAX (~0UL)
#define SIZE_MAX ULONG_MAX
#endif #endif

22
include/libc/libc_stat.h
View File

@ -77,11 +77,23 @@
struct stat struct stat
{ {
struct rt_device* st_dev; struct rt_device *st_dev;
uint16_t st_mode; uint16_t st_ino;
uint32_t st_size; uint16_t st_mode;
time_t st_mtime; uint16_t st_nlink;
uint32_t st_blksize; uint16_t st_uid;
uint16_t st_gid;
struct rt_device *st_rdev;
uint32_t st_size;
time_t st_atime;
long st_spare1;
time_t st_mtime;
long st_spare2;
time_t st_ctime;
long st_spare3;
uint32_t st_blksize;
uint32_t st_blocks;
long st_spare4[2];
}; };
#endif #endif