chinky/rtt-f030
chinky
/
rtt-f030
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

[bsp] support using debuger download, runing after reboot

This commit is contained in:
tanek liang 2017-12-07 13:36:52 +08:00
parent 68f13f5d92
commit f88e1268be
11 changed files with 282 additions and 83 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

25
bsp/imxrt1052-evk/Libraries/arm/MIMXRT1052xxxxx_flexspi_nor.scf
View File

@ -45,20 +45,20 @@
** ###################################################################
*/
#define m_interrupts_start 0x60002000
#define m_interrupts_size 0x00000400
#define m_text_start 0x60002400
#define m_text_size 0x1F7FDC00
#define m_text_start 0x60002000
#define m_text_size 0x1F7FE000
#define m_data_start 0x20000000
#define m_data_size 0x00020000
#define m_ncache_start 0x81E00000
#define m_ncache_size 0x00200000
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#define Stack_Size 0x1000
#endif
#if (defined(__heap_size__))
@ -69,23 +69,22 @@
LR_m_text m_text_start m_text_size { ; load region size_region
ER_m_text m_text_start m_text_size { ; load address = execution address
* (RESET,+FIRST)
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
* (NonCacheable.init)
* (NonCacheable)
}
ARM_LIB_HEAP +0 EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down
ARM_LIB_STACK +0 EMPTY Stack_Size { ; Stack region growing down
}
}
LR_m_interrupts m_interrupts_start m_interrupts_size {
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (RESET,+FIRST)
RW_m_ncache m_ncache_start m_ncache_size { ; ncache RW data
* (NonCacheable.init)
* (NonCacheable)
}
}

45
bsp/imxrt1052-evk/Libraries/arm/evkmimxrt1050_flexspi_nor.ini Normal file
View File

@ -0,0 +1,45 @@
/*
* Copyright 2017 NXP
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
FUNC void Setup (void) {
SP = _RDWORD(0x60002000); // Setup Stack Pointer
PC = _RDWORD(0x60002004); // Setup Program Counter
_WDWORD(0xE000ED08, 0x60002000); // Setup Vector Table Offset Register
}
FUNC void OnResetExec (void) { // executes upon software RESET
Setup(); // Setup for Running
}
LOAD %L INCREMENTAL // Download
Setup(); // Setup for Running
// g, main

66
bsp/imxrt1052-evk/Libraries/gcc/MIMXRT1052xxxxx_flexspi_nor.ld
View File

@ -53,14 +53,33 @@ STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
/* Specify the memory areas */
MEMORY
{
m_boot_data (RX) : ORIGIN = 0x60000000, LENGTH = 0x00000400
m_image_vertor_table (RX) : ORIGIN = 0x60001000, LENGTH = 0x00000400
m_interrupts (RX) : ORIGIN = 0x60002000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x60002400, LENGTH = 0x1F7FDC00
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
m_itcm (RW) : ORIGIN = 0x00000000, LENGTH = 0x00020000
m_dtcm (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
m_ocram (RW) : ORIGIN = 0x20200000, LENGTH = 0x00040000
m_sdram (RW) : ORIGIN = 0x80000000, LENGTH = 0x01E00000
m_nocache (RW) : ORIGIN = 0x81E00000, LENGTH = 0x00200000
}
/* Define output sections */
SECTIONS
{
.boot_data :
{
KEEP(*(.bootdata))
} > m_boot_data
.image_vertor_table :
{
KEEP(*(.ivt))
} > m_image_vertor_table
/* The startup code goes first into internal RAM */
.interrupts :
{
@ -87,6 +106,23 @@ SECTIONS
KEEP (*(.init))
KEEP (*(.fini))
. = ALIGN(4);
/* section information for finsh shell */
. = ALIGN(4);
__fsymtab_start = .;
KEEP(*(FSymTab))
__fsymtab_end = .;
. = ALIGN(4);
__vsymtab_start = .;
KEEP(*(VSymTab))
__vsymtab_end = .;
. = ALIGN(4);
/* section information for initial. */
. = ALIGN(4);
__rt_init_start = .;
KEEP(*(SORT(.rti_fn*)))
__rt_init_end = .;
} > m_text
.ARM.extab :
@ -173,7 +209,7 @@ SECTIONS
KEEP(*(.jcr*))
. = ALIGN(4);
__data_end__ = .; /* define a global symbol at data end */
} > m_data
} > m_dtcm
__NDATA_ROM = __DATA_ROM + (__data_end__ - __data_start__);
.ncache.init : AT(__NDATA_ROM)
@ -182,14 +218,14 @@ SECTIONS
*(NonCacheable.init)
. = ALIGN(4);
__noncachedata_init_end__ = .; /* create a global symbol at initialized ncache data end */
} > m_data
} > m_dtcm
. = __noncachedata_init_end__;
.ncache :
{
*(NonCacheable)
. = ALIGN(4);
__noncachedata_end__ = .; /* define a global symbol at ncache data end */
} > m_data
} > m_dtcm
__DATA_END = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__);
text_end = ORIGIN(m_text) + LENGTH(m_text);
@ -209,32 +245,22 @@ SECTIONS
. = ALIGN(4);
__bss_end__ = .;
__END_BSS = .;
} > m_data
.heap :
{
. = ALIGN(8);
__end__ = .;
PROVIDE(end = .);
__HeapBase = .;
. += HEAP_SIZE;
__HeapLimit = .;
__heap_limit = .; /* Add for _sbrk */
} > m_data
} > m_dtcm
.stack :
{
. = ALIGN(8);
stack_start = .;
. += STACK_SIZE;
} > m_data
stack_end = .;
heap_start = .;
} > m_dtcm
/* Initializes stack on the end of block */
__StackTop = ORIGIN(m_data) + LENGTH(m_data);
__StackLimit = __StackTop - STACK_SIZE;
__StackTop = stack_end;
PROVIDE(__stack = __StackTop);
.ARM.attributes 0 : { *(.ARM.attributes) }
ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap")
}

56
bsp/imxrt1052-evk/Libraries/gcc/MIMXRT1052xxxxx_ram.ld
View File

@ -54,8 +54,14 @@ STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
MEMORY
{
m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000400
m_text (RX) : ORIGIN = 0x00000400, LENGTH = 0x0001FC00
m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
m_text (RX) : ORIGIN = 0x00000400, LENGTH = 0x00020000
/* m_itcm (RW) : ORIGIN = 0x00000000, LENGTH = 0x00020000 */
m_dtcm (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000
/* m_ocram (RW) : ORIGIN = 0x20200000, LENGTH = 0x00040000 */
/* m_sdram (RW) : ORIGIN = 0x80000000, LENGTH = 0x01E00000 */
/* m_nocache (RW) : ORIGIN = 0x81E00000, LENGTH = 0x00200000 */
}
/* Define output sections */
@ -87,6 +93,23 @@ SECTIONS
KEEP (*(.init))
KEEP (*(.fini))
. = ALIGN(4);
/* section information for finsh shell */
. = ALIGN(4);
__fsymtab_start = .;
KEEP(*(FSymTab))
__fsymtab_end = .;
. = ALIGN(4);
__vsymtab_start = .;
KEEP(*(VSymTab))
__vsymtab_end = .;
. = ALIGN(4);
/* section information for initial. */
. = ALIGN(4);
__rt_init_start = .;
KEEP(*(SORT(.rti_fn*)))
__rt_init_end = .;
} > m_text
.ARM.extab :
@ -173,7 +196,7 @@ SECTIONS
KEEP(*(.jcr*))
. = ALIGN(4);
__data_end__ = .; /* define a global symbol at data end */
} > m_data
} > m_dtcm
__NDATA_ROM = __DATA_ROM + (__data_end__ - __data_start__);
.ncache.init : AT(__NDATA_ROM)
@ -182,14 +205,14 @@ SECTIONS
*(NonCacheable.init)
. = ALIGN(4);
__noncachedata_init_end__ = .; /* create a global symbol at initialized ncache data end */
} > m_data
} > m_dtcm
. = __noncachedata_init_end__;
.ncache :
{
*(NonCacheable)
. = ALIGN(4);
__noncachedata_end__ = .; /* define a global symbol at ncache data end */
} > m_data
} > m_dtcm
__DATA_END = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__);
text_end = ORIGIN(m_text) + LENGTH(m_text);
@ -209,32 +232,21 @@ SECTIONS
. = ALIGN(4);
__bss_end__ = .;
__END_BSS = .;
} > m_data
.heap :
{
. = ALIGN(8);
__end__ = .;
PROVIDE(end = .);
__HeapBase = .;
. += HEAP_SIZE;
__HeapLimit = .;
__heap_limit = .; /* Add for _sbrk */
} > m_data
} > m_dtcm
.stack :
{
. = ALIGN(8);
stack_start = .;
. += STACK_SIZE;
} > m_data
stack_end = .;
heap_start = .;
} > m_dtcm
/* Initializes stack on the end of block */
__StackTop = ORIGIN(m_data) + LENGTH(m_data);
__StackLimit = __StackTop - STACK_SIZE;
__StackTop = stack_end;
PROVIDE(__stack = __StackTop);
.ARM.attributes 0 : { *(.ARM.attributes) }
ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap")
}

4
bsp/imxrt1052-evk/Libraries/gcc/startup_MIMXRT1052.S
View File

@ -36,6 +36,10 @@
/*****************************************************************************/
/* Version: GCC for ARM Embedded Processors */
/*****************************************************************************/
#define __STARTUP_INITIALIZE_NONCACHEDATA
#define __STARTUP_CLEAR_BSS
.syntax unified
.arch armv7-m

47
bsp/imxrt1052-evk/Libraries/iar/MIMXRT1052xxxxx_flexspi_nor.icf
View File

@ -47,14 +47,23 @@
define symbol m_interrupts_start = 0x60002000;
define symbol m_interrupts_end = 0x600023FF;
define symbol m_text_start = 0x60002400;
define symbol m_text_end = 0x7F7FFFFF;
define symbol m_itcm_start = 0x00000000;
define symbol m_itcm_end = 0x0001FFFF;
define symbol m_data_start = 0x20000000;
define symbol m_data_end = 0x2001FFFF;
define symbol m_spiflash_start = 0x60002400;
define symbol m_spiflash_end = 0x7F7FFFFF;
define symbol m_data2_start = 0x20200000;
define symbol m_data2_end = 0x2023FFFF;
define symbol m_dtcm_start = 0x20000000;
define symbol m_dtcm_end = 0x2001FFFF;
define symbol m_ocram_start = 0x20200000;
define symbol m_ocram_end = 0x2023FFFF;
define symbol m_sdram_start = 0x80000000;
define symbol m_sdram_end = 0x81DFFFFF;
define symbol m_ncache_start = 0x81E00000;
define symbol m_ncache_end = 0x81FFFFFF;
/* Sizes */
if (isdefinedsymbol(__stack_size__)) {
@ -75,11 +84,13 @@ define exported symbol __RAM_VECTOR_TABLE_SIZE = 0x0;
define memory mem with size = 4G;
define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]
| mem:[from m_text_start to m_text_end];
| mem:[from m_spiflash_start to m_spiflash_end];
define region DATA_region = mem:[from m_data_start to m_data_end-__size_cstack__];
define region DATA2_region = mem:[from m_data2_start to m_data2_end];
define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_end];
define region ITCM_region = mem:[from m_itcm_start to m_itcm_end];
define region DTCM_region = mem:[from m_dtcm_start to m_dtcm_end];
define region OCRAM_region = mem:[from m_ocram_start to m_ocram_end];
define region NCACHE_region = mem:[from m_ncache_start to m_ncache_end];
define region SDRAM_region = mem:[from m_sdram_start to m_sdram_end];
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
@ -92,10 +103,14 @@ do not initialize { section .noinit };
place at address mem: m_interrupts_start { readonly section .intvec };
place in TEXT_region { readonly };
place in DATA_region { block RW };
place in DATA_region { block ZI };
place in DATA_region { last block HEAP };
place in DATA_region { block NCACHE_VAR };
place in CSTACK_region { block CSTACK };
keep { section FSymTab };
keep { section VSymTab };
keep { section .rti_fn* };
place in TEXT_region { readonly };
place in DTCM_region { block RW };
place in DTCM_region { block ZI };
place in DTCM_region { last block HEAP };
place in DTCM_region { block CSTACK };
place in NCACHE_region { block NCACHE_VAR };

2
bsp/imxrt1052-evk/Libraries/system_MIMXRT1052.c
View File

@ -116,6 +116,8 @@ void SystemInit (void) {
SCB_EnableDCache();
#endif
extern void rt_lowlevel_init(void);
rt_lowlevel_init();
}
/* ----------------------------------------------------------------------------

1
bsp/imxrt1052-evk/drivers/SConscript
View File

@ -8,6 +8,7 @@ cwd = os.path.join(str(Dir('#')), 'drivers')
src = Split("""
board.c
usart.c
hyper_flash_boot.c
drv_sdram.c
""")

16
bsp/imxrt1052-evk/drivers/board.c
View File

@ -31,14 +31,14 @@ const clock_usb_pll_config_t usb1PllConfig = { .loopDivider = 0U };
static void BOARD_BootClockGate(void)
{
/* Disable all unused peripheral clock */
CCM->CCGR0 = 0x00C0000FU;
CCM->CCGR1 = 0x30000000U;
CCM->CCGR2 = 0x003F0030U;
CCM->CCGR3 = 0xF0000330U;
CCM->CCGR4 = 0x0000FF3CU;
CCM->CCGR5 = 0xF000330FU;
CCM->CCGR6 = 0x00FC0300U;
// /* Disable all unused peripheral clock */
// CCM->CCGR0 = 0x00C0000FU;
// CCM->CCGR1 = 0x30000000U;
// CCM->CCGR2 = 0x003F0030U;
// CCM->CCGR3 = 0xF0000330U;
// CCM->CCGR4 = 0x0000FF3CU;
// CCM->CCGR5 = 0xF000330FU;
// CCM->CCGR6 = 0x00FC0300U;
}
static void BOARD_BootClockRUN(void)

93
bsp/imxrt1052-evk/drivers/hyper_flash_boot.c Normal file
View File

@ -0,0 +1,93 @@
/*
* File : clock.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2012, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2017-12-05 Tanek first version
*/
#include <rtthread.h>
#if defined (__ICCARM__ )
#define RT_AT_ADDR(__ADDR) @ __ADDR
#elif defined ( __GNUC__ )
#define RT_AT_ADDR(__ADDR) //__attribute__((at(__ADDR)))
#elif defined ( __CC_ARM )
#define RT_AT_ADDR(__ADDR) __attribute__((at(__ADDR)))
#else
#error Not a valid compiler/linker for m_dfu_settings placement.
#endif
#if defined ( __GNUC__ )
// enter serial download mode, and run command:
// finsh /> mem_dump(0x60000000, 512)
RT_USED static const uint32_t boot_data[] __attribute__((section (".bootdata"))) = {
0x42464346, 0x56010400, 0x00000000, 0x03030303, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000059, 0x01080800, 0x00000000, 0x00000000, 0x04000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0000000F, 0x0001000F,
0x8B1887A0, 0xA7048F10, 0x00000000, 0x00000000, 0x87008700, 0x87AA8700, 0x87058700, 0x87708700,
0x8B1887A0, 0xB70B8F10, 0x0000A704, 0x00000000, 0x87008700, 0x87AA8700, 0x87058700, 0x87AA8700,
0x87008700, 0x87558700, 0x87028700, 0x87558700, 0x87008700, 0x87AA8700, 0x87058700, 0x87808700,
0x87008700, 0x87AA8700, 0x87058700, 0x87AA8700, 0x87008700, 0x87558700, 0x87028700, 0x87558700,
0x8B188700, 0x87008F10, 0x00008730, 0x00000000, 0x87008700, 0x87AA8700, 0x87058700, 0x87A08700,
0x8B188700, 0xA3808F10, 0x00000000, 0x00000000, 0x87008700, 0x87AA8700, 0x87058700, 0x87808700,
0x87008700, 0x87AA8700, 0x87058700, 0x87AA8700, 0x87008700, 0x87558700, 0x87028700, 0x87558700,
0x87008700, 0x87AA8700, 0x87058700, 0x87108700, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000102, 0x00000302, 0x00000504, 0x00000902, 0x00000B04, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000200, 0x00040000, 0x00000008, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
};
// finsh /> mem_dump(0x60001000, 16)
RT_USED static const uint32_t image_vertor_table[] __attribute__((section (".ivt"))) = {
0x412000D1, 0x60002000, 0x00000000, 0x00000000, 0x60001020, 0x60001000, 0x00000000, 0x00000000,
0x60000000, 0x00800000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
};
#else
// enter serial download mode, and run command:
// finsh /> mem_dump(0x60000000, 512)
RT_USED static const uint32_t boot_data[] RT_AT_ADDR(0x60000000u) = {
0x42464346, 0x56010400, 0x00000000, 0x03030303, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000059, 0x01080800, 0x00000000, 0x00000000, 0x04000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0000000F, 0x0001000F,
0x8B1887A0, 0xA7048F10, 0x00000000, 0x00000000, 0x87008700, 0x87AA8700, 0x87058700, 0x87708700,
0x8B1887A0, 0xB70B8F10, 0x0000A704, 0x00000000, 0x87008700, 0x87AA8700, 0x87058700, 0x87AA8700,
0x87008700, 0x87558700, 0x87028700, 0x87558700, 0x87008700, 0x87AA8700, 0x87058700, 0x87808700,
0x87008700, 0x87AA8700, 0x87058700, 0x87AA8700, 0x87008700, 0x87558700, 0x87028700, 0x87558700,
0x8B188700, 0x87008F10, 0x00008730, 0x00000000, 0x87008700, 0x87AA8700, 0x87058700, 0x87A08700,
0x8B188700, 0xA3808F10, 0x00000000, 0x00000000, 0x87008700, 0x87AA8700, 0x87058700, 0x87808700,
0x87008700, 0x87AA8700, 0x87058700, 0x87AA8700, 0x87008700, 0x87558700, 0x87028700, 0x87558700,
0x87008700, 0x87AA8700, 0x87058700, 0x87108700, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000102, 0x00000302, 0x00000504, 0x00000902, 0x00000B04, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000200, 0x00040000, 0x00000008, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
};
// finsh /> mem_dump(0x60001000, 16)
RT_USED static const uint32_t image_vertor_table[] RT_AT_ADDR(0x60001000u) = {
0x412000D1, 0x60002000, 0x00000000, 0x00000000, 0x60001020, 0x60001000, 0x00000000, 0x00000000,
0x60000000, 0x00800000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
};
#endif

10
bsp/imxrt1052-evk/rtconfig.py
View File

@ -41,16 +41,18 @@ if PLATFORM == 'gcc':
STRIP = PREFIX + 'strip'
DEVICE = ' -std=c99 -mcpu=cortex-m7 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -ffunction-sections -fdata-sections'
CFLAGS = DEVICE + ' -g -Wall -DUSE_HAL_DRIVER -D__ASSEMBLY__ -D__FPU_USED -eentry'
CFLAGS = DEVICE + ' -g -Wall -DUSE_HAL_DRIVER -D__ASSEMBLY__ -D__FPU_PRESENT -eentry'
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=imxrt1052_sdram.map,-cref,-u,Reset_Handler -T imxrt1052_sdram.ld'
LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=imxrt1052_sdram.map,-cref,-u,Reset_Handler -T ./Libraries/gcc/MIMXRT1052xxxxx_flexspi_nor.ld'
CPATH = ''
LPATH = ''
CFLAGS += ' -gdwarf-2'
AFLAGS += ' -gdwarf-2'
if BUILD == 'debug':
CFLAGS += ' -O0 -gdwarf-2'
AFLAGS += ' -gdwarf-2'
CFLAGS += ' -O0'
else:
CFLAGS += ' -O2 -Os'